diff options
| author | Xingyu Chen <xingyu.chen@amlogic.com> | 2018-07-02 22:25:15 +0000 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2018-07-20 08:18:34 -0700 |
| commit | a51b74ea78ac11b7e632bb3ccfec469213177d6d (patch) | |
| tree | 801afe0804e60cce8407a1c4d3ba1afbdb028314 /arch/arm64/boot/dts/amlogic/meson-axg.dtsi | |
| parent | fd47716479f50091c7e4b081e34198e770ccd9e8 (diff) | |
ARM64: dts: meson-axg: add saradc support
Add the DT info for SAR ADC of the Amlogic's Meson-AXG SoC.
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-axg.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index e11fec2ba06d..5f4d49e2922e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -91,6 +91,13 @@ method = "smc"; }; + vddio_ao18: regulator-vddio_ao18 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 @@ -1236,6 +1243,20 @@ interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; status = "disabled"; }; + + saradc: adc@9000 { + compatible = "amlogic,meson-axg-saradc", + "amlogic,meson-saradc"; + reg = <0x0 0x9000 0x0 0x38>; + #io-channel-cells = <1>; + interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, + <&clkc_AO CLKID_AO_SAR_ADC>, + <&clkc_AO CLKID_AO_SAR_ADC_CLK>, + <&clkc_AO CLKID_AO_SAR_ADC_SEL>; + clock-names = "clkin", "core", "adc_clk", "adc_sel"; + status = "disabled"; + }; }; }; }; |