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authorNeil Armstrong <neil.armstrong@linaro.org>2024-08-28 15:53:56 +0200
committerNeil Armstrong <neil.armstrong@linaro.org>2024-09-02 10:33:23 +0200
commit9b5d25117985e51faf61a808c4b3e15432d55f85 (patch)
tree3d18635cb9dac797d796485a8e5b2e17197f5897 /arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
parentca55a30d27cb37c07f58e5c3448f4d19edb1829c (diff)
arm64: dts: amlogic: add clock and clock-names to sound cards
Add the missing clocks in the sound card nodes according to the AXG and GX sound card bindings changes. It solves the following errors: sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected) from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml# sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected) from schema $id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml# sound: 'anyOf' conditional failed, one must be fixed: 'clocks' is a required property '#clock-cells' is a required property from schema $id: http://devicetree.org/schemas/clock/clock.yaml# Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-3-58159abf0779@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts')
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index 05c7a1e3f1b7..32f98a192494 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -158,6 +158,10 @@
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;