diff options
| author | Jerome Brunet <jbrunet@baylibre.com> | 2019-03-18 10:58:45 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2019-03-22 15:43:09 -0700 |
| commit | 11a7bea17c9e0a36daab934d83e15a760f402147 (patch) | |
| tree | 596536aee203a64eadb0c6967a5f8742e54ec048 /arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | |
| parent | b019f4a4199f865b054262ff78f606ca70f7b981 (diff) | |
arm64: dts: meson: g12a: add pinctrl support controllers
Add the peripheral and always-on pinctrl controllers to the g12a soc.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-g12a.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index abfa167751af..5e07e4ca3f4b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -104,6 +104,29 @@ #address-cells = <2>; #size-cells = <2>; ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>; + + periphs_pinctrl: pinctrl@40 { + compatible = "amlogic,meson-g12a-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@40 { + reg = <0x0 0x40 0x0 0x4c>, + <0x0 0xe8 0x0 0x18>, + <0x0 0x120 0x0 0x18>, + <0x0 0x2c0 0x0 0x40>, + <0x0 0x340 0x0 0x1c>; + reg-names = "gpio", + "pull", + "pull-enable", + "mux", + "ds"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 0 86>; + }; + }; }; hiu: bus@3c000 { @@ -150,6 +173,25 @@ clocks = <&xtal>, <&clkc CLKID_CLK81>; clock-names = "xtal", "mpeg-clk"; }; + + ao_pinctrl: pinctrl@14 { + compatible = "amlogic,meson-g12a-aobus-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio_ao: bank@14 { + reg = <0x0 0x14 0x0 0x8>, + <0x0 0x1c 0x0 0x8>, + <0x0 0x24 0x0 0x14>; + reg-names = "mux", + "ds", + "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&ao_pinctrl 0 0 15>; + }; + }; }; sec_AO: ao-secure@140 { |