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authorNeil Armstrong <narmstrong@baylibre.com>2019-03-25 11:03:39 +0100
committerKevin Hilman <khilman@baylibre.com>2019-04-15 15:45:02 -0700
commit2607fd087370777fd2ae2ff7c1681fe1fb02566d (patch)
tree2a58c99db3584758c0e2aa7648697c52e7047216 /arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
parent9baf7d6be730cbd996eb56d6047ff1d5147cbff0 (diff)
arm64: dts: meson: g12a: Add mali-g31 gpu node
This patch adds the ARM Mali G31 GPU node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-g12a.dtsi')
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12a.dtsi27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index d4dc1a6caab5..858ddd68665c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
@@ -441,6 +441,33 @@
snps,quirk-frame-length-adjustment;
};
};
+
+ mali: gpu@ffe40000 {
+ compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
+ reg = <0x0 0xffe40000 0x0 0x40000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gpu", "mmu", "job";
+ clocks = <&clkc CLKID_MALI>;
+ resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
+
+ /*
+ * Mali clocking is provided by two identical clock paths
+ * MALI_0 and MALI_1 muxed to a single clock by a glitch
+ * free mux to safely change frequency while running.
+ */
+ assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
+ <&clkc CLKID_MALI_0>,
+ <&clkc CLKID_MALI>; /* Glitch free mux */
+ assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
+ <0>, /* Do Nothing */
+ <&clkc CLKID_MALI_0>;
+ assigned-clock-rates = <0>, /* Do Nothing */
+ <800000000>,
+ <0>; /* Do Nothing */
+ };
};
timer {