summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
diff options
context:
space:
mode:
authorNeil Armstrong <narmstrong@baylibre.com>2019-09-16 14:50:22 +0200
committerKevin Hilman <khilman@baylibre.com>2019-10-03 08:43:04 -0700
commit07a634bf6c5d51ce42e2d89e3e8c5c73d3a047f7 (patch)
treef4867f2525e2147d86bbef3c8d6bd41f6d6128eb /arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
parent1f8607d597635c283e397e87575b49184874d507 (diff)
arm64: dts: khadas-vim3: add commented support for PCIe
The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between an USB3.0 Type A connector and a M.2 Key M slot. The PHY driving these differential lines is shared between the USB3.0 controller and the PCIe Controller, thus only a single controller can use it. The needed DT configuration when the MCU is configured to mux the PCIe/USB3.0 differential lines to the M.2 Key M slot is added commented and may be uncommented to disable USB3.0 from the USB Complex and enable the PCIe controller. The End User is not expected to uncomment the following except for testing purposes, but instead rely on the firmware/bootloader to update these nodes accordingly if PCIe mode is selected by the MCU. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi')
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
index 4fe7d33ebe8a..90815fa25ec6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
@@ -246,6 +246,10 @@
linux,rc-map-name = "rc-khadas";
};
+&pcie {
+ reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
+};
+
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;