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authorLinus Torvalds <torvalds@linux-foundation.org>2018-12-31 17:36:02 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2018-12-31 17:36:02 -0800
commitb7badd1d7aa61087010803affa19bb83fb5a0af1 (patch)
tree3b2a913060d952d93bc5a712dca10733a17e3c99 /arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
parentd36377c6eb071e3d0751e9e0e3c19198c58d9a5d (diff)
parent3f47de2c6b6068cf7d5221f8f307969e7e4f1fc5 (diff)
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Device-tree updates from Olof Johansson: "As usual, this is where the bulk of our changes end up landing each merge window. The individual updates are too many to enumerate, many many platforms have seen additions of device descriptions such that they are functionally more complete (in fact, this is often the bulk of updates we see). Instead I've mostly focused on highlighting the new platforms below as they are introduced. Sometimes the introduction is of mostly a fragment, that later gets filled in on later releases, and in some cases it's near-complete platform support. The latter is more common for derivative platforms that already has similar support in-tree. Two SoCs are slight outliers from the usual range of additions. Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping in the Lychee Pi Nano platform. At the other end is NXP Layerscape LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O aimed at infrastructure/networking. TI updates stick out in the diff stats too, in particular because they have moved the description of their L4 on-chip interconnect to devicetree, which opens up for removal of even more of their platform-specific 'hwmod' description tables over the next few releases. SoCs: - Qualcomm QCS404 (4x Cortex-A53) - Allwinner T3 (rebranded R40) and f1c100s (armv5) - NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4) - NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72) New platforms: - Rockchip: Gru Scarlet (RK3188 Tablet) - Amlogic: Phicomm N1 (S905D), Libretech S805-AC - Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708) - Qualcomm: QCS404 base platform and EVB - Qualcomm: Remove of Arrow SD600 - PXA: First PXA3xx DT board: Raumfeld - Aspeed: Facebook Backpack-CMM BMC - Renesas iWave G20D-Q7 (RZ/G1N) - Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s) - Allwinner Emlid Neutis N5, Mapleboard MP130 - Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE) - i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva - VF610: Liebherr's BK4 device, ZII SCU4 AIB board - i.MX7D PICO Hobbit baseboard - i.MX7ULP EVK board - NXP LX2160AQDS and LX2160ARDB boards Other: - Coresight binding updates across the board - CPU cooling maps updates across the board" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (648 commits) ARM: dts: suniv: Fix improper bindings include patch ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node ARM: dts: suniv: Fix improper bindings include patch arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller arm64: dts: Remove unused properties from FSL QSPI driver nodes ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes ARM: dts: Remove unused properties from FSL QSPI driver nodes arm64: dts: ti: k3-am654: Enable main domain McSPI0 arm64: dts: ti: k3-am654: Add McSPI DT nodes arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM arm64: dts: ti: k3-am65-main: Add ECAP PWM node arm64: dts: ti: k3-am654-base-board: Add I2C nodes arm64: dts: ti: am654-base-board: Add pinmux for main uart0 arm64: dts: ti: k3-am65: Add pinctrl regions dt-bindings: pinctrl: k3: Introduce pinmux definitions ARM: dts: exynos: Specify I2S assigned clocks in proper node ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2 ...
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi37
1 files changed, 32 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 3fed504b5381..70057b4e46e8 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -171,8 +171,10 @@
map0 {
trip = <&cpu_alert>;
cooling-device =
- <&cpu0 THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>;
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
@@ -661,7 +663,7 @@
};
pcie@3400000 {
- compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
@@ -683,10 +685,11 @@
<0000 0 0 2 &gic 0 111 0x4>,
<0000 0 0 3 &gic 0 112 0x4>,
<0000 0 0 4 &gic 0 113 0x4>;
+ status = "disabled";
};
pcie@3500000 {
- compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
@@ -708,10 +711,11 @@
<0000 0 0 2 &gic 0 121 0x4>,
<0000 0 0 3 &gic 0 122 0x4>,
<0000 0 0 4 &gic 0 123 0x4>;
+ status = "disabled";
};
pcie@3600000 {
- compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
+ compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
@@ -733,7 +737,30 @@
<0000 0 0 2 &gic 0 155 0x4>,
<0000 0 0 3 &gic 0 156 0x4>,
<0000 0 0 4 &gic 0 157 0x4>;
+ status = "disabled";
};
+
+ qdma: dma-controller@8380000 {
+ compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
+ reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+ <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue0",
+ "qdma-queue1", "qdma-queue2", "qdma-queue3";
+ dma-channels = <8>;
+ block-number = <1>;
+ block-offset = <0x10000>;
+ fsl,dma-queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ big-endian;
+ };
+
};
firmware {