diff options
author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-09-27 18:59:42 +0200 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2020-10-30 08:24:24 +0800 |
commit | 00203737867c8b63ca247e71ada1b32bb0b0dd3d (patch) | |
tree | c859a9f3dffe7365893bf14c5f85b1223f61862d /arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi | |
parent | ccee91b568e35e87d61ae72b51fd07ddf5a3d999 (diff) |
arm64: dts: imx8mm-var-som: fix missing PMIC's interrupt line pull-up
The PMIC's interrupt is level low and should be pulled up. The PMIC's
device node had pinctrl-0 property but it lacked pinctrl-names which
is required to apply the pin configuration. The actual problem in DTS
was pointed out by Felix Radensky from Variscite.
Reported-by: Felix Radensky <felix.r@variscite.com>
Fixes: 5f67317bd967 ("arm64: dts: imx8mm: correct interrupt flags")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi index 4107fe914d08..49082529764f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -135,13 +135,10 @@ pmic@4b { compatible = "rohm,bd71847"; reg = <0x4b>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio2>; - /* - * The interrupt is not correct. It should be level low, - * however with internal pull up this causes IRQ storm. - */ - interrupts = <8 IRQ_TYPE_EDGE_RISING>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; #clock-cells = <0>; @@ -398,7 +395,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x41 + MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 >; }; |