summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/imx8mm.dtsi
diff options
context:
space:
mode:
authorAnson Huang <Anson.Huang@nxp.com>2019-06-06 10:39:36 +0800
committerShawn Guo <shawnguo@kernel.org>2019-06-06 10:47:06 +0800
commitb4e3e54a46a6dd973909eb4957f8e9e484e5a229 (patch)
tree578c6973c8bcf082d52fdbf9938318f7deebd110 /arch/arm64/boot/dts/freescale/imx8mm.dtsi
parenta656622a22d66548af9a7b6d9a284679553fccff (diff)
arm64: dts: imx8mm: Move gic node into soc node
GIC is inside of SoC from architecture perspective, it should be located inside of soc node in DT. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm.dtsi18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 2128644801b3..dcae59d6ea68 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -169,15 +169,6 @@
clock-output-names = "clk_ext4";
};
- gic: interrupt-controller@38800000 {
- compatible = "arm,gic-v3";
- reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
- <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- };
-
psci {
compatible = "arm,psci-1.0";
method = "smc";
@@ -810,5 +801,14 @@
dma-names = "rx-tx";
status = "disabled";
};
+
+ gic: interrupt-controller@38800000 {
+ compatible = "arm,gic-v3";
+ reg = <0x38800000 0x10000>, /* GIC Dist */
+ <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
};