diff options
author | Lucas Stach <l.stach@pengutronix.de> | 2022-12-16 20:59:32 +0100 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2023-01-01 10:43:20 +0800 |
commit | fae3bcc34a993dc204611c2f7211213e920e2fdc (patch) | |
tree | 5ae3d5ac2093dee849965f0ee29c4ef9cc2d0d32 /arch/arm64/boot/dts/freescale/imx8mp-evk.dts | |
parent | 0deefb5bd1382aae0aed7c8b266d5088a5308a26 (diff) |
arm64: dts: imx8mp: move PCIe controller clock config to SoC dtsi
The only difference in PCIe clock configuration between boards is how
the PCIe reference clock is generated. The refclock configuration is
fully contained in the PCIe PHY node, so the PCIe controller clocks
can be set up in the SoC dtsi, as there is no reason for any board to
use a different configuration.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-evk.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index d4c7ca16abd0..c4ed505b8707 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -400,13 +400,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie0>; reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>; - clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, - <&clk IMX8MP_CLK_PCIE_ROOT>, - <&clk IMX8MP_CLK_HSIO_AXI>; - clock-names = "pcie", "pcie_aux", "pcie_bus"; - assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>; - assigned-clock-rates = <10000000>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>; vpcie-supply = <®_pcie0>; status = "okay"; }; |