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authorDinh Nguyen <dinguyen@kernel.org>2019-08-09 12:28:06 -0700
committerDinh Nguyen <dinguyen@kernel.org>2020-07-18 20:11:57 -0500
commit48f36de93a504e63e3b0dadd5b9ea666663e5662 (patch)
treec9fcdf5da8cb6165914fe8e74d9e439dee7e6791 /arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
parentb3a9e3b9622ae10064826dccb4f7a52bd88c7407 (diff)
arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex
Add clock dts entries to the Intel SoCFPGA Agilex platform. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts')
-rw-r--r--arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
index 51d948323bfd..ac6e51b403d8 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
@@ -41,6 +41,14 @@
/* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>;
};
+
+ soc {
+ clocks {
+ osc1 {
+ clock-frequency = <25000000>;
+ };
+ };
+ };
};
&gpio1 {