diff options
| author | Nícolas F. R. A. Prado <nfraprado@collabora.com> | 2022-11-02 15:06:08 -0400 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-01-09 17:16:49 +0100 |
| commit | ea65d256e14d27c1da6dbd1393fc3ba17c29f929 (patch) | |
| tree | 1dd2ed507f5a111a858205fcdebf023d189b563c /arch/arm64/boot/dts/mediatek | |
| parent | f9f00b1f6b9bd72b8b3987338d0b4de6358e3daa (diff) | |
arm64: dts: mediatek: asurada: Add display backlight
Add the display backlight for the Asurada platform. It relies on the
display PWM controller, so also enable and configure this component.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20221102190611.283546-3-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index fafca7428539..666021ca4d4f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -23,6 +23,16 @@ reg = <0 0x40000000 0 0x80000000>; }; + backlight_lcd0: backlight-lcd0 { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 500000>; + power-supply = <&ppvar_sys>; + enable-gpios = <&pio 152 0>; + brightness-levels = <0 1023>; + num-interpolated-steps = <1023>; + default-brightness-level = <576>; + }; + pp1000_dpbrdg: regulator-1v0-dpbrdg { compatible = "regulator-fixed"; regulator-name = "pp1000_dpbrdg"; @@ -838,6 +848,17 @@ }; }; + pwm0_pins: pwm0-default-pins { + pins-pwm { + pinmux = <PINMUX_GPIO40__FUNC_DISP_PWM>; + }; + + pins-inhibit { + pinmux = <PINMUX_GPIO152__FUNC_GPIO152>; + output-high; + }; + }; + scp_pins: scp-pins { pins-vreq-vao { pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>; @@ -899,6 +920,13 @@ interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>; }; +&pwm0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; +}; + &scp { status = "okay"; |