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authorStephan Gerhold <stephan@gerhold.net>2023-05-29 14:46:59 +0200
committerBjorn Andersson <andersson@kernel.org>2023-05-29 14:37:01 -0700
commitc310ca82e229124e7b373125d82ea8fdbf2f9f81 (patch)
treef3ce31a6a84caee9ed9c8447c27e9d59f27639f3 /arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
parent41e22c2ff38eaea777f1158071539e659aa7980d (diff)
arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN
For some reason the BLSP UART controllers have a label with a number behind blsp (&blsp1_uartN) while I2C/SPI are named without (&blsp_i2cN). This is confusing, especially for proper node ordering in board DTs. Right now all board DTs are ordered as if the number behind blsp does not exist (&blsp_i2cN comes before &blsp1_uartN). Strictly speaking correct ordering would be the other way around ('1' comes before '_'). End this confusion by giving the UART controllers consistent labels. There is just one BLSP on MSM8916/39 so the number is redundant. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-2-bec0f5fb46fb@gerhold.net
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916-pins.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916-pins.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 1e07f70768f4..3539d9029bed 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -5,7 +5,7 @@
&tlmm {
- blsp1_uart1_default: blsp1-uart1-default-state {
+ blsp_uart1_default: blsp-uart1-default-state {
/* TX, RX, CTS_N, RTS_N */
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "blsp_uart1";
@@ -14,7 +14,7 @@
bias-disable;
};
- blsp1_uart1_sleep: blsp1-uart1-sleep-state {
+ blsp_uart1_sleep: blsp-uart1-sleep-state {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "gpio";
@@ -22,7 +22,7 @@
bias-pull-down;
};
- blsp1_uart2_default: blsp1-uart2-default-state {
+ blsp_uart2_default: blsp-uart2-default-state {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
@@ -30,7 +30,7 @@
bias-disable;
};
- blsp1_uart2_sleep: blsp1-uart2-sleep-state {
+ blsp_uart2_sleep: blsp-uart2-sleep-state {
pins = "gpio4", "gpio5";
function = "gpio";