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authorKrishna Manikandan <mkrishn@codeaurora.org>2020-07-16 17:05:32 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2020-09-10 21:42:59 +0000
commit81921a37145e0c6581ab913129c3c2a604704eee (patch)
tree8638bd0e914b8937506ac8a446490c961ee71c7a /arch/arm64/boot/dts/qcom/sc7180.dtsi
parentf05f2c21187a58753e3754c27cf48f72610b37db (diff)
arm64: dts: qcom: sc7180: add interconnect bindings for display
This change adds the interconnect bindings to the MDSS node. This will establish Display to DDR path for bus bandwidth voting. Reviewed-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org> Link: https://lore.kernel.org/r/1594899334-19772-1-git-send-email-kalyan_t@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7180.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7180.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 41b20b1cd8a3..90debb4e4c11 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2766,6 +2766,9 @@
interrupt-controller;
#interrupt-cells = <1>;
+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
+ interconnect-names = "mdp0-mem";
+
iommus = <&apps_smmu 0x800 0x2>;
#address-cells = <2>;