summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/qcom/sc7180.dtsi
diff options
context:
space:
mode:
authorKrishna Manikandan <mkrishn@codeaurora.org>2020-03-20 18:41:04 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2020-04-13 22:05:02 -0700
commiteccdac07ae300bbe31ab4230a5ac522c1044d0e1 (patch)
treeb8fbb8bf82de993395eacc87028f84b3c77902b2 /arch/arm64/boot/dts/qcom/sc7180.dtsi
parenta0fa17f1ff74df618021704af98683a09f1fa837 (diff)
arm64: dts: qcom: sc7180: modify assigned clocks for sc7180 target
Add DISP_CC_MDSS_ROT_CLK and DISP_CC_MDSS_AHB_CLK in the assigned clocks list as these are display specific clocks and needs to be initialized from the client side. Adding the default rate of 19.2 mhz for these clocks for sc7180 target. Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org> Link: https://lore.kernel.org/r/1584709864-5587-1-git-send-email-mkrishn@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7180.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7180.dtsi6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 86e868af74d6..be5cb4a71675 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1545,8 +1545,12 @@
clock-names = "iface", "rot", "lut", "core",
"vsync";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
+ <&dispcc DISP_CC_MDSS_ROT_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>;
assigned-clock-rates = <300000000>,
+ <19200000>,
+ <19200000>,
<19200000>;
interrupt-parent = <&mdss>;