Merge tag 'qcom-arm64-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

More Qualcomm ARM64 DT updates for 6.3

The new Qualcomm QDU1000 and QRU1000 platforms, and the IDP device on
these are introduced. New support for a couple of USB modem sticks from
THWC are introduced, so is support for Xiaomi Mi Pad 5 Pro and the Pro
SKU of the Herobrine device.

The Core Bus Fabric (CBF) is introduced on MSM8996. Interconnect paths
for UFS are also described.

A few fixes related to the power-grid of herobrine, on SC7280, are
introduced.

QFPROM is introduced on IPQ8074 and Interconnect providers are added for
SDM670.

On SDM845 the duplicated wcd9340 audio coded description is moved from
devices to a common file, audio devices are added to the OnePlus 6 and
6T.

On SM6115 debug UART, SMP2P, watchdog nodes are introduced, and the
platform is switched to use #address/size-cells of 2, in line with most
other platforms.

Camera control interface and clock controllers are added for SM6350, and
the CCI interface is enabled on the Fairphone FP4.

On SM8350 the interconnect reference of SDHCI controller is corrected,
DSI1 PHY clocks are properly described as sources for the Display clock
controller and DSI1 is wired up to the display controller.

The firmware paths are corrected for the Sony Xperia Nagara platform.

The GPR bus, audio servic3es and LPASS pinctrl nodes are added for the
SM8550 platform. Additionally a few small typos/errors are corrected.

gpio-ranges are corrected across MSM8953, SM6115 and SC8280XP and a
range of DT validation issues are corrected.

* tag 'qcom-arm64-for-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (81 commits)
  arm64: dts: qcom: sc7280: Power herobrine's 3.3 eDP/TS rail more properly
  arm64: dts: qcom: pmk8550: fix PON compatible
  arm64: dts: qcom: sm8550: fix DSI controller compatible
  arm64: dts: qcom: sc7280: Hook up the touchscreen IO rail on evoker
  arm64: dts: qcom: sc7280: Hook up the touchscreen IO rail on villager
  arm64: dts: qcom: sc7280: Add 3ms ramp to herobrine's pp3300_left_in_mlb
  arm64: dts: qcom: sc7280: On QCard, regulator L3C should be 1.8V
  arm64: dts: qcom: sc8280xp: correct LPASS GPIO gpio-ranges
  arm64: dts: qcom: msm8992-lg-bullhead: Enable regulators
  arm64: dts: qcom: sm6115: correct TLMM gpio-ranges
  arm64: dts: qcom: msm8953: correct TLMM gpio-ranges
  arm64: dts: qcom: msm8992-lg-bullhead: Correct memory overlaps with the SMEM and MPSS memory regions
  arm64: dts: qcom: sm8350-hdk: correct LT9611 pin function
  arm64: dts: qcom: sm8350-hdk: align pin config node names with bindings
  arm64: dts: qcom: sm6350: Use specific qmpphy compatible
  arm64: dts: qcom: sm6115: Add smp2p nodes
  arm64: dts: qcom: sm7225-fairphone-fp4: Enable CCI busses
  arm64: dts: qcom: sm6350: Add CCI nodes
  arm64: dts: qcom: sm6350: Add camera clock controller
  dt-bindings: clock: add QCOM SM6350 camera clock bindings
  ...

Link: https://lore.kernel.org/r/20230210192908.2039976-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 87 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi b/arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi
new file mode 100644
index 000000000000..0d7c37f39176
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * SDM845 SoC device tree source
+ *
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ */
+
+&slim {
+	status = "okay";
+
+	slim@1 {
+		reg = <1>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		wcd9340_ifd: ifd@0,0 {
+			compatible = "slim217,250";
+			reg = <0 0>;
+		};
+
+		wcd9340: codec@1,0 {
+			compatible = "slim217,250";
+			reg = <1 0>;
+			slim-ifc-dev = <&wcd9340_ifd>;
+
+			#sound-dai-cells = <1>;
+
+			interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			clock-names = "extclk";
+			clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
+
+			#clock-cells = <0>;
+			clock-frequency = <9600000>;
+			clock-output-names = "mclk";
+
+			pinctrl-0 = <&wcd_intr_default>;
+			pinctrl-names = "default";
+
+			qcom,micbias1-microvolt = <1800000>;
+			qcom,micbias2-microvolt = <1800000>;
+			qcom,micbias3-microvolt = <1800000>;
+			qcom,micbias4-microvolt = <1800000>;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			wcdgpio: gpio-controller@42 {
+				compatible = "qcom,wcd9340-gpio";
+				gpio-controller;
+				#gpio-cells = <2>;
+				reg = <0x42 0x2>;
+			};
+
+			swm: swm@c85 {
+				compatible = "qcom,soundwire-v1.3.0";
+				reg = <0xc85 0x40>;
+				interrupts-extended = <&wcd9340 20>;
+
+				qcom,dout-ports = <6>;
+				qcom,din-ports = <2>;
+				qcom,ports-sinterval-low = /bits/ 8  <0x07 0x1f 0x3f 0x7 0x1f 0x3f 0x0f 0x0f>;
+				qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x6 0x12 0x0d 0x07 0x0a>;
+				qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1f 0x00 0x00 0x1f 0x00 0x00>;
+
+				#sound-dai-cells = <1>;
+				clocks = <&wcd9340>;
+				clock-names = "iface";
+				#address-cells = <2>;
+				#size-cells = <0>;
+			};
+		};
+	};
+};
+
+&tlmm {
+	wcd_intr_default: wcd-intr-default-state {
+		pins = "gpio54";
+		function = "gpio";
+
+		input-enable;
+		bias-pull-down;
+		drive-strength = <2>;
+	};
+};