diff options
| author | Bjorn Andersson <andersson@kernel.org> | 2023-01-18 16:59:11 -0600 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-01-18 16:59:11 -0600 |
| commit | 1ccad21aa996a88348c8019b17cf723504b41c7f (patch) | |
| tree | 8c4712e17a1306fb2e6c0064e1050cd34297b62a /arch/arm64/boot/dts/qcom/sm8350.dtsi | |
| parent | 4f287e31ff5f464526651ee3cb3fd3e96b2e5746 (diff) | |
| parent | 69876bc6fd4de3ad2dc7826fe269e91fa2c1807f (diff) | |
Merge tag 'qcom-arm64-fixes-for-6.2' into arm64-for-6.3
Qualcomm ARM64 DTS fixes for 6.2
The cluster idle issue was resolved on SM8250, so the change disabling
the cluster state is being reverted.
Issues where identified with the QMP PHY binding, that would prevent
enablement of Displayport and it was decided not to support the old
binding for the recently introduced SC8280XP, which broke USB. This
adjusts the USB PHY nodes to the new binding. The reset signal for the
first QMP PHY is corrected as well.
The reserved memory map is updated on Xiaomi Mi 4C and Huawei Nexus 6P,
to avoid instabilities caused by use of protected memory regions.
The compatible for the MSM8992 TCSR mutex is corrected as well.
Lastly SDHCI interconnects on SM8350 are corrected to match the
providers #interconnect-cells.
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm8350.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 76515eb2f7ec..ee0b050c00a0 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2549,8 +2549,8 @@ <&rpmhcc RPMH_CXO_CLK>; clock-names = "iface", "core", "xo"; resets = <&gcc GCC_SDCC2_BCR>; - interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>, - <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>; + interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>, + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>; interconnect-names = "sdhc-ddr","cpu-sdhc"; iommus = <&apps_smmu 0x4a0 0x0>; power-domains = <&rpmhpd SM8350_CX>; |