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authorWolfram Sang <wsa+renesas@sang-engineering.com>2021-11-10 20:16:01 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-11-19 10:51:47 +0100
commiteca6ab6e362e3ae22b6c2769c4b6911bd0fb8ab1 (patch)
treea701c2aa92491d9410e268c365697616e9013b76 /arch/arm64/boot/dts/renesas/r8a77960.dtsi
parent52e844ee9a6f460e6160736a43ef13317a91ca74 (diff)
arm64: dts: reneas: rcar-gen3: Add SDnH clocks
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20211110191610.5664-13-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-14-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-15-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-16-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-17-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-18-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-19-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-22-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77960.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77960.dtsi12
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index 2bd8169735d3..b1a6cf76633d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -2468,7 +2468,8 @@
"renesas,rcar-gen3-sdhi";
reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
+ clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>;
+ clock-names = "core", "clkh";
max-frequency = <200000000>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 314>;
@@ -2481,7 +2482,8 @@
"renesas,rcar-gen3-sdhi";
reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 313>;
+ clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>;
+ clock-names = "core", "clkh";
max-frequency = <200000000>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 313>;
@@ -2494,7 +2496,8 @@
"renesas,rcar-gen3-sdhi";
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
+ clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>;
+ clock-names = "core", "clkh";
max-frequency = <200000000>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 312>;
@@ -2507,7 +2510,8 @@
"renesas,rcar-gen3-sdhi";
reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
+ clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>;
+ clock-names = "core", "clkh";
max-frequency = <200000000>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 311>;