diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2022-04-25 18:05:28 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-29 09:42:17 +0200 |
| commit | 820e976909c2b286d1ef259ea524979540475ba6 (patch) | |
| tree | e29facaeefa4f06aeca2aba587e7318522f7c4d9 /arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi | |
| parent | b0fa698b834f0f8b4a0c9c5c086d88787f1124a0 (diff) | |
arm64: dts: renesas: rzg2ul-smarc: Enable CANFD
Enable CANFD on RZ/G2UL SMARC platform.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-12-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi index 94106095c66a..17527184ff2a 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi @@ -12,6 +12,34 @@ pinctrl-0 = <&sound_clk_pins>; pinctrl-names = "default"; + can0_pins: can0 { + pinmux = <RZG2L_PORT_PINMUX(1, 1, 3)>, /* TX */ + <RZG2L_PORT_PINMUX(1, 2, 3)>; /* RX */ + }; + +#if (SW_ET0_EN_N) + can0-stb-hog { + gpio-hog; + gpios = <RZG2L_GPIO(2, 2) GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can0_stb"; + }; +#endif + + can1_pins: can1 { + pinmux = <RZG2L_PORT_PINMUX(2, 0, 3)>, /* TX */ + <RZG2L_PORT_PINMUX(2, 1, 3)>; /* RX */ + }; + +#if (SW_ET0_EN_N) + can1-stb-hog { + gpio-hog; + gpios = <RZG2L_GPIO(2, 3) GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can1_stb"; + }; +#endif + i2c0_pins: i2c0 { pins = "RIIC0_SDA", "RIIC0_SCL"; input-enable; |