diff options
| author | Yoshihiro Kaneko <ykaneko0929@gmail.com> | 2019-06-18 05:18:16 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-07-29 15:36:00 +0200 |
| commit | 56d651e890f3befd616b6962a862f5ffa1a514fa (patch) | |
| tree | 394fef3689b10c32f84688511cc50f7de7a10feb /arch/arm64/boot/dts/renesas | |
| parent | 3ed1db9071fde0ba9c4ce22a9b404887c0dbe909 (diff) | |
arm64: dts: renesas: r8a77995: Fix register range of display node
Since the R8A77995 SoC uses DU{0,1}, the range from the base address to
the 0x4000 address is used.
This patch fixed it.
Fixes: 18f1a773e3f9e6d1 ("arm64: dts: renesas: r8a77995: add DU support")
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index ca6aeabd6d04..bcd54421796d 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -995,7 +995,7 @@ du: display@feb00000 { compatible = "renesas,du-r8a77995"; - reg = <0 0xfeb00000 0 0x80000>; + reg = <0 0xfeb00000 0 0x40000>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 724>, |