diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2022-05-05 19:43:53 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-06-06 10:29:04 +0200 |
| commit | 9a71e89d0f9ebbca4f7b234a7f90f96224d04ec8 (patch) | |
| tree | f7ff175bdc6e92d1a2b3e2a8bb5b1cad9b3155f1 /arch/arm64/boot/dts/renesas | |
| parent | f2906aa863381afb0015a9eb7fefad885d4e5a56 (diff) | |
arm64: dts: renesas: r9a07g043: Add ADC node
Add ADC node to R9A07G043 (RZ/G2UL) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220505184353.512133-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index b31fb713ae4d..40201a16d653 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -483,8 +483,27 @@ }; adc: adc@10059000 { + compatible = "renesas,r9a07g043-adc", "renesas,rzg2l-adc"; reg = <0 0x10059000 0 0x400>; - /* place holder */ + interrupts = <GIC_SPI 347 IRQ_TYPE_EDGE_RISING>; + clocks = <&cpg CPG_MOD R9A07G043_ADC_ADCLK>, + <&cpg CPG_MOD R9A07G043_ADC_PCLK>; + clock-names = "adclk", "pclk"; + resets = <&cpg R9A07G043_ADC_PRESETN>, + <&cpg R9A07G043_ADC_ADRST_N>; + reset-names = "presetn", "adrst-n"; + power-domains = <&cpg>; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + channel@1 { + reg = <1>; + }; }; tsu: thermal@10059400 { |