Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "A couple of interesting new SoC platforms are now supported, these are
  the respective DTS sources:

   - Samsung Exynos5433 mobile phone platform, including an (almost)
     fully supported phone reference board.
   - Hisilicon Hip07 server platform and D05 board, the latest iteration
     of their product line, now with 64 Cortex-A72 cores across two
     sockets.
   - Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product
     line, used in Android tablets and ultra-cheap development boards
   - NXP LS1046A Communication processor, improving on the earlier
     LS1043A with faster CPU cores
   - Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810)
     mobile phone SoCs
   - Early support for the Nvidia Tegra Tegra186 SoC
   - Amlogic S905D is a minor variant of their existing Android consumer
     product line
   - Rockchip PX5 automotive platform, a close relative of their popular
     rk3368 Android tablet chips

  Aside from the respective evaluation platforms for the above chips,
  there are only a few consumer devices and boards added this time:

   - Huawei Nexus 6P (Angler) mobile phone
   - LG Nexus 5x (Bullhead) mobile phone
   - Nexbox A1 and A95X Android TV boxes
   - Pine64 development board based on Allwinner A64
   - Globalscale Marvell ESPRESSOBin community board based on Armada 3700
   - Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board

  For the existing platforms, we get bug fixes and new peripheral
  support for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom,
  Rockchip, Berlin, and ZTE"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (168 commits)
  arm64: dts: fix build errors from missing dependencies
  ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible
  ARM64: dts: meson-gxl: Add support for Nexbox A95X
  ARM64: dts: meson-gxm: Add support for the Nexbox A1
  ARM: dts: artpec: add pcie support
  arm64: dts: berlin4ct-dmp: add missing unit name to /memory node
  arm64: dts: berlin4ct-stb: add missing unit name to /memory node
  arm64: dts: berlin4ct: add missing unit name to /soc node
  arm64: dts: qcom: msm8916: Add ddr support to sdhc1
  arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
  ARM: dts: Add xo to sdhc clock node on qcom platforms
  ARM64: dts: Add support for Meson GXM
  dt-bindings: add rockchip RK1108 Evaluation board
  arm64: dts: NS2: Add PCI PHYs
  arm64: dts: NS2: enable sdio1
  arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
  arm64: tegra: Add NVIDIA P2771 board support
  arm64: tegra: Enable PSCI on P3310
  arm64: tegra: Add NVIDIA P3310 processor module support
  arm64: tegra: Add GPIO controllers on Tegra186
  ...

1 files changed, 9 insertions, 9 deletions

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index df231c4df5a5..a635adc47e74 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -231,7 +231,7 @@
 	sdmmc: dwmmc@ff0c0000 {
 		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff0c0000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -243,7 +243,7 @@
 	sdio0: dwmmc@ff0d0000 {
 		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff0d0000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
 			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -255,7 +255,7 @@
 	emmc: dwmmc@ff0f0000 {
 		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff0f0000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -315,16 +315,16 @@
 		status = "disabled";
 	};
 
-	i2c1: i2c@ff140000 {
+	i2c2: i2c@ff140000 {
 		compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
 		reg = <0x0 0xff140000 0x0 0x1000>;
 		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		clock-names = "i2c";
-		clocks = <&cru PCLK_I2C1>;
+		clocks = <&cru PCLK_I2C2>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&i2c1_xfer>;
+		pinctrl-0 = <&i2c2_xfer>;
 		status = "disabled";
 	};
 
@@ -553,16 +553,16 @@
 		status = "disabled";
 	};
 
-	i2c2: i2c@ff660000 {
+	i2c1: i2c@ff660000 {
 		compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
 		reg = <0x0 0xff660000 0x0 0x1000>;
 		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		clock-names = "i2c";
-		clocks = <&cru PCLK_I2C2>;
+		clocks = <&cru PCLK_I2C1>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&i2c2_xfer>;
+		pinctrl-0 = <&i2c1_xfer>;
 		status = "disabled";
 	};