summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
diff options
context:
space:
mode:
authorRoger Chen <roger.chen@rock-chips.com>2016-09-02 01:50:04 +0800
committerHeiko Stuebner <heiko@sntech.de>2016-09-07 20:14:59 +0200
commit0714bc77674a75886b02ba269495ddb56553659d (patch)
tree0cd74a0dd37f44bddfe3860f678e944000711b95 /arch/arm64/boot/dts/rockchip/rk3399-evb.dts
parenteb3a6a6a9e7e36e44503778cb2656ebf537820af (diff)
arm64: dts: rockchip: enable the gmac for rk3399 evb board
We add the required and optional properties for evb board. See the [0] to get the detail information. [0]: Documentation/devicetree/bindings/net/rockchip-dwmac.txt Signed-off-by: Roger Chen <roger.chen@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-evb.dts')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-evb.dts31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
index 0d7c8ab8d8e0..8e82497925fe 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
@@ -49,6 +49,13 @@
compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
"google,rk3399evb-rev2";
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
vdd_center: vdd-center {
compatible = "pwm-regulator";
pwms = <&pwm3 0 25000 0>;
@@ -94,12 +101,36 @@
regulator-always-on;
regulator-boot-on;
};
+
+ vcc_phy: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
};
&emmc_phy {
status = "okay";
};
+&gmac {
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_phy>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
+ status = "okay";
+};
+
&pwm0 {
status = "okay";
};