diff options
| author | Andrew Davis <afd@ti.com> | 2023-11-17 08:09:07 -0600 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2023-12-04 12:17:08 -0600 |
| commit | 3dc5bd24181af7eb90ad764c3b303f697ebf5e87 (patch) | |
| tree | c9fd9d1c7fb43add743c522949f92a207e7beb36 /arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | |
| parent | 1026355c21ebe9f7af3bb0a9422bc572c9f4ac91 (diff) | |
arm64: dts: ti: k3-j784s4: Add chipid node to wkup_conf bus
Like in other K3 SoCs the chipid register is inside the wakeup
configuration space. Move the chipid node under a new bus to
better represent this topology and match other similar SoCs.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20231117140910.8747-2-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index adb5ea6b9732..119f4e2cc0d1 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -38,10 +38,18 @@ }; }; - chipid@43000014 { + wkup_conf: bus@43000000 { bootph-all; - compatible = "ti,am654-chipid"; - reg = <0x00 0x43000014 0x00 0x4>; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x00 0x43000000 0x20000>; + + chipid: chipid@14 { + bootph-all; + compatible = "ti,am654-chipid"; + reg = <0x14 0x4>; + }; }; secure_proxy_sa3: mailbox@43600000 { |