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authorMark Brown <broonie@kernel.org>2023-01-16 16:04:45 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2023-01-20 12:23:06 +0000
commit95fcec713259d440626526ed96ff5d3bac6179ea (patch)
tree6bacccf7c516bd59f045725f0615036b20d00eb9 /arch/arm64/include/asm/fpsimd.h
parentd6138b4adc70729404efeb0133bc9f6e9ad78d03 (diff)
arm64/sme: Implement context switching for ZT0
When the system supports SME2 the ZT0 register must be context switched as part of the floating point state. This register is stored immediately after ZA in memory and is only accessible when PSTATE.ZA is set so we handle it in the same functions we use to save and restore ZA. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-10-f2fa0aef982f@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/fpsimd.h')
-rw-r--r--arch/arm64/include/asm/fpsimd.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index 8df769c20677..0ce4465644fc 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -119,8 +119,8 @@ extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1);
extern unsigned int sve_get_vl(void);
extern void sve_set_vq(unsigned long vq_minus_1);
extern void sme_set_vq(unsigned long vq_minus_1);
-extern void za_save_state(void *state);
-extern void za_load_state(void const *state);
+extern void sme_save_state(void *state, int zt);
+extern void sme_load_state(void const *state, int zt);
struct arm64_cpu_capabilities;
extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused);