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author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2018-09-26 17:32:49 +0100 |
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committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-10-01 13:50:32 +0100 |
commit | 13ac4bbcc457d3925b4031cc70e3031fd8b9c3b7 (patch) | |
tree | 0dae8da91a6f4a1e128b621b9d69e9702da7fb5d /arch/arm64/include/asm/stage2_pgtable.h | |
parent | 7e8130456e067f49693fdcc25b5ba242a9c5568b (diff) |
kvm: arm64: Switch to per VM IPA limit
Now that we can manage the stage2 page table per VM, switch the
configuration details to per VM instance. The VTCR is updated
with the values specific to the VM based on the configuration.
We store the IPA size and the number of stage2 page table levels
for the guest already in VTCR. Decode it back from the vtcr
field wherever we need it.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <cdall@kernel.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/stage2_pgtable.h')
-rw-r--r-- | arch/arm64/include/asm/stage2_pgtable.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/stage2_pgtable.h b/arch/arm64/include/asm/stage2_pgtable.h index 36a0a1165003..c62fe118a898 100644 --- a/arch/arm64/include/asm/stage2_pgtable.h +++ b/arch/arm64/include/asm/stage2_pgtable.h @@ -43,7 +43,7 @@ */ #define stage2_pgtable_levels(ipa) ARM64_HW_PGTABLE_LEVELS((ipa) - 4) #define STAGE2_PGTABLE_LEVELS stage2_pgtable_levels(KVM_PHYS_SHIFT) -#define kvm_stage2_levels(kvm) stage2_pgtable_levels(kvm_phys_shift(kvm)) +#define kvm_stage2_levels(kvm) VTCR_EL2_LVLS(kvm->arch.vtcr) /* * With all the supported VA_BITs and 40bit guest IPA, the following condition |