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authorArd Biesheuvel <ardb@kernel.org>2023-01-11 11:22:35 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2023-01-24 11:51:08 +0000
commit3dcf60bbfd284e5ebfa40c56172222425d10abf0 (patch)
tree6af09231e1e0d8eed859f0d030fef188710a17c5 /arch/arm64/include
parent32b135a7fafebe7843abe5425159fa081ae56b7c (diff)
arm64: head: Clean the ID map and the HYP text to the PoC if needed
If we enter with the MMU and caches enabled, the bootloader may not have performed any cache maintenance to the PoC. So clean the ID mapped page to the PoC, to ensure that instruction and data accesses with the MMU off see the correct data. For similar reasons, clean all the HYP text to the PoC as well when entering at EL2 with the MMU and caches enabled. Note that this means primary_entry() itself needs to be moved into the ID map as well, as we will return from init_kernel_el() with the MMU and caches off. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20230111102236.1430401-6-ardb@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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