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authorThomas Gleixner <tglx@linutronix.de>2020-01-24 20:08:51 +0100
committerThomas Gleixner <tglx@linutronix.de>2020-01-24 20:08:51 +0100
commit43ee74487bd2842cb4d37b5c62f074fbed2366b9 (patch)
treea1af19c05682a520fac5691c6f2885f8d28394ca /arch/arm64
parent11ea68f553e244851d15793a7fa33a97c46d8271 (diff)
parentf4a81f5a853e0b7c38bfad3afd6d0365d654e777 (diff)
Merge tag 'irqchip-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier: - Conversion of the SiFive PLIC to hierarchical domains - New SiFive GPIO irqchip driver - New Aspeed SCI irqchip driver - New NXP INTMUX irqchip driver - Additional support for the Meson A1 GPIO irqchip - First part of the GICv4.1 support - Assorted fixes
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/include/asm/arch_gicv3.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index 89e4c8b79349..4750fc8030c3 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -141,6 +141,7 @@ static inline u32 gic_read_rpr(void)
#define gicr_read_pendbaser(c) readq_relaxed(c)
#define gits_write_vpropbaser(v, c) writeq_relaxed(v, c)
+#define gits_read_vpropbaser(c) readq_relaxed(c)
#define gits_write_vpendbaser(v, c) writeq_relaxed(v, c)
#define gits_read_vpendbaser(c) readq_relaxed(c)