summaryrefslogtreecommitdiff
path: root/arch/arm64
diff options
context:
space:
mode:
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2021-12-15 02:14:48 +0300
committerBjorn Andersson <bjorn.andersson@linaro.org>2022-01-31 18:18:04 -0600
commitd60507200485bc778bf6a5556271d784ab09d913 (patch)
tree8018695196e5f84bc13163b38e0e166e1552c612 /arch/arm64
parentff15ae73eeee62d8eb7554ecc21f2908f32f33a9 (diff)
arm64: dts: qcom: sm8250: fix PCIe bindings to follow schema
Replace (unused) enable-gpio binding with schema-defined wake-gpios. The GPIO line is still unused, but at least we'd follow the defined schema. While we are at it, change perst-gpio property to follow the preferred naming schema (perst-gpios). Fixes: 13e948a36db7 ("arm64: dts: qcom: sm8250: Commonize PCIe pins") Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211214231448.2044987-1-dmitry.baryshkov@linaro.org
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/qcom/sm8250.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 93570a61c2af..db57c115d262 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1740,8 +1740,8 @@
phys = <&pcie0_lane>;
phy-names = "pciephy";
- perst-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>;
- enable-gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>;
+ perst-gpios = <&tlmm 79 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie0_default_state>;
@@ -1844,8 +1844,8 @@
phys = <&pcie1_lane>;
phy-names = "pciephy";
- perst-gpio = <&tlmm 82 GPIO_ACTIVE_LOW>;
- enable-gpio = <&tlmm 84 GPIO_ACTIVE_HIGH>;
+ perst-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 84 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie1_default_state>;
@@ -1950,8 +1950,8 @@
phys = <&pcie2_lane>;
phy-names = "pciephy";
- perst-gpio = <&tlmm 85 GPIO_ACTIVE_LOW>;
- enable-gpio = <&tlmm 87 GPIO_ACTIVE_HIGH>;
+ perst-gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_default_state>;