diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-20 15:28:57 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-20 15:28:57 -0800 |
| commit | ff0c7e18629b8bd64681313a88ce55e182c9fee6 (patch) | |
| tree | 70efa650f6458514e1d7e5e3f72cc8f87fc5cf2c /arch/arm | |
| parent | 5b0ed5964928b0aaf0d644c17c886c7f5ea4bb3f (diff) | |
| parent | a1f925bc4fa899b3c0f2dcbc432d572c36e74e71 (diff) | |
Merge tag 'arm-boardfile-remove-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC boardfile updates from Arnd Bergmann
"Unused boardfile removal for 6.3
This is a follow-up to the deprecation of most of the old-style board
files that was merged in linux-6.0, removing them for good.
This branch is almost exclusively dead code removal based on those
annotations. Some device driver removals went through separate
subsystem trees, but the majority is in the same branch, in order to
better handle dependencies between the patches and avoid breaking
bisection.
Unfortunately that leads to merge conflicts against other changes in
the subsystem trees, but they should all be trivial to resolve by
removing the files.
See commit 7d0d3fa7339e ("Merge tag 'arm-boardfiles-6.0' of
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc") for the
description of which machines were marked unused and are now removed.
The only removals that got postponed are Terastation WXL (mv78xx0) and
Jornada720 (StrongARM1100), which turned out to still have potential
users"
* tag 'arm-boardfile-remove-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (91 commits)
mmc: omap: drop TPS65010 dependency
ARM: pxa: restore mfp-pxa320.h
usb: ohci-omap: avoid unused-variable warning
ARM: debug: remove references in DEBUG_UART_8250_SHIFT to removed configs
ARM: s3c: remove obsolete s3c-cpu-freq header
MAINTAINERS: adjust SAMSUNG SOC CLOCK DRIVERS after s3c24xx support removal
MAINTAINERS: update file entries after arm multi-platform rework and mach-pxa removal
ARM: remove CONFIG_UNUSED_BOARD_FILES
mfd: remove htc-pasic3 driver
w1: remove ds1wm driver
usb: remove ohci-tmio driver
fbdev: remove w100fb driver
fbdev: remove tmiofb driver
mmc: remove tmio_mmc driver
mfd: remove ucb1400 support
mfd: remove toshiba tmio drivers
rtc: remove v3020 driver
power: remove pda_power supply driver
ASoC: pxa: remove unused board support
pcmcia: remove unused pxa/sa1100 drivers
...
Diffstat (limited to 'arch/arm')
519 files changed, 140 insertions, 93361 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 43c7773b89ae..9f85cc34be7d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -282,8 +282,7 @@ config PHYS_OFFSET default DRAM_BASE if !MMU default 0x00000000 if ARCH_FOOTBRIDGE default 0x10000000 if ARCH_OMAP1 || ARCH_RPC - default 0x30000000 if ARCH_S3C24XX - default 0xa0000000 if ARCH_IOP32X || ARCH_PXA + default 0xa0000000 if ARCH_PXA default 0xc0000000 if ARCH_EP93XX || ARCH_SA1100 default 0 help @@ -438,8 +437,6 @@ source "arch/arm/mach-berlin/Kconfig" source "arch/arm/mach-clps711x/Kconfig" -source "arch/arm/mach-cns3xxx/Kconfig" - source "arch/arm/mach-davinci/Kconfig" source "arch/arm/mach-digicolor/Kconfig" @@ -462,8 +459,6 @@ source "arch/arm/mach-hpe/Kconfig" source "arch/arm/mach-imx/Kconfig" -source "arch/arm/mach-iop32x/Kconfig" - source "arch/arm/mach-ixp4xx/Kconfig" source "arch/arm/mach-keystone/Kconfig" @@ -931,12 +926,6 @@ config ISA config ISA_DMA_API bool -config PCI_NANOENGINE - bool "BSE nanoEngine PCI support" - depends on SA1100_NANOENGINE - help - Enable PCI on the BSE nanoEngine board. - config ARM_ERRATA_814220 bool "ARM errata: Cache maintenance by set/way operations can execute out of order" depends on CPU_V7 @@ -1465,19 +1454,6 @@ config ATAGS the ARM_ATAG_DTB_COMPAT option) then you may unselect this option to remove ATAGS support from your kernel binary. -config UNUSED_BOARD_FILES - bool "Board support for machines without known users" - depends on ATAGS - help - Most ATAGS based board files are completely unused and are - scheduled for removal in early 2023, and left out of kernels - by default now. If you are using a board file that is marked - as unused, turn on this option to build support into the kernel. - - To keep support for your individual board from being removed, - send a reply to the email discussion at - https://lore.kernel.org/all/CAK8P3a0Z9vGEQbVRBo84bSyPFM-LF+hs5w8ZA51g2Z+NsdtDQA@mail.gmail.com/ - config DEPRECATED_PARAM_STRUCT bool "Provide old way to pass kernel parameters" depends on ATAGS diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index c345775f035b..86f423143185 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -307,14 +307,6 @@ choice Say Y here if you want the debug print routines to direct their output to the second serial port on these devices. - config DEBUG_CNS3XXX - bool "Kernel Kernel low-level debugging on Cavium Networks CNS3xxx" - depends on ARCH_CNS3XXX - select DEBUG_UART_8250 - help - Say Y here if you want the debug print routines to direct - their output to the CNS3xxx UART0. - config DEBUG_DAVINCI_DA8XX_UART1 bool "Kernel low-level debugging on DaVinci DA8XX using UART1" depends on ARCH_DAVINCI_DA8XX @@ -331,14 +323,6 @@ choice Say Y here if you want the debug print routines to direct their output to UART2 serial port on DaVinci DA8XX devices. - config DEBUG_DAVINCI_DMx_UART0 - bool "Kernel low-level debugging on DaVinci DMx using UART0" - depends on ARCH_DAVINCI_DMx - select DEBUG_UART_8250 - help - Say Y here if you want the debug print routines to direct - their output to UART0 serial port on DaVinci DMx devices. - config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE @@ -768,30 +752,6 @@ choice depends on ARCH_OMAP2PLUS select DEBUG_UART_8250 - config DEBUG_OMAP7XXUART1 - bool "Kernel low-level debugging via OMAP730 UART1" - depends on ARCH_OMAP730 - select DEBUG_UART_8250 - help - Say Y here if you want kernel low-level debugging support - on OMAP730 based platforms on the UART1. - - config DEBUG_OMAP7XXUART2 - bool "Kernel low-level debugging via OMAP730 UART2" - depends on ARCH_OMAP730 - select DEBUG_UART_8250 - help - Say Y here if you want kernel low-level debugging support - on OMAP730 based platforms on the UART2. - - config DEBUG_OMAP7XXUART3 - bool "Kernel low-level debugging via OMAP730 UART3" - depends on ARCH_OMAP730 - select DEBUG_UART_8250 - help - Say Y here if you want kernel low-level debugging support - on OMAP730 based platforms on the UART3. - config DEBUG_TI81XXUART1 bool "Kernel low-level debugging messages via TI81XX UART1 (ti8148evm)" depends on ARCH_OMAP2PLUS @@ -1046,7 +1006,6 @@ choice config DEBUG_S3C_UART0 depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS - select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX select DEBUG_S5PV210_UART if ARCH_S5PV210 bool "Use Samsung S3C UART 0 for low-level debug" @@ -1058,7 +1017,6 @@ choice config DEBUG_S3C_UART1 depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS - select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX select DEBUG_S5PV210_UART if ARCH_S5PV210 bool "Use Samsung S3C UART 1 for low-level debug" @@ -1070,7 +1028,6 @@ choice config DEBUG_S3C_UART2 depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS - select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX select DEBUG_S5PV210_UART if ARCH_S5PV210 bool "Use Samsung S3C UART 2 for low-level debug" @@ -1090,33 +1047,6 @@ choice their output to UART 3. The port must have been initialised by the boot-loader before use. - config DEBUG_S3C2410_UART0 - depends on ARCH_S3C24XX - select DEBUG_S3C2410_UART - bool "Use S3C2410/S3C2412 UART 0 for low-level debug" - help - Say Y here if you want the debug print routines to direct - their output to UART 0. The port must have been initialised - by the boot-loader before use. - - config DEBUG_S3C2410_UART1 - depends on ARCH_S3C24XX - select DEBUG_S3C2410_UART - bool "Use S3C2410/S3C2412 UART 1 for low-level debug" - help - Say Y here if you want the debug print routines to direct - their output to UART 1. The port must have been initialised - by the boot-loader before use. - - config DEBUG_S3C2410_UART2 - depends on ARCH_S3C24XX - select DEBUG_S3C2410_UART - bool "Use S3C2410/S3C2412 UART 2 for low-level debug" - help - Say Y here if you want the debug print routines to direct - their output to UART 2. The port must have been initialised - by the boot-loader before use. - config DEBUG_SA1100 depends on ARCH_SA1100 bool "Use SA1100 UARTs for low-level debug" @@ -1479,13 +1409,6 @@ config DEBUG_AT91_UART config DEBUG_EXYNOS_UART bool -config DEBUG_S3C2410_UART - bool - select DEBUG_S3C24XX_UART - -config DEBUG_S3C24XX_UART - bool - config DEBUG_S3C64XX_UART bool @@ -1493,8 +1416,7 @@ config DEBUG_S5PV210_UART bool config DEBUG_S3C_UART - depends on DEBUG_S3C2410_UART || DEBUG_S3C24XX_UART || \ - DEBUG_S3C64XX_UART || DEBUG_S5PV210_UART || \ + depends on DEBUG_S3C64XX_UART || DEBUG_S5PV210_UART || \ DEBUG_EXYNOS_UART int default "0" if DEBUG_S3C_UART0 @@ -1595,7 +1517,7 @@ config DEBUG_LL_INCLUDE default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA0 default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA1 default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4 - default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART || DEBUG_S3C64XX_UART + default "debug/s3c24xx.S" if DEBUG_S3C64XX_UART default "debug/s5pv210.S" if DEBUG_S5PV210_UART default "debug/sti.S" if DEBUG_STIH41X_ASC2 default "debug/sti.S" if DEBUG_STIH41X_SBC_ASC1 @@ -1618,11 +1540,10 @@ config DEBUG_UART_PL01X # Compatibility options for 8250 config DEBUG_UART_8250 - def_bool ARCH_IOP32X || ARCH_IXP4XX || ARCH_RPC + def_bool ARCH_IXP4XX || ARCH_RPC config DEBUG_UART_PHYS hex "Physical base address of debug UART" - default 0x01c20000 if DEBUG_DAVINCI_DMx_UART0 default 0x01c28000 if DEBUG_SUNXI_UART0 default 0x01c28400 if DEBUG_SUNXI_UART1 default 0x01d0c000 if DEBUG_DAVINCI_DA8XX_UART1 @@ -1679,13 +1600,6 @@ config DEBUG_UART_PHYS default 0x4806e000 if DEBUG_OMAP2UART3 || DEBUG_OMAP4UART4 default 0x49020000 if DEBUG_OMAP3UART3 default 0x49042000 if DEBUG_OMAP3UART4 - default 0x50000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \ - DEBUG_S3C2410_UART0) - default 0x50004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \ - DEBUG_S3C2410_UART1) - default 0x50008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \ - DEBUG_S3C2410_UART2) - default 0x78000000 if DEBUG_CNS3XXX default 0x7c0003f8 if DEBUG_FOOTBRIDGE_COM1 default 0x7f005000 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART0 default 0x7f005400 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART1 @@ -1729,7 +1643,6 @@ config DEBUG_UART_PHYS default 0xfcb00000 if DEBUG_HI3620_UART default 0xfd883000 if DEBUG_ALPINE_UART0 default 0xfe531000 if DEBUG_STIH41X_SBC_ASC1 - default 0xfe800000 if ARCH_IOP32X default 0xfed32000 if DEBUG_STIH41X_ASC2 default 0xff690000 if DEBUG_RK32_UART2 default 0xffc02000 if DEBUG_SOCFPGA_UART0 @@ -1738,9 +1651,9 @@ config DEBUG_UART_PHYS default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0 default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2 default 0xfff36000 if DEBUG_HIGHBANK_UART - default 0xfffb0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1 - default 0xfffb0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2 - default 0xfffb9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3 + default 0xfffb0000 if DEBUG_OMAP1UART1 + default 0xfffb0800 if DEBUG_OMAP1UART2 + default 0xfffb9800 if DEBUG_OMAP1UART3 default 0xfffe8600 if DEBUG_BCM63XX_UART default 0xffffee00 if DEBUG_AT91_SAM9263_DBGU default 0xfffff200 if DEBUG_AT91_RM9200_DBGU @@ -1754,7 +1667,7 @@ config DEBUG_UART_PHYS DEBUG_RCAR_GEN2_SCIF2 || DEBUG_RCAR_GEN2_SCIF4 || \ DEBUG_RCAR_GEN2_SCIFA2 || \ DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \ - DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \ + DEBUG_RMOBILE_SCIFA4 || \ DEBUG_S3C64XX_UART || \ DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \ DEBUG_DIGICOLOR_UA0 || \ @@ -1791,15 +1704,9 @@ config DEBUG_UART_VIRT default 0xf6200000 if DEBUG_PXA_UART1 default 0xf7000000 if DEBUG_SUN9I_UART0 default 0xf7000000 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART0 - default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \ - DEBUG_S3C2410_UART0) default 0xf7000400 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART1 default 0xf7000800 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART2 default 0xf7000c00 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART3 - default 0xf7004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \ - DEBUG_S3C2410_UART1) - default 0xf7008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \ - DEBUG_S3C2410_UART2) default 0xf7020000 if DEBUG_AT91_SAMA5D2_UART1 default 0xf7fc9000 if DEBUG_BERLIN_UART default 0xf8007000 if DEBUG_HIP04_UART @@ -1818,7 +1725,6 @@ config DEBUG_UART_VIRT DEBUG_OMAP4UART2 || DEBUG_OMAP5UART2 default 0xfa06e000 if DEBUG_OMAP2UART3 || DEBUG_OMAP4UART4 default 0xfa71e000 if DEBUG_QCOM_UARTDM - default 0xfb002000 if DEBUG_CNS3XXX default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb00c000 if DEBUG_AT91_SAMA5D4_USART3 default 0xfb020000 if DEBUG_OMAP3UART3 @@ -1835,7 +1741,6 @@ config DEBUG_UART_VIRT default 0xfe018000 if DEBUG_MMP_UART3 default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART default 0xfe300000 if DEBUG_BCM_KONA_UART - default 0xfe800000 if ARCH_IOP32X default 0xfeb00000 if DEBUG_HI3620_UART || DEBUG_HIX5HD2_UART default 0xfeb24000 if DEBUG_RK3X_UART0 default 0xfeb26000 if DEBUG_RK3X_UART1 @@ -1846,7 +1751,6 @@ config DEBUG_UART_VIRT default 0xfec03000 if DEBUG_SOCFPGA_CYCLONE5_UART1 default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE - default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 default 0xfec90000 if DEBUG_RK32_UART2 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_SD5203_UART @@ -1859,14 +1763,14 @@ config DEBUG_UART_VIRT default 0xfec00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xfec00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN default 0xfef36000 if DEBUG_HIGHBANK_UART - default 0xff0b0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1 - default 0xff0b0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2 - default 0xff0b9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3 + default 0xff0b0000 if DEBUG_OMAP1UART1 + default 0xff0b0800 if DEBUG_OMAP1UART2 + default 0xff0b9800 if DEBUG_OMAP1UART3 default 0xffd01000 if DEBUG_HIP01_UART default DEBUG_UART_PHYS if !MMU depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ - DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \ + DEBUG_QCOM_UARTDM || \ DEBUG_S3C64XX_UART || \ DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \ DEBUG_DIGICOLOR_UA0 || \ @@ -1877,9 +1781,8 @@ config DEBUG_UART_VIRT config DEBUG_UART_8250_SHIFT int "Register offset shift for the 8250 debug UART" depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 - default 0 if DEBUG_FOOTBRIDGE_COM1 || ARCH_IOP32X || DEBUG_BCM_5301X || \ - DEBUG_BCM_HR2 || DEBUG_OMAP7XXUART1 || DEBUG_OMAP7XXUART2 || \ - DEBUG_OMAP7XXUART3 + default 0 if DEBUG_FOOTBRIDGE_COM1 || DEBUG_BCM_5301X || \ + DEBUG_BCM_HR2 default 3 if DEBUG_MSTARV7_PMUART default 2 @@ -1890,9 +1793,9 @@ config DEBUG_UART_8250_WORD default y if DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_ARRIA10_UART1 || \ DEBUG_SOCFPGA_CYCLONE5_UART1 || DEBUG_KEYSTONE_UART0 || \ DEBUG_KEYSTONE_UART1 || DEBUG_ALPINE_UART0 || \ - DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ - DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_BCM_IPROC_UART3 || \ - DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 + DEBUG_DAVINCI_DA8XX_UART1 || DEBUG_DAVINCI_DA8XX_UART2 || \ + DEBUG_BCM_IPROC_UART3 || DEBUG_BCM_KONA_UART || \ + DEBUG_RK32_UART2 config DEBUG_UART_8250_PALMCHIP bool "8250 UART is Palmchip BK-310x" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 955b0362cdfb..4c8c3b92ac6f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -152,8 +152,6 @@ CHECKFLAGS += -D__arm__ # during boot, and this offset is critical to the functioning of # kexec-tools. textofs-y := 0x00008000 -# We don't want the htc bootloader to corrupt kernel during resume -textofs-$(CONFIG_PM_H1940) := 0x00108000 # RTD1195 has Boot ROM at start of address space textofs-$(CONFIG_ARCH_REALTEK) := 0x00108000 # SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory @@ -178,7 +176,6 @@ machine-$(CONFIG_ARCH_AXXIA) += axxia machine-$(CONFIG_ARCH_BCM) += bcm machine-$(CONFIG_ARCH_BERLIN) += berlin machine-$(CONFIG_ARCH_CLPS711X) += clps711x -machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor machine-$(CONFIG_ARCH_DOVE) += dove @@ -189,7 +186,6 @@ machine-$(CONFIG_ARCH_GEMINI) += gemini machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_ARCH_HISI) += hisi machine-$(CONFIG_ARCH_HPE) += hpe -machine-$(CONFIG_ARCH_IOP32X) += iop32x machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx machine-$(CONFIG_ARCH_KEYSTONE) += keystone machine-$(CONFIG_ARCH_LPC18XX) += lpc18xx diff --git a/arch/arm/boot/compressed/head-sa1100.S b/arch/arm/boot/compressed/head-sa1100.S index 95abdd850fe3..23eae1a65064 100644 --- a/arch/arm/boot/compressed/head-sa1100.S +++ b/arch/arm/boot/compressed/head-sa1100.S @@ -20,10 +20,6 @@ __SA1100_start: #ifdef CONFIG_SA1100_COLLIE mov r7, #MACH_TYPE_COLLIE #endif -#ifdef CONFIG_SA1100_SIMPAD - @ UNTIL we've something like an open bootldr - mov r7, #MACH_TYPE_SIMPAD @should be 87 -#endif mrc p15, 0, r0, c1, c0, 0 @ read control reg ands r0, r0, #0x0d beq 99f diff --git a/arch/arm/boot/compressed/misc-ep93xx.h b/arch/arm/boot/compressed/misc-ep93xx.h index 3dc942589cba..65b4121d1490 100644 --- a/arch/arm/boot/compressed/misc-ep93xx.h +++ b/arch/arm/boot/compressed/misc-ep93xx.h @@ -57,8 +57,7 @@ static inline void ep93xx_decomp_setup(void) if (machine_is_ts72xx()) ts72xx_watchdog_disable(); - if (machine_is_adssphere() || - machine_is_edb9301() || + if (machine_is_edb9301() || machine_is_edb9302() || machine_is_edb9302a() || machine_is_edb9302a() || @@ -69,16 +68,6 @@ static inline void ep93xx_decomp_setup(void) machine_is_edb9315() || machine_is_edb9315a() || machine_is_edb9315a() || - machine_is_gesbc9312() || - machine_is_micro9() || - machine_is_micro9l() || - machine_is_micro9m() || - machine_is_micro9s() || - machine_is_micro9m() || - machine_is_micro9l() || - machine_is_micro9s() || - machine_is_sim_one() || - machine_is_snapper_cl15() || machine_is_ts72xx() || machine_is_bk3() || machine_is_vision_ep9307()) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d08a3c450ce7..aee97fa75dd1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1163,8 +1163,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-veyron-speedy.dtb \ rk3288-veyron-tiger.dtb \ rk3288-vyasa.dtb -dtb-$(CONFIG_ARCH_S3C24XX) += \ - s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_S3C64XX) += \ s3c6410-mini6410.dtb \ s3c6410-smdk6410.dtb diff --git a/arch/arm/boot/dts/s3c2410-pinctrl.h b/arch/arm/boot/dts/s3c2410-pinctrl.h deleted file mode 100644 index 76b6171ae149..000000000000 --- a/arch/arm/boot/dts/s3c2410-pinctrl.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Samsung S3C2410 DTS pinctrl constants - * - * Copyright (c) 2016 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * Copyright (c) 2022 Linaro Ltd - * Author: Krzysztof Kozlowski <krzk@kernel.org> - */ - -#ifndef __DTS_ARM_SAMSUNG_S3C2410_PINCTRL_H__ -#define __DTS_ARM_SAMSUNG_S3C2410_PINCTRL_H__ - -#define S3C2410_PIN_FUNC_INPUT 0 -#define S3C2410_PIN_FUNC_OUTPUT 1 -#define S3C2410_PIN_FUNC_2 2 -#define S3C2410_PIN_FUNC_3 3 - -#endif /* __DTS_ARM_SAMSUNG_S3C2410_PINCTRL_H__ */ diff --git a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi deleted file mode 100644 index 3268366bd8bc..000000000000 --- a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi +++ /dev/null @@ -1,172 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Samsung S3C2416 pinctrl settings - * - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - */ - -#include "s3c2410-pinctrl.h" - -&pinctrl_0 { - /* - * Pin banks - */ - - gpa: gpa-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpb: gpb-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpc: gpc-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpd: gpd-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpe: gpe-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpf: gpf-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpg: gpg-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gph: gph-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpj: gpj-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpk: gpk-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpl: gpl-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - gpm: gpm-gpio-bank { - gpio-controller; - #gpio-cells = <2>; - }; - - /* - * Pin groups - */ - - uart0_data: uart0-data-pins { - samsung,pins = "gph-0", "gph-1"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - uart0_fctl: uart0-fctl-pins { - samsung,pins = "gph-8", "gph-9"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - uart1_data: uart1-data-pins { - samsung,pins = "gph-2", "gph-3"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - uart1_fctl: uart1-fctl-pins { - samsung,pins = "gph-10", "gph-11"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - uart2_data: uart2-data-pins { - samsung,pins = "gph-4", "gph-5"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - uart2_fctl: uart2-fctl-pins { - samsung,pins = "gph-6", "gph-7"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - uart3_data: uart3-data-pins { - samsung,pins = "gph-6", "gph-7"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - extuart_clk: extuart-clk-pins { - samsung,pins = "gph-12"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - i2c0_bus: i2c0-bus-pins { - samsung,pins = "gpe-14", "gpe-15"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - spi0_bus: spi0-bus-pins { - samsung,pins = "gpe-11", "gpe-12", "gpe-13"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - sd0_clk: sd0-clk-pins { - samsung,pins = "gpe-5"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - sd0_cmd: sd0-cmd-pins { - samsung,pins = "gpe-6"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - sd0_bus1: sd0-bus1-pins { - samsung,pins = "gpe-7"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - sd0_bus4: sd0-bus4-pins { - samsung,pins = "gpe-8", "gpe-9", "gpe-10"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - sd1_cmd: sd1-cmd-pins { - samsung,pins = "gpl-8"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - sd1_clk: sd1-clk-pins { - samsung,pins = "gpl-9"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - sd1_bus1: sd1-bus1-pins { - samsung,pins = "gpl-0"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; - - sd1_bus4: sd1-bus4-pins { - samsung,pins = "gpl-1", "gpl-2", "gpl-3"; - samsung,pin-function = <S3C2410_PIN_FUNC_2>; - }; -}; diff --git a/arch/arm/boot/dts/s3c2416-smdk2416.dts b/arch/arm/boot/dts/s3c2416-smdk2416.dts deleted file mode 100644 index e7c379a9842e..000000000000 --- a/arch/arm/boot/dts/s3c2416-smdk2416.dts +++ /dev/null @@ -1,77 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Samsung SMDK2416 board device tree source - * - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - */ - -/dts-v1/; -#include "s3c2416.dtsi" - -/ { - model = "SMDK2416"; - compatible = "samsung,smdk2416", "samsung,s3c2416"; - - memory@30000000 { - device_type = "memory"; - reg = <0x30000000 0x4000000>; - }; - - xti: clock-0 { - compatible = "fixed-clock"; - clock-frequency = <12000000>; - clock-output-names = "xti"; - #clock-cells = <0>; - }; -}; - -&rtc { - status = "okay"; -}; - -&sdhci_0 { - pinctrl-names = "default"; - pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, - <&sd1_bus1>, <&sd1_bus4>; - bus-width = <4>; - broken-cd; - status = "okay"; -}; - -&sdhci_1 { - pinctrl-names = "default"; - pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, - <&sd0_bus1>, <&sd0_bus4>; - bus-width = <4>; - cd-gpios = <&gpf 1 0>; - cd-inverted; - status = "okay"; -}; - -&uart_0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_data>, <&uart0_fctl>; -}; - -&uart_1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_data>, <&uart1_fctl>; -}; - -&uart_2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart2_data>; -}; - -&uart_3 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_data>; -}; - -&watchdog { - status = "okay"; -}; diff --git a/arch/arm/boot/dts/s3c2416.dtsi b/arch/arm/boot/dts/s3c2416.dtsi deleted file mode 100644 index 4660751cb207..000000000000 --- a/arch/arm/boot/dts/s3c2416.dtsi +++ /dev/null @@ -1,124 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Samsung's S3C2416 SoC device tree source - * - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - */ - -#include <dt-bindings/clock/s3c2443.h> -#include "s3c24xx.dtsi" -#include "s3c2416-pinctrl.dtsi" - -/ { - model = "Samsung S3C2416 SoC"; - compatible = "samsung,s3c2416"; - - aliases { - serial3 = &uart_3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,arm926ej-s"; - reg = <0x0>; - }; - }; - - clocks: clock-controller@4c000000 { - compatible = "samsung,s3c2416-clock"; - reg = <0x4c000000 0x40>; - #clock-cells = <1>; - }; - - uart_3: serial@5000c000 { - compatible = "samsung,s3c2440-uart"; - reg = <0x5000C000 0x4000>; - interrupts = <1 18 24 4>, <1 18 25 4>; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>, - <&clocks SCLK_UART>; - status = "disabled"; - }; - - sdhci_1: mmc@4ac00000 { - compatible = "samsung,s3c6410-sdhci"; - reg = <0x4AC00000 0x100>; - interrupts = <0 0 21 3>; - clock-names = "hsmmc", "mmc_busclk.0", - "mmc_busclk.2"; - clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>, - <&clocks MUX_HSMMC0>; - status = "disabled"; - }; - - sdhci_0: mmc@4a800000 { - compatible = "samsung,s3c6410-sdhci"; - reg = <0x4A800000 0x100>; - interrupts = <0 0 20 3>; - clock-names = "hsmmc", "mmc_busclk.0", - "mmc_busclk.2"; - clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>, - <&clocks MUX_HSMMC1>; - status = "disabled"; - }; -}; - -&i2c { - compatible = "samsung,s3c2440-i2c"; - clocks = <&clocks PCLK_I2C0>; - clock-names = "i2c"; -}; - -&intc { - compatible = "samsung,s3c2416-irq"; -}; - -&pinctrl_0 { - compatible = "samsung,s3c2416-pinctrl"; -}; - -&rtc { - compatible = "samsung,s3c2416-rtc"; - clocks = <&clocks PCLK_RTC>; - clock-names = "rtc"; -}; - -&timer { - clocks = <&clocks PCLK_PWM>; - clock-names = "timers"; -}; - -&uart_0 { - compatible = "samsung,s3c2440-uart"; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, - <&clocks SCLK_UART>; -}; - -&uart_1 { - compatible = "samsung,s3c2440-uart"; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>, - <&clocks SCLK_UART>; -}; - -&uart_2 { - compatible = "samsung,s3c2440-uart"; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>, - <&clocks SCLK_UART>; -}; - -&watchdog { - interrupts = <1 9 27 3>; - clocks = <&clocks PCLK_WDT>; - clock-names = "watchdog"; -}; diff --git a/arch/arm/boot/dts/s3c24xx.dtsi b/arch/arm/boot/dts/s3c24xx.dtsi deleted file mode 100644 index 06f82c7e458e..000000000000 --- a/arch/arm/boot/dts/s3c24xx.dtsi +++ /dev/null @@ -1,92 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Samsung's S3C24XX family device tree source - * - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - */ - -/ { - compatible = "samsung,s3c24xx"; - interrupt-parent = <&intc>; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - pinctrl0 = &pinctrl_0; - serial0 = &uart_0; - serial1 = &uart_1; - serial2 = &uart_2; - }; - - intc: interrupt-controller@4a000000 { - compatible = "samsung,s3c2410-irq"; - reg = <0x4a000000 0x100>; - interrupt-controller; - #interrupt-cells = <4>; - }; - - pinctrl_0: pinctrl@56000000 { - reg = <0x56000000 0x1000>; - - wakeup-interrupt-controller { - compatible = "samsung,s3c2410-wakeup-eint"; - interrupts = <0 0 0 3>, - <0 0 1 3>, - <0 0 2 3>, - <0 0 3 3>, - <0 0 4 4>, - <0 0 5 4>; - }; - }; - - timer: pwm@51000000 { - compatible = "samsung,s3c2410-pwm"; - reg = <0x51000000 0x1000>; - interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>; - #pwm-cells = <3>; - }; - - uart_0: serial@50000000 { - compatible = "samsung,s3c2410-uart"; - reg = <0x50000000 0x4000>; - interrupts = <1 28 0 4>, <1 28 1 4>; - status = "disabled"; - }; - - uart_1: serial@50004000 { - compatible = "samsung,s3c2410-uart"; - reg = <0x50004000 0x4000>; - interrupts = <1 23 3 4>, <1 23 4 4>; - status = "disabled"; - }; - - uart_2: serial@50008000 { - compatible = "samsung,s3c2410-uart"; - reg = <0x50008000 0x4000>; - interrupts = <1 15 6 4>, <1 15 7 4>; - status = "disabled"; - }; - - watchdog: watchdog@53000000 { - compatible = "samsung,s3c2410-wdt"; - reg = <0x53000000 0x100>; - interrupts = <0 0 9 3>; - status = "disabled"; - }; - - rtc: rtc@57000000 { - compatible = "samsung,s3c2410-rtc"; - reg = <0x57000000 0x100>; - interrupts = <0 0 30 3>, <0 0 8 3>; - status = "disabled"; - }; - - i2c: i2c@54000000 { - compatible = "samsung,s3c2410-i2c"; - reg = <0x54000000 0x100>; - interrupts = <0 0 27 3>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; -}; diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig deleted file mode 100644 index 337e5c9718ae..000000000000 --- a/arch/arm/configs/badge4_defconfig +++ /dev/null @@ -1,105 +0,0 @@ -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_EXPERT=y -CONFIG_ARCH_MULTI_V4=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_SA1100=y -CONFIG_SA1100_BADGE4=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="init=/linuxrc root=/dev/mtdblock3" -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_MODVERSIONS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_BINFMT_MISC=m -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIVHCI=m -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_DEBUG=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I2 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_RAM=y -CONFIG_MTD_SA1100=y -CONFIG_PARPORT=m -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=m -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=m -CONFIG_BLK_DEV_SR=m -CONFIG_CHR_DEV_SG=y -CONFIG_NETDEVICES=y -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_USBNET=m -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -# CONFIG_INPUT is not set -# CONFIG_SERIO is not set -# CONFIG_VT is not set -CONFIG_SERIAL_SA1100=y -CONFIG_SERIAL_SA1100_CONSOLE=y -CONFIG_I2C=m -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_ELEKTOR=m -CONFIG_WATCHDOG=y -CONFIG_SOFT_WATCHDOG=m -CONFIG_SA1100_WATCHDOG=m -CONFIG_SOUND=y -CONFIG_SOUND_PRIME=y -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_STORAGE=y -CONFIG_USB_STORAGE_DEBUG=y -CONFIG_USB_MDC800=m -CONFIG_USB_MICROTEK=m -CONFIG_USB_USS720=m -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_EXT2_FS=m -CONFIG_EXT3_FS=m -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=m -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=m -CONFIG_MINIX_FS=m -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_SMB_FS=m -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/cerfcube_defconfig b/arch/arm/configs/cerfcube_defconfig deleted file mode 100644 index 9ada868e2648..000000000000 --- a/arch/arm/configs/cerfcube_defconfig +++ /dev/null @@ -1,73 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_ARCH_MULTI_V4=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_SA1100=y -CONFIG_SA1100_CERF=y -CONFIG_SA1100_CERF_FLASH_16MB=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttySA0,38400 root=/dev/mtdblock3 rootfstype=jffs2 rw mem=32M init=/linuxrc" -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=m -CONFIG_FPE_FASTFPE=y -CONFIG_PM=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_IPV6 is not set -CONFIG_PCCARD=m -CONFIG_PCMCIA_SA1100=m -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_SA1100=y -CONFIG_BLK_DEV_LOOP=m -CONFIG_BLK_DEV_RAM=m -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_SA1100=y -CONFIG_SERIAL_SA1100_CONSOLE=y -CONFIG_WATCHDOG=y -CONFIG_SA1100_WATCHDOG=m -# CONFIG_VGA_CONSOLE is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_EXT2_FS=m -CONFIG_EXT3_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_ROMFS_FS=y -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_NFSD=m -CONFIG_NFSD_V4=y -CONFIG_SMB_FS=m -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_ISO8859_1=m -CONFIG_DEBUG_KERNEL=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig deleted file mode 100644 index 95144e380b4b..000000000000 --- a/arch/arm/configs/cm_x300_defconfig +++ /dev/null @@ -1,163 +0,0 @@ -CONFIG_LOCALVERSION="-cm-x300" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_NO_HZ_IDLE=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=18 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_CM_X300=y -CONFIG_AEABI=y -CONFIG_HIGHMEM=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400" -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_FPE_NWFPE=y -CONFIG_APM_EMULATION=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HCIBTUSB=m -CONFIG_LIB80211=m -CONFIG_MTD=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_NAND_MARVELL=y -CONFIG_MTD_UBI=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_DM9000=y -CONFIG_DM9000_DEBUGLEVEL=0 -CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_PXA27x=m -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_DA9034 is not set -CONFIG_TOUCHSCREEN_WM97XX=m -# CONFIG_TOUCHSCREEN_WM9705 is not set -# CONFIG_TOUCHSCREEN_WM9713 is not set -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_PXA=y -CONFIG_SPI=y -CONFIG_SPI_GPIO=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_PCA953X=y -# CONFIG_HWMON is not set -CONFIG_PMIC_DA903X=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_DA903X=y -CONFIG_FB=y -CONFIG_FB_PXA=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_TDO24M=y -CONFIG_BACKLIGHT_DA903X=m -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_LOGO=y -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=m -CONFIG_SND_PXA2XX_SOC=m -CONFIG_SND_PXA2XX_SOC_EM_X270=m -CONFIG_HID_DRAGONRISE=y -CONFIG_HID_GYRATION=y -CONFIG_HID_TWINHAN=y -CONFIG_HID_NTRIG=y -CONFIG_HID_PANTHERLORD=y -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -CONFIG_HID_GREENASIA=y -CONFIG_HID_SMARTJOYPLUS=y -CONFIG_HID_TOPSEED=y -CONFIG_HID_THRUSTMASTER=y -CONFIG_HID_ZEROPLUS=y -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_MMC=m -CONFIG_MMC_PXA=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_V3020=y -CONFIG_RTC_DRV_PXA=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_UBIFS_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_CIFS=m -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_ISO8859_1=m -CONFIG_CRYPTO_MICHAEL_MIC=m -# CONFIG_CRYPTO_HW is not set -CONFIG_CRC_T10DIF=y -CONFIG_FONTS=y -CONFIG_FONT_6x11=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_FS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_FTRACE is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_AES=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/arm/configs/cns3420vb_defconfig b/arch/arm/configs/cns3420vb_defconfig deleted file mode 100644 index b3aab97c0728..000000000000 --- a/arch/arm/configs/cns3420vb_defconfig +++ /dev/null @@ -1,63 +0,0 @@ -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_CGROUPS=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_RELAY=y -CONFIG_BLK_DEV_INITRD=y -# CONFIG_PERF_EVENTS is not set -CONFIG_PROFILING=y -CONFIG_ARCH_MULTI_V6=y -CONFIG_ARCH_CNS3XXX=y -CONFIG_MACH_CNS3420VB=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttyS0,38400 mem=128M root=/dev/mmcblk0p1 ro rootwait" -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_IOSCHED_BFQ=m -#CONFIG_ARCH_MULTI_V7 is not set -CONFIG_DEBUG_CNS3XXX=y -CONFIG_AEABI=y -# CONFIG_SWAP is not set -CONFIG_SLAB=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_PHYSMAP=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=20000 -CONFIG_BLK_DEV_SD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ATA=y -# CONFIG_SATA_PMP is not set -# CONFIG_ATA_SFF is not set -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_USB_SUPPORT is not set -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_AUTOFS4_FS=y -CONFIG_FSCACHE=y -CONFIG_TMPFS=y -# CONFIG_ENABLE_MUST_CHECK is not set -# CONFIG_ARM_UNWIND is not set -CONFIG_CRC_CCITT=y -CONFIG_DEBUG_FS=y diff --git a/arch/arm/configs/colibri_pxa270_defconfig b/arch/arm/configs/colibri_pxa270_defconfig deleted file mode 100644 index 8357d721c69c..000000000000 --- a/arch/arm/configs/colibri_pxa270_defconfig +++ /dev/null @@ -1,157 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_PREEMPT=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -CONFIG_KALLSYMS_EXTRA_PASS=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_COLIBRI=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=m -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IPV6 is not set -CONFIG_NETFILTER=y -CONFIG_VLAN_8021Q=m -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_CFG80211=y -CONFIG_CONNECTOR=y -CONFIG_MTD=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_LE_BYTE_SWAP=y -CONFIG_MTD_CFI_GEOMETRY=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PXA2XX=y -CONFIG_MTD_BLOCK2MTD=y -CONFIG_MTD_ONENAND=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_NAND_DISKONCHIP=y -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000 -CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y -CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_NBD=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=8 -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_DM9000=y -CONFIG_PHYLIB=y -CONFIG_HOSTAP=y -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_MOUSE_PS2 is not set -CONFIG_MOUSE_SERIAL=m -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=m -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_WATCHDOG=y -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_PXA=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_LOGO=y -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_SERIAL=m -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_DUMMY_HCD=y -CONFIG_MMC=y -CONFIG_NEW_LEDS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_HCTOSYS is not set -CONFIG_RTC_DRV_PCF8583=m -CONFIG_AUTOFS4_FS=y -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=1 -CONFIG_JFFS2_FS_WBUF_VERIFY=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=y -CONFIG_NFSD_V4=y -CONFIG_NLS_DEFAULT="iso8859-15" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_UTF8=m -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -CONFIG_KEYS=y -CONFIG_SECURITY=y -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_DEFLATE=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_LIBCRC32C=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/colibri_pxa300_defconfig b/arch/arm/configs/colibri_pxa300_defconfig deleted file mode 100644 index 42adfefdb6dc..000000000000 --- a/arch/arm/configs/colibri_pxa300_defconfig +++ /dev/null @@ -1,60 +0,0 @@ -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_COLIBRI300=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttyS0,115200 rw" -CONFIG_CPU_IDLE=y -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_NET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_SYN_COOKIES=y -CONFIG_IPV6=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_AX88796=y -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_MISC=y -CONFIG_INPUT_GPIO_ROTARY_ENCODER=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_DEBUG_GPIO=y -# CONFIG_HWMON is not set -CONFIG_FB=y -CONFIG_FB_PXA=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_MON=y -CONFIG_USB_STORAGE=y -CONFIG_MMC=y -CONFIG_MMC_PXA=y -CONFIG_EXT3_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_AES=y -CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ARC4=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig deleted file mode 100644 index df84640f4f57..000000000000 --- a/arch/arm/configs/corgi_defconfig +++ /dev/null @@ -1,247 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_PREEMPT=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_EXPERT=y -CONFIG_PROFILING=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_PXA_SHARPSL=y -CONFIG_MACH_POODLE=y -CONFIG_MACH_CORGI=y -CONFIG_MACH_SHEPHERD=y -CONFIG_MACH_HUSKY=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttyS0,115200n8 console=tty1 noinitrd root=/dev/mtdblock2 rootfstype=jffs2 debug" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_BINFMT_MISC=m -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=m -CONFIG_INET=y -CONFIG_SYN_COOKIES=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_TUNNEL=m -CONFIG_NETFILTER=y -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -CONFIG_BT_HCIDTL1=m -CONFIG_BT_HCIBT3C=m -CONFIG_BT_HCIBLUECARD=m -CONFIG_BT_HCIBTUART=m -CONFIG_BT_HCIVHCI=m -CONFIG_PCCARD=y -CONFIG_PCMCIA_PXA2XX=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_ROM=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_NAND_SHARPSL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=m -CONFIG_CHR_DEV_OSST=m -CONFIG_BLK_DEV_SR=m -CONFIG_CHR_DEV_SG=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ATA=y -CONFIG_PATA_PCMCIA=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_PCMCIA_PCNET=m -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_ASYNC=m -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=m -# CONFIG_USB_NET_CDC_SUBSET is not set -CONFIG_NET_PCMCIA=y -CONFIG_INPUT_FF_MEMLESS=m -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=m -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=m -CONFIG_SERIAL_8250_CS=m -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_I2C=y -CONFIG_I2C_PXA=y -CONFIG_SPI=y -CONFIG_SPI_PXA2XX=y -CONFIG_FB=y -CONFIG_FB_W100=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_CORGI=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_SOUND=y -CONFIG_SOUND_PRIME=y -CONFIG_HID_A4TECH=m -CONFIG_HID_APPLE=m -CONFIG_HID_BELKIN=m -CONFIG_HID_CHERRY=m -CONFIG_HID_CHICONY=m -CONFIG_HID_CYPRESS=m -CONFIG_HID_EZKEY=m -CONFIG_HID_GYRATION=m -CONFIG_HID_LOGITECH=m -CONFIG_HID_MICROSOFT=m -CONFIG_HID_MONTEREY=m -CONFIG_HID_PANTHERLORD=m -CONFIG_HID_PETALYNX=m -CONFIG_HID_SAMSUNG=m -CONFIG_HID_SONY=m -CONFIG_HID_SUNPLUS=m -CONFIG_USB_KBD=m -CONFIG_USB_MOUSE=m -CONFIG_USB=m -CONFIG_USB_MON=m -CONFIG_USB_SL811_HCD=m -CONFIG_USB_SL811_CS=m -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_STORAGE=m -CONFIG_USB_MDC800=m -CONFIG_USB_MICROTEK=m -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_SAFE=m -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_GADGET=y -CONFIG_USB_ZERO=m -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_MMC=y -CONFIG_MMC_PXA=y -CONFIG_EXT2_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_RUBIN=y -CONFIG_CRAMFS=m -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_SMB_FS=m -CONFIG_SMB_NLS_DEFAULT=y -CONFIG_NFS_V4=m -CONFIG_NLS_DEFAULT="cp437" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=y -CONFIG_DEBUG_KERNEL=y -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_AES=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y -CONFIG_LIBCRC32C=m -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_MAGIC_SYSRQ=y -# CONFIG_DEBUG_PREEMPT is not set -# CONFIG_FTRACE is not set diff --git a/arch/arm/configs/eseries_pxa_defconfig b/arch/arm/configs/eseries_pxa_defconfig deleted file mode 100644 index b4c2e6457e04..000000000000 --- a/arch/arm/configs/eseries_pxa_defconfig +++ /dev/null @@ -1,97 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_EXPERT=y -# CONFIG_KALLSYMS is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_ARCH_PXA_ESERIES=y -CONFIG_IWMMXT=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_KEXEC=y -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_SLAB=y -# CONFIG_COMPAT_BRK is not set -CONFIG_NET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IPV6 is not set -CONFIG_CFG80211=m -CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_PCCARD=y -CONFIG_PCMCIA=m -CONFIG_PCMCIA_PXA2XX=m -# CONFIG_STANDALONE is not set -CONFIG_MTD=m -CONFIG_MTD_RAW_NAND=m -CONFIG_MTD_NAND_TMIO=m -CONFIG_BLK_DEV_LOOP=m -# CONFIG_SCSI_PROC_FS is not set -CONFIG_BLK_DEV_SD=m -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_ATA=m -# CONFIG_SATA_PMP is not set -CONFIG_PATA_PCMCIA=m -CONFIG_NETDEVICES=y -CONFIG_HERMES=m -CONFIG_PCMCIA_HERMES=m -CONFIG_NET_PCMCIA=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=m -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=m -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_WM97XX=m -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_PXA=y -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -CONFIG_MFD_T7L66XB=y -CONFIG_MFD_TC6387XB=y -CONFIG_MFD_TC6393XB=y -CONFIG_FB=y -CONFIG_FB_PXA=y -CONFIG_FB_W100=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_SOUND=y -CONFIG_SND=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_VERBOSE_PRINTK=y -# CONFIG_SND_PCMCIA is not set -CONFIG_SND_SOC=m -CONFIG_SND_PXA2XX_SOC=m -CONFIG_SND_PXA2XX_SOC_E800=m -# CONFIG_USB_SUPPORT is not set -CONFIG_MMC=y -CONFIG_MMC_TMIO=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=m -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_FONTS=y -CONFIG_FONT_MINI_4x6=y diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig deleted file mode 100644 index ef7b0a0aee3a..000000000000 --- a/arch/arm/configs/ezx_defconfig +++ /dev/null @@ -1,389 +0,0 @@ -CONFIG_LOCALVERSION="-ezx200910312315" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_NO_HZ_IDLE=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_EXPERT=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_PXA_EZX=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug" -CONFIG_KEXEC=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=m -CONFIG_CPU_FREQ_GOV_ONDEMAND=m -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m -CONFIG_CPU_IDLE=y -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_APM_EMULATION=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_BINFMT_MISC=m -CONFIG_SLAB=y -# CONFIG_COMPAT_BRK is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_SYN_COOKIES=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_DIAG is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -CONFIG_NF_NAT=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_LED=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -CONFIG_BRIDGE=m -CONFIG_BT=y -CONFIG_BT_RFCOMM=y -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=y -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=y -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -CONFIG_BT_HCIVHCI=m -CONFIG_BT_MRVL=m -CONFIG_BT_MRVL_SDIO=m -# CONFIG_WIRELESS is not set -CONFIG_FW_LOADER=m -CONFIG_CONNECTOR=m -CONFIG_MTD=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set -# CONFIG_MTD_CFI_I2 is not set -CONFIG_MTD_OTP=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PXA2XX=y -CONFIG_BLK_DEV_LOOP=m -CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_RAM=y -CONFIG_NETDEVICES=y -CONFIG_DUMMY=y -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_WLAN is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_PXA27x=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_PCAP=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y -CONFIG_INPUT_PCAP=y -# CONFIG_SERIO is not set -CONFIG_LEGACY_PTY_COUNT=8 -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_PXA=y -CONFIG_SPI=y -CONFIG_SPI_PXA2XX=y -CONFIG_GPIO_SYSFS=y -CONFIG_POWER_SUPPLY=y -# CONFIG_HWMON is not set -CONFIG_EZX_PCAP=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_DEBUG=y -CONFIG_REGULATOR_PCAP=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_VIDEO_DEV=y -CONFIG_MEDIA_TUNER_CUSTOMISE=y -CONFIG_RADIO_TEA5764=y -# CONFIG_MEDIA_TUNER_MC44S803 is not set -# CONFIG_MEDIA_TUNER_MT2060 is not set -# CONFIG_MEDIA_TUNER_MT20XX is not set -# CONFIG_MEDIA_TUNER_MT2131 is not set -# CONFIG_MEDIA_TUNER_MT2266 is not set -# CONFIG_MEDIA_TUNER_MXL5005S is not set -# CONFIG_MEDIA_TUNER_MXL5007T is not set -# CONFIG_MEDIA_TUNER_QT1010 is not set -# CONFIG_MEDIA_TUNER_SIMPLE is not set -# CONFIG_MEDIA_TUNER_TDA18271 is not set -# CONFIG_MEDIA_TUNER_TDA827X is not set -# CONFIG_MEDIA_TUNER_TDA8290 is not set -# CONFIG_MEDIA_TUNER_TDA9887 is not set -# CONFIG_MEDIA_TUNER_TEA5761 is not set -# CONFIG_MEDIA_TUNER_TEA5767 is not set -# CONFIG_MEDIA_TUNER_XC2028 is not set -# CONFIG_MEDIA_TUNER_XC5000 is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_PXA27x=y -# CONFIG_V4L_USB_DRIVERS is not set -CONFIG_FB=y -CONFIG_FB_PXA=y -CONFIG_FB_PXA_OVERLAY=y -CONFIG_FB_PXA_PARAMETERS=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_PWM=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=y -CONFIG_SND_PXA2XX_SOC=y -CONFIG_HID_APPLE=m -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_GADGET=y -CONFIG_USB_PXA27X=y -CONFIG_USB_ETH=m -# CONFIG_USB_ETH_RNDIS is not set -CONFIG_MMC=y -CONFIG_SDIO_UART=m -CONFIG_MMC_PXA=y -CONFIG_MMC_SPI=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_LP3944=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_PCAP=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=m -CONFIG_REISERFS_FS=m -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -CONFIG_REISERFS_FS_SECURITY=y -CONFIG_XFS_FS=m -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=m -CONFIG_CUSE=m -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=m -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RUBIN=y -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=m -CONFIG_ROMFS_FS=m -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFSD=m -CONFIG_NFSD_V3_ACL=y -CONFIG_SMB_FS=m -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=m -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_VMAC=m -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_AES=m -CONFIG_CRYPTO_ARC4=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_FONTS=y -CONFIG_FONT_MINI_4x6=y -CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_FS=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_PROVE_LOCKING=y -# CONFIG_FTRACE is not set -CONFIG_DEBUG_USER=y diff --git a/arch/arm/configs/h5000_defconfig b/arch/arm/configs/h5000_defconfig deleted file mode 100644 index d01f1a6bd04d..000000000000 --- a/arch/arm/configs/h5000_defconfig +++ /dev/null @@ -1,74 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_EXPERT=y -# CONFIG_UID16 is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_H5000=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="keepinitrd" -CONFIG_KEXEC=y -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_APM_EMULATION=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_LEGACY_PTY_COUNT=32 -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -# CONFIG_USB_ETH_RNDIS is not set -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_SA1100=y -CONFIG_EXT2_FS=y -# CONFIG_PROC_PAGE_MONITOR is not set -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -# CONFIG_NETWORK_FILESYSTEMS is not set -CONFIG_DEBUG_KERNEL=y -CONFIG_CRYPTO=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_HW is not set -CONFIG_CRC_CCITT=y -CONFIG_PRINTK_TIME=y -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_SCHED_DEBUG is not set -# CONFIG_FTRACE is not set diff --git a/arch/arm/configs/hackkit_defconfig b/arch/arm/configs/hackkit_defconfig deleted file mode 100644 index 3c91a851fd08..000000000000 --- a/arch/arm/configs/hackkit_defconfig +++ /dev/null @@ -1,48 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_ARCH_MULTI_V4=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_SA1100=y -CONFIG_SA1100_HACKKIT=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttySA0,115200 root=/dev/ram0 initrd=0xc0400000,8M init=/rootshell" -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_SYN_COOKIES=y -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_DEBUG=y -CONFIG_MTD_DEBUG_VERBOSE=3 -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_NETDEVICES=y -CONFIG_DUMMY=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_SERIAL_SA1100=y -CONFIG_SERIAL_SA1100_CONSOLE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_EXT2_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CRAMFS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -# CONFIG_CRC32 is not set diff --git a/arch/arm/configs/iop32x_defconfig b/arch/arm/configs/iop32x_defconfig deleted file mode 100644 index 19e30e790d35..000000000000 --- a/arch/arm/configs/iop32x_defconfig +++ /dev/null @@ -1,126 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_IOP32X=y -CONFIG_MACH_GLANTANK=y -CONFIG_ARCH_IQ80321=y -CONFIG_ARCH_IQ31244=y -CONFIG_MACH_N2100=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp cachepolicy=writealloc" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IPV6=y -# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET6_XFRM_MODE_TUNNEL is not set -# CONFIG_INET6_XFRM_MODE_BEET is not set -# CONFIG_IPV6_SIT is not set -CONFIG_MTD=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y -CONFIG_MTD_REDBOOT_PARTS_READONLY=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ATA=y -CONFIG_SATA_SIL=y -CONFIG_SATA_VITESSE=y -CONFIG_MD=y -CONFIG_BLK_DEV_MD=y -CONFIG_MD_RAID0=y -CONFIG_MD_RAID1=y -CONFIG_MD_RAID10=y -CONFIG_MD_RAID456=y -CONFIG_BLK_DEV_DM=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y -CONFIG_E100=y -CONFIG_E1000=y -CONFIG_R8169=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IOP3XX=y -# CONFIG_VGA_CONSOLE is not set -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -CONFIG_USB_UHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_RS5C372=y -CONFIG_DMADEVICES=y -CONFIG_INTEL_IOP_ADMA=y -CONFIG_NET_DMA=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_TMPFS=y -CONFIG_ECRYPT_FS=y -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=y -CONFIG_KEYS=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_TGR192=y -CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=y -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_CAST5=y -CONFIG_CRYPTO_CAST6=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_KHAZAD=y -CONFIG_CRYPTO_SERPENT=y -CONFIG_CRYPTO_TEA=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_LIBCRC32C=y -CONFIG_DEBUG_KERNEL=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -CONFIG_DEBUG_LL_UART_8250=y diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig index ae1d68da4f2a..91bdcc095884 100644 --- a/arch/arm/configs/jornada720_defconfig +++ b/arch/arm/configs/jornada720_defconfig @@ -6,7 +6,6 @@ CONFIG_ARCH_MULTI_V4=y CONFIG_ARCH_SA1100=y CONFIG_SA1100_JORNADA720=y CONFIG_SA1100_JORNADA720_SSP=y -CONFIG_UNUSED_BOARD_FILES=y CONFIG_FPE_NWFPE=y CONFIG_PM=y CONFIG_MODULES=y diff --git a/arch/arm/configs/lart_defconfig b/arch/arm/configs/lart_defconfig deleted file mode 100644 index 916177d07a39..000000000000 --- a/arch/arm/configs/lart_defconfig +++ /dev/null @@ -1,64 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_ARCH_MULTI_V4=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_SA1100=y -CONFIG_SA1100_LART=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttySA0,9600 root=/dev/ram" -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_MODULES=y -CONFIG_NET=y -CONFIG_PACKET=m -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_SYN_COOKIES=y -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_DEBUG=y -CONFIG_MTD_DEBUG_VERBOSE=1 -CONFIG_MTD_BLOCK=y -CONFIG_MTD_LART=y -CONFIG_BLK_DEV_RAM=y -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_NET_ETHERNET=y -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_ASYNC=m -CONFIG_SLIP=m -CONFIG_SLIP_COMPRESSED=y -CONFIG_SERIAL_SA1100=y -CONFIG_SERIAL_SA1100_CONSOLE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_SOUND=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=m -CONFIG_REISERFS_FS=m -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_UDF_FS=m -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=m -CONFIG_JFFS2_FS_DEBUG=1 -CONFIG_CRAMFS=m -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_NFSD=m -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_UTF8=m -CONFIG_DEBUG_USER=y -CONFIG_CRC32=m diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig deleted file mode 100644 index b0c21a99a0a8..000000000000 --- a/arch/arm/configs/lpd270_defconfig +++ /dev/null @@ -1,58 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_LOGICPD_PXA270=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IPV6=y -# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET6_XFRM_MODE_TUNNEL is not set -# CONFIG_INET6_XFRM_MODE_BEET is not set -# CONFIG_IPV6_SIT is not set -CONFIG_MTD=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I1 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_BLK_DEV_NBD=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_FB=y -CONFIG_FB_PXA=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_SND=y -# CONFIG_SND_SUPPORT_OLD_API is not set -CONFIG_SND_PXA2XX_AC97=y -CONFIG_EXT2_FS=y -CONFIG_MSDOS_FS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_ISO8859_1=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/lubbock_defconfig b/arch/arm/configs/lubbock_defconfig deleted file mode 100644 index 4fc744c96196..000000000000 --- a/arch/arm/configs/lubbock_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_ARCH_LUBBOCK=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_NET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IPV6 is not set -CONFIG_PCCARD=y -CONFIG_PCMCIA_PXA2XX=y -CONFIG_MTD=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I1 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCMCIA=y -CONFIG_PCMCIA_PCNET=y -CONFIG_SMC91X=y -CONFIG_INPUT_EVDEV=y -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIO_SA1111=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_USB_GADGET=y -CONFIG_USB_G_SERIAL=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_EXT2_FS=y -CONFIG_MSDOS_FS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_ISO8859_1=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig deleted file mode 100644 index 5a8776f6aba3..000000000000 --- a/arch/arm/configs/magician_defconfig +++ /dev/null @@ -1,151 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_NO_HZ_IDLE=y -CONFIG_PREEMPT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -# CONFIG_UID16 is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_H4700=y -CONFIG_MACH_MAGICIAN=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="keepinitrd" -CONFIG_KEXEC=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HCIBTUSB=m -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -CONFIG_NETDEVICES=y -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_MPPE=m -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_PPP_ASYNC=m -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=m -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_PXA=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_PXA=y -CONFIG_W1_MASTER_DS1WM=y -CONFIG_HTC_EGPIO=y -CONFIG_POWER_SUPPLY=y -CONFIG_PDA_POWER=y -CONFIG_BATTERY_DS2760=y -# CONFIG_HWMON is not set -CONFIG_MFD_ASIC3=y -CONFIG_HTC_PASIC3=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_GPIO=y -CONFIG_FB=y -CONFIG_FB_PXA=y -CONFIG_FB_PXA_OVERLAY=y -CONFIG_FB_W100=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_PWM=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_SOUND=y -CONFIG_SND=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -# CONFIG_SND_ARM is not set -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=m -CONFIG_SND_PXA2XX_SOC=m -CONFIG_USB=y -CONFIG_USB_MON=m -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_GPIO_VBUS=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_VBUS_DRAW=500 -CONFIG_USB_PXA27X=y -CONFIG_USB_ETH=m -# CONFIG_USB_ETH_RNDIS is not set -CONFIG_USB_GADGETFS=m -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_MMC=y -CONFIG_SDIO_UART=m -CONFIG_MMC_PXA=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DEBUG=y -CONFIG_RTC_DRV_PXA=y -CONFIG_EXT2_FS=y -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_LZO=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_DEFAULT="utf8" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=y -CONFIG_CRYPTO=y -# CONFIG_CRYPTO_HW is not set -CONFIG_CRC_CCITT=y -CONFIG_FONTS=y -CONFIG_FONT_MINI_4x6=y -CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_PREEMPT is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/arm/configs/mainstone_defconfig b/arch/arm/configs/mainstone_defconfig deleted file mode 100644 index 096cd7bc667a..000000000000 --- a/arch/arm/configs/mainstone_defconfig +++ /dev/null @@ -1,51 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_MAINSTONE=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_NET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I1 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_FB=y -CONFIG_FB_PXA=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_EXT2_FS=y -CONFIG_MSDOS_FS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_ISO8859_1=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig deleted file mode 100644 index 86e00f684e16..000000000000 --- a/arch/arm/configs/mini2440_defconfig +++ /dev/null @@ -1,338 +0,0 @@ -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_RELAY=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_ARCH_MULTI_V4T=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_S3C24XX=y -CONFIG_S3C_ADC=y -# CONFIG_CPU_S3C2410 is not set -CONFIG_CPU_S3C2440=y -CONFIG_MACH_MINI2440=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_KEXEC=y -CONFIG_CPU_IDLE=y -CONFIG_APM_EMULATION=y -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_UNIXWARE_DISKLABEL=y -CONFIG_LDM_PARTITION=y -CONFIG_BINFMT_MISC=m -# CONFIG_COMPAT_BRK is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=m -CONFIG_NET_KEY=m -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_IP_MROUTE=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -CONFIG_SYN_COOKIES=y -CONFIG_INET_DIAG=m -# CONFIG_IPV6 is not set -CONFIG_NETFILTER=y -CONFIG_BRIDGE=m -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -CONFIG_NET_PKTGEN=m -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -CONFIG_BT_HCIVHCI=m -CONFIG_CFG80211=m -CONFIG_MAC80211=m -CONFIG_MAC80211_MESH=y -CONFIG_MAC80211_LEDS=y -CONFIG_CONNECTOR=m -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_FTL=y -CONFIG_NFTL=y -CONFIG_NFTL_RW=y -CONFIG_INFTL=y -CONFIG_RFD_FTL=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_RAM=y -CONFIG_MTD_ROM=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_NAND_S3C2410=y -CONFIG_MTD_NAND_PLATFORM=y -CONFIG_MTD_LPDDR=y -CONFIG_BLK_DEV_LOOP=m -CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_CDROM_PKTCDVD=m -CONFIG_SENSORS_TSL2550=m -CONFIG_EEPROM_AT24=y -CONFIG_SCSI=m -# CONFIG_SCSI_PROC_FS is not set -CONFIG_BLK_DEV_SD=m -CONFIG_CHR_DEV_SG=m -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_TUN=m -CONFIG_DM9000=y -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -CONFIG_PPP_MPPE=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_SDIO=m -CONFIG_ZD1211RW=m -CONFIG_ZD1211RW_DEBUG=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=m -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_SERIO_RAW=y -CONFIG_LEGACY_PTY_COUNT=128 -CONFIG_SERIAL_SAMSUNG=y -CONFIG_SERIAL_SAMSUNG_CONSOLE=y -CONFIG_SERIAL_DEV_BUS=m -CONFIG_IPMI_HANDLER=m -CONFIG_IPMI_DEVICE_INTERFACE=m -CONFIG_IPMI_SI=m -CONFIG_IPMI_WATCHDOG=m -CONFIG_IPMI_POWEROFF=m -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_S3C2410=y -CONFIG_I2C_SIMTEC=y -CONFIG_SPI=y -CONFIG_SPI_S3C24XX=y -CONFIG_SPI_SPIDEV=y -CONFIG_GPIO_SYSFS=y -CONFIG_SENSORS_LM75=y -CONFIG_THERMAL=y -CONFIG_WATCHDOG=y -CONFIG_S3C2410_WATCHDOG=y -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_TILEBLITTING=y -CONFIG_FB_S3C2410=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_PLATFORM=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_PWM=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_SEQUENCER=m -CONFIG_SND_SEQ_DUMMY=m -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_HIDRAW=y -CONFIG_HID_GYRATION=y -CONFIG_HID_NTRIG=y -CONFIG_HID_PANTHERLORD=y -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -CONFIG_HID_TOPSEED=y -CONFIG_HID_PID=y -CONFIG_USB_HIDDEV=y -CONFIG_USB=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_ACM=m -CONFIG_USB_WDM=m -CONFIG_USB_STORAGE=m -CONFIG_USB_STORAGE_DATAFAB=m -CONFIG_USB_STORAGE_ISD200=m -CONFIG_USB_STORAGE_USBAT=m -CONFIG_USB_STORAGE_SDDR09=m -CONFIG_USB_STORAGE_SDDR55=m -CONFIG_USB_STORAGE_JUMPSHOT=m -CONFIG_USB_STORAGE_ALAUDA=m -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_CP210X=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_GADGET=y -CONFIG_USB_S3C2410=y -CONFIG_USB_ZERO=m -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_MMC=y -CONFIG_SDIO_UART=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SPI=y -CONFIG_MMC_S3C=y -CONFIG_LEDS_S3C24XX=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_INTF_DEV_UIE_EMUL=y -CONFIG_RTC_DRV_S3C=y -CONFIG_DMADEVICES=y -CONFIG_S3C24XX_DMAC=y -CONFIG_PWM=y -CONFIG_PWM_SAMSUNG=y -CONFIG_EXT2_FS=m -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_AUTOFS4_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=y -CONFIG_ROMFS_FS=y -CONFIG_ROMFS_BACKED_BY_BOTH=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_DEFAULT="cp437" -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=m -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_LZO=m -CONFIG_LIBCRC32C=m -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_MINI_4x6=y -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_DEBUG_KERNEL=y -CONFIG_STRIP_ASM_SYMS=y -CONFIG_DEBUG_FS=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_DEBUG_USER=y diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig index 877c5150a987..3a1088079514 100644 --- a/arch/arm/configs/mv78xx0_defconfig +++ b/arch/arm/configs/mv78xx0_defconfig @@ -11,13 +11,10 @@ CONFIG_ARCH_MULTI_V5=y # CONFIG_ARCH_MULTI_V6 is not set # CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_MV78XX0=y -CONFIG_MACH_DB78X00_BP=y -CONFIG_MACH_RD78X00_MASA=y CONFIG_MACH_TERASTATION_WXL=y CONFIG_AEABI=y CONFIG_HIGHMEM=y CONFIG_FPE_NWFPE=y -CONFIG_UNUSED_BOARD_FILES=y CONFIG_VFP=y CONFIG_KPROBES=y CONFIG_MODULES=y diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig index 246f1bba7df5..53dd0717cea5 100644 --- a/arch/arm/configs/omap1_defconfig +++ b/arch/arm/configs/omap1_defconfig @@ -20,8 +20,6 @@ CONFIG_ARCH_OMAP=y CONFIG_ARCH_OMAP1=y CONFIG_OMAP_32K_TIMER=y CONFIG_OMAP_DM_TIMER=y -CONFIG_ARCH_OMAP730=y -CONFIG_ARCH_OMAP850=y CONFIG_ARCH_OMAP16XX=y # CONFIG_OMAP_MUX is not set CONFIG_OMAP_RESET_CLOCKS=y diff --git a/arch/arm/configs/palmz72_defconfig b/arch/arm/configs/palmz72_defconfig deleted file mode 100644 index a9a808bc2f70..000000000000 --- a/arch/arm/configs/palmz72_defconfig +++ /dev/null @@ -1,75 +0,0 @@ -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_PREEMPT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_ARCH_PXA_PALM=y -# CONFIG_MACH_PALMTX is not set -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="mem=32M console=tty root=/dev/mmcblk0" -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_APM_EMULATION=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_IPV6 is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_PXA27x=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_PXA=y -CONFIG_SPI=y -CONFIG_SPI_SPIDEV=y -CONFIG_GPIO_SYSFS=y -CONFIG_POWER_SUPPLY=y -CONFIG_PDA_POWER=y -# CONFIG_HWMON is not set -CONFIG_FB=y -CONFIG_FB_PXA=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_PWM=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_USB_SUPPORT is not set -CONFIG_MMC=y -CONFIG_MMC_DEBUG=y -CONFIG_MMC_PXA=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_PXA=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_DNOTIFY is not set -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=866 -CONFIG_FAT_DEFAULT_IOCHARSET="utf8" -CONFIG_TMPFS=y -# CONFIG_NETWORK_FILESYSTEMS is not set -CONFIG_NLS_DEFAULT="utf8" -CONFIG_NLS_CODEPAGE_866=y -CONFIG_NLS_UTF8=y -CONFIG_CRC_T10DIF=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_DEBUG_USER=y diff --git a/arch/arm/configs/pcm027_defconfig b/arch/arm/configs/pcm027_defconfig deleted file mode 100644 index a392312a13ce..000000000000 --- a/arch/arm/configs/pcm027_defconfig +++ /dev/null @@ -1,90 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_NO_HZ_IDLE=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_EXPERT=y -# CONFIG_KALLSYMS is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_PCM027=y -CONFIG_MACH_PCM990_BASEBOARD=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -# CONFIG_SWAP is not set -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -# CONFIG_BLK_DEV is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_PXA=y -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PXA2XX_AC97=y -CONFIG_USB=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_MMC=y -CONFIG_MMC_PXA=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_PCF8563=m -CONFIG_RTC_DRV_PXA=m -CONFIG_EXT2_FS=m -CONFIG_EXT3_FS=m -# CONFIG_DNOTIFY is not set -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_CODEPAGE=850 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_DEFAULT="iso8859-15" -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_15=y -CONFIG_MAGIC_SYSRQ=y diff --git a/arch/arm/configs/pleb_defconfig b/arch/arm/configs/pleb_defconfig deleted file mode 100644 index fd2667873273..000000000000 --- a/arch/arm/configs/pleb_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -# CONFIG_HOTPLUG is not set -# CONFIG_SHMEM is not set -CONFIG_ARCH_MULTI_V4=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_SA1100=y -CONFIG_SA1100_PLEB=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttySA0,9600 mem=16M@0xc0000000 mem=16M@0xc8000000 root=/dev/ram initrd=0xc0400000,4M" -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -# CONFIG_SWAP is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_SYN_COOKIES=y -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_SA1100=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -# CONFIG_INPUT is not set -# CONFIG_SERIO is not set -# CONFIG_VT is not set -CONFIG_SERIAL_SA1100=y -CONFIG_SERIAL_SA1100_CONSOLE=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_DNOTIFY is not set -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_NLS=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig index 826ebbef2e3c..8422ddc9bab2 100644 --- a/arch/arm/configs/pxa168_defconfig +++ b/arch/arm/configs/pxa168_defconfig @@ -1,9 +1,6 @@ CONFIG_SYSVIPC=y CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_MACH_ASPENITE=y -CONFIG_MACH_ZYLONITE2=y -CONFIG_MACH_AVENGERS_LITE=y CONFIG_NO_HZ_IDLE=y CONFIG_HIGH_RES_TIMERS=y CONFIG_PREEMPT=y diff --git a/arch/arm/configs/pxa255-idp_defconfig b/arch/arm/configs/pxa255-idp_defconfig deleted file mode 100644 index ae0444949a87..000000000000 --- a/arch/arm/configs/pxa255-idp_defconfig +++ /dev/null @@ -1,55 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_ARCH_PXA_IDP=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=/dev/nfs ip=dhcp console=ttyS0,115200 mem=64M" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_NET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set -# CONFIG_MTD_CFI_I1 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_FB=y -CONFIG_FB_PXA=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_EXT2_FS=y -CONFIG_MSDOS_FS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_ISO8859_1=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/pxa910_defconfig b/arch/arm/configs/pxa910_defconfig index 353008de5678..48e41ca582af 100644 --- a/arch/arm/configs/pxa910_defconfig +++ b/arch/arm/configs/pxa910_defconfig @@ -11,8 +11,6 @@ CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_MACH_TAVOREVB=y -CONFIG_MACH_TTC_DKB=y CONFIG_AEABI=y CONFIG_FPE_NWFPE=y CONFIG_SLAB=y diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig index 0a0f12df40b5..74c7145c79ea 100644 --- a/arch/arm/configs/pxa_defconfig +++ b/arch/arm/configs/pxa_defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_GUMSTIX=y CONFIG_PXA_SHARPSL=y CONFIG_MACH_AKITA=y CONFIG_MACH_BORZOI=y -CONFIG_PXA_SYSTEMS_CPLDS=y CONFIG_AEABI=y CONFIG_ARCH_FORCE_MAX_ORDER=9 CONFIG_CMDLINE="root=/dev/ram0 ro" @@ -397,9 +396,7 @@ CONFIG_FB_VIRTUAL=m CONFIG_FB_SIMPLE=y CONFIG_LCD_CORGI=m CONFIG_LCD_PLATFORM=m -CONFIG_LCD_TOSA=m CONFIG_BACKLIGHT_PWM=m -CONFIG_BACKLIGHT_TOSA=m CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y CONFIG_LOGO=y diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig deleted file mode 100644 index 41b40863a78e..000000000000 --- a/arch/arm/configs/s3c2410_defconfig +++ /dev/null @@ -1,437 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_IKCONFIG=m -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_BLK_DEV_INITRD=y -CONFIG_ARCH_MULTI_V4T=y -CONFIG_ARCH_MULTI_V5=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_S3C24XX=y -CONFIG_S3C_ADC=y -CONFIG_CPU_S3C2412=y -CONFIG_CPU_S3C2416=y -CONFIG_CPU_S3C2440=y -CONFIG_CPU_S3C2442=y -CONFIG_CPU_S3C2443=y -CONFIG_MACH_AML_M5900=y -CONFIG_ARCH_BAST=y -CONFIG_ARCH_H1940=y -CONFIG_MACH_N30=y -CONFIG_MACH_OTOM=y -CONFIG_MACH_QT2410=y -CONFIG_ARCH_SMDK2410=y -CONFIG_MACH_TCT_HAMMER=y -CONFIG_MACH_VR1000=y -CONFIG_MACH_JIVE=y -CONFIG_MACH_SMDK2412=y -CONFIG_MACH_VSTMS=y -CONFIG_MACH_SMDK2416=y -CONFIG_MACH_ANUBIS=y -CONFIG_MACH_AT2440EVB=y -CONFIG_MACH_MINI2440=y -CONFIG_MACH_NEXCODER_2440=y -CONFIG_MACH_OSIRIS=y -CONFIG_MACH_OSIRIS_DVS=m -CONFIG_MACH_RX3715=y -CONFIG_ARCH_S3C2440=y -CONFIG_MACH_NEO1973_GTA02=y -CONFIG_MACH_RX1950=y -CONFIG_MACH_SMDK2443=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" -CONFIG_FPE_NWFPE=y -CONFIG_FPE_NWFPE_XP=y -CONFIG_APM_EMULATION=m -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_BSD_DISKLABEL=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=m -CONFIG_NET_KEY=m -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_NET_IPIP=m -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_IPV6_TUNNEL=m -CONFIG_NETFILTER=y -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_LED=m -CONFIG_NETFILTER_XT_TARGET_LOG=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_IP_VS=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -CONFIG_BT_HCIVHCI=m -CONFIG_CFG80211=m -CONFIG_MAC80211=m -CONFIG_MAC80211_MESH=y -CONFIG_MAC80211_LEDS=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_ROM=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_NAND_S3C2410=y -CONFIG_PARPORT=y -CONFIG_PARPORT_PC=m -CONFIG_PARPORT_AX88796=m -CONFIG_PARPORT_1284=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_RAM=y -CONFIG_ATA_OVER_ETH=m -CONFIG_EEPROM_AT24=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=m -CONFIG_BLK_DEV_SR=y -CONFIG_CHR_DEV_SG=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_ATA=y -CONFIG_PATA_PLATFORM=y -CONFIG_NETDEVICES=y -CONFIG_DM9000=y -CONFIG_INPUT_EVDEV=y -CONFIG_MOUSE_APPLETOUCH=m -CONFIG_MOUSE_BCM5974=m -CONFIG_INPUT_JOYSTICK=y -CONFIG_JOYSTICK_ANALOG=m -CONFIG_JOYSTICK_A3D=m -CONFIG_JOYSTICK_ADI=m -CONFIG_JOYSTICK_COBRA=m -CONFIG_JOYSTICK_GF2K=m -CONFIG_JOYSTICK_GRIP=m -CONFIG_JOYSTICK_GRIP_MP=m -CONFIG_JOYSTICK_GUILLEMOT=m -CONFIG_JOYSTICK_INTERACT=m -CONFIG_JOYSTICK_SIDEWINDER=m -CONFIG_JOYSTICK_TMDC=m -CONFIG_JOYSTICK_IFORCE=m -CONFIG_JOYSTICK_MAGELLAN=m -CONFIG_JOYSTICK_SPACEORB=m -CONFIG_JOYSTICK_SPACEBALL=m -CONFIG_JOYSTICK_STINGER=m -CONFIG_JOYSTICK_TWIDJOY=m -CONFIG_JOYSTICK_ZHENHUA=m -CONFIG_JOYSTICK_DB9=m -CONFIG_JOYSTICK_GAMECON=m -CONFIG_JOYSTICK_TURBOGRAFX=m -CONFIG_JOYSTICK_JOYDUMP=m -CONFIG_JOYSTICK_XPAD=m -CONFIG_JOYSTICK_XPAD_FF=y -CONFIG_JOYSTICK_XPAD_LEDS=y -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_USB_COMPOSITE=m -CONFIG_INPUT_MISC=y -CONFIG_INPUT_ATI_REMOTE2=m -CONFIG_INPUT_KEYSPAN_REMOTE=m -CONFIG_INPUT_POWERMATE=m -CONFIG_INPUT_YEALINK=m -CONFIG_INPUT_CM109=m -CONFIG_INPUT_UINPUT=m -CONFIG_INPUT_GPIO_ROTARY_ENCODER=m -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=8 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_SAMSUNG=y -CONFIG_SERIAL_SAMSUNG_CONSOLE=y -CONFIG_SERIAL_NONSTANDARD=y -CONFIG_SERIAL_DEV_BUS=m -CONFIG_PRINTER=y -CONFIG_PPDEV=y -CONFIG_HW_RANDOM=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_S3C2410=y -CONFIG_I2C_SIMTEC=y -CONFIG_SPI=y -CONFIG_SPI_GPIO=m -CONFIG_SPI_S3C24XX=m -CONFIG_SPI_SPIDEV=m -CONFIG_SPI_TLE62X0=m -CONFIG_SENSORS_LM75=m -CONFIG_SENSORS_LM78=m -CONFIG_SENSORS_LM85=m -CONFIG_WATCHDOG=y -CONFIG_S3C2410_WATCHDOG=y -CONFIG_MFD_SM501=y -CONFIG_TPS65010=y -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_S3C2410=y -CONFIG_FB_SM501=y -CONFIG_BACKLIGHT_PWM=m -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_VERBOSE_PRINTK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_SOC=y -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_STORAGE=m -CONFIG_USB_STORAGE_DATAFAB=m -CONFIG_USB_STORAGE_FREECOM=m -CONFIG_USB_STORAGE_ISD200=m -CONFIG_USB_STORAGE_USBAT=m -CONFIG_USB_STORAGE_SDDR09=m -CONFIG_USB_STORAGE_SDDR55=m -CONFIG_USB_STORAGE_JUMPSHOT=m -CONFIG_USB_STORAGE_ALAUDA=m -CONFIG_USB_STORAGE_ONETOUCH=m -CONFIG_USB_STORAGE_KARMA=m -CONFIG_USB_STORAGE_CYPRESS_ATACB=m -CONFIG_USB_MDC800=m -CONFIG_USB_MICROTEK=m -CONFIG_USB_USS720=m -CONFIG_USB_SERIAL=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_FTDI_SIO=y -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=y -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_ADUTUX=m -CONFIG_USB_SEVSEG=m -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -CONFIG_USB_APPLEDISPLAY=m -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -CONFIG_USB_IOWARRIOR=m -CONFIG_USB_TEST=m -CONFIG_MMC=y -CONFIG_SDIO_UART=m -CONFIG_MMC_TEST=m -CONFIG_MMC_SDHCI=m -CONFIG_MMC_SPI=m -CONFIG_MMC_S3C=y -CONFIG_LEDS_S3C24XX=m -CONFIG_LEDS_PCA9532=m -CONFIG_LEDS_GPIO=m -CONFIG_LEDS_PCA955X=m -CONFIG_LEDS_DAC124S085=m -CONFIG_LEDS_PWM=m -CONFIG_LEDS_BD2802=m -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_S3C=y -CONFIG_DMADEVICES=y -CONFIG_S3C24XX_DMAC=y -CONFIG_PWM=y -CONFIG_PWM_SAMSUNG=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m -CONFIG_ISO9660_FS=y -CONFIG_JOLIET=y -CONFIG_UDF_FS=m -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_NTFS_FS=m -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_CONFIGFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_CRAMFS=y -CONFIG_SQUASHFS=m -CONFIG_ROMFS_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_CIFS=m -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=m -CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y -CONFIG_DEBUG_KERNEL=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/shannon_defconfig b/arch/arm/configs/shannon_defconfig deleted file mode 100644 index dfcea70b8034..000000000000 --- a/arch/arm/configs/shannon_defconfig +++ /dev/null @@ -1,45 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_ARCH_MULTI_V4=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_SA1100=y -CONFIG_SA1100_SHANNON=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="console=ttySA0,9600 console=tty1 root=/dev/mtdblock2 init=/linuxrc" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IPV6 is not set -CONFIG_PCCARD=y -CONFIG_PCMCIA_SA1100=y -CONFIG_MTD=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_SA1100=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCMCIA=y -CONFIG_PCMCIA_PCNET=y -CONFIG_PCMCIA_SMC91C92=y -CONFIG_SERIAL_SA1100=y -CONFIG_SERIAL_SA1100_CONSOLE=y -CONFIG_WATCHDOG=y -CONFIG_SA1100_WATCHDOG=y -CONFIG_FB=y -CONFIG_FB_SA1100=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_SOUND=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_JFFS2_FS=y -CONFIG_MINIX_FS=y -CONFIG_NFS_FS=y -CONFIG_DEBUG_USER=y diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig deleted file mode 100644 index 4e00a4c2c287..000000000000 --- a/arch/arm/configs/simpad_defconfig +++ /dev/null @@ -1,100 +0,0 @@ -CONFIG_LOCALVERSION="oe1" -CONFIG_SYSVIPC=y -CONFIG_PREEMPT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_EXPERT=y -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_ARCH_MULTI_V4=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_SA1100=y -CONFIG_SA1100_SIMPAD=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="mtdparts=sa1100:512k(boot),1m(kernel),-(root) console=ttySA0 root=1f02 noinitrd mem=64M jffs2_orphaned_inodes=delete rootfstype=jffs2" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_BINFMT_MISC=m -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_PCCARD=y -CONFIG_PCMCIA_SA1100=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I2 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_RAM=y -CONFIG_MTD_SA1100=y -CONFIG_BLK_DEV_LOOP=m -CONFIG_BLK_DEV_RAM=m -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_NETDEVICES=y -CONFIG_DUMMY=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y -CONFIG_NET_PCMCIA=y -CONFIG_PCMCIA_3C574=m -CONFIG_PCMCIA_3C589=m -CONFIG_PCMCIA_PCNET=m -CONFIG_PCMCIA_SMC91C92=m -CONFIG_PCMCIA_XIRC2PS=m -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -CONFIG_PPP_MULTILINK=y -CONFIG_PPPOE=m -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_INPUT_MOUSEDEV_SCREEN_X=800 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=600 -CONFIG_INPUT_EVDEV=m -CONFIG_INPUT_EVBUG=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_SERIO=m -CONFIG_SERIAL_SA1100=y -CONFIG_SERIAL_SA1100_CONSOLE=y -CONFIG_FB=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_EXT2_FS=m -CONFIG_EXT3_FS=m -CONFIG_REISERFS_FS=m -CONFIG_REISERFS_PROC_INFO=y -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=m -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_SMB_FS=m -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_15=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig deleted file mode 100644 index 6bd38b6f22c4..000000000000 --- a/arch/arm/configs/tct_hammer_defconfig +++ /dev/null @@ -1,59 +0,0 @@ -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -# CONFIG_ELF_CORE is not set -# CONFIG_SHMEM is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_KALLSYMS is not set -CONFIG_ARCH_MULTI_V4T=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_S3C24XX=y -CONFIG_MACH_TCT_HAMMER=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="mem=64M root=/dev/ram0 init=/linuxrc rw" -CONFIG_FPE_NWFPE=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_SWAP is not set -CONFIG_SLUB=y -CONFIG_SLUB_TINY=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -CONFIG_MTD=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=10240 -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -# CONFIG_VT_CONSOLE is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_GADGET=y -CONFIG_USB_S3C2410=y -CONFIG_USB_ETH=m -CONFIG_EXT2_FS=y -# CONFIG_DNOTIFY is not set -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -# CONFIG_PROC_SYSCTL is not set -CONFIG_JFFS2_FS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_CRC_CCITT=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig deleted file mode 100644 index 009abe1e49ef..000000000000 --- a/arch/arm/configs/trizeps4_defconfig +++ /dev/null @@ -1,207 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_PREEMPT=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -CONFIG_KALLSYMS_EXTRA_PASS=y -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_TRIZEPS_PXA=y -CONFIG_MACH_TRIZEPS4=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=fe01 console=ttyS0,38400n8 loglevel=5" -CONFIG_FPE_NWFPE=y -CONFIG_FPE_NWFPE_XP=y -CONFIG_PM=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_LDM_PARTITION=y -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=m -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IPV6 is not set -CONFIG_NETFILTER=y -CONFIG_VLAN_8021Q=m -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_CFG80211=y -CONFIG_PCCARD=y -# CONFIG_PCMCIA_LOAD_CIS is not set -CONFIG_PCMCIA_PXA2XX=y -CONFIG_CONNECTOR=y -CONFIG_MTD=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y -CONFIG_MTD_REDBOOT_PARTS_READONLY=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_LE_BYTE_SWAP=y -CONFIG_MTD_CFI_GEOMETRY=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_BLOCK2MTD=y -CONFIG_MTD_DOC2000=y -CONFIG_MTD_DOC2001=y -CONFIG_MTD_DOC2001PLUS=y -CONFIG_MTD_DOCPROBE_ADVANCED=y -CONFIG_MTD_DOCPROBE_ADDRESS=0x4000000 -CONFIG_MTD_DOCPROBE_HIGH=y -CONFIG_MTD_ONENAND=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_NAND_DISKONCHIP=y -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000 -CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y -CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_NBD=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=8 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_ATA=m -CONFIG_PATA_PCMCIA=m -CONFIG_PATA_PLATFORM=m -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_DM9000=y -CONFIG_PHYLIB=y -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -CONFIG_PPP_MPPE=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_HOSTAP=y -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -CONFIG_HOSTAP_CS=y -CONFIG_HERMES=y -CONFIG_PCMCIA_HERMES=y -CONFIG_PCMCIA_SPECTRUM=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_MOUSE_PS2 is not set -CONFIG_MOUSE_SERIAL=m -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=m -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_PXA=y -CONFIG_I2C_PXA_SLAVE=y -CONFIG_WATCHDOG=y -CONFIG_SA1100_WATCHDOG=y -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_PXA=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_LOGO=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_VERBOSE_PRINTK=y -CONFIG_SND_DEBUG=y -CONFIG_SND_SEQUENCER=y -CONFIG_SND_PXA2XX_AC97=y -CONFIG_SND_USB_AUDIO=m -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=m -CONFIG_USB_SERIAL=m -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_DUMMY_HCD=y -CONFIG_MMC=y -CONFIG_MMC_PXA=y -CONFIG_NEW_LEDS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_HCTOSYS is not set -CONFIG_RTC_DRV_PCF8583=m -CONFIG_RTC_DRV_PXA=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_AUTOFS4_FS=y -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=y -CONFIG_NFSD_V4=y -CONFIG_SMB_FS=m -CONFIG_CIFS=m -CONFIG_NLS_DEFAULT="iso8859-15" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_UTF8=m -CONFIG_KEYS=y -CONFIG_SECURITY=y -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_LIBCRC32C=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_USER=y diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig deleted file mode 100644 index 02f9849893b2..000000000000 --- a/arch/arm/configs/viper_defconfig +++ /dev/null @@ -1,160 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=13 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_EXPERT=y -# CONFIG_ELF_CORE is not set -# CONFIG_SHMEM is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_ARCH_VIPER=y -CONFIG_IWMMXT=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200" -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=m -CONFIG_CPU_FREQ_GOV_ONDEMAND=m -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m -CONFIG_FPE_FASTFPE=y -CONFIG_PM=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -# CONFIG_SWAP is not set -CONFIG_SLAB=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_SYN_COOKIES=y -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_PCCARD=m -CONFIG_PCMCIA_PXA2XX=m -CONFIG_FW_LOADER=m -CONFIG_MTD=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=0 -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set -# CONFIG_MTD_CFI_I2 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_RAM=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PXA2XX=y -CONFIG_BLK_DEV_LOOP=m -# CONFIG_SCSI_PROC_FS is not set -CONFIG_BLK_DEV_SD=m -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ATA=m -# CONFIG_SATA_PMP is not set -CONFIG_PATA_PCMCIA=m -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_ASYNC=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_USBNET=m -# CONFIG_USB_NET_CDC_SUBSET is not set -CONFIG_NET_PCMCIA=y -CONFIG_INPUT_MOUSEDEV=m -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_EVDEV=m -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_FUJITSU=m -CONFIG_TOUCHSCREEN_ELO=m -CONFIG_TOUCHSCREEN_MTOUCH=m -CONFIG_TOUCHSCREEN_INEXIO=m -CONFIG_TOUCHSCREEN_HTCPEN=m -CONFIG_TOUCHSCREEN_PENMOUNT=m -CONFIG_TOUCHSCREEN_TOUCHRIGHT=m -CONFIG_TOUCHSCREEN_TOUCHWIN=m -CONFIG_TOUCHSCREEN_TOUCHIT213=m -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=m -# CONFIG_CONSOLE_TRANSLATIONS is not set -# CONFIG_VT_CONSOLE is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=m -CONFIG_SERIAL_8250_NR_UARTS=5 -CONFIG_SERIAL_8250_RUNTIME_UARTS=5 -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -# CONFIG_I2C_HELPER_AUTO is not set -CONFIG_I2C_PXA=y -CONFIG_GPIO_SYSFS=y -CONFIG_WATCHDOG=y -CONFIG_FB=y -CONFIG_FB_PXA=m -CONFIG_FB_PXA_PARAMETERS=y -CONFIG_BACKLIGHT_PWM=m -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_PXA2XX_AC97=m -CONFIG_USB=m -CONFIG_USB_ISP116X_HCD=m -CONFIG_USB_SL811_HCD=m -CONFIG_USB_R8A66597_HCD=m -CONFIG_USB_ACM=m -CONFIG_USB_STORAGE=m -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_GADGET=m -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_G_PRINTER=m -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS1307=m -CONFIG_RTC_DRV_SA1100=m -CONFIG_EXT2_FS=m -CONFIG_EXT3_FS=m -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_DNOTIFY is not set -CONFIG_VFAT_FS=m -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_UTF8=m -CONFIG_CRC_T10DIF=m -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_FTRACE is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_ARC4=m diff --git a/arch/arm/configs/xcep_defconfig b/arch/arm/configs/xcep_defconfig deleted file mode 100644 index 6bd9f71b71fc..000000000000 --- a/arch/arm/configs/xcep_defconfig +++ /dev/null @@ -1,90 +0,0 @@ -CONFIG_LOCALVERSION=".xcep-itech" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_NO_HZ_IDLE=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -# CONFIG_UID16 is not set -# CONFIG_SHMEM is not set -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_XCEP=y -CONFIG_IWMMXT=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=mtd4 rootfstype=jffs2 ro console=ttyS0,115200" -CONFIG_FPE_NWFPE=y -CONFIG_KPROBES=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLOCK is not set -CONFIG_SLUB=y -CONFIG_SLUB_TINY=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_VM_EVENT_COUNTERS is not set -CONFIG_NET=y -CONFIG_PACKET=m -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_FW_LOADER is not set -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PXA2XX=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=m -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_PXA=m -CONFIG_HWMON=m -CONFIG_SENSORS_ADM1021=m -CONFIG_SENSORS_MAX6650=m -# CONFIG_VGA_CONSOLE is not set -# CONFIG_USB_SUPPORT is not set -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_SA1100=m -CONFIG_DMADEVICES=y -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_WBUF_VERIFY=y -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_NLS=m -CONFIG_NLS_DEFAULT="utf8" -CONFIG_NLS_UTF8=m -# CONFIG_CRYPTO_HW is not set -CONFIG_LIBCRC32C=m -CONFIG_PRINTK_TIME=y -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_STRIP_ASM_SYMS=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_FTRACE is not set -# CONFIG_ARM_UNWIND is not set -# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig deleted file mode 100644 index c4535315e216..000000000000 --- a/arch/arm/configs/zeus_defconfig +++ /dev/null @@ -1,173 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_TINY_RCU=y -CONFIG_LOG_BUF_SHIFT=13 -# CONFIG_ARCH_MULTI_V7 is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_ARCOM_ZEUS=y -CONFIG_AEABI=y -CONFIG_UNUSED_BOARD_FILES=y -CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200" -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=m -CONFIG_CPU_FREQ_GOV_ONDEMAND=m -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_APM_EMULATION=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_SYN_COOKIES=y -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_CFG80211=m -CONFIG_LIB80211=m -CONFIG_MAC80211=m -CONFIG_PCCARD=m -CONFIG_PCMCIA_PXA2XX=m -CONFIG_MTD=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_REDBOOT_PARTS_READONLY=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set -# CONFIG_MTD_CFI_I2 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_RAM=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PXA2XX=y -CONFIG_BLK_DEV_LOOP=m -CONFIG_EEPROM_AT24=m -# CONFIG_SCSI_PROC_FS is not set -CONFIG_BLK_DEV_SD=m -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ATA=m -# CONFIG_SATA_PMP is not set -CONFIG_PATA_PCMCIA=m -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_DM9000=y -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_ASYNC=m -CONFIG_HERMES=m -CONFIG_PCMCIA_HERMES=m -CONFIG_RT2X00=m -CONFIG_RT73USB=m -CONFIG_NET_PCMCIA=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_EVDEV=m -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_FUJITSU=m -CONFIG_TOUCHSCREEN_ELO=m -CONFIG_TOUCHSCREEN_MTOUCH=m -CONFIG_TOUCHSCREEN_INEXIO=m -CONFIG_TOUCHSCREEN_HTCPEN=m -CONFIG_TOUCHSCREEN_PENMOUNT=m -CONFIG_TOUCHSCREEN_TOUCHRIGHT=m -CONFIG_TOUCHSCREEN_TOUCHWIN=m -CONFIG_TOUCHSCREEN_TOUCHIT213=m -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=m -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=7 -CONFIG_SERIAL_8250_RUNTIME_UARTS=7 -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -# CONFIG_I2C_HELPER_AUTO is not set -CONFIG_I2C_GPIO=y -CONFIG_I2C_PXA=y -CONFIG_SPI=y -CONFIG_SPI_PXA2XX=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_PCA953X=y -CONFIG_SENSORS_LM75=m -CONFIG_WATCHDOG=y -CONFIG_FB=y -CONFIG_FB_PXA=m -CONFIG_FB_PXA_PARAMETERS=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -# CONFIG_SND_SUPPORT_OLD_API is not set -CONFIG_SND_PXA2XX_AC97=m -# CONFIG_SND_SPI is not set -# CONFIG_SND_PCMCIA is not set -CONFIG_SND_SOC=m -CONFIG_SND_PXA2XX_SOC=m -CONFIG_USB=m -CONFIG_USB_OHCI_HCD=m -CONFIG_USB_ACM=m -CONFIG_USB_STORAGE=m -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_GADGET=m -CONFIG_USB_PXA27X=y -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_G_PRINTER=m -CONFIG_MMC=y -CONFIG_MMC_PXA=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m -CONFIG_LEDS_GPIO=m -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=m -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_ISL1208=m -CONFIG_RTC_DRV_PXA=m -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_DNOTIFY is not set -CONFIG_VFAT_FS=m -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_UTF8=m -CONFIG_CRC_T10DIF=m -CONFIG_DEBUG_KERNEL=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/arm/include/debug/s3c24xx.S b/arch/arm/include/debug/s3c24xx.S index af873b526677..7ab5e577cd42 100644 --- a/arch/arm/include/debug/s3c24xx.S +++ b/arch/arm/include/debug/s3c24xx.S @@ -28,16 +28,6 @@ and \rd, \rd, #S3C2410_UFSTAT_TXMASK .endm -/* Select the correct implementation depending on the configuration. The - * S3C2440 will get selected by default, as these are the most widely - * used variants of these -*/ - -#if defined(CONFIG_DEBUG_S3C2410_UART) -#define fifo_full fifo_full_s3c2410 -#define fifo_level fifo_level_s3c2410 -#endif - /* include the reset of the code which will do the work */ #include <debug/samsung.S> diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 405a607b754f..03d4c5578c5c 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -16,15 +16,6 @@ .equ NR_syscalls, __NR_syscalls - .macro arch_ret_to_user, tmp -#ifdef CONFIG_ARCH_IOP32X - mrc p15, 0, \tmp, c15, c1, 0 - tst \tmp, #(1 << 6) - bicne \tmp, \tmp, #(1 << 6) - mcrne p15, 0, \tmp, c15, c1, 0 @ Disable cp6 access -#endif - .endm - #include "entry-header.S" saved_psr .req r8 @@ -55,10 +46,6 @@ __ret_fast_syscall: movs r1, r1, lsl #16 bne fast_work_pending - - /* perform architecture specific actions before user return */ - arch_ret_to_user r1 - restore_user_regs fast = 1, offset = S_OFF UNWIND(.fnend ) ENDPROC(ret_fast_syscall) @@ -129,8 +116,6 @@ ENTRY(ret_to_user_from_irq) no_work_pending: asm_trace_hardirqs_on save = 0 - /* perform architecture specific actions before user return */ - arch_ret_to_user r1 ct_user_enter save = 0 restore_user_regs fast = 0, offset = 0 diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 29e2900178a1..656991055bc1 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -344,7 +344,7 @@ __create_page_tables: ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags #endif -#if defined(CONFIG_ARCH_NETWINDER) || defined(CONFIG_ARCH_CATS) +#if defined(CONFIG_ARCH_NETWINDER) /* * If we're using the NetWinder or CATS, we also need to map * in the 16550-type serial port for the debug messages diff --git a/arch/arm/mach-cns3xxx/Kconfig b/arch/arm/mach-cns3xxx/Kconfig deleted file mode 100644 index 1f85deff2486..000000000000 --- a/arch/arm/mach-cns3xxx/Kconfig +++ /dev/null @@ -1,21 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -menuconfig ARCH_CNS3XXX - bool "Cavium Networks CNS3XXX family" - depends on ARCH_MULTI_V6 - depends on ATAGS && UNUSED_BOARD_FILES - select ARM_GIC - help - Support for Cavium Networks CNS3XXX platform. - -if ARCH_CNS3XXX - -config MACH_CNS3420VB - bool "Support for CNS3420 Validation Board" - depends on ATAGS - help - Include support for the Cavium Networks CNS3420 MPCore Platform - Baseboard. - This is a platform with an on-board ARM11 MPCore and has support - for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc. - -endif diff --git a/arch/arm/mach-cns3xxx/Makefile b/arch/arm/mach-cns3xxx/Makefile deleted file mode 100644 index 52ca6ed62304..000000000000 --- a/arch/arm/mach-cns3xxx/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_ARCH_CNS3XXX) += cns3xxx.o -cns3xxx-y += core.o pm.o -cns3xxx-$(CONFIG_ATAGS) += devices.o -cns3xxx-$(CONFIG_PCI) += pcie.o -cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c deleted file mode 100644 index 9099560aa462..000000000000 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ /dev/null @@ -1,252 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Cavium Networks CNS3420 Validation Board - * - * Copyright 2000 Deep Blue Solutions Ltd - * Copyright 2008 ARM Limited - * Copyright 2008 Cavium Networks - * Scott Shu - * Copyright 2010 MontaVista Software, LLC. - * Anton Vorontsov <avorontsov@mvista.com> - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/compiler.h> -#include <linux/io.h> -#include <linux/dma-mapping.h> -#include <linux/serial_core.h> -#include <linux/serial_8250.h> -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/partitions.h> -#include <linux/usb/ehci_pdriver.h> -#include <linux/usb/ohci_pdriver.h> -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> -#include "cns3xxx.h" -#include "pm.h" -#include "core.h" -#include "devices.h" - -/* - * NOR Flash - */ -static struct mtd_partition cns3420_nor_partitions[] = { - { - .name = "uboot", - .size = 0x00040000, - .offset = 0, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .size = 0x004C0000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "filesystem", - .size = 0x7000000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "filesystem2", - .size = 0x0AE0000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "ubootenv", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - }, -}; - -static struct physmap_flash_data cns3420_nor_pdata = { - .width = 2, - .parts = cns3420_nor_partitions, - .nr_parts = ARRAY_SIZE(cns3420_nor_partitions), -}; - -static struct resource cns3420_nor_res = { - .start = CNS3XXX_FLASH_BASE, - .end = CNS3XXX_FLASH_BASE + SZ_128M - 1, - .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, -}; - -static struct platform_device cns3420_nor_pdev = { - .name = "physmap-flash", - .id = 0, - .resource = &cns3420_nor_res, - .num_resources = 1, - .dev = { - .platform_data = &cns3420_nor_pdata, - }, -}; - -/* - * UART - */ -static void __init cns3420_early_serial_setup(void) -{ -#ifdef CONFIG_SERIAL_8250_CONSOLE - static struct uart_port cns3420_serial_port = { - .membase = (void __iomem *)CNS3XXX_UART0_BASE_VIRT, - .mapbase = CNS3XXX_UART0_BASE, - .irq = IRQ_CNS3XXX_UART0, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, - .regshift = 2, - .uartclk = 24000000, - .line = 0, - .type = PORT_16550A, - .fifosize = 16, - }; - - early_serial_setup(&cns3420_serial_port); -#endif -} - -/* - * USB - */ -static struct resource cns3xxx_usb_ehci_resources[] = { - [0] = { - .start = CNS3XXX_USB_BASE, - .end = CNS3XXX_USB_BASE + SZ_16M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_CNS3XXX_USB_EHCI, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32); - -static int csn3xxx_usb_power_on(struct platform_device *pdev) -{ - /* - * EHCI and OHCI share the same clock and power, - * resetting twice would cause the 1st controller been reset. - * Therefore only do power up at the first up device, and - * power down at the last down device. - * - * Set USB AHB INCR length to 16 - */ - if (atomic_inc_return(&usb_pwr_ref) == 1) { - cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB); - cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST); - cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST); - __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)), - MISC_CHIP_CONFIG_REG); - } - - return 0; -} - -static void csn3xxx_usb_power_off(struct platform_device *pdev) -{ - /* - * EHCI and OHCI share the same clock and power, - * resetting twice would cause the 1st controller been reset. - * Therefore only do power up at the first up device, and - * power down at the last down device. - */ - if (atomic_dec_return(&usb_pwr_ref) == 0) - cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST); -} - -static struct usb_ehci_pdata cns3xxx_usb_ehci_pdata = { - .power_on = csn3xxx_usb_power_on, - .power_off = csn3xxx_usb_power_off, -}; - -static struct platform_device cns3xxx_usb_ehci_device = { - .name = "ehci-platform", - .num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources), - .resource = cns3xxx_usb_ehci_resources, - .dev = { - .dma_mask = &cns3xxx_usb_ehci_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &cns3xxx_usb_ehci_pdata, - }, -}; - -static struct resource cns3xxx_usb_ohci_resources[] = { - [0] = { - .start = CNS3XXX_USB_OHCI_BASE, - .end = CNS3XXX_USB_OHCI_BASE + SZ_16M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_CNS3XXX_USB_OHCI, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32); - -static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = { - .num_ports = 1, - .power_on = csn3xxx_usb_power_on, - .power_off = csn3xxx_usb_power_off, -}; - -static struct platform_device cns3xxx_usb_ohci_device = { - .name = "ohci-platform", - .num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources), - .resource = cns3xxx_usb_ohci_resources, - .dev = { - .dma_mask = &cns3xxx_usb_ohci_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &cns3xxx_usb_ohci_pdata, - }, -}; - -/* - * Initialization - */ -static struct platform_device *cns3420_pdevs[] __initdata = { - &cns3420_nor_pdev, - &cns3xxx_usb_ehci_device, - &cns3xxx_usb_ohci_device, -}; - -static void __init cns3420_init(void) -{ - cns3xxx_l2x0_init(); - - platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); - - cns3xxx_ahci_init(); - cns3xxx_sdhci_init(); - - pm_power_off = cns3xxx_power_off; -} - -static struct map_desc cns3420_io_desc[] __initdata = { - { - .virtual = CNS3XXX_UART0_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_UART0_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static void __init cns3420_map_io(void) -{ - cns3xxx_map_io(); - iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc)); - - cns3420_early_serial_setup(); -} - -MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") - .atag_offset = 0x100, - .map_io = cns3420_map_io, - .init_irq = cns3xxx_init_irq, - .init_time = cns3xxx_timer_init, - .init_machine = cns3420_init, - .init_late = cns3xxx_pcie_init_late, - .restart = cns3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-cns3xxx/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h deleted file mode 100644 index cbb105a74f90..000000000000 --- a/arch/arm/mach-cns3xxx/cns3xxx.h +++ /dev/null @@ -1,593 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright 2008 Cavium Networks - */ - -#ifndef __MACH_BOARD_CNS3XXXH -#define __MACH_BOARD_CNS3XXXH - -/* - * Memory map - */ -#define CNS3XXX_FLASH_BASE 0x10000000 /* Flash/SRAM Memory Bank 0 */ -#define CNS3XXX_FLASH_SIZE SZ_256M - -#define CNS3XXX_DDR2SDRAM_BASE 0x20000000 /* DDR2 SDRAM Memory */ - -#define CNS3XXX_SPI_FLASH_BASE 0x60000000 /* SPI Serial Flash Memory */ - -#define CNS3XXX_SWITCH_BASE 0x70000000 /* Switch and HNAT Control */ - -#define CNS3XXX_PPE_BASE 0x70001000 /* HANT */ - -#define CNS3XXX_EMBEDDED_SRAM_BASE 0x70002000 /* HANT Embedded SRAM */ - -#define CNS3XXX_SSP_BASE 0x71000000 /* Synchronous Serial Port - SPI/PCM/I2C */ - -#define CNS3XXX_DMC_BASE 0x72000000 /* DMC Control (DDR2 SDRAM) */ - -#define CNS3XXX_SMC_BASE 0x73000000 /* SMC Control */ - -#define SMC_MEMC_STATUS_OFFSET 0x000 -#define SMC_MEMIF_CFG_OFFSET 0x004 -#define SMC_MEMC_CFG_SET_OFFSET 0x008 -#define SMC_MEMC_CFG_CLR_OFFSET 0x00C -#define SMC_DIRECT_CMD_OFFSET 0x010 -#define SMC_SET_CYCLES_OFFSET 0x014 -#define SMC_SET_OPMODE_OFFSET 0x018 -#define SMC_REFRESH_PERIOD_0_OFFSET 0x020 -#define SMC_REFRESH_PERIOD_1_OFFSET 0x024 -#define SMC_SRAM_CYCLES0_0_OFFSET 0x100 -#define SMC_NAND_CYCLES0_0_OFFSET 0x100 -#define SMC_OPMODE0_0_OFFSET 0x104 -#define SMC_SRAM_CYCLES0_1_OFFSET 0x120 -#define SMC_NAND_CYCLES0_1_OFFSET 0x120 -#define SMC_OPMODE0_1_OFFSET 0x124 -#define SMC_USER_STATUS_OFFSET 0x200 -#define SMC_USER_CONFIG_OFFSET 0x204 -#define SMC_ECC_STATUS_OFFSET 0x300 -#define SMC_ECC_MEMCFG_OFFSET 0x304 -#define SMC_ECC_MEMCOMMAND1_OFFSET 0x308 -#define SMC_ECC_MEMCOMMAND2_OFFSET 0x30C -#define SMC_ECC_ADDR0_OFFSET 0x310 -#define SMC_ECC_ADDR1_OFFSET 0x314 -#define SMC_ECC_VALUE0_OFFSET 0x318 -#define SMC_ECC_VALUE1_OFFSET 0x31C -#define SMC_ECC_VALUE2_OFFSET 0x320 -#define SMC_ECC_VALUE3_OFFSET 0x324 -#define SMC_PERIPH_ID_0_OFFSET 0xFE0 -#define SMC_PERIPH_ID_1_OFFSET 0xFE4 -#define SMC_PERIPH_ID_2_OFFSET 0xFE8 -#define SMC_PERIPH_ID_3_OFFSET 0xFEC -#define SMC_PCELL_ID_0_OFFSET 0xFF0 -#define SMC_PCELL_ID_1_OFFSET 0xFF4 -#define SMC_PCELL_ID_2_OFFSET 0xFF8 -#define SMC_PCELL_ID_3_OFFSET 0xFFC - -#define CNS3XXX_GPIOA_BASE 0x74000000 /* GPIO port A */ - -#define CNS3XXX_GPIOB_BASE 0x74800000 /* GPIO port B */ - -#define CNS3XXX_RTC_BASE 0x75000000 /* Real Time Clock */ - -#define RTC_SEC_OFFSET 0x00 -#define RTC_MIN_OFFSET 0x04 -#define RTC_HOUR_OFFSET 0x08 -#define RTC_DAY_OFFSET 0x0C -#define RTC_SEC_ALM_OFFSET 0x10 -#define RTC_MIN_ALM_OFFSET 0x14 -#define RTC_HOUR_ALM_OFFSET 0x18 -#define RTC_REC_OFFSET 0x1C -#define RTC_CTRL_OFFSET 0x20 -#define RTC_INTR_STS_OFFSET 0x34 - -#define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */ -#define CNS3XXX_MISC_BASE_VIRT 0xFB000000 /* Misc Control */ - -#define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */ -#define CNS3XXX_PM_BASE_VIRT 0xFB001000 - -#define PM_CLK_GATE_OFFSET 0x00 -#define PM_SOFT_RST_OFFSET 0x04 -#define PM_HS_CFG_OFFSET 0x08 -#define PM_CACTIVE_STA_OFFSET 0x0C -#define PM_PWR_STA_OFFSET 0x10 -#define PM_SYS_CLK_CTRL_OFFSET 0x14 -#define PM_PLL_LCD_I2S_CTRL_OFFSET 0x18 -#define PM_PLL_HM_PD_OFFSET 0x1C - -#define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */ -#define CNS3XXX_UART0_BASE_VIRT 0xFB002000 - -#define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */ - -#define CNS3XXX_UART2_BASE 0x78800000 /* UART 2 */ - -#define CNS3XXX_DMAC_BASE 0x79000000 /* Generic DMA Control */ - -#define CNS3XXX_CORESIGHT_BASE 0x7A000000 /* CoreSight */ - -#define CNS3XXX_CRYPTO_BASE 0x7B000000 /* Crypto */ - -#define CNS3XXX_I2S_BASE 0x7C000000 /* I2S */ - -#define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */ -#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFB003000 - -#define TIMER1_COUNTER_OFFSET 0x00 -#define TIMER1_AUTO_RELOAD_OFFSET 0x04 -#define TIMER1_MATCH_V1_OFFSET 0x08 -#define TIMER1_MATCH_V2_OFFSET 0x0C - -#define TIMER2_COUNTER_OFFSET 0x10 -#define TIMER2_AUTO_RELOAD_OFFSET 0x14 -#define TIMER2_MATCH_V1_OFFSET 0x18 -#define TIMER2_MATCH_V2_OFFSET 0x1C - -#define TIMER1_2_CONTROL_OFFSET 0x30 -#define TIMER1_2_INTERRUPT_STATUS_OFFSET 0x34 -#define TIMER1_2_INTERRUPT_MASK_OFFSET 0x38 - -#define TIMER_FREERUN_OFFSET 0x40 -#define TIMER_FREERUN_CONTROL_OFFSET 0x44 - -#define CNS3XXX_HCIE_BASE 0x7D000000 /* HCIE Control */ - -#define CNS3XXX_RAID_BASE 0x7E000000 /* RAID Control */ - -#define CNS3XXX_AXI_IXC_BASE 0x7F000000 /* AXI IXC */ - -#define CNS3XXX_CLCD_BASE 0x80000000 /* LCD Control */ - -#define CNS3XXX_USBOTG_BASE 0x81000000 /* USB OTG Control */ - -#define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */ - -#define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */ -#define CNS3XXX_SATA2_SIZE SZ_16M - -#define CNS3XXX_CAMERA_BASE 0x84000000 /* Camera Interface */ - -#define CNS3XXX_SDIO_BASE 0x85000000 /* SDIO */ - -#define CNS3XXX_I2S_TDM_BASE 0x86000000 /* I2S TDM */ - -#define CNS3XXX_2DG_BASE 0x87000000 /* 2D Graphic Control */ - -#define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */ - -#define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */ - -#define CNS3XXX_PCIE0_MEM_BASE 0xA0000000 /* PCIe Port 0 IO/Memory Space */ - -#define CNS3XXX_PCIE0_HOST_BASE 0xAB000000 /* PCIe Port 0 RC Base */ -#define CNS3XXX_PCIE0_HOST_BASE_VIRT 0xE1000000 - -#define CNS3XXX_PCIE0_IO_BASE 0xAC000000 /* PCIe Port 0 */ - -#define CNS3XXX_PCIE0_CFG0_BASE 0xAD000000 /* PCIe Port 0 CFG Type 0 */ -#define CNS3XXX_PCIE0_CFG0_BASE_VIRT 0xE3000000 - -#define CNS3XXX_PCIE0_CFG1_BASE 0xAE000000 /* PCIe Port 0 CFG Type 1 */ -#define CNS3XXX_PCIE0_CFG1_BASE_VIRT 0xE4000000 - -#define CNS3XXX_PCIE0_MSG_BASE 0xAF000000 /* PCIe Port 0 Message Space */ - -#define CNS3XXX_PCIE1_MEM_BASE 0xB0000000 /* PCIe Port 1 IO/Memory Space */ - -#define CNS3XXX_PCIE1_HOST_BASE 0xBB000000 /* PCIe Port 1 RC Base */ -#define CNS3XXX_PCIE1_HOST_BASE_VIRT 0xE9000000 - -#define CNS3XXX_PCIE1_IO_BASE 0xBC000000 /* PCIe Port 1 */ - -#define CNS3XXX_PCIE1_CFG0_BASE 0xBD000000 /* PCIe Port 1 CFG Type 0 */ -#define CNS3XXX_PCIE1_CFG0_BASE_VIRT 0xEB000000 - -#define CNS3XXX_PCIE1_CFG1_BASE 0xBE000000 /* PCIe Port 1 CFG Type 1 */ -#define CNS3XXX_PCIE1_CFG1_BASE_VIRT 0xEC000000 - -#define CNS3XXX_PCIE1_MSG_BASE 0xBF000000 /* PCIe Port 1 Message Space */ - -/* - * Testchip peripheral and fpga gic regions - */ -#define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */ -#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFB004000 - -#define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */ -#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x100) - -#define CNS3XXX_TC11MP_TWD_BASE 0x90000600 -#define CNS3XXX_TC11MP_TWD_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x600) - -#define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */ -#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x1000) - -#define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */ - -/* - * Misc block - */ -#define MISC_MEM_MAP(offs) (void __iomem *)(CNS3XXX_MISC_BASE_VIRT + (offs)) - -#define MISC_MEMORY_REMAP_REG MISC_MEM_MAP(0x00) -#define MISC_CHIP_CONFIG_REG MISC_MEM_MAP(0x04) -#define MISC_DEBUG_PROBE_DATA_REG MISC_MEM_MAP(0x08) -#define MISC_DEBUG_PROBE_SELECTION_REG MISC_MEM_MAP(0x0C) -#define MISC_IO_PIN_FUNC_SELECTION_REG MISC_MEM_MAP(0x10) -#define MISC_GPIOA_PIN_ENABLE_REG MISC_MEM_MAP(0x14) -#define MISC_GPIOB_PIN_ENABLE_REG MISC_MEM_MAP(0x18) -#define MISC_IO_PAD_DRIVE_STRENGTH_CTRL_A MISC_MEM_MAP(0x1C) -#define MISC_IO_PAD_DRIVE_STRENGTH_CTRL_B MISC_MEM_MAP(0x20) -#define MISC_GPIOA_15_0_PULL_CTRL_REG MISC_MEM_MAP(0x24) -#define MISC_GPIOA_16_31_PULL_CTRL_REG MISC_MEM_MAP(0x28) -#define MISC_GPIOB_15_0_PULL_CTRL_REG MISC_MEM_MAP(0x2C) -#define MISC_GPIOB_16_31_PULL_CTRL_REG MISC_MEM_MAP(0x30) -#define MISC_IO_PULL_CTRL_REG MISC_MEM_MAP(0x34) -#define MISC_E_FUSE_31_0_REG MISC_MEM_MAP(0x40) -#define MISC_E_FUSE_63_32_REG MISC_MEM_MAP(0x44) -#define MISC_E_FUSE_95_64_REG MISC_MEM_MAP(0x48) -#define MISC_E_FUSE_127_96_REG MISC_MEM_MAP(0x4C) -#define MISC_SOFTWARE_TEST_1_REG MISC_MEM_MAP(0x50) -#define MISC_SOFTWARE_TEST_2_REG MISC_MEM_MAP(0x54) - -#define MISC_SATA_POWER_MODE MISC_MEM_MAP(0x310) - -#define MISC_USB_CFG_REG MISC_MEM_MAP(0x800) -#define MISC_USB_STS_REG MISC_MEM_MAP(0x804) -#define MISC_USBPHY00_CFG_REG MISC_MEM_MAP(0x808) -#define MISC_USBPHY01_CFG_REG MISC_MEM_MAP(0x80c) -#define MISC_USBPHY10_CFG_REG MISC_MEM_MAP(0x810) -#define MISC_USBPHY11_CFG_REG MISC_MEM_MAP(0x814) - -#define MISC_PCIEPHY_CMCTL(x) MISC_MEM_MAP(0x900 + (x) * 0x004) -#define MISC_PCIEPHY_CTL(x) MISC_MEM_MAP(0x940 + (x) * 0x100) -#define MISC_PCIE_AXIS_AWMISC(x) MISC_MEM_MAP(0x944 + (x) * 0x100) -#define MISC_PCIE_AXIS_ARMISC(x) MISC_MEM_MAP(0x948 + (x) * 0x100) -#define MISC_PCIE_AXIS_RMISC(x) MISC_MEM_MAP(0x94C + (x) * 0x100) -#define MISC_PCIE_AXIS_BMISC(x) MISC_MEM_MAP(0x950 + (x) * 0x100) -#define MISC_PCIE_AXIM_RMISC(x) MISC_MEM_MAP(0x954 + (x) * 0x100) -#define MISC_PCIE_AXIM_BMISC(x) MISC_MEM_MAP(0x958 + (x) * 0x100) -#define MISC_PCIE_CTRL(x) MISC_MEM_MAP(0x95C + (x) * 0x100) -#define MISC_PCIE_PM_DEBUG(x) MISC_MEM_MAP(0x960 + (x) * 0x100) -#define MISC_PCIE_RFC_DEBUG(x) MISC_MEM_MAP(0x964 + (x) * 0x100) -#define MISC_PCIE_CXPL_DEBUGL(x) MISC_MEM_MAP(0x968 + (x) * 0x100) -#define MISC_PCIE_CXPL_DEBUGH(x) MISC_MEM_MAP(0x96C + (x) * 0x100) -#define MISC_PCIE_DIAG_DEBUGH(x) MISC_MEM_MAP(0x970 + (x) * 0x100) -#define MISC_PCIE_W1CLR(x) MISC_MEM_MAP(0x974 + (x) * 0x100) -#define MISC_PCIE_INT_MASK(x) MISC_MEM_MAP(0x978 + (x) * 0x100) -#define MISC_PCIE_INT_STATUS(x) MISC_MEM_MAP(0x97C + (x) * 0x100) - -/* - * Power management and clock control - */ -#define PMU_MEM_MAP(offs) (void __iomem *)(CNS3XXX_PM_BASE_VIRT + (offs)) - -#define PM_CLK_GATE_REG PMU_MEM_MAP(0x000) -#define PM_SOFT_RST_REG PMU_MEM_MAP(0x004) -#define PM_HS_CFG_REG PMU_MEM_MAP(0x008) -#define PM_CACTIVE_STA_REG PMU_MEM_MAP(0x00C) -#define PM_PWR_STA_REG PMU_MEM_MAP(0x010) -#define PM_CLK_CTRL_REG PMU_MEM_MAP(0x014) -#define PM_PLL_LCD_I2S_CTRL_REG PMU_MEM_MAP(0x018) -#define PM_PLL_HM_PD_CTRL_REG PMU_MEM_MAP(0x01C) -#define PM_REGULAT_CTRL_REG PMU_MEM_MAP(0x020) -#define PM_WDT_CTRL_REG PMU_MEM_MAP(0x024) -#define PM_WU_CTRL0_REG PMU_MEM_MAP(0x028) -#define PM_WU_CTRL1_REG PMU_MEM_MAP(0x02C) -#define PM_CSR_REG PMU_MEM_MAP(0x030) - -/* PM_CLK_GATE_REG */ -#define PM_CLK_GATE_REG_OFFSET_SDIO (25) -#define PM_CLK_GATE_REG_OFFSET_GPU (24) -#define PM_CLK_GATE_REG_OFFSET_CIM (23) -#define PM_CLK_GATE_REG_OFFSET_LCDC (22) -#define PM_CLK_GATE_REG_OFFSET_I2S (21) -#define PM_CLK_GATE_REG_OFFSET_RAID (20) -#define PM_CLK_GATE_REG_OFFSET_SATA (19) -#define PM_CLK_GATE_REG_OFFSET_PCIE(x) (17 + (x)) -#define PM_CLK_GATE_REG_OFFSET_USB_HOST (16) -#define PM_CLK_GATE_REG_OFFSET_USB_OTG (15) -#define PM_CLK_GATE_REG_OFFSET_TIMER (14) -#define PM_CLK_GATE_REG_OFFSET_CRYPTO (13) -#define PM_CLK_GATE_REG_OFFSET_HCIE (12) -#define PM_CLK_GATE_REG_OFFSET_SWITCH (11) -#define PM_CLK_GATE_REG_OFFSET_GPIO (10) -#define PM_CLK_GATE_REG_OFFSET_UART3 (9) -#define PM_CLK_GATE_REG_OFFSET_UART2 (8) -#define PM_CLK_GATE_REG_OFFSET_UART1 (7) -#define PM_CLK_GATE_REG_OFFSET_RTC (5) -#define PM_CLK_GATE_REG_OFFSET_GDMA (4) -#define PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C (3) -#define PM_CLK_GATE_REG_OFFSET_SMC_NFI (1) -#define PM_CLK_GATE_REG_MASK (0x03FFFFBA) - -/* PM_SOFT_RST_REG */ -#define PM_SOFT_RST_REG_OFFST_WARM_RST_FLAG (31) -#define PM_SOFT_RST_REG_OFFST_CPU1 (29) -#define PM_SOFT_RST_REG_OFFST_CPU0 (28) -#define PM_SOFT_RST_REG_OFFST_SDIO (25) -#define PM_SOFT_RST_REG_OFFST_GPU (24) -#define PM_SOFT_RST_REG_OFFST_CIM (23) -#define PM_SOFT_RST_REG_OFFST_LCDC (22) -#define PM_SOFT_RST_REG_OFFST_I2S (21) -#define PM_SOFT_RST_REG_OFFST_RAID (20) -#define PM_SOFT_RST_REG_OFFST_SATA (19) -#define PM_SOFT_RST_REG_OFFST_PCIE(x) (17 + (x)) -#define PM_SOFT_RST_REG_OFFST_USB_HOST (16) -#define PM_SOFT_RST_REG_OFFST_USB_OTG (15) -#define PM_SOFT_RST_REG_OFFST_TIMER (14) -#define PM_SOFT_RST_REG_OFFST_CRYPTO (13) -#define PM_SOFT_RST_REG_OFFST_HCIE (12) -#define PM_SOFT_RST_REG_OFFST_SWITCH (11) -#define PM_SOFT_RST_REG_OFFST_GPIO (10) -#define PM_SOFT_RST_REG_OFFST_UART3 (9) -#define PM_SOFT_RST_REG_OFFST_UART2 (8) -#define PM_SOFT_RST_REG_OFFST_UART1 (7) -#define PM_SOFT_RST_REG_OFFST_RTC (5) -#define PM_SOFT_RST_REG_OFFST_GDMA (4) -#define PM_SOFT_RST_REG_OFFST_SPI_PCM_I2C (3) -#define PM_SOFT_RST_REG_OFFST_DMC (2) -#define PM_SOFT_RST_REG_OFFST_SMC_NFI (1) -#define PM_SOFT_RST_REG_OFFST_GLOBAL (0) -#define PM_SOFT_RST_REG_MASK (0xF3FFFFBF) - -/* PMHS_CFG_REG */ -#define PM_HS_CFG_REG_OFFSET_SDIO (25) -#define PM_HS_CFG_REG_OFFSET_GPU (24) -#define PM_HS_CFG_REG_OFFSET_CIM (23) -#define PM_HS_CFG_REG_OFFSET_LCDC (22) -#define PM_HS_CFG_REG_OFFSET_I2S (21) -#define PM_HS_CFG_REG_OFFSET_RAID (20) -#define PM_HS_CFG_REG_OFFSET_SATA (19) -#define PM_HS_CFG_REG_OFFSET_PCIE1 (18) -#define PM_HS_CFG_REG_OFFSET_PCIE0 (17) -#define PM_HS_CFG_REG_OFFSET_USB_HOST (16) -#define PM_HS_CFG_REG_OFFSET_USB_OTG (15) -#define PM_HS_CFG_REG_OFFSET_TIMER (14) -#define PM_HS_CFG_REG_OFFSET_CRYPTO (13) -#define PM_HS_CFG_REG_OFFSET_HCIE (12) -#define PM_HS_CFG_REG_OFFSET_SWITCH (11) -#define PM_HS_CFG_REG_OFFSET_GPIO (10) -#define PM_HS_CFG_REG_OFFSET_UART3 (9) -#define PM_HS_CFG_REG_OFFSET_UART2 (8) -#define PM_HS_CFG_REG_OFFSET_UART1 (7) -#define PM_HS_CFG_REG_OFFSET_RTC (5) -#define PM_HS_CFG_REG_OFFSET_GDMA (4) -#define PM_HS_CFG_REG_OFFSET_SPI_PCM_I2S (3) -#define PM_HS_CFG_REG_OFFSET_DMC (2) -#define PM_HS_CFG_REG_OFFSET_SMC_NFI (1) -#define PM_HS_CFG_REG_MASK (0x03FFFFBE) -#define PM_HS_CFG_REG_MASK_SUPPORT (0x01100806) - -/* PM_CACTIVE_STA_REG */ -#define PM_CACTIVE_STA_REG_OFFSET_SDIO (25) -#define PM_CACTIVE_STA_REG_OFFSET_GPU (24) -#define PM_CACTIVE_STA_REG_OFFSET_CIM (23) -#define PM_CACTIVE_STA_REG_OFFSET_LCDC (22) -#define PM_CACTIVE_STA_REG_OFFSET_I2S (21) -#define PM_CACTIVE_STA_REG_OFFSET_RAID (20) -#define PM_CACTIVE_STA_REG_OFFSET_SATA (19) -#define PM_CACTIVE_STA_REG_OFFSET_PCIE1 (18) -#define PM_CACTIVE_STA_REG_OFFSET_PCIE0 (17) -#define PM_CACTIVE_STA_REG_OFFSET_USB_HOST (16) -#define PM_CACTIVE_STA_REG_OFFSET_USB_OTG (15) -#define PM_CACTIVE_STA_REG_OFFSET_TIMER (14) -#define PM_CACTIVE_STA_REG_OFFSET_CRYPTO (13) -#define PM_CACTIVE_STA_REG_OFFSET_HCIE (12) -#define PM_CACTIVE_STA_REG_OFFSET_SWITCH (11) -#define PM_CACTIVE_STA_REG_OFFSET_GPIO (10) -#define PM_CACTIVE_STA_REG_OFFSET_UART3 (9) -#define PM_CACTIVE_STA_REG_OFFSET_UART2 (8) -#define PM_CACTIVE_STA_REG_OFFSET_UART1 (7) -#define PM_CACTIVE_STA_REG_OFFSET_RTC (5) -#define PM_CACTIVE_STA_REG_OFFSET_GDMA (4) -#define PM_CACTIVE_STA_REG_OFFSET_SPI_PCM_I2S (3) -#define PM_CACTIVE_STA_REG_OFFSET_DMC (2) -#define PM_CACTIVE_STA_REG_OFFSET_SMC_NFI (1) -#define PM_CACTIVE_STA_REG_MASK (0x03FFFFBE) - -/* PM_PWR_STA_REG */ -#define PM_PWR_STA_REG_REG_OFFSET_SDIO (25) -#define PM_PWR_STA_REG_REG_OFFSET_GPU (24) -#define PM_PWR_STA_REG_REG_OFFSET_CIM (23) -#define PM_PWR_STA_REG_REG_OFFSET_LCDC (22) -#define PM_PWR_STA_REG_REG_OFFSET_I2S (21) -#define PM_PWR_STA_REG_REG_OFFSET_RAID (20) -#define PM_PWR_STA_REG_REG_OFFSET_SATA (19) -#define PM_PWR_STA_REG_REG_OFFSET_PCIE1 (18) -#define PM_PWR_STA_REG_REG_OFFSET_PCIE0 (17) -#define PM_PWR_STA_REG_REG_OFFSET_USB_HOST (16) -#define PM_PWR_STA_REG_REG_OFFSET_USB_OTG (15) -#define PM_PWR_STA_REG_REG_OFFSET_TIMER (14) -#define PM_PWR_STA_REG_REG_OFFSET_CRYPTO (13) -#define PM_PWR_STA_REG_REG_OFFSET_HCIE (12) -#define PM_PWR_STA_REG_REG_OFFSET_SWITCH (11) -#define PM_PWR_STA_REG_REG_OFFSET_GPIO (10) -#define PM_PWR_STA_REG_REG_OFFSET_UART3 (9) -#define PM_PWR_STA_REG_REG_OFFSET_UART2 (8) -#define PM_PWR_STA_REG_REG_OFFSET_UART1 (7) -#define PM_PWR_STA_REG_REG_OFFSET_RTC (5) -#define PM_PWR_STA_REG_REG_OFFSET_GDMA (4) -#define PM_PWR_STA_REG_REG_OFFSET_SPI_PCM_I2S (3) -#define PM_PWR_STA_REG_REG_OFFSET_DMC (2) -#define PM_PWR_STA_REG_REG_OFFSET_SMC_NFI (1) -#define PM_PWR_STA_REG_REG_MASK (0x03FFFFBE) - -/* PM_CLK_CTRL_REG */ -#define PM_CLK_CTRL_REG_OFFSET_I2S_MCLK (31) -#define PM_CLK_CTRL_REG_OFFSET_DDR2_CHG_EN (30) -#define PM_CLK_CTRL_REG_OFFSET_PCIE_REF1_EN (29) -#define PM_CLK_CTRL_REG_OFFSET_PCIE_REF0_EN (28) -#define PM_CLK_CTRL_REG_OFFSET_TIMER_SIM_MODE (27) -#define PM_CLK_CTRL_REG_OFFSET_I2SCLK_DIV (24) -#define PM_CLK_CTRL_REG_OFFSET_I2SCLK_SEL (22) -#define PM_CLK_CTRL_REG_OFFSET_CLKOUT_DIV (20) -#define PM_CLK_CTRL_REG_OFFSET_CLKOUT_SEL (16) -#define PM_CLK_CTRL_REG_OFFSET_MDC_DIV (14) -#define PM_CLK_CTRL_REG_OFFSET_CRYPTO_CLK_SEL (12) -#define PM_CLK_CTRL_REG_OFFSET_CPU_PWR_MODE (9) -#define PM_CLK_CTRL_REG_OFFSET_PLL_DDR2_SEL (7) -#define PM_CLK_CTRL_REG_OFFSET_DIV_IMMEDIATE (6) -#define PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV (4) -#define PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL (0) - -#define PM_CPU_CLK_DIV(DIV) { \ - PM_CLK_CTRL_REG &= ~((0x3) << PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV); \ - PM_CLK_CTRL_REG |= (((DIV)&0x3) << PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV); \ -} - -#define PM_PLL_CPU_SEL(CPU) { \ - PM_CLK_CTRL_REG &= ~((0xF) << PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL); \ - PM_CLK_CTRL_REG |= (((CPU)&0xF) << PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL); \ -} - -/* PM_PLL_LCD_I2S_CTRL_REG */ -#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_MCLK_SMC_DIV (22) -#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_R_SEL (17) -#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_PLL_LCD_P (11) -#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_PLL_LCD_M (3) -#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_PLL_LCD_S (0) - -/* PM_PLL_HM_PD_CTRL_REG */ -#define PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1 (11) -#define PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0 (10) -#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_I2SCD (6) -#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_I2S (5) -#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_LCD (4) -#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB (3) -#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_RGMII (2) -#define PM_PLL_HM_PD_CTRL_REG_MASK (0x00000C7C) - -/* PM_WDT_CTRL_REG */ -#define PM_WDT_CTRL_REG_OFFSET_RESET_CPU_ONLY (0) - -/* PM_CSR_REG - Clock Scaling Register*/ -#define PM_CSR_REG_OFFSET_CSR_EN (30) -#define PM_CSR_REG_OFFSET_CSR_NUM (0) - -#define CNS3XXX_PWR_CLK_EN(BLOCK) (0x1<<PM_CLK_GATE_REG_OFFSET_##BLOCK) - -/* Software reset*/ -#define CNS3XXX_PWR_SOFTWARE_RST(BLOCK) (0x1<<PM_SOFT_RST_REG_OFFST_##BLOCK) - -/* - * CNS3XXX support several power saving mode as following, - * DFS, IDLE, HALT, DOZE, SLEEP, Hibernate - */ -#define CNS3XXX_PWR_CPU_MODE_DFS (0) -#define CNS3XXX_PWR_CPU_MODE_IDLE (1) -#define CNS3XXX_PWR_CPU_MODE_HALT (2) -#define CNS3XXX_PWR_CPU_MODE_DOZE (3) -#define CNS3XXX_PWR_CPU_MODE_SLEEP (4) -#define CNS3XXX_PWR_CPU_MODE_HIBERNATE (5) - -#define CNS3XXX_PWR_PLL(BLOCK) (0x1<<PM_PLL_HM_PD_CTRL_REG_OFFSET_##BLOCK) -#define CNS3XXX_PWR_PLL_ALL PM_PLL_HM_PD_CTRL_REG_MASK - -/* Change CPU frequency and divider */ -#define CNS3XXX_PWR_PLL_CPU_300MHZ (0) -#define CNS3XXX_PWR_PLL_CPU_333MHZ (1) -#define CNS3XXX_PWR_PLL_CPU_366MHZ (2) -#define CNS3XXX_PWR_PLL_CPU_400MHZ (3) -#define CNS3XXX_PWR_PLL_CPU_433MHZ (4) -#define CNS3XXX_PWR_PLL_CPU_466MHZ (5) -#define CNS3XXX_PWR_PLL_CPU_500MHZ (6) -#define CNS3XXX_PWR_PLL_CPU_533MHZ (7) -#define CNS3XXX_PWR_PLL_CPU_566MHZ (8) -#define CNS3XXX_PWR_PLL_CPU_600MHZ (9) -#define CNS3XXX_PWR_PLL_CPU_633MHZ (10) -#define CNS3XXX_PWR_PLL_CPU_666MHZ (11) -#define CNS3XXX_PWR_PLL_CPU_700MHZ (12) - -#define CNS3XXX_PWR_CPU_CLK_DIV_BY1 (0) -#define CNS3XXX_PWR_CPU_CLK_DIV_BY2 (1) -#define CNS3XXX_PWR_CPU_CLK_DIV_BY4 (2) - -/* Change DDR2 frequency */ -#define CNS3XXX_PWR_PLL_DDR2_200MHZ (0) -#define CNS3XXX_PWR_PLL_DDR2_266MHZ (1) -#define CNS3XXX_PWR_PLL_DDR2_333MHZ (2) -#define CNS3XXX_PWR_PLL_DDR2_400MHZ (3) - -void cns3xxx_pwr_soft_rst(unsigned int block); -void cns3xxx_pwr_clk_en(unsigned int block); -int cns3xxx_cpu_clock(void); - -/* - * ARM11 MPCore interrupt sources (primary GIC) - */ -#define IRQ_TC11MP_GIC_START 32 - -#define IRQ_CNS3XXX_PMU (IRQ_TC11MP_GIC_START + 0) -#define IRQ_CNS3XXX_SDIO (IRQ_TC11MP_GIC_START + 1) -#define IRQ_CNS3XXX_L2CC (IRQ_TC11MP_GIC_START + 2) -#define IRQ_CNS3XXX_RTC (IRQ_TC11MP_GIC_START + 3) -#define IRQ_CNS3XXX_I2S (IRQ_TC11MP_GIC_START + 4) -#define IRQ_CNS3XXX_PCM (IRQ_TC11MP_GIC_START + 5) -#define IRQ_CNS3XXX_SPI (IRQ_TC11MP_GIC_START + 6) -#define IRQ_CNS3XXX_I2C (IRQ_TC11MP_GIC_START + 7) -#define IRQ_CNS3XXX_CIM (IRQ_TC11MP_GIC_START + 8) -#define IRQ_CNS3XXX_GPU (IRQ_TC11MP_GIC_START + 9) -#define IRQ_CNS3XXX_LCD (IRQ_TC11MP_GIC_START + 10) -#define IRQ_CNS3XXX_GPIOA (IRQ_TC11MP_GIC_START + 11) -#define IRQ_CNS3XXX_GPIOB (IRQ_TC11MP_GIC_START + 12) -#define IRQ_CNS3XXX_UART0 (IRQ_TC11MP_GIC_START + 13) -#define IRQ_CNS3XXX_UART1 (IRQ_TC11MP_GIC_START + 14) -#define IRQ_CNS3XXX_UART2 (IRQ_TC11MP_GIC_START + 15) -#define IRQ_CNS3XXX_ARM11 (IRQ_TC11MP_GIC_START + 16) - -#define IRQ_CNS3XXX_SW_STATUS (IRQ_TC11MP_GIC_START + 17) -#define IRQ_CNS3XXX_SW_R0TXC (IRQ_TC11MP_GIC_START + 18) -#define IRQ_CNS3XXX_SW_R0RXC (IRQ_TC11MP_GIC_START + 19) -#define IRQ_CNS3XXX_SW_R0QE (IRQ_TC11MP_GIC_START + 20) -#define IRQ_CNS3XXX_SW_R0QF (IRQ_TC11MP_GIC_START + 21) -#define IRQ_CNS3XXX_SW_R1TXC (IRQ_TC11MP_GIC_START + 22) -#define IRQ_CNS3XXX_SW_R1RXC (IRQ_TC11MP_GIC_START + 23) -#define IRQ_CNS3XXX_SW_R1QE (IRQ_TC11MP_GIC_START + 24) -#define IRQ_CNS3XXX_SW_R1QF (IRQ_TC11MP_GIC_START + 25) -#define IRQ_CNS3XXX_SW_PPE (IRQ_TC11MP_GIC_START + 26) - -#define IRQ_CNS3XXX_CRYPTO (IRQ_TC11MP_GIC_START + 27) -#define IRQ_CNS3XXX_HCIE (IRQ_TC11MP_GIC_START + 28) -#define IRQ_CNS3XXX_PCIE0_DEVICE (IRQ_TC11MP_GIC_START + 29) -#define IRQ_CNS3XXX_PCIE1_DEVICE (IRQ_TC11MP_GIC_START + 30) -#define IRQ_CNS3XXX_USB_OTG (IRQ_TC11MP_GIC_START + 31) -#define IRQ_CNS3XXX_USB_EHCI (IRQ_TC11MP_GIC_START + 32) -#define IRQ_CNS3XXX_SATA (IRQ_TC11MP_GIC_START + 33) -#define IRQ_CNS3XXX_RAID (IRQ_TC11MP_GIC_START + 34) -#define IRQ_CNS3XXX_SMC (IRQ_TC11MP_GIC_START + 35) - -#define IRQ_CNS3XXX_DMAC_ABORT (IRQ_TC11MP_GIC_START + 36) -#define IRQ_CNS3XXX_DMAC0 (IRQ_TC11MP_GIC_START + 37) -#define IRQ_CNS3XXX_DMAC1 (IRQ_TC11MP_GIC_START + 38) -#define IRQ_CNS3XXX_DMAC2 (IRQ_TC11MP_GIC_START + 39) -#define IRQ_CNS3XXX_DMAC3 (IRQ_TC11MP_GIC_START + 40) -#define IRQ_CNS3XXX_DMAC4 (IRQ_TC11MP_GIC_START + 41) -#define IRQ_CNS3XXX_DMAC5 (IRQ_TC11MP_GIC_START + 42) -#define IRQ_CNS3XXX_DMAC6 (IRQ_TC11MP_GIC_START + 43) -#define IRQ_CNS3XXX_DMAC7 (IRQ_TC11MP_GIC_START + 44) -#define IRQ_CNS3XXX_DMAC8 (IRQ_TC11MP_GIC_START + 45) -#define IRQ_CNS3XXX_DMAC9 (IRQ_TC11MP_GIC_START + 46) -#define IRQ_CNS3XXX_DMAC10 (IRQ_TC11MP_GIC_START + 47) -#define IRQ_CNS3XXX_DMAC11 (IRQ_TC11MP_GIC_START + 48) -#define IRQ_CNS3XXX_DMAC12 (IRQ_TC11MP_GIC_START + 49) -#define IRQ_CNS3XXX_DMAC13 (IRQ_TC11MP_GIC_START + 50) -#define IRQ_CNS3XXX_DMAC14 (IRQ_TC11MP_GIC_START + 51) -#define IRQ_CNS3XXX_DMAC15 (IRQ_TC11MP_GIC_START + 52) -#define IRQ_CNS3XXX_DMAC16 (IRQ_TC11MP_GIC_START + 53) -#define IRQ_CNS3XXX_DMAC17 (IRQ_TC11MP_GIC_START + 54) - -#define IRQ_CNS3XXX_PCIE0_RC (IRQ_TC11MP_GIC_START + 55) -#define IRQ_CNS3XXX_PCIE1_RC (IRQ_TC11MP_GIC_START + 56) -#define IRQ_CNS3XXX_TIMER0 (IRQ_TC11MP_GIC_START + 57) -#define IRQ_CNS3XXX_TIMER1 (IRQ_TC11MP_GIC_START + 58) -#define IRQ_CNS3XXX_USB_OHCI (IRQ_TC11MP_GIC_START + 59) -#define IRQ_CNS3XXX_TIMER2 (IRQ_TC11MP_GIC_START + 60) -#define IRQ_CNS3XXX_EXTERNAL_PIN0 (IRQ_TC11MP_GIC_START + 61) -#define IRQ_CNS3XXX_EXTERNAL_PIN1 (IRQ_TC11MP_GIC_START + 62) -#define IRQ_CNS3XXX_EXTERNAL_PIN2 (IRQ_TC11MP_GIC_START + 63) - -#define NR_IRQS_CNS3XXX (IRQ_TC11MP_GIC_START + 64) - -#endif /* __MACH_BOARD_CNS3XXX_H */ diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c deleted file mode 100644 index 3fc4ec830e3a..000000000000 --- a/arch/arm/mach-cns3xxx/core.c +++ /dev/null @@ -1,410 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright 1999 - 2003 ARM Limited - * Copyright 2000 Deep Blue Solutions Ltd - * Copyright 2008 Cavium Networks - */ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/clockchips.h> -#include <linux/io.h> -#include <linux/irqchip/arm-gic.h> -#include <linux/of_platform.h> -#include <linux/platform_device.h> -#include <linux/usb/ehci_pdriver.h> -#include <linux/usb/ohci_pdriver.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> -#include <asm/mach/irq.h> -#include <asm/hardware/cache-l2x0.h> -#include "cns3xxx.h" -#include "core.h" -#include "pm.h" - -static struct map_desc cns3xxx_io_desc[] __initdata = { - { - .virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_TC11MP_SCU_BASE), - .length = SZ_8K, - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_TIMER1_2_3_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_MISC_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_MISC_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_PM_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PM_BASE), - .length = SZ_4K, - .type = MT_DEVICE, -#ifdef CONFIG_PCI - }, { - .virtual = CNS3XXX_PCIE0_HOST_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE0_HOST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_PCIE0_CFG0_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE0_CFG0_BASE), - .length = SZ_64K, /* really 4 KiB at offset 32 KiB */ - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_PCIE0_CFG1_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE0_CFG1_BASE), - .length = SZ_16M, - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_PCIE1_HOST_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE1_HOST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_PCIE1_CFG0_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE1_CFG0_BASE), - .length = SZ_64K, /* really 4 KiB at offset 32 KiB */ - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_PCIE1_CFG1_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE1_CFG1_BASE), - .length = SZ_16M, - .type = MT_DEVICE, -#endif - }, -}; - -void __init cns3xxx_map_io(void) -{ - iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc)); -} - -/* used by entry-macro.S */ -void __init cns3xxx_init_irq(void) -{ - gic_init(IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), - IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); -} - -void cns3xxx_power_off(void) -{ - u32 __iomem *pm_base = IOMEM(CNS3XXX_PM_BASE_VIRT); - u32 clkctrl; - - printk(KERN_INFO "powering system down...\n"); - - clkctrl = readl(pm_base + PM_SYS_CLK_CTRL_OFFSET); - clkctrl &= 0xfffff1ff; - clkctrl |= (0x5 << 9); /* Hibernate */ - writel(clkctrl, pm_base + PM_SYS_CLK_CTRL_OFFSET); - -} - -/* - * Timer - */ -static void __iomem *cns3xxx_tmr1; - -static int cns3xxx_shutdown(struct clock_event_device *clk) -{ - writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - return 0; -} - -static int cns3xxx_set_oneshot(struct clock_event_device *clk) -{ - unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - - /* period set, and timer enabled in 'next_event' hook */ - ctrl |= (1 << 2) | (1 << 9); - writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - return 0; -} - -static int cns3xxx_set_periodic(struct clock_event_device *clk) -{ - unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - int pclk = cns3xxx_cpu_clock() / 8; - int reload; - - reload = pclk * 20 / (3 * HZ) * 0x25000; - writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); - ctrl |= (1 << 0) | (1 << 2) | (1 << 9); - writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - return 0; -} - -static int cns3xxx_timer_set_next_event(unsigned long evt, - struct clock_event_device *unused) -{ - unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - - writel(evt, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); - writel(ctrl | (1 << 0), cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - - return 0; -} - -static struct clock_event_device cns3xxx_tmr1_clockevent = { - .name = "cns3xxx timer1", - .features = CLOCK_EVT_FEAT_PERIODIC | - CLOCK_EVT_FEAT_ONESHOT, - .set_state_shutdown = cns3xxx_shutdown, - .set_state_periodic = cns3xxx_set_periodic, - .set_state_oneshot = cns3xxx_set_oneshot, - .tick_resume = cns3xxx_shutdown, - .set_next_event = cns3xxx_timer_set_next_event, - .rating = 350, - .cpumask = cpu_all_mask, -}; - -static void __init cns3xxx_clockevents_init(unsigned int timer_irq) -{ - cns3xxx_tmr1_clockevent.irq = timer_irq; - clockevents_config_and_register(&cns3xxx_tmr1_clockevent, - (cns3xxx_cpu_clock() >> 3) * 1000000, - 0xf, 0xffffffff); -} - -/* - * IRQ handler for the timer - */ -static irqreturn_t cns3xxx_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = &cns3xxx_tmr1_clockevent; - u32 __iomem *stat = cns3xxx_tmr1 + TIMER1_2_INTERRUPT_STATUS_OFFSET; - u32 val; - - /* Clear the interrupt */ - val = readl(stat); - writel(val & ~(1 << 2), stat); - - evt->event_handler(evt); - - return IRQ_HANDLED; -} - -/* - * Set up the clock source and clock events devices - */ -static void __init __cns3xxx_timer_init(unsigned int timer_irq) -{ - u32 val; - u32 irq_mask; - - /* - * Initialise to a known state (all timers off) - */ - - /* disable timer1 and timer2 */ - writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - /* stop free running timer3 */ - writel(0, cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET); - - /* timer1 */ - writel(0x5C800, cns3xxx_tmr1 + TIMER1_COUNTER_OFFSET); - writel(0x5C800, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); - - writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V1_OFFSET); - writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V2_OFFSET); - - /* mask irq, non-mask timer1 overflow */ - irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); - irq_mask &= ~(1 << 2); - irq_mask |= 0x03; - writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); - - /* down counter */ - val = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - val |= (1 << 9); - writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - - /* timer2 */ - writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V1_OFFSET); - writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V2_OFFSET); - - /* mask irq */ - irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); - irq_mask |= ((1 << 3) | (1 << 4) | (1 << 5)); - writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); - - /* down counter */ - val = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - val |= (1 << 10); - writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - - /* Make irqs happen for the system timer */ - if (request_irq(timer_irq, cns3xxx_timer_interrupt, - IRQF_TIMER | IRQF_IRQPOLL, "timer", NULL)) - pr_err("Failed to request irq %d (timer)\n", timer_irq); - - cns3xxx_clockevents_init(timer_irq); -} - -void __init cns3xxx_timer_init(void) -{ - cns3xxx_tmr1 = IOMEM(CNS3XXX_TIMER1_2_3_BASE_VIRT); - - __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0); -} - -#ifdef CONFIG_CACHE_L2X0 - -void __init cns3xxx_l2x0_init(void) -{ - void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); - u32 val; - - if (WARN_ON(!base)) - return; - - /* - * Tag RAM Control register - * - * bit[10:8] - 1 cycle of write accesses latency - * bit[6:4] - 1 cycle of read accesses latency - * bit[3:0] - 1 cycle of setup latency - * - * 1 cycle of latency for setup, read and write accesses - */ - val = readl(base + L310_TAG_LATENCY_CTRL); - val &= 0xfffff888; - writel(val, base + L310_TAG_LATENCY_CTRL); - - /* - * Data RAM Control register - * - * bit[10:8] - 1 cycles of write accesses latency - * bit[6:4] - 1 cycles of read accesses latency - * bit[3:0] - 1 cycle of setup latency - * - * 1 cycle of latency for setup, read and write accesses - */ - val = readl(base + L310_DATA_LATENCY_CTRL); - val &= 0xfffff888; - writel(val, base + L310_DATA_LATENCY_CTRL); - - /* 32 KiB, 8-way, parity disable */ - l2x0_init(base, 0x00500000, 0xfe0f0fff); -} - -#endif /* CONFIG_CACHE_L2X0 */ - -static int csn3xxx_usb_power_on(struct platform_device *pdev) -{ - /* - * EHCI and OHCI share the same clock and power, - * resetting twice would cause the 1st controller been reset. - * Therefore only do power up at the first up device, and - * power down at the last down device. - * - * Set USB AHB INCR length to 16 - */ - if (atomic_inc_return(&usb_pwr_ref) == 1) { - cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB); - cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST); - cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST); - __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)), - MISC_CHIP_CONFIG_REG); - } - - return 0; -} - -static void csn3xxx_usb_power_off(struct platform_device *pdev) -{ - /* - * EHCI and OHCI share the same clock and power, - * resetting twice would cause the 1st controller been reset. - * Therefore only do power up at the first up device, and - * power down at the last down device. - */ - if (atomic_dec_return(&usb_pwr_ref) == 0) - cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST); -} - -static struct usb_ehci_pdata cns3xxx_usb_ehci_pdata = { - .power_on = csn3xxx_usb_power_on, - .power_off = csn3xxx_usb_power_off, -}; - -static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = { - .num_ports = 1, - .power_on = csn3xxx_usb_power_on, - .power_off = csn3xxx_usb_power_off, -}; - -static const struct of_dev_auxdata cns3xxx_auxdata[] __initconst = { - { "intel,usb-ehci", CNS3XXX_USB_BASE, "ehci-platform", &cns3xxx_usb_ehci_pdata }, - { "intel,usb-ohci", CNS3XXX_USB_OHCI_BASE, "ohci-platform", &cns3xxx_usb_ohci_pdata }, - { "cavium,cns3420-ahci", CNS3XXX_SATA2_BASE, "ahci", NULL }, - { "cavium,cns3420-sdhci", CNS3XXX_SDIO_BASE, "ahci", NULL }, - {}, -}; - -static void __init cns3xxx_init(void) -{ - struct device_node *dn; - - cns3xxx_l2x0_init(); - - dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-ahci"); - if (of_device_is_available(dn)) { - u32 tmp; - - tmp = __raw_readl(MISC_SATA_POWER_MODE); - tmp |= 0x1 << 16; /* Disable SATA PHY 0 from SLUMBER Mode */ - tmp |= 0x1 << 17; /* Disable SATA PHY 1 from SLUMBER Mode */ - __raw_writel(tmp, MISC_SATA_POWER_MODE); - - /* Enable SATA PHY */ - cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0); - cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1); - - /* Enable SATA Clock */ - cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_SATA); - - /* De-Asscer SATA Reset */ - cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA)); - } - of_node_put(dn); - - dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci"); - if (of_device_is_available(dn)) { - u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014); - u32 gpioa_pins = __raw_readl(gpioa); - - /* MMC/SD pins share with GPIOA */ - gpioa_pins |= 0x1fff0004; - __raw_writel(gpioa_pins, gpioa); - - cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO)); - cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO)); - } - of_node_put(dn); - - pm_power_off = cns3xxx_power_off; - - of_platform_default_populate(NULL, cns3xxx_auxdata, NULL); -} - -static const char *const cns3xxx_dt_compat[] __initconst = { - "cavium,cns3410", - "cavium,cns3420", - NULL, -}; - -DT_MACHINE_START(CNS3XXX_DT, "Cavium Networks CNS3xxx") - .dt_compat = cns3xxx_dt_compat, - .map_io = cns3xxx_map_io, - .init_irq = cns3xxx_init_irq, - .init_time = cns3xxx_timer_init, - .init_machine = cns3xxx_init, - .init_late = cns3xxx_pcie_init_late, - .restart = cns3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h deleted file mode 100644 index a96eabaea301..000000000000 --- a/arch/arm/mach-cns3xxx/core.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright 2000 Deep Blue Solutions Ltd - * Copyright 2004 ARM Limited - * Copyright 2008 Cavium Networks - */ - -#ifndef __CNS3XXX_CORE_H -#define __CNS3XXX_CORE_H - -#include <linux/reboot.h> - -extern void cns3xxx_timer_init(void); - -#ifdef CONFIG_CACHE_L2X0 -void __init cns3xxx_l2x0_init(void); -#else -static inline void cns3xxx_l2x0_init(void) {} -#endif /* CONFIG_CACHE_L2X0 */ - -#ifdef CONFIG_PCI -extern void __init cns3xxx_pcie_init_late(void); -#else -static inline void __init cns3xxx_pcie_init_late(void) {} -#endif - -void __init cns3xxx_map_io(void); -void __init cns3xxx_init_irq(void); -void cns3xxx_power_off(void); -void cns3xxx_restart(enum reboot_mode, const char *); - -#endif /* __CNS3XXX_CORE_H */ diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c deleted file mode 100644 index 0f1ba8a0377d..000000000000 --- a/arch/arm/mach-cns3xxx/devices.c +++ /dev/null @@ -1,108 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * CNS3xxx common devices - * - * Copyright 2008 Cavium Networks - * Scott Shu - * Copyright 2010 MontaVista Software, LLC. - * Anton Vorontsov <avorontsov@mvista.com> - */ - -#include <linux/io.h> -#include <linux/init.h> -#include <linux/compiler.h> -#include <linux/dma-mapping.h> -#include <linux/platform_device.h> -#include "cns3xxx.h" -#include "pm.h" -#include "core.h" -#include "devices.h" - -/* - * AHCI - */ -static struct resource cns3xxx_ahci_resource[] = { - [0] = { - .start = CNS3XXX_SATA2_BASE, - .end = CNS3XXX_SATA2_BASE + CNS3XXX_SATA2_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_CNS3XXX_SATA, - .end = IRQ_CNS3XXX_SATA, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 cns3xxx_ahci_dmamask = DMA_BIT_MASK(32); - -static struct platform_device cns3xxx_ahci_pdev = { - .name = "ahci", - .id = 0, - .resource = cns3xxx_ahci_resource, - .num_resources = ARRAY_SIZE(cns3xxx_ahci_resource), - .dev = { - .dma_mask = &cns3xxx_ahci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init cns3xxx_ahci_init(void) -{ - u32 tmp; - - tmp = __raw_readl(MISC_SATA_POWER_MODE); - tmp |= 0x1 << 16; /* Disable SATA PHY 0 from SLUMBER Mode */ - tmp |= 0x1 << 17; /* Disable SATA PHY 1 from SLUMBER Mode */ - __raw_writel(tmp, MISC_SATA_POWER_MODE); - - /* Enable SATA PHY */ - cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0); - cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1); - - /* Enable SATA Clock */ - cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_SATA); - - /* De-Asscer SATA Reset */ - cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA)); - - platform_device_register(&cns3xxx_ahci_pdev); -} - -/* - * SDHCI - */ -static struct resource cns3xxx_sdhci_resources[] = { - [0] = { - .start = CNS3XXX_SDIO_BASE, - .end = CNS3XXX_SDIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_CNS3XXX_SDIO, - .end = IRQ_CNS3XXX_SDIO, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cns3xxx_sdhci_pdev = { - .name = "sdhci-cns3xxx", - .id = 0, - .num_resources = ARRAY_SIZE(cns3xxx_sdhci_resources), - .resource = cns3xxx_sdhci_resources, -}; - -void __init cns3xxx_sdhci_init(void) -{ - u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014); - u32 gpioa_pins = __raw_readl(gpioa); - - /* MMC/SD pins share with GPIOA */ - gpioa_pins |= 0x1fff0004; - __raw_writel(gpioa_pins, gpioa); - - cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO)); - cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO)); - - platform_device_register(&cns3xxx_sdhci_pdev); -} diff --git a/arch/arm/mach-cns3xxx/devices.h b/arch/arm/mach-cns3xxx/devices.h deleted file mode 100644 index ab16530d0116..000000000000 --- a/arch/arm/mach-cns3xxx/devices.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * CNS3xxx common devices - * - * Copyright 2008 Cavium Networks - * Scott Shu - * Copyright 2010 MontaVista Software, LLC. - * Anton Vorontsov <avorontsov@mvista.com> - */ - -#ifndef __CNS3XXX_DEVICES_H_ -#define __CNS3XXX_DEVICES_H_ - -void __init cns3xxx_ahci_init(void); -void __init cns3xxx_sdhci_init(void); - -#endif /* __CNS3XXX_DEVICES_H_ */ diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c deleted file mode 100644 index e92fbd679dfb..000000000000 --- a/arch/arm/mach-cns3xxx/pcie.c +++ /dev/null @@ -1,290 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * PCI-E support for CNS3xxx - * - * Copyright 2008 Cavium Networks - * Richard Liu <richard.liu@caviumnetworks.com> - * Copyright 2010 MontaVista Software, LLC. - * Anton Vorontsov <avorontsov@mvista.com> - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/bug.h> -#include <linux/pci.h> -#include <linux/io.h> -#include <linux/ioport.h> -#include <linux/interrupt.h> -#include <linux/ptrace.h> -#include <asm/mach/map.h> -#include "cns3xxx.h" -#include "core.h" - -struct cns3xxx_pcie { - void __iomem *host_regs; /* PCI config registers for host bridge */ - void __iomem *cfg0_regs; /* PCI Type 0 config registers */ - void __iomem *cfg1_regs; /* PCI Type 1 config registers */ - unsigned int irqs[2]; - struct resource res_io; - struct resource res_mem; - int port; - bool linked; -}; - -static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata) -{ - struct pci_sys_data *root = sysdata; - - return root->private_data; -} - -static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev) -{ - return sysdata_to_cnspci(dev->sysdata); -} - -static struct cns3xxx_pcie *pbus_to_cnspci(struct pci_bus *bus) -{ - return sysdata_to_cnspci(bus->sysdata); -} - -static void __iomem *cns3xxx_pci_map_bus(struct pci_bus *bus, - unsigned int devfn, int where) -{ - struct cns3xxx_pcie *cnspci = pbus_to_cnspci(bus); - int busno = bus->number; - int slot = PCI_SLOT(devfn); - void __iomem *base; - - /* If there is no link, just show the CNS PCI bridge. */ - if (!cnspci->linked && busno > 0) - return NULL; - - /* - * The CNS PCI bridge doesn't fit into the PCI hierarchy, though - * we still want to access it. - * We place the host bridge on bus 0, and the directly connected - * device on bus 1, slot 0. - */ - if (busno == 0) { /* internal PCIe bus, host bridge device */ - if (devfn == 0) /* device# and function# are ignored by hw */ - base = cnspci->host_regs; - else - return NULL; /* no such device */ - - } else if (busno == 1) { /* directly connected PCIe device */ - if (slot == 0) /* device# is ignored by hw */ - base = cnspci->cfg0_regs; - else - return NULL; /* no such device */ - } else /* remote PCI bus */ - base = cnspci->cfg1_regs + ((busno & 0xf) << 20); - - return base + where + (devfn << 12); -} - -static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *val) -{ - int ret; - u32 mask = (0x1ull << (size * 8)) - 1; - int shift = (where % 4) * 8; - - ret = pci_generic_config_read(bus, devfn, where, size, val); - - if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn && - (where & 0xffc) == PCI_CLASS_REVISION) - /* - * RC's class is 0xb, but Linux PCI driver needs 0x604 - * for a PCIe bridge. So we must fixup the class code - * to 0x604 here. - */ - *val = ((((*val << shift) & 0xff) | (0x604 << 16)) >> shift) & mask; - - return ret; -} - -static int cns3xxx_pci_setup(int nr, struct pci_sys_data *sys) -{ - struct cns3xxx_pcie *cnspci = sysdata_to_cnspci(sys); - struct resource *res_io = &cnspci->res_io; - struct resource *res_mem = &cnspci->res_mem; - - BUG_ON(request_resource(&iomem_resource, res_io) || - request_resource(&iomem_resource, res_mem)); - - pci_add_resource_offset(&sys->resources, res_io, sys->io_offset); - pci_add_resource_offset(&sys->resources, res_mem, sys->mem_offset); - - return 1; -} - -static struct pci_ops cns3xxx_pcie_ops = { - .map_bus = cns3xxx_pci_map_bus, - .read = cns3xxx_pci_read_config, - .write = pci_generic_config_write, -}; - -static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev); - int irq = cnspci->irqs[!!dev->bus->number]; - - pr_info("PCIe map irq: %04d:%02x:%02x.%02x slot %d, pin %d, irq: %d\n", - pci_domain_nr(dev->bus), dev->bus->number, PCI_SLOT(dev->devfn), - PCI_FUNC(dev->devfn), slot, pin, irq); - - return irq; -} - -static struct cns3xxx_pcie cns3xxx_pcie[] = { - [0] = { - .host_regs = (void __iomem *)CNS3XXX_PCIE0_HOST_BASE_VIRT, - .cfg0_regs = (void __iomem *)CNS3XXX_PCIE0_CFG0_BASE_VIRT, - .cfg1_regs = (void __iomem *)CNS3XXX_PCIE0_CFG1_BASE_VIRT, - .res_io = { - .name = "PCIe0 I/O space", - .start = CNS3XXX_PCIE0_IO_BASE, - .end = CNS3XXX_PCIE0_CFG0_BASE - 1, /* 16 MiB */ - .flags = IORESOURCE_IO, - }, - .res_mem = { - .name = "PCIe0 non-prefetchable", - .start = CNS3XXX_PCIE0_MEM_BASE, - .end = CNS3XXX_PCIE0_HOST_BASE - 1, /* 176 MiB */ - .flags = IORESOURCE_MEM, - }, - .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, }, - .port = 0, - }, - [1] = { - .host_regs = (void __iomem *)CNS3XXX_PCIE1_HOST_BASE_VIRT, - .cfg0_regs = (void __iomem *)CNS3XXX_PCIE1_CFG0_BASE_VIRT, - .cfg1_regs = (void __iomem *)CNS3XXX_PCIE1_CFG1_BASE_VIRT, - .res_io = { - .name = "PCIe1 I/O space", - .start = CNS3XXX_PCIE1_IO_BASE, - .end = CNS3XXX_PCIE1_CFG0_BASE - 1, /* 16 MiB */ - .flags = IORESOURCE_IO, - }, - .res_mem = { - .name = "PCIe1 non-prefetchable", - .start = CNS3XXX_PCIE1_MEM_BASE, - .end = CNS3XXX_PCIE1_HOST_BASE - 1, /* 176 MiB */ - .flags = IORESOURCE_MEM, - }, - .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, }, - .port = 1, - }, -}; - -static void __init cns3xxx_pcie_check_link(struct cns3xxx_pcie *cnspci) -{ - int port = cnspci->port; - u32 reg; - unsigned long time; - - reg = __raw_readl(MISC_PCIE_CTRL(port)); - /* - * Enable Application Request to 1, it will exit L1 automatically, - * but when chip back, it will use another clock, still can use 0x1. - */ - reg |= 0x3; - __raw_writel(reg, MISC_PCIE_CTRL(port)); - - pr_info("PCIe: Port[%d] Enable PCIe LTSSM\n", port); - pr_info("PCIe: Port[%d] Check data link layer...", port); - - time = jiffies; - while (1) { - reg = __raw_readl(MISC_PCIE_PM_DEBUG(port)); - if (reg & 0x1) { - pr_info("Link up.\n"); - cnspci->linked = 1; - break; - } else if (time_after(jiffies, time + 50)) { - pr_info("Device not found.\n"); - break; - } - } -} - -static void cns3xxx_write_config(struct cns3xxx_pcie *cnspci, - int where, int size, u32 val) -{ - void __iomem *base = cnspci->host_regs + (where & 0xffc); - u32 v; - u32 mask = (0x1ull << (size * 8)) - 1; - int shift = (where % 4) * 8; - - v = readl_relaxed(base); - - v &= ~(mask << shift); - v |= (val & mask) << shift; - - writel_relaxed(v, base); - readl_relaxed(base); -} - -static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci) -{ - u16 mem_base = cnspci->res_mem.start >> 16; - u16 mem_limit = cnspci->res_mem.end >> 16; - u16 io_base = cnspci->res_io.start >> 16; - u16 io_limit = cnspci->res_io.end >> 16; - - cns3xxx_write_config(cnspci, PCI_PRIMARY_BUS, 1, 0); - cns3xxx_write_config(cnspci, PCI_SECONDARY_BUS, 1, 1); - cns3xxx_write_config(cnspci, PCI_SUBORDINATE_BUS, 1, 1); - cns3xxx_write_config(cnspci, PCI_MEMORY_BASE, 2, mem_base); - cns3xxx_write_config(cnspci, PCI_MEMORY_LIMIT, 2, mem_limit); - cns3xxx_write_config(cnspci, PCI_IO_BASE_UPPER16, 2, io_base); - cns3xxx_write_config(cnspci, PCI_IO_LIMIT_UPPER16, 2, io_limit); - - if (!cnspci->linked) - return; - - /* Set Device Max_Read_Request_Size to 128 byte */ - pcie_bus_config = PCIE_BUS_PEER2PEER; - - /* Disable PCIe0 Interrupt Mask INTA to INTD */ - __raw_writel(~0x3FFF, MISC_PCIE_INT_MASK(cnspci->port)); -} - -static int cns3xxx_pcie_abort_handler(unsigned long addr, unsigned int fsr, - struct pt_regs *regs) -{ - if (fsr & (1 << 10)) - regs->ARM_pc += 4; - return 0; -} - -void __init cns3xxx_pcie_init_late(void) -{ - int i; - void *private_data; - struct hw_pci hw_pci = { - .nr_controllers = 1, - .ops = &cns3xxx_pcie_ops, - .setup = cns3xxx_pci_setup, - .map_irq = cns3xxx_pcie_map_irq, - .private_data = &private_data, - }; - - pcibios_min_io = 0; - pcibios_min_mem = 0; - - hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0, - "imprecise external abort"); - - for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { - cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i)); - cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i)); - cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); - cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); - private_data = &cns3xxx_pcie[i]; - pci_common_init(&hw_pci); - } - - pci_assign_unassigned_resources(); -} diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c deleted file mode 100644 index 72e8a7ec7a38..000000000000 --- a/arch/arm/mach-cns3xxx/pm.c +++ /dev/null @@ -1,120 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright 2008 Cavium Networks - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/atomic.h> -#include "cns3xxx.h" -#include "pm.h" -#include "core.h" - -void cns3xxx_pwr_clk_en(unsigned int block) -{ - u32 reg = __raw_readl(PM_CLK_GATE_REG); - - reg |= (block & PM_CLK_GATE_REG_MASK); - __raw_writel(reg, PM_CLK_GATE_REG); -} -EXPORT_SYMBOL(cns3xxx_pwr_clk_en); - -void cns3xxx_pwr_clk_dis(unsigned int block) -{ - u32 reg = __raw_readl(PM_CLK_GATE_REG); - - reg &= ~(block & PM_CLK_GATE_REG_MASK); - __raw_writel(reg, PM_CLK_GATE_REG); -} -EXPORT_SYMBOL(cns3xxx_pwr_clk_dis); - -void cns3xxx_pwr_power_up(unsigned int block) -{ - u32 reg = __raw_readl(PM_PLL_HM_PD_CTRL_REG); - - reg &= ~(block & CNS3XXX_PWR_PLL_ALL); - __raw_writel(reg, PM_PLL_HM_PD_CTRL_REG); - - /* Wait for 300us for the PLL output clock locked. */ - udelay(300); -}; -EXPORT_SYMBOL(cns3xxx_pwr_power_up); - -void cns3xxx_pwr_power_down(unsigned int block) -{ - u32 reg = __raw_readl(PM_PLL_HM_PD_CTRL_REG); - - /* write '1' to power down */ - reg |= (block & CNS3XXX_PWR_PLL_ALL); - __raw_writel(reg, PM_PLL_HM_PD_CTRL_REG); -}; -EXPORT_SYMBOL(cns3xxx_pwr_power_down); - -static void cns3xxx_pwr_soft_rst_force(unsigned int block) -{ - u32 reg = __raw_readl(PM_SOFT_RST_REG); - - /* - * bit 0, 28, 29 => program low to reset, - * the other else program low and then high - */ - if (block & 0x30000001) { - reg &= ~(block & PM_SOFT_RST_REG_MASK); - } else { - reg &= ~(block & PM_SOFT_RST_REG_MASK); - __raw_writel(reg, PM_SOFT_RST_REG); - reg |= (block & PM_SOFT_RST_REG_MASK); - } - - __raw_writel(reg, PM_SOFT_RST_REG); -} - -void cns3xxx_pwr_soft_rst(unsigned int block) -{ - static unsigned int soft_reset; - - if (soft_reset & block) { - /* SPI/I2C/GPIO use the same block, reset once. */ - return; - } else { - soft_reset |= block; - } - cns3xxx_pwr_soft_rst_force(block); -} -EXPORT_SYMBOL(cns3xxx_pwr_soft_rst); - -void cns3xxx_restart(enum reboot_mode mode, const char *cmd) -{ - /* - * To reset, we hit the on-board reset register - * in the system FPGA. - */ - cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(GLOBAL)); -} - -/* - * cns3xxx_cpu_clock - return CPU/L2 clock - * aclk: cpu clock/2 - * hclk: cpu clock/4 - * pclk: cpu clock/8 - */ -int cns3xxx_cpu_clock(void) -{ - u32 reg = __raw_readl(PM_CLK_CTRL_REG); - int cpu; - int cpu_sel; - int div_sel; - - cpu_sel = (reg >> PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL) & 0xf; - div_sel = (reg >> PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV) & 0x3; - - cpu = (300 + ((cpu_sel / 3) * 100) + ((cpu_sel % 3) * 33)) >> div_sel; - - return cpu; -} -EXPORT_SYMBOL(cns3xxx_cpu_clock); - -atomic_t usb_pwr_ref = ATOMIC_INIT(0); -EXPORT_SYMBOL(usb_pwr_ref); diff --git a/arch/arm/mach-cns3xxx/pm.h b/arch/arm/mach-cns3xxx/pm.h deleted file mode 100644 index 61b73e59f0ff..000000000000 --- a/arch/arm/mach-cns3xxx/pm.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright 2000 Deep Blue Solutions Ltd - * Copyright 2004 ARM Limited - * Copyright 2008 Cavium Networks - */ - -#ifndef __CNS3XXX_PM_H -#define __CNS3XXX_PM_H - -#include <linux/atomic.h> - -void cns3xxx_pwr_clk_en(unsigned int block); -void cns3xxx_pwr_clk_dis(unsigned int block); -void cns3xxx_pwr_power_up(unsigned int block); -void cns3xxx_pwr_power_down(unsigned int block); - -extern atomic_t usb_pwr_ref; - -#endif /* __CNS3XXX_PM_H */ diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index c8cbd9a30791..4316e1370627 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -14,21 +14,10 @@ menuconfig ARCH_DAVINCI if ARCH_DAVINCI -config ARCH_DAVINCI_DMx - bool - comment "DaVinci Core Type" -config ARCH_DAVINCI_DM355 - bool "DaVinci 355 based system" - depends on ATAGS && UNUSED_BOARD_FILES - select DAVINCI_AINTC - select ARCH_DAVINCI_DMx - config ARCH_DAVINCI_DA830 bool "DA830/OMAP-L137/AM17x based system" - depends on !ARCH_DAVINCI_DMx || (AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT) - depends on ATAGS select ARCH_DAVINCI_DA8XX # needed on silicon revs 1.0, 1.1: select CPU_DCACHE_WRITETHROUGH if !CPU_DCACHE_DISABLE @@ -36,142 +25,11 @@ config ARCH_DAVINCI_DA830 config ARCH_DAVINCI_DA850 bool "DA850/OMAP-L138/AM18x based system" - depends on !ARCH_DAVINCI_DMx || (AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT) - depends on ATAGS - select ARCH_DAVINCI_DA8XX select DAVINCI_CP_INTC config ARCH_DAVINCI_DA8XX bool -config ARCH_DAVINCI_DM365 - bool "DaVinci 365 based system" - depends on ATAGS && UNUSED_BOARD_FILES - select DAVINCI_AINTC - select ARCH_DAVINCI_DMx - -comment "DaVinci Board Type" - -config MACH_DA8XX_DT - bool "Support DA8XX platforms using device tree" - default y - depends on ARCH_DAVINCI_DA850 - select PINCTRL - help - Say y here to include support for TI DaVinci DA850 based using - Flattened Device Tree. More information at Documentation/devicetree - -config MACH_DAVINCI_DM355_EVM - bool "TI DM355 EVM" - default ARCH_DAVINCI_DM355 - depends on ARCH_DAVINCI_DM355 - help - Configure this option to specify the whether the board used - for development is a DM355 EVM - -config MACH_DM355_LEOPARD - bool "DM355 Leopard board" - depends on ARCH_DAVINCI_DM355 - help - Configure this option to specify the whether the board used - for development is a DM355 Leopard board. - -config MACH_DAVINCI_DM365_EVM - bool "TI DM365 EVM" - default ARCH_DAVINCI_DM365 - depends on ARCH_DAVINCI_DM365 - help - Configure this option to specify whether the board used - for development is a DM365 EVM - -config MACH_DAVINCI_DA830_EVM - bool "TI DA830/OMAP-L137/AM17x Reference Platform" - default ARCH_DAVINCI_DA830 - depends on ATAGS && UNUSED_BOARD_FILES - depends on ARCH_DAVINCI_DA830 - select GPIO_PCF857X if I2C - help - Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module. - -choice - prompt "Select DA830/OMAP-L137/AM17x UI board peripheral" - depends on MACH_DAVINCI_DA830_EVM - help - The presence of UI card on the DA830/OMAP-L137/AM17x EVM is - detected automatically based on successful probe of the I2C - based GPIO expander on that board. This option selected in this - menu has an effect only in case of a successful UI card detection. - -config DA830_UI_LCD - bool "LCD" - help - Say Y here to use the LCD as a framebuffer or simple character - display. - -config DA830_UI_NAND - bool "NAND flash" - help - Say Y here to use the NAND flash. Do not forget to setup - the switch correctly. -endchoice - -config MACH_DAVINCI_DA850_EVM - bool "TI DA850/OMAP-L138/AM18x Reference Platform" - depends on ATAGS && UNUSED_BOARD_FILES - default ARCH_DAVINCI_DA850 - depends on ARCH_DAVINCI_DA850 - help - Say Y here to select the TI DA850/OMAP-L138/AM18x Evaluation Module. - -choice - prompt "Select peripherals connected to expander on UI board" - depends on MACH_DAVINCI_DA850_EVM - help - The presence of User Interface (UI) card on the DA850/OMAP-L138/AM18x - EVM is detected automatically based on successful probe of the I2C - based GPIO expander on that card. This option selected in this - menu has an effect only in case of a successful UI card detection. - -config DA850_UI_NONE - bool "No peripheral is enabled" - help - Say Y if you do not want to enable any of the peripherals connected - to TCA6416 expander on DA850/OMAP-L138/AM18x EVM UI card - -config DA850_UI_RMII - bool "RMII Ethernet PHY" - help - Say Y if you want to use the RMII PHY on the DA850/OMAP-L138/AM18x - EVM. This PHY is found on the UI daughter card that is supplied with - the EVM. - NOTE: Please take care while choosing this option, MII PHY will - not be functional if RMII mode is selected. - -config DA850_UI_SD_VIDEO_PORT - bool "Video Port Interface" - help - Say Y if you want to use Video Port Interface (VPIF) on the - DA850/OMAP-L138 EVM. The Video decoders/encoders are found on the - UI daughter card that is supplied with the EVM. - -endchoice - -config MACH_MITYOMAPL138 - bool "Critical Link MityDSP-L138/MityARM-1808 SoM" - depends on ARCH_DAVINCI_DA850 - depends on ATAGS && UNUSED_BOARD_FILES - help - Say Y here to select the Critical Link MityDSP-L138/MityARM-1808 - System on Module. Information on this SoM may be found at - https://www.mitydsp.com - -config MACH_OMAPL138_HAWKBOARD - bool "TI AM1808 / OMAPL-138 Hawkboard platform" - depends on ARCH_DAVINCI_DA850 - depends on ATAGS && UNUSED_BOARD_FILES - help - Say Y here to select the TI AM1808 / OMAPL-138 Hawkboard platform . - config DAVINCI_MUX bool "DAVINCI multiplexing support" depends on ARCH_DAVINCI diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 3f4894aa7528..450883ea0e73 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -5,25 +5,15 @@ # # # Common objects -obj-y := serial.o usb.o common.o sram.o +obj-y := common.o sram.o devices-da8xx.o obj-$(CONFIG_DAVINCI_MUX) += mux.o # Chip specific -obj-$(CONFIG_ARCH_DAVINCI_DM355) += dm355.o devices.o -obj-$(CONFIG_ARCH_DAVINCI_DM365) += dm365.o devices.o -obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o usb-da8xx.o -obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o usb-da8xx.o +obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o +obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o pdata-quirks.o -# Board specific -obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o pdata-quirks.o -obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o -obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o -obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o -obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o -obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o -obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o -obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o +obj-y += da8xx-dt.o # Power Management obj-$(CONFIG_CPU_IDLE) += cpuidle.o diff --git a/arch/arm/mach-davinci/asp.h b/arch/arm/mach-davinci/asp.h deleted file mode 100644 index d0ecd1d0f084..000000000000 --- a/arch/arm/mach-davinci/asp.h +++ /dev/null @@ -1,57 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * TI DaVinci Audio definitions - */ -#ifndef __ASM_ARCH_DAVINCI_ASP_H -#define __ASM_ARCH_DAVINCI_ASP_H - -/* Bases of dm644x and dm355 register banks */ -#define DAVINCI_ASP0_BASE 0x01E02000 -#define DAVINCI_ASP1_BASE 0x01E04000 - -/* Bases of dm365 register banks */ -#define DAVINCI_DM365_ASP0_BASE 0x01D02000 - -/* Bases of dm646x register banks */ -#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 -#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 - -/* Bases of da850/da830 McASP0 register banks */ -#define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000 - -/* Bases of da830 McASP1 register banks */ -#define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 - -/* Bases of da830 McASP2 register banks */ -#define DAVINCI_DA830_MCASP2_REG_BASE 0x01D08000 - -/* EDMA channels of dm644x and dm355 */ -#define DAVINCI_DMA_ASP0_TX 2 -#define DAVINCI_DMA_ASP0_RX 3 -#define DAVINCI_DMA_ASP1_TX 8 -#define DAVINCI_DMA_ASP1_RX 9 - -/* EDMA channels of dm646x */ -#define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6 -#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9 -#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12 - -/* EDMA channels of da850/da830 McASP0 */ -#define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0 -#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1 - -/* EDMA channels of da830 McASP1 */ -#define DAVINCI_DA830_DMA_MCASP1_AREVT 2 -#define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 - -/* EDMA channels of da830 McASP2 */ -#define DAVINCI_DA830_DMA_MCASP2_AREVT 4 -#define DAVINCI_DA830_DMA_MCASP2_AXEVT 5 - -/* Interrupts */ -#define DAVINCI_ASP0_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT) -#define DAVINCI_ASP0_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT) -#define DAVINCI_ASP1_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT) -#define DAVINCI_ASP1_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT) - -#endif /* __ASM_ARCH_DAVINCI_ASP_H */ diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c deleted file mode 100644 index 6299e5c8f4ea..000000000000 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ /dev/null @@ -1,690 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * TI DA830/OMAP L137 EVM board - * - * Author: Mark A. Greer <mgreer@mvista.com> - * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c - * - * 2007, 2009 (c) MontaVista Software, Inc. - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/console.h> -#include <linux/interrupt.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/platform_data/pcf857x.h> -#include <linux/property.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/platform_data/gpio-davinci.h> -#include <linux/platform_data/mtd-davinci.h> -#include <linux/platform_data/mtd-davinci-aemif.h> -#include <linux/platform_data/spi-davinci.h> -#include <linux/platform_data/usb-davinci.h> -#include <linux/platform_data/ti-aemif.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> -#include <linux/nvmem-provider.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "common.h" -#include "mux.h" -#include "da8xx.h" -#include "irqs.h" - -#define DA830_EVM_PHY_ID "" -/* - * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. - */ -#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15) -#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4) - -static const short da830_evm_usb11_pins[] = { - DA830_GPIO1_15, DA830_GPIO2_4, - -1 -}; - -static struct regulator_consumer_supply da830_evm_usb_supplies[] = { - REGULATOR_SUPPLY("vbus", NULL), -}; - -static struct regulator_init_data da830_evm_usb_vbus_data = { - .consumer_supplies = da830_evm_usb_supplies, - .num_consumer_supplies = ARRAY_SIZE(da830_evm_usb_supplies), - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -static struct fixed_voltage_config da830_evm_usb_vbus = { - .supply_name = "vbus", - .microvolts = 33000000, - .init_data = &da830_evm_usb_vbus_data, -}; - -static struct platform_device da830_evm_usb_vbus_device = { - .name = "reg-fixed-voltage", - .id = 0, - .dev = { - .platform_data = &da830_evm_usb_vbus, - }, -}; - -static struct gpiod_lookup_table da830_evm_usb_oc_gpio_lookup = { - .dev_id = "ohci-da8xx", - .table = { - GPIO_LOOKUP("davinci_gpio", ON_BD_USB_OVC, "oc", 0), - { } - }, -}; - -static struct gpiod_lookup_table da830_evm_usb_vbus_gpio_lookup = { - .dev_id = "reg-fixed-voltage.0", - .table = { - GPIO_LOOKUP("davinci_gpio", ON_BD_USB_DRV, NULL, 0), - { } - }, -}; - -static struct gpiod_lookup_table *da830_evm_usb_gpio_lookups[] = { - &da830_evm_usb_oc_gpio_lookup, - &da830_evm_usb_vbus_gpio_lookup, -}; - -static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = { - /* TPS2065 switch @ 5V */ - .potpgt = (3 + 1) / 2, /* 3 ms max */ -}; - -static __init void da830_evm_usb_init(void) -{ - int ret; - - ret = da8xx_register_usb_phy_clocks(); - if (ret) - pr_warn("%s: USB PHY CLK registration failed: %d\n", - __func__, ret); - - gpiod_add_lookup_tables(da830_evm_usb_gpio_lookups, - ARRAY_SIZE(da830_evm_usb_gpio_lookups)); - - ret = da8xx_register_usb_phy(); - if (ret) - pr_warn("%s: USB PHY registration failed: %d\n", - __func__, ret); - - ret = davinci_cfg_reg(DA830_USB0_DRVVBUS); - if (ret) - pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret); - else { - /* - * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A), - * with the power on to power good time of 3 ms. - */ - ret = da8xx_register_usb20(1000, 3); - if (ret) - pr_warn("%s: USB 2.0 registration failed: %d\n", - __func__, ret); - } - - ret = davinci_cfg_reg_list(da830_evm_usb11_pins); - if (ret) { - pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); - return; - } - - ret = platform_device_register(&da830_evm_usb_vbus_device); - if (ret) { - pr_warn("%s: Unable to register the vbus supply\n", __func__); - return; - } - - ret = da8xx_register_usb11(&da830_evm_usb11_pdata); - if (ret) - pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret); -} - -static const short da830_evm_mcasp1_pins[] = { - DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1, - DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5, - DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10, - DA830_AXR1_11, - -1 -}; - -static u8 da830_iis_serializer_direction[] = { - RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, - INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE, - INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, -}; - -static struct snd_platform_data da830_evm_snd_data = { - .tx_dma_offset = 0x2000, - .rx_dma_offset = 0x2000, - .op_mode = DAVINCI_MCASP_IIS_MODE, - .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), - .tdm_slots = 2, - .serial_dir = da830_iis_serializer_direction, - .asp_chan_q = EVENTQ_0, - .version = MCASP_VERSION_2, - .txnumevt = 1, - .rxnumevt = 1, -}; - -/* - * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS. - */ -static const short da830_evm_mmc_sd_pins[] = { - DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2, - DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5, - DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK, - DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2, - -1 -}; - -#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1) -#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2) - -static struct gpiod_lookup_table mmc_gpios_table = { - .dev_id = "da830-mmc.0", - .table = { - /* gpio chip 1 contains gpio range 32-63 */ - GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_CD_PIN, "cd", - GPIO_ACTIVE_LOW), - GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_WP_PIN, "wp", - GPIO_ACTIVE_LOW), - { } - }, -}; - -static struct davinci_mmc_config da830_evm_mmc_config = { - .wires = 8, - .max_freq = 50000000, - .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, -}; - -static inline void da830_evm_init_mmc(void) -{ - int ret; - - ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins); - if (ret) { - pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret); - return; - } - - gpiod_add_lookup_table(&mmc_gpios_table); - - ret = da8xx_register_mmcsd0(&da830_evm_mmc_config); - if (ret) { - pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret); - gpiod_remove_lookup_table(&mmc_gpios_table); - } -} - -#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI) - -#ifdef CONFIG_DA830_UI_NAND -static struct mtd_partition da830_evm_nand_partitions[] = { - /* bootloader (U-Boot, etc) in first sector */ - [0] = { - .name = "bootloader", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* bootloader params in the next sector */ - [1] = { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* kernel */ - [2] = { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - .mask_flags = 0, - }, - /* file system */ - [3] = { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - } -}; - -/* flash bbt descriptors */ -static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' }; -static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' }; - -static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = { - .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | - NAND_BBT_WRITE | NAND_BBT_2BIT | - NAND_BBT_VERSION | NAND_BBT_PERCHIP, - .offs = 2, - .len = 4, - .veroffs = 16, - .maxblocks = 4, - .pattern = da830_evm_nand_bbt_pattern -}; - -static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = { - .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | - NAND_BBT_WRITE | NAND_BBT_2BIT | - NAND_BBT_VERSION | NAND_BBT_PERCHIP, - .offs = 2, - .len = 4, - .veroffs = 16, - .maxblocks = 4, - .pattern = da830_evm_nand_mirror_pattern -}; - -static struct davinci_aemif_timing da830_evm_nandflash_timing = { - .wsetup = 24, - .wstrobe = 21, - .whold = 14, - .rsetup = 19, - .rstrobe = 50, - .rhold = 0, - .ta = 20, -}; - -static struct davinci_nand_pdata da830_evm_nand_pdata = { - .core_chipsel = 1, - .parts = da830_evm_nand_partitions, - .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions), - .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, - .ecc_bits = 4, - .bbt_options = NAND_BBT_USE_FLASH, - .bbt_td = &da830_evm_nand_bbt_main_descr, - .bbt_md = &da830_evm_nand_bbt_mirror_descr, - .timing = &da830_evm_nandflash_timing, -}; - -static struct resource da830_evm_nand_resources[] = { - [0] = { /* First memory resource is NAND I/O window */ - .start = DA8XX_AEMIF_CS3_BASE, - .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { /* Second memory resource is AEMIF control registers */ - .start = DA8XX_AEMIF_CTL_BASE, - .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device da830_evm_aemif_devices[] = { - { - .name = "davinci_nand", - .id = 1, - .dev = { - .platform_data = &da830_evm_nand_pdata, - }, - .num_resources = ARRAY_SIZE(da830_evm_nand_resources), - .resource = da830_evm_nand_resources, - }, -}; - -static struct resource da830_evm_aemif_resource[] = { - { - .start = DA8XX_AEMIF_CTL_BASE, - .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct aemif_abus_data da830_evm_aemif_abus_data[] = { - { - .cs = 3, - }, -}; - -static struct aemif_platform_data da830_evm_aemif_pdata = { - .abus_data = da830_evm_aemif_abus_data, - .num_abus_data = ARRAY_SIZE(da830_evm_aemif_abus_data), - .sub_devices = da830_evm_aemif_devices, - .num_sub_devices = ARRAY_SIZE(da830_evm_aemif_devices), - .cs_offset = 2, -}; - -static struct platform_device da830_evm_aemif_device = { - .name = "ti-aemif", - .id = -1, - .dev = { - .platform_data = &da830_evm_aemif_pdata, - }, - .resource = da830_evm_aemif_resource, - .num_resources = ARRAY_SIZE(da830_evm_aemif_resource), -}; - -/* - * UI board NAND/NOR flashes only use 8-bit data bus. - */ -static const short da830_evm_emif25_pins[] = { - DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3, - DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7, - DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3, - DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7, - DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11, - DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE, - DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0, - -1 -}; - -static inline void da830_evm_init_nand(int mux_mode) -{ - int ret; - - if (HAS_MMC) { - pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n" - "\tDisable MMC/SD for NAND support\n"); - return; - } - - ret = davinci_cfg_reg_list(da830_evm_emif25_pins); - if (ret) - pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret); - - ret = platform_device_register(&da830_evm_aemif_device); - if (ret) - pr_warn("%s: AEMIF device not registered\n", __func__); - - gpio_direction_output(mux_mode, 1); -} -#else -static inline void da830_evm_init_nand(int mux_mode) { } -#endif - -#ifdef CONFIG_DA830_UI_LCD -static inline void da830_evm_init_lcdc(int mux_mode) -{ - int ret; - - ret = davinci_cfg_reg_list(da830_lcdcntl_pins); - if (ret) - pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret); - - ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata); - if (ret) - pr_warn("%s: lcd setup failed: %d\n", __func__, ret); - - gpio_direction_output(mux_mode, 0); -} -#else -static inline void da830_evm_init_lcdc(int mux_mode) { } -#endif - -static struct nvmem_cell_info da830_evm_nvmem_cells[] = { - { - .name = "macaddr", - .offset = 0x7f00, - .bytes = ETH_ALEN, - } -}; - -static struct nvmem_cell_table da830_evm_nvmem_cell_table = { - .nvmem_name = "1-00500", - .cells = da830_evm_nvmem_cells, - .ncells = ARRAY_SIZE(da830_evm_nvmem_cells), -}; - -static struct nvmem_cell_lookup da830_evm_nvmem_cell_lookup = { - .nvmem_name = "1-00500", - .cell_name = "macaddr", - .dev_id = "davinci_emac.1", - .con_id = "mac-address", -}; - -static const struct property_entry da830_evm_i2c_eeprom_properties[] = { - PROPERTY_ENTRY_U32("pagesize", 64), - { } -}; - -static const struct software_node da830_evm_i2c_eeprom_node = { - .properties = da830_evm_i2c_eeprom_properties, -}; - -static int __init da830_evm_ui_expander_setup(struct i2c_client *client, - int gpio, unsigned ngpio, void *context) -{ - gpio_request(gpio + 6, "UI MUX_MODE"); - - /* Drive mux mode low to match the default without UI card */ - gpio_direction_output(gpio + 6, 0); - - da830_evm_init_lcdc(gpio + 6); - - da830_evm_init_nand(gpio + 6); - - return 0; -} - -static void da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio, - unsigned ngpio, void *context) -{ - gpio_free(gpio + 6); -} - -static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = { - .gpio_base = DAVINCI_N_GPIO, - .setup = da830_evm_ui_expander_setup, - .teardown = da830_evm_ui_expander_teardown, -}; - -static struct i2c_board_info __initdata da830_evm_i2c_devices[] = { - { - I2C_BOARD_INFO("24c256", 0x50), - .swnode = &da830_evm_i2c_eeprom_node, - }, - { - I2C_BOARD_INFO("tlv320aic3x", 0x18), - }, - { - I2C_BOARD_INFO("pcf8574", 0x3f), - .platform_data = &da830_evm_ui_expander_info, - }, -}; - -static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = { - .bus_freq = 100, /* kHz */ - .bus_delay = 0, /* usec */ -}; - -/* - * The following EDMA channels/slots are not being used by drivers (for - * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence - * they are being reserved for codecs on the DSP side. - */ -static const s16 da830_dma_rsv_chans[][2] = { - /* (offset, number) */ - { 8, 2}, - {12, 2}, - {24, 4}, - {30, 2}, - {-1, -1} -}; - -static const s16 da830_dma_rsv_slots[][2] = { - /* (offset, number) */ - { 8, 2}, - {12, 2}, - {24, 4}, - {30, 26}, - {-1, -1} -}; - -static struct edma_rsv_info da830_edma_rsv[] = { - { - .rsv_chans = da830_dma_rsv_chans, - .rsv_slots = da830_dma_rsv_slots, - }, -}; - -static struct mtd_partition da830evm_spiflash_part[] = { - [0] = { - .name = "DSP-UBL", - .offset = 0, - .size = SZ_8K, - .mask_flags = MTD_WRITEABLE, - }, - [1] = { - .name = "ARM-UBL", - .offset = MTDPART_OFS_APPEND, - .size = SZ_16K + SZ_8K, - .mask_flags = MTD_WRITEABLE, - }, - [2] = { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, - .size = SZ_256K - SZ_32K, - .mask_flags = MTD_WRITEABLE, - }, - [3] = { - .name = "U-Boot-Environment", - .offset = MTDPART_OFS_APPEND, - .size = SZ_16K, - .mask_flags = 0, - }, - [4] = { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static struct flash_platform_data da830evm_spiflash_data = { - .name = "m25p80", - .parts = da830evm_spiflash_part, - .nr_parts = ARRAY_SIZE(da830evm_spiflash_part), - .type = "w25x32", -}; - -static struct davinci_spi_config da830evm_spiflash_cfg = { - .io_type = SPI_IO_TYPE_DMA, - .c2tdelay = 8, - .t2cdelay = 8, -}; - -static struct spi_board_info da830evm_spi_info[] = { - { - .modalias = "m25p80", - .platform_data = &da830evm_spiflash_data, - .controller_data = &da830evm_spiflash_cfg, - .mode = SPI_MODE_0, - .max_speed_hz = 30000000, - .bus_num = 0, - .chip_select = 0, - }, -}; - -static __init void da830_evm_init(void) -{ - struct davinci_soc_info *soc_info = &davinci_soc_info; - int ret; - - da830_register_clocks(); - - ret = da830_register_gpio(); - if (ret) - pr_warn("%s: GPIO init failed: %d\n", __func__, ret); - - ret = da830_register_edma(da830_edma_rsv); - if (ret) - pr_warn("%s: edma registration failed: %d\n", __func__, ret); - - ret = davinci_cfg_reg_list(da830_i2c0_pins); - if (ret) - pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret); - - ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata); - if (ret) - pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret); - - da830_evm_usb_init(); - - soc_info->emac_pdata->rmii_en = 1; - soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID; - - ret = davinci_cfg_reg_list(da830_cpgmac_pins); - if (ret) - pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret); - - ret = da8xx_register_emac(); - if (ret) - pr_warn("%s: emac registration failed: %d\n", __func__, ret); - - ret = da8xx_register_watchdog(); - if (ret) - pr_warn("%s: watchdog registration failed: %d\n", - __func__, ret); - - davinci_serial_init(da8xx_serial_device); - - nvmem_add_cell_table(&da830_evm_nvmem_cell_table); - nvmem_add_cell_lookups(&da830_evm_nvmem_cell_lookup, 1); - - i2c_register_board_info(1, da830_evm_i2c_devices, - ARRAY_SIZE(da830_evm_i2c_devices)); - - ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins); - if (ret) - pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret); - - da8xx_register_mcasp(1, &da830_evm_snd_data); - - da830_evm_init_mmc(); - - ret = da8xx_register_rtc(); - if (ret) - pr_warn("%s: rtc setup failed: %d\n", __func__, ret); - - ret = spi_register_board_info(da830evm_spi_info, - ARRAY_SIZE(da830evm_spi_info)); - if (ret) - pr_warn("%s: spi info registration failed: %d\n", - __func__, ret); - - ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info)); - if (ret) - pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret); - - regulator_has_full_constraints(); -} - -#ifdef CONFIG_SERIAL_8250_CONSOLE -static int __init da830_evm_console_init(void) -{ - if (!machine_is_davinci_da830_evm()) - return 0; - - return add_preferred_console("ttyS", 2, "115200"); -} -console_initcall(da830_evm_console_init); -#endif - -static void __init da830_evm_map_io(void) -{ - da830_init(); -} - -MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") - .atag_offset = 0x100, - .map_io = da830_evm_map_io, - .init_irq = da830_init_irq, - .init_time = da830_init_time, - .init_machine = da830_evm_init, - .init_late = davinci_init_late, - .dma_zone_size = SZ_128M, -MACHINE_END diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c deleted file mode 100644 index d752ee2b30ff..000000000000 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ /dev/null @@ -1,1550 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * TI DA850/OMAP-L138 EVM board - * - * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/ - * - * Derived from: arch/arm/mach-davinci/board-da830-evm.c - * Original Copyrights follow: - * - * 2007, 2009 (c) MontaVista Software, Inc. - */ -#include <linux/console.h> -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/gpio_keys.h> -#include <linux/gpio/machine.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/leds.h> -#include <linux/i2c.h> -#include <linux/platform_data/pca953x.h> -#include <linux/input.h> -#include <linux/input/tps6507x-ts.h> -#include <linux/mfd/tps6507x.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/partitions.h> -#include <linux/nvmem-provider.h> -#include <linux/mtd/physmap.h> -#include <linux/platform_device.h> -#include <linux/platform_data/gpio-davinci.h> -#include <linux/platform_data/mtd-davinci.h> -#include <linux/platform_data/mtd-davinci-aemif.h> -#include <linux/platform_data/ti-aemif.h> -#include <linux/platform_data/spi-davinci.h> -#include <linux/platform_data/uio_pruss.h> -#include <linux/property.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/tps6507x.h> -#include <linux/regulator/fixed.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> - -#include "common.h" -#include "da8xx.h" -#include "mux.h" -#include "irqs.h" -#include "sram.h" - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/system_info.h> - -#include <media/i2c/tvp514x.h> -#include <media/i2c/adv7343.h> - -#define DA850_EVM_PHY_ID "davinci_mdio-0:00" -#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) -#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) - -#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) - -static struct mtd_partition da850evm_spiflash_part[] = { - [0] = { - .name = "UBL", - .offset = 0, - .size = SZ_64K, - .mask_flags = MTD_WRITEABLE, - }, - [1] = { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, - .size = SZ_512K, - .mask_flags = MTD_WRITEABLE, - }, - [2] = { - .name = "U-Boot-Env", - .offset = MTDPART_OFS_APPEND, - .size = SZ_64K, - .mask_flags = MTD_WRITEABLE, - }, - [3] = { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M + SZ_512K, - .mask_flags = 0, - }, - [4] = { - .name = "Filesystem", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - .mask_flags = 0, - }, - [5] = { - .name = "MAC-Address", - .offset = SZ_8M - SZ_64K, - .size = SZ_64K, - .mask_flags = MTD_WRITEABLE, - }, -}; - -static struct nvmem_cell_info da850evm_nvmem_cells[] = { - { - .name = "macaddr", - .offset = 0x0, - .bytes = ETH_ALEN, - } -}; - -static struct nvmem_cell_table da850evm_nvmem_cell_table = { - /* - * The nvmem name differs from the partition name because of the - * internal works of the nvmem framework. - */ - .nvmem_name = "MAC-Address0", - .cells = da850evm_nvmem_cells, - .ncells = ARRAY_SIZE(da850evm_nvmem_cells), -}; - -static struct nvmem_cell_lookup da850evm_nvmem_cell_lookup = { - .nvmem_name = "MAC-Address0", - .cell_name = "macaddr", - .dev_id = "davinci_emac.1", - .con_id = "mac-address", -}; - -static struct flash_platform_data da850evm_spiflash_data = { - .name = "m25p80", - .parts = da850evm_spiflash_part, - .nr_parts = ARRAY_SIZE(da850evm_spiflash_part), - .type = "m25p64", -}; - -static struct davinci_spi_config da850evm_spiflash_cfg = { - .io_type = SPI_IO_TYPE_DMA, - .c2tdelay = 8, - .t2cdelay = 8, -}; - -static struct spi_board_info da850evm_spi_info[] = { - { - .modalias = "m25p80", - .platform_data = &da850evm_spiflash_data, - .controller_data = &da850evm_spiflash_cfg, - .mode = SPI_MODE_0, - .max_speed_hz = 30000000, - .bus_num = 1, - .chip_select = 0, - }, -}; - -static struct mtd_partition da850_evm_norflash_partition[] = { - { - .name = "bootloaders + env", - .offset = 0, - .size = SZ_512K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - .mask_flags = 0, - }, - { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static struct physmap_flash_data da850_evm_norflash_data = { - .width = 2, - .parts = da850_evm_norflash_partition, - .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), -}; - -static struct resource da850_evm_norflash_resource[] = { - { - .start = DA8XX_AEMIF_CS2_BASE, - .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, - .flags = IORESOURCE_MEM, - }, -}; - -/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash - * (128K blocks). It may be used instead of the (default) SPI flash - * to boot, using TI's tools to install the secondary boot loader - * (UBL) and U-Boot. - */ -static struct mtd_partition da850_evm_nandflash_partition[] = { - { - .name = "u-boot env", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "UBL", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "u-boot", - .offset = MTDPART_OFS_APPEND, - .size = 4 * SZ_128K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = 0x200000, - .size = SZ_2M, - .mask_flags = 0, - }, - { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static struct davinci_aemif_timing da850_evm_nandflash_timing = { - .wsetup = 24, - .wstrobe = 21, - .whold = 14, - .rsetup = 19, - .rstrobe = 50, - .rhold = 0, - .ta = 20, -}; - -static struct davinci_nand_pdata da850_evm_nandflash_data = { - .core_chipsel = 1, - .parts = da850_evm_nandflash_partition, - .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), - .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, - .ecc_bits = 4, - .bbt_options = NAND_BBT_USE_FLASH, - .timing = &da850_evm_nandflash_timing, -}; - -static struct resource da850_evm_nandflash_resource[] = { - { - .start = DA8XX_AEMIF_CS3_BASE, - .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DA8XX_AEMIF_CTL_BASE, - .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct resource da850_evm_aemif_resource[] = { - { - .start = DA8XX_AEMIF_CTL_BASE, - .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, - .flags = IORESOURCE_MEM, - } -}; - -static struct aemif_abus_data da850_evm_aemif_abus_data[] = { - { - .cs = 3, - } -}; - -static struct platform_device da850_evm_aemif_devices[] = { - { - .name = "davinci_nand", - .id = 1, - .dev = { - .platform_data = &da850_evm_nandflash_data, - }, - .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), - .resource = da850_evm_nandflash_resource, - }, - { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &da850_evm_norflash_data, - }, - .num_resources = 1, - .resource = da850_evm_norflash_resource, - } -}; - -static struct aemif_platform_data da850_evm_aemif_pdata = { - .cs_offset = 2, - .abus_data = da850_evm_aemif_abus_data, - .num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data), - .sub_devices = da850_evm_aemif_devices, - .num_sub_devices = ARRAY_SIZE(da850_evm_aemif_devices), -}; - -static struct platform_device da850_evm_aemif_device = { - .name = "ti-aemif", - .id = -1, - .dev = { - .platform_data = &da850_evm_aemif_pdata, - }, - .resource = da850_evm_aemif_resource, - .num_resources = ARRAY_SIZE(da850_evm_aemif_resource), -}; - -static const short da850_evm_nand_pins[] = { - DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, - DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, - DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, - DA850_NEMA_WE, DA850_NEMA_OE, - -1 -}; - -static const short da850_evm_nor_pins[] = { - DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, - DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, - DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, - DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, - DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, - DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, - DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, - DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, - DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, - DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, - DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, - DA850_EMA_A_22, DA850_EMA_A_23, - -1 -}; - -#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI) - -static inline void da850_evm_setup_nor_nand(void) -{ - int ret = 0; - - if (!HAS_MMC) { - ret = davinci_cfg_reg_list(da850_evm_nand_pins); - if (ret) - pr_warn("%s: NAND mux setup failed: %d\n", - __func__, ret); - - ret = davinci_cfg_reg_list(da850_evm_nor_pins); - if (ret) - pr_warn("%s: NOR mux setup failed: %d\n", - __func__, ret); - - ret = platform_device_register(&da850_evm_aemif_device); - if (ret) - pr_warn("%s: registering aemif failed: %d\n", - __func__, ret); - } -} - -#ifdef CONFIG_DA850_UI_RMII -static inline void da850_evm_setup_emac_rmii(int rmii_sel) -{ - struct davinci_soc_info *soc_info = &davinci_soc_info; - - soc_info->emac_pdata->rmii_en = 1; - gpio_set_value_cansleep(rmii_sel, 0); -} -#else -static inline void da850_evm_setup_emac_rmii(int rmii_sel) { } -#endif - - -#define DA850_KEYS_DEBOUNCE_MS 10 -/* - * At 200ms polling interval it is possible to miss an - * event by tapping very lightly on the push button but most - * pushes do result in an event; longer intervals require the - * user to hold the button whereas shorter intervals require - * more CPU time for polling. - */ -#define DA850_GPIO_KEYS_POLL_MS 200 - -enum da850_evm_ui_exp_pins { - DA850_EVM_UI_EXP_SEL_C = 5, - DA850_EVM_UI_EXP_SEL_B, - DA850_EVM_UI_EXP_SEL_A, - DA850_EVM_UI_EXP_PB8, - DA850_EVM_UI_EXP_PB7, - DA850_EVM_UI_EXP_PB6, - DA850_EVM_UI_EXP_PB5, - DA850_EVM_UI_EXP_PB4, - DA850_EVM_UI_EXP_PB3, - DA850_EVM_UI_EXP_PB2, - DA850_EVM_UI_EXP_PB1, -}; - -static const char * const da850_evm_ui_exp[] = { - [DA850_EVM_UI_EXP_SEL_C] = "sel_c", - [DA850_EVM_UI_EXP_SEL_B] = "sel_b", - [DA850_EVM_UI_EXP_SEL_A] = "sel_a", - [DA850_EVM_UI_EXP_PB8] = "pb8", - [DA850_EVM_UI_EXP_PB7] = "pb7", - [DA850_EVM_UI_EXP_PB6] = "pb6", - [DA850_EVM_UI_EXP_PB5] = "pb5", - [DA850_EVM_UI_EXP_PB4] = "pb4", - [DA850_EVM_UI_EXP_PB3] = "pb3", - [DA850_EVM_UI_EXP_PB2] = "pb2", - [DA850_EVM_UI_EXP_PB1] = "pb1", -}; - -#define DA850_N_UI_PB 8 - -static struct gpio_keys_button da850_evm_ui_keys[] = { - [0 ... DA850_N_UI_PB - 1] = { - .type = EV_KEY, - .active_low = 1, - .wakeup = 0, - .debounce_interval = DA850_KEYS_DEBOUNCE_MS, - .code = -1, /* assigned at runtime */ - .gpio = -1, /* assigned at runtime */ - .desc = NULL, /* assigned at runtime */ - }, -}; - -static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = { - .buttons = da850_evm_ui_keys, - .nbuttons = ARRAY_SIZE(da850_evm_ui_keys), - .poll_interval = DA850_GPIO_KEYS_POLL_MS, -}; - -static struct platform_device da850_evm_ui_keys_device = { - .name = "gpio-keys-polled", - .id = 0, - .dev = { - .platform_data = &da850_evm_ui_keys_pdata - }, -}; - -static void da850_evm_ui_keys_init(unsigned gpio) -{ - int i; - struct gpio_keys_button *button; - - for (i = 0; i < DA850_N_UI_PB; i++) { - button = &da850_evm_ui_keys[i]; - button->code = KEY_F8 - i; - button->desc = da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i]; - button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i; - } -} - -#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT -static inline void da850_evm_setup_video_port(int video_sel) -{ - gpio_set_value_cansleep(video_sel, 0); -} -#else -static inline void da850_evm_setup_video_port(int video_sel) { } -#endif - -static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, - unsigned ngpio, void *c) -{ - int sel_a, sel_b, sel_c, ret; - - sel_a = gpio + DA850_EVM_UI_EXP_SEL_A; - sel_b = gpio + DA850_EVM_UI_EXP_SEL_B; - sel_c = gpio + DA850_EVM_UI_EXP_SEL_C; - - ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]); - if (ret) { - pr_warn("Cannot open UI expander pin %d\n", sel_a); - goto exp_setup_sela_fail; - } - - ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]); - if (ret) { - pr_warn("Cannot open UI expander pin %d\n", sel_b); - goto exp_setup_selb_fail; - } - - ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]); - if (ret) { - pr_warn("Cannot open UI expander pin %d\n", sel_c); - goto exp_setup_selc_fail; - } - - /* deselect all functionalities */ - gpio_direction_output(sel_a, 1); - gpio_direction_output(sel_b, 1); - gpio_direction_output(sel_c, 1); - - da850_evm_ui_keys_init(gpio); - ret = platform_device_register(&da850_evm_ui_keys_device); - if (ret) { - pr_warn("Could not register UI GPIO expander push-buttons"); - goto exp_setup_keys_fail; - } - - pr_info("DA850/OMAP-L138 EVM UI card detected\n"); - - da850_evm_setup_nor_nand(); - - da850_evm_setup_emac_rmii(sel_a); - - da850_evm_setup_video_port(sel_c); - - return 0; - -exp_setup_keys_fail: - gpio_free(sel_c); -exp_setup_selc_fail: - gpio_free(sel_b); -exp_setup_selb_fail: - gpio_free(sel_a); -exp_setup_sela_fail: - return ret; -} - -static void da850_evm_ui_expander_teardown(struct i2c_client *client, - unsigned gpio, unsigned ngpio, void *c) -{ - platform_device_unregister(&da850_evm_ui_keys_device); - - /* deselect all functionalities */ - gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1); - gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1); - gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1); - - gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C); - gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B); - gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A); -} - -/* assign the baseboard expander's GPIOs after the UI board's */ -#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp) -#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS) - -enum da850_evm_bb_exp_pins { - DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0, - DA850_EVM_BB_EXP_SW_RST, - DA850_EVM_BB_EXP_TP_23, - DA850_EVM_BB_EXP_TP_22, - DA850_EVM_BB_EXP_TP_21, - DA850_EVM_BB_EXP_USER_PB1, - DA850_EVM_BB_EXP_USER_LED2, - DA850_EVM_BB_EXP_USER_LED1, - DA850_EVM_BB_EXP_USER_SW1, - DA850_EVM_BB_EXP_USER_SW2, - DA850_EVM_BB_EXP_USER_SW3, - DA850_EVM_BB_EXP_USER_SW4, - DA850_EVM_BB_EXP_USER_SW5, - DA850_EVM_BB_EXP_USER_SW6, - DA850_EVM_BB_EXP_USER_SW7, - DA850_EVM_BB_EXP_USER_SW8 -}; - -static const char * const da850_evm_bb_exp[] = { - [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en", - [DA850_EVM_BB_EXP_SW_RST] = "sw_rst", - [DA850_EVM_BB_EXP_TP_23] = "tp_23", - [DA850_EVM_BB_EXP_TP_22] = "tp_22", - [DA850_EVM_BB_EXP_TP_21] = "tp_21", - [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1", - [DA850_EVM_BB_EXP_USER_LED2] = "user_led2", - [DA850_EVM_BB_EXP_USER_LED1] = "user_led1", - [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1", - [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2", - [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3", - [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4", - [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5", - [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6", - [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7", - [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8", -}; - -#define DA850_N_BB_USER_SW 8 - -static struct gpio_keys_button da850_evm_bb_keys[] = { - [0] = { - .type = EV_KEY, - .active_low = 1, - .wakeup = 0, - .debounce_interval = DA850_KEYS_DEBOUNCE_MS, - .code = KEY_PROG1, - .desc = NULL, /* assigned at runtime */ - .gpio = -1, /* assigned at runtime */ - }, - [1 ... DA850_N_BB_USER_SW] = { - .type = EV_SW, - .active_low = 1, - .wakeup = 0, - .debounce_interval = DA850_KEYS_DEBOUNCE_MS, - .code = -1, /* assigned at runtime */ - .desc = NULL, /* assigned at runtime */ - .gpio = -1, /* assigned at runtime */ - }, -}; - -static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = { - .buttons = da850_evm_bb_keys, - .nbuttons = ARRAY_SIZE(da850_evm_bb_keys), - .poll_interval = DA850_GPIO_KEYS_POLL_MS, -}; - -static struct platform_device da850_evm_bb_keys_device = { - .name = "gpio-keys-polled", - .id = 1, - .dev = { - .platform_data = &da850_evm_bb_keys_pdata - }, -}; - -static void da850_evm_bb_keys_init(unsigned gpio) -{ - int i; - struct gpio_keys_button *button; - - button = &da850_evm_bb_keys[0]; - button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1]; - button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1; - - for (i = 0; i < DA850_N_BB_USER_SW; i++) { - button = &da850_evm_bb_keys[i + 1]; - button->code = SW_LID + i; - button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i]; - button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i; - } -} - -static struct gpio_led da850_evm_bb_leds[] = { - { - .name = "user_led2", - }, - { - .name = "user_led1", - }, -}; - -static struct gpio_led_platform_data da850_evm_bb_leds_pdata = { - .leds = da850_evm_bb_leds, - .num_leds = ARRAY_SIZE(da850_evm_bb_leds), -}; - -static struct gpiod_lookup_table da850_evm_bb_leds_gpio_table = { - .dev_id = "leds-gpio", - .table = { - GPIO_LOOKUP_IDX("i2c-bb-expander", - DA850_EVM_BB_EXP_USER_LED2, NULL, - 0, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("i2c-bb-expander", - DA850_EVM_BB_EXP_USER_LED2 + 1, NULL, - 1, GPIO_ACTIVE_LOW), - - { }, - }, -}; - -static struct platform_device da850_evm_bb_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &da850_evm_bb_leds_pdata - } -}; - -static int da850_evm_bb_expander_setup(struct i2c_client *client, - unsigned gpio, unsigned ngpio, - void *c) -{ - int ret; - - /* - * Register the switches and pushbutton on the baseboard as a gpio-keys - * device. - */ - da850_evm_bb_keys_init(gpio); - ret = platform_device_register(&da850_evm_bb_keys_device); - if (ret) { - pr_warn("Could not register baseboard GPIO expander keys"); - goto io_exp_setup_sw_fail; - } - - gpiod_add_lookup_table(&da850_evm_bb_leds_gpio_table); - ret = platform_device_register(&da850_evm_bb_leds_device); - if (ret) { - pr_warn("Could not register baseboard GPIO expander LEDs"); - goto io_exp_setup_leds_fail; - } - - return 0; - -io_exp_setup_leds_fail: - platform_device_unregister(&da850_evm_bb_keys_device); -io_exp_setup_sw_fail: - return ret; -} - -static void da850_evm_bb_expander_teardown(struct i2c_client *client, - unsigned gpio, unsigned ngpio, void *c) -{ - platform_device_unregister(&da850_evm_bb_leds_device); - platform_device_unregister(&da850_evm_bb_keys_device); -} - -static struct pca953x_platform_data da850_evm_ui_expander_info = { - .gpio_base = DAVINCI_N_GPIO, - .setup = da850_evm_ui_expander_setup, - .teardown = da850_evm_ui_expander_teardown, - .names = da850_evm_ui_exp, -}; - -static struct pca953x_platform_data da850_evm_bb_expander_info = { - .gpio_base = DA850_BB_EXPANDER_GPIO_BASE, - .setup = da850_evm_bb_expander_setup, - .teardown = da850_evm_bb_expander_teardown, - .names = da850_evm_bb_exp, -}; - -static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { - { - I2C_BOARD_INFO("tlv320aic3x", 0x18), - }, - { - I2C_BOARD_INFO("tca6416", 0x20), - .dev_name = "ui-expander", - .platform_data = &da850_evm_ui_expander_info, - }, - { - I2C_BOARD_INFO("tca6416", 0x21), - .dev_name = "bb-expander", - .platform_data = &da850_evm_bb_expander_info, - }, -}; - -static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { - .bus_freq = 100, /* kHz */ - .bus_delay = 0, /* usec */ -}; - -/* davinci da850 evm audio machine driver */ -static u8 da850_iis_serializer_direction[] = { - INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, - INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, - INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, - RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, -}; - -static struct snd_platform_data da850_evm_snd_data = { - .tx_dma_offset = 0x2000, - .rx_dma_offset = 0x2000, - .op_mode = DAVINCI_MCASP_IIS_MODE, - .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), - .tdm_slots = 2, - .serial_dir = da850_iis_serializer_direction, - .asp_chan_q = EVENTQ_0, - .ram_chan_q = EVENTQ_1, - .version = MCASP_VERSION_2, - .txnumevt = 1, - .rxnumevt = 1, - .sram_size_playback = SZ_8K, - .sram_size_capture = SZ_8K, -}; - -static const short da850_evm_mcasp_pins[] __initconst = { - DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, - DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, - DA850_AXR_11, DA850_AXR_12, - -1 -}; - -#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) -#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) - -static struct gpiod_lookup_table mmc_gpios_table = { - .dev_id = "da830-mmc.0", - .table = { - /* gpio chip 2 contains gpio range 64-95 */ - GPIO_LOOKUP("davinci_gpio", DA850_MMCSD_CD_PIN, "cd", - GPIO_ACTIVE_LOW), - GPIO_LOOKUP("davinci_gpio", DA850_MMCSD_WP_PIN, "wp", - GPIO_ACTIVE_HIGH), - { } - }, -}; - -static struct davinci_mmc_config da850_mmc_config = { - .wires = 4, - .max_freq = 50000000, - .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, -}; - -static const short da850_evm_mmcsd0_pins[] __initconst = { - DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, - DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, - DA850_GPIO4_0, DA850_GPIO4_1, - -1 -}; - -static struct property_entry da850_lcd_backlight_props[] = { - PROPERTY_ENTRY_BOOL("default-on"), - { } -}; - -static struct gpiod_lookup_table da850_lcd_backlight_gpio_table = { - .dev_id = "gpio-backlight", - .table = { - GPIO_LOOKUP("davinci_gpio", DA850_LCD_BL_PIN, NULL, 0), - { } - }, -}; - -static const struct platform_device_info da850_lcd_backlight_info = { - .name = "gpio-backlight", - .id = PLATFORM_DEVID_NONE, - .properties = da850_lcd_backlight_props, -}; - -static struct regulator_consumer_supply da850_lcd_supplies[] = { - REGULATOR_SUPPLY("lcd", NULL), -}; - -static struct regulator_init_data da850_lcd_supply_data = { - .consumer_supplies = da850_lcd_supplies, - .num_consumer_supplies = ARRAY_SIZE(da850_lcd_supplies), - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -static struct fixed_voltage_config da850_lcd_supply = { - .supply_name = "lcd", - .microvolts = 33000000, - .init_data = &da850_lcd_supply_data, -}; - -static struct platform_device da850_lcd_supply_device = { - .name = "reg-fixed-voltage", - .id = 1, /* Dummy fixed regulator is 0 */ - .dev = { - .platform_data = &da850_lcd_supply, - }, -}; - -static struct gpiod_lookup_table da850_lcd_supply_gpio_table = { - .dev_id = "reg-fixed-voltage.1", - .table = { - GPIO_LOOKUP("davinci_gpio", DA850_LCD_PWR_PIN, NULL, 0), - { } - }, -}; - -static struct gpiod_lookup_table *da850_lcd_gpio_lookups[] = { - &da850_lcd_backlight_gpio_table, - &da850_lcd_supply_gpio_table, -}; - -static int da850_lcd_hw_init(void) -{ - struct platform_device *backlight; - int status; - - gpiod_add_lookup_tables(da850_lcd_gpio_lookups, - ARRAY_SIZE(da850_lcd_gpio_lookups)); - - backlight = platform_device_register_full(&da850_lcd_backlight_info); - if (IS_ERR(backlight)) - return PTR_ERR(backlight); - - status = platform_device_register(&da850_lcd_supply_device); - if (status) - return status; - - return 0; -} - -/* Fixed regulator support */ -static struct regulator_consumer_supply fixed_supplies[] = { - /* Baseboard 3.3V: 5V -> TPS73701DCQ -> 3.3V */ - REGULATOR_SUPPLY("AVDD", "1-0018"), - REGULATOR_SUPPLY("DRVDD", "1-0018"), - - /* Baseboard 1.8V: 5V -> TPS73701DCQ -> 1.8V */ - REGULATOR_SUPPLY("DVDD", "1-0018"), - - /* UI card 3.3V: 5V -> TPS73701DCQ -> 3.3V */ - REGULATOR_SUPPLY("vcc", "1-0020"), -}; - -/* TPS65070 voltage regulator support */ - -/* 3.3V */ -static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { - { - .supply = "usb0_vdda33", - }, - { - .supply = "usb1_vdda33", - }, -}; - -/* 3.3V or 1.8V */ -static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { - { - .supply = "dvdd3318_a", - }, - { - .supply = "dvdd3318_b", - }, - { - .supply = "dvdd3318_c", - }, - REGULATOR_SUPPLY("IOVDD", "1-0018"), -}; - -/* 1.2V */ -static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = { - { - .supply = "cvdd", - }, -}; - -/* 1.8V LDO */ -static struct regulator_consumer_supply tps65070_ldo1_consumers[] = { - { - .supply = "sata_vddr", - }, - { - .supply = "usb0_vdda18", - }, - { - .supply = "usb1_vdda18", - }, - { - .supply = "ddr_dvdd18", - }, -}; - -/* 1.2V LDO */ -static struct regulator_consumer_supply tps65070_ldo2_consumers[] = { - { - .supply = "sata_vdd", - }, - { - .supply = "pll0_vdda", - }, - { - .supply = "pll1_vdda", - }, - { - .supply = "usbs_cvdd", - }, - { - .supply = "vddarnwa1", - }, -}; - -/* We take advantage of the fact that both defdcdc{2,3} are tied high */ -static struct tps6507x_reg_platform_data tps6507x_platform_data = { - .defdcdc_default = true, -}; - -static struct regulator_init_data tps65070_regulator_data[] = { - /* dcdc1 */ - { - .constraints = { - .min_uV = 3150000, - .max_uV = 3450000, - .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS), - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers), - .consumer_supplies = tps65070_dcdc1_consumers, - }, - - /* dcdc2 */ - { - .constraints = { - .min_uV = 1710000, - .max_uV = 3450000, - .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS), - .boot_on = 1, - .always_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers), - .consumer_supplies = tps65070_dcdc2_consumers, - .driver_data = &tps6507x_platform_data, - }, - - /* dcdc3 */ - { - .constraints = { - .min_uV = 950000, - .max_uV = 1350000, - .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS), - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers), - .consumer_supplies = tps65070_dcdc3_consumers, - .driver_data = &tps6507x_platform_data, - }, - - /* ldo1 */ - { - .constraints = { - .min_uV = 1710000, - .max_uV = 1890000, - .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS), - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers), - .consumer_supplies = tps65070_ldo1_consumers, - }, - - /* ldo2 */ - { - .constraints = { - .min_uV = 1140000, - .max_uV = 1320000, - .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS), - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers), - .consumer_supplies = tps65070_ldo2_consumers, - }, -}; - -static struct touchscreen_init_data tps6507x_touchscreen_data = { - .poll_period = 30, /* ms between touch samples */ - .min_pressure = 0x30, /* minimum pressure to trigger touch */ - .vendor = 0, /* /sys/class/input/input?/id/vendor */ - .product = 65070, /* /sys/class/input/input?/id/product */ - .version = 0x100, /* /sys/class/input/input?/id/version */ -}; - -static struct tps6507x_board tps_board = { - .tps6507x_pmic_init_data = &tps65070_regulator_data[0], - .tps6507x_ts_init_data = &tps6507x_touchscreen_data, -}; - -static struct i2c_board_info __initdata da850_evm_tps65070_info[] = { - { - I2C_BOARD_INFO("tps6507x", 0x48), - .platform_data = &tps_board, - }, -}; - -static int __init pmic_tps65070_init(void) -{ - return i2c_register_board_info(1, da850_evm_tps65070_info, - ARRAY_SIZE(da850_evm_tps65070_info)); -} - -static const short da850_evm_lcdc_pins[] = { - DA850_GPIO2_8, DA850_GPIO2_15, - -1 -}; - -static const short da850_evm_mii_pins[] = { - DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, - DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, - DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, - DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, - DA850_MDIO_D, - -1 -}; - -static const short da850_evm_rmii_pins[] = { - DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, - DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, - DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, - DA850_MDIO_D, - -1 -}; - -static struct gpiod_hog da850_evm_emac_gpio_hogs[] = { - { - .chip_label = "davinci_gpio", - .chip_hwnum = DA850_MII_MDIO_CLKEN_PIN, - .line_name = "mdio_clk_en", - .lflags = 0, - /* dflags set in da850_evm_config_emac() */ - }, - { } -}; - -static int __init da850_evm_config_emac(void) -{ - void __iomem *cfg_chip3_base; - int ret; - u32 val; - struct davinci_soc_info *soc_info = &davinci_soc_info; - u8 rmii_en; - - if (!machine_is_davinci_da850_evm()) - return 0; - - rmii_en = soc_info->emac_pdata->rmii_en; - - cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); - - val = __raw_readl(cfg_chip3_base); - - if (rmii_en) { - val |= BIT(8); - ret = davinci_cfg_reg_list(da850_evm_rmii_pins); - pr_info("EMAC: RMII PHY configured, MII PHY will not be" - " functional\n"); - } else { - val &= ~BIT(8); - ret = davinci_cfg_reg_list(da850_evm_mii_pins); - pr_info("EMAC: MII PHY configured, RMII PHY will not be" - " functional\n"); - } - - if (ret) - pr_warn("%s: CPGMAC/RMII mux setup failed: %d\n", - __func__, ret); - - /* configure the CFGCHIP3 register for RMII or MII */ - __raw_writel(val, cfg_chip3_base); - - ret = davinci_cfg_reg(DA850_GPIO2_6); - if (ret) - pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__); - - da850_evm_emac_gpio_hogs[0].dflags = rmii_en ? GPIOD_OUT_HIGH - : GPIOD_OUT_LOW; - gpiod_add_hogs(da850_evm_emac_gpio_hogs); - - soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; - - ret = da8xx_register_emac(); - if (ret) - pr_warn("%s: EMAC registration failed: %d\n", __func__, ret); - - return 0; -} -device_initcall(da850_evm_config_emac); - -/* - * The following EDMA channels/slots are not being used by drivers (for - * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence - * they are being reserved for codecs on the DSP side. - */ -static const s16 da850_dma0_rsv_chans[][2] = { - /* (offset, number) */ - { 8, 6}, - {24, 4}, - {30, 2}, - {-1, -1} -}; - -static const s16 da850_dma0_rsv_slots[][2] = { - /* (offset, number) */ - { 8, 6}, - {24, 4}, - {30, 50}, - {-1, -1} -}; - -static const s16 da850_dma1_rsv_chans[][2] = { - /* (offset, number) */ - { 0, 28}, - {30, 2}, - {-1, -1} -}; - -static const s16 da850_dma1_rsv_slots[][2] = { - /* (offset, number) */ - { 0, 28}, - {30, 90}, - {-1, -1} -}; - -static struct edma_rsv_info da850_edma_cc0_rsv = { - .rsv_chans = da850_dma0_rsv_chans, - .rsv_slots = da850_dma0_rsv_slots, -}; - -static struct edma_rsv_info da850_edma_cc1_rsv = { - .rsv_chans = da850_dma1_rsv_chans, - .rsv_slots = da850_dma1_rsv_slots, -}; - -static struct edma_rsv_info *da850_edma_rsv[2] = { - &da850_edma_cc0_rsv, - &da850_edma_cc1_rsv, -}; - -#ifdef CONFIG_CPU_FREQ -static __init int da850_evm_init_cpufreq(void) -{ - switch (system_rev & 0xF) { - case 3: - da850_max_speed = 456000; - break; - case 2: - da850_max_speed = 408000; - break; - case 1: - da850_max_speed = 372000; - break; - } - - return da850_register_cpufreq("pll0_sysclk3"); -} -#else -static __init int da850_evm_init_cpufreq(void) { return 0; } -#endif - -#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT) - -#define TVP5147_CH0 "tvp514x-0" -#define TVP5147_CH1 "tvp514x-1" - -/* VPIF capture configuration */ -static struct tvp514x_platform_data tvp5146_pdata = { - .clk_polarity = 0, - .hs_polarity = 1, - .vs_polarity = 1, -}; - -#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) - -static struct vpif_input da850_ch0_inputs[] = { - { - .input = { - .index = 0, - .name = "Composite", - .type = V4L2_INPUT_TYPE_CAMERA, - .capabilities = V4L2_IN_CAP_STD, - .std = TVP514X_STD_ALL, - }, - .input_route = INPUT_CVBS_VI2B, - .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC, - .subdev_name = TVP5147_CH0, - }, -}; - -static struct vpif_input da850_ch1_inputs[] = { - { - .input = { - .index = 0, - .name = "S-Video", - .type = V4L2_INPUT_TYPE_CAMERA, - .capabilities = V4L2_IN_CAP_STD, - .std = TVP514X_STD_ALL, - }, - .input_route = INPUT_SVIDEO_VI2C_VI1C, - .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC, - .subdev_name = TVP5147_CH1, - }, -}; - -static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = { - { - .name = TVP5147_CH0, - .board_info = { - I2C_BOARD_INFO("tvp5146", 0x5d), - .platform_data = &tvp5146_pdata, - }, - }, - { - .name = TVP5147_CH1, - .board_info = { - I2C_BOARD_INFO("tvp5146", 0x5c), - .platform_data = &tvp5146_pdata, - }, - }, -}; - -static struct vpif_capture_config da850_vpif_capture_config = { - .subdev_info = da850_vpif_capture_sdev_info, - .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info), - .i2c_adapter_id = 1, - .chan_config[0] = { - .inputs = da850_ch0_inputs, - .input_count = ARRAY_SIZE(da850_ch0_inputs), - .vpif_if = { - .if_type = VPIF_IF_BT656, - .hd_pol = 1, - .vd_pol = 1, - .fid_pol = 0, - }, - }, - .chan_config[1] = { - .inputs = da850_ch1_inputs, - .input_count = ARRAY_SIZE(da850_ch1_inputs), - .vpif_if = { - .if_type = VPIF_IF_BT656, - .hd_pol = 1, - .vd_pol = 1, - .fid_pol = 0, - }, - }, - .card_name = "DA850/OMAP-L138 Video Capture", -}; - -/* VPIF display configuration */ - -static struct adv7343_platform_data adv7343_pdata = { - .mode_config = { - .dac = { 1, 1, 1 }, - }, - .sd_config = { - .sd_dac_out = { 1 }, - }, -}; - -static struct vpif_subdev_info da850_vpif_subdev[] = { - { - .name = "adv7343", - .board_info = { - I2C_BOARD_INFO("adv7343", 0x2a), - .platform_data = &adv7343_pdata, - }, - }, -}; - -static const struct vpif_output da850_ch0_outputs[] = { - { - .output = { - .index = 0, - .name = "Composite", - .type = V4L2_OUTPUT_TYPE_ANALOG, - .capabilities = V4L2_OUT_CAP_STD, - .std = V4L2_STD_ALL, - }, - .subdev_name = "adv7343", - .output_route = ADV7343_COMPOSITE_ID, - }, - { - .output = { - .index = 1, - .name = "S-Video", - .type = V4L2_OUTPUT_TYPE_ANALOG, - .capabilities = V4L2_OUT_CAP_STD, - .std = V4L2_STD_ALL, - }, - .subdev_name = "adv7343", - .output_route = ADV7343_SVIDEO_ID, - }, -}; - -static struct vpif_display_config da850_vpif_display_config = { - .subdevinfo = da850_vpif_subdev, - .subdev_count = ARRAY_SIZE(da850_vpif_subdev), - .chan_config[0] = { - .outputs = da850_ch0_outputs, - .output_count = ARRAY_SIZE(da850_ch0_outputs), - }, - .card_name = "DA850/OMAP-L138 Video Display", - .i2c_adapter_id = 1, -}; - -static __init void da850_vpif_init(void) -{ - int ret; - - ret = da850_register_vpif(); - if (ret) - pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret); - - ret = davinci_cfg_reg_list(da850_vpif_capture_pins); - if (ret) - pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n", - ret); - - ret = da850_register_vpif_capture(&da850_vpif_capture_config); - if (ret) - pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret); - - ret = davinci_cfg_reg_list(da850_vpif_display_pins); - if (ret) - pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n", - ret); - - ret = da850_register_vpif_display(&da850_vpif_display_config); - if (ret) - pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret); -} - -#else -static __init void da850_vpif_init(void) {} -#endif - -#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) - -static __init void da850_evm_init(void) -{ - int ret; - - da850_register_clocks(); - - ret = da850_register_gpio(); - if (ret) - pr_warn("%s: GPIO init failed: %d\n", __func__, ret); - - regulator_register_fixed(0, fixed_supplies, ARRAY_SIZE(fixed_supplies)); - - ret = pmic_tps65070_init(); - if (ret) - pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret); - - ret = da850_register_edma(da850_edma_rsv); - if (ret) - pr_warn("%s: EDMA registration failed: %d\n", __func__, ret); - - ret = davinci_cfg_reg_list(da850_i2c0_pins); - if (ret) - pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret); - - ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata); - if (ret) - pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret); - - - ret = da8xx_register_watchdog(); - if (ret) - pr_warn("%s: watchdog registration failed: %d\n", - __func__, ret); - - if (HAS_MMC) { - ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins); - if (ret) - pr_warn("%s: MMCSD0 mux setup failed: %d\n", - __func__, ret); - - gpiod_add_lookup_table(&mmc_gpios_table); - - ret = da8xx_register_mmcsd0(&da850_mmc_config); - if (ret) - pr_warn("%s: MMCSD0 registration failed: %d\n", - __func__, ret); - } - - davinci_serial_init(da8xx_serial_device); - - nvmem_add_cell_table(&da850evm_nvmem_cell_table); - nvmem_add_cell_lookups(&da850evm_nvmem_cell_lookup, 1); - - i2c_register_board_info(1, da850_evm_i2c_devices, - ARRAY_SIZE(da850_evm_i2c_devices)); - - /* - * shut down uart 0 and 1; they are not used on the board and - * accessing them causes endless "too much work in irq53" messages - * with arago fs - */ - __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); - __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); - - ret = davinci_cfg_reg_list(da850_evm_mcasp_pins); - if (ret) - pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret); - - da850_evm_snd_data.sram_pool = sram_get_gen_pool(); - da8xx_register_mcasp(0, &da850_evm_snd_data); - - ret = davinci_cfg_reg_list(da850_lcdcntl_pins); - if (ret) - pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret); - - ret = da8xx_register_uio_pruss(); - if (ret) - pr_warn("da850_evm_init: pruss initialization failed: %d\n", - ret); - - /* Handle board specific muxing for LCD here */ - ret = davinci_cfg_reg_list(da850_evm_lcdc_pins); - if (ret) - pr_warn("%s: EVM specific LCD mux setup failed: %d\n", - __func__, ret); - - ret = da850_lcd_hw_init(); - if (ret) - pr_warn("%s: LCD initialization failed: %d\n", __func__, ret); - - ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); - if (ret) - pr_warn("%s: LCDC registration failed: %d\n", __func__, ret); - - ret = da8xx_register_rtc(); - if (ret) - pr_warn("%s: RTC setup failed: %d\n", __func__, ret); - - ret = da850_evm_init_cpufreq(); - if (ret) - pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret); - - ret = da8xx_register_cpuidle(); - if (ret) - pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret); - - davinci_pm_init(); - da850_vpif_init(); - - ret = spi_register_board_info(da850evm_spi_info, - ARRAY_SIZE(da850evm_spi_info)); - if (ret) - pr_warn("%s: spi info registration failed: %d\n", __func__, - ret); - - ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info)); - if (ret) - pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret); - - ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE); - if (ret) - pr_warn("%s: SATA registration failed: %d\n", __func__, ret); - - ret = da8xx_register_rproc(); - if (ret) - pr_warn("%s: dsp/rproc registration failed: %d\n", - __func__, ret); - - regulator_has_full_constraints(); -} - -#ifdef CONFIG_SERIAL_8250_CONSOLE -static int __init da850_evm_console_init(void) -{ - if (!machine_is_davinci_da850_evm()) - return 0; - - return add_preferred_console("ttyS", 2, "115200"); -} -console_initcall(da850_evm_console_init); -#endif - -static void __init da850_evm_map_io(void) -{ - da850_init(); -} - -MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") - .atag_offset = 0x100, - .map_io = da850_evm_map_io, - .init_irq = da850_init_irq, - .init_time = da850_init_time, - .init_machine = da850_evm_init, - .init_late = davinci_init_late, - .dma_zone_size = SZ_128M, - .reserve = da8xx_rproc_reserve_cma, -MACHINE_END diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c deleted file mode 100644 index b48ab1c3e48b..000000000000 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ /dev/null @@ -1,444 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * TI DaVinci EVM board support - * - * Author: Kevin Hilman, Deep Root Systems, LLC - * - * 2007 (c) MontaVista Software, Inc. - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/err.h> -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/rawnand.h> -#include <linux/i2c.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/clk.h> -#include <linux/dm9000.h> -#include <linux/videodev2.h> -#include <media/i2c/tvp514x.h> -#include <linux/spi/spi.h> -#include <linux/spi/eeprom.h> -#include <linux/platform_data/gpio-davinci.h> -#include <linux/platform_data/i2c-davinci.h> -#include <linux/platform_data/mtd-davinci.h> -#include <linux/platform_data/mmc-davinci.h> -#include <linux/platform_data/usb-davinci.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "serial.h" -#include "common.h" -#include "davinci.h" - -/* NOTE: this is geared for the standard config, with a socketed - * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you - * swap chips, maybe with a different block size, partitioning may - * need to be changed. - */ -#define NAND_BLOCK_SIZE SZ_128K - -static struct mtd_partition davinci_nand_partitions[] = { - { - /* UBL (a few copies) plus U-Boot */ - .name = "bootloader", - .offset = 0, - .size = 15 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, { - /* U-Boot environment */ - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = 1 * NAND_BLOCK_SIZE, - .mask_flags = 0, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - .mask_flags = 0, - }, { - .name = "filesystem1", - .offset = MTDPART_OFS_APPEND, - .size = SZ_512M, - .mask_flags = 0, - }, { - .name = "filesystem2", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - } - /* two blocks with bad block table (and mirror) at the end */ -}; - -static struct davinci_nand_pdata davinci_nand_data = { - .core_chipsel = 0, - .mask_chipsel = BIT(14), - .parts = davinci_nand_partitions, - .nr_parts = ARRAY_SIZE(davinci_nand_partitions), - .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, - .bbt_options = NAND_BBT_USE_FLASH, - .ecc_bits = 4, -}; - -static struct resource davinci_nand_resources[] = { - { - .start = DM355_ASYNC_EMIF_DATA_CE0_BASE, - .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, - .flags = IORESOURCE_MEM, - }, { - .start = DM355_ASYNC_EMIF_CONTROL_BASE, - .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device davinci_nand_device = { - .name = "davinci_nand", - .id = 0, - - .num_resources = ARRAY_SIZE(davinci_nand_resources), - .resource = davinci_nand_resources, - - .dev = { - .platform_data = &davinci_nand_data, - }, -}; - -#define DM355_I2C_SDA_PIN GPIO_TO_PIN(0, 15) -#define DM355_I2C_SCL_PIN GPIO_TO_PIN(0, 14) - -static struct gpiod_lookup_table i2c_recovery_gpiod_table = { - .dev_id = "i2c_davinci.1", - .table = { - GPIO_LOOKUP("davinci_gpio", DM355_I2C_SDA_PIN, "sda", - GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), - GPIO_LOOKUP("davinci_gpio", DM355_I2C_SCL_PIN, "scl", - GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), - { } - }, -}; - -static struct davinci_i2c_platform_data i2c_pdata = { - .bus_freq = 400 /* kHz */, - .bus_delay = 0 /* usec */, - .gpio_recovery = true, -}; - -static int dm355evm_mmc_gpios = -EINVAL; - -static void dm355evm_mmcsd_gpios(unsigned gpio) -{ - gpio_request(gpio + 0, "mmc0_ro"); - gpio_request(gpio + 1, "mmc0_cd"); - gpio_request(gpio + 2, "mmc1_ro"); - gpio_request(gpio + 3, "mmc1_cd"); - - /* we "know" these are input-only so we don't - * need to call gpio_direction_input() - */ - - dm355evm_mmc_gpios = gpio; -} - -static struct i2c_board_info dm355evm_i2c_info[] = { - { I2C_BOARD_INFO("dm355evm_msp", 0x25), - .platform_data = dm355evm_mmcsd_gpios, - }, - /* { plus irq }, */ - { I2C_BOARD_INFO("tlv320aic33", 0x1b), }, -}; - -static void __init evm_init_i2c(void) -{ - gpiod_add_lookup_table(&i2c_recovery_gpiod_table); - davinci_init_i2c(&i2c_pdata); - - gpio_request(5, "dm355evm_msp"); - gpio_direction_input(5); - dm355evm_i2c_info[0].irq = gpio_to_irq(5); - - i2c_register_board_info(1, dm355evm_i2c_info, - ARRAY_SIZE(dm355evm_i2c_info)); -} - -static struct resource dm355evm_dm9000_rsrc[] = { - { - /* addr */ - .start = 0x04014000, - .end = 0x04014001, - .flags = IORESOURCE_MEM, - }, { - /* data */ - .start = 0x04014002, - .end = 0x04014003, - .flags = IORESOURCE_MEM, - }, { - .flags = IORESOURCE_IRQ - | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */, - }, -}; - -static struct dm9000_plat_data dm335evm_dm9000_platdata; - -static struct platform_device dm355evm_dm9000 = { - .name = "dm9000", - .id = -1, - .resource = dm355evm_dm9000_rsrc, - .num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc), - .dev = { - .platform_data = &dm335evm_dm9000_platdata, - }, -}; - -static struct tvp514x_platform_data tvp5146_pdata = { - .clk_polarity = 0, - .hs_polarity = 1, - .vs_polarity = 1 -}; - -#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) -/* Inputs available at the TVP5146 */ -static struct v4l2_input tvp5146_inputs[] = { - { - .index = 0, - .name = "Composite", - .type = V4L2_INPUT_TYPE_CAMERA, - .std = TVP514X_STD_ALL, - }, - { - .index = 1, - .name = "S-Video", - .type = V4L2_INPUT_TYPE_CAMERA, - .std = TVP514X_STD_ALL, - }, -}; - -/* - * this is the route info for connecting each input to decoder - * ouput that goes to vpfe. There is a one to one correspondence - * with tvp5146_inputs - */ -static struct vpfe_route tvp5146_routes[] = { - { - .input = INPUT_CVBS_VI2B, - .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, - }, - { - .input = INPUT_SVIDEO_VI2C_VI1C, - .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, - }, -}; - -static struct vpfe_subdev_info vpfe_sub_devs[] = { - { - .name = "tvp5146", - .grp_id = 0, - .num_inputs = ARRAY_SIZE(tvp5146_inputs), - .inputs = tvp5146_inputs, - .routes = tvp5146_routes, - .can_route = 1, - .ccdc_if_params = { - .if_type = VPFE_BT656, - .hdpol = VPFE_PINPOL_POSITIVE, - .vdpol = VPFE_PINPOL_POSITIVE, - }, - .board_info = { - I2C_BOARD_INFO("tvp5146", 0x5d), - .platform_data = &tvp5146_pdata, - }, - } -}; - -static struct vpfe_config vpfe_cfg = { - .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), - .i2c_adapter_id = 1, - .sub_devs = vpfe_sub_devs, - .card_name = "DM355 EVM", - .ccdc = "DM355 CCDC", -}; - -/* venc standards timings */ -static struct vpbe_enc_mode_info dm355evm_enc_preset_timing[] = { - { - .name = "ntsc", - .timings_type = VPBE_ENC_STD, - .std_id = V4L2_STD_NTSC, - .interlaced = 1, - .xres = 720, - .yres = 480, - .aspect = {11, 10}, - .fps = {30000, 1001}, - .left_margin = 0x79, - .upper_margin = 0x10, - }, - { - .name = "pal", - .timings_type = VPBE_ENC_STD, - .std_id = V4L2_STD_PAL, - .interlaced = 1, - .xres = 720, - .yres = 576, - .aspect = {54, 59}, - .fps = {25, 1}, - .left_margin = 0x7E, - .upper_margin = 0x16 - }, -}; - -#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) - -/* - * The outputs available from VPBE + ecnoders. Keep the - * the order same as that of encoders. First those from venc followed by that - * from encoders. Index in the output refers to index on a particular encoder. - * Driver uses this index to pass it to encoder when it supports more than - * one output. Application uses index of the array to set an output. - */ -static struct vpbe_output dm355evm_vpbe_outputs[] = { - { - .output = { - .index = 0, - .name = "Composite", - .type = V4L2_OUTPUT_TYPE_ANALOG, - .std = VENC_STD_ALL, - .capabilities = V4L2_OUT_CAP_STD, - }, - .subdev_name = DM355_VPBE_VENC_SUBDEV_NAME, - .default_mode = "ntsc", - .num_modes = ARRAY_SIZE(dm355evm_enc_preset_timing), - .modes = dm355evm_enc_preset_timing, - .if_params = MEDIA_BUS_FMT_FIXED, - }, -}; - -static struct vpbe_config dm355evm_display_cfg = { - .module_name = "dm355-vpbe-display", - .i2c_adapter_id = 1, - .osd = { - .module_name = DM355_VPBE_OSD_SUBDEV_NAME, - }, - .venc = { - .module_name = DM355_VPBE_VENC_SUBDEV_NAME, - }, - .num_outputs = ARRAY_SIZE(dm355evm_vpbe_outputs), - .outputs = dm355evm_vpbe_outputs, -}; - -static struct platform_device *davinci_evm_devices[] __initdata = { - &dm355evm_dm9000, - &davinci_nand_device, -}; - -static void __init dm355_evm_map_io(void) -{ - dm355_init(); -} - -static int dm355evm_mmc_get_cd(int module) -{ - if (!gpio_is_valid(dm355evm_mmc_gpios)) - return -ENXIO; - /* low == card present */ - return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1); -} - -static int dm355evm_mmc_get_ro(int module) -{ - if (!gpio_is_valid(dm355evm_mmc_gpios)) - return -ENXIO; - /* high == card's write protect switch active */ - return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0); -} - -static struct davinci_mmc_config dm355evm_mmc_config = { - .get_cd = dm355evm_mmc_get_cd, - .get_ro = dm355evm_mmc_get_ro, - .wires = 4, - .max_freq = 50000000, - .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, -}; - -/* Don't connect anything to J10 unless you're only using USB host - * mode *and* have to do so with some kind of gender-bender. If - * you have proper Mini-B or Mini-A cables (or Mini-A adapters) - * the ID pin won't need any help. - */ -#define USB_ID_VALUE 1 /* ID pulled low */ - -static struct spi_eeprom at25640a = { - .byte_len = SZ_64K / 8, - .name = "at25640a", - .page_size = 32, - .flags = EE_ADDR2, -}; - -static const struct spi_board_info dm355_evm_spi_info[] __initconst = { - { - .modalias = "at25", - .platform_data = &at25640a, - .max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */ - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_0, - }, -}; - -static __init void dm355_evm_init(void) -{ - struct clk *aemif; - int ret; - - dm355_register_clocks(); - - ret = dm355_gpio_register(); - if (ret) - pr_warn("%s: GPIO init failed: %d\n", __func__, ret); - - gpio_request(1, "dm9000"); - gpio_direction_input(1); - dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1); - - aemif = clk_get(&dm355evm_dm9000.dev, "aemif"); - if (!WARN(IS_ERR(aemif), "unable to get AEMIF clock\n")) - clk_prepare_enable(aemif); - - platform_add_devices(davinci_evm_devices, - ARRAY_SIZE(davinci_evm_devices)); - evm_init_i2c(); - davinci_serial_init(dm355_serial_device); - - /* NOTE: NAND flash timings set by the UBL are slower than - * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204 - * but could be 0x0400008c for about 25% faster page reads. - */ - - gpio_request(2, "usb_id_toggle"); - gpio_direction_output(2, USB_ID_VALUE); - /* irlml6401 switches over 1A in under 8 msec */ - davinci_setup_usb(1000, 8); - - davinci_setup_mmc(0, &dm355evm_mmc_config); - davinci_setup_mmc(1, &dm355evm_mmc_config); - - dm355_init_video(&vpfe_cfg, &dm355evm_display_cfg); - - dm355_init_spi0(BIT(0), dm355_evm_spi_info, - ARRAY_SIZE(dm355_evm_spi_info)); - - /* DM335 EVM uses ASP1; line-out is a stereo mini-jack */ - dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN); -} - -MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") - .atag_offset = 0x100, - .map_io = dm355_evm_map_io, - .init_irq = dm355_init_irq, - .init_time = dm355_init_time, - .init_machine = dm355_evm_init, - .init_late = davinci_init_late, - .dma_zone_size = SZ_128M, -MACHINE_END diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c deleted file mode 100644 index 32b9d607d025..000000000000 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ /dev/null @@ -1,278 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * DM355 leopard board support - * - * Based on board-dm355-evm.c - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/err.h> -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/rawnand.h> -#include <linux/i2c.h> -#include <linux/gpio.h> -#include <linux/clk.h> -#include <linux/spi/spi.h> -#include <linux/spi/eeprom.h> -#include <linux/platform_data/i2c-davinci.h> -#include <linux/platform_data/mmc-davinci.h> -#include <linux/platform_data/mtd-davinci.h> -#include <linux/platform_data/usb-davinci.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "common.h" -#include "serial.h" -#include "davinci.h" - -/* NOTE: this is geared for the standard config, with a socketed - * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you - * swap chips, maybe with a different block size, partitioning may - * need to be changed. - */ -#define NAND_BLOCK_SIZE SZ_128K - -static struct mtd_partition davinci_nand_partitions[] = { - { - /* UBL (a few copies) plus U-Boot */ - .name = "bootloader", - .offset = 0, - .size = 15 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, { - /* U-Boot environment */ - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = 1 * NAND_BLOCK_SIZE, - .mask_flags = 0, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - .mask_flags = 0, - }, { - .name = "filesystem1", - .offset = MTDPART_OFS_APPEND, - .size = SZ_512M, - .mask_flags = 0, - }, { - .name = "filesystem2", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - } - /* two blocks with bad block table (and mirror) at the end */ -}; - -static struct davinci_nand_pdata davinci_nand_data = { - .core_chipsel = 0, - .mask_chipsel = BIT(14), - .parts = davinci_nand_partitions, - .nr_parts = ARRAY_SIZE(davinci_nand_partitions), - .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, - .ecc_placement = NAND_ECC_PLACEMENT_INTERLEAVED, - .ecc_bits = 4, - .bbt_options = NAND_BBT_USE_FLASH, -}; - -static struct resource davinci_nand_resources[] = { - { - .start = DM355_ASYNC_EMIF_DATA_CE0_BASE, - .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, - .flags = IORESOURCE_MEM, - }, { - .start = DM355_ASYNC_EMIF_CONTROL_BASE, - .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device davinci_nand_device = { - .name = "davinci_nand", - .id = 0, - - .num_resources = ARRAY_SIZE(davinci_nand_resources), - .resource = davinci_nand_resources, - - .dev = { - .platform_data = &davinci_nand_data, - }, -}; - -static struct davinci_i2c_platform_data i2c_pdata = { - .bus_freq = 400 /* kHz */, - .bus_delay = 0 /* usec */, -}; - -static int leopard_mmc_gpio = -EINVAL; - -static void dm355leopard_mmcsd_gpios(unsigned gpio) -{ - gpio_request(gpio + 0, "mmc0_ro"); - gpio_request(gpio + 1, "mmc0_cd"); - gpio_request(gpio + 2, "mmc1_ro"); - gpio_request(gpio + 3, "mmc1_cd"); - - /* we "know" these are input-only so we don't - * need to call gpio_direction_input() - */ - - leopard_mmc_gpio = gpio; -} - -static struct i2c_board_info dm355leopard_i2c_info[] = { - { I2C_BOARD_INFO("dm355leopard_msp", 0x25), - .platform_data = dm355leopard_mmcsd_gpios, - /* plus irq */ }, - /* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */ - /* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */ -}; - -static void __init leopard_init_i2c(void) -{ - davinci_init_i2c(&i2c_pdata); - - gpio_request(5, "dm355leopard_msp"); - gpio_direction_input(5); - dm355leopard_i2c_info[0].irq = gpio_to_irq(5); - - i2c_register_board_info(1, dm355leopard_i2c_info, - ARRAY_SIZE(dm355leopard_i2c_info)); -} - -static struct resource dm355leopard_dm9000_rsrc[] = { - { - /* addr */ - .start = 0x04000000, - .end = 0x04000001, - .flags = IORESOURCE_MEM, - }, { - /* data */ - .start = 0x04000016, - .end = 0x04000017, - .flags = IORESOURCE_MEM, - }, { - .flags = IORESOURCE_IRQ - | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */, - }, -}; - -static struct platform_device dm355leopard_dm9000 = { - .name = "dm9000", - .id = -1, - .resource = dm355leopard_dm9000_rsrc, - .num_resources = ARRAY_SIZE(dm355leopard_dm9000_rsrc), -}; - -static struct platform_device *davinci_leopard_devices[] __initdata = { - &dm355leopard_dm9000, - &davinci_nand_device, -}; - -static void __init dm355_leopard_map_io(void) -{ - dm355_init(); -} - -static int dm355leopard_mmc_get_cd(int module) -{ - if (!gpio_is_valid(leopard_mmc_gpio)) - return -ENXIO; - /* low == card present */ - return !gpio_get_value_cansleep(leopard_mmc_gpio + 2 * module + 1); -} - -static int dm355leopard_mmc_get_ro(int module) -{ - if (!gpio_is_valid(leopard_mmc_gpio)) - return -ENXIO; - /* high == card's write protect switch active */ - return gpio_get_value_cansleep(leopard_mmc_gpio + 2 * module + 0); -} - -static struct davinci_mmc_config dm355leopard_mmc_config = { - .get_cd = dm355leopard_mmc_get_cd, - .get_ro = dm355leopard_mmc_get_ro, - .wires = 4, - .max_freq = 50000000, - .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, -}; - -/* Don't connect anything to J10 unless you're only using USB host - * mode *and* have to do so with some kind of gender-bender. If - * you have proper Mini-B or Mini-A cables (or Mini-A adapters) - * the ID pin won't need any help. - */ -#define USB_ID_VALUE 1 /* ID pulled low */ - -static struct spi_eeprom at25640a = { - .byte_len = SZ_64K / 8, - .name = "at25640a", - .page_size = 32, - .flags = EE_ADDR2, -}; - -static const struct spi_board_info dm355_leopard_spi_info[] __initconst = { - { - .modalias = "at25", - .platform_data = &at25640a, - .max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */ - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_0, - }, -}; - -static __init void dm355_leopard_init(void) -{ - struct clk *aemif; - int ret; - - dm355_register_clocks(); - - ret = dm355_gpio_register(); - if (ret) - pr_warn("%s: GPIO init failed: %d\n", __func__, ret); - - gpio_request(9, "dm9000"); - gpio_direction_input(9); - dm355leopard_dm9000_rsrc[2].start = gpio_to_irq(9); - - aemif = clk_get(&dm355leopard_dm9000.dev, "aemif"); - if (!WARN(IS_ERR(aemif), "unable to get AEMIF clock\n")) - clk_prepare_enable(aemif); - - platform_add_devices(davinci_leopard_devices, - ARRAY_SIZE(davinci_leopard_devices)); - leopard_init_i2c(); - davinci_serial_init(dm355_serial_device); - - /* NOTE: NAND flash timings set by the UBL are slower than - * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204 - * but could be 0x0400008c for about 25% faster page reads. - */ - - gpio_request(2, "usb_id_toggle"); - gpio_direction_output(2, USB_ID_VALUE); - /* irlml6401 switches over 1A in under 8 msec */ - davinci_setup_usb(1000, 8); - - davinci_setup_mmc(0, &dm355leopard_mmc_config); - davinci_setup_mmc(1, &dm355leopard_mmc_config); - - dm355_init_spi0(BIT(0), dm355_leopard_spi_info, - ARRAY_SIZE(dm355_leopard_spi_info)); -} - -MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard") - .atag_offset = 0x100, - .map_io = dm355_leopard_map_io, - .init_irq = dm355_init_irq, - .init_time = dm355_init_time, - .init_machine = dm355_leopard_init, - .init_late = davinci_init_late, - .dma_zone_size = SZ_128M, -MACHINE_END diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c deleted file mode 100644 index d8c6c360818b..000000000000 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ /dev/null @@ -1,855 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * TI DaVinci DM365 EVM board support - * - * Copyright (C) 2009 Texas Instruments Incorporated - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/err.h> -#include <linux/i2c.h> -#include <linux/io.h> -#include <linux/clk.h> -#include <linux/property.h> -#include <linux/leds.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/slab.h> -#include <linux/mtd/rawnand.h> -#include <linux/nvmem-provider.h> -#include <linux/input.h> -#include <linux/spi/spi.h> -#include <linux/spi/eeprom.h> -#include <linux/v4l2-dv-timings.h> -#include <linux/platform_data/ti-aemif.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include <linux/platform_data/i2c-davinci.h> -#include <linux/platform_data/mmc-davinci.h> -#include <linux/platform_data/mtd-davinci.h> -#include <linux/platform_data/keyscan-davinci.h> - -#include <media/i2c/ths7303.h> -#include <media/i2c/tvp514x.h> - -#include "mux.h" -#include "common.h" -#include "serial.h" -#include "davinci.h" - -static inline int have_imager(void) -{ - /* REVISIT when it's supported, trigger via Kconfig */ - return 0; -} - -static inline int have_tvp7002(void) -{ - /* REVISIT when it's supported, trigger via Kconfig */ - return 0; -} - -#define DM365_EVM_PHY_ID "davinci_mdio-0:01" -/* - * A MAX-II CPLD is used for various board control functions. - */ -#define CPLD_OFFSET(a13a8,a2a1) (((a13a8) << 10) + ((a2a1) << 3)) - -#define CPLD_VERSION CPLD_OFFSET(0,0) /* r/o */ -#define CPLD_TEST CPLD_OFFSET(0,1) -#define CPLD_LEDS CPLD_OFFSET(0,2) -#define CPLD_MUX CPLD_OFFSET(0,3) -#define CPLD_SWITCH CPLD_OFFSET(1,0) /* r/o */ -#define CPLD_POWER CPLD_OFFSET(1,1) -#define CPLD_VIDEO CPLD_OFFSET(1,2) -#define CPLD_CARDSTAT CPLD_OFFSET(1,3) /* r/o */ - -#define CPLD_DILC_OUT CPLD_OFFSET(2,0) -#define CPLD_DILC_IN CPLD_OFFSET(2,1) /* r/o */ - -#define CPLD_IMG_DIR0 CPLD_OFFSET(2,2) -#define CPLD_IMG_MUX0 CPLD_OFFSET(2,3) -#define CPLD_IMG_MUX1 CPLD_OFFSET(3,0) -#define CPLD_IMG_DIR1 CPLD_OFFSET(3,1) -#define CPLD_IMG_MUX2 CPLD_OFFSET(3,2) -#define CPLD_IMG_MUX3 CPLD_OFFSET(3,3) -#define CPLD_IMG_DIR2 CPLD_OFFSET(4,0) -#define CPLD_IMG_MUX4 CPLD_OFFSET(4,1) -#define CPLD_IMG_MUX5 CPLD_OFFSET(4,2) - -#define CPLD_RESETS CPLD_OFFSET(4,3) - -#define CPLD_CCD_DIR1 CPLD_OFFSET(0x3e,0) -#define CPLD_CCD_IO1 CPLD_OFFSET(0x3e,1) -#define CPLD_CCD_DIR2 CPLD_OFFSET(0x3e,2) -#define CPLD_CCD_IO2 CPLD_OFFSET(0x3e,3) -#define CPLD_CCD_DIR3 CPLD_OFFSET(0x3f,0) -#define CPLD_CCD_IO3 CPLD_OFFSET(0x3f,1) - -static void __iomem *cpld; - - -/* NOTE: this is geared for the standard config, with a socketed - * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you - * swap chips with a different block size, partitioning will - * need to be changed. This NAND chip MT29F16G08FAA is the default - * NAND shipped with the Spectrum Digital DM365 EVM - */ -#define NAND_BLOCK_SIZE SZ_128K - -static struct mtd_partition davinci_nand_partitions[] = { - { - /* UBL (a few copies) plus U-Boot */ - .name = "bootloader", - .offset = 0, - .size = 30 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, { - /* U-Boot environment */ - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = 2 * NAND_BLOCK_SIZE, - .mask_flags = 0, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - .mask_flags = 0, - }, { - .name = "filesystem1", - .offset = MTDPART_OFS_APPEND, - .size = SZ_512M, - .mask_flags = 0, - }, { - .name = "filesystem2", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - } - /* two blocks with bad block table (and mirror) at the end */ -}; - -static struct davinci_nand_pdata davinci_nand_data = { - .core_chipsel = 0, - .mask_chipsel = BIT(14), - .parts = davinci_nand_partitions, - .nr_parts = ARRAY_SIZE(davinci_nand_partitions), - .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, - .bbt_options = NAND_BBT_USE_FLASH, - .ecc_bits = 4, -}; - -static struct resource davinci_nand_resources[] = { - { - .start = DM365_ASYNC_EMIF_DATA_CE0_BASE, - .end = DM365_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, - .flags = IORESOURCE_MEM, - }, { - .start = DM365_ASYNC_EMIF_CONTROL_BASE, - .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device davinci_aemif_devices[] = { - { - .name = "davinci_nand", - .id = 0, - .num_resources = ARRAY_SIZE(davinci_nand_resources), - .resource = davinci_nand_resources, - .dev = { - .platform_data = &davinci_nand_data, - }, - } -}; - -static struct resource davinci_aemif_resources[] = { - { - .start = DM365_ASYNC_EMIF_CONTROL_BASE, - .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct aemif_abus_data da850_evm_aemif_abus_data[] = { - { - .cs = 1, - }, -}; - -static struct aemif_platform_data davinci_aemif_pdata = { - .abus_data = da850_evm_aemif_abus_data, - .num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data), - .sub_devices = davinci_aemif_devices, - .num_sub_devices = ARRAY_SIZE(davinci_aemif_devices), -}; - -static struct platform_device davinci_aemif_device = { - .name = "ti-aemif", - .id = -1, - .dev = { - .platform_data = &davinci_aemif_pdata, - }, - .resource = davinci_aemif_resources, - .num_resources = ARRAY_SIZE(davinci_aemif_resources), -}; - -static struct nvmem_cell_info davinci_nvmem_cells[] = { - { - .name = "macaddr", - .offset = 0x7f00, - .bytes = ETH_ALEN, - } -}; - -static struct nvmem_cell_table davinci_nvmem_cell_table = { - .nvmem_name = "1-00500", - .cells = davinci_nvmem_cells, - .ncells = ARRAY_SIZE(davinci_nvmem_cells), -}; - -static struct nvmem_cell_lookup davinci_nvmem_cell_lookup = { - .nvmem_name = "1-00500", - .cell_name = "macaddr", - .dev_id = "davinci_emac.1", - .con_id = "mac-address", -}; - -static const struct property_entry eeprom_properties[] = { - PROPERTY_ENTRY_U32("pagesize", 64), - { } -}; - -static const struct software_node eeprom_node = { - .properties = eeprom_properties, -}; - -static struct i2c_board_info i2c_info[] = { - { - I2C_BOARD_INFO("24c256", 0x50), - .swnode = &eeprom_node, - }, - { - I2C_BOARD_INFO("tlv320aic3x", 0x18), - }, -}; - -static struct davinci_i2c_platform_data i2c_pdata = { - .bus_freq = 400 /* kHz */, - .bus_delay = 0 /* usec */, -}; - -/* Fixed regulator support */ -static struct regulator_consumer_supply fixed_supplies_3_3v[] = { - /* Baseboard 3.3V: 5V -> TPS767D301 -> 3.3V */ - REGULATOR_SUPPLY("AVDD", "1-0018"), - REGULATOR_SUPPLY("DRVDD", "1-0018"), - REGULATOR_SUPPLY("IOVDD", "1-0018"), -}; - -static struct regulator_consumer_supply fixed_supplies_1_8v[] = { - /* Baseboard 1.8V: 5V -> TPS767D301 -> 1.8V */ - REGULATOR_SUPPLY("DVDD", "1-0018"), -}; - -static int dm365evm_keyscan_enable(struct device *dev) -{ - return davinci_cfg_reg(DM365_KEYSCAN); -} - -static unsigned short dm365evm_keymap[] = { - KEY_KP2, - KEY_LEFT, - KEY_EXIT, - KEY_DOWN, - KEY_ENTER, - KEY_UP, - KEY_KP1, - KEY_RIGHT, - KEY_MENU, - KEY_RECORD, - KEY_REWIND, - KEY_KPMINUS, - KEY_STOP, - KEY_FASTFORWARD, - KEY_KPPLUS, - KEY_PLAYPAUSE, - 0 -}; - -static struct davinci_ks_platform_data dm365evm_ks_data = { - .device_enable = dm365evm_keyscan_enable, - .keymap = dm365evm_keymap, - .keymapsize = ARRAY_SIZE(dm365evm_keymap), - .rep = 1, - /* Scan period = strobe + interval */ - .strobe = 0x5, - .interval = 0x2, - .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4, -}; - -static int cpld_mmc_get_cd(int module) -{ - if (!cpld) - return -ENXIO; - - /* low == card present */ - return !(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 4 : 0)); -} - -static int cpld_mmc_get_ro(int module) -{ - if (!cpld) - return -ENXIO; - - /* high == card's write protect switch active */ - return !!(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 5 : 1)); -} - -static struct davinci_mmc_config dm365evm_mmc_config = { - .get_cd = cpld_mmc_get_cd, - .get_ro = cpld_mmc_get_ro, - .wires = 4, - .max_freq = 50000000, - .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, -}; - -static void dm365evm_emac_configure(void) -{ - /* - * EMAC pins are multiplexed with GPIO and UART - * Further details are available at the DM365 ARM - * Subsystem Users Guide(sprufg5.pdf) pages 125 - 127 - */ - davinci_cfg_reg(DM365_EMAC_TX_EN); - davinci_cfg_reg(DM365_EMAC_TX_CLK); - davinci_cfg_reg(DM365_EMAC_COL); - davinci_cfg_reg(DM365_EMAC_TXD3); - davinci_cfg_reg(DM365_EMAC_TXD2); - davinci_cfg_reg(DM365_EMAC_TXD1); - davinci_cfg_reg(DM365_EMAC_TXD0); - davinci_cfg_reg(DM365_EMAC_RXD3); - davinci_cfg_reg(DM365_EMAC_RXD2); - davinci_cfg_reg(DM365_EMAC_RXD1); - davinci_cfg_reg(DM365_EMAC_RXD0); - davinci_cfg_reg(DM365_EMAC_RX_CLK); - davinci_cfg_reg(DM365_EMAC_RX_DV); - davinci_cfg_reg(DM365_EMAC_RX_ER); - davinci_cfg_reg(DM365_EMAC_CRS); - davinci_cfg_reg(DM365_EMAC_MDIO); - davinci_cfg_reg(DM365_EMAC_MDCLK); - - /* - * EMAC interrupts are multiplexed with GPIO interrupts - * Details are available at the DM365 ARM - * Subsystem Users Guide(sprufg5.pdf) pages 133 - 134 - */ - davinci_cfg_reg(DM365_INT_EMAC_RXTHRESH); - davinci_cfg_reg(DM365_INT_EMAC_RXPULSE); - davinci_cfg_reg(DM365_INT_EMAC_TXPULSE); - davinci_cfg_reg(DM365_INT_EMAC_MISCPULSE); -} - -static void dm365evm_mmc_configure(void) -{ - /* - * MMC/SD pins are multiplexed with GPIO and EMIF - * Further details are available at the DM365 ARM - * Subsystem Users Guide(sprufg5.pdf) pages 118, 128 - 131 - */ - davinci_cfg_reg(DM365_SD1_CLK); - davinci_cfg_reg(DM365_SD1_CMD); - davinci_cfg_reg(DM365_SD1_DATA3); - davinci_cfg_reg(DM365_SD1_DATA2); - davinci_cfg_reg(DM365_SD1_DATA1); - davinci_cfg_reg(DM365_SD1_DATA0); -} - -static struct tvp514x_platform_data tvp5146_pdata = { - .clk_polarity = 0, - .hs_polarity = 1, - .vs_polarity = 1 -}; - -#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) -/* Inputs available at the TVP5146 */ -static struct v4l2_input tvp5146_inputs[] = { - { - .index = 0, - .name = "Composite", - .type = V4L2_INPUT_TYPE_CAMERA, - .std = TVP514X_STD_ALL, - }, - { - .index = 1, - .name = "S-Video", - .type = V4L2_INPUT_TYPE_CAMERA, - .std = TVP514X_STD_ALL, - }, -}; - -/* - * this is the route info for connecting each input to decoder - * ouput that goes to vpfe. There is a one to one correspondence - * with tvp5146_inputs - */ -static struct vpfe_route tvp5146_routes[] = { - { - .input = INPUT_CVBS_VI2B, - .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, - }, -{ - .input = INPUT_SVIDEO_VI2C_VI1C, - .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, - }, -}; - -static struct vpfe_subdev_info vpfe_sub_devs[] = { - { - .name = "tvp5146", - .grp_id = 0, - .num_inputs = ARRAY_SIZE(tvp5146_inputs), - .inputs = tvp5146_inputs, - .routes = tvp5146_routes, - .can_route = 1, - .ccdc_if_params = { - .if_type = VPFE_BT656, - .hdpol = VPFE_PINPOL_POSITIVE, - .vdpol = VPFE_PINPOL_POSITIVE, - }, - .board_info = { - I2C_BOARD_INFO("tvp5146", 0x5d), - .platform_data = &tvp5146_pdata, - }, - }, -}; - -static struct vpfe_config vpfe_cfg = { - .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), - .sub_devs = vpfe_sub_devs, - .i2c_adapter_id = 1, - .card_name = "DM365 EVM", - .ccdc = "ISIF", -}; - -/* venc standards timings */ -static struct vpbe_enc_mode_info dm365evm_enc_std_timing[] = { - { - .name = "ntsc", - .timings_type = VPBE_ENC_STD, - .std_id = V4L2_STD_NTSC, - .interlaced = 1, - .xres = 720, - .yres = 480, - .aspect = {11, 10}, - .fps = {30000, 1001}, - .left_margin = 0x79, - .upper_margin = 0x10, - }, - { - .name = "pal", - .timings_type = VPBE_ENC_STD, - .std_id = V4L2_STD_PAL, - .interlaced = 1, - .xres = 720, - .yres = 576, - .aspect = {54, 59}, - .fps = {25, 1}, - .left_margin = 0x7E, - .upper_margin = 0x16, - }, -}; - -/* venc dv timings */ -static struct vpbe_enc_mode_info dm365evm_enc_preset_timing[] = { - { - .name = "480p59_94", - .timings_type = VPBE_ENC_DV_TIMINGS, - .dv_timings = V4L2_DV_BT_CEA_720X480P59_94, - .interlaced = 0, - .xres = 720, - .yres = 480, - .aspect = {1, 1}, - .fps = {5994, 100}, - .left_margin = 0x8F, - .upper_margin = 0x2D, - }, - { - .name = "576p50", - .timings_type = VPBE_ENC_DV_TIMINGS, - .dv_timings = V4L2_DV_BT_CEA_720X576P50, - .interlaced = 0, - .xres = 720, - .yres = 576, - .aspect = {1, 1}, - .fps = {50, 1}, - .left_margin = 0x8C, - .upper_margin = 0x36, - }, - { - .name = "720p60", - .timings_type = VPBE_ENC_DV_TIMINGS, - .dv_timings = V4L2_DV_BT_CEA_1280X720P60, - .interlaced = 0, - .xres = 1280, - .yres = 720, - .aspect = {1, 1}, - .fps = {60, 1}, - .left_margin = 0x117, - .right_margin = 70, - .upper_margin = 38, - .lower_margin = 3, - .hsync_len = 80, - .vsync_len = 5, - }, - { - .name = "1080i60", - .timings_type = VPBE_ENC_DV_TIMINGS, - .dv_timings = V4L2_DV_BT_CEA_1920X1080I60, - .interlaced = 1, - .xres = 1920, - .yres = 1080, - .aspect = {1, 1}, - .fps = {30, 1}, - .left_margin = 0xc9, - .right_margin = 80, - .upper_margin = 30, - .lower_margin = 3, - .hsync_len = 88, - .vsync_len = 5, - }, -}; - -#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) - -/* - * The outputs available from VPBE + ecnoders. Keep the - * the order same as that of encoders. First those from venc followed by that - * from encoders. Index in the output refers to index on a particular - * encoder.Driver uses this index to pass it to encoder when it supports more - * than one output. Application uses index of the array to set an output. - */ -static struct vpbe_output dm365evm_vpbe_outputs[] = { - { - .output = { - .index = 0, - .name = "Composite", - .type = V4L2_OUTPUT_TYPE_ANALOG, - .std = VENC_STD_ALL, - .capabilities = V4L2_OUT_CAP_STD, - }, - .subdev_name = DM365_VPBE_VENC_SUBDEV_NAME, - .default_mode = "ntsc", - .num_modes = ARRAY_SIZE(dm365evm_enc_std_timing), - .modes = dm365evm_enc_std_timing, - .if_params = MEDIA_BUS_FMT_FIXED, - }, - { - .output = { - .index = 1, - .name = "Component", - .type = V4L2_OUTPUT_TYPE_ANALOG, - .capabilities = V4L2_OUT_CAP_DV_TIMINGS, - }, - .subdev_name = DM365_VPBE_VENC_SUBDEV_NAME, - .default_mode = "480p59_94", - .num_modes = ARRAY_SIZE(dm365evm_enc_preset_timing), - .modes = dm365evm_enc_preset_timing, - .if_params = MEDIA_BUS_FMT_FIXED, - }, -}; - -/* - * Amplifiers on the board - */ -static struct ths7303_platform_data ths7303_pdata = { - .ch_1 = 3, - .ch_2 = 3, - .ch_3 = 3, -}; - -static struct amp_config_info vpbe_amp = { - .module_name = "ths7303", - .is_i2c = 1, - .board_info = { - I2C_BOARD_INFO("ths7303", 0x2c), - .platform_data = &ths7303_pdata, - } -}; - -static struct vpbe_config dm365evm_display_cfg = { - .module_name = "dm365-vpbe-display", - .i2c_adapter_id = 1, - .amp = &vpbe_amp, - .osd = { - .module_name = DM365_VPBE_OSD_SUBDEV_NAME, - }, - .venc = { - .module_name = DM365_VPBE_VENC_SUBDEV_NAME, - }, - .num_outputs = ARRAY_SIZE(dm365evm_vpbe_outputs), - .outputs = dm365evm_vpbe_outputs, -}; - -static void __init evm_init_i2c(void) -{ - davinci_init_i2c(&i2c_pdata); - i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); -} - -static inline int have_leds(void) -{ -#ifdef CONFIG_LEDS_CLASS - return 1; -#else - return 0; -#endif -} - -struct cpld_led { - struct led_classdev cdev; - u8 mask; -}; - -static const struct { - const char *name; - const char *trigger; -} cpld_leds[] = { - { "dm365evm::ds2", }, - { "dm365evm::ds3", }, - { "dm365evm::ds4", }, - { "dm365evm::ds5", }, - { "dm365evm::ds6", "nand-disk", }, - { "dm365evm::ds7", "mmc1", }, - { "dm365evm::ds8", "mmc0", }, - { "dm365evm::ds9", "heartbeat", }, -}; - -static void cpld_led_set(struct led_classdev *cdev, enum led_brightness b) -{ - struct cpld_led *led = container_of(cdev, struct cpld_led, cdev); - u8 reg = __raw_readb(cpld + CPLD_LEDS); - - if (b != LED_OFF) - reg &= ~led->mask; - else - reg |= led->mask; - __raw_writeb(reg, cpld + CPLD_LEDS); -} - -static enum led_brightness cpld_led_get(struct led_classdev *cdev) -{ - struct cpld_led *led = container_of(cdev, struct cpld_led, cdev); - u8 reg = __raw_readb(cpld + CPLD_LEDS); - - return (reg & led->mask) ? LED_OFF : LED_FULL; -} - -static int __init cpld_leds_init(void) -{ - int i; - - if (!have_leds() || !cpld) - return 0; - - /* setup LEDs */ - __raw_writeb(0xff, cpld + CPLD_LEDS); - for (i = 0; i < ARRAY_SIZE(cpld_leds); i++) { - struct cpld_led *led; - - led = kzalloc(sizeof(*led), GFP_KERNEL); - if (!led) - break; - - led->cdev.name = cpld_leds[i].name; - led->cdev.brightness_set = cpld_led_set; - led->cdev.brightness_get = cpld_led_get; - led->cdev.default_trigger = cpld_leds[i].trigger; - led->mask = BIT(i); - - if (led_classdev_register(NULL, &led->cdev) < 0) { - kfree(led); - break; - } - } - - return 0; -} -/* run after subsys_initcall() for LEDs */ -fs_initcall(cpld_leds_init); - - -static void __init evm_init_cpld(void) -{ - u8 mux, resets; - const char *label; - struct clk *aemif_clk; - int rc; - - /* Make sure we can configure the CPLD through CS1. Then - * leave it on for later access to MMC and LED registers. - */ - aemif_clk = clk_get(NULL, "aemif"); - if (IS_ERR(aemif_clk)) - return; - clk_prepare_enable(aemif_clk); - - if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE, - "cpld") == NULL) - goto fail; - cpld = ioremap(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE); - if (!cpld) { - release_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, - SECTION_SIZE); -fail: - pr_err("ERROR: can't map CPLD\n"); - clk_disable_unprepare(aemif_clk); - return; - } - - /* External muxing for some signals */ - mux = 0; - - /* Read SW5 to set up NAND + keypad _or_ OneNAND (sync read). - * NOTE: SW4 bus width setting must match! - */ - if ((__raw_readb(cpld + CPLD_SWITCH) & BIT(5)) == 0) { - /* external keypad mux */ - mux |= BIT(7); - - rc = platform_device_register(&davinci_aemif_device); - if (rc) - pr_warn("%s(): error registering the aemif device: %d\n", - __func__, rc); - } else { - /* no OneNAND support yet */ - } - - /* Leave external chips in reset when unused. */ - resets = BIT(3) | BIT(2) | BIT(1) | BIT(0); - - /* Static video input config with SN74CBT16214 1-of-3 mux: - * - port b1 == tvp7002 (mux lowbits == 1 or 6) - * - port b2 == imager (mux lowbits == 2 or 7) - * - port b3 == tvp5146 (mux lowbits == 5) - * - * Runtime switching could work too, with limitations. - */ - if (have_imager()) { - label = "HD imager"; - mux |= 2; - - /* externally mux MMC1/ENET/AIC33 to imager */ - mux |= BIT(6) | BIT(5) | BIT(3); - } else { - struct davinci_soc_info *soc_info = &davinci_soc_info; - - /* we can use MMC1 ... */ - dm365evm_mmc_configure(); - davinci_setup_mmc(1, &dm365evm_mmc_config); - - /* ... and ENET ... */ - dm365evm_emac_configure(); - soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID; - resets &= ~BIT(3); - - /* ... and AIC33 */ - resets &= ~BIT(1); - - if (have_tvp7002()) { - mux |= 1; - resets &= ~BIT(2); - label = "tvp7002 HD"; - } else { - /* default to tvp5146 */ - mux |= 5; - resets &= ~BIT(0); - label = "tvp5146 SD"; - } - } - __raw_writeb(mux, cpld + CPLD_MUX); - __raw_writeb(resets, cpld + CPLD_RESETS); - pr_info("EVM: %s video input\n", label); - - /* REVISIT export switches: NTSC/PAL (SW5.6), EXTRA1 (SW5.2), etc */ -} - -static void __init dm365_evm_map_io(void) -{ - dm365_init(); -} - -static struct spi_eeprom at25640 = { - .byte_len = SZ_64K / 8, - .name = "at25640", - .page_size = 32, - .flags = EE_ADDR2, -}; - -static const struct spi_board_info dm365_evm_spi_info[] __initconst = { - { - .modalias = "at25", - .platform_data = &at25640, - .max_speed_hz = 10 * 1000 * 1000, - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_0, - }, -}; - -static __init void dm365_evm_init(void) -{ - int ret; - - dm365_register_clocks(); - - ret = dm365_gpio_register(); - if (ret) - pr_warn("%s: GPIO init failed: %d\n", __func__, ret); - - regulator_register_always_on(0, "fixed-dummy", fixed_supplies_1_8v, - ARRAY_SIZE(fixed_supplies_1_8v), 1800000); - regulator_register_always_on(1, "fixed-dummy", fixed_supplies_3_3v, - ARRAY_SIZE(fixed_supplies_3_3v), 3300000); - - nvmem_add_cell_table(&davinci_nvmem_cell_table); - nvmem_add_cell_lookups(&davinci_nvmem_cell_lookup, 1); - - evm_init_i2c(); - davinci_serial_init(dm365_serial_device); - - dm365evm_emac_configure(); - dm365evm_mmc_configure(); - - davinci_setup_mmc(0, &dm365evm_mmc_config); - - dm365_init_video(&vpfe_cfg, &dm365evm_display_cfg); - - /* maybe setup mmc1/etc ... _after_ mmc0 */ - evm_init_cpld(); - -#ifdef CONFIG_SND_SOC_DM365_AIC3X_CODEC - dm365_init_asp(); -#elif defined(CONFIG_SND_SOC_DM365_VOICE_CODEC) - dm365_init_vc(); -#endif - dm365_init_rtc(); - dm365_init_ks(&dm365evm_ks_data); - - dm365_init_spi0(BIT(0), dm365_evm_spi_info, - ARRAY_SIZE(dm365_evm_spi_info)); -} - -MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") - .atag_offset = 0x100, - .map_io = dm365_evm_map_io, - .init_irq = dm365_init_irq, - .init_time = dm365_init_time, - .init_machine = dm365_evm_init, - .init_late = davinci_init_late, - .dma_zone_size = SZ_128M, -MACHINE_END diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c deleted file mode 100644 index a46e7b9ff8e0..000000000000 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ /dev/null @@ -1,638 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Critical Link MityOMAP-L138 SoM - * - * Copyright (C) 2010 Critical Link LLC - https://www.criticallink.com - */ - -#define pr_fmt(fmt) "MityOMAPL138: " fmt - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/console.h> -#include <linux/platform_device.h> -#include <linux/property.h> -#include <linux/mtd/partitions.h> -#include <linux/notifier.h> -#include <linux/nvmem-consumer.h> -#include <linux/nvmem-provider.h> -#include <linux/regulator/machine.h> -#include <linux/i2c.h> -#include <linux/etherdevice.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> - -#include <asm/io.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "common.h" -#include "da8xx.h" -#include "mux.h" - -#include <linux/platform_data/mtd-davinci.h> -#include <linux/platform_data/mtd-davinci-aemif.h> -#include <linux/platform_data/ti-aemif.h> -#include <linux/platform_data/spi-davinci.h> - -#define MITYOMAPL138_PHY_ID "" - -#define FACTORY_CONFIG_MAGIC 0x012C0138 -#define FACTORY_CONFIG_VERSION 0x00010001 - -/* Data Held in On-Board I2C device */ -struct factory_config { - u32 magic; - u32 version; - u8 mac[6]; - u32 fpga_type; - u32 spare; - u32 serialnumber; - char partnum[32]; -}; - -static struct factory_config factory_config; - -#ifdef CONFIG_CPU_FREQ -struct part_no_info { - const char *part_no; /* part number string of interest */ - int max_freq; /* khz */ -}; - -static struct part_no_info mityomapl138_pn_info[] = { - { - .part_no = "L138-C", - .max_freq = 300000, - }, - { - .part_no = "L138-D", - .max_freq = 375000, - }, - { - .part_no = "L138-F", - .max_freq = 456000, - }, - { - .part_no = "1808-C", - .max_freq = 300000, - }, - { - .part_no = "1808-D", - .max_freq = 375000, - }, - { - .part_no = "1808-F", - .max_freq = 456000, - }, - { - .part_no = "1810-D", - .max_freq = 375000, - }, -}; - -static void mityomapl138_cpufreq_init(const char *partnum) -{ - int i, ret; - - for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) { - /* - * the part number has additional characters beyond what is - * stored in the table. This information is not needed for - * determining the speed grade, and would require several - * more table entries. Only check the first N characters - * for a match. - */ - if (!strncmp(partnum, mityomapl138_pn_info[i].part_no, - strlen(mityomapl138_pn_info[i].part_no))) { - da850_max_speed = mityomapl138_pn_info[i].max_freq; - break; - } - } - - ret = da850_register_cpufreq("pll0_sysclk3"); - if (ret) - pr_warn("cpufreq registration failed: %d\n", ret); -} -#else -static void mityomapl138_cpufreq_init(const char *partnum) { } -#endif - -static int read_factory_config(struct notifier_block *nb, - unsigned long event, void *data) -{ - int ret; - const char *partnum = NULL; - struct nvmem_device *nvmem = data; - - if (strcmp(nvmem_dev_name(nvmem), "1-00500") != 0) - return NOTIFY_DONE; - - if (!IS_BUILTIN(CONFIG_NVMEM)) { - pr_warn("Factory Config not available without CONFIG_NVMEM\n"); - goto bad_config; - } - - ret = nvmem_device_read(nvmem, 0, sizeof(factory_config), - &factory_config); - if (ret != sizeof(struct factory_config)) { - pr_warn("Read Factory Config Failed: %d\n", ret); - goto bad_config; - } - - if (factory_config.magic != FACTORY_CONFIG_MAGIC) { - pr_warn("Factory Config Magic Wrong (%X)\n", - factory_config.magic); - goto bad_config; - } - - if (factory_config.version != FACTORY_CONFIG_VERSION) { - pr_warn("Factory Config Version Wrong (%X)\n", - factory_config.version); - goto bad_config; - } - - partnum = factory_config.partnum; - pr_info("Part Number = %s\n", partnum); - -bad_config: - /* default maximum speed is valid for all platforms */ - mityomapl138_cpufreq_init(partnum); - - return NOTIFY_STOP; -} - -static struct notifier_block mityomapl138_nvmem_notifier = { - .notifier_call = read_factory_config, -}; - -/* - * We don't define a cell for factory config as it will be accessed from the - * board file using the nvmem notifier chain. - */ -static struct nvmem_cell_info mityomapl138_nvmem_cells[] = { - { - .name = "macaddr", - .offset = 0x64, - .bytes = ETH_ALEN, - } -}; - -static struct nvmem_cell_table mityomapl138_nvmem_cell_table = { - .nvmem_name = "1-00500", - .cells = mityomapl138_nvmem_cells, - .ncells = ARRAY_SIZE(mityomapl138_nvmem_cells), -}; - -static struct nvmem_cell_lookup mityomapl138_nvmem_cell_lookup = { - .nvmem_name = "1-00500", - .cell_name = "macaddr", - .dev_id = "davinci_emac.1", - .con_id = "mac-address", -}; - -static const struct property_entry mityomapl138_fd_chip_properties[] = { - PROPERTY_ENTRY_U32("pagesize", 8), - PROPERTY_ENTRY_BOOL("read-only"), - { } -}; - -static const struct software_node mityomapl138_fd_chip_node = { - .properties = mityomapl138_fd_chip_properties, -}; - -static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = { - .bus_freq = 100, /* kHz */ - .bus_delay = 0, /* usec */ -}; - -/* TPS65023 voltage regulator support */ -/* 1.2V Core */ -static struct regulator_consumer_supply tps65023_dcdc1_consumers[] = { - { - .supply = "cvdd", - }, -}; - -/* 1.8V */ -static struct regulator_consumer_supply tps65023_dcdc2_consumers[] = { - { - .supply = "usb0_vdda18", - }, - { - .supply = "usb1_vdda18", - }, - { - .supply = "ddr_dvdd18", - }, - { - .supply = "sata_vddr", - }, -}; - -/* 1.2V */ -static struct regulator_consumer_supply tps65023_dcdc3_consumers[] = { - { - .supply = "sata_vdd", - }, - { - .supply = "usb_cvdd", - }, - { - .supply = "pll0_vdda", - }, - { - .supply = "pll1_vdda", - }, -}; - -/* 1.8V Aux LDO, not used */ -static struct regulator_consumer_supply tps65023_ldo1_consumers[] = { - { - .supply = "1.8v_aux", - }, -}; - -/* FPGA VCC Aux (2.5 or 3.3) LDO */ -static struct regulator_consumer_supply tps65023_ldo2_consumers[] = { - { - .supply = "vccaux", - }, -}; - -static struct regulator_init_data tps65023_regulator_data[] = { - /* dcdc1 */ - { - .constraints = { - .min_uV = 1150000, - .max_uV = 1350000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc1_consumers), - .consumer_supplies = tps65023_dcdc1_consumers, - }, - /* dcdc2 */ - { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc2_consumers), - .consumer_supplies = tps65023_dcdc2_consumers, - }, - /* dcdc3 */ - { - .constraints = { - .min_uV = 1200000, - .max_uV = 1200000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc3_consumers), - .consumer_supplies = tps65023_dcdc3_consumers, - }, - /* ldo1 */ - { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo1_consumers), - .consumer_supplies = tps65023_ldo1_consumers, - }, - /* ldo2 */ - { - .constraints = { - .min_uV = 2500000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo2_consumers), - .consumer_supplies = tps65023_ldo2_consumers, - }, -}; - -static struct i2c_board_info __initdata mityomap_tps65023_info[] = { - { - I2C_BOARD_INFO("tps65023", 0x48), - .platform_data = &tps65023_regulator_data[0], - }, - { - I2C_BOARD_INFO("24c02", 0x50), - .swnode = &mityomapl138_fd_chip_node, - }, -}; - -static int __init pmic_tps65023_init(void) -{ - return i2c_register_board_info(1, mityomap_tps65023_info, - ARRAY_SIZE(mityomap_tps65023_info)); -} - -/* - * SPI Devices: - * SPI1_CS0: 8M Flash ST-M25P64-VME6G - */ -static struct mtd_partition spi_flash_partitions[] = { - [0] = { - .name = "ubl", - .offset = 0, - .size = SZ_64K, - .mask_flags = MTD_WRITEABLE, - }, - [1] = { - .name = "u-boot", - .offset = MTDPART_OFS_APPEND, - .size = SZ_512K, - .mask_flags = MTD_WRITEABLE, - }, - [2] = { - .name = "u-boot-env", - .offset = MTDPART_OFS_APPEND, - .size = SZ_64K, - .mask_flags = MTD_WRITEABLE, - }, - [3] = { - .name = "periph-config", - .offset = MTDPART_OFS_APPEND, - .size = SZ_64K, - .mask_flags = MTD_WRITEABLE, - }, - [4] = { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_256K + SZ_64K, - }, - [5] = { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M + SZ_1M, - }, - [6] = { - .name = "fpga", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - }, - [7] = { - .name = "spare", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct flash_platform_data mityomapl138_spi_flash_data = { - .name = "m25p80", - .parts = spi_flash_partitions, - .nr_parts = ARRAY_SIZE(spi_flash_partitions), - .type = "m24p64", -}; - -static struct davinci_spi_config spi_eprom_config = { - .io_type = SPI_IO_TYPE_DMA, - .c2tdelay = 8, - .t2cdelay = 8, -}; - -static struct spi_board_info mityomapl138_spi_flash_info[] = { - { - .modalias = "m25p80", - .platform_data = &mityomapl138_spi_flash_data, - .controller_data = &spi_eprom_config, - .mode = SPI_MODE_0, - .max_speed_hz = 30000000, - .bus_num = 1, - .chip_select = 0, - }, -}; - -/* - * MityDSP-L138 includes a 256 MByte large-page NAND flash - * (128K blocks). - */ -static struct mtd_partition mityomapl138_nandflash_partition[] = { - { - .name = "rootfs", - .offset = 0, - .size = SZ_128M, - .mask_flags = 0, /* MTD_WRITEABLE, */ - }, - { - .name = "homefs", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static struct davinci_nand_pdata mityomapl138_nandflash_data = { - .core_chipsel = 1, - .parts = mityomapl138_nandflash_partition, - .nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition), - .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, - .bbt_options = NAND_BBT_USE_FLASH, - .options = NAND_BUSWIDTH_16, - .ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */ -}; - -static struct resource mityomapl138_nandflash_resource[] = { - { - .start = DA8XX_AEMIF_CS3_BASE, - .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DA8XX_AEMIF_CTL_BASE, - .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device mityomapl138_aemif_devices[] = { - { - .name = "davinci_nand", - .id = 1, - .dev = { - .platform_data = &mityomapl138_nandflash_data, - }, - .num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource), - .resource = mityomapl138_nandflash_resource, - }, -}; - -static struct resource mityomapl138_aemif_resources[] = { - { - .start = DA8XX_AEMIF_CTL_BASE, - .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct aemif_abus_data mityomapl138_aemif_abus_data[] = { - { - .cs = 1, - }, -}; - -static struct aemif_platform_data mityomapl138_aemif_pdata = { - .abus_data = mityomapl138_aemif_abus_data, - .num_abus_data = ARRAY_SIZE(mityomapl138_aemif_abus_data), - .sub_devices = mityomapl138_aemif_devices, - .num_sub_devices = ARRAY_SIZE(mityomapl138_aemif_devices), -}; - -static struct platform_device mityomapl138_aemif_device = { - .name = "ti-aemif", - .id = -1, - .dev = { - .platform_data = &mityomapl138_aemif_pdata, - }, - .resource = mityomapl138_aemif_resources, - .num_resources = ARRAY_SIZE(mityomapl138_aemif_resources), -}; - -static void __init mityomapl138_setup_nand(void) -{ - if (platform_device_register(&mityomapl138_aemif_device)) - pr_warn("%s: Cannot register AEMIF device\n", __func__); -} - -static const short mityomap_mii_pins[] = { - DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, - DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, - DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, - DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, - DA850_MDIO_D, - -1 -}; - -static const short mityomap_rmii_pins[] = { - DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, - DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, - DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, - DA850_MDIO_D, - -1 -}; - -static void __init mityomapl138_config_emac(void) -{ - void __iomem *cfg_chip3_base; - int ret; - u32 val; - struct davinci_soc_info *soc_info = &davinci_soc_info; - - soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */ - - cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); - val = __raw_readl(cfg_chip3_base); - - if (soc_info->emac_pdata->rmii_en) { - val |= BIT(8); - ret = davinci_cfg_reg_list(mityomap_rmii_pins); - pr_info("RMII PHY configured\n"); - } else { - val &= ~BIT(8); - ret = davinci_cfg_reg_list(mityomap_mii_pins); - pr_info("MII PHY configured\n"); - } - - if (ret) { - pr_warn("mii/rmii mux setup failed: %d\n", ret); - return; - } - - /* configure the CFGCHIP3 register for RMII or MII */ - __raw_writel(val, cfg_chip3_base); - - soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID; - - ret = da8xx_register_emac(); - if (ret) - pr_warn("emac registration failed: %d\n", ret); -} - -static void __init mityomapl138_init(void) -{ - int ret; - - da850_register_clocks(); - - /* for now, no special EDMA channels are reserved */ - ret = da850_register_edma(NULL); - if (ret) - pr_warn("edma registration failed: %d\n", ret); - - ret = da8xx_register_watchdog(); - if (ret) - pr_warn("watchdog registration failed: %d\n", ret); - - davinci_serial_init(da8xx_serial_device); - - nvmem_register_notifier(&mityomapl138_nvmem_notifier); - nvmem_add_cell_table(&mityomapl138_nvmem_cell_table); - nvmem_add_cell_lookups(&mityomapl138_nvmem_cell_lookup, 1); - - ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata); - if (ret) - pr_warn("i2c0 registration failed: %d\n", ret); - - ret = pmic_tps65023_init(); - if (ret) - pr_warn("TPS65023 PMIC init failed: %d\n", ret); - - mityomapl138_setup_nand(); - - ret = spi_register_board_info(mityomapl138_spi_flash_info, - ARRAY_SIZE(mityomapl138_spi_flash_info)); - if (ret) - pr_warn("spi info registration failed: %d\n", ret); - - ret = da8xx_register_spi_bus(1, - ARRAY_SIZE(mityomapl138_spi_flash_info)); - if (ret) - pr_warn("spi 1 registration failed: %d\n", ret); - - mityomapl138_config_emac(); - - ret = da8xx_register_rtc(); - if (ret) - pr_warn("rtc setup failed: %d\n", ret); - - ret = da8xx_register_cpuidle(); - if (ret) - pr_warn("cpuidle registration failed: %d\n", ret); - - davinci_pm_init(); -} - -#ifdef CONFIG_SERIAL_8250_CONSOLE -static int __init mityomapl138_console_init(void) -{ - if (!machine_is_mityomapl138()) - return 0; - - return add_preferred_console("ttyS", 1, "115200"); -} -console_initcall(mityomapl138_console_init); -#endif - -static void __init mityomapl138_map_io(void) -{ - da850_init(); -} - -MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808") - .atag_offset = 0x100, - .map_io = mityomapl138_map_io, - .init_irq = da850_init_irq, - .init_time = da850_init_time, - .init_machine = mityomapl138_init, - .init_late = davinci_init_late, - .dma_zone_size = SZ_128M, -MACHINE_END diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c deleted file mode 100644 index 8a80115999ad..000000000000 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ /dev/null @@ -1,451 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hawkboard.org based on TI's OMAP-L138 Platform - * - * Initial code: Syed Mohammed Khasim - * - * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/console.h> -#include <linux/interrupt.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/rawnand.h> -#include <linux/platform_data/gpio-davinci.h> -#include <linux/platform_data/mtd-davinci.h> -#include <linux/platform_data/mtd-davinci-aemif.h> -#include <linux/platform_data/ti-aemif.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "common.h" -#include "da8xx.h" -#include "mux.h" - -#define HAWKBOARD_PHY_ID "davinci_mdio-0:07" - -#define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4) -#define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13) - -static short omapl138_hawk_mii_pins[] __initdata = { - DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, - DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, - DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, - DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, - DA850_MDIO_D, - -1 -}; - -static __init void omapl138_hawk_config_emac(void) -{ - void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); - int ret; - u32 val; - struct davinci_soc_info *soc_info = &davinci_soc_info; - - val = __raw_readl(cfgchip3); - val &= ~BIT(8); - ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins); - if (ret) { - pr_warn("%s: CPGMAC/MII mux setup failed: %d\n", __func__, ret); - return; - } - - /* configure the CFGCHIP3 register for MII */ - __raw_writel(val, cfgchip3); - pr_info("EMAC: MII PHY configured\n"); - - soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; - - ret = da8xx_register_emac(); - if (ret) - pr_warn("%s: EMAC registration failed: %d\n", __func__, ret); -} - -/* - * The following EDMA channels/slots are not being used by drivers (for - * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard, - * hence they are being reserved for codecs on the DSP side. - */ -static const s16 da850_dma0_rsv_chans[][2] = { - /* (offset, number) */ - { 8, 6}, - {24, 4}, - {30, 2}, - {-1, -1} -}; - -static const s16 da850_dma0_rsv_slots[][2] = { - /* (offset, number) */ - { 8, 6}, - {24, 4}, - {30, 50}, - {-1, -1} -}; - -static const s16 da850_dma1_rsv_chans[][2] = { - /* (offset, number) */ - { 0, 28}, - {30, 2}, - {-1, -1} -}; - -static const s16 da850_dma1_rsv_slots[][2] = { - /* (offset, number) */ - { 0, 28}, - {30, 90}, - {-1, -1} -}; - -static struct edma_rsv_info da850_edma_cc0_rsv = { - .rsv_chans = da850_dma0_rsv_chans, - .rsv_slots = da850_dma0_rsv_slots, -}; - -static struct edma_rsv_info da850_edma_cc1_rsv = { - .rsv_chans = da850_dma1_rsv_chans, - .rsv_slots = da850_dma1_rsv_slots, -}; - -static struct edma_rsv_info *da850_edma_rsv[2] = { - &da850_edma_cc0_rsv, - &da850_edma_cc1_rsv, -}; - -static const short hawk_mmcsd0_pins[] = { - DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, - DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, - DA850_GPIO3_12, DA850_GPIO3_13, - -1 -}; - -#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) -#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) - -static struct gpiod_lookup_table mmc_gpios_table = { - .dev_id = "da830-mmc.0", - .table = { - GPIO_LOOKUP("davinci_gpio", DA850_HAWK_MMCSD_CD_PIN, "cd", - GPIO_ACTIVE_LOW), - GPIO_LOOKUP("davinci_gpio", DA850_HAWK_MMCSD_WP_PIN, "wp", - GPIO_ACTIVE_LOW), - }, -}; - -static struct davinci_mmc_config da850_mmc_config = { - .wires = 4, - .max_freq = 50000000, - .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, -}; - -static __init void omapl138_hawk_mmc_init(void) -{ - int ret; - - ret = davinci_cfg_reg_list(hawk_mmcsd0_pins); - if (ret) { - pr_warn("%s: MMC/SD0 mux setup failed: %d\n", __func__, ret); - return; - } - - gpiod_add_lookup_table(&mmc_gpios_table); - - ret = da8xx_register_mmcsd0(&da850_mmc_config); - if (ret) { - pr_warn("%s: MMC/SD0 registration failed: %d\n", __func__, ret); - goto mmc_setup_mmcsd_fail; - } - - return; - -mmc_setup_mmcsd_fail: - gpiod_remove_lookup_table(&mmc_gpios_table); -} - -static struct mtd_partition omapl138_hawk_nandflash_partition[] = { - { - .name = "u-boot env", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "u-boot", - .offset = MTDPART_OFS_APPEND, - .size = SZ_512K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "free space", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static struct davinci_aemif_timing omapl138_hawk_nandflash_timing = { - .wsetup = 24, - .wstrobe = 21, - .whold = 14, - .rsetup = 19, - .rstrobe = 50, - .rhold = 0, - .ta = 20, -}; - -static struct davinci_nand_pdata omapl138_hawk_nandflash_data = { - .core_chipsel = 1, - .parts = omapl138_hawk_nandflash_partition, - .nr_parts = ARRAY_SIZE(omapl138_hawk_nandflash_partition), - .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, - .ecc_bits = 4, - .bbt_options = NAND_BBT_USE_FLASH, - .options = NAND_BUSWIDTH_16, - .timing = &omapl138_hawk_nandflash_timing, - .mask_chipsel = 0, - .mask_ale = 0, - .mask_cle = 0, -}; - -static struct resource omapl138_hawk_nandflash_resource[] = { - { - .start = DA8XX_AEMIF_CS3_BASE, - .end = DA8XX_AEMIF_CS3_BASE + SZ_32M, - .flags = IORESOURCE_MEM, - }, - { - .start = DA8XX_AEMIF_CTL_BASE, - .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, - .flags = IORESOURCE_MEM, - }, -}; - -static struct resource omapl138_hawk_aemif_resource[] = { - { - .start = DA8XX_AEMIF_CTL_BASE, - .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, - .flags = IORESOURCE_MEM, - } -}; - -static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = { - { - .cs = 3, - } -}; - -static struct platform_device omapl138_hawk_aemif_devices[] = { - { - .name = "davinci_nand", - .id = -1, - .dev = { - .platform_data = &omapl138_hawk_nandflash_data, - }, - .resource = omapl138_hawk_nandflash_resource, - .num_resources = ARRAY_SIZE(omapl138_hawk_nandflash_resource), - } -}; - -static struct aemif_platform_data omapl138_hawk_aemif_pdata = { - .cs_offset = 2, - .abus_data = omapl138_hawk_aemif_abus_data, - .num_abus_data = ARRAY_SIZE(omapl138_hawk_aemif_abus_data), - .sub_devices = omapl138_hawk_aemif_devices, - .num_sub_devices = ARRAY_SIZE(omapl138_hawk_aemif_devices), -}; - -static struct platform_device omapl138_hawk_aemif_device = { - .name = "ti-aemif", - .id = -1, - .dev = { - .platform_data = &omapl138_hawk_aemif_pdata, - }, - .resource = omapl138_hawk_aemif_resource, - .num_resources = ARRAY_SIZE(omapl138_hawk_aemif_resource), -}; - -static const short omapl138_hawk_nand_pins[] = { - DA850_EMA_WAIT_1, DA850_NEMA_OE, DA850_NEMA_WE, DA850_NEMA_CS_3, - DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, - DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, - DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11, - DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15, - DA850_EMA_A_1, DA850_EMA_A_2, - -1 -}; - -static int omapl138_hawk_register_aemif(void) -{ - int ret; - - ret = davinci_cfg_reg_list(omapl138_hawk_nand_pins); - if (ret) - pr_warn("%s: NAND mux setup failed: %d\n", __func__, ret); - - return platform_device_register(&omapl138_hawk_aemif_device); -} - -static const short da850_hawk_usb11_pins[] = { - DA850_GPIO2_4, DA850_GPIO6_13, - -1 -}; - -static struct regulator_consumer_supply hawk_usb_supplies[] = { - REGULATOR_SUPPLY("vbus", NULL), -}; - -static struct regulator_init_data hawk_usb_vbus_data = { - .consumer_supplies = hawk_usb_supplies, - .num_consumer_supplies = ARRAY_SIZE(hawk_usb_supplies), - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -static struct fixed_voltage_config hawk_usb_vbus = { - .supply_name = "vbus", - .microvolts = 3300000, - .init_data = &hawk_usb_vbus_data, -}; - -static struct platform_device hawk_usb_vbus_device = { - .name = "reg-fixed-voltage", - .id = 0, - .dev = { - .platform_data = &hawk_usb_vbus, - }, -}; - -static struct gpiod_lookup_table hawk_usb_oc_gpio_lookup = { - .dev_id = "ohci-da8xx", - .table = { - GPIO_LOOKUP("davinci_gpio", DA850_USB1_OC_PIN, "oc", 0), - { } - }, -}; - -static struct gpiod_lookup_table hawk_usb_vbus_gpio_lookup = { - .dev_id = "reg-fixed-voltage.0", - .table = { - GPIO_LOOKUP("davinci_gpio", DA850_USB1_VBUS_PIN, NULL, 0), - { } - }, -}; - -static struct gpiod_lookup_table *hawk_usb_gpio_lookups[] = { - &hawk_usb_oc_gpio_lookup, - &hawk_usb_vbus_gpio_lookup, -}; - -static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = { - /* TPS2087 switch @ 5V */ - .potpgt = (3 + 1) / 2, /* 3 ms max */ -}; - -static __init void omapl138_hawk_usb_init(void) -{ - int ret; - - ret = davinci_cfg_reg_list(da850_hawk_usb11_pins); - if (ret) { - pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); - return; - } - - ret = da8xx_register_usb_phy_clocks(); - if (ret) - pr_warn("%s: USB PHY CLK registration failed: %d\n", - __func__, ret); - - gpiod_add_lookup_tables(hawk_usb_gpio_lookups, - ARRAY_SIZE(hawk_usb_gpio_lookups)); - - ret = da8xx_register_usb_phy(); - if (ret) - pr_warn("%s: USB PHY registration failed: %d\n", - __func__, ret); - - ret = platform_device_register(&hawk_usb_vbus_device); - if (ret) { - pr_warn("%s: Unable to register the vbus supply\n", __func__); - return; - } - - ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata); - if (ret) - pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret); - - return; -} - -static __init void omapl138_hawk_init(void) -{ - int ret; - - da850_register_clocks(); - - ret = da850_register_gpio(); - if (ret) - pr_warn("%s: GPIO init failed: %d\n", __func__, ret); - - davinci_serial_init(da8xx_serial_device); - - omapl138_hawk_config_emac(); - - ret = da850_register_edma(da850_edma_rsv); - if (ret) - pr_warn("%s: EDMA registration failed: %d\n", __func__, ret); - - omapl138_hawk_mmc_init(); - - omapl138_hawk_usb_init(); - - ret = omapl138_hawk_register_aemif(); - if (ret) - pr_warn("%s: aemif registration failed: %d\n", __func__, ret); - - ret = da8xx_register_watchdog(); - if (ret) - pr_warn("%s: watchdog registration failed: %d\n", - __func__, ret); - - ret = da8xx_register_rproc(); - if (ret) - pr_warn("%s: dsp/rproc registration failed: %d\n", - __func__, ret); - - regulator_has_full_constraints(); -} - -#ifdef CONFIG_SERIAL_8250_CONSOLE -static int __init omapl138_hawk_console_init(void) -{ - if (!machine_is_omapl138_hawkboard()) - return 0; - - return add_preferred_console("ttyS", 2, "115200"); -} -console_initcall(omapl138_hawk_console_init); -#endif - -static void __init omapl138_hawk_map_io(void) -{ - da850_init(); -} - -MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard") - .atag_offset = 0x100, - .map_io = omapl138_hawk_map_io, - .init_irq = da850_init_irq, - .init_time = da850_init_time, - .init_machine = omapl138_hawk_init, - .init_late = davinci_init_late, - .dma_zone_size = SZ_128M, - .reserve = da8xx_rproc_reserve_cma, -MACHINE_END diff --git a/arch/arm/mach-davinci/common.h b/arch/arm/mach-davinci/common.h index 772b51e0ac5e..b4fd0e9acf6c 100644 --- a/arch/arm/mach-davinci/common.h +++ b/arch/arm/mach-davinci/common.h @@ -17,8 +17,8 @@ #include <asm/irq.h> -#define DAVINCI_INTC_START NR_IRQS -#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum)) +#define DAVINCI_INTC_START NR_IRQS +#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum)) struct davinci_gpio_controller; @@ -45,9 +45,6 @@ struct davinci_soc_info { unsigned gpio_num; unsigned gpio_irq; unsigned gpio_unbanked; - struct davinci_gpio_controller *gpio_ctlrs; - int gpio_ctlrs_num; - struct emac_platform_data *emac_pdata; dma_addr_t sram_dma; unsigned sram_len; }; diff --git a/arch/arm/mach-davinci/cputype.h b/arch/arm/mach-davinci/cputype.h index 4590afdbe449..148a738391dc 100644 --- a/arch/arm/mach-davinci/cputype.h +++ b/arch/arm/mach-davinci/cputype.h @@ -25,60 +25,7 @@ struct davinci_id { }; /* Can use lower 16 bits of cpu id for a variant when required */ -#define DAVINCI_CPU_ID_DM6446 0x64460000 -#define DAVINCI_CPU_ID_DM6467 0x64670000 -#define DAVINCI_CPU_ID_DM355 0x03550000 -#define DAVINCI_CPU_ID_DM365 0x03650000 #define DAVINCI_CPU_ID_DA830 0x08300000 #define DAVINCI_CPU_ID_DA850 0x08500000 -#define IS_DAVINCI_CPU(type, id) \ -static inline int is_davinci_ ##type(void) \ -{ \ - return (davinci_soc_info.cpu_id == (id)); \ -} - -IS_DAVINCI_CPU(dm644x, DAVINCI_CPU_ID_DM6446) -IS_DAVINCI_CPU(dm646x, DAVINCI_CPU_ID_DM6467) -IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355) -IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365) -IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830) -IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850) - -#ifdef CONFIG_ARCH_DAVINCI_DM644x -#define cpu_is_davinci_dm644x() is_davinci_dm644x() -#else -#define cpu_is_davinci_dm644x() 0 -#endif - -#ifdef CONFIG_ARCH_DAVINCI_DM646x -#define cpu_is_davinci_dm646x() is_davinci_dm646x() -#else -#define cpu_is_davinci_dm646x() 0 -#endif - -#ifdef CONFIG_ARCH_DAVINCI_DM355 -#define cpu_is_davinci_dm355() is_davinci_dm355() -#else -#define cpu_is_davinci_dm355() 0 -#endif - -#ifdef CONFIG_ARCH_DAVINCI_DM365 -#define cpu_is_davinci_dm365() is_davinci_dm365() -#else -#define cpu_is_davinci_dm365() 0 -#endif - -#ifdef CONFIG_ARCH_DAVINCI_DA830 -#define cpu_is_davinci_da830() is_davinci_da830() -#else -#define cpu_is_davinci_da830() 0 -#endif - -#ifdef CONFIG_ARCH_DAVINCI_DA850 -#define cpu_is_davinci_da850() is_davinci_da850() -#else -#define cpu_is_davinci_da850() 0 -#endif - #endif diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index eab5fac18806..2e497745b624 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -12,7 +12,6 @@ #include <linux/init.h> #include <linux/io.h> #include <linux/irqchip/irq-davinci-cp-intc.h> -#include <linux/platform_data/gpio-davinci.h> #include <clocksource/timer-davinci.h> @@ -448,181 +447,6 @@ static const struct mux_config da830_pins[] = { #endif }; -const short da830_emif25_pins[] __initconst = { - DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3, - DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7, - DA830_EMA_D_8, DA830_EMA_D_9, DA830_EMA_D_10, DA830_EMA_D_11, - DA830_EMA_D_12, DA830_EMA_D_13, DA830_EMA_D_14, DA830_EMA_D_15, - DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3, - DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7, - DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11, - DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_EMA_CLK, - DA830_EMA_SDCKE, DA830_NEMA_CS_4, DA830_NEMA_CS_5, DA830_NEMA_WE, - DA830_NEMA_CS_0, DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, - DA830_NEMA_WE_DQM_1, DA830_NEMA_WE_DQM_0, DA830_EMA_WAIT_0, - -1 -}; - -const short da830_spi0_pins[] __initconst = { - DA830_SPI0_SOMI_0, DA830_SPI0_SIMO_0, DA830_SPI0_CLK, DA830_NSPI0_ENA, - DA830_NSPI0_SCS_0, - -1 -}; - -const short da830_spi1_pins[] __initconst = { - DA830_SPI1_SOMI_0, DA830_SPI1_SIMO_0, DA830_SPI1_CLK, DA830_NSPI1_ENA, - DA830_NSPI1_SCS_0, - -1 -}; - -const short da830_mmc_sd_pins[] __initconst = { - DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2, - DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5, - DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK, - DA830_MMCSD_CMD, - -1 -}; - -const short da830_uart0_pins[] __initconst = { - DA830_NUART0_CTS, DA830_NUART0_RTS, DA830_UART0_RXD, DA830_UART0_TXD, - -1 -}; - -const short da830_uart1_pins[] __initconst = { - DA830_UART1_RXD, DA830_UART1_TXD, - -1 -}; - -const short da830_uart2_pins[] __initconst = { - DA830_UART2_RXD, DA830_UART2_TXD, - -1 -}; - -const short da830_usb20_pins[] __initconst = { - DA830_USB0_DRVVBUS, DA830_USB_REFCLKIN, - -1 -}; - -const short da830_usb11_pins[] __initconst = { - DA830_USB_REFCLKIN, - -1 -}; - -const short da830_uhpi_pins[] __initconst = { - DA830_UHPI_HD_0, DA830_UHPI_HD_1, DA830_UHPI_HD_2, DA830_UHPI_HD_3, - DA830_UHPI_HD_4, DA830_UHPI_HD_5, DA830_UHPI_HD_6, DA830_UHPI_HD_7, - DA830_UHPI_HD_8, DA830_UHPI_HD_9, DA830_UHPI_HD_10, DA830_UHPI_HD_11, - DA830_UHPI_HD_12, DA830_UHPI_HD_13, DA830_UHPI_HD_14, DA830_UHPI_HD_15, - DA830_UHPI_HCNTL0, DA830_UHPI_HCNTL1, DA830_UHPI_HHWIL, DA830_UHPI_HRNW, - DA830_NUHPI_HAS, DA830_NUHPI_HCS, DA830_NUHPI_HDS1, DA830_NUHPI_HDS2, - DA830_NUHPI_HINT, DA830_NUHPI_HRDY, - -1 -}; - -const short da830_cpgmac_pins[] __initconst = { - DA830_RMII_TXD_0, DA830_RMII_TXD_1, DA830_RMII_TXEN, DA830_RMII_CRS_DV, - DA830_RMII_RXD_0, DA830_RMII_RXD_1, DA830_RMII_RXER, DA830_MDIO_CLK, - DA830_MDIO_D, - -1 -}; - -const short da830_emif3c_pins[] __initconst = { - DA830_EMB_SDCKE, DA830_EMB_CLK_GLUE, DA830_EMB_CLK, DA830_NEMB_CS_0, - DA830_NEMB_CAS, DA830_NEMB_RAS, DA830_NEMB_WE, DA830_EMB_BA_1, - DA830_EMB_BA_0, DA830_EMB_A_0, DA830_EMB_A_1, DA830_EMB_A_2, - DA830_EMB_A_3, DA830_EMB_A_4, DA830_EMB_A_5, DA830_EMB_A_6, - DA830_EMB_A_7, DA830_EMB_A_8, DA830_EMB_A_9, DA830_EMB_A_10, - DA830_EMB_A_11, DA830_EMB_A_12, DA830_NEMB_WE_DQM_3, - DA830_NEMB_WE_DQM_2, DA830_EMB_D_0, DA830_EMB_D_1, DA830_EMB_D_2, - DA830_EMB_D_3, DA830_EMB_D_4, DA830_EMB_D_5, DA830_EMB_D_6, - DA830_EMB_D_7, DA830_EMB_D_8, DA830_EMB_D_9, DA830_EMB_D_10, - DA830_EMB_D_11, DA830_EMB_D_12, DA830_EMB_D_13, DA830_EMB_D_14, - DA830_EMB_D_15, DA830_EMB_D_16, DA830_EMB_D_17, DA830_EMB_D_18, - DA830_EMB_D_19, DA830_EMB_D_20, DA830_EMB_D_21, DA830_EMB_D_22, - DA830_EMB_D_23, DA830_EMB_D_24, DA830_EMB_D_25, DA830_EMB_D_26, - DA830_EMB_D_27, DA830_EMB_D_28, DA830_EMB_D_29, DA830_EMB_D_30, - DA830_EMB_D_31, DA830_NEMB_WE_DQM_1, DA830_NEMB_WE_DQM_0, - -1 -}; - -const short da830_mcasp0_pins[] __initconst = { - DA830_AHCLKX0, DA830_ACLKX0, DA830_AFSX0, - DA830_AHCLKR0, DA830_ACLKR0, DA830_AFSR0, DA830_AMUTE0, - DA830_AXR0_0, DA830_AXR0_1, DA830_AXR0_2, DA830_AXR0_3, - DA830_AXR0_4, DA830_AXR0_5, DA830_AXR0_6, DA830_AXR0_7, - DA830_AXR0_8, DA830_AXR0_9, DA830_AXR0_10, DA830_AXR0_11, - DA830_AXR0_12, DA830_AXR0_13, DA830_AXR0_14, DA830_AXR0_15, - -1 -}; - -const short da830_mcasp1_pins[] __initconst = { - DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, - DA830_AHCLKR1, DA830_ACLKR1, DA830_AFSR1, DA830_AMUTE1, - DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_3, - DA830_AXR1_4, DA830_AXR1_5, DA830_AXR1_6, DA830_AXR1_7, - DA830_AXR1_8, DA830_AXR1_9, DA830_AXR1_10, DA830_AXR1_11, - -1 -}; - -const short da830_mcasp2_pins[] __initconst = { - DA830_AHCLKX2, DA830_ACLKX2, DA830_AFSX2, - DA830_AHCLKR2, DA830_ACLKR2, DA830_AFSR2, DA830_AMUTE2, - DA830_AXR2_0, DA830_AXR2_1, DA830_AXR2_2, DA830_AXR2_3, - -1 -}; - -const short da830_i2c0_pins[] __initconst = { - DA830_I2C0_SDA, DA830_I2C0_SCL, - -1 -}; - -const short da830_i2c1_pins[] __initconst = { - DA830_I2C1_SCL, DA830_I2C1_SDA, - -1 -}; - -const short da830_lcdcntl_pins[] __initconst = { - DA830_LCD_D_0, DA830_LCD_D_1, DA830_LCD_D_2, DA830_LCD_D_3, - DA830_LCD_D_4, DA830_LCD_D_5, DA830_LCD_D_6, DA830_LCD_D_7, - DA830_LCD_D_8, DA830_LCD_D_9, DA830_LCD_D_10, DA830_LCD_D_11, - DA830_LCD_D_12, DA830_LCD_D_13, DA830_LCD_D_14, DA830_LCD_D_15, - DA830_LCD_PCLK, DA830_LCD_HSYNC, DA830_LCD_VSYNC, DA830_NLCD_AC_ENB_CS, - DA830_LCD_MCLK, - -1 -}; - -const short da830_pwm_pins[] __initconst = { - DA830_ECAP0_APWM0, DA830_ECAP1_APWM1, DA830_EPWM0B, DA830_EPWM0A, - DA830_EPWMSYNCI, DA830_EPWMSYNC0, DA830_ECAP2_APWM2, DA830_EHRPWMGLUETZ, - DA830_EPWM2B, DA830_EPWM2A, DA830_EPWM1B, DA830_EPWM1A, - -1 -}; - -const short da830_ecap0_pins[] __initconst = { - DA830_ECAP0_APWM0, - -1 -}; - -const short da830_ecap1_pins[] __initconst = { - DA830_ECAP1_APWM1, - -1 -}; - -const short da830_ecap2_pins[] __initconst = { - DA830_ECAP2_APWM2, - -1 -}; - -const short da830_eqep0_pins[] __initconst = { - DA830_EQEP0I, DA830_EQEP0S, DA830_EQEP0A, DA830_EQEP0B, - -1 -}; - -const short da830_eqep1_pins[] __initconst = { - DA830_EQEP1I, DA830_EQEP1S, DA830_EQEP1A, DA830_EQEP1B, - -1 -}; - static struct map_desc da830_io_desc[] = { { .virtual = IO_VIRT, @@ -663,30 +487,6 @@ static struct davinci_id da830_ids[] = { }, }; -static struct davinci_gpio_platform_data da830_gpio_platform_data = { - .no_auto_base = true, - .base = 0, - .ngpio = 128, -}; - -int __init da830_register_gpio(void) -{ - return da8xx_register_gpio(&da830_gpio_platform_data); -} - -/* - * Bottom half of timer0 is used both for clock even and clocksource. - * Top half is used by DSP. - */ -static const struct davinci_timer_cfg da830_timer_cfg = { - .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K), - .irq = { - DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_0)), - DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)), - }, - .cmp_off = DA830_CMP12_0, -}; - static const struct davinci_soc_info davinci_soc_info_da830 = { .io_desc = da830_io_desc, .io_desc_num = ARRAY_SIZE(da830_io_desc), @@ -696,7 +496,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = { .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, .pinmux_pins = da830_pins, .pinmux_pins_num = ARRAY_SIZE(da830_pins), - .emac_pdata = &da8xx_emac_pdata, }; void __init da830_init(void) @@ -706,76 +505,3 @@ void __init da830_init(void) da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module"); } - -static const struct davinci_cp_intc_config da830_cp_intc_config = { - .reg = { - .start = DA8XX_CP_INTC_BASE, - .end = DA8XX_CP_INTC_BASE + SZ_8K - 1, - .flags = IORESOURCE_MEM, - }, - .num_irqs = DA830_N_CP_INTC_IRQ, -}; - -void __init da830_init_irq(void) -{ - davinci_cp_intc_init(&da830_cp_intc_config); -} - -void __init da830_init_time(void) -{ - void __iomem *pll; - struct clk *clk; - int rv; - - clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ); - - pll = ioremap(DA8XX_PLL0_BASE, SZ_4K); - - da830_pll_init(NULL, pll, NULL); - - clk = clk_get(NULL, "timer0"); - if (WARN_ON(IS_ERR(clk))) { - pr_err("Unable to get the timer clock\n"); - return; - } - - rv = davinci_timer_register(clk, &da830_timer_cfg); - WARN(rv, "Unable to register the timer: %d\n", rv); -} - -static struct resource da830_psc0_resources[] = { - { - .start = DA8XX_PSC0_BASE, - .end = DA8XX_PSC0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device da830_psc0_device = { - .name = "da830-psc0", - .id = -1, - .resource = da830_psc0_resources, - .num_resources = ARRAY_SIZE(da830_psc0_resources), -}; - -static struct resource da830_psc1_resources[] = { - { - .start = DA8XX_PSC1_BASE, - .end = DA8XX_PSC1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device da830_psc1_device = { - .name = "da830-psc1", - .id = -1, - .resource = da830_psc1_resources, - .num_resources = ARRAY_SIZE(da830_psc1_resources), -}; - -void __init da830_register_clocks(void) -{ - /* PLL is registered in da830_init_time() */ - platform_device_register(&da830_psc0_device); - platform_device_register(&da830_psc1_device); -} diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 635e88daf5dd..287dd987908e 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -10,19 +10,10 @@ * 2009 (c) MontaVista Software, Inc. */ -#include <linux/clk-provider.h> -#include <linux/clk/davinci.h> -#include <linux/clkdev.h> -#include <linux/cpufreq.h> #include <linux/gpio.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/irqchip/irq-davinci-cp-intc.h> #include <linux/mfd/da8xx-cfgchip.h> -#include <linux/platform_data/clk-da8xx-cfgchip.h> -#include <linux/platform_data/clk-davinci-pll.h> -#include <linux/platform_data/davinci-cpufreq.h> -#include <linux/platform_data/gpio-davinci.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> @@ -33,6 +24,7 @@ #include "common.h" #include "cputype.h" #include "da8xx.h" +#include "hardware.h" #include "pm.h" #include "irqs.h" #include "mux.h" @@ -258,45 +250,6 @@ static const struct mux_config da850_pins[] = { #endif }; -const short da850_i2c0_pins[] __initconst = { - DA850_I2C0_SDA, DA850_I2C0_SCL, - -1 -}; - -const short da850_i2c1_pins[] __initconst = { - DA850_I2C1_SCL, DA850_I2C1_SDA, - -1 -}; - -const short da850_lcdcntl_pins[] __initconst = { - DA850_LCD_D_0, DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3, - DA850_LCD_D_4, DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7, - DA850_LCD_D_8, DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11, - DA850_LCD_D_12, DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15, - DA850_LCD_PCLK, DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS, - -1 -}; - -const short da850_vpif_capture_pins[] __initconst = { - DA850_VPIF_DIN0, DA850_VPIF_DIN1, DA850_VPIF_DIN2, DA850_VPIF_DIN3, - DA850_VPIF_DIN4, DA850_VPIF_DIN5, DA850_VPIF_DIN6, DA850_VPIF_DIN7, - DA850_VPIF_DIN8, DA850_VPIF_DIN9, DA850_VPIF_DIN10, DA850_VPIF_DIN11, - DA850_VPIF_DIN12, DA850_VPIF_DIN13, DA850_VPIF_DIN14, DA850_VPIF_DIN15, - DA850_VPIF_CLKIN0, DA850_VPIF_CLKIN1, DA850_VPIF_CLKIN2, - DA850_VPIF_CLKIN3, - -1 -}; - -const short da850_vpif_display_pins[] __initconst = { - DA850_VPIF_DOUT0, DA850_VPIF_DOUT1, DA850_VPIF_DOUT2, DA850_VPIF_DOUT3, - DA850_VPIF_DOUT4, DA850_VPIF_DOUT5, DA850_VPIF_DOUT6, DA850_VPIF_DOUT7, - DA850_VPIF_DOUT8, DA850_VPIF_DOUT9, DA850_VPIF_DOUT10, - DA850_VPIF_DOUT11, DA850_VPIF_DOUT12, DA850_VPIF_DOUT13, - DA850_VPIF_DOUT14, DA850_VPIF_DOUT15, DA850_VPIF_CLKO2, - DA850_VPIF_CLKO3, - -1 -}; - static struct map_desc da850_io_desc[] = { { .virtual = IO_VIRT, @@ -330,204 +283,9 @@ static struct davinci_id da850_ids[] = { }, }; -/* - * Bottom half of timer 0 is used for clock_event, top half for - * clocksource. - */ -static const struct davinci_timer_cfg da850_timer_cfg = { - .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K), - .irq = { - DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)), - DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0)), - }, -}; - -#ifdef CONFIG_CPU_FREQ -/* - * Notes: - * According to the TRM, minimum PLLM results in maximum power savings. - * The OPP definitions below should keep the PLLM as low as possible. - * - * The output of the PLLM must be between 300 to 600 MHz. - */ -struct da850_opp { - unsigned int freq; /* in KHz */ - unsigned int prediv; - unsigned int mult; - unsigned int postdiv; - unsigned int cvdd_min; /* in uV */ - unsigned int cvdd_max; /* in uV */ -}; - -static const struct da850_opp da850_opp_456 = { - .freq = 456000, - .prediv = 1, - .mult = 19, - .postdiv = 1, - .cvdd_min = 1300000, - .cvdd_max = 1350000, -}; - -static const struct da850_opp da850_opp_408 = { - .freq = 408000, - .prediv = 1, - .mult = 17, - .postdiv = 1, - .cvdd_min = 1300000, - .cvdd_max = 1350000, -}; - -static const struct da850_opp da850_opp_372 = { - .freq = 372000, - .prediv = 2, - .mult = 31, - .postdiv = 1, - .cvdd_min = 1200000, - .cvdd_max = 1320000, -}; - -static const struct da850_opp da850_opp_300 = { - .freq = 300000, - .prediv = 1, - .mult = 25, - .postdiv = 2, - .cvdd_min = 1200000, - .cvdd_max = 1320000, -}; - -static const struct da850_opp da850_opp_200 = { - .freq = 200000, - .prediv = 1, - .mult = 25, - .postdiv = 3, - .cvdd_min = 1100000, - .cvdd_max = 1160000, -}; - -static const struct da850_opp da850_opp_96 = { - .freq = 96000, - .prediv = 1, - .mult = 20, - .postdiv = 5, - .cvdd_min = 1000000, - .cvdd_max = 1050000, -}; - -#define OPP(freq) \ - { \ - .driver_data = (unsigned int) &da850_opp_##freq, \ - .frequency = freq * 1000, \ - } - -static struct cpufreq_frequency_table da850_freq_table[] = { - OPP(456), - OPP(408), - OPP(372), - OPP(300), - OPP(200), - OPP(96), - { - .driver_data = 0, - .frequency = CPUFREQ_TABLE_END, - }, -}; - -#ifdef CONFIG_REGULATOR -static int da850_set_voltage(unsigned int index); -static int da850_regulator_init(void); -#endif - -static struct davinci_cpufreq_config cpufreq_info = { - .freq_table = da850_freq_table, -#ifdef CONFIG_REGULATOR - .init = da850_regulator_init, - .set_voltage = da850_set_voltage, -#endif -}; - -#ifdef CONFIG_REGULATOR -static struct regulator *cvdd; - -static int da850_set_voltage(unsigned int index) -{ - struct da850_opp *opp; - - if (!cvdd) - return -ENODEV; - - opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data; - - return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max); -} - -static int da850_regulator_init(void) -{ - cvdd = regulator_get(NULL, "cvdd"); - if (WARN(IS_ERR(cvdd), "Unable to obtain voltage regulator for CVDD;" - " voltage scaling unsupported\n")) { - return PTR_ERR(cvdd); - } - - return 0; -} -#endif - -static struct platform_device da850_cpufreq_device = { - .name = "cpufreq-davinci", - .dev = { - .platform_data = &cpufreq_info, - }, - .id = -1, -}; - -unsigned int da850_max_speed = 300000; - -int da850_register_cpufreq(char *async_clk) -{ - int i; - - /* cpufreq driver can help keep an "async" clock constant */ - if (async_clk) - clk_add_alias("async", da850_cpufreq_device.name, - async_clk, NULL); - for (i = 0; i < ARRAY_SIZE(da850_freq_table); i++) { - if (da850_freq_table[i].frequency <= da850_max_speed) { - cpufreq_info.freq_table = &da850_freq_table[i]; - break; - } - } - - return platform_device_register(&da850_cpufreq_device); -} -#else -int __init da850_register_cpufreq(char *async_clk) -{ - return 0; -} -#endif - /* VPIF resource, platform data */ static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32); -static struct resource da850_vpif_resource[] = { - { - .start = DA8XX_VPIF_BASE, - .end = DA8XX_VPIF_BASE + 0xfff, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device da850_vpif_dev = { - .name = "vpif", - .id = -1, - .dev = { - .dma_mask = &da850_vpif_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = da850_vpif_resource, - .num_resources = ARRAY_SIZE(da850_vpif_resource), -}; - static struct resource da850_vpif_display_resource[] = { { .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT), @@ -571,11 +329,6 @@ static struct platform_device da850_vpif_capture_dev = { .num_resources = ARRAY_SIZE(da850_vpif_capture_resource), }; -int __init da850_register_vpif(void) -{ - return platform_device_register(&da850_vpif_dev); -} - int __init da850_register_vpif_display(struct vpif_display_config *display_config) { @@ -590,17 +343,6 @@ int __init da850_register_vpif_capture(struct vpif_capture_config return platform_device_register(&da850_vpif_capture_dev); } -static struct davinci_gpio_platform_data da850_gpio_platform_data = { - .no_auto_base = true, - .base = 0, - .ngpio = 144, -}; - -int __init da850_register_gpio(void) -{ - return da8xx_register_gpio(&da850_gpio_platform_data); -} - static const struct davinci_soc_info davinci_soc_info_da850 = { .io_desc = da850_io_desc, .io_desc_num = ARRAY_SIZE(da850_io_desc), @@ -610,7 +352,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = { .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, .pinmux_pins = da850_pins, .pinmux_pins_num = ARRAY_SIZE(da850_pins), - .emac_pdata = &da8xx_emac_pdata, .sram_dma = DA8XX_SHARED_RAM_BASE, .sram_len = SZ_128K, }; @@ -626,142 +367,3 @@ void __init da850_init(void) da8xx_syscfg1_base = ioremap(DA8XX_SYSCFG1_BASE, SZ_4K); WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module"); } - -static const struct davinci_cp_intc_config da850_cp_intc_config = { - .reg = { - .start = DA8XX_CP_INTC_BASE, - .end = DA8XX_CP_INTC_BASE + SZ_8K - 1, - .flags = IORESOURCE_MEM, - }, - .num_irqs = DA850_N_CP_INTC_IRQ, -}; - -void __init da850_init_irq(void) -{ - davinci_cp_intc_init(&da850_cp_intc_config); -} - -void __init da850_init_time(void) -{ - void __iomem *pll0; - struct regmap *cfgchip; - struct clk *clk; - int rv; - - clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA850_REF_FREQ); - - pll0 = ioremap(DA8XX_PLL0_BASE, SZ_4K); - cfgchip = da8xx_get_cfgchip(); - - da850_pll0_init(NULL, pll0, cfgchip); - - clk = clk_get(NULL, "timer0"); - if (WARN_ON(IS_ERR(clk))) { - pr_err("Unable to get the timer clock\n"); - return; - } - - rv = davinci_timer_register(clk, &da850_timer_cfg); - WARN(rv, "Unable to register the timer: %d\n", rv); -} - -static struct resource da850_pll1_resources[] = { - { - .start = DA850_PLL1_BASE, - .end = DA850_PLL1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct davinci_pll_platform_data da850_pll1_pdata; - -static struct platform_device da850_pll1_device = { - .name = "da850-pll1", - .id = -1, - .resource = da850_pll1_resources, - .num_resources = ARRAY_SIZE(da850_pll1_resources), - .dev = { - .platform_data = &da850_pll1_pdata, - }, -}; - -static struct resource da850_psc0_resources[] = { - { - .start = DA8XX_PSC0_BASE, - .end = DA8XX_PSC0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device da850_psc0_device = { - .name = "da850-psc0", - .id = -1, - .resource = da850_psc0_resources, - .num_resources = ARRAY_SIZE(da850_psc0_resources), -}; - -static struct resource da850_psc1_resources[] = { - { - .start = DA8XX_PSC1_BASE, - .end = DA8XX_PSC1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device da850_psc1_device = { - .name = "da850-psc1", - .id = -1, - .resource = da850_psc1_resources, - .num_resources = ARRAY_SIZE(da850_psc1_resources), -}; - -static struct da8xx_cfgchip_clk_platform_data da850_async1_pdata; - -static struct platform_device da850_async1_clksrc_device = { - .name = "da850-async1-clksrc", - .id = -1, - .dev = { - .platform_data = &da850_async1_pdata, - }, -}; - -static struct da8xx_cfgchip_clk_platform_data da850_async3_pdata; - -static struct platform_device da850_async3_clksrc_device = { - .name = "da850-async3-clksrc", - .id = -1, - .dev = { - .platform_data = &da850_async3_pdata, - }, -}; - -static struct da8xx_cfgchip_clk_platform_data da850_tbclksync_pdata; - -static struct platform_device da850_tbclksync_device = { - .name = "da830-tbclksync", - .id = -1, - .dev = { - .platform_data = &da850_tbclksync_pdata, - }, -}; - -void __init da850_register_clocks(void) -{ - /* PLL0 is registered in da850_init_time() */ - - da850_pll1_pdata.cfgchip = da8xx_get_cfgchip(); - platform_device_register(&da850_pll1_device); - - da850_async1_pdata.cfgchip = da8xx_get_cfgchip(); - platform_device_register(&da850_async1_clksrc_device); - - da850_async3_pdata.cfgchip = da8xx_get_cfgchip(); - platform_device_register(&da850_async3_clksrc_device); - - platform_device_register(&da850_psc0_device); - - platform_device_register(&da850_psc1_device); - - da850_tbclksync_pdata.cfgchip = da8xx_get_cfgchip(); - platform_device_register(&da850_tbclksync_device); -} diff --git a/arch/arm/mach-davinci/da8xx.h b/arch/arm/mach-davinci/da8xx.h index 382811dbbc3b..54a255b8d8d8 100644 --- a/arch/arm/mach-davinci/da8xx.h +++ b/arch/arm/mach-davinci/da8xx.h @@ -9,39 +9,21 @@ #ifndef __ASM_ARCH_DAVINCI_DA8XX_H #define __ASM_ARCH_DAVINCI_DA8XX_H -#include <video/da8xx-fb.h> - +#include <linux/dma-mapping.h> #include <linux/platform_device.h> -#include <linux/davinci_emac.h> -#include <linux/spi/spi.h> -#include <linux/platform_data/davinci_asp.h> +#include <linux/videodev2.h> #include <linux/reboot.h> #include <linux/regmap.h> -#include <linux/videodev2.h> -#include "serial.h" +#include "hardware.h" #include "pm.h" -#include <linux/platform_data/edma.h> -#include <linux/platform_data/i2c-davinci.h> -#include <linux/platform_data/mmc-davinci.h> -#include <linux/platform_data/usb-davinci.h> -#include <linux/platform_data/spi-davinci.h> -#include <linux/platform_data/uio_pruss.h> - #include <media/davinci/vpif_types.h> extern void __iomem *da8xx_syscfg0_base; extern void __iomem *da8xx_syscfg1_base; /* - * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade - * (than the regular 300MHz variant), the board code should set this up - * with the supported speed before calling da850_register_cpufreq(). - */ -extern unsigned int da850_max_speed; - -/* * The cp_intc interrupt controller for the da8xx isn't in the same * chunk of physical memory space as the other registers (like it is * on the davincis) so it needs to be mapped separately. It will be @@ -87,83 +69,14 @@ extern unsigned int da850_max_speed; #define DA8XX_ARM_RAM_BASE 0xffff0000 void da830_init(void); -void da830_init_irq(void); -void da830_init_time(void); -void da830_register_clocks(void); void da850_init(void); -void da850_init_irq(void); -void da850_init_time(void); -void da850_register_clocks(void); -int da830_register_edma(struct edma_rsv_info *rsv); -int da850_register_edma(struct edma_rsv_info *rsv[2]); -int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); -int da8xx_register_spi_bus(int instance, unsigned num_chipselect); -int da8xx_register_watchdog(void); -int da8xx_register_usb_phy(void); -int da8xx_register_usb20(unsigned mA, unsigned potpgt); -int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); -int da8xx_register_usb_phy_clocks(void); -int da850_register_sata_refclk(int rate); -int da8xx_register_emac(void); -int da8xx_register_uio_pruss(void); -int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); -int da8xx_register_mmcsd0(struct davinci_mmc_config *config); -int da850_register_mmcsd1(struct davinci_mmc_config *config); -void da8xx_register_mcasp(int id, struct snd_platform_data *pdata); -int da8xx_register_rtc(void); -int da8xx_register_gpio(void *pdata); -int da850_register_cpufreq(char *async_clk); -int da8xx_register_cpuidle(void); -void __iomem *da8xx_get_mem_ctlr(void); -int da850_register_sata(unsigned long refclkpn); -int da850_register_vpif(void); int da850_register_vpif_display (struct vpif_display_config *display_config); int da850_register_vpif_capture (struct vpif_capture_config *capture_config); -void da8xx_rproc_reserve_cma(void); -int da8xx_register_rproc(void); -int da850_register_gpio(void); -int da830_register_gpio(void); struct regmap *da8xx_get_cfgchip(void); - -extern struct platform_device da8xx_serial_device[]; -extern struct emac_platform_data da8xx_emac_pdata; -extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; -extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; - - -extern const short da830_emif25_pins[]; -extern const short da830_spi0_pins[]; -extern const short da830_spi1_pins[]; -extern const short da830_mmc_sd_pins[]; -extern const short da830_uart0_pins[]; -extern const short da830_uart1_pins[]; -extern const short da830_uart2_pins[]; -extern const short da830_usb20_pins[]; -extern const short da830_usb11_pins[]; -extern const short da830_uhpi_pins[]; -extern const short da830_cpgmac_pins[]; -extern const short da830_emif3c_pins[]; -extern const short da830_mcasp0_pins[]; -extern const short da830_mcasp1_pins[]; -extern const short da830_mcasp2_pins[]; -extern const short da830_i2c0_pins[]; -extern const short da830_i2c1_pins[]; -extern const short da830_lcdcntl_pins[]; -extern const short da830_pwm_pins[]; -extern const short da830_ecap0_pins[]; -extern const short da830_ecap1_pins[]; -extern const short da830_ecap2_pins[]; -extern const short da830_eqep0_pins[]; -extern const short da830_eqep1_pins[]; -extern const short da850_vpif_capture_pins[]; -extern const short da850_vpif_display_pins[]; - -extern const short da850_i2c0_pins[]; -extern const short da850_i2c1_pins[]; -extern const short da850_lcdcntl_pins[]; +void __iomem *da8xx_get_mem_ctlr(void); #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h deleted file mode 100644 index b7172797692b..000000000000 --- a/arch/arm/mach-davinci/davinci.h +++ /dev/null @@ -1,136 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * This file contains the processor specific definitions - * of the TI DM644x, DM355, DM365, and DM646x. - * - * Copyright (C) 2011 Texas Instruments Incorporated - * Copyright (c) 2007 Deep Root Systems, LLC - */ -#ifndef __DAVINCI_H -#define __DAVINCI_H - -#include <linux/clk.h> -#include <linux/videodev2.h> -#include <linux/davinci_emac.h> -#include <linux/platform_device.h> -#include <linux/spi/spi.h> -#include <linux/platform_data/davinci_asp.h> -#include <linux/platform_data/edma.h> -#include <linux/platform_data/keyscan-davinci.h> - -#include "hardware.h" - -#include <media/davinci/vpfe_capture.h> -#include <media/davinci/vpif_types.h> -#include <media/davinci/vpss.h> -#include <media/davinci/vpbe_types.h> -#include <media/davinci/vpbe_venc.h> -#include <media/davinci/vpbe.h> -#include <media/davinci/vpbe_osd.h> - -#define DAVINCI_PLL1_BASE 0x01c40800 -#define DAVINCI_PLL2_BASE 0x01c40c00 -#define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01c41000 - -#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000 -#define SYSMOD_VDAC_CONFIG 0x2c -#define SYSMOD_VIDCLKCTL 0x38 -#define SYSMOD_VPSS_CLKCTL 0x44 -#define SYSMOD_VDD3P3VPWDN 0x48 -#define SYSMOD_VSCLKDIS 0x6c -#define SYSMOD_PUPDCTL1 0x7c - -/* VPSS CLKCTL bit definitions */ -#define VPSS_MUXSEL_EXTCLK_ENABLE BIT(1) -#define VPSS_VENCCLKEN_ENABLE BIT(3) -#define VPSS_DACCLKEN_ENABLE BIT(4) -#define VPSS_PLLC2SYSCLK5_ENABLE BIT(5) - -extern void __iomem *davinci_sysmod_base; -#define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x)) -void davinci_map_sysmod(void); - -#define DAVINCI_GPIO_BASE 0x01C67000 -int davinci_gpio_register(struct resource *res, int size, void *pdata); - -#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400) -#define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00) - -/* DM355 base addresses */ -#define DM355_ASYNC_EMIF_CONTROL_BASE 0x01e10000 -#define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 - -#define ASP1_TX_EVT_EN 1 -#define ASP1_RX_EVT_EN 2 - -/* DM365 base addresses */ -#define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000 -#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 -#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 - -/* DM644x base addresses */ -#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01e00000 -#define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 -#define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 -#define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 -#define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 - -/* DM646x base addresses */ -#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 -#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000 - -int davinci_init_wdt(void); - -/* DM355 function declarations */ -void dm355_init(void); -void dm355_init_time(void); -void dm355_init_irq(void); -void dm355_register_clocks(void); -void dm355_init_spi0(unsigned chipselect_mask, - const struct spi_board_info *info, unsigned len); -void dm355_init_asp1(u32 evt_enable); -int dm355_init_video(struct vpfe_config *, struct vpbe_config *); -int dm355_gpio_register(void); - -/* DM365 function declarations */ -void dm365_init(void); -void dm365_init_irq(void); -void dm365_init_time(void); -void dm365_register_clocks(void); -void dm365_init_asp(void); -void dm365_init_vc(void); -void dm365_init_ks(struct davinci_ks_platform_data *pdata); -void dm365_init_rtc(void); -void dm365_init_spi0(unsigned chipselect_mask, - const struct spi_board_info *info, unsigned len); -int dm365_init_video(struct vpfe_config *, struct vpbe_config *); -int dm365_gpio_register(void); - -/* DM644x function declarations */ -void dm644x_init(void); -void dm644x_init_irq(void); -void dm644x_init_devices(void); -void dm644x_init_time(void); -void dm644x_register_clocks(void); -void dm644x_init_asp(void); -int dm644x_init_video(struct vpfe_config *, struct vpbe_config *); -int dm644x_gpio_register(void); - -/* DM646x function declarations */ -void dm646x_init(void); -void dm646x_init_irq(void); -void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate); -void dm646x_register_clocks(void); -void dm646x_init_mcasp0(struct snd_platform_data *pdata); -void dm646x_init_mcasp1(struct snd_platform_data *pdata); -int dm646x_init_edma(struct edma_rsv_info *rsv); -void dm646x_video_init(void); -void dm646x_setup_vpif(struct vpif_display_config *, - struct vpif_capture_config *); -int dm646x_gpio_register(void); - -extern struct platform_device dm365_serial_device[]; -extern struct platform_device dm355_serial_device[]; -extern struct platform_device dm644x_serial_device[]; -extern struct platform_device dm646x_serial_device[]; -#endif /*__DAVINCI_H */ diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index ef9593558e5f..6939166c33c2 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -21,7 +21,6 @@ #include "common.h" #include "cputype.h" #include "da8xx.h" -#include "asp.h" #include "cpuidle.h" #include "irqs.h" #include "sram.h" @@ -57,911 +56,6 @@ void __iomem *da8xx_syscfg0_base; void __iomem *da8xx_syscfg1_base; -static struct plat_serial8250_port da8xx_serial0_pdata[] = { - { - .mapbase = DA8XX_UART0_BASE, - .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT0), - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | - UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 2, - }, - { - .flags = 0, - } -}; -static struct plat_serial8250_port da8xx_serial1_pdata[] = { - { - .mapbase = DA8XX_UART1_BASE, - .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT1), - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | - UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 2, - }, - { - .flags = 0, - } -}; -static struct plat_serial8250_port da8xx_serial2_pdata[] = { - { - .mapbase = DA8XX_UART2_BASE, - .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT2), - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | - UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 2, - }, - { - .flags = 0, - } -}; - -struct platform_device da8xx_serial_device[] = { - { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = da8xx_serial0_pdata, - } - }, - { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM1, - .dev = { - .platform_data = da8xx_serial1_pdata, - } - }, - { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM2, - .dev = { - .platform_data = da8xx_serial2_pdata, - } - }, - { - } -}; - -static s8 da8xx_queue_priority_mapping[][2] = { - /* {event queue no, Priority} */ - {0, 3}, - {1, 7}, - {-1, -1} -}; - -static s8 da850_queue_priority_mapping[][2] = { - /* {event queue no, Priority} */ - {0, 3}, - {-1, -1} -}; - -static struct edma_soc_info da8xx_edma0_pdata = { - .queue_priority_mapping = da8xx_queue_priority_mapping, - .default_queue = EVENTQ_1, -}; - -static struct edma_soc_info da850_edma1_pdata = { - .queue_priority_mapping = da850_queue_priority_mapping, - .default_queue = EVENTQ_0, -}; - -static struct resource da8xx_edma0_resources[] = { - { - .name = "edma3_cc", - .start = DA8XX_TPCC_BASE, - .end = DA8XX_TPCC_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc0", - .start = DA8XX_TPTC0_BASE, - .end = DA8XX_TPTC0_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc1", - .start = DA8XX_TPTC1_BASE, - .end = DA8XX_TPTC1_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_ccint", - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CCINT0), - .flags = IORESOURCE_IRQ, - }, - { - .name = "edma3_ccerrint", - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CCERRINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource da850_edma1_resources[] = { - { - .name = "edma3_cc", - .start = DA850_TPCC1_BASE, - .end = DA850_TPCC1_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc0", - .start = DA850_TPTC2_BASE, - .end = DA850_TPTC2_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_ccint", - .start = DAVINCI_INTC_IRQ(IRQ_DA850_CCINT1), - .flags = IORESOURCE_IRQ, - }, - { - .name = "edma3_ccerrint", - .start = DAVINCI_INTC_IRQ(IRQ_DA850_CCERRINT1), - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct platform_device_info da8xx_edma0_device __initconst = { - .name = "edma", - .id = 0, - .dma_mask = DMA_BIT_MASK(32), - .res = da8xx_edma0_resources, - .num_res = ARRAY_SIZE(da8xx_edma0_resources), - .data = &da8xx_edma0_pdata, - .size_data = sizeof(da8xx_edma0_pdata), -}; - -static const struct platform_device_info da850_edma1_device __initconst = { - .name = "edma", - .id = 1, - .dma_mask = DMA_BIT_MASK(32), - .res = da850_edma1_resources, - .num_res = ARRAY_SIZE(da850_edma1_resources), - .data = &da850_edma1_pdata, - .size_data = sizeof(da850_edma1_pdata), -}; - -static const struct dma_slave_map da830_edma_map[] = { - { "davinci-mcasp.0", "rx", EDMA_FILTER_PARAM(0, 0) }, - { "davinci-mcasp.0", "tx", EDMA_FILTER_PARAM(0, 1) }, - { "davinci-mcasp.1", "rx", EDMA_FILTER_PARAM(0, 2) }, - { "davinci-mcasp.1", "tx", EDMA_FILTER_PARAM(0, 3) }, - { "davinci-mcasp.2", "rx", EDMA_FILTER_PARAM(0, 4) }, - { "davinci-mcasp.2", "tx", EDMA_FILTER_PARAM(0, 5) }, - { "spi_davinci.0", "rx", EDMA_FILTER_PARAM(0, 14) }, - { "spi_davinci.0", "tx", EDMA_FILTER_PARAM(0, 15) }, - { "da830-mmc.0", "rx", EDMA_FILTER_PARAM(0, 16) }, - { "da830-mmc.0", "tx", EDMA_FILTER_PARAM(0, 17) }, - { "spi_davinci.1", "rx", EDMA_FILTER_PARAM(0, 18) }, - { "spi_davinci.1", "tx", EDMA_FILTER_PARAM(0, 19) }, -}; - -int __init da830_register_edma(struct edma_rsv_info *rsv) -{ - struct platform_device *edma_pdev; - - da8xx_edma0_pdata.rsv = rsv; - - da8xx_edma0_pdata.slave_map = da830_edma_map; - da8xx_edma0_pdata.slavecnt = ARRAY_SIZE(da830_edma_map); - - edma_pdev = platform_device_register_full(&da8xx_edma0_device); - return PTR_ERR_OR_ZERO(edma_pdev); -} - -static const struct dma_slave_map da850_edma0_map[] = { - { "davinci-mcasp.0", "rx", EDMA_FILTER_PARAM(0, 0) }, - { "davinci-mcasp.0", "tx", EDMA_FILTER_PARAM(0, 1) }, - { "davinci-mcbsp.0", "rx", EDMA_FILTER_PARAM(0, 2) }, - { "davinci-mcbsp.0", "tx", EDMA_FILTER_PARAM(0, 3) }, - { "davinci-mcbsp.1", "rx", EDMA_FILTER_PARAM(0, 4) }, - { "davinci-mcbsp.1", "tx", EDMA_FILTER_PARAM(0, 5) }, - { "spi_davinci.0", "rx", EDMA_FILTER_PARAM(0, 14) }, - { "spi_davinci.0", "tx", EDMA_FILTER_PARAM(0, 15) }, - { "da830-mmc.0", "rx", EDMA_FILTER_PARAM(0, 16) }, - { "da830-mmc.0", "tx", EDMA_FILTER_PARAM(0, 17) }, - { "spi_davinci.1", "rx", EDMA_FILTER_PARAM(0, 18) }, - { "spi_davinci.1", "tx", EDMA_FILTER_PARAM(0, 19) }, -}; - -static const struct dma_slave_map da850_edma1_map[] = { - { "da830-mmc.1", "rx", EDMA_FILTER_PARAM(1, 28) }, - { "da830-mmc.1", "tx", EDMA_FILTER_PARAM(1, 29) }, -}; - -int __init da850_register_edma(struct edma_rsv_info *rsv[2]) -{ - struct platform_device *edma_pdev; - - if (rsv) { - da8xx_edma0_pdata.rsv = rsv[0]; - da850_edma1_pdata.rsv = rsv[1]; - } - - da8xx_edma0_pdata.slave_map = da850_edma0_map; - da8xx_edma0_pdata.slavecnt = ARRAY_SIZE(da850_edma0_map); - - edma_pdev = platform_device_register_full(&da8xx_edma0_device); - if (IS_ERR(edma_pdev)) { - pr_warn("%s: Failed to register eDMA0\n", __func__); - return PTR_ERR(edma_pdev); - } - - da850_edma1_pdata.slave_map = da850_edma1_map; - da850_edma1_pdata.slavecnt = ARRAY_SIZE(da850_edma1_map); - - edma_pdev = platform_device_register_full(&da850_edma1_device); - return PTR_ERR_OR_ZERO(edma_pdev); -} - -static struct resource da8xx_i2c_resources0[] = { - { - .start = DA8XX_I2C0_BASE, - .end = DA8XX_I2C0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT0), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT0), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da8xx_i2c_device0 = { - .name = "i2c_davinci", - .id = 1, - .num_resources = ARRAY_SIZE(da8xx_i2c_resources0), - .resource = da8xx_i2c_resources0, -}; - -static struct resource da8xx_i2c_resources1[] = { - { - .start = DA8XX_I2C1_BASE, - .end = DA8XX_I2C1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT1), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT1), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da8xx_i2c_device1 = { - .name = "i2c_davinci", - .id = 2, - .num_resources = ARRAY_SIZE(da8xx_i2c_resources1), - .resource = da8xx_i2c_resources1, -}; - -int __init da8xx_register_i2c(int instance, - struct davinci_i2c_platform_data *pdata) -{ - struct platform_device *pdev; - - if (instance == 0) - pdev = &da8xx_i2c_device0; - else if (instance == 1) - pdev = &da8xx_i2c_device1; - else - return -EINVAL; - - pdev->dev.platform_data = pdata; - return platform_device_register(pdev); -} - -static struct resource da8xx_watchdog_resources[] = { - { - .start = DA8XX_WDOG_BASE, - .end = DA8XX_WDOG_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device da8xx_wdt_device = { - .name = "davinci-wdt", - .id = -1, - .num_resources = ARRAY_SIZE(da8xx_watchdog_resources), - .resource = da8xx_watchdog_resources, -}; - -int __init da8xx_register_watchdog(void) -{ - return platform_device_register(&da8xx_wdt_device); -} - -static struct resource da8xx_emac_resources[] = { - { - .start = DA8XX_EMAC_CPPI_PORT_BASE, - .end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_THRESH_PULSE), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_THRESH_PULSE), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_PULSE), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_PULSE), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_TX_PULSE), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_TX_PULSE), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_MISC_PULSE), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_MISC_PULSE), - .flags = IORESOURCE_IRQ, - }, -}; - -struct emac_platform_data da8xx_emac_pdata = { - .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET, - .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET, - .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET, - .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE, - .version = EMAC_VERSION_2, -}; - -static struct platform_device da8xx_emac_device = { - .name = "davinci_emac", - .id = 1, - .dev = { - .platform_data = &da8xx_emac_pdata, - }, - .num_resources = ARRAY_SIZE(da8xx_emac_resources), - .resource = da8xx_emac_resources, -}; - -static struct resource da8xx_mdio_resources[] = { - { - .start = DA8XX_EMAC_MDIO_BASE, - .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device da8xx_mdio_device = { - .name = "davinci_mdio", - .id = 0, - .num_resources = ARRAY_SIZE(da8xx_mdio_resources), - .resource = da8xx_mdio_resources, -}; - -int __init da8xx_register_emac(void) -{ - int ret; - - ret = platform_device_register(&da8xx_mdio_device); - if (ret < 0) - return ret; - - return platform_device_register(&da8xx_emac_device); -} - -static struct resource da830_mcasp1_resources[] = { - { - .name = "mpu", - .start = DAVINCI_DA830_MCASP1_REG_BASE, - .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1, - .flags = IORESOURCE_MEM, - }, - /* TX event */ - { - .name = "tx", - .start = DAVINCI_DA830_DMA_MCASP1_AXEVT, - .end = DAVINCI_DA830_DMA_MCASP1_AXEVT, - .flags = IORESOURCE_DMA, - }, - /* RX event */ - { - .name = "rx", - .start = DAVINCI_DA830_DMA_MCASP1_AREVT, - .end = DAVINCI_DA830_DMA_MCASP1_AREVT, - .flags = IORESOURCE_DMA, - }, - { - .name = "common", - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da830_mcasp1_device = { - .name = "davinci-mcasp", - .id = 1, - .num_resources = ARRAY_SIZE(da830_mcasp1_resources), - .resource = da830_mcasp1_resources, -}; - -static struct resource da830_mcasp2_resources[] = { - { - .name = "mpu", - .start = DAVINCI_DA830_MCASP2_REG_BASE, - .end = DAVINCI_DA830_MCASP2_REG_BASE + (SZ_1K * 12) - 1, - .flags = IORESOURCE_MEM, - }, - /* TX event */ - { - .name = "tx", - .start = DAVINCI_DA830_DMA_MCASP2_AXEVT, - .end = DAVINCI_DA830_DMA_MCASP2_AXEVT, - .flags = IORESOURCE_DMA, - }, - /* RX event */ - { - .name = "rx", - .start = DAVINCI_DA830_DMA_MCASP2_AREVT, - .end = DAVINCI_DA830_DMA_MCASP2_AREVT, - .flags = IORESOURCE_DMA, - }, - { - .name = "common", - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da830_mcasp2_device = { - .name = "davinci-mcasp", - .id = 2, - .num_resources = ARRAY_SIZE(da830_mcasp2_resources), - .resource = da830_mcasp2_resources, -}; - -static struct resource da850_mcasp_resources[] = { - { - .name = "mpu", - .start = DAVINCI_DA8XX_MCASP0_REG_BASE, - .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1, - .flags = IORESOURCE_MEM, - }, - /* TX event */ - { - .name = "tx", - .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, - .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, - .flags = IORESOURCE_DMA, - }, - /* RX event */ - { - .name = "rx", - .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT, - .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT, - .flags = IORESOURCE_DMA, - }, - { - .name = "common", - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da850_mcasp_device = { - .name = "davinci-mcasp", - .id = 0, - .num_resources = ARRAY_SIZE(da850_mcasp_resources), - .resource = da850_mcasp_resources, -}; - -void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) -{ - struct platform_device *pdev; - - switch (id) { - case 0: - /* Valid for DA830/OMAP-L137 or DA850/OMAP-L138 */ - pdev = &da850_mcasp_device; - break; - case 1: - /* Valid for DA830/OMAP-L137 only */ - if (!cpu_is_davinci_da830()) - return; - pdev = &da830_mcasp1_device; - break; - case 2: - /* Valid for DA830/OMAP-L137 only */ - if (!cpu_is_davinci_da830()) - return; - pdev = &da830_mcasp2_device; - break; - default: - return; - } - - pdev->dev.platform_data = pdata; - platform_device_register(pdev); -} - -static struct resource da8xx_pruss_resources[] = { - { - .start = DA8XX_PRUSS_MEM_BASE, - .end = DA8XX_PRUSS_MEM_BASE + 0xFFFF, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT0), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT0), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT1), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT1), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT2), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT2), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT3), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT3), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT4), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT4), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT5), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT5), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT6), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT6), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT7), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT7), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct uio_pruss_pdata da8xx_uio_pruss_pdata = { - .pintc_base = 0x4000, -}; - -static struct platform_device da8xx_uio_pruss_dev = { - .name = "pruss_uio", - .id = -1, - .num_resources = ARRAY_SIZE(da8xx_pruss_resources), - .resource = da8xx_pruss_resources, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &da8xx_uio_pruss_pdata, - } -}; - -int __init da8xx_register_uio_pruss(void) -{ - da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool(); - return platform_device_register(&da8xx_uio_pruss_dev); -} - -static struct lcd_ctrl_config lcd_cfg = { - .panel_shade = COLOR_ACTIVE, - .bpp = 16, -}; - -struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = { - .manu_name = "sharp", - .controller_data = &lcd_cfg, - .type = "Sharp_LCD035Q3DG01", -}; - -struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = { - .manu_name = "sharp", - .controller_data = &lcd_cfg, - .type = "Sharp_LK043T1DG01", -}; - -static struct resource da8xx_lcdc_resources[] = { - [0] = { /* registers */ - .start = DA8XX_LCD_CNTRL_BASE, - .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { /* interrupt */ - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_LCDINT), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_LCDINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da8xx_lcdc_device = { - .name = "da8xx_lcdc", - .id = 0, - .num_resources = ARRAY_SIZE(da8xx_lcdc_resources), - .resource = da8xx_lcdc_resources, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata) -{ - da8xx_lcdc_device.dev.platform_data = pdata; - return platform_device_register(&da8xx_lcdc_device); -} - -static struct resource da8xx_gpio_resources[] = { - { /* registers */ - .start = DA8XX_GPIO_BASE, - .end = DA8XX_GPIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { /* interrupt */ - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO0), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO0), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO1), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO1), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO2), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO2), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO3), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO3), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO4), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO4), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO5), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO5), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO6), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO6), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO7), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO7), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO8), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO8), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da8xx_gpio_device = { - .name = "davinci_gpio", - .id = -1, - .num_resources = ARRAY_SIZE(da8xx_gpio_resources), - .resource = da8xx_gpio_resources, -}; - -int __init da8xx_register_gpio(void *pdata) -{ - da8xx_gpio_device.dev.platform_data = pdata; - return platform_device_register(&da8xx_gpio_device); -} - -static struct resource da8xx_mmcsd0_resources[] = { - { /* registers */ - .start = DA8XX_MMCSD0_BASE, - .end = DA8XX_MMCSD0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { /* interrupt */ - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MMCSDINT0), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_MMCSDINT0), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da8xx_mmcsd0_device = { - .name = "da830-mmc", - .id = 0, - .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources), - .resource = da8xx_mmcsd0_resources, -}; - -int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config) -{ - da8xx_mmcsd0_device.dev.platform_data = config; - return platform_device_register(&da8xx_mmcsd0_device); -} - -#ifdef CONFIG_ARCH_DAVINCI_DA850 -static struct resource da850_mmcsd1_resources[] = { - { /* registers */ - .start = DA850_MMCSD1_BASE, - .end = DA850_MMCSD1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { /* interrupt */ - .start = DAVINCI_INTC_IRQ(IRQ_DA850_MMCSDINT0_1), - .end = DAVINCI_INTC_IRQ(IRQ_DA850_MMCSDINT0_1), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da850_mmcsd1_device = { - .name = "da830-mmc", - .id = 1, - .num_resources = ARRAY_SIZE(da850_mmcsd1_resources), - .resource = da850_mmcsd1_resources, -}; - -int __init da850_register_mmcsd1(struct davinci_mmc_config *config) -{ - da850_mmcsd1_device.dev.platform_data = config; - return platform_device_register(&da850_mmcsd1_device); -} -#endif - -static struct resource da8xx_rproc_resources[] = { - { /* DSP boot address */ - .name = "host1cfg", - .start = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG, - .end = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG + 3, - .flags = IORESOURCE_MEM, - }, - { /* DSP interrupt registers */ - .name = "chipsig", - .start = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG, - .end = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG + 7, - .flags = IORESOURCE_MEM, - }, - { /* DSP L2 RAM */ - .name = "l2sram", - .start = DA8XX_DSP_L2_RAM_BASE, - .end = DA8XX_DSP_L2_RAM_BASE + SZ_256K - 1, - .flags = IORESOURCE_MEM, - }, - { /* DSP L1P RAM */ - .name = "l1pram", - .start = DA8XX_DSP_L1P_RAM_BASE, - .end = DA8XX_DSP_L1P_RAM_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, - { /* DSP L1D RAM */ - .name = "l1dram", - .start = DA8XX_DSP_L1D_RAM_BASE, - .end = DA8XX_DSP_L1D_RAM_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, - { /* dsp irq */ - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CHIPINT0), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_CHIPINT0), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da8xx_dsp = { - .name = "davinci-rproc", - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(da8xx_rproc_resources), - .resource = da8xx_rproc_resources, -}; - -static bool rproc_mem_inited __initdata; - -#if IS_ENABLED(CONFIG_DA8XX_REMOTEPROC) - -static phys_addr_t rproc_base __initdata; -static unsigned long rproc_size __initdata; - -static int __init early_rproc_mem(char *p) -{ - char *endp; - - if (p == NULL) - return 0; - - rproc_size = memparse(p, &endp); - if (*endp == '@') - rproc_base = memparse(endp + 1, NULL); - - return 0; -} -early_param("rproc_mem", early_rproc_mem); - -void __init da8xx_rproc_reserve_cma(void) -{ - struct cma *cma; - int ret; - - if (!rproc_base || !rproc_size) { - pr_err("%s: 'rproc_mem=nn@address' badly specified\n" - " 'nn' and 'address' must both be non-zero\n", - __func__); - - return; - } - - pr_info("%s: reserving 0x%lx @ 0x%lx...\n", - __func__, rproc_size, (unsigned long)rproc_base); - - ret = dma_contiguous_reserve_area(rproc_size, rproc_base, 0, &cma, - true); - if (ret) { - pr_err("%s: dma_contiguous_reserve_area failed %d\n", - __func__, ret); - return; - } - da8xx_dsp.dev.cma_area = cma; - rproc_mem_inited = true; -} -#else - -void __init da8xx_rproc_reserve_cma(void) -{ -} - -#endif - -int __init da8xx_register_rproc(void) -{ - int ret; - - if (!rproc_mem_inited) { - pr_warn("%s: memory not reserved for DSP, not registering DSP device\n", - __func__); - return -ENOMEM; - } - - ret = platform_device_register(&da8xx_dsp); - if (ret) - pr_err("%s: can't register DSP device: %d\n", __func__, ret); - - return ret; -}; - -static struct resource da8xx_rtc_resources[] = { - { - .start = DA8XX_RTC_BASE, - .end = DA8XX_RTC_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { /* timer irq */ - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC), - .flags = IORESOURCE_IRQ, - }, - { /* alarm irq */ - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da8xx_rtc_device = { - .name = "da830-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(da8xx_rtc_resources), - .resource = da8xx_rtc_resources, -}; - -int da8xx_register_rtc(void) -{ - return platform_device_register(&da8xx_rtc_device); -} - static void __iomem *da8xx_ddr2_ctlr_base; void __iomem * __init da8xx_get_mem_ctlr(void) { @@ -974,192 +68,3 @@ void __iomem * __init da8xx_get_mem_ctlr(void) return da8xx_ddr2_ctlr_base; } - -static struct resource da8xx_cpuidle_resources[] = { - { - .start = DA8XX_DDR2_CTL_BASE, - .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -/* DA8XX devices support DDR2 power down */ -static struct davinci_cpuidle_config da8xx_cpuidle_pdata = { - .ddr2_pdown = 1, -}; - - -static struct platform_device da8xx_cpuidle_device = { - .name = "cpuidle-davinci", - .num_resources = ARRAY_SIZE(da8xx_cpuidle_resources), - .resource = da8xx_cpuidle_resources, - .dev = { - .platform_data = &da8xx_cpuidle_pdata, - }, -}; - -int __init da8xx_register_cpuidle(void) -{ - da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr(); - - return platform_device_register(&da8xx_cpuidle_device); -} - -static struct resource da8xx_spi0_resources[] = { - [0] = { - .start = DA8XX_SPI0_BASE, - .end = DA8XX_SPI0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT0), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT0), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource da8xx_spi1_resources[] = { - [0] = { - .start = DA830_SPI1_BASE, - .end = DA830_SPI1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT1), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT1), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct davinci_spi_platform_data da8xx_spi_pdata[] = { - [0] = { - .version = SPI_VERSION_2, - .intr_line = 1, - .dma_event_q = EVENTQ_0, - .prescaler_limit = 2, - }, - [1] = { - .version = SPI_VERSION_2, - .intr_line = 1, - .dma_event_q = EVENTQ_0, - .prescaler_limit = 2, - }, -}; - -static struct platform_device da8xx_spi_device[] = { - [0] = { - .name = "spi_davinci", - .id = 0, - .num_resources = ARRAY_SIZE(da8xx_spi0_resources), - .resource = da8xx_spi0_resources, - .dev = { - .platform_data = &da8xx_spi_pdata[0], - }, - }, - [1] = { - .name = "spi_davinci", - .id = 1, - .num_resources = ARRAY_SIZE(da8xx_spi1_resources), - .resource = da8xx_spi1_resources, - .dev = { - .platform_data = &da8xx_spi_pdata[1], - }, - }, -}; - -int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect) -{ - if (instance < 0 || instance > 1) - return -EINVAL; - - da8xx_spi_pdata[instance].num_chipselect = num_chipselect; - - if (instance == 1 && cpu_is_davinci_da850()) { - da8xx_spi1_resources[0].start = DA850_SPI1_BASE; - da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1; - } - - return platform_device_register(&da8xx_spi_device[instance]); -} - -#ifdef CONFIG_ARCH_DAVINCI_DA850 -int __init da850_register_sata_refclk(int rate) -{ - struct clk *clk; - - clk = clk_register_fixed_rate(NULL, "sata_refclk", NULL, 0, rate); - if (IS_ERR(clk)) - return PTR_ERR(clk); - - return clk_register_clkdev(clk, "refclk", "ahci_da850"); -} - -static struct resource da850_sata_resources[] = { - { - .start = DA850_SATA_BASE, - .end = DA850_SATA_BASE + 0x1fff, - .flags = IORESOURCE_MEM, - }, - { - .start = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG, - .end = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG + 0x3, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA850_SATAINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 da850_sata_dmamask = DMA_BIT_MASK(32); - -static struct platform_device da850_sata_device = { - .name = "ahci_da850", - .id = -1, - .dev = { - .dma_mask = &da850_sata_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(da850_sata_resources), - .resource = da850_sata_resources, -}; - -int __init da850_register_sata(unsigned long refclkpn) -{ - int ret; - - ret = da850_register_sata_refclk(refclkpn); - if (ret) - return ret; - - return platform_device_register(&da850_sata_device); -} -#endif - -static struct regmap *da8xx_cfgchip; - -static const struct regmap_config da8xx_cfgchip_config __initconst = { - .name = "cfgchip", - .reg_bits = 32, - .val_bits = 32, - .reg_stride = 4, - .max_register = DA8XX_CFGCHIP4_REG - DA8XX_CFGCHIP0_REG, -}; - -/** - * da8xx_get_cfgchip - Lazy gets CFGCHIP as regmap - * - * This is for use on non-DT boards only. For DT boards, use - * syscon_regmap_lookup_by_compatible("ti,da830-cfgchip") - * - * Returns: Pointer to the CFGCHIP regmap or negative error code. - */ -struct regmap * __init da8xx_get_cfgchip(void) -{ - if (IS_ERR_OR_NULL(da8xx_cfgchip)) - da8xx_cfgchip = regmap_init_mmio(NULL, - DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG), - &da8xx_cfgchip_config); - - return da8xx_cfgchip; -} diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c deleted file mode 100644 index 199c26d9a2b6..000000000000 --- a/arch/arm/mach-davinci/devices.c +++ /dev/null @@ -1,303 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * mach-davinci/devices.c - * - * DaVinci platform device setup/initialization - */ - -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/platform_data/i2c-davinci.h> -#include <linux/platform_data/mmc-davinci.h> -#include <linux/platform_data/edma.h> -#include <linux/dma-mapping.h> -#include <linux/io.h> -#include <linux/reboot.h> - -#include "hardware.h" -#include "cputype.h" -#include "mux.h" -#include "davinci.h" -#include "irqs.h" - -#define DAVINCI_I2C_BASE 0x01C21000 -#define DAVINCI_ATA_BASE 0x01C66000 -#define DAVINCI_MMCSD0_BASE 0x01E10000 -#define DM355_MMCSD0_BASE 0x01E11000 -#define DM355_MMCSD1_BASE 0x01E00000 -#define DM365_MMCSD0_BASE 0x01D11000 -#define DM365_MMCSD1_BASE 0x01D00000 - -void __iomem *davinci_sysmod_base; - -void davinci_map_sysmod(void) -{ - davinci_sysmod_base = ioremap(DAVINCI_SYSTEM_MODULE_BASE, - 0x800); - /* - * Throw a bug since a lot of board initialization code depends - * on system module availability. ioremap() failing this early - * need careful looking into anyway. - */ - BUG_ON(!davinci_sysmod_base); -} - -static struct resource i2c_resources[] = { - { - .start = DAVINCI_I2C_BASE, - .end = DAVINCI_I2C_BASE + 0x40, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_I2C), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device davinci_i2c_device = { - .name = "i2c_davinci", - .id = 1, - .num_resources = ARRAY_SIZE(i2c_resources), - .resource = i2c_resources, -}; - -void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata) -{ - if (cpu_is_davinci_dm644x()) - davinci_cfg_reg(DM644X_I2C); - - davinci_i2c_device.dev.platform_data = pdata; - (void) platform_device_register(&davinci_i2c_device); -} - -static struct resource ide_resources[] = { - { - .start = DAVINCI_ATA_BASE, - .end = DAVINCI_ATA_BASE + 0x7ff, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_IDE), - .end = DAVINCI_INTC_IRQ(IRQ_IDE), - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 ide_dma_mask = DMA_BIT_MASK(32); - -static struct platform_device ide_device = { - .name = "palm_bk3710", - .id = -1, - .resource = ide_resources, - .num_resources = ARRAY_SIZE(ide_resources), - .dev = { - .dma_mask = &ide_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init davinci_init_ide(void) -{ - if (cpu_is_davinci_dm644x()) { - davinci_cfg_reg(DM644X_HPIEN_DISABLE); - davinci_cfg_reg(DM644X_ATAEN); - davinci_cfg_reg(DM644X_HDIREN); - } else if (cpu_is_davinci_dm646x()) { - /* IRQ_DM646X_IDE is the same as IRQ_IDE */ - davinci_cfg_reg(DM646X_ATAEN); - } else { - WARN_ON(1); - return; - } - - platform_device_register(&ide_device); -} - -#if IS_ENABLED(CONFIG_MMC_DAVINCI) - -static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32); - -static struct resource mmcsd0_resources[] = { - { - /* different on dm355 */ - .start = DAVINCI_MMCSD0_BASE, - .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - /* IRQs: MMC/SD, then SDIO */ - { - .start = DAVINCI_INTC_IRQ(IRQ_MMCINT), - .flags = IORESOURCE_IRQ, - }, { - /* different on dm355 */ - .start = DAVINCI_INTC_IRQ(IRQ_SDIOINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device davinci_mmcsd0_device = { - .name = "dm6441-mmc", - .id = 0, - .dev = { - .dma_mask = &mmcsd0_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(mmcsd0_resources), - .resource = mmcsd0_resources, -}; - -static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32); - -static struct resource mmcsd1_resources[] = { - { - .start = DM355_MMCSD1_BASE, - .end = DM355_MMCSD1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - /* IRQs: MMC/SD, then SDIO */ - { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1), - .flags = IORESOURCE_IRQ, - }, { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device davinci_mmcsd1_device = { - .name = "dm6441-mmc", - .id = 1, - .dev = { - .dma_mask = &mmcsd1_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(mmcsd1_resources), - .resource = mmcsd1_resources, -}; - - -void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) -{ - struct platform_device *pdev = NULL; - - if (WARN_ON(cpu_is_davinci_dm646x())) - return; - - /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too; - * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused. - * - * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are - * not handled right here ... - */ - switch (module) { - case 1: - if (cpu_is_davinci_dm355()) { - /* REVISIT we may not need all these pins if e.g. this - * is a hard-wired SDIO device... - */ - davinci_cfg_reg(DM355_SD1_CMD); - davinci_cfg_reg(DM355_SD1_CLK); - davinci_cfg_reg(DM355_SD1_DATA0); - davinci_cfg_reg(DM355_SD1_DATA1); - davinci_cfg_reg(DM355_SD1_DATA2); - davinci_cfg_reg(DM355_SD1_DATA3); - } else if (cpu_is_davinci_dm365()) { - /* Configure pull down control */ - unsigned v; - - v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); - __raw_writel(v & ~0xfc0, - DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); - - mmcsd1_resources[0].start = DM365_MMCSD1_BASE; - mmcsd1_resources[0].end = DM365_MMCSD1_BASE + - SZ_4K - 1; - mmcsd1_resources[2].start = DAVINCI_INTC_IRQ( - IRQ_DM365_SDIOINT1); - davinci_mmcsd1_device.name = "da830-mmc"; - } else - break; - - pdev = &davinci_mmcsd1_device; - break; - case 0: - if (cpu_is_davinci_dm355()) { - mmcsd0_resources[0].start = DM355_MMCSD0_BASE; - mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1; - mmcsd0_resources[2].start = DAVINCI_INTC_IRQ( - IRQ_DM355_SDIOINT0); - - /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */ - davinci_cfg_reg(DM355_MMCSD0); - - /* enable RX EDMA */ - davinci_cfg_reg(DM355_EVT26_MMC0_RX); - } else if (cpu_is_davinci_dm365()) { - mmcsd0_resources[0].start = DM365_MMCSD0_BASE; - mmcsd0_resources[0].end = DM365_MMCSD0_BASE + - SZ_4K - 1; - mmcsd0_resources[2].start = DAVINCI_INTC_IRQ( - IRQ_DM365_SDIOINT0); - davinci_mmcsd0_device.name = "da830-mmc"; - } else if (cpu_is_davinci_dm644x()) { - /* REVISIT: should this be in board-init code? */ - /* Power-on 3.3V IO cells */ - __raw_writel(0, - DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); - /*Set up the pull regiter for MMC */ - davinci_cfg_reg(DM644X_MSTK); - } - - pdev = &davinci_mmcsd0_device; - break; - } - - if (WARN_ON(!pdev)) - return; - - pdev->dev.platform_data = config; - platform_device_register(pdev); -} - -#else - -void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) -{ -} - -#endif - -/*-------------------------------------------------------------------------*/ - -static struct resource wdt_resources[] = { - { - .start = DAVINCI_WDOG_BASE, - .end = DAVINCI_WDOG_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device davinci_wdt_device = { - .name = "davinci-wdt", - .id = -1, - .num_resources = ARRAY_SIZE(wdt_resources), - .resource = wdt_resources, -}; - -int davinci_init_wdt(void) -{ - return platform_device_register(&davinci_wdt_device); -} - -static struct platform_device davinci_gpio_device = { - .name = "davinci_gpio", - .id = -1, -}; - -int davinci_gpio_register(struct resource *res, int size, void *pdata) -{ - davinci_gpio_device.resource = res; - davinci_gpio_device.num_resources = size; - davinci_gpio_device.dev.platform_data = pdata; - return platform_device_register(&davinci_gpio_device); -} diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c deleted file mode 100644 index a12ba859beca..000000000000 --- a/arch/arm/mach-davinci/dm355.c +++ /dev/null @@ -1,832 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * TI DaVinci DM355 chip specific setup - * - * Author: Kevin Hilman, Deep Root Systems, LLC - * - * 2007 (c) Deep Root Systems, LLC. - */ - -#include <linux/clk-provider.h> -#include <linux/clk/davinci.h> -#include <linux/clkdev.h> -#include <linux/dma-mapping.h> -#include <linux/dmaengine.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/irqchip/irq-davinci-aintc.h> -#include <linux/platform_data/edma.h> -#include <linux/platform_data/gpio-davinci.h> -#include <linux/platform_data/spi-davinci.h> -#include <linux/platform_device.h> -#include <linux/serial_8250.h> -#include <linux/spi/spi.h> - -#include <clocksource/timer-davinci.h> - -#include <asm/mach/map.h> - -#include "common.h" -#include "cputype.h" -#include "serial.h" -#include "asp.h" -#include "davinci.h" -#include "irqs.h" -#include "mux.h" - -#define DM355_UART2_BASE (IO_PHYS + 0x206000) -#define DM355_OSD_BASE (IO_PHYS + 0x70200) -#define DM355_VENC_BASE (IO_PHYS + 0x70400) - -/* - * Device specific clocks - */ -#define DM355_REF_FREQ 24000000 /* 24 or 36 MHz */ - -static u64 dm355_spi0_dma_mask = DMA_BIT_MASK(32); - -static struct resource dm355_spi0_resources[] = { - { - .start = 0x01c66000, - .end = 0x01c667ff, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_SPINT0_0), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct davinci_spi_platform_data dm355_spi0_pdata = { - .version = SPI_VERSION_1, - .num_chipselect = 2, - .cshold_bug = true, - .dma_event_q = EVENTQ_1, - .prescaler_limit = 1, -}; -static struct platform_device dm355_spi0_device = { - .name = "spi_davinci", - .id = 0, - .dev = { - .dma_mask = &dm355_spi0_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &dm355_spi0_pdata, - }, - .num_resources = ARRAY_SIZE(dm355_spi0_resources), - .resource = dm355_spi0_resources, -}; - -void __init dm355_init_spi0(unsigned chipselect_mask, - const struct spi_board_info *info, unsigned len) -{ - /* for now, assume we need MISO */ - davinci_cfg_reg(DM355_SPI0_SDI); - - /* not all slaves will be wired up */ - if (chipselect_mask & BIT(0)) - davinci_cfg_reg(DM355_SPI0_SDENA0); - if (chipselect_mask & BIT(1)) - davinci_cfg_reg(DM355_SPI0_SDENA1); - - spi_register_board_info(info, len); - - platform_device_register(&dm355_spi0_device); -} - -/*----------------------------------------------------------------------*/ - -#define INTMUX 0x18 -#define EVTMUX 0x1c - -/* - * Device specific mux setup - * - * soc description mux mode mode mux dbg - * reg offset mask mode - */ -static const struct mux_config dm355_pins[] = { -#ifdef CONFIG_DAVINCI_MUX -MUX_CFG(DM355, MMCSD0, 4, 2, 1, 0, false) - -MUX_CFG(DM355, SD1_CLK, 3, 6, 1, 1, false) -MUX_CFG(DM355, SD1_CMD, 3, 7, 1, 1, false) -MUX_CFG(DM355, SD1_DATA3, 3, 8, 3, 1, false) -MUX_CFG(DM355, SD1_DATA2, 3, 10, 3, 1, false) -MUX_CFG(DM355, SD1_DATA1, 3, 12, 3, 1, false) -MUX_CFG(DM355, SD1_DATA0, 3, 14, 3, 1, false) - -MUX_CFG(DM355, I2C_SDA, 3, 19, 1, 1, false) -MUX_CFG(DM355, I2C_SCL, 3, 20, 1, 1, false) - -MUX_CFG(DM355, MCBSP0_BDX, 3, 0, 1, 1, false) -MUX_CFG(DM355, MCBSP0_X, 3, 1, 1, 1, false) -MUX_CFG(DM355, MCBSP0_BFSX, 3, 2, 1, 1, false) -MUX_CFG(DM355, MCBSP0_BDR, 3, 3, 1, 1, false) -MUX_CFG(DM355, MCBSP0_R, 3, 4, 1, 1, false) -MUX_CFG(DM355, MCBSP0_BFSR, 3, 5, 1, 1, false) - -MUX_CFG(DM355, SPI0_SDI, 4, 1, 1, 0, false) -MUX_CFG(DM355, SPI0_SDENA0, 4, 0, 1, 0, false) -MUX_CFG(DM355, SPI0_SDENA1, 3, 28, 1, 1, false) - -INT_CFG(DM355, INT_EDMA_CC, 2, 1, 1, false) -INT_CFG(DM355, INT_EDMA_TC0_ERR, 3, 1, 1, false) -INT_CFG(DM355, INT_EDMA_TC1_ERR, 4, 1, 1, false) - -EVT_CFG(DM355, EVT8_ASP1_TX, 0, 1, 0, false) -EVT_CFG(DM355, EVT9_ASP1_RX, 1, 1, 0, false) -EVT_CFG(DM355, EVT26_MMC0_RX, 2, 1, 0, false) - -MUX_CFG(DM355, VOUT_FIELD, 1, 18, 3, 1, false) -MUX_CFG(DM355, VOUT_FIELD_G70, 1, 18, 3, 0, false) -MUX_CFG(DM355, VOUT_HVSYNC, 1, 16, 1, 0, false) -MUX_CFG(DM355, VOUT_COUTL_EN, 1, 0, 0xff, 0x55, false) -MUX_CFG(DM355, VOUT_COUTH_EN, 1, 8, 0xff, 0x55, false) - -MUX_CFG(DM355, VIN_PCLK, 0, 14, 1, 1, false) -MUX_CFG(DM355, VIN_CAM_WEN, 0, 13, 1, 1, false) -MUX_CFG(DM355, VIN_CAM_VD, 0, 12, 1, 1, false) -MUX_CFG(DM355, VIN_CAM_HD, 0, 11, 1, 1, false) -MUX_CFG(DM355, VIN_YIN_EN, 0, 10, 1, 1, false) -MUX_CFG(DM355, VIN_CINL_EN, 0, 0, 0xff, 0x55, false) -MUX_CFG(DM355, VIN_CINH_EN, 0, 8, 3, 3, false) -#endif -}; - -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { - [IRQ_DM355_CCDC_VDINT0] = 2, - [IRQ_DM355_CCDC_VDINT1] = 6, - [IRQ_DM355_CCDC_VDINT2] = 6, - [IRQ_DM355_IPIPE_HST] = 6, - [IRQ_DM355_H3AINT] = 6, - [IRQ_DM355_IPIPE_SDR] = 6, - [IRQ_DM355_IPIPEIFINT] = 6, - [IRQ_DM355_OSDINT] = 7, - [IRQ_DM355_VENCINT] = 6, - [IRQ_ASQINT] = 6, - [IRQ_IMXINT] = 6, - [IRQ_USBINT] = 4, - [IRQ_DM355_RTOINT] = 4, - [IRQ_DM355_UARTINT2] = 7, - [IRQ_DM355_TINT6] = 7, - [IRQ_CCINT0] = 5, /* dma */ - [IRQ_CCERRINT] = 5, /* dma */ - [IRQ_TCERRINT0] = 5, /* dma */ - [IRQ_TCERRINT] = 5, /* dma */ - [IRQ_DM355_SPINT2_1] = 7, - [IRQ_DM355_TINT7] = 4, - [IRQ_DM355_SDIOINT0] = 7, - [IRQ_MBXINT] = 7, - [IRQ_MBRINT] = 7, - [IRQ_MMCINT] = 7, - [IRQ_DM355_MMCINT1] = 7, - [IRQ_DM355_PWMINT3] = 7, - [IRQ_DDRINT] = 7, - [IRQ_AEMIFINT] = 7, - [IRQ_DM355_SDIOINT1] = 4, - [IRQ_TINT0_TINT12] = 2, /* clockevent */ - [IRQ_TINT0_TINT34] = 2, /* clocksource */ - [IRQ_TINT1_TINT12] = 7, /* DSP timer */ - [IRQ_TINT1_TINT34] = 7, /* system tick */ - [IRQ_PWMINT0] = 7, - [IRQ_PWMINT1] = 7, - [IRQ_PWMINT2] = 7, - [IRQ_I2C] = 3, - [IRQ_UARTINT0] = 3, - [IRQ_UARTINT1] = 3, - [IRQ_DM355_SPINT0_0] = 3, - [IRQ_DM355_SPINT0_1] = 3, - [IRQ_DM355_GPIO0] = 3, - [IRQ_DM355_GPIO1] = 7, - [IRQ_DM355_GPIO2] = 4, - [IRQ_DM355_GPIO3] = 4, - [IRQ_DM355_GPIO4] = 7, - [IRQ_DM355_GPIO5] = 7, - [IRQ_DM355_GPIO6] = 7, - [IRQ_DM355_GPIO7] = 7, - [IRQ_DM355_GPIO8] = 7, - [IRQ_DM355_GPIO9] = 7, - [IRQ_DM355_GPIOBNK0] = 7, - [IRQ_DM355_GPIOBNK1] = 7, - [IRQ_DM355_GPIOBNK2] = 7, - [IRQ_DM355_GPIOBNK3] = 7, - [IRQ_DM355_GPIOBNK4] = 7, - [IRQ_DM355_GPIOBNK5] = 7, - [IRQ_DM355_GPIOBNK6] = 7, - [IRQ_COMMTX] = 7, - [IRQ_COMMRX] = 7, - [IRQ_EMUINT] = 7, -}; - -/*----------------------------------------------------------------------*/ - -static s8 queue_priority_mapping[][2] = { - /* {event queue no, Priority} */ - {0, 3}, - {1, 7}, - {-1, -1}, -}; - -static const struct dma_slave_map dm355_edma_map[] = { - { "davinci-mcbsp.0", "tx", EDMA_FILTER_PARAM(0, 2) }, - { "davinci-mcbsp.0", "rx", EDMA_FILTER_PARAM(0, 3) }, - { "davinci-mcbsp.1", "tx", EDMA_FILTER_PARAM(0, 8) }, - { "davinci-mcbsp.1", "rx", EDMA_FILTER_PARAM(0, 9) }, - { "spi_davinci.2", "tx", EDMA_FILTER_PARAM(0, 10) }, - { "spi_davinci.2", "rx", EDMA_FILTER_PARAM(0, 11) }, - { "spi_davinci.1", "tx", EDMA_FILTER_PARAM(0, 14) }, - { "spi_davinci.1", "rx", EDMA_FILTER_PARAM(0, 15) }, - { "spi_davinci.0", "tx", EDMA_FILTER_PARAM(0, 16) }, - { "spi_davinci.0", "rx", EDMA_FILTER_PARAM(0, 17) }, - { "dm6441-mmc.0", "rx", EDMA_FILTER_PARAM(0, 26) }, - { "dm6441-mmc.0", "tx", EDMA_FILTER_PARAM(0, 27) }, - { "dm6441-mmc.1", "rx", EDMA_FILTER_PARAM(0, 30) }, - { "dm6441-mmc.1", "tx", EDMA_FILTER_PARAM(0, 31) }, -}; - -static struct edma_soc_info dm355_edma_pdata = { - .queue_priority_mapping = queue_priority_mapping, - .default_queue = EVENTQ_1, - .slave_map = dm355_edma_map, - .slavecnt = ARRAY_SIZE(dm355_edma_map), -}; - -static struct resource edma_resources[] = { - { - .name = "edma3_cc", - .start = 0x01c00000, - .end = 0x01c00000 + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc0", - .start = 0x01c10000, - .end = 0x01c10000 + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc1", - .start = 0x01c10400, - .end = 0x01c10400 + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_ccint", - .start = DAVINCI_INTC_IRQ(IRQ_CCINT0), - .flags = IORESOURCE_IRQ, - }, - { - .name = "edma3_ccerrint", - .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT), - .flags = IORESOURCE_IRQ, - }, - /* not using (or muxing) TC*_ERR */ -}; - -static const struct platform_device_info dm355_edma_device __initconst = { - .name = "edma", - .id = 0, - .dma_mask = DMA_BIT_MASK(32), - .res = edma_resources, - .num_res = ARRAY_SIZE(edma_resources), - .data = &dm355_edma_pdata, - .size_data = sizeof(dm355_edma_pdata), -}; - -static struct resource dm355_asp1_resources[] = { - { - .name = "mpu", - .start = DAVINCI_ASP1_BASE, - .end = DAVINCI_ASP1_BASE + SZ_8K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_DMA_ASP1_TX, - .end = DAVINCI_DMA_ASP1_TX, - .flags = IORESOURCE_DMA, - }, - { - .start = DAVINCI_DMA_ASP1_RX, - .end = DAVINCI_DMA_ASP1_RX, - .flags = IORESOURCE_DMA, - }, -}; - -static struct platform_device dm355_asp1_device = { - .name = "davinci-mcbsp", - .id = 1, - .num_resources = ARRAY_SIZE(dm355_asp1_resources), - .resource = dm355_asp1_resources, -}; - -static void dm355_ccdc_setup_pinmux(void) -{ - davinci_cfg_reg(DM355_VIN_PCLK); - davinci_cfg_reg(DM355_VIN_CAM_WEN); - davinci_cfg_reg(DM355_VIN_CAM_VD); - davinci_cfg_reg(DM355_VIN_CAM_HD); - davinci_cfg_reg(DM355_VIN_YIN_EN); - davinci_cfg_reg(DM355_VIN_CINL_EN); - davinci_cfg_reg(DM355_VIN_CINH_EN); -} - -static struct resource dm355_vpss_resources[] = { - { - /* VPSS BL Base address */ - .name = "vpss", - .start = 0x01c70800, - .end = 0x01c70800 + 0xff, - .flags = IORESOURCE_MEM, - }, - { - /* VPSS CLK Base address */ - .name = "vpss", - .start = 0x01c70000, - .end = 0x01c70000 + 0xf, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device dm355_vpss_device = { - .name = "vpss", - .id = -1, - .dev.platform_data = "dm355_vpss", - .num_resources = ARRAY_SIZE(dm355_vpss_resources), - .resource = dm355_vpss_resources, -}; - -static struct resource vpfe_resources[] = { - { - .start = DAVINCI_INTC_IRQ(IRQ_VDINT0), - .end = DAVINCI_INTC_IRQ(IRQ_VDINT0), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_VDINT1), - .end = DAVINCI_INTC_IRQ(IRQ_VDINT1), - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); -static struct resource dm355_ccdc_resource[] = { - /* CCDC Base address */ - { - .flags = IORESOURCE_MEM, - .start = 0x01c70600, - .end = 0x01c70600 + 0x1ff, - }, -}; -static struct platform_device dm355_ccdc_dev = { - .name = "dm355_ccdc", - .id = -1, - .num_resources = ARRAY_SIZE(dm355_ccdc_resource), - .resource = dm355_ccdc_resource, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = dm355_ccdc_setup_pinmux, - }, -}; - -static struct platform_device vpfe_capture_dev = { - .name = CAPTURE_DRV_NAME, - .id = -1, - .num_resources = ARRAY_SIZE(vpfe_resources), - .resource = vpfe_resources, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static struct resource dm355_osd_resources[] = { - { - .start = DM355_OSD_BASE, - .end = DM355_OSD_BASE + 0x17f, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device dm355_osd_dev = { - .name = DM355_VPBE_OSD_SUBDEV_NAME, - .id = -1, - .num_resources = ARRAY_SIZE(dm355_osd_resources), - .resource = dm355_osd_resources, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static struct resource dm355_venc_resources[] = { - { - .start = DAVINCI_INTC_IRQ(IRQ_VENCINT), - .end = DAVINCI_INTC_IRQ(IRQ_VENCINT), - .flags = IORESOURCE_IRQ, - }, - /* venc registers io space */ - { - .start = DM355_VENC_BASE, - .end = DM355_VENC_BASE + 0x17f, - .flags = IORESOURCE_MEM, - }, - /* VDAC config register io space */ - { - .start = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG, - .end = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG + 3, - .flags = IORESOURCE_MEM, - }, -}; - -static struct resource dm355_v4l2_disp_resources[] = { - { - .start = DAVINCI_INTC_IRQ(IRQ_VENCINT), - .end = DAVINCI_INTC_IRQ(IRQ_VENCINT), - .flags = IORESOURCE_IRQ, - }, - /* venc registers io space */ - { - .start = DM355_VENC_BASE, - .end = DM355_VENC_BASE + 0x17f, - .flags = IORESOURCE_MEM, - }, -}; - -static int dm355_vpbe_setup_pinmux(u32 if_type, int field) -{ - switch (if_type) { - case MEDIA_BUS_FMT_SGRBG8_1X8: - davinci_cfg_reg(DM355_VOUT_FIELD_G70); - break; - case MEDIA_BUS_FMT_YUYV10_1X20: - if (field) - davinci_cfg_reg(DM355_VOUT_FIELD); - else - davinci_cfg_reg(DM355_VOUT_FIELD_G70); - break; - default: - return -EINVAL; - } - - davinci_cfg_reg(DM355_VOUT_COUTL_EN); - davinci_cfg_reg(DM355_VOUT_COUTH_EN); - - return 0; -} - -static int dm355_venc_setup_clock(enum vpbe_enc_timings_type type, - unsigned int pclock) -{ - void __iomem *vpss_clk_ctrl_reg; - - vpss_clk_ctrl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL); - - switch (type) { - case VPBE_ENC_STD: - writel(VPSS_DACCLKEN_ENABLE | VPSS_VENCCLKEN_ENABLE, - vpss_clk_ctrl_reg); - break; - case VPBE_ENC_DV_TIMINGS: - if (pclock > 27000000) - /* - * For HD, use external clock source since we cannot - * support HD mode with internal clocks. - */ - writel(VPSS_MUXSEL_EXTCLK_ENABLE, vpss_clk_ctrl_reg); - break; - default: - return -EINVAL; - } - - return 0; -} - -static struct platform_device dm355_vpbe_display = { - .name = "vpbe-v4l2", - .id = -1, - .num_resources = ARRAY_SIZE(dm355_v4l2_disp_resources), - .resource = dm355_v4l2_disp_resources, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static struct venc_platform_data dm355_venc_pdata = { - .setup_pinmux = dm355_vpbe_setup_pinmux, - .setup_clock = dm355_venc_setup_clock, -}; - -static struct platform_device dm355_venc_dev = { - .name = DM355_VPBE_VENC_SUBDEV_NAME, - .id = -1, - .num_resources = ARRAY_SIZE(dm355_venc_resources), - .resource = dm355_venc_resources, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = (void *)&dm355_venc_pdata, - }, -}; - -static struct platform_device dm355_vpbe_dev = { - .name = "vpbe_controller", - .id = -1, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static struct resource dm355_gpio_resources[] = { - { /* registers */ - .start = DAVINCI_GPIO_BASE, - .end = DAVINCI_GPIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { /* interrupt */ - .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK0), - .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK0), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK1), - .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK1), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK2), - .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK2), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK3), - .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK3), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK4), - .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK4), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK5), - .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK5), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK6), - .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK6), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct davinci_gpio_platform_data dm355_gpio_platform_data = { - .no_auto_base = true, - .base = 0, - .ngpio = 104, -}; - -int __init dm355_gpio_register(void) -{ - return davinci_gpio_register(dm355_gpio_resources, - ARRAY_SIZE(dm355_gpio_resources), - &dm355_gpio_platform_data); -} -/*----------------------------------------------------------------------*/ - -static struct map_desc dm355_io_desc[] = { - { - .virtual = IO_VIRT, - .pfn = __phys_to_pfn(IO_PHYS), - .length = IO_SIZE, - .type = MT_DEVICE - }, -}; - -/* Contents of JTAG ID register used to identify exact cpu type */ -static struct davinci_id dm355_ids[] = { - { - .variant = 0x0, - .part_no = 0xb73b, - .manufacturer = 0x00f, - .cpu_id = DAVINCI_CPU_ID_DM355, - .name = "dm355", - }, -}; - -/* - * Bottom half of timer0 is used for clockevent, top half is used for - * clocksource. - */ -static const struct davinci_timer_cfg dm355_timer_cfg = { - .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_4K), - .irq = { - DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12)), - DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34)), - }, -}; - -static struct plat_serial8250_port dm355_serial0_platform_data[] = { - { - .mapbase = DAVINCI_UART0_BASE, - .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0), - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | - UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 2, - }, - { - .flags = 0, - } -}; -static struct plat_serial8250_port dm355_serial1_platform_data[] = { - { - .mapbase = DAVINCI_UART1_BASE, - .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1), - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | - UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 2, - }, - { - .flags = 0, - } -}; -static struct plat_serial8250_port dm355_serial2_platform_data[] = { - { - .mapbase = DM355_UART2_BASE, - .irq = DAVINCI_INTC_IRQ(IRQ_DM355_UARTINT2), - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | - UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 2, - }, - { - .flags = 0, - } -}; - -struct platform_device dm355_serial_device[] = { - { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = dm355_serial0_platform_data, - } - }, - { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM1, - .dev = { - .platform_data = dm355_serial1_platform_data, - } - }, - { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM2, - .dev = { - .platform_data = dm355_serial2_platform_data, - } - }, - { - } -}; - -static const struct davinci_soc_info davinci_soc_info_dm355 = { - .io_desc = dm355_io_desc, - .io_desc_num = ARRAY_SIZE(dm355_io_desc), - .jtag_id_reg = 0x01c40028, - .ids = dm355_ids, - .ids_num = ARRAY_SIZE(dm355_ids), - .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, - .pinmux_pins = dm355_pins, - .pinmux_pins_num = ARRAY_SIZE(dm355_pins), - .sram_dma = 0x00010000, - .sram_len = SZ_32K, -}; - -void __init dm355_init_asp1(u32 evt_enable) -{ - /* we don't use ASP1 IRQs, or we'd need to mux them ... */ - if (evt_enable & ASP1_TX_EVT_EN) - davinci_cfg_reg(DM355_EVT8_ASP1_TX); - - if (evt_enable & ASP1_RX_EVT_EN) - davinci_cfg_reg(DM355_EVT9_ASP1_RX); - - platform_device_register(&dm355_asp1_device); -} - -void __init dm355_init(void) -{ - davinci_common_init(&davinci_soc_info_dm355); - davinci_map_sysmod(); -} - -void __init dm355_init_time(void) -{ - void __iomem *pll1, *psc; - struct clk *clk; - int rv; - - clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM355_REF_FREQ); - - pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); - dm355_pll1_init(NULL, pll1, NULL); - - psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K); - dm355_psc_init(NULL, psc); - - clk = clk_get(NULL, "timer0"); - if (WARN_ON(IS_ERR(clk))) { - pr_err("Unable to get the timer clock\n"); - return; - } - - rv = davinci_timer_register(clk, &dm355_timer_cfg); - WARN(rv, "Unable to register the timer: %d\n", rv); -} - -static struct resource dm355_pll2_resources[] = { - { - .start = DAVINCI_PLL2_BASE, - .end = DAVINCI_PLL2_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device dm355_pll2_device = { - .name = "dm355-pll2", - .id = -1, - .resource = dm355_pll2_resources, - .num_resources = ARRAY_SIZE(dm355_pll2_resources), -}; - -void __init dm355_register_clocks(void) -{ - /* PLL1 and PSC are registered in dm355_init_time() */ - platform_device_register(&dm355_pll2_device); -} - -int __init dm355_init_video(struct vpfe_config *vpfe_cfg, - struct vpbe_config *vpbe_cfg) -{ - if (vpfe_cfg || vpbe_cfg) - platform_device_register(&dm355_vpss_device); - - if (vpfe_cfg) { - vpfe_capture_dev.dev.platform_data = vpfe_cfg; - platform_device_register(&dm355_ccdc_dev); - platform_device_register(&vpfe_capture_dev); - } - - if (vpbe_cfg) { - dm355_vpbe_dev.dev.platform_data = vpbe_cfg; - platform_device_register(&dm355_osd_dev); - platform_device_register(&dm355_venc_dev); - platform_device_register(&dm355_vpbe_dev); - platform_device_register(&dm355_vpbe_display); - } - - return 0; -} - -static const struct davinci_aintc_config dm355_aintc_config = { - .reg = { - .start = DAVINCI_ARM_INTC_BASE, - .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .num_irqs = 64, - .prios = dm355_default_priorities, -}; - -void __init dm355_init_irq(void) -{ - davinci_aintc_init(&dm355_aintc_config); -} - -static int __init dm355_init_devices(void) -{ - struct platform_device *edma_pdev; - int ret = 0; - - if (!cpu_is_davinci_dm355()) - return 0; - - davinci_cfg_reg(DM355_INT_EDMA_CC); - edma_pdev = platform_device_register_full(&dm355_edma_device); - if (IS_ERR(edma_pdev)) { - pr_warn("%s: Failed to register eDMA\n", __func__); - return PTR_ERR(edma_pdev); - } - - ret = davinci_init_wdt(); - if (ret) - pr_warn("%s: watchdog init failed: %d\n", __func__, ret); - - return ret; -} -postcore_initcall(dm355_init_devices); diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c deleted file mode 100644 index 7538bb87f373..000000000000 --- a/arch/arm/mach-davinci/dm365.c +++ /dev/null @@ -1,1094 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * TI DaVinci DM365 chip specific setup - * - * Copyright (C) 2009 Texas Instruments - */ - -#include <linux/clk-provider.h> -#include <linux/clk/davinci.h> -#include <linux/clkdev.h> -#include <linux/dma-mapping.h> -#include <linux/dmaengine.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/irqchip/irq-davinci-aintc.h> -#include <linux/platform_data/edma.h> -#include <linux/platform_data/gpio-davinci.h> -#include <linux/platform_data/keyscan-davinci.h> -#include <linux/platform_data/spi-davinci.h> -#include <linux/platform_device.h> -#include <linux/serial_8250.h> -#include <linux/spi/spi.h> - -#include <clocksource/timer-davinci.h> - -#include <asm/mach/map.h> - -#include "common.h" -#include "cputype.h" -#include "serial.h" -#include "asp.h" -#include "davinci.h" -#include "irqs.h" -#include "mux.h" - -#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ -#define DM365_RTC_BASE 0x01c69000 -#define DM365_KEYSCAN_BASE 0x01c69400 -#define DM365_OSD_BASE 0x01c71c00 -#define DM365_VENC_BASE 0x01c71e00 -#define DAVINCI_DM365_VC_BASE 0x01d0c000 -#define DAVINCI_DMA_VC_TX 2 -#define DAVINCI_DMA_VC_RX 3 -#define DM365_EMAC_BASE 0x01d07000 -#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) -#define DM365_EMAC_CNTRL_OFFSET 0x0000 -#define DM365_EMAC_CNTRL_MOD_OFFSET 0x3000 -#define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000 -#define DM365_EMAC_CNTRL_RAM_SIZE 0x2000 - -#define INTMUX 0x18 -#define EVTMUX 0x1c - - -static const struct mux_config dm365_pins[] = { -#ifdef CONFIG_DAVINCI_MUX -MUX_CFG(DM365, MMCSD0, 0, 24, 1, 0, false) - -MUX_CFG(DM365, SD1_CLK, 0, 16, 3, 1, false) -MUX_CFG(DM365, SD1_CMD, 4, 30, 3, 1, false) -MUX_CFG(DM365, SD1_DATA3, 4, 28, 3, 1, false) -MUX_CFG(DM365, SD1_DATA2, 4, 26, 3, 1, false) -MUX_CFG(DM365, SD1_DATA1, 4, 24, 3, 1, false) -MUX_CFG(DM365, SD1_DATA0, 4, 22, 3, 1, false) - -MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false) -MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false) - -MUX_CFG(DM365, AEMIF_AR_A14, 2, 0, 3, 1, false) -MUX_CFG(DM365, AEMIF_AR_BA0, 2, 0, 3, 2, false) -MUX_CFG(DM365, AEMIF_A3, 2, 2, 3, 1, false) -MUX_CFG(DM365, AEMIF_A7, 2, 4, 3, 1, false) -MUX_CFG(DM365, AEMIF_D15_8, 2, 6, 1, 1, false) -MUX_CFG(DM365, AEMIF_CE0, 2, 7, 1, 0, false) -MUX_CFG(DM365, AEMIF_CE1, 2, 8, 1, 0, false) -MUX_CFG(DM365, AEMIF_WE_OE, 2, 9, 1, 0, false) - -MUX_CFG(DM365, MCBSP0_BDX, 0, 23, 1, 1, false) -MUX_CFG(DM365, MCBSP0_X, 0, 22, 1, 1, false) -MUX_CFG(DM365, MCBSP0_BFSX, 0, 21, 1, 1, false) -MUX_CFG(DM365, MCBSP0_BDR, 0, 20, 1, 1, false) -MUX_CFG(DM365, MCBSP0_R, 0, 19, 1, 1, false) -MUX_CFG(DM365, MCBSP0_BFSR, 0, 18, 1, 1, false) - -MUX_CFG(DM365, SPI0_SCLK, 3, 28, 1, 1, false) -MUX_CFG(DM365, SPI0_SDI, 3, 26, 3, 1, false) -MUX_CFG(DM365, SPI0_SDO, 3, 25, 1, 1, false) -MUX_CFG(DM365, SPI0_SDENA0, 3, 29, 3, 1, false) -MUX_CFG(DM365, SPI0_SDENA1, 3, 26, 3, 2, false) - -MUX_CFG(DM365, UART0_RXD, 3, 20, 1, 1, false) -MUX_CFG(DM365, UART0_TXD, 3, 19, 1, 1, false) -MUX_CFG(DM365, UART1_RXD, 3, 17, 3, 2, false) -MUX_CFG(DM365, UART1_TXD, 3, 15, 3, 2, false) -MUX_CFG(DM365, UART1_RTS, 3, 23, 3, 1, false) -MUX_CFG(DM365, UART1_CTS, 3, 21, 3, 1, false) - -MUX_CFG(DM365, EMAC_TX_EN, 3, 17, 3, 1, false) -MUX_CFG(DM365, EMAC_TX_CLK, 3, 15, 3, 1, false) -MUX_CFG(DM365, EMAC_COL, 3, 14, 1, 1, false) -MUX_CFG(DM365, EMAC_TXD3, 3, 13, 1, 1, false) -MUX_CFG(DM365, EMAC_TXD2, 3, 12, 1, 1, false) -MUX_CFG(DM365, EMAC_TXD1, 3, 11, 1, 1, false) -MUX_CFG(DM365, EMAC_TXD0, 3, 10, 1, 1, false) -MUX_CFG(DM365, EMAC_RXD3, 3, 9, 1, 1, false) -MUX_CFG(DM365, EMAC_RXD2, 3, 8, 1, 1, false) -MUX_CFG(DM365, EMAC_RXD1, 3, 7, 1, 1, false) -MUX_CFG(DM365, EMAC_RXD0, 3, 6, 1, 1, false) -MUX_CFG(DM365, EMAC_RX_CLK, 3, 5, 1, 1, false) -MUX_CFG(DM365, EMAC_RX_DV, 3, 4, 1, 1, false) -MUX_CFG(DM365, EMAC_RX_ER, 3, 3, 1, 1, false) -MUX_CFG(DM365, EMAC_CRS, 3, 2, 1, 1, false) -MUX_CFG(DM365, EMAC_MDIO, 3, 1, 1, 1, false) -MUX_CFG(DM365, EMAC_MDCLK, 3, 0, 1, 1, false) - -MUX_CFG(DM365, KEYSCAN, 2, 0, 0x3f, 0x3f, false) - -MUX_CFG(DM365, PWM0, 1, 0, 3, 2, false) -MUX_CFG(DM365, PWM0_G23, 3, 26, 3, 3, false) -MUX_CFG(DM365, PWM1, 1, 2, 3, 2, false) -MUX_CFG(DM365, PWM1_G25, 3, 29, 3, 2, false) -MUX_CFG(DM365, PWM2_G87, 1, 10, 3, 2, false) -MUX_CFG(DM365, PWM2_G88, 1, 8, 3, 2, false) -MUX_CFG(DM365, PWM2_G89, 1, 6, 3, 2, false) -MUX_CFG(DM365, PWM2_G90, 1, 4, 3, 2, false) -MUX_CFG(DM365, PWM3_G80, 1, 20, 3, 3, false) -MUX_CFG(DM365, PWM3_G81, 1, 18, 3, 3, false) -MUX_CFG(DM365, PWM3_G85, 1, 14, 3, 2, false) -MUX_CFG(DM365, PWM3_G86, 1, 12, 3, 2, false) - -MUX_CFG(DM365, SPI1_SCLK, 4, 2, 3, 1, false) -MUX_CFG(DM365, SPI1_SDI, 3, 31, 1, 1, false) -MUX_CFG(DM365, SPI1_SDO, 4, 0, 3, 1, false) -MUX_CFG(DM365, SPI1_SDENA0, 4, 4, 3, 1, false) -MUX_CFG(DM365, SPI1_SDENA1, 4, 0, 3, 2, false) - -MUX_CFG(DM365, SPI2_SCLK, 4, 10, 3, 1, false) -MUX_CFG(DM365, SPI2_SDI, 4, 6, 3, 1, false) -MUX_CFG(DM365, SPI2_SDO, 4, 8, 3, 1, false) -MUX_CFG(DM365, SPI2_SDENA0, 4, 12, 3, 1, false) -MUX_CFG(DM365, SPI2_SDENA1, 4, 8, 3, 2, false) - -MUX_CFG(DM365, SPI3_SCLK, 0, 0, 3, 2, false) -MUX_CFG(DM365, SPI3_SDI, 0, 2, 3, 2, false) -MUX_CFG(DM365, SPI3_SDO, 0, 6, 3, 2, false) -MUX_CFG(DM365, SPI3_SDENA0, 0, 4, 3, 2, false) -MUX_CFG(DM365, SPI3_SDENA1, 0, 6, 3, 3, false) - -MUX_CFG(DM365, SPI4_SCLK, 4, 18, 3, 1, false) -MUX_CFG(DM365, SPI4_SDI, 4, 14, 3, 1, false) -MUX_CFG(DM365, SPI4_SDO, 4, 16, 3, 1, false) -MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 1, false) -MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false) - -MUX_CFG(DM365, CLKOUT0, 4, 20, 3, 3, false) -MUX_CFG(DM365, CLKOUT1, 4, 16, 3, 3, false) -MUX_CFG(DM365, CLKOUT2, 4, 8, 3, 3, false) - -MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false) -MUX_CFG(DM365, GPIO30, 4, 6, 3, 0, false) -MUX_CFG(DM365, GPIO31, 4, 8, 3, 0, false) -MUX_CFG(DM365, GPIO32, 4, 10, 3, 0, false) -MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false) -MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false) -MUX_CFG(DM365, GPIO64_57, 2, 6, 1, 0, false) - -MUX_CFG(DM365, VOUT_FIELD, 1, 18, 3, 1, false) -MUX_CFG(DM365, VOUT_FIELD_G81, 1, 18, 3, 0, false) -MUX_CFG(DM365, VOUT_HVSYNC, 1, 16, 1, 0, false) -MUX_CFG(DM365, VOUT_COUTL_EN, 1, 0, 0xff, 0x55, false) -MUX_CFG(DM365, VOUT_COUTH_EN, 1, 8, 0xff, 0x55, false) -MUX_CFG(DM365, VIN_CAM_WEN, 0, 14, 3, 0, false) -MUX_CFG(DM365, VIN_CAM_VD, 0, 13, 1, 0, false) -MUX_CFG(DM365, VIN_CAM_HD, 0, 12, 1, 0, false) -MUX_CFG(DM365, VIN_YIN4_7_EN, 0, 0, 0xff, 0, false) -MUX_CFG(DM365, VIN_YIN0_3_EN, 0, 8, 0xf, 0, false) - -INT_CFG(DM365, INT_EDMA_CC, 2, 1, 1, false) -INT_CFG(DM365, INT_EDMA_TC0_ERR, 3, 1, 1, false) -INT_CFG(DM365, INT_EDMA_TC1_ERR, 4, 1, 1, false) -INT_CFG(DM365, INT_EDMA_TC2_ERR, 22, 1, 1, false) -INT_CFG(DM365, INT_EDMA_TC3_ERR, 23, 1, 1, false) -INT_CFG(DM365, INT_PRTCSS, 10, 1, 1, false) -INT_CFG(DM365, INT_EMAC_RXTHRESH, 14, 1, 1, false) -INT_CFG(DM365, INT_EMAC_RXPULSE, 15, 1, 1, false) -INT_CFG(DM365, INT_EMAC_TXPULSE, 16, 1, 1, false) -INT_CFG(DM365, INT_EMAC_MISCPULSE, 17, 1, 1, false) -INT_CFG(DM365, INT_IMX0_ENABLE, 0, 1, 0, false) -INT_CFG(DM365, INT_IMX0_DISABLE, 0, 1, 1, false) -INT_CFG(DM365, INT_HDVICP_ENABLE, 0, 1, 1, false) -INT_CFG(DM365, INT_HDVICP_DISABLE, 0, 1, 0, false) -INT_CFG(DM365, INT_IMX1_ENABLE, 24, 1, 1, false) -INT_CFG(DM365, INT_IMX1_DISABLE, 24, 1, 0, false) -INT_CFG(DM365, INT_NSF_ENABLE, 25, 1, 1, false) -INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false) - -EVT_CFG(DM365, EVT2_ASP_TX, 0, 1, 0, false) -EVT_CFG(DM365, EVT3_ASP_RX, 1, 1, 0, false) -EVT_CFG(DM365, EVT2_VC_TX, 0, 1, 1, false) -EVT_CFG(DM365, EVT3_VC_RX, 1, 1, 1, false) -#endif -}; - -static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32); - -static struct davinci_spi_platform_data dm365_spi0_pdata = { - .version = SPI_VERSION_1, - .num_chipselect = 2, - .dma_event_q = EVENTQ_3, - .prescaler_limit = 1, -}; - -static struct resource dm365_spi0_resources[] = { - { - .start = 0x01c66000, - .end = 0x01c667ff, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_SPIINT0_0), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device dm365_spi0_device = { - .name = "spi_davinci", - .id = 0, - .dev = { - .dma_mask = &dm365_spi0_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &dm365_spi0_pdata, - }, - .num_resources = ARRAY_SIZE(dm365_spi0_resources), - .resource = dm365_spi0_resources, -}; - -void __init dm365_init_spi0(unsigned chipselect_mask, - const struct spi_board_info *info, unsigned len) -{ - davinci_cfg_reg(DM365_SPI0_SCLK); - davinci_cfg_reg(DM365_SPI0_SDI); - davinci_cfg_reg(DM365_SPI0_SDO); - - /* not all slaves will be wired up */ - if (chipselect_mask & BIT(0)) - davinci_cfg_reg(DM365_SPI0_SDENA0); - if (chipselect_mask & BIT(1)) - davinci_cfg_reg(DM365_SPI0_SDENA1); - - spi_register_board_info(info, len); - - platform_device_register(&dm365_spi0_device); -} - -static struct resource dm365_gpio_resources[] = { - { /* registers */ - .start = DAVINCI_GPIO_BASE, - .end = DAVINCI_GPIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { /* interrupt */ - .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO0), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO0), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO1), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO1), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO2), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO2), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO3), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO3), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO4), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO4), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO5), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO5), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO6), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO6), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO7), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO7), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct davinci_gpio_platform_data dm365_gpio_platform_data = { - .no_auto_base = true, - .base = 0, - .ngpio = 104, - .gpio_unbanked = 8, -}; - -int __init dm365_gpio_register(void) -{ - return davinci_gpio_register(dm365_gpio_resources, - ARRAY_SIZE(dm365_gpio_resources), - &dm365_gpio_platform_data); -} - -static struct emac_platform_data dm365_emac_pdata = { - .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, - .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, - .ctrl_ram_offset = DM365_EMAC_CNTRL_RAM_OFFSET, - .ctrl_ram_size = DM365_EMAC_CNTRL_RAM_SIZE, - .version = EMAC_VERSION_2, -}; - -static struct resource dm365_emac_resources[] = { - { - .start = DM365_EMAC_BASE, - .end = DM365_EMAC_BASE + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXTHRESH), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXTHRESH), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXPULSE), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXPULSE), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_TXPULSE), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_TXPULSE), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_MISCPULSE), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_MISCPULSE), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device dm365_emac_device = { - .name = "davinci_emac", - .id = 1, - .dev = { - .platform_data = &dm365_emac_pdata, - }, - .num_resources = ARRAY_SIZE(dm365_emac_resources), - .resource = dm365_emac_resources, -}; - -static struct resource dm365_mdio_resources[] = { - { - .start = DM365_EMAC_MDIO_BASE, - .end = DM365_EMAC_MDIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device dm365_mdio_device = { - .name = "davinci_mdio", - .id = 0, - .num_resources = ARRAY_SIZE(dm365_mdio_resources), - .resource = dm365_mdio_resources, -}; - -static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = { - [IRQ_VDINT0] = 2, - [IRQ_VDINT1] = 6, - [IRQ_VDINT2] = 6, - [IRQ_HISTINT] = 6, - [IRQ_H3AINT] = 6, - [IRQ_PRVUINT] = 6, - [IRQ_RSZINT] = 6, - [IRQ_DM365_INSFINT] = 7, - [IRQ_VENCINT] = 6, - [IRQ_ASQINT] = 6, - [IRQ_IMXINT] = 6, - [IRQ_DM365_IMCOPINT] = 4, - [IRQ_USBINT] = 4, - [IRQ_DM365_RTOINT] = 7, - [IRQ_DM365_TINT5] = 7, - [IRQ_DM365_TINT6] = 5, - [IRQ_CCINT0] = 5, - [IRQ_CCERRINT] = 5, - [IRQ_TCERRINT0] = 5, - [IRQ_TCERRINT] = 7, - [IRQ_PSCIN] = 4, - [IRQ_DM365_SPINT2_1] = 7, - [IRQ_DM365_TINT7] = 7, - [IRQ_DM365_SDIOINT0] = 7, - [IRQ_MBXINT] = 7, - [IRQ_MBRINT] = 7, - [IRQ_MMCINT] = 7, - [IRQ_DM365_MMCINT1] = 7, - [IRQ_DM365_PWMINT3] = 7, - [IRQ_AEMIFINT] = 2, - [IRQ_DM365_SDIOINT1] = 2, - [IRQ_TINT0_TINT12] = 7, - [IRQ_TINT0_TINT34] = 7, - [IRQ_TINT1_TINT12] = 7, - [IRQ_TINT1_TINT34] = 7, - [IRQ_PWMINT0] = 7, - [IRQ_PWMINT1] = 3, - [IRQ_PWMINT2] = 3, - [IRQ_I2C] = 3, - [IRQ_UARTINT0] = 3, - [IRQ_UARTINT1] = 3, - [IRQ_DM365_RTCINT] = 3, - [IRQ_DM365_SPIINT0_0] = 3, - [IRQ_DM365_SPIINT3_0] = 3, - [IRQ_DM365_GPIO0] = 3, - [IRQ_DM365_GPIO1] = 7, - [IRQ_DM365_GPIO2] = 4, - [IRQ_DM365_GPIO3] = 4, - [IRQ_DM365_GPIO4] = 7, - [IRQ_DM365_GPIO5] = 7, - [IRQ_DM365_GPIO6] = 7, - [IRQ_DM365_GPIO7] = 7, - [IRQ_DM365_EMAC_RXTHRESH] = 7, - [IRQ_DM365_EMAC_RXPULSE] = 7, - [IRQ_DM365_EMAC_TXPULSE] = 7, - [IRQ_DM365_EMAC_MISCPULSE] = 7, - [IRQ_DM365_GPIO12] = 7, - [IRQ_DM365_GPIO13] = 7, - [IRQ_DM365_GPIO14] = 7, - [IRQ_DM365_GPIO15] = 7, - [IRQ_DM365_KEYINT] = 7, - [IRQ_DM365_TCERRINT2] = 7, - [IRQ_DM365_TCERRINT3] = 7, - [IRQ_DM365_EMUINT] = 7, -}; - -/* Four Transfer Controllers on DM365 */ -static s8 dm365_queue_priority_mapping[][2] = { - /* {event queue no, Priority} */ - {0, 7}, - {1, 7}, - {2, 7}, - {3, 0}, - {-1, -1}, -}; - -static const struct dma_slave_map dm365_edma_map[] = { - { "davinci-mcbsp", "tx", EDMA_FILTER_PARAM(0, 2) }, - { "davinci-mcbsp", "rx", EDMA_FILTER_PARAM(0, 3) }, - { "davinci_voicecodec", "tx", EDMA_FILTER_PARAM(0, 2) }, - { "davinci_voicecodec", "rx", EDMA_FILTER_PARAM(0, 3) }, - { "spi_davinci.2", "tx", EDMA_FILTER_PARAM(0, 10) }, - { "spi_davinci.2", "rx", EDMA_FILTER_PARAM(0, 11) }, - { "spi_davinci.1", "tx", EDMA_FILTER_PARAM(0, 14) }, - { "spi_davinci.1", "rx", EDMA_FILTER_PARAM(0, 15) }, - { "spi_davinci.0", "tx", EDMA_FILTER_PARAM(0, 16) }, - { "spi_davinci.0", "rx", EDMA_FILTER_PARAM(0, 17) }, - { "spi_davinci.3", "tx", EDMA_FILTER_PARAM(0, 18) }, - { "spi_davinci.3", "rx", EDMA_FILTER_PARAM(0, 19) }, - { "da830-mmc.0", "rx", EDMA_FILTER_PARAM(0, 26) }, - { "da830-mmc.0", "tx", EDMA_FILTER_PARAM(0, 27) }, - { "da830-mmc.1", "rx", EDMA_FILTER_PARAM(0, 30) }, - { "da830-mmc.1", "tx", EDMA_FILTER_PARAM(0, 31) }, -}; - -static struct edma_soc_info dm365_edma_pdata = { - .queue_priority_mapping = dm365_queue_priority_mapping, - .default_queue = EVENTQ_3, - .slave_map = dm365_edma_map, - .slavecnt = ARRAY_SIZE(dm365_edma_map), -}; - -static struct resource edma_resources[] = { - { - .name = "edma3_cc", - .start = 0x01c00000, - .end = 0x01c00000 + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc0", - .start = 0x01c10000, - .end = 0x01c10000 + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc1", - .start = 0x01c10400, - .end = 0x01c10400 + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc2", - .start = 0x01c10800, - .end = 0x01c10800 + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_tc3", - .start = 0x01c10c00, - .end = 0x01c10c00 + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma3_ccint", - .start = DAVINCI_INTC_IRQ(IRQ_CCINT0), - .flags = IORESOURCE_IRQ, - }, - { - .name = "edma3_ccerrint", - .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT), - .flags = IORESOURCE_IRQ, - }, - /* not using TC*_ERR */ -}; - -static const struct platform_device_info dm365_edma_device __initconst = { - .name = "edma", - .id = 0, - .dma_mask = DMA_BIT_MASK(32), - .res = edma_resources, - .num_res = ARRAY_SIZE(edma_resources), - .data = &dm365_edma_pdata, - .size_data = sizeof(dm365_edma_pdata), -}; - -static struct resource dm365_asp_resources[] = { - { - .name = "mpu", - .start = DAVINCI_DM365_ASP0_BASE, - .end = DAVINCI_DM365_ASP0_BASE + SZ_8K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_DMA_ASP0_TX, - .end = DAVINCI_DMA_ASP0_TX, - .flags = IORESOURCE_DMA, - }, - { - .start = DAVINCI_DMA_ASP0_RX, - .end = DAVINCI_DMA_ASP0_RX, - .flags = IORESOURCE_DMA, - }, -}; - -static struct platform_device dm365_asp_device = { - .name = "davinci-mcbsp", - .id = -1, - .num_resources = ARRAY_SIZE(dm365_asp_resources), - .resource = dm365_asp_resources, -}; - -static struct resource dm365_vc_resources[] = { - { - .start = DAVINCI_DM365_VC_BASE, - .end = DAVINCI_DM365_VC_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_DMA_VC_TX, - .end = DAVINCI_DMA_VC_TX, - .flags = IORESOURCE_DMA, - }, - { - .start = DAVINCI_DMA_VC_RX, - .end = DAVINCI_DMA_VC_RX, - .flags = IORESOURCE_DMA, - }, -}; - -static struct platform_device dm365_vc_device = { - .name = "davinci_voicecodec", - .id = -1, - .num_resources = ARRAY_SIZE(dm365_vc_resources), - .resource = dm365_vc_resources, -}; - -static struct resource dm365_rtc_resources[] = { - { - .start = DM365_RTC_BASE, - .end = DM365_RTC_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DM365_RTCINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device dm365_rtc_device = { - .name = "rtc_davinci", - .id = 0, - .num_resources = ARRAY_SIZE(dm365_rtc_resources), - .resource = dm365_rtc_resources, -}; - -static struct map_desc dm365_io_desc[] = { - { - .virtual = IO_VIRT, - .pfn = __phys_to_pfn(IO_PHYS), - .length = IO_SIZE, - .type = MT_DEVICE - }, -}; - -static struct resource dm365_ks_resources[] = { - { - /* registers */ - .start = DM365_KEYSCAN_BASE, - .end = DM365_KEYSCAN_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - /* interrupt */ - .start = DAVINCI_INTC_IRQ(IRQ_DM365_KEYINT), - .end = DAVINCI_INTC_IRQ(IRQ_DM365_KEYINT), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device dm365_ks_device = { - .name = "davinci_keyscan", - .id = 0, - .num_resources = ARRAY_SIZE(dm365_ks_resources), - .resource = dm365_ks_resources, -}; - -/* Contents of JTAG ID register used to identify exact cpu type */ -static struct davinci_id dm365_ids[] = { - { - .variant = 0x0, - .part_no = 0xb83e, - .manufacturer = 0x017, - .cpu_id = DAVINCI_CPU_ID_DM365, - .name = "dm365_rev1.1", - }, - { - .variant = 0x8, - .part_no = 0xb83e, - .manufacturer = 0x017, - .cpu_id = DAVINCI_CPU_ID_DM365, - .name = "dm365_rev1.2", - }, -}; - -/* - * Bottom half of timer0 is used for clockevent, top half is used for - * clocksource. - */ -static const struct davinci_timer_cfg dm365_timer_cfg = { - .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_128), - .irq = { - DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12)), - DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34)), - }, -}; - -#define DM365_UART1_BASE (IO_PHYS + 0x106000) - -static struct plat_serial8250_port dm365_serial0_platform_data[] = { - { - .mapbase = DAVINCI_UART0_BASE, - .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0), - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | - UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 2, - }, - { - .flags = 0, - } -}; -static struct plat_serial8250_port dm365_serial1_platform_data[] = { - { - .mapbase = DM365_UART1_BASE, - .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1), - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | - UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 2, - }, - { - .flags = 0, - } -}; - -struct platform_device dm365_serial_device[] = { - { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = dm365_serial0_platform_data, - } - }, - { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM1, - .dev = { - .platform_data = dm365_serial1_platform_data, - } - }, - { - } -}; - -static const struct davinci_soc_info davinci_soc_info_dm365 = { - .io_desc = dm365_io_desc, - .io_desc_num = ARRAY_SIZE(dm365_io_desc), - .jtag_id_reg = 0x01c40028, - .ids = dm365_ids, - .ids_num = ARRAY_SIZE(dm365_ids), - .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, - .pinmux_pins = dm365_pins, - .pinmux_pins_num = ARRAY_SIZE(dm365_pins), - .emac_pdata = &dm365_emac_pdata, - .sram_dma = 0x00010000, - .sram_len = SZ_32K, -}; - -void __init dm365_init_asp(void) -{ - davinci_cfg_reg(DM365_MCBSP0_BDX); - davinci_cfg_reg(DM365_MCBSP0_X); - davinci_cfg_reg(DM365_MCBSP0_BFSX); - davinci_cfg_reg(DM365_MCBSP0_BDR); - davinci_cfg_reg(DM365_MCBSP0_R); - davinci_cfg_reg(DM365_MCBSP0_BFSR); - davinci_cfg_reg(DM365_EVT2_ASP_TX); - davinci_cfg_reg(DM365_EVT3_ASP_RX); - platform_device_register(&dm365_asp_device); -} - -void __init dm365_init_vc(void) -{ - davinci_cfg_reg(DM365_EVT2_VC_TX); - davinci_cfg_reg(DM365_EVT3_VC_RX); - platform_device_register(&dm365_vc_device); -} - -void __init dm365_init_ks(struct davinci_ks_platform_data *pdata) -{ - dm365_ks_device.dev.platform_data = pdata; - platform_device_register(&dm365_ks_device); -} - -void __init dm365_init_rtc(void) -{ - davinci_cfg_reg(DM365_INT_PRTCSS); - platform_device_register(&dm365_rtc_device); -} - -void __init dm365_init(void) -{ - davinci_common_init(&davinci_soc_info_dm365); - davinci_map_sysmod(); -} - -void __init dm365_init_time(void) -{ - void __iomem *pll1, *pll2, *psc; - struct clk *clk; - int rv; - - clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM365_REF_FREQ); - - pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); - dm365_pll1_init(NULL, pll1, NULL); - - pll2 = ioremap(DAVINCI_PLL2_BASE, SZ_1K); - dm365_pll2_init(NULL, pll2, NULL); - - psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K); - dm365_psc_init(NULL, psc); - - clk = clk_get(NULL, "timer0"); - if (WARN_ON(IS_ERR(clk))) { - pr_err("Unable to get the timer clock\n"); - return; - } - - rv = davinci_timer_register(clk, &dm365_timer_cfg); - WARN(rv, "Unable to register the timer: %d\n", rv); -} - -void __init dm365_register_clocks(void) -{ - /* all clocks are currently registered in dm365_init_time() */ -} - -static struct resource dm365_vpss_resources[] = { - { - /* VPSS ISP5 Base address */ - .name = "isp5", - .start = 0x01c70000, - .end = 0x01c70000 + 0xff, - .flags = IORESOURCE_MEM, - }, - { - /* VPSS CLK Base address */ - .name = "vpss", - .start = 0x01c70200, - .end = 0x01c70200 + 0xff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device dm365_vpss_device = { - .name = "vpss", - .id = -1, - .dev.platform_data = "dm365_vpss", - .num_resources = ARRAY_SIZE(dm365_vpss_resources), - .resource = dm365_vpss_resources, -}; - -static struct resource vpfe_resources[] = { - { - .start = DAVINCI_INTC_IRQ(IRQ_VDINT0), - .end = DAVINCI_INTC_IRQ(IRQ_VDINT0), - .flags = IORESOURCE_IRQ, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_VDINT1), - .end = DAVINCI_INTC_IRQ(IRQ_VDINT1), - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); -static struct platform_device vpfe_capture_dev = { - .name = CAPTURE_DRV_NAME, - .id = -1, - .num_resources = ARRAY_SIZE(vpfe_resources), - .resource = vpfe_resources, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static void dm365_isif_setup_pinmux(void) -{ - davinci_cfg_reg(DM365_VIN_CAM_WEN); - davinci_cfg_reg(DM365_VIN_CAM_VD); - davinci_cfg_reg(DM365_VIN_CAM_HD); - davinci_cfg_reg(DM365_VIN_YIN4_7_EN); - davinci_cfg_reg(DM365_VIN_YIN0_3_EN); -} - -static struct resource isif_resource[] = { - /* ISIF Base address */ - { - .start = 0x01c71000, - .end = 0x01c71000 + 0x1ff, - .flags = IORESOURCE_MEM, - }, - /* ISIF Linearization table 0 */ - { - .start = 0x1C7C000, - .end = 0x1C7C000 + 0x2ff, - .flags = IORESOURCE_MEM, - }, - /* ISIF Linearization table 1 */ - { - .start = 0x1C7C400, - .end = 0x1C7C400 + 0x2ff, - .flags = IORESOURCE_MEM, - }, -}; -static struct platform_device dm365_isif_dev = { - .name = "isif", - .id = -1, - .num_resources = ARRAY_SIZE(isif_resource), - .resource = isif_resource, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = dm365_isif_setup_pinmux, - }, -}; - -static struct resource dm365_osd_resources[] = { - { - .start = DM365_OSD_BASE, - .end = DM365_OSD_BASE + 0xff, - .flags = IORESOURCE_MEM, - }, -}; - -static u64 dm365_video_dma_mask = DMA_BIT_MASK(32); - -static struct platform_device dm365_osd_dev = { - .name = DM365_VPBE_OSD_SUBDEV_NAME, - .id = -1, - .num_resources = ARRAY_SIZE(dm365_osd_resources), - .resource = dm365_osd_resources, - .dev = { - .dma_mask = &dm365_video_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static struct resource dm365_venc_resources[] = { - { - .start = DAVINCI_INTC_IRQ(IRQ_VENCINT), - .end = DAVINCI_INTC_IRQ(IRQ_VENCINT), - .flags = IORESOURCE_IRQ, - }, - /* venc registers io space */ - { - .start = DM365_VENC_BASE, - .end = DM365_VENC_BASE + 0x177, - .flags = IORESOURCE_MEM, - }, - /* vdaccfg registers io space */ - { - .start = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG, - .end = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG + 3, - .flags = IORESOURCE_MEM, - }, -}; - -static struct resource dm365_v4l2_disp_resources[] = { - { - .start = DAVINCI_INTC_IRQ(IRQ_VENCINT), - .end = DAVINCI_INTC_IRQ(IRQ_VENCINT), - .flags = IORESOURCE_IRQ, - }, - /* venc registers io space */ - { - .start = DM365_VENC_BASE, - .end = DM365_VENC_BASE + 0x177, - .flags = IORESOURCE_MEM, - }, -}; - -static int dm365_vpbe_setup_pinmux(u32 if_type, int field) -{ - switch (if_type) { - case MEDIA_BUS_FMT_SGRBG8_1X8: - davinci_cfg_reg(DM365_VOUT_FIELD_G81); - davinci_cfg_reg(DM365_VOUT_COUTL_EN); - davinci_cfg_reg(DM365_VOUT_COUTH_EN); - break; - case MEDIA_BUS_FMT_YUYV10_1X20: - if (field) - davinci_cfg_reg(DM365_VOUT_FIELD); - else - davinci_cfg_reg(DM365_VOUT_FIELD_G81); - davinci_cfg_reg(DM365_VOUT_COUTL_EN); - davinci_cfg_reg(DM365_VOUT_COUTH_EN); - break; - default: - return -EINVAL; - } - - return 0; -} - -static int dm365_venc_setup_clock(enum vpbe_enc_timings_type type, - unsigned int pclock) -{ - void __iomem *vpss_clkctl_reg; - u32 val; - - vpss_clkctl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL); - - switch (type) { - case VPBE_ENC_STD: - val = VPSS_VENCCLKEN_ENABLE | VPSS_DACCLKEN_ENABLE; - break; - case VPBE_ENC_DV_TIMINGS: - if (pclock <= 27000000) { - val = VPSS_VENCCLKEN_ENABLE | VPSS_DACCLKEN_ENABLE; - } else { - /* set sysclk4 to output 74.25 MHz from pll1 */ - val = VPSS_PLLC2SYSCLK5_ENABLE | VPSS_DACCLKEN_ENABLE | - VPSS_VENCCLKEN_ENABLE; - } - break; - default: - return -EINVAL; - } - writel(val, vpss_clkctl_reg); - - return 0; -} - -static struct platform_device dm365_vpbe_display = { - .name = "vpbe-v4l2", - .id = -1, - .num_resources = ARRAY_SIZE(dm365_v4l2_disp_resources), - .resource = dm365_v4l2_disp_resources, - .dev = { - .dma_mask = &dm365_video_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static struct venc_platform_data dm365_venc_pdata = { - .setup_pinmux = dm365_vpbe_setup_pinmux, - .setup_clock = dm365_venc_setup_clock, -}; - -static struct platform_device dm365_venc_dev = { - .name = DM365_VPBE_VENC_SUBDEV_NAME, - .id = -1, - .num_resources = ARRAY_SIZE(dm365_venc_resources), - .resource = dm365_venc_resources, - .dev = { - .dma_mask = &dm365_video_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = (void *)&dm365_venc_pdata, - }, -}; - -static struct platform_device dm365_vpbe_dev = { - .name = "vpbe_controller", - .id = -1, - .dev = { - .dma_mask = &dm365_video_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -int __init dm365_init_video(struct vpfe_config *vpfe_cfg, - struct vpbe_config *vpbe_cfg) -{ - if (vpfe_cfg || vpbe_cfg) - platform_device_register(&dm365_vpss_device); - - if (vpfe_cfg) { - vpfe_capture_dev.dev.platform_data = vpfe_cfg; - platform_device_register(&dm365_isif_dev); - platform_device_register(&vpfe_capture_dev); - } - if (vpbe_cfg) { - dm365_vpbe_dev.dev.platform_data = vpbe_cfg; - platform_device_register(&dm365_osd_dev); - platform_device_register(&dm365_venc_dev); - platform_device_register(&dm365_vpbe_dev); - platform_device_register(&dm365_vpbe_display); - } - - return 0; -} - -static const struct davinci_aintc_config dm365_aintc_config = { - .reg = { - .start = DAVINCI_ARM_INTC_BASE, - .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .num_irqs = 64, - .prios = dm365_default_priorities, -}; - -void __init dm365_init_irq(void) -{ - davinci_aintc_init(&dm365_aintc_config); -} - -static int __init dm365_init_devices(void) -{ - struct platform_device *edma_pdev; - int ret = 0; - - if (!cpu_is_davinci_dm365()) - return 0; - - davinci_cfg_reg(DM365_INT_EDMA_CC); - edma_pdev = platform_device_register_full(&dm365_edma_device); - if (IS_ERR(edma_pdev)) { - pr_warn("%s: Failed to register eDMA\n", __func__); - return PTR_ERR(edma_pdev); - } - - platform_device_register(&dm365_mdio_device); - platform_device_register(&dm365_emac_device); - - ret = davinci_init_wdt(); - if (ret) - pr_warn("%s: watchdog init failed: %d\n", __func__, ret); - - return ret; -} -postcore_initcall(dm365_init_devices); diff --git a/arch/arm/mach-davinci/irqs.h b/arch/arm/mach-davinci/irqs.h index 8f9fc7a56ce8..b1ceed81e9fa 100644 --- a/arch/arm/mach-davinci/irqs.h +++ b/arch/arm/mach-davinci/irqs.h @@ -27,219 +27,6 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H -/* Base address */ -#define DAVINCI_ARM_INTC_BASE 0x01C48000 - -/* Interrupt lines */ -#define IRQ_VDINT0 0 -#define IRQ_VDINT1 1 -#define IRQ_VDINT2 2 -#define IRQ_HISTINT 3 -#define IRQ_H3AINT 4 -#define IRQ_PRVUINT 5 -#define IRQ_RSZINT 6 -#define IRQ_VFOCINT 7 -#define IRQ_VENCINT 8 -#define IRQ_ASQINT 9 -#define IRQ_IMXINT 10 -#define IRQ_VLCDINT 11 -#define IRQ_USBINT 12 -#define IRQ_EMACINT 13 - -#define IRQ_CCINT0 16 -#define IRQ_CCERRINT 17 -#define IRQ_TCERRINT0 18 -#define IRQ_TCERRINT 19 -#define IRQ_PSCIN 20 - -#define IRQ_IDE 22 -#define IRQ_HPIINT 23 -#define IRQ_MBXINT 24 -#define IRQ_MBRINT 25 -#define IRQ_MMCINT 26 -#define IRQ_SDIOINT 27 -#define IRQ_MSINT 28 -#define IRQ_DDRINT 29 -#define IRQ_AEMIFINT 30 -#define IRQ_VLQINT 31 -#define IRQ_TINT0_TINT12 32 -#define IRQ_TINT0_TINT34 33 -#define IRQ_TINT1_TINT12 34 -#define IRQ_TINT1_TINT34 35 -#define IRQ_PWMINT0 36 -#define IRQ_PWMINT1 37 -#define IRQ_PWMINT2 38 -#define IRQ_I2C 39 -#define IRQ_UARTINT0 40 -#define IRQ_UARTINT1 41 -#define IRQ_UARTINT2 42 -#define IRQ_SPINT0 43 -#define IRQ_SPINT1 44 - -#define IRQ_DSP2ARM0 46 -#define IRQ_DSP2ARM1 47 -#define IRQ_GPIO0 48 -#define IRQ_GPIO1 49 -#define IRQ_GPIO2 50 -#define IRQ_GPIO3 51 -#define IRQ_GPIO4 52 -#define IRQ_GPIO5 53 -#define IRQ_GPIO6 54 -#define IRQ_GPIO7 55 -#define IRQ_GPIOBNK0 56 -#define IRQ_GPIOBNK1 57 -#define IRQ_GPIOBNK2 58 -#define IRQ_GPIOBNK3 59 -#define IRQ_GPIOBNK4 60 -#define IRQ_COMMTX 61 -#define IRQ_COMMRX 62 -#define IRQ_EMUINT 63 - -#define DAVINCI_N_AINTC_IRQ 64 - -#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 - -/* DaVinci DM6467-specific Interrupts */ -#define IRQ_DM646X_VP_VERTINT0 0 -#define IRQ_DM646X_VP_VERTINT1 1 -#define IRQ_DM646X_VP_VERTINT2 2 -#define IRQ_DM646X_VP_VERTINT3 3 -#define IRQ_DM646X_VP_ERRINT 4 -#define IRQ_DM646X_RESERVED_1 5 -#define IRQ_DM646X_RESERVED_2 6 -#define IRQ_DM646X_WDINT 7 -#define IRQ_DM646X_CRGENINT0 8 -#define IRQ_DM646X_CRGENINT1 9 -#define IRQ_DM646X_TSIFINT0 10 -#define IRQ_DM646X_TSIFINT1 11 -#define IRQ_DM646X_VDCEINT 12 -#define IRQ_DM646X_USBINT 13 -#define IRQ_DM646X_USBDMAINT 14 -#define IRQ_DM646X_PCIINT 15 -#define IRQ_DM646X_TCERRINT2 20 -#define IRQ_DM646X_TCERRINT3 21 -#define IRQ_DM646X_IDE 22 -#define IRQ_DM646X_HPIINT 23 -#define IRQ_DM646X_EMACRXTHINT 24 -#define IRQ_DM646X_EMACRXINT 25 -#define IRQ_DM646X_EMACTXINT 26 -#define IRQ_DM646X_EMACMISCINT 27 -#define IRQ_DM646X_MCASP0TXINT 28 -#define IRQ_DM646X_MCASP0RXINT 29 -#define IRQ_DM646X_MCASP1TXINT 30 -#define IRQ_DM646X_RESERVED_3 31 -#define IRQ_DM646X_VLQINT 38 -#define IRQ_DM646X_UARTINT2 42 -#define IRQ_DM646X_SPINT0 43 -#define IRQ_DM646X_SPINT1 44 -#define IRQ_DM646X_DSP2ARMINT 45 -#define IRQ_DM646X_RESERVED_4 46 -#define IRQ_DM646X_PSCINT 47 -#define IRQ_DM646X_GPIO0 48 -#define IRQ_DM646X_GPIO1 49 -#define IRQ_DM646X_GPIO2 50 -#define IRQ_DM646X_GPIO3 51 -#define IRQ_DM646X_GPIO4 52 -#define IRQ_DM646X_GPIO5 53 -#define IRQ_DM646X_GPIO6 54 -#define IRQ_DM646X_GPIO7 55 -#define IRQ_DM646X_GPIOBNK0 56 -#define IRQ_DM646X_GPIOBNK1 57 -#define IRQ_DM646X_GPIOBNK2 58 -#define IRQ_DM646X_DDRINT 59 -#define IRQ_DM646X_AEMIFINT 60 - -/* DaVinci DM355-specific Interrupts */ -#define IRQ_DM355_CCDC_VDINT0 0 -#define IRQ_DM355_CCDC_VDINT1 1 -#define IRQ_DM355_CCDC_VDINT2 2 -#define IRQ_DM355_IPIPE_HST 3 -#define IRQ_DM355_H3AINT 4 -#define IRQ_DM355_IPIPE_SDR 5 -#define IRQ_DM355_IPIPEIFINT 6 -#define IRQ_DM355_OSDINT 7 -#define IRQ_DM355_VENCINT 8 -#define IRQ_DM355_IMCOPINT 11 -#define IRQ_DM355_RTOINT 13 -#define IRQ_DM355_TINT4 13 -#define IRQ_DM355_TINT2_TINT12 13 -#define IRQ_DM355_UARTINT2 14 -#define IRQ_DM355_TINT5 14 -#define IRQ_DM355_TINT2_TINT34 14 -#define IRQ_DM355_TINT6 15 -#define IRQ_DM355_TINT3_TINT12 15 -#define IRQ_DM355_SPINT1_0 17 -#define IRQ_DM355_SPINT1_1 18 -#define IRQ_DM355_SPINT2_0 19 -#define IRQ_DM355_SPINT2_1 21 -#define IRQ_DM355_TINT7 22 -#define IRQ_DM355_TINT3_TINT34 22 -#define IRQ_DM355_SDIOINT0 23 -#define IRQ_DM355_MMCINT0 26 -#define IRQ_DM355_MSINT 26 -#define IRQ_DM355_MMCINT1 27 -#define IRQ_DM355_PWMINT3 28 -#define IRQ_DM355_SDIOINT1 31 -#define IRQ_DM355_SPINT0_0 42 -#define IRQ_DM355_SPINT0_1 43 -#define IRQ_DM355_GPIO0 44 -#define IRQ_DM355_GPIO1 45 -#define IRQ_DM355_GPIO2 46 -#define IRQ_DM355_GPIO3 47 -#define IRQ_DM355_GPIO4 48 -#define IRQ_DM355_GPIO5 49 -#define IRQ_DM355_GPIO6 50 -#define IRQ_DM355_GPIO7 51 -#define IRQ_DM355_GPIO8 52 -#define IRQ_DM355_GPIO9 53 -#define IRQ_DM355_GPIOBNK0 54 -#define IRQ_DM355_GPIOBNK1 55 -#define IRQ_DM355_GPIOBNK2 56 -#define IRQ_DM355_GPIOBNK3 57 -#define IRQ_DM355_GPIOBNK4 58 -#define IRQ_DM355_GPIOBNK5 59 -#define IRQ_DM355_GPIOBNK6 60 - -/* DaVinci DM365-specific Interrupts */ -#define IRQ_DM365_INSFINT 7 -#define IRQ_DM365_IMXINT1 8 -#define IRQ_DM365_IMXINT0 10 -#define IRQ_DM365_KLD_ARMINT 10 -#define IRQ_DM365_IMCOPINT 11 -#define IRQ_DM365_RTOINT 13 -#define IRQ_DM365_TINT5 14 -#define IRQ_DM365_TINT6 15 -#define IRQ_DM365_SPINT2_1 21 -#define IRQ_DM365_TINT7 22 -#define IRQ_DM365_SDIOINT0 23 -#define IRQ_DM365_MMCINT1 27 -#define IRQ_DM365_PWMINT3 28 -#define IRQ_DM365_RTCINT 29 -#define IRQ_DM365_SDIOINT1 31 -#define IRQ_DM365_SPIINT0_0 42 -#define IRQ_DM365_SPIINT3_0 43 -#define IRQ_DM365_GPIO0 44 -#define IRQ_DM365_GPIO1 45 -#define IRQ_DM365_GPIO2 46 -#define IRQ_DM365_GPIO3 47 -#define IRQ_DM365_GPIO4 48 -#define IRQ_DM365_GPIO5 49 -#define IRQ_DM365_GPIO6 50 -#define IRQ_DM365_GPIO7 51 -#define IRQ_DM365_EMAC_RXTHRESH 52 -#define IRQ_DM365_EMAC_RXPULSE 53 -#define IRQ_DM365_EMAC_TXPULSE 54 -#define IRQ_DM365_EMAC_MISCPULSE 55 -#define IRQ_DM365_GPIO12 56 -#define IRQ_DM365_GPIO13 57 -#define IRQ_DM365_GPIO14 58 -#define IRQ_DM365_GPIO15 59 -#define IRQ_DM365_ADCINT 59 -#define IRQ_DM365_KEYINT 60 -#define IRQ_DM365_TCERRINT2 61 -#define IRQ_DM365_TCERRINT3 62 -#define IRQ_DM365_EMUINT 63 - /* DA8XX interrupts */ #define IRQ_DA8XX_COMMTX 0 #define IRQ_DA8XX_COMMRX 1 @@ -398,8 +185,4 @@ #define DA850_N_CP_INTC_IRQ 101 -/* da850 currently has the most gpio pins (144) */ -#define DAVINCI_N_GPIO 144 -/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */ - #endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c index 814a6b714010..37de35eb6e8b 100644 --- a/arch/arm/mach-davinci/mux.c +++ b/arch/arm/mach-davinci/mux.c @@ -97,18 +97,3 @@ int davinci_cfg_reg(const unsigned long index) return 0; } -EXPORT_SYMBOL(davinci_cfg_reg); - -int davinci_cfg_reg_list(const short pins[]) -{ - int i, error = -EINVAL; - - if (pins) - for (i = 0; pins[i] >= 0; i++) { - error = davinci_cfg_reg(pins[i]); - if (error) - break; - } - - return error; -} diff --git a/arch/arm/mach-davinci/mux.h b/arch/arm/mach-davinci/mux.h index b5effe16402c..38f0e427291e 100644 --- a/arch/arm/mach-davinci/mux.h +++ b/arch/arm/mach-davinci/mux.h @@ -21,321 +21,6 @@ struct mux_config { bool debug; }; -enum davinci_dm644x_index { - /* ATA and HDDIR functions */ - DM644X_HDIREN, - DM644X_ATAEN, - DM644X_ATAEN_DISABLE, - - /* HPI functions */ - DM644X_HPIEN_DISABLE, - - /* AEAW functions */ - DM644X_AEAW, - DM644X_AEAW0, - DM644X_AEAW1, - DM644X_AEAW2, - DM644X_AEAW3, - DM644X_AEAW4, - - /* Memory Stick */ - DM644X_MSTK, - - /* I2C */ - DM644X_I2C, - - /* ASP function */ - DM644X_MCBSP, - - /* UART1 */ - DM644X_UART1, - - /* UART2 */ - DM644X_UART2, - - /* PWM0 */ - DM644X_PWM0, - - /* PWM1 */ - DM644X_PWM1, - - /* PWM2 */ - DM644X_PWM2, - - /* VLYNQ function */ - DM644X_VLYNQEN, - DM644X_VLSCREN, - DM644X_VLYNQWD, - - /* EMAC and MDIO function */ - DM644X_EMACEN, - - /* GPIO3V[0:16] pins */ - DM644X_GPIO3V, - - /* GPIO pins */ - DM644X_GPIO0, - DM644X_GPIO3, - DM644X_GPIO43_44, - DM644X_GPIO46_47, - - /* VPBE */ - DM644X_RGB666, - - /* LCD */ - DM644X_LOEEN, - DM644X_LFLDEN, -}; - -enum davinci_dm646x_index { - /* ATA function */ - DM646X_ATAEN, - - /* AUDIO Clock */ - DM646X_AUDCK1, - DM646X_AUDCK0, - - /* CRGEN Control */ - DM646X_CRGMUX, - - /* VPIF Control */ - DM646X_STSOMUX_DISABLE, - DM646X_STSIMUX_DISABLE, - DM646X_PTSOMUX_DISABLE, - DM646X_PTSIMUX_DISABLE, - - /* TSIF Control */ - DM646X_STSOMUX, - DM646X_STSIMUX, - DM646X_PTSOMUX_PARALLEL, - DM646X_PTSIMUX_PARALLEL, - DM646X_PTSOMUX_SERIAL, - DM646X_PTSIMUX_SERIAL, -}; - -enum davinci_dm355_index { - /* MMC/SD 0 */ - DM355_MMCSD0, - - /* MMC/SD 1 */ - DM355_SD1_CLK, - DM355_SD1_CMD, - DM355_SD1_DATA3, - DM355_SD1_DATA2, - DM355_SD1_DATA1, - DM355_SD1_DATA0, - - /* I2C */ - DM355_I2C_SDA, - DM355_I2C_SCL, - - /* ASP0 function */ - DM355_MCBSP0_BDX, - DM355_MCBSP0_X, - DM355_MCBSP0_BFSX, - DM355_MCBSP0_BDR, - DM355_MCBSP0_R, - DM355_MCBSP0_BFSR, - - /* SPI0 */ - DM355_SPI0_SDI, - DM355_SPI0_SDENA0, - DM355_SPI0_SDENA1, - - /* IRQ muxing */ - DM355_INT_EDMA_CC, - DM355_INT_EDMA_TC0_ERR, - DM355_INT_EDMA_TC1_ERR, - - /* EDMA event muxing */ - DM355_EVT8_ASP1_TX, - DM355_EVT9_ASP1_RX, - DM355_EVT26_MMC0_RX, - - /* Video Out */ - DM355_VOUT_FIELD, - DM355_VOUT_FIELD_G70, - DM355_VOUT_HVSYNC, - DM355_VOUT_COUTL_EN, - DM355_VOUT_COUTH_EN, - - /* Video In Pin Mux */ - DM355_VIN_PCLK, - DM355_VIN_CAM_WEN, - DM355_VIN_CAM_VD, - DM355_VIN_CAM_HD, - DM355_VIN_YIN_EN, - DM355_VIN_CINL_EN, - DM355_VIN_CINH_EN, -}; - -enum davinci_dm365_index { - /* MMC/SD 0 */ - DM365_MMCSD0, - - /* MMC/SD 1 */ - DM365_SD1_CLK, - DM365_SD1_CMD, - DM365_SD1_DATA3, - DM365_SD1_DATA2, - DM365_SD1_DATA1, - DM365_SD1_DATA0, - - /* I2C */ - DM365_I2C_SDA, - DM365_I2C_SCL, - - /* AEMIF */ - DM365_AEMIF_AR_A14, - DM365_AEMIF_AR_BA0, - DM365_AEMIF_A3, - DM365_AEMIF_A7, - DM365_AEMIF_D15_8, - DM365_AEMIF_CE0, - DM365_AEMIF_CE1, - DM365_AEMIF_WE_OE, - - /* ASP0 function */ - DM365_MCBSP0_BDX, - DM365_MCBSP0_X, - DM365_MCBSP0_BFSX, - DM365_MCBSP0_BDR, - DM365_MCBSP0_R, - DM365_MCBSP0_BFSR, - - /* SPI0 */ - DM365_SPI0_SCLK, - DM365_SPI0_SDI, - DM365_SPI0_SDO, - DM365_SPI0_SDENA0, - DM365_SPI0_SDENA1, - - /* UART */ - DM365_UART0_RXD, - DM365_UART0_TXD, - DM365_UART1_RXD, - DM365_UART1_TXD, - DM365_UART1_RTS, - DM365_UART1_CTS, - - /* EMAC */ - DM365_EMAC_TX_EN, - DM365_EMAC_TX_CLK, - DM365_EMAC_COL, - DM365_EMAC_TXD3, - DM365_EMAC_TXD2, - DM365_EMAC_TXD1, - DM365_EMAC_TXD0, - DM365_EMAC_RXD3, - DM365_EMAC_RXD2, - DM365_EMAC_RXD1, - DM365_EMAC_RXD0, - DM365_EMAC_RX_CLK, - DM365_EMAC_RX_DV, - DM365_EMAC_RX_ER, - DM365_EMAC_CRS, - DM365_EMAC_MDIO, - DM365_EMAC_MDCLK, - - /* Key Scan */ - DM365_KEYSCAN, - - /* PWM */ - DM365_PWM0, - DM365_PWM0_G23, - DM365_PWM1, - DM365_PWM1_G25, - DM365_PWM2_G87, - DM365_PWM2_G88, - DM365_PWM2_G89, - DM365_PWM2_G90, - DM365_PWM3_G80, - DM365_PWM3_G81, - DM365_PWM3_G85, - DM365_PWM3_G86, - - /* SPI1 */ - DM365_SPI1_SCLK, - DM365_SPI1_SDO, - DM365_SPI1_SDI, - DM365_SPI1_SDENA0, - DM365_SPI1_SDENA1, - - /* SPI2 */ - DM365_SPI2_SCLK, - DM365_SPI2_SDO, - DM365_SPI2_SDI, - DM365_SPI2_SDENA0, - DM365_SPI2_SDENA1, - - /* SPI3 */ - DM365_SPI3_SCLK, - DM365_SPI3_SDO, - DM365_SPI3_SDI, - DM365_SPI3_SDENA0, - DM365_SPI3_SDENA1, - - /* SPI4 */ - DM365_SPI4_SCLK, - DM365_SPI4_SDO, - DM365_SPI4_SDI, - DM365_SPI4_SDENA0, - DM365_SPI4_SDENA1, - - /* Clock */ - DM365_CLKOUT0, - DM365_CLKOUT1, - DM365_CLKOUT2, - - /* GPIO */ - DM365_GPIO20, - DM365_GPIO30, - DM365_GPIO31, - DM365_GPIO32, - DM365_GPIO33, - DM365_GPIO40, - DM365_GPIO64_57, - - /* Video */ - DM365_VOUT_FIELD, - DM365_VOUT_FIELD_G81, - DM365_VOUT_HVSYNC, - DM365_VOUT_COUTL_EN, - DM365_VOUT_COUTH_EN, - DM365_VIN_CAM_WEN, - DM365_VIN_CAM_VD, - DM365_VIN_CAM_HD, - DM365_VIN_YIN4_7_EN, - DM365_VIN_YIN0_3_EN, - - /* IRQ muxing */ - DM365_INT_EDMA_CC, - DM365_INT_EDMA_TC0_ERR, - DM365_INT_EDMA_TC1_ERR, - DM365_INT_EDMA_TC2_ERR, - DM365_INT_EDMA_TC3_ERR, - DM365_INT_PRTCSS, - DM365_INT_EMAC_RXTHRESH, - DM365_INT_EMAC_RXPULSE, - DM365_INT_EMAC_TXPULSE, - DM365_INT_EMAC_MISCPULSE, - DM365_INT_IMX0_ENABLE, - DM365_INT_IMX0_DISABLE, - DM365_INT_HDVICP_ENABLE, - DM365_INT_HDVICP_DISABLE, - DM365_INT_IMX1_ENABLE, - DM365_INT_IMX1_DISABLE, - DM365_INT_NSF_ENABLE, - DM365_INT_NSF_DISABLE, - - /* EDMA event muxing */ - DM365_EVT2_ASP_TX, - DM365_EVT3_ASP_RX, - DM365_EVT2_VC_TX, - DM365_EVT3_VC_RX, - DM365_EVT26_MMC0_RX, -}; - enum da830_index { DA830_GPIO7_14, DA830_RTCK, diff --git a/arch/arm/mach-davinci/psc.h b/arch/arm/mach-davinci/psc.h index 68cd9d3fc82b..acfef063295f 100644 --- a/arch/arm/mach-davinci/psc.h +++ b/arch/arm/mach-davinci/psc.h @@ -70,70 +70,6 @@ #define DAVINCI_LPSC_GEM 39 #define DAVINCI_LPSC_IMCOP 40 -#define DM355_LPSC_TIMER3 5 -#define DM355_LPSC_SPI1 6 -#define DM355_LPSC_MMC_SD1 7 -#define DM355_LPSC_McBSP1 8 -#define DM355_LPSC_PWM3 10 -#define DM355_LPSC_SPI2 11 -#define DM355_LPSC_RTO 12 -#define DM355_LPSC_VPSS_DAC 41 - -/* DM365 */ -#define DM365_LPSC_TIMER3 5 -#define DM365_LPSC_SPI1 6 -#define DM365_LPSC_MMC_SD1 7 -#define DM365_LPSC_McBSP1 8 -#define DM365_LPSC_PWM3 10 -#define DM365_LPSC_SPI2 11 -#define DM365_LPSC_RTO 12 -#define DM365_LPSC_TIMER4 17 -#define DM365_LPSC_SPI0 22 -#define DM365_LPSC_SPI3 38 -#define DM365_LPSC_SPI4 39 -#define DM365_LPSC_EMAC 40 -#define DM365_LPSC_VOICE_CODEC 44 -#define DM365_LPSC_DAC_CLK 46 -#define DM365_LPSC_VPSSMSTR 47 -#define DM365_LPSC_MJCP 50 - -/* - * LPSC Assignments - */ -#define DM646X_LPSC_ARM 0 -#define DM646X_LPSC_C64X_CPU 1 -#define DM646X_LPSC_HDVICP0 2 -#define DM646X_LPSC_HDVICP1 3 -#define DM646X_LPSC_TPCC 4 -#define DM646X_LPSC_TPTC0 5 -#define DM646X_LPSC_TPTC1 6 -#define DM646X_LPSC_TPTC2 7 -#define DM646X_LPSC_TPTC3 8 -#define DM646X_LPSC_PCI 13 -#define DM646X_LPSC_EMAC 14 -#define DM646X_LPSC_VDCE 15 -#define DM646X_LPSC_VPSSMSTR 16 -#define DM646X_LPSC_VPSSSLV 17 -#define DM646X_LPSC_TSIF0 18 -#define DM646X_LPSC_TSIF1 19 -#define DM646X_LPSC_DDR_EMIF 20 -#define DM646X_LPSC_AEMIF 21 -#define DM646X_LPSC_McASP0 22 -#define DM646X_LPSC_McASP1 23 -#define DM646X_LPSC_CRGEN0 24 -#define DM646X_LPSC_CRGEN1 25 -#define DM646X_LPSC_UART0 26 -#define DM646X_LPSC_UART1 27 -#define DM646X_LPSC_UART2 28 -#define DM646X_LPSC_PWM0 29 -#define DM646X_LPSC_PWM1 30 -#define DM646X_LPSC_I2C 31 -#define DM646X_LPSC_SPI 32 -#define DM646X_LPSC_GPIO 33 -#define DM646X_LPSC_TIMER0 34 -#define DM646X_LPSC_TIMER1 35 -#define DM646X_LPSC_ARM_INTC 45 - /* PSC0 defines */ #define DA8XX_LPSC0_TPCC 0 #define DA8XX_LPSC0_TPTC0 1 diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c deleted file mode 100644 index 7f7814807bb5..000000000000 --- a/arch/arm/mach-davinci/serial.c +++ /dev/null @@ -1,92 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * TI DaVinci serial driver - * - * Copyright (C) 2006 Texas Instruments. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/serial_8250.h> -#include <linux/serial_reg.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/clk.h> -#include <linux/io.h> - -#include "serial.h" -#include "cputype.h" - -static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, - int value) -{ - offset <<= p->regshift; - - WARN_ONCE(!p->membase, "unmapped write: uart[%d]\n", offset); - - __raw_writel(value, p->membase + offset); -} - -static void __init davinci_serial_reset(struct plat_serial8250_port *p) -{ - unsigned int pwremu = 0; - - serial_write_reg(p, UART_IER, 0); /* disable all interrupts */ - - /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */ - serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu); - mdelay(10); - - pwremu |= (0x3 << 13); - pwremu |= 0x1; - serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu); - - if (cpu_is_davinci_dm646x()) - serial_write_reg(p, UART_DM646X_SCR, - UART_DM646X_SCR_TX_WATERMARK); -} - -int __init davinci_serial_init(struct platform_device *serial_dev) -{ - int i, ret = 0; - struct device *dev; - struct plat_serial8250_port *p; - struct clk *clk; - - /* - * Make sure the serial ports are muxed on at this point. - * You have to mux them off in device drivers later on if not needed. - */ - for (i = 0; serial_dev[i].dev.platform_data != NULL; i++) { - dev = &serial_dev[i].dev; - p = dev->platform_data; - - ret = platform_device_register(&serial_dev[i]); - if (ret) - continue; - - clk = clk_get(dev, NULL); - if (IS_ERR(clk)) { - pr_err("%s:%d: failed to get UART%d clock\n", - __func__, __LINE__, i); - continue; - } - - clk_prepare_enable(clk); - - p->uartclk = clk_get_rate(clk); - - if (!p->membase && p->mapbase) { - p->membase = ioremap(p->mapbase, SZ_4K); - - if (p->membase) - p->flags &= ~UPF_IOREMAP; - else - pr_err("uart regs ioremap failed\n"); - } - - if (p->membase && p->type != PORT_AR7) - davinci_serial_reset(p); - } - return ret; -} diff --git a/arch/arm/mach-davinci/serial.h b/arch/arm/mach-davinci/serial.h deleted file mode 100644 index c4a4ba553d45..000000000000 --- a/arch/arm/mach-davinci/serial.h +++ /dev/null @@ -1,35 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * DaVinci serial device definitions - * - * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> - * - * 2007 (c) MontaVista Software, Inc. - */ -#ifndef __ASM_ARCH_SERIAL_H -#define __ASM_ARCH_SERIAL_H - -#include <asm/memory.h> - -#include "hardware.h" - -#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) -#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) -#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) - -#define DA8XX_UART0_BASE (IO_PHYS + 0x042000) -#define DA8XX_UART1_BASE (IO_PHYS + 0x10c000) -#define DA8XX_UART2_BASE (IO_PHYS + 0x10d000) - -/* DaVinci UART register offsets */ -#define UART_DAVINCI_PWREMU 0x0c -#define UART_DM646X_SCR 0x10 -#define UART_DM646X_SCR_TX_WATERMARK 0x08 - -#ifndef __ASSEMBLY__ -#include <linux/platform_device.h> - -extern int davinci_serial_init(struct platform_device *); -#endif - -#endif /* __ASM_ARCH_SERIAL_H */ diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c deleted file mode 100644 index 9c8fc5031907..000000000000 --- a/arch/arm/mach-davinci/usb-da8xx.c +++ /dev/null @@ -1,146 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * DA8xx USB - */ -#include <linux/clk-provider.h> -#include <linux/delay.h> -#include <linux/dma-mapping.h> -#include <linux/init.h> -#include <linux/mfd/da8xx-cfgchip.h> -#include <linux/mfd/syscon.h> -#include <linux/phy/phy.h> -#include <linux/platform_data/clk-da8xx-cfgchip.h> -#include <linux/platform_data/phy-da8xx-usb.h> -#include <linux/platform_data/usb-davinci.h> -#include <linux/platform_device.h> -#include <linux/usb/musb.h> - -#include "common.h" -#include "cputype.h" -#include "da8xx.h" -#include "irqs.h" - -#define DA8XX_USB0_BASE 0x01e00000 -#define DA8XX_USB1_BASE 0x01e25000 - -#ifndef CONFIG_COMMON_CLK -static struct clk *usb20_clk; -#endif - -static struct da8xx_usb_phy_platform_data da8xx_usb_phy_pdata; - -static struct platform_device da8xx_usb_phy = { - .name = "da8xx-usb-phy", - .id = -1, - .dev = { - /* - * Setting init_name so that clock lookup will work in - * da8xx_register_usb11_phy_clk() even if this device is not - * registered yet. - */ - .init_name = "da8xx-usb-phy", - .platform_data = &da8xx_usb_phy_pdata, - }, -}; - -int __init da8xx_register_usb_phy(void) -{ - da8xx_usb_phy_pdata.cfgchip = da8xx_get_cfgchip(); - - return platform_device_register(&da8xx_usb_phy); -} - -static struct musb_hdrc_config musb_config = { - .multipoint = true, - .num_eps = 5, - .ram_bits = 10, -}; - -static struct musb_hdrc_platform_data usb_data = { - /* OTG requires a Mini-AB connector */ - .mode = MUSB_OTG, - .clock = "usb20", - .config = &musb_config, -}; - -static struct resource da8xx_usb20_resources[] = { - { - .start = DA8XX_USB0_BASE, - .end = DA8XX_USB0_BASE + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_USB_INT), - .flags = IORESOURCE_IRQ, - .name = "mc", - }, -}; - -static u64 usb_dmamask = DMA_BIT_MASK(32); - -static struct platform_device da8xx_usb20_dev = { - .name = "musb-da8xx", - .id = -1, - .dev = { - .platform_data = &usb_data, - .dma_mask = &usb_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = da8xx_usb20_resources, - .num_resources = ARRAY_SIZE(da8xx_usb20_resources), -}; - -int __init da8xx_register_usb20(unsigned int mA, unsigned int potpgt) -{ - usb_data.power = mA > 510 ? 255 : mA / 2; - usb_data.potpgt = (potpgt + 1) / 2; - - return platform_device_register(&da8xx_usb20_dev); -} - -static struct resource da8xx_usb11_resources[] = { - [0] = { - .start = DA8XX_USB1_BASE, - .end = DA8XX_USB1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_IRQN), - .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_IRQN), - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 da8xx_usb11_dma_mask = DMA_BIT_MASK(32); - -static struct platform_device da8xx_usb11_device = { - .name = "ohci-da8xx", - .id = -1, - .dev = { - .dma_mask = &da8xx_usb11_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(da8xx_usb11_resources), - .resource = da8xx_usb11_resources, -}; - -int __init da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata) -{ - da8xx_usb11_device.dev.platform_data = pdata; - return platform_device_register(&da8xx_usb11_device); -} - -static struct platform_device da8xx_usb_phy_clks_device = { - .name = "da830-usb-phy-clks", - .id = -1, -}; - -int __init da8xx_register_usb_phy_clocks(void) -{ - struct da8xx_cfgchip_clk_platform_data pdata; - - pdata.cfgchip = da8xx_get_cfgchip(); - da8xx_usb_phy_clks_device.dev.platform_data = &pdata; - - return platform_device_register(&da8xx_usb_phy_clks_device); -} diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c deleted file mode 100644 index a9e5c6e91e5d..000000000000 --- a/arch/arm/mach-davinci/usb.c +++ /dev/null @@ -1,87 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * USB - */ -#include <linux/dma-mapping.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/platform_data/usb-davinci.h> -#include <linux/usb/musb.h> - -#include "common.h" -#include "cputype.h" -#include "irqs.h" - -#define DAVINCI_USB_OTG_BASE 0x01c64000 - -#if IS_ENABLED(CONFIG_USB_MUSB_HDRC) -static struct musb_hdrc_config musb_config = { - .multipoint = true, - - .num_eps = 5, - .ram_bits = 10, -}; - -static struct musb_hdrc_platform_data usb_data = { - /* OTG requires a Mini-AB connector */ - .mode = MUSB_OTG, - .clock = "usb", - .config = &musb_config, -}; - -static struct resource usb_resources[] = { - { - /* physical address */ - .start = DAVINCI_USB_OTG_BASE, - .end = DAVINCI_USB_OTG_BASE + 0x5ff, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_INTC_IRQ(IRQ_USBINT), - .flags = IORESOURCE_IRQ, - .name = "mc" - }, - { - /* placeholder for the dedicated CPPI IRQ */ - .flags = IORESOURCE_IRQ, - .name = "dma" - }, -}; - -static u64 usb_dmamask = DMA_BIT_MASK(32); - -static struct platform_device usb_dev = { - .name = "musb-davinci", - .id = -1, - .dev = { - .platform_data = &usb_data, - .dma_mask = &usb_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = usb_resources, - .num_resources = ARRAY_SIZE(usb_resources), -}; - -void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms) -{ - usb_data.power = mA > 510 ? 255 : mA / 2; - usb_data.potpgt = (potpgt_ms + 1) / 2; - - if (cpu_is_davinci_dm646x()) { - /* Override the defaults as DM6467 uses different IRQs. */ - usb_dev.resource[1].start = DAVINCI_INTC_IRQ(IRQ_DM646X_USBINT); - usb_dev.resource[2].start = DAVINCI_INTC_IRQ( - IRQ_DM646X_USBDMAINT); - } else /* other devices don't have dedicated CPPI IRQ */ - usb_dev.num_resources = 2; - - platform_device_register(&usb_dev); -} - -#else - -void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms) -{ -} - -#endif /* CONFIG_USB_MUSB_HDRC */ diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig index 2252f465cafd..996888ffcfe7 100644 --- a/arch/arm/mach-dove/Kconfig +++ b/arch/arm/mach-dove/Kconfig @@ -18,14 +18,6 @@ if ARCH_DOVE config DOVE_LEGACY bool -config MACH_DOVE_DB - bool "Marvell DB-MV88AP510 Development Board" - select DOVE_LEGACY - select I2C_BOARDINFO if I2C - help - Say 'Y' here if you want your kernel to support the - Marvell DB-MV88AP510 Development Board. - config MACH_CM_A510 bool "CompuLab CM-A510 Board" select DOVE_LEGACY diff --git a/arch/arm/mach-dove/Makefile b/arch/arm/mach-dove/Makefile index da373a5768ba..0d31390be069 100644 --- a/arch/arm/mach-dove/Makefile +++ b/arch/arm/mach-dove/Makefile @@ -4,5 +4,4 @@ ccflags-y := -I$(srctree)/arch/arm/plat-orion/include obj-y += common.o obj-$(CONFIG_DOVE_LEGACY) += irq.o mpp.o obj-$(CONFIG_PCI) += pcie.o -obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o obj-$(CONFIG_MACH_CM_A510) += cm-a510.o diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c deleted file mode 100644 index d5bf54040577..000000000000 --- a/arch/arm/mach-dove/dove-db-setup.c +++ /dev/null @@ -1,101 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-dove/dove-db-setup.c - * - * Marvell DB-MV88AP510-BP Development Board Setup - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/irq.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/rawnand.h> -#include <linux/timer.h> -#include <linux/ata_platform.h> -#include <linux/mv643xx_eth.h> -#include <linux/i2c.h> -#include <linux/pci.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/gpio.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "dove.h" -#include "common.h" - -static struct mv643xx_eth_platform_data dove_db_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT, -}; - -static struct mv_sata_platform_data dove_db_sata_data = { - .n_ports = 1, -}; - -/***************************************************************************** - * SPI Devices: - * SPI0: 4M Flash ST-M25P32-VMF6P - ****************************************************************************/ -static const struct flash_platform_data dove_db_spi_flash_data = { - .type = "m25p64", -}; - -static struct spi_board_info __initdata dove_db_spi_flash_info[] = { - { - .modalias = "m25p80", - .platform_data = &dove_db_spi_flash_data, - .irq = -1, - .max_speed_hz = 20000000, - .bus_num = 0, - .chip_select = 0, - }, -}; - -/***************************************************************************** - * PCI - ****************************************************************************/ -static int __init dove_db_pci_init(void) -{ - if (machine_is_dove_db()) - dove_pcie_init(1, 1); - - return 0; -} - -subsys_initcall(dove_db_pci_init); - -/***************************************************************************** - * Board Init - ****************************************************************************/ -static void __init dove_db_init(void) -{ - /* - * Basic Dove setup. Needs to be called early. - */ - dove_init(); - - dove_ge00_init(&dove_db_ge00_data); - dove_ehci0_init(); - dove_ehci1_init(); - dove_sata_init(&dove_db_sata_data); - dove_sdio0_init(); - dove_sdio1_init(); - dove_spi0_init(); - dove_spi1_init(); - dove_uart0_init(); - dove_uart1_init(); - dove_i2c_init(); - spi_register_board_info(dove_db_spi_flash_info, - ARRAY_SIZE(dove_db_spi_flash_info)); -} - -MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board") - .atag_offset = 0x100, - .nr_irqs = DOVE_NR_IRQS, - .init_machine = dove_db_init, - .map_io = dove_map_io, - .init_early = dove_init_early, - .init_irq = dove_init_irq, - .init_time = dove_timer_init, - .restart = dove_restart, -MACHINE_END diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig index 2c40996a444b..703f3d232a60 100644 --- a/arch/arm/mach-ep93xx/Kconfig +++ b/arch/arm/mach-ep93xx/Kconfig @@ -25,13 +25,6 @@ config EP93XX_SOC_COMMON comment "EP93xx Platforms" -config MACH_ADSSPHERE - bool "Support ADS Sphere" - depends on UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the ADS - Sphere board. - config MACH_BK3 bool "Support Liebherr BK3.1" select MACH_TS72XX @@ -98,62 +91,6 @@ config MACH_EDB9315A Say 'Y' here if you want your kernel to support the Cirrus Logic EDB9315A Evaluation Board. -config MACH_GESBC9312 - bool "Support Glomation GESBC-9312-sx" - depends on UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the Glomation - GESBC-9312-sx board. - -config MACH_MICRO9 - bool - -config MACH_MICRO9H - bool "Support Contec Micro9-High" - select MACH_MICRO9 - depends on UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Contec Micro9-High board. - -config MACH_MICRO9M - bool "Support Contec Micro9-Mid" - select MACH_MICRO9 - depends on UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Contec Micro9-Mid board. - -config MACH_MICRO9L - bool "Support Contec Micro9-Lite" - select MACH_MICRO9 - depends on UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Contec Micro9-Lite board. - -config MACH_MICRO9S - bool "Support Contec Micro9-Slim" - select MACH_MICRO9 - depends on UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Contec Micro9-Slim board. - -config MACH_SIM_ONE - bool "Support Simplemachines Sim.One board" - depends on UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Simplemachines Sim.One board. - -config MACH_SNAPPER_CL15 - bool "Support Bluewater Systems Snapper CL15 Module" - depends on UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the Bluewater - Systems Snapper CL15 Module. - config MACH_TS72XX bool "Support Technologic Systems TS-72xx SBC" help diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile index cfad517fac46..62e37403df14 100644 --- a/arch/arm/mach-ep93xx/Makefile +++ b/arch/arm/mach-ep93xx/Makefile @@ -6,11 +6,6 @@ obj-y := core.o clock.o timer-ep93xx.o obj-$(CONFIG_EP93XX_DMA) += dma.o -obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o obj-$(CONFIG_MACH_EDB93XX) += edb93xx.o -obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o -obj-$(CONFIG_MACH_MICRO9) += micro9.o -obj-$(CONFIG_MACH_SIM_ONE) += simone.o -obj-$(CONFIG_MACH_SNAPPER_CL15) += snappercl15.o obj-$(CONFIG_MACH_TS72XX) += ts72xx.o obj-$(CONFIG_MACH_VISION_EP9307)+= vision_ep9307.o diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c deleted file mode 100644 index 0c48d3c5b8e7..000000000000 --- a/arch/arm/mach-ep93xx/adssphere.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-ep93xx/adssphere.c - * ADS Sphere support. - * - * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/sizes.h> - -#include "hardware.h" - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "soc.h" - -static struct ep93xx_eth_data __initdata adssphere_eth_data = { - .phy_id = 1, -}; - -static void __init adssphere_init_machine(void) -{ - ep93xx_init_devices(); - ep93xx_register_flash(4, EP93XX_CS6_PHYS_BASE, SZ_32M); - ep93xx_register_eth(&adssphere_eth_data, 1); -} - -MACHINE_START(ADSSPHERE, "ADS Sphere board") - /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_EP93XX_IRQS, - .map_io = ep93xx_map_io, - .init_irq = ep93xx_init_irq, - .init_time = ep93xx_timer_init, - .init_machine = adssphere_init_machine, - .restart = ep93xx_restart, -MACHINE_END diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c deleted file mode 100644 index 0b7043e3e178..000000000000 --- a/arch/arm/mach-ep93xx/gesbc9312.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-ep93xx/gesbc9312.c - * Glomation GESBC-9312-sx support. - * - * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/sizes.h> - -#include "hardware.h" - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "soc.h" - -static struct ep93xx_eth_data __initdata gesbc9312_eth_data = { - .phy_id = 1, -}; - -static void __init gesbc9312_init_machine(void) -{ - ep93xx_init_devices(); - ep93xx_register_flash(4, EP93XX_CS6_PHYS_BASE, SZ_8M); - ep93xx_register_eth(&gesbc9312_eth_data, 0); -} - -MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") - /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_EP93XX_IRQS, - .map_io = ep93xx_map_io, - .init_irq = ep93xx_init_irq, - .init_time = ep93xx_timer_init, - .init_machine = gesbc9312_init_machine, - .restart = ep93xx_restart, -MACHINE_END diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c deleted file mode 100644 index c121c459aa17..000000000000 --- a/arch/arm/mach-ep93xx/micro9.c +++ /dev/null @@ -1,125 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-ep93xx/micro9.c - * - * Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH - * Manfred Gruber <m.gruber@tirol.com> - * Copyright (C) 2009 Contec Steuerungstechnik & Automation GmbH - * Hubert Feurstein <hubert.feurstein@contec.at> - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include "hardware.h" - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "soc.h" - -/************************************************************************* - * Micro9 NOR Flash - * - * Micro9-High has up to 64MB of 32-bit flash on CS1 - * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1 - * Micro9-Lite uses a separate MTD map driver for flash support - * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1 - *************************************************************************/ -static unsigned int __init micro9_detect_bootwidth(void) -{ - u32 v; - - /* Detect the bus width of the external flash memory */ - v = __raw_readl(EP93XX_SYSCON_SYSCFG); - if (v & EP93XX_SYSCON_SYSCFG_LCSN7) - return 4; /* 32-bit */ - else - return 2; /* 16-bit */ -} - -static void __init micro9_register_flash(void) -{ - unsigned int width; - - if (machine_is_micro9()) - width = 4; - else if (machine_is_micro9m() || machine_is_micro9s()) - width = micro9_detect_bootwidth(); - else - width = 0; - - if (width) - ep93xx_register_flash(width, EP93XX_CS1_PHYS_BASE, SZ_64M); -} - - -/************************************************************************* - * Micro9 Ethernet - *************************************************************************/ -static struct ep93xx_eth_data __initdata micro9_eth_data = { - .phy_id = 0x1f, -}; - - -static void __init micro9_init_machine(void) -{ - ep93xx_init_devices(); - ep93xx_register_eth(µ9_eth_data, 1); - micro9_register_flash(); -} - - -#ifdef CONFIG_MACH_MICRO9H -MACHINE_START(MICRO9, "Contec Micro9-High") - /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ - .atag_offset = 0x100, - .nr_irqs = NR_EP93XX_IRQS, - .map_io = ep93xx_map_io, - .init_irq = ep93xx_init_irq, - .init_time = ep93xx_timer_init, - .init_machine = micro9_init_machine, - .restart = ep93xx_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_MICRO9M -MACHINE_START(MICRO9M, "Contec Micro9-Mid") - /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ - .atag_offset = 0x100, - .nr_irqs = NR_EP93XX_IRQS, - .map_io = ep93xx_map_io, - .init_irq = ep93xx_init_irq, - .init_time = ep93xx_timer_init, - .init_machine = micro9_init_machine, - .restart = ep93xx_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_MICRO9L -MACHINE_START(MICRO9L, "Contec Micro9-Lite") - /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ - .atag_offset = 0x100, - .nr_irqs = NR_EP93XX_IRQS, - .map_io = ep93xx_map_io, - .init_irq = ep93xx_init_irq, - .init_time = ep93xx_timer_init, - .init_machine = micro9_init_machine, - .restart = ep93xx_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_MICRO9S -MACHINE_START(MICRO9S, "Contec Micro9-Slim") - /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ - .atag_offset = 0x100, - .nr_irqs = NR_EP93XX_IRQS, - .map_io = ep93xx_map_io, - .init_irq = ep93xx_init_irq, - .init_time = ep93xx_timer_init, - .init_machine = micro9_init_machine, - .restart = ep93xx_restart, -MACHINE_END -#endif diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c deleted file mode 100644 index 569e72413561..000000000000 --- a/arch/arm/mach-ep93xx/simone.c +++ /dev/null @@ -1,128 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-ep93xx/simone.c - * Simplemachines Sim.One support. - * - * Copyright (C) 2010 Ryan Mallon - * - * Based on the 2.6.24.7 support: - * Copyright (C) 2009 Simplemachines - * MMC support by Peter Ivanov <ivanovp@gmail.com>, 2007 - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/mmc/host.h> -#include <linux/spi/spi.h> -#include <linux/spi/mmc_spi.h> -#include <linux/platform_data/video-ep93xx.h> -#include <linux/platform_data/spi-ep93xx.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> - -#include "hardware.h" -#include "gpio-ep93xx.h" - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "soc.h" - -static struct ep93xx_eth_data __initdata simone_eth_data = { - .phy_id = 1, -}; - -static struct ep93xxfb_mach_info __initdata simone_fb_info = { - .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING, -}; - -static struct mmc_spi_platform_data simone_mmc_spi_data = { - .detect_delay = 500, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table simone_mmc_spi_gpio_table = { - .dev_id = "mmc_spi.0", /* "mmc_spi" @ CS0 */ - .table = { - /* Card detect */ - GPIO_LOOKUP_IDX("A", 0, NULL, 0, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct spi_board_info simone_spi_devices[] __initdata = { - { - .modalias = "mmc_spi", - .platform_data = &simone_mmc_spi_data, - /* - * We use 10 MHz even though the maximum is 3.7 MHz. The driver - * will limit it automatically to max. frequency. - */ - .max_speed_hz = 10 * 1000 * 1000, - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_3, - }, -}; - -/* - * Up to v1.3, the Sim.One used SFRMOUT as SD card chip select, but this goes - * low between multi-message command blocks. From v1.4, it uses a GPIO instead. - * v1.3 parts will still work, since the signal on SFRMOUT is automatic. - */ -static struct gpiod_lookup_table simone_spi_cs_gpio_table = { - .dev_id = "spi0", - .table = { - GPIO_LOOKUP("A", 1, "cs", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct ep93xx_spi_info simone_spi_info __initdata = { - .use_dma = 1, -}; - -static struct i2c_board_info __initdata simone_i2c_board_info[] = { - { - I2C_BOARD_INFO("ds1337", 0x68), - }, -}; - -static struct platform_device simone_audio_device = { - .name = "simone-audio", - .id = -1, -}; - -static void __init simone_register_audio(void) -{ - ep93xx_register_ac97(); - platform_device_register(&simone_audio_device); -} - -static void __init simone_init_machine(void) -{ - ep93xx_init_devices(); - ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_8M); - ep93xx_register_eth(&simone_eth_data, 1); - ep93xx_register_fb(&simone_fb_info); - ep93xx_register_i2c(simone_i2c_board_info, - ARRAY_SIZE(simone_i2c_board_info)); - gpiod_add_lookup_table(&simone_mmc_spi_gpio_table); - gpiod_add_lookup_table(&simone_spi_cs_gpio_table); - ep93xx_register_spi(&simone_spi_info, simone_spi_devices, - ARRAY_SIZE(simone_spi_devices)); - simone_register_audio(); -} - -MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board") - /* Maintainer: Ryan Mallon */ - .atag_offset = 0x100, - .nr_irqs = NR_EP93XX_IRQS, - .map_io = ep93xx_map_io, - .init_irq = ep93xx_init_irq, - .init_time = ep93xx_timer_init, - .init_machine = simone_init_machine, - .restart = ep93xx_restart, -MACHINE_END diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c deleted file mode 100644 index 1dfb725671b1..000000000000 --- a/arch/arm/mach-ep93xx/snappercl15.c +++ /dev/null @@ -1,162 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-ep93xx/snappercl15.c - * Bluewater Systems Snapper CL15 system module - * - * Copyright (C) 2009 Bluewater Systems Ltd - * Author: Ryan Mallon - * - * NAND code adapted from driver by: - * Andre Renaud <andre@bluewatersys.com> - * James R. McKaskill - */ - -#include <linux/platform_device.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/i2c.h> -#include <linux/fb.h> - -#include <linux/mtd/platnand.h> - -#include "hardware.h" -#include <linux/platform_data/video-ep93xx.h> -#include "gpio-ep93xx.h" - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "soc.h" - -#define SNAPPERCL15_NAND_BASE (EP93XX_CS7_PHYS_BASE + SZ_16M) - -#define SNAPPERCL15_NAND_WPN (1 << 8) /* Write protect (active low) */ -#define SNAPPERCL15_NAND_ALE (1 << 9) /* Address latch */ -#define SNAPPERCL15_NAND_CLE (1 << 10) /* Command latch */ -#define SNAPPERCL15_NAND_CEN (1 << 11) /* Chip enable (active low) */ -#define SNAPPERCL15_NAND_RDY (1 << 14) /* Device ready */ - -#define NAND_CTRL_ADDR(chip) (chip->legacy.IO_ADDR_W + 0x40) - -static void snappercl15_nand_cmd_ctrl(struct nand_chip *chip, int cmd, - unsigned int ctrl) -{ - static u16 nand_state = SNAPPERCL15_NAND_WPN; - u16 set; - - if (ctrl & NAND_CTRL_CHANGE) { - set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN; - - if (ctrl & NAND_NCE) - set &= ~SNAPPERCL15_NAND_CEN; - if (ctrl & NAND_CLE) - set |= SNAPPERCL15_NAND_CLE; - if (ctrl & NAND_ALE) - set |= SNAPPERCL15_NAND_ALE; - - nand_state &= ~(SNAPPERCL15_NAND_CEN | - SNAPPERCL15_NAND_CLE | - SNAPPERCL15_NAND_ALE); - nand_state |= set; - __raw_writew(nand_state, NAND_CTRL_ADDR(chip)); - } - - if (cmd != NAND_CMD_NONE) - __raw_writew((cmd & 0xff) | nand_state, - chip->legacy.IO_ADDR_W); -} - -static int snappercl15_nand_dev_ready(struct nand_chip *chip) -{ - return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY); -} - -static struct mtd_partition snappercl15_nand_parts[] = { - { - .name = "Kernel", - .offset = 0, - .size = SZ_2M, - }, - { - .name = "Filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct platform_nand_data snappercl15_nand_data = { - .chip = { - .nr_chips = 1, - .partitions = snappercl15_nand_parts, - .nr_partitions = ARRAY_SIZE(snappercl15_nand_parts), - .chip_delay = 25, - }, - .ctrl = { - .dev_ready = snappercl15_nand_dev_ready, - .cmd_ctrl = snappercl15_nand_cmd_ctrl, - }, -}; - -static struct resource snappercl15_nand_resource[] = { - { - .start = SNAPPERCL15_NAND_BASE, - .end = SNAPPERCL15_NAND_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device snappercl15_nand_device = { - .name = "gen_nand", - .id = -1, - .dev.platform_data = &snappercl15_nand_data, - .resource = snappercl15_nand_resource, - .num_resources = ARRAY_SIZE(snappercl15_nand_resource), -}; - -static struct ep93xx_eth_data __initdata snappercl15_eth_data = { - .phy_id = 1, -}; - -static struct i2c_board_info __initdata snappercl15_i2c_data[] = { - { - /* Audio codec */ - I2C_BOARD_INFO("tlv320aic23", 0x1a), - }, -}; - -static struct ep93xxfb_mach_info __initdata snappercl15_fb_info = { -}; - -static struct platform_device snappercl15_audio_device = { - .name = "snappercl15-audio", - .id = -1, -}; - -static void __init snappercl15_register_audio(void) -{ - ep93xx_register_i2s(); - platform_device_register(&snappercl15_audio_device); -} - -static void __init snappercl15_init_machine(void) -{ - ep93xx_init_devices(); - ep93xx_register_eth(&snappercl15_eth_data, 1); - ep93xx_register_i2c(snappercl15_i2c_data, - ARRAY_SIZE(snappercl15_i2c_data)); - ep93xx_register_fb(&snappercl15_fb_info); - snappercl15_register_audio(); - platform_device_register(&snappercl15_nand_device); -} - -MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15") - /* Maintainer: Ryan Mallon */ - .atag_offset = 0x100, - .nr_irqs = NR_EP93XX_IRQS, - .map_io = ep93xx_map_io, - .init_irq = ep93xx_init_irq, - .init_time = ep93xx_timer_init, - .init_machine = snappercl15_init_machine, - .restart = ep93xx_restart, -MACHINE_END diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig index b5e7cbfed119..78189997caa1 100644 --- a/arch/arm/mach-footbridge/Kconfig +++ b/arch/arm/mach-footbridge/Kconfig @@ -16,18 +16,6 @@ menuconfig ARCH_FOOTBRIDGE if ARCH_FOOTBRIDGE -config ARCH_CATS - bool "CATS" - depends on UNUSED_BOARD_FILES - select CLKEVT_I8253 - select CLKSRC_I8253 - select ISA - select FORCE_PCI - help - Say Y here if you intend to run this kernel on the CATS. - - Saying N will reduce the size of the Footbridge kernel. - config ARCH_EBSA285_HOST bool "EBSA285 (host mode)" select ARCH_EBSA285 diff --git a/arch/arm/mach-footbridge/Makefile b/arch/arm/mach-footbridge/Makefile index 55d570739f19..1553cc01b45c 100644 --- a/arch/arm/mach-footbridge/Makefile +++ b/arch/arm/mach-footbridge/Makefile @@ -8,11 +8,9 @@ obj-y := common.o isa-irq.o isa.o isa-rtc.o dma-isa.o pci-y += dc21285.o -pci-$(CONFIG_ARCH_CATS) += cats-pci.o pci-$(CONFIG_ARCH_EBSA285) += ebsa285-pci.o pci-$(CONFIG_ARCH_NETWINDER) += netwinder-pci.o -obj-$(CONFIG_ARCH_CATS) += cats-hw.o isa-timer.o obj-$(CONFIG_ARCH_EBSA285) += ebsa285.o dc21285-timer.o obj-$(CONFIG_ARCH_NETWINDER) += netwinder-hw.o isa-timer.o diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c deleted file mode 100644 index e575dc0698cd..000000000000 --- a/arch/arm/mach-footbridge/cats-hw.c +++ /dev/null @@ -1,98 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * linux/arch/arm/mach-footbridge/cats-hw.c - * - * CATS machine fixup - * - * Copyright (C) 1998, 1999 Russell King, Phil Blundell - */ -#include <linux/ioport.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/screen_info.h> -#include <linux/io.h> -#include <linux/spinlock.h> - -#include <asm/hardware/dec21285.h> -#include <asm/mach-types.h> -#include <asm/setup.h> - -#include <asm/mach/arch.h> - -#include "common.h" - -#define CFG_PORT 0x370 -#define INDEX_PORT (CFG_PORT) -#define DATA_PORT (CFG_PORT + 1) - -static int __init cats_hw_init(void) -{ - if (machine_is_cats()) { - /* Set Aladdin to CONFIGURE mode */ - outb(0x51, CFG_PORT); - outb(0x23, CFG_PORT); - - /* Select logical device 3 */ - outb(0x07, INDEX_PORT); - outb(0x03, DATA_PORT); - - /* Set parallel port to DMA channel 3, ECP+EPP1.9, - enable EPP timeout */ - outb(0x74, INDEX_PORT); - outb(0x03, DATA_PORT); - - outb(0xf0, INDEX_PORT); - outb(0x0f, DATA_PORT); - - outb(0xf1, INDEX_PORT); - outb(0x07, DATA_PORT); - - /* Select logical device 4 */ - outb(0x07, INDEX_PORT); - outb(0x04, DATA_PORT); - - /* UART1 high speed mode */ - outb(0xf0, INDEX_PORT); - outb(0x02, DATA_PORT); - - /* Select logical device 5 */ - outb(0x07, INDEX_PORT); - outb(0x05, DATA_PORT); - - /* UART2 high speed mode */ - outb(0xf0, INDEX_PORT); - outb(0x02, DATA_PORT); - - /* Set Aladdin to RUN mode */ - outb(0xbb, CFG_PORT); - } - - return 0; -} - -__initcall(cats_hw_init); - -/* - * CATS uses soft-reboot by default, since - * hard reboots fail on early boards. - */ -static void __init -fixup_cats(struct tag *tags, char **cmdline) -{ -#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) - screen_info.orig_video_lines = 25; - screen_info.orig_video_points = 16; - screen_info.orig_y = 24; -#endif -} - -MACHINE_START(CATS, "Chalice-CATS") - /* Maintainer: Philip Blundell */ - .atag_offset = 0x100, - .reboot_mode = REBOOT_SOFT, - .fixup = fixup_cats, - .map_io = footbridge_map_io, - .init_irq = footbridge_init_irq, - .init_time = isa_timer_init, - .restart = footbridge_restart, -MACHINE_END diff --git a/arch/arm/mach-footbridge/cats-pci.c b/arch/arm/mach-footbridge/cats-pci.c deleted file mode 100644 index 90b1e9be430e..000000000000 --- a/arch/arm/mach-footbridge/cats-pci.c +++ /dev/null @@ -1,64 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * linux/arch/arm/mach-footbridge/cats-pci.c - * - * PCI bios-type initialisation for PCI machines - * - * Bits taken from various places. - */ -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/init.h> - -#include <asm/irq.h> -#include <asm/mach/pci.h> -#include <asm/mach-types.h> - -/* cats host-specific stuff */ -static int irqmap_cats[] = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 }; - -static u8 cats_no_swizzle(struct pci_dev *dev, u8 *pin) -{ - return 0; -} - -static int cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - if (dev->irq >= 255) - return -1; /* not a valid interrupt. */ - - if (dev->irq >= 128) - return dev->irq & 0x1f; - - if (dev->irq >= 1 && dev->irq <= 4) - return irqmap_cats[dev->irq - 1]; - - if (dev->irq != 0) - printk("PCI: device %02x:%02x has unknown irq line %x\n", - dev->bus->number, dev->devfn, dev->irq); - - return -1; -} - -/* - * why not the standard PCI swizzle? does this prevent 4-port tulip - * cards being used (ie, pci-pci bridge based cards)? - */ -static struct hw_pci cats_pci __initdata = { - .swizzle = cats_no_swizzle, - .map_irq = cats_map_irq, - .nr_controllers = 1, - .ops = &dc21285_ops, - .setup = dc21285_setup, - .preinit = dc21285_preinit, - .postinit = dc21285_postinit, -}; - -static int __init cats_pci_init(void) -{ - if (machine_is_cats()) - pci_common_init(&cats_pci); - return 0; -} - -subsys_initcall(cats_pci_init); diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 629e4676ed77..85c598708c10 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -206,9 +206,6 @@ void __init footbridge_init_irq(void) */ isa_init_irq(IRQ_PCI); - if (machine_is_cats()) - isa_init_irq(IRQ_IN2); - if (machine_is_netwinder()) isa_init_irq(IRQ_IN3); } diff --git a/arch/arm/mach-iop32x/Kconfig b/arch/arm/mach-iop32x/Kconfig deleted file mode 100644 index 761fbb04faa1..000000000000 --- a/arch/arm/mach-iop32x/Kconfig +++ /dev/null @@ -1,54 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -menuconfig ARCH_IOP32X - bool "IOP32x-based platforms" - depends on ARCH_MULTI_V5 - depends on CPU_LITTLE_ENDIAN - depends on ATAGS && UNUSED_BOARD_FILES - select CPU_XSCALE - select GPIO_IOP - select GPIOLIB - select FORCE_PCI - help - Support for Intel's 80219 and IOP32X (XScale) family of - processors. - -if ARCH_IOP32X - -config MACH_EP80219 - bool - -config MACH_GLANTANK - bool "Enable support for the IO-Data GLAN Tank" - help - Say Y here if you want to run your kernel on the GLAN Tank - NAS appliance or machines from IO-Data's HDL-Gxxx, HDL-GWxxx - and HDL-GZxxx series. - -config ARCH_IQ80321 - bool "Enable support for IQ80321" - help - Say Y here if you want to run your kernel on the Intel IQ80321 - evaluation kit for the IOP321 processor. - -config ARCH_IQ31244 - bool "Enable support for EP80219/IQ31244" - select MACH_EP80219 - help - Say Y here if you want to run your kernel on the Intel EP80219 - evaluation kit for the Intel 80219 processor (a IOP321 variant) - or the IQ31244 evaluation kit for the IOP321 processor. - -config MACH_N2100 - bool "Enable support for the Thecus n2100" - help - Say Y here if you want to run your kernel on the Thecus n2100 - NAS appliance. - -config MACH_EM7210 - bool "Enable support for the Lanner EM7210" - help - Say Y here if you want to run your kernel on the Lanner EM7210 - board. Say also Y here if you have a SS4000e Baxter Creek NAS - appliance." - -endif diff --git a/arch/arm/mach-iop32x/Makefile b/arch/arm/mach-iop32x/Makefile deleted file mode 100644 index c8018ef5c6a9..000000000000 --- a/arch/arm/mach-iop32x/Makefile +++ /dev/null @@ -1,20 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Makefile for the linux kernel. -# - -obj-$(CONFIG_ARCH_IOP32X) += irq.o -obj-$(CONFIG_ARCH_IOP32X) += i2c.o -obj-$(CONFIG_ARCH_IOP32X) += pci.o -obj-$(CONFIG_ARCH_IOP32X) += setup.o -obj-$(CONFIG_ARCH_IOP32X) += time.o -obj-$(CONFIG_ARCH_IOP32X) += cp6.o -obj-$(CONFIG_ARCH_IOP32X) += adma.o -obj-$(CONFIG_ARCH_IOP32X) += pmu.o -obj-$(CONFIG_ARCH_IOP32X) += restart.o - -obj-$(CONFIG_MACH_GLANTANK) += glantank.o -obj-$(CONFIG_ARCH_IQ80321) += iq80321.o -obj-$(CONFIG_ARCH_IQ31244) += iq31244.o -obj-$(CONFIG_MACH_N2100) += n2100.o -obj-$(CONFIG_MACH_EM7210) += em7210.o diff --git a/arch/arm/mach-iop32x/adma.c b/arch/arm/mach-iop32x/adma.c deleted file mode 100644 index 764bcbff98df..000000000000 --- a/arch/arm/mach-iop32x/adma.c +++ /dev/null @@ -1,163 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * platform device definitions for the iop3xx dma/xor engines - * Copyright © 2006, Intel Corporation. - */ -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/platform_data/dma-iop32x.h> - -#include "iop3xx.h" -#include "irqs.h" - -#define IRQ_DMA0_EOT IRQ_IOP32X_DMA0_EOT -#define IRQ_DMA0_EOC IRQ_IOP32X_DMA0_EOC -#define IRQ_DMA0_ERR IRQ_IOP32X_DMA0_ERR - -#define IRQ_DMA1_EOT IRQ_IOP32X_DMA1_EOT -#define IRQ_DMA1_EOC IRQ_IOP32X_DMA1_EOC -#define IRQ_DMA1_ERR IRQ_IOP32X_DMA1_ERR - -#define IRQ_AA_EOT IRQ_IOP32X_AA_EOT -#define IRQ_AA_EOC IRQ_IOP32X_AA_EOC -#define IRQ_AA_ERR IRQ_IOP32X_AA_ERR - -/* AAU and DMA Channels */ -static struct resource iop3xx_dma_0_resources[] = { - [0] = { - .start = IOP3XX_DMA_PHYS_BASE(0), - .end = IOP3XX_DMA_UPPER_PA(0), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_DMA0_EOT, - .end = IRQ_DMA0_EOT, - .flags = IORESOURCE_IRQ - }, - [2] = { - .start = IRQ_DMA0_EOC, - .end = IRQ_DMA0_EOC, - .flags = IORESOURCE_IRQ - }, - [3] = { - .start = IRQ_DMA0_ERR, - .end = IRQ_DMA0_ERR, - .flags = IORESOURCE_IRQ - } -}; - -static struct resource iop3xx_dma_1_resources[] = { - [0] = { - .start = IOP3XX_DMA_PHYS_BASE(1), - .end = IOP3XX_DMA_UPPER_PA(1), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_DMA1_EOT, - .end = IRQ_DMA1_EOT, - .flags = IORESOURCE_IRQ - }, - [2] = { - .start = IRQ_DMA1_EOC, - .end = IRQ_DMA1_EOC, - .flags = IORESOURCE_IRQ - }, - [3] = { - .start = IRQ_DMA1_ERR, - .end = IRQ_DMA1_ERR, - .flags = IORESOURCE_IRQ - } -}; - - -static struct resource iop3xx_aau_resources[] = { - [0] = { - .start = IOP3XX_AAU_PHYS_BASE, - .end = IOP3XX_AAU_UPPER_PA, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_AA_EOT, - .end = IRQ_AA_EOT, - .flags = IORESOURCE_IRQ - }, - [2] = { - .start = IRQ_AA_EOC, - .end = IRQ_AA_EOC, - .flags = IORESOURCE_IRQ - }, - [3] = { - .start = IRQ_AA_ERR, - .end = IRQ_AA_ERR, - .flags = IORESOURCE_IRQ - } -}; - -static u64 iop3xx_adma_dmamask = DMA_BIT_MASK(32); - -static struct iop_adma_platform_data iop3xx_dma_0_data = { - .hw_id = DMA0_ID, - .pool_size = PAGE_SIZE, -}; - -static struct iop_adma_platform_data iop3xx_dma_1_data = { - .hw_id = DMA1_ID, - .pool_size = PAGE_SIZE, -}; - -static struct iop_adma_platform_data iop3xx_aau_data = { - .hw_id = AAU_ID, - .pool_size = 3 * PAGE_SIZE, -}; - -struct platform_device iop3xx_dma_0_channel = { - .name = "iop-adma", - .id = 0, - .num_resources = 4, - .resource = iop3xx_dma_0_resources, - .dev = { - .dma_mask = &iop3xx_adma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = (void *) &iop3xx_dma_0_data, - }, -}; - -struct platform_device iop3xx_dma_1_channel = { - .name = "iop-adma", - .id = 1, - .num_resources = 4, - .resource = iop3xx_dma_1_resources, - .dev = { - .dma_mask = &iop3xx_adma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = (void *) &iop3xx_dma_1_data, - }, -}; - -struct platform_device iop3xx_aau_channel = { - .name = "iop-adma", - .id = 2, - .num_resources = 4, - .resource = iop3xx_aau_resources, - .dev = { - .dma_mask = &iop3xx_adma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = (void *) &iop3xx_aau_data, - }, -}; - -static int __init iop3xx_adma_cap_init(void) -{ - dma_cap_set(DMA_MEMCPY, iop3xx_dma_0_data.cap_mask); - dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask); - - dma_cap_set(DMA_MEMCPY, iop3xx_dma_1_data.cap_mask); - dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask); - - dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask); - dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask); - - return 0; -} - -arch_initcall(iop3xx_adma_cap_init); diff --git a/arch/arm/mach-iop32x/cp6.c b/arch/arm/mach-iop32x/cp6.c deleted file mode 100644 index 7135a0ac9949..000000000000 --- a/arch/arm/mach-iop32x/cp6.c +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * IOP Coprocessor-6 access handler - * Copyright (c) 2006, Intel Corporation. - */ -#include <linux/init.h> -#include <asm/traps.h> -#include <asm/ptrace.h> - -#include "iop3xx.h" - -void iop_enable_cp6(void) -{ - u32 temp; - - /* enable cp6 access */ - asm volatile ( - "mrc p15, 0, %0, c15, c1, 0\n\t" - "orr %0, %0, #(1 << 6)\n\t" - "mcr p15, 0, %0, c15, c1, 0\n\t" - "mrc p15, 0, %0, c15, c1, 0\n\t" - "mov %0, %0\n\t" - "sub pc, pc, #4 @ cp_wait\n\t" - : "=r"(temp)); -} - -static int cp6_trap(struct pt_regs *regs, unsigned int instr) -{ - iop_enable_cp6(); - - return 0; -} - -/* permit kernel space cp6 access - * deny user space cp6 access - */ -static struct undef_hook cp6_hook = { - .instr_mask = 0x0f000ff0, - .instr_val = 0x0e000610, - .cpsr_mask = MODE_MASK, - .cpsr_val = SVC_MODE, - .fn = cp6_trap, -}; - -void __init iop_init_cp6_handler(void) -{ - register_undef_hook(&cp6_hook); -} diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c deleted file mode 100644 index ac130aba5a6e..000000000000 --- a/arch/arm/mach-iop32x/em7210.c +++ /dev/null @@ -1,232 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-iop32x/em7210.c - * - * Board support code for the Lanner EM7210 platforms. - * - * Based on arch/arm/mach-iop32x/iq31244.c file. - * - * Copyright (C) 2007 Arnaud Patard <arnaud.patard@rtp-net.org> - */ - -#include <linux/mm.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/pm.h> -#include <linux/serial_core.h> -#include <linux/serial_8250.h> -#include <linux/mtd/physmap.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/pci.h> -#include <asm/mach/time.h> -#include <asm/mach-types.h> - -#include "hardware.h" -#include "gpio-iop32x.h" -#include "irqs.h" - -static void __init em7210_timer_init(void) -{ - /* http://www.kwaak.net/fotos/fotos-nas/slide_24.html */ - /* 33.333 MHz crystal. */ - iop_init_time(200000000); -} - -/* - * EM7210 RTC - */ -static struct i2c_board_info __initdata em7210_i2c_devices[] = { - { - I2C_BOARD_INFO("rs5c372a", 0x32), - }, -}; - -/* - * EM7210 I/O - */ -static struct map_desc em7210_io_desc[] __initdata = { - { /* on-board devices */ - .virtual = IQ31244_UART, - .pfn = __phys_to_pfn(IQ31244_UART), - .length = 0x00100000, - .type = MT_DEVICE, - }, -}; - -void __init em7210_map_io(void) -{ - iop3xx_map_io(); - iotable_init(em7210_io_desc, ARRAY_SIZE(em7210_io_desc)); -} - - -/* - * EM7210 PCI - */ -#define INTA IRQ_IOP32X_XINT0 -#define INTB IRQ_IOP32X_XINT1 -#define INTC IRQ_IOP32X_XINT2 -#define INTD IRQ_IOP32X_XINT3 - -static int __init -em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - static int pci_irq_table[][4] = { - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - {INTB, INTB, INTB, INTB}, /* console / uart */ - {INTA, INTA, INTA, INTA}, /* 1st 82541 */ - {INTD, INTD, INTD, INTD}, /* 2nd 82541 */ - {INTC, INTC, INTC, INTC}, /* GD31244 */ - {INTD, INTA, INTA, INTA}, /* mini-PCI */ - {INTD, INTC, INTA, INTA}, /* NEC USB */ - }; - - if (pin < 1 || pin > 4) - return -1; - - return pci_irq_table[slot % 6][pin - 1]; -} - -static struct hw_pci em7210_pci __initdata = { - .nr_controllers = 1, - .ops = &iop3xx_ops, - .setup = iop3xx_pci_setup, - .preinit = iop3xx_pci_preinit, - .map_irq = em7210_pci_map_irq, -}; - -static int __init em7210_pci_init(void) -{ - if (machine_is_em7210()) - pci_common_init(&em7210_pci); - - return 0; -} - -subsys_initcall(em7210_pci_init); - - -/* - * EM7210 Flash - */ -static struct physmap_flash_data em7210_flash_data = { - .width = 2, -}; - -static struct resource em7210_flash_resource = { - .start = 0xf0000000, - .end = 0xf1ffffff, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device em7210_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &em7210_flash_data, - }, - .num_resources = 1, - .resource = &em7210_flash_resource, -}; - - -/* - * EM7210 UART - * The physical address of the serial port is 0xfe800000, - * so it can be used for physical and virtual address. - */ -static struct plat_serial8250_port em7210_serial_port[] = { - { - .mapbase = IQ31244_UART, - .membase = (char *)IQ31244_UART, - .irq = IRQ_IOP32X_XINT1, - .flags = UPF_SKIP_TEST, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = 1843200, - }, - { }, -}; - -static struct resource em7210_uart_resource = { - .start = IQ31244_UART, - .end = IQ31244_UART + 7, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device em7210_serial_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = em7210_serial_port, - }, - .num_resources = 1, - .resource = &em7210_uart_resource, -}; - -#define EM7210_HARDWARE_POWER 0 - -void em7210_power_off(void) -{ - int ret; - - ret = gpio_direction_output(EM7210_HARDWARE_POWER, 1); - if (ret) - pr_crit("could not drive power off GPIO high\n"); -} - -static int __init em7210_request_gpios(void) -{ - int ret; - - if (!machine_is_em7210()) - return 0; - - ret = gpio_request(EM7210_HARDWARE_POWER, "power"); - if (ret) { - pr_err("could not request power off GPIO\n"); - return 0; - } - - pm_power_off = em7210_power_off; - - return 0; -} -device_initcall(em7210_request_gpios); - -static void __init em7210_init_machine(void) -{ - register_iop32x_gpio(); - platform_device_register(&em7210_serial_device); - gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); - gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup); - platform_device_register(&iop3xx_i2c0_device); - platform_device_register(&iop3xx_i2c1_device); - platform_device_register(&em7210_flash_device); - platform_device_register(&iop3xx_dma_0_channel); - platform_device_register(&iop3xx_dma_1_channel); - - i2c_register_board_info(0, em7210_i2c_devices, - ARRAY_SIZE(em7210_i2c_devices)); -} - -MACHINE_START(EM7210, "Lanner EM7210") - .atag_offset = 0x100, - .nr_irqs = IOP32X_NR_IRQS, - .map_io = em7210_map_io, - .init_irq = iop32x_init_irq, - .init_time = em7210_timer_init, - .init_machine = em7210_init_machine, - .restart = iop3xx_restart, -MACHINE_END diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c deleted file mode 100644 index cd6e7da2ea10..000000000000 --- a/arch/arm/mach-iop32x/glantank.c +++ /dev/null @@ -1,214 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-iop32x/glantank.c - * - * Board support code for the GLAN Tank. - * - * Copyright (C) 2006, 2007 Martin Michlmayr <tbm@cyrius.com> - * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> - */ - -#include <linux/mm.h> -#include <linux/init.h> -#include <linux/f75375s.h> -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/pm.h> -#include <linux/string.h> -#include <linux/serial_core.h> -#include <linux/serial_8250.h> -#include <linux/mtd/physmap.h> -#include <linux/i2c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio/machine.h> -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/pci.h> -#include <asm/mach/time.h> -#include <asm/mach-types.h> -#include <asm/page.h> - -#include "hardware.h" -#include "gpio-iop32x.h" -#include "irqs.h" - -/* - * GLAN Tank timer tick configuration. - */ -static void __init glantank_timer_init(void) -{ - /* 33.333 MHz crystal. */ - iop_init_time(200000000); -} - - -/* - * GLAN Tank I/O. - */ -static struct map_desc glantank_io_desc[] __initdata = { - { /* on-board devices */ - .virtual = GLANTANK_UART, - .pfn = __phys_to_pfn(GLANTANK_UART), - .length = 0x00100000, - .type = MT_DEVICE - }, -}; - -void __init glantank_map_io(void) -{ - iop3xx_map_io(); - iotable_init(glantank_io_desc, ARRAY_SIZE(glantank_io_desc)); -} - - -/* - * GLAN Tank PCI. - */ -#define INTA IRQ_IOP32X_XINT0 -#define INTB IRQ_IOP32X_XINT1 -#define INTC IRQ_IOP32X_XINT2 -#define INTD IRQ_IOP32X_XINT3 - -static int __init -glantank_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - static int pci_irq_table[][4] = { - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - {INTD, INTD, INTD, INTD}, /* UART (8250) */ - {INTA, INTA, INTA, INTA}, /* Ethernet (E1000) */ - {INTB, INTB, INTB, INTB}, /* IDE (AEC6280R) */ - {INTC, INTC, INTC, INTC}, /* USB (NEC) */ - }; - - BUG_ON(pin < 1 || pin > 4); - - return pci_irq_table[slot % 4][pin - 1]; -} - -static struct hw_pci glantank_pci __initdata = { - .nr_controllers = 1, - .ops = &iop3xx_ops, - .setup = iop3xx_pci_setup, - .preinit = iop3xx_pci_preinit, - .map_irq = glantank_pci_map_irq, -}; - -static int __init glantank_pci_init(void) -{ - if (machine_is_glantank()) - pci_common_init(&glantank_pci); - - return 0; -} - -subsys_initcall(glantank_pci_init); - - -/* - * GLAN Tank machine initialization. - */ -static struct physmap_flash_data glantank_flash_data = { - .width = 2, -}; - -static struct resource glantank_flash_resource = { - .start = 0xf0000000, - .end = 0xf007ffff, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device glantank_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &glantank_flash_data, - }, - .num_resources = 1, - .resource = &glantank_flash_resource, -}; - -static struct plat_serial8250_port glantank_serial_port[] = { - { - .mapbase = GLANTANK_UART, - .membase = (char *)GLANTANK_UART, - .irq = IRQ_IOP32X_XINT3, - .flags = UPF_SKIP_TEST, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = 1843200, - }, - { }, -}; - -static struct resource glantank_uart_resource = { - .start = GLANTANK_UART, - .end = GLANTANK_UART + 7, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device glantank_serial_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = glantank_serial_port, - }, - .num_resources = 1, - .resource = &glantank_uart_resource, -}; - -static struct f75375s_platform_data glantank_f75375s = { - .pwm = { 255, 255 }, - .pwm_enable = { 0, 0 }, -}; - -static struct i2c_board_info __initdata glantank_i2c_devices[] = { - { - I2C_BOARD_INFO("rs5c372a", 0x32), - }, - { - I2C_BOARD_INFO("f75375", 0x2e), - .platform_data = &glantank_f75375s, - }, -}; - -static void glantank_power_off(void) -{ - __raw_writeb(0x01, IOMEM(0xfe8d0004)); - - while (1) - ; -} - -static void __init glantank_init_machine(void) -{ - register_iop32x_gpio(); - gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); - gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup); - platform_device_register(&iop3xx_i2c0_device); - platform_device_register(&iop3xx_i2c1_device); - platform_device_register(&glantank_flash_device); - platform_device_register(&glantank_serial_device); - platform_device_register(&iop3xx_dma_0_channel); - platform_device_register(&iop3xx_dma_1_channel); - - i2c_register_board_info(0, glantank_i2c_devices, - ARRAY_SIZE(glantank_i2c_devices)); - - pm_power_off = glantank_power_off; -} - -MACHINE_START(GLANTANK, "GLAN Tank") - /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ - .atag_offset = 0x100, - .nr_irqs = IOP32X_NR_IRQS, - .map_io = glantank_map_io, - .init_irq = iop32x_init_irq, - .init_time = glantank_timer_init, - .init_machine = glantank_init_machine, - .restart = iop3xx_restart, -MACHINE_END diff --git a/arch/arm/mach-iop32x/glantank.h b/arch/arm/mach-iop32x/glantank.h deleted file mode 100644 index f38e86b82c3d..000000000000 --- a/arch/arm/mach-iop32x/glantank.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * IO-Data GLAN Tank board registers - */ - -#ifndef __GLANTANK_H -#define __GLANTANK_H - -#define GLANTANK_UART 0xfe800000 /* UART */ - - -#endif diff --git a/arch/arm/mach-iop32x/gpio-iop32x.h b/arch/arm/mach-iop32x/gpio-iop32x.h deleted file mode 100644 index 20af87e4c5e8..000000000000 --- a/arch/arm/mach-iop32x/gpio-iop32x.h +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -static struct resource iop32x_gpio_res[] = { - DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x07c4), 0x10), -}; - -static inline void register_iop32x_gpio(void) -{ - platform_device_register_simple("gpio-iop", 0, - iop32x_gpio_res, - ARRAY_SIZE(iop32x_gpio_res)); -} diff --git a/arch/arm/mach-iop32x/hardware.h b/arch/arm/mach-iop32x/hardware.h deleted file mode 100644 index 43ab4fb8f9b0..000000000000 --- a/arch/arm/mach-iop32x/hardware.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __HARDWARE_H -#define __HARDWARE_H - -#include <asm/types.h> - -/* - * Note about PCI IO space mappings - * - * To make IO space accesses efficient, we store virtual addresses in - * the IO resources. - * - * The PCI IO space is located at virtual 0xfe000000 from physical - * 0x90000000. The PCI BARs must be programmed with physical addresses, - * but when we read them, we convert them to virtual addresses. See - * arch/arm/plat-iop/pci.c. - */ - -#ifndef __ASSEMBLY__ -void iop32x_init_irq(void); -#endif - - -/* - * Generic chipset bits - */ -#include "iop3xx.h" - -/* - * Board specific bits - */ -#include "glantank.h" -#include "iq80321.h" -#include "iq31244.h" -#include "n2100.h" - - -#endif diff --git a/arch/arm/mach-iop32x/i2c.c b/arch/arm/mach-iop32x/i2c.c deleted file mode 100644 index e422286af469..000000000000 --- a/arch/arm/mach-iop32x/i2c.c +++ /dev/null @@ -1,92 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/plat-iop/i2c.c - * - * Author: Nicolas Pitre <nico@cam.org> - * Copyright (C) 2001 MontaVista Software, Inc. - * Copyright (C) 2004 Intel Corporation. - */ - -#include <linux/mm.h> -#include <linux/init.h> -#include <linux/major.h> -#include <linux/fs.h> -#include <linux/platform_device.h> -#include <linux/serial.h> -#include <linux/tty.h> -#include <linux/serial_core.h> -#include <linux/io.h> -#include <linux/gpio/machine.h> -#include <asm/page.h> -#include <asm/mach/map.h> -#include <asm/setup.h> -#include <asm/memory.h> -#include <asm/mach/arch.h> - -#include "hardware.h" -#include "iop3xx.h" -#include "irqs.h" - -/* - * Each of the I2C busses have corresponding GPIO lines, and the driver - * need to access these directly to drive the bus low at times. - */ - -struct gpiod_lookup_table iop3xx_i2c0_gpio_lookup = { - .dev_id = "IOP3xx-I2C.0", - .table = { - GPIO_LOOKUP("gpio-iop", 7, "scl", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-iop", 6, "sda", GPIO_ACTIVE_HIGH), - { } - }, -}; - -struct gpiod_lookup_table iop3xx_i2c1_gpio_lookup = { - .dev_id = "IOP3xx-I2C.1", - .table = { - GPIO_LOOKUP("gpio-iop", 5, "scl", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-iop", 4, "sda", GPIO_ACTIVE_HIGH), - { } - }, -}; - -static struct resource iop3xx_i2c0_resources[] = { - [0] = { - .start = 0xfffff680, - .end = 0xfffff697, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_IOP32X_I2C_0, - .end = IRQ_IOP32X_I2C_0, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device iop3xx_i2c0_device = { - .name = "IOP3xx-I2C", - .id = 0, - .num_resources = 2, - .resource = iop3xx_i2c0_resources, -}; - - -static struct resource iop3xx_i2c1_resources[] = { - [0] = { - .start = 0xfffff6a0, - .end = 0xfffff6b7, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_IOP32X_I2C_1, - .end = IRQ_IOP32X_I2C_1, - .flags = IORESOURCE_IRQ, - } -}; - -struct platform_device iop3xx_i2c1_device = { - .name = "IOP3xx-I2C", - .id = 1, - .num_resources = 2, - .resource = iop3xx_i2c1_resources, -}; diff --git a/arch/arm/mach-iop32x/iop3xx.h b/arch/arm/mach-iop32x/iop3xx.h deleted file mode 100644 index a6ec7ebadb35..000000000000 --- a/arch/arm/mach-iop32x/iop3xx.h +++ /dev/null @@ -1,326 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Intel IOP32X and IOP33X register definitions - * - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright (C) 2002 Rory Bolt - * Copyright (C) 2004 Intel Corp. - */ - -#ifndef __IOP3XX_H -#define __IOP3XX_H - -/* - * Peripherals that are shared between the iop32x and iop33x but - * located at different addresses. - */ -#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) - -#include "iop3xx.h" - -/* ATU Parameters - * set up a 1:1 bus to physical ram relationship - * w/ physical ram on top of pci in the memory map - */ -#define IOP32X_MAX_RAM_SIZE 0x40000000UL -#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE -#define IOP3XX_PCI_LOWER_MEM_BA 0x80000000 - -/* - * IOP3XX GPIO handling - */ -#define IOP3XX_GPIO_LINE(x) (x) - -#ifndef __ASSEMBLY__ -extern int init_atu; -extern int iop3xx_get_init_atu(void); -#endif - - -/* - * IOP3XX processor registers - */ -#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000 -#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfedfe000 -#define IOP3XX_PERIPHERAL_SIZE 0x00002000 -#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\ - IOP3XX_PERIPHERAL_SIZE - 1) -#define IOP3XX_PERIPHERAL_UPPER_VA (IOP3XX_PERIPHERAL_VIRT_BASE +\ - IOP3XX_PERIPHERAL_SIZE - 1) -#define IOP3XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) (addr) -\ - (IOP3XX_PERIPHERAL_PHYS_BASE\ - - IOP3XX_PERIPHERAL_VIRT_BASE)) -#define IOP3XX_REG_ADDR(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + (reg)) - -/* Address Translation Unit */ -#define IOP3XX_ATUVID (volatile u16 *)IOP3XX_REG_ADDR(0x0100) -#define IOP3XX_ATUDID (volatile u16 *)IOP3XX_REG_ADDR(0x0102) -#define IOP3XX_ATUCMD (volatile u16 *)IOP3XX_REG_ADDR(0x0104) -#define IOP3XX_ATUSR (volatile u16 *)IOP3XX_REG_ADDR(0x0106) -#define IOP3XX_ATURID (volatile u8 *)IOP3XX_REG_ADDR(0x0108) -#define IOP3XX_ATUCCR (volatile u32 *)IOP3XX_REG_ADDR(0x0109) -#define IOP3XX_ATUCLSR (volatile u8 *)IOP3XX_REG_ADDR(0x010c) -#define IOP3XX_ATULT (volatile u8 *)IOP3XX_REG_ADDR(0x010d) -#define IOP3XX_ATUHTR (volatile u8 *)IOP3XX_REG_ADDR(0x010e) -#define IOP3XX_ATUBIST (volatile u8 *)IOP3XX_REG_ADDR(0x010f) -#define IOP3XX_IABAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0110) -#define IOP3XX_IAUBAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0114) -#define IOP3XX_IABAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0118) -#define IOP3XX_IAUBAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x011c) -#define IOP3XX_IABAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0120) -#define IOP3XX_IAUBAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0124) -#define IOP3XX_ASVIR (volatile u16 *)IOP3XX_REG_ADDR(0x012c) -#define IOP3XX_ASIR (volatile u16 *)IOP3XX_REG_ADDR(0x012e) -#define IOP3XX_ERBAR (volatile u32 *)IOP3XX_REG_ADDR(0x0130) -#define IOP3XX_ATUILR (volatile u8 *)IOP3XX_REG_ADDR(0x013c) -#define IOP3XX_ATUIPR (volatile u8 *)IOP3XX_REG_ADDR(0x013d) -#define IOP3XX_ATUMGNT (volatile u8 *)IOP3XX_REG_ADDR(0x013e) -#define IOP3XX_ATUMLAT (volatile u8 *)IOP3XX_REG_ADDR(0x013f) -#define IOP3XX_IALR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0140) -#define IOP3XX_IATVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0144) -#define IOP3XX_ERLR (volatile u32 *)IOP3XX_REG_ADDR(0x0148) -#define IOP3XX_ERTVR (volatile u32 *)IOP3XX_REG_ADDR(0x014c) -#define IOP3XX_IALR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0150) -#define IOP3XX_IALR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0154) -#define IOP3XX_IATVR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0158) -#define IOP3XX_OIOWTVR (volatile u32 *)IOP3XX_REG_ADDR(0x015c) -#define IOP3XX_OMWTVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0160) -#define IOP3XX_OUMWTVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0164) -#define IOP3XX_OMWTVR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0168) -#define IOP3XX_OUMWTVR1 (volatile u32 *)IOP3XX_REG_ADDR(0x016c) -#define IOP3XX_OUDWTVR (volatile u32 *)IOP3XX_REG_ADDR(0x0178) -#define IOP3XX_ATUCR (volatile u32 *)IOP3XX_REG_ADDR(0x0180) -#define IOP3XX_PCSR (volatile u32 *)IOP3XX_REG_ADDR(0x0184) -#define IOP3XX_ATUISR (volatile u32 *)IOP3XX_REG_ADDR(0x0188) -#define IOP3XX_ATUIMR (volatile u32 *)IOP3XX_REG_ADDR(0x018c) -#define IOP3XX_IABAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0190) -#define IOP3XX_IAUBAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0194) -#define IOP3XX_IALR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0198) -#define IOP3XX_IATVR3 (volatile u32 *)IOP3XX_REG_ADDR(0x019c) -#define IOP3XX_OCCAR (volatile u32 *)IOP3XX_REG_ADDR(0x01a4) -#define IOP3XX_OCCDR (volatile u32 *)IOP3XX_REG_ADDR(0x01ac) -#define IOP3XX_PDSCR (volatile u32 *)IOP3XX_REG_ADDR(0x01bc) -#define IOP3XX_PMCAPID (volatile u8 *)IOP3XX_REG_ADDR(0x01c0) -#define IOP3XX_PMNEXT (volatile u8 *)IOP3XX_REG_ADDR(0x01c1) -#define IOP3XX_APMCR (volatile u16 *)IOP3XX_REG_ADDR(0x01c2) -#define IOP3XX_APMCSR (volatile u16 *)IOP3XX_REG_ADDR(0x01c4) -#define IOP3XX_PCIXCAPID (volatile u8 *)IOP3XX_REG_ADDR(0x01e0) -#define IOP3XX_PCIXNEXT (volatile u8 *)IOP3XX_REG_ADDR(0x01e1) -#define IOP3XX_PCIXCMD (volatile u16 *)IOP3XX_REG_ADDR(0x01e2) -#define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4) -#define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec) -#define IOP3XX_PCSR_OUT_Q_BUSY (1 << 15) -#define IOP3XX_PCSR_IN_Q_BUSY (1 << 14) -#define IOP3XX_ATUCR_OUT_EN (1 << 1) - -#define IOP3XX_INIT_ATU_DEFAULT 0 -#define IOP3XX_INIT_ATU_DISABLE -1 -#define IOP3XX_INIT_ATU_ENABLE 1 - -/* Messaging Unit */ -#define IOP3XX_IMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0310) -#define IOP3XX_IMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0314) -#define IOP3XX_OMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0318) -#define IOP3XX_OMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x031c) -#define IOP3XX_IDR (volatile u32 *)IOP3XX_REG_ADDR(0x0320) -#define IOP3XX_IISR (volatile u32 *)IOP3XX_REG_ADDR(0x0324) -#define IOP3XX_IIMR (volatile u32 *)IOP3XX_REG_ADDR(0x0328) -#define IOP3XX_ODR (volatile u32 *)IOP3XX_REG_ADDR(0x032c) -#define IOP3XX_OISR (volatile u32 *)IOP3XX_REG_ADDR(0x0330) -#define IOP3XX_OIMR (volatile u32 *)IOP3XX_REG_ADDR(0x0334) -#define IOP3XX_MUCR (volatile u32 *)IOP3XX_REG_ADDR(0x0350) -#define IOP3XX_QBAR (volatile u32 *)IOP3XX_REG_ADDR(0x0354) -#define IOP3XX_IFHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0360) -#define IOP3XX_IFTPR (volatile u32 *)IOP3XX_REG_ADDR(0x0364) -#define IOP3XX_IPHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0368) -#define IOP3XX_IPTPR (volatile u32 *)IOP3XX_REG_ADDR(0x036c) -#define IOP3XX_OFHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0370) -#define IOP3XX_OFTPR (volatile u32 *)IOP3XX_REG_ADDR(0x0374) -#define IOP3XX_OPHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0378) -#define IOP3XX_OPTPR (volatile u32 *)IOP3XX_REG_ADDR(0x037c) -#define IOP3XX_IAR (volatile u32 *)IOP3XX_REG_ADDR(0x0380) - -/* DMA Controller */ -#define IOP3XX_DMA_PHYS_BASE(chan) (IOP3XX_PERIPHERAL_PHYS_BASE + \ - (0x400 + (chan << 6))) -#define IOP3XX_DMA_UPPER_PA(chan) (IOP3XX_DMA_PHYS_BASE(chan) + 0x27) - -/* Peripheral bus interface */ -#define IOP3XX_PBCR (volatile u32 *)IOP3XX_REG_ADDR(0x0680) -#define IOP3XX_PBISR (volatile u32 *)IOP3XX_REG_ADDR(0x0684) -#define IOP3XX_PBBAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0688) -#define IOP3XX_PBLR0 (volatile u32 *)IOP3XX_REG_ADDR(0x068c) -#define IOP3XX_PBBAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0690) -#define IOP3XX_PBLR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0694) -#define IOP3XX_PBBAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0698) -#define IOP3XX_PBLR2 (volatile u32 *)IOP3XX_REG_ADDR(0x069c) -#define IOP3XX_PBBAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x06a0) -#define IOP3XX_PBLR3 (volatile u32 *)IOP3XX_REG_ADDR(0x06a4) -#define IOP3XX_PBBAR4 (volatile u32 *)IOP3XX_REG_ADDR(0x06a8) -#define IOP3XX_PBLR4 (volatile u32 *)IOP3XX_REG_ADDR(0x06ac) -#define IOP3XX_PBBAR5 (volatile u32 *)IOP3XX_REG_ADDR(0x06b0) -#define IOP3XX_PBLR5 (volatile u32 *)IOP3XX_REG_ADDR(0x06b4) -#define IOP3XX_PMBR0 (volatile u32 *)IOP3XX_REG_ADDR(0x06c0) -#define IOP3XX_PMBR1 (volatile u32 *)IOP3XX_REG_ADDR(0x06e0) -#define IOP3XX_PMBR2 (volatile u32 *)IOP3XX_REG_ADDR(0x06e4) - -/* Peripheral performance monitoring unit */ -#define IOP3XX_GTMR (volatile u32 *)IOP3XX_REG_ADDR(0x0700) -#define IOP3XX_ESR (volatile u32 *)IOP3XX_REG_ADDR(0x0704) -#define IOP3XX_EMISR (volatile u32 *)IOP3XX_REG_ADDR(0x0708) -#define IOP3XX_GTSR (volatile u32 *)IOP3XX_REG_ADDR(0x0710) -/* PERCR0 DOESN'T EXIST - index from 1! */ -#define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710) - -/* Timers */ -#define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) -#define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004) -#define IOP3XX_TU_TCR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0008) -#define IOP3XX_TU_TCR1 (volatile u32 *)IOP3XX_TIMER_REG(0x000c) -#define IOP3XX_TU_TRR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0010) -#define IOP3XX_TU_TRR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0014) -#define IOP3XX_TU_TISR (volatile u32 *)IOP3XX_TIMER_REG(0x0018) -#define IOP3XX_TU_WDTCR (volatile u32 *)IOP3XX_TIMER_REG(0x001c) -#define IOP_TMR_EN 0x02 -#define IOP_TMR_RELOAD 0x04 -#define IOP_TMR_PRIVILEGED 0x08 -#define IOP_TMR_RATIO_1_1 0x00 - -/* Watchdog timer definitions */ -#define IOP_WDTCR_EN_ARM 0x1e1e1e1e -#define IOP_WDTCR_EN 0xe1e1e1e1 -/* iop3xx does not support stopping the watchdog, so we just re-arm */ -#define IOP_WDTCR_DIS_ARM (IOP_WDTCR_EN_ARM) -#define IOP_WDTCR_DIS (IOP_WDTCR_EN) - -/* Application accelerator unit */ -#define IOP3XX_AAU_PHYS_BASE (IOP3XX_PERIPHERAL_PHYS_BASE + 0x800) -#define IOP3XX_AAU_UPPER_PA (IOP3XX_AAU_PHYS_BASE + 0xa7) - -/* I2C bus interface unit */ -#define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680) -#define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684) -#define IOP3XX_ISAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1688) -#define IOP3XX_IDBR0 (volatile u32 *)IOP3XX_REG_ADDR(0x168c) -#define IOP3XX_IBMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1694) -#define IOP3XX_ICR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a0) -#define IOP3XX_ISR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a4) -#define IOP3XX_ISAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a8) -#define IOP3XX_IDBR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16ac) -#define IOP3XX_IBMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16b4) - - -/* - * IOP3XX I/O and Mem space regions for PCI autoconfiguration - */ -#define IOP3XX_PCI_LOWER_MEM_PA 0x80000000 -#define IOP3XX_PCI_MEM_WINDOW_SIZE 0x08000000 - -#define IOP3XX_PCI_LOWER_IO_PA 0x90000000 -#define IOP3XX_PCI_LOWER_IO_BA 0x00000000 - -#ifndef __ASSEMBLY__ - -#include <linux/types.h> -#include <linux/reboot.h> - -void iop3xx_map_io(void); -void iop_enable_cp6(void); -void iop_init_cp6_handler(void); -void iop_init_time(unsigned long tickrate); -void iop3xx_restart(enum reboot_mode, const char *); - -static inline u32 read_tmr0(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c0, c1, 0" : "=r" (val)); - return val; -} - -static inline void write_tmr0(u32 val) -{ - asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val)); -} - -static inline void write_tmr1(u32 val) -{ - asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val)); -} - -static inline u32 read_tcr0(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val)); - return val; -} - -static inline void write_tcr0(u32 val) -{ - asm volatile("mcr p6, 0, %0, c2, c1, 0" : : "r" (val)); -} - -static inline u32 read_tcr1(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val)); - return val; -} - -static inline void write_tcr1(u32 val) -{ - asm volatile("mcr p6, 0, %0, c3, c1, 0" : : "r" (val)); -} - -static inline void write_trr0(u32 val) -{ - asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val)); -} - -static inline void write_trr1(u32 val) -{ - asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val)); -} - -static inline void write_tisr(u32 val) -{ - asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (val)); -} - -static inline u32 read_wdtcr(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c7, c1, 0":"=r" (val)); - return val; -} -static inline void write_wdtcr(u32 val) -{ - asm volatile("mcr p6, 0, %0, c7, c1, 0"::"r" (val)); -} - -extern unsigned long get_iop_tick_rate(void); - -/* only iop13xx has these registers, we define these to present a - * common register interface for the iop_wdt driver. - */ -#define IOP_RCSR_WDT (0) -static inline u32 read_rcsr(void) -{ - return 0; -} -static inline void write_wdtsr(u32 val) -{ - do { } while (0); -} - -extern struct platform_device iop3xx_dma_0_channel; -extern struct platform_device iop3xx_dma_1_channel; -extern struct platform_device iop3xx_aau_channel; -extern struct platform_device iop3xx_i2c0_device; -extern struct platform_device iop3xx_i2c1_device; -extern struct gpiod_lookup_table iop3xx_i2c0_gpio_lookup; -extern struct gpiod_lookup_table iop3xx_i2c1_gpio_lookup; - -#endif - - -#endif diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c deleted file mode 100644 index 8b4c29d17265..000000000000 --- a/arch/arm/mach-iop32x/iq31244.c +++ /dev/null @@ -1,333 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-iop32x/iq31244.c - * - * Board support code for the Intel EP80219 and IQ31244 platforms. - * - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright (C) 2002 Rory Bolt - * Copyright 2003 (c) MontaVista, Software, Inc. - * Copyright (C) 2004 Intel Corp. - */ - -#include <linux/mm.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/pm.h> -#include <linux/string.h> -#include <linux/serial_core.h> -#include <linux/serial_8250.h> -#include <linux/mtd/physmap.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio/machine.h> -#include <asm/cputype.h> -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/pci.h> -#include <asm/mach/time.h> -#include <asm/mach-types.h> -#include <asm/page.h> - -#include "hardware.h" -#include "irqs.h" -#include "gpio-iop32x.h" - -/* - * Until March of 2007 iq31244 platforms and ep80219 platforms shared the - * same machine id, and the processor type was used to select board type. - * However this assumption breaks for an iq80219 board which is an iop219 - * processor on an iq31244 board. The force_ep80219 flag has been added - * for old boot loaders using the iq31244 machine id for an ep80219 platform. - */ -static int force_ep80219; - -static int is_80219(void) -{ - return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20); -} - -static int is_ep80219(void) -{ - if (machine_is_ep80219() || force_ep80219) - return 1; - else - return 0; -} - - -/* - * EP80219/IQ31244 timer tick configuration. - */ -static void __init iq31244_timer_init(void) -{ - if (is_ep80219()) { - /* 33.333 MHz crystal. */ - iop_init_time(200000000); - } else { - /* 33.000 MHz crystal. */ - iop_init_time(198000000); - } -} - - -/* - * IQ31244 I/O. - */ -static struct map_desc iq31244_io_desc[] __initdata = { - { /* on-board devices */ - .virtual = IQ31244_UART, - .pfn = __phys_to_pfn(IQ31244_UART), - .length = 0x00100000, - .type = MT_DEVICE, - }, -}; - -void __init iq31244_map_io(void) -{ - iop3xx_map_io(); - iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc)); -} - - -/* - * EP80219/IQ31244 PCI. - */ -static int __init -ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq; - - if (slot == 0) { - /* CFlash */ - irq = IRQ_IOP32X_XINT1; - } else if (slot == 1) { - /* 82551 Pro 100 */ - irq = IRQ_IOP32X_XINT0; - } else if (slot == 2) { - /* PCI-X Slot */ - irq = IRQ_IOP32X_XINT3; - } else if (slot == 3) { - /* SATA */ - irq = IRQ_IOP32X_XINT2; - } else { - printk(KERN_ERR "ep80219_pci_map_irq() called for unknown " - "device PCI:%d:%d:%d\n", dev->bus->number, - PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); - irq = -1; - } - - return irq; -} - -static struct hw_pci ep80219_pci __initdata = { - .nr_controllers = 1, - .ops = &iop3xx_ops, - .setup = iop3xx_pci_setup, - .preinit = iop3xx_pci_preinit, - .map_irq = ep80219_pci_map_irq, -}; - -static int __init -iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq; - - if (slot == 0) { - /* CFlash */ - irq = IRQ_IOP32X_XINT1; - } else if (slot == 1) { - /* SATA */ - irq = IRQ_IOP32X_XINT2; - } else if (slot == 2) { - /* PCI-X Slot */ - irq = IRQ_IOP32X_XINT3; - } else if (slot == 3) { - /* 82546 GigE */ - irq = IRQ_IOP32X_XINT0; - } else { - printk(KERN_ERR "iq31244_pci_map_irq called for unknown " - "device PCI:%d:%d:%d\n", dev->bus->number, - PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); - irq = -1; - } - - return irq; -} - -static struct hw_pci iq31244_pci __initdata = { - .nr_controllers = 1, - .ops = &iop3xx_ops, - .setup = iop3xx_pci_setup, - .preinit = iop3xx_pci_preinit, - .map_irq = iq31244_pci_map_irq, -}; - -static int __init iq31244_pci_init(void) -{ - if (is_ep80219()) - pci_common_init(&ep80219_pci); - else if (machine_is_iq31244()) { - if (is_80219()) { - printk("note: iq31244 board type has been selected\n"); - printk("note: to select ep80219 operation:\n"); - printk("\t1/ specify \"force_ep80219\" on the kernel" - " command line\n"); - printk("\t2/ update boot loader to pass" - " the ep80219 id: %d\n", MACH_TYPE_EP80219); - } - pci_common_init(&iq31244_pci); - } - - return 0; -} - -subsys_initcall(iq31244_pci_init); - - -/* - * IQ31244 machine initialisation. - */ -static struct physmap_flash_data iq31244_flash_data = { - .width = 2, -}; - -static struct resource iq31244_flash_resource = { - .start = 0xf0000000, - .end = 0xf07fffff, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device iq31244_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &iq31244_flash_data, - }, - .num_resources = 1, - .resource = &iq31244_flash_resource, -}; - -static struct plat_serial8250_port iq31244_serial_port[] = { - { - .mapbase = IQ31244_UART, - .membase = (char *)IQ31244_UART, - .irq = IRQ_IOP32X_XINT1, - .flags = UPF_SKIP_TEST, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = 1843200, - }, - { }, -}; - -static struct resource iq31244_uart_resource = { - .start = IQ31244_UART, - .end = IQ31244_UART + 7, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device iq31244_serial_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = iq31244_serial_port, - }, - .num_resources = 1, - .resource = &iq31244_uart_resource, -}; - -/* - * This function will send a SHUTDOWN_COMPLETE message to the PIC - * controller over I2C. We are not using the i2c subsystem since - * we are going to power off and it may be removed - */ -void ep80219_power_off(void) -{ - /* - * Send the Address byte w/ the start condition - */ - *IOP3XX_IDBR1 = 0x60; - *IOP3XX_ICR1 = 0xE9; - mdelay(1); - - /* - * Send the START_MSG byte w/ no start or stop condition - */ - *IOP3XX_IDBR1 = 0x0F; - *IOP3XX_ICR1 = 0xE8; - mdelay(1); - - /* - * Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or - * stop condition - */ - *IOP3XX_IDBR1 = 0x03; - *IOP3XX_ICR1 = 0xE8; - mdelay(1); - - /* - * Send an ignored byte w/ stop condition - */ - *IOP3XX_IDBR1 = 0x00; - *IOP3XX_ICR1 = 0xEA; - - while (1) - ; -} - -static void __init iq31244_init_machine(void) -{ - register_iop32x_gpio(); - gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); - gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup); - platform_device_register(&iop3xx_i2c0_device); - platform_device_register(&iop3xx_i2c1_device); - platform_device_register(&iq31244_flash_device); - platform_device_register(&iq31244_serial_device); - platform_device_register(&iop3xx_dma_0_channel); - platform_device_register(&iop3xx_dma_1_channel); - - if (is_ep80219()) - pm_power_off = ep80219_power_off; - - if (!is_80219()) - platform_device_register(&iop3xx_aau_channel); -} - -static int __init force_ep80219_setup(char *str) -{ - force_ep80219 = 1; - return 1; -} - -__setup("force_ep80219", force_ep80219_setup); - -MACHINE_START(IQ31244, "Intel IQ31244") - /* Maintainer: Intel Corp. */ - .atag_offset = 0x100, - .map_io = iq31244_map_io, - .init_irq = iop32x_init_irq, - .init_time = iq31244_timer_init, - .init_machine = iq31244_init_machine, - .restart = iop3xx_restart, -MACHINE_END - -/* There should have been an ep80219 machine identifier from the beginning. - * Boot roms older than March 2007 do not know the ep80219 machine id. Pass - * "force_ep80219" on the kernel command line, otherwise iq31244 operation - * will be selected. - */ -MACHINE_START(EP80219, "Intel EP80219") - /* Maintainer: Intel Corp. */ - .atag_offset = 0x100, - .nr_irqs = IOP32X_NR_IRQS, - .map_io = iq31244_map_io, - .init_irq = iop32x_init_irq, - .init_time = iq31244_timer_init, - .init_machine = iq31244_init_machine, - .restart = iop3xx_restart, -MACHINE_END diff --git a/arch/arm/mach-iop32x/iq31244.h b/arch/arm/mach-iop32x/iq31244.h deleted file mode 100644 index a7ac691e48d3..000000000000 --- a/arch/arm/mach-iop32x/iq31244.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Intel IQ31244 evaluation board registers - */ - -#ifndef __IQ31244_H -#define __IQ31244_H - -#define IQ31244_UART 0xfe800000 /* UART #1 */ -#define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */ -#define IQ31244_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */ -#define IQ31244_ROTARY_SW 0xfe8d0000 /* Rotary Switch */ -#define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */ - - -#endif diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c deleted file mode 100644 index d9780c4660cb..000000000000 --- a/arch/arm/mach-iop32x/iq80321.c +++ /dev/null @@ -1,192 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-iop32x/iq80321.c - * - * Board support code for the Intel IQ80321 platform. - * - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright (C) 2002 Rory Bolt - * Copyright (C) 2004 Intel Corp. - */ - -#include <linux/mm.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/string.h> -#include <linux/serial_core.h> -#include <linux/serial_8250.h> -#include <linux/mtd/physmap.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio/machine.h> -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/pci.h> -#include <asm/mach/time.h> -#include <asm/mach-types.h> -#include <asm/page.h> - -#include "hardware.h" -#include "irqs.h" -#include "gpio-iop32x.h" - -/* - * IQ80321 timer tick configuration. - */ -static void __init iq80321_timer_init(void) -{ - /* 33.333 MHz crystal. */ - iop_init_time(200000000); -} - - -/* - * IQ80321 I/O. - */ -static struct map_desc iq80321_io_desc[] __initdata = { - { /* on-board devices */ - .virtual = IQ80321_UART, - .pfn = __phys_to_pfn(IQ80321_UART), - .length = 0x00100000, - .type = MT_DEVICE, - }, -}; - -void __init iq80321_map_io(void) -{ - iop3xx_map_io(); - iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc)); -} - - -/* - * IQ80321 PCI. - */ -static int __init -iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq; - - if ((slot == 2 || slot == 6) && pin == 1) { - /* PCI-X Slot INTA */ - irq = IRQ_IOP32X_XINT2; - } else if ((slot == 2 || slot == 6) && pin == 2) { - /* PCI-X Slot INTA */ - irq = IRQ_IOP32X_XINT3; - } else if ((slot == 2 || slot == 6) && pin == 3) { - /* PCI-X Slot INTA */ - irq = IRQ_IOP32X_XINT0; - } else if ((slot == 2 || slot == 6) && pin == 4) { - /* PCI-X Slot INTA */ - irq = IRQ_IOP32X_XINT1; - } else if (slot == 4 || slot == 8) { - /* Gig-E */ - irq = IRQ_IOP32X_XINT0; - } else { - printk(KERN_ERR "iq80321_pci_map_irq() called for unknown " - "device PCI:%d:%d:%d\n", dev->bus->number, - PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); - irq = -1; - } - - return irq; -} - -static struct hw_pci iq80321_pci __initdata = { - .nr_controllers = 1, - .ops = &iop3xx_ops, - .setup = iop3xx_pci_setup, - .preinit = iop3xx_pci_preinit_cond, - .map_irq = iq80321_pci_map_irq, -}; - -static int __init iq80321_pci_init(void) -{ - if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) && - machine_is_iq80321()) - pci_common_init(&iq80321_pci); - - return 0; -} - -subsys_initcall(iq80321_pci_init); - - -/* - * IQ80321 machine initialisation. - */ -static struct physmap_flash_data iq80321_flash_data = { - .width = 1, -}; - -static struct resource iq80321_flash_resource = { - .start = 0xf0000000, - .end = 0xf07fffff, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device iq80321_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &iq80321_flash_data, - }, - .num_resources = 1, - .resource = &iq80321_flash_resource, -}; - -static struct plat_serial8250_port iq80321_serial_port[] = { - { - .mapbase = IQ80321_UART, - .membase = (char *)IQ80321_UART, - .irq = IRQ_IOP32X_XINT1, - .flags = UPF_SKIP_TEST, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = 1843200, - }, - { }, -}; - -static struct resource iq80321_uart_resource = { - .start = IQ80321_UART, - .end = IQ80321_UART + 7, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device iq80321_serial_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = iq80321_serial_port, - }, - .num_resources = 1, - .resource = &iq80321_uart_resource, -}; - -static void __init iq80321_init_machine(void) -{ - register_iop32x_gpio(); - gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); - gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup); - platform_device_register(&iop3xx_i2c0_device); - platform_device_register(&iop3xx_i2c1_device); - platform_device_register(&iq80321_flash_device); - platform_device_register(&iq80321_serial_device); - platform_device_register(&iop3xx_dma_0_channel); - platform_device_register(&iop3xx_dma_1_channel); - platform_device_register(&iop3xx_aau_channel); -} - -MACHINE_START(IQ80321, "Intel IQ80321") - /* Maintainer: Intel Corp. */ - .atag_offset = 0x100, - .nr_irqs = IOP32X_NR_IRQS, - .map_io = iq80321_map_io, - .init_irq = iop32x_init_irq, - .init_time = iq80321_timer_init, - .init_machine = iq80321_init_machine, - .restart = iop3xx_restart, -MACHINE_END diff --git a/arch/arm/mach-iop32x/iq80321.h b/arch/arm/mach-iop32x/iq80321.h deleted file mode 100644 index 3a5d10626ea6..000000000000 --- a/arch/arm/mach-iop32x/iq80321.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Intel IQ80321 evaluation board registers - */ - -#ifndef __IQ80321_H -#define __IQ80321_H - -#define IQ80321_UART 0xfe800000 /* UART #1 */ -#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */ -#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */ -#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */ -#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */ - - -#endif diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c deleted file mode 100644 index 6dca7e97d81f..000000000000 --- a/arch/arm/mach-iop32x/irq.c +++ /dev/null @@ -1,95 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-iop32x/irq.c - * - * Generic IOP32X IRQ handling functionality - * - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright (C) 2002 Rory Bolt - */ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <asm/mach/irq.h> -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "hardware.h" - -static u32 iop32x_mask; - -static void intctl_write(u32 val) -{ - asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); -} - -static void intstr_write(u32 val) -{ - asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val)); -} - -static u32 iintsrc_read(void) -{ - int irq; - - asm volatile("mrc p6, 0, %0, c8, c0, 0" : "=r" (irq)); - - return irq; -} - -static void -iop32x_irq_mask(struct irq_data *d) -{ - iop32x_mask &= ~(1 << (d->irq - 1)); - intctl_write(iop32x_mask); -} - -static void -iop32x_irq_unmask(struct irq_data *d) -{ - iop32x_mask |= 1 << (d->irq - 1); - intctl_write(iop32x_mask); -} - -struct irq_chip ext_chip = { - .name = "IOP32x", - .irq_ack = iop32x_irq_mask, - .irq_mask = iop32x_irq_mask, - .irq_unmask = iop32x_irq_unmask, -}; - -static void iop_handle_irq(struct pt_regs *regs) -{ - u32 mask; - - iop_enable_cp6(); - - do { - mask = iintsrc_read(); - if (mask) - generic_handle_irq(fls(mask)); - } while (mask); -} - -void __init iop32x_init_irq(void) -{ - int i; - - iop_init_cp6_handler(); - set_handle_irq(iop_handle_irq); - - intctl_write(0); - intstr_write(0); - if (machine_is_glantank() || - machine_is_iq80321() || - machine_is_iq31244() || - machine_is_n2100() || - machine_is_em7210()) - *IOP3XX_PCIIRSR = 0x0f; - - for (i = 1; i < NR_IRQS; i++) { - irq_set_chip_and_handler(i, &ext_chip, handle_level_irq); - irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE); - } -} diff --git a/arch/arm/mach-iop32x/irqs.h b/arch/arm/mach-iop32x/irqs.h deleted file mode 100644 index e9fc88e09189..000000000000 --- a/arch/arm/mach-iop32x/irqs.h +++ /dev/null @@ -1,48 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright: (C) 2002 Rory Bolt - */ - -#ifndef __IOP32X_IRQS_H -#define __IOP32X_IRQS_H - -/* Interrupts in Linux start at 1, hardware starts at 0 */ - -#define IOP_IRQ(x) ((x) + 1) - -/* - * IOP80321 chipset interrupts - */ -#define IRQ_IOP32X_DMA0_EOT IOP_IRQ(0) -#define IRQ_IOP32X_DMA0_EOC IOP_IRQ(1) -#define IRQ_IOP32X_DMA1_EOT IOP_IRQ(2) -#define IRQ_IOP32X_DMA1_EOC IOP_IRQ(3) -#define IRQ_IOP32X_AA_EOT IOP_IRQ(6) -#define IRQ_IOP32X_AA_EOC IOP_IRQ(7) -#define IRQ_IOP32X_CORE_PMON IOP_IRQ(8) -#define IRQ_IOP32X_TIMER0 IOP_IRQ(9) -#define IRQ_IOP32X_TIMER1 IOP_IRQ(10) -#define IRQ_IOP32X_I2C_0 IOP_IRQ(11) -#define IRQ_IOP32X_I2C_1 IOP_IRQ(12) -#define IRQ_IOP32X_MESSAGING IOP_IRQ(13) -#define IRQ_IOP32X_ATU_BIST IOP_IRQ(14) -#define IRQ_IOP32X_PERFMON IOP_IRQ(15) -#define IRQ_IOP32X_CORE_PMU IOP_IRQ(16) -#define IRQ_IOP32X_BIU_ERR IOP_IRQ(17) -#define IRQ_IOP32X_ATU_ERR IOP_IRQ(18) -#define IRQ_IOP32X_MCU_ERR IOP_IRQ(19) -#define IRQ_IOP32X_DMA0_ERR IOP_IRQ(20) -#define IRQ_IOP32X_DMA1_ERR IOP_IRQ(21) -#define IRQ_IOP32X_AA_ERR IOP_IRQ(23) -#define IRQ_IOP32X_MSG_ERR IOP_IRQ(24) -#define IRQ_IOP32X_SSP IOP_IRQ(25) -#define IRQ_IOP32X_XINT0 IOP_IRQ(27) -#define IRQ_IOP32X_XINT1 IOP_IRQ(28) -#define IRQ_IOP32X_XINT2 IOP_IRQ(29) -#define IRQ_IOP32X_XINT3 IOP_IRQ(30) -#define IRQ_IOP32X_HPI IOP_IRQ(31) - -#define IOP32X_NR_IRQS (IRQ_IOP32X_HPI + 1) - -#endif diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c deleted file mode 100644 index bb1e2e11bf35..000000000000 --- a/arch/arm/mach-iop32x/n2100.c +++ /dev/null @@ -1,367 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-iop32x/n2100.c - * - * Board support code for the Thecus N2100 platform. - * - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright (C) 2002 Rory Bolt - * Copyright 2003 (c) MontaVista, Software, Inc. - * Copyright (C) 2004 Intel Corp. - */ - -#include <linux/mm.h> -#include <linux/init.h> -#include <linux/f75375s.h> -#include <linux/leds-pca9532.h> -#include <linux/delay.h> -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/pm.h> -#include <linux/string.h> -#include <linux/serial_core.h> -#include <linux/serial_8250.h> -#include <linux/mtd/physmap.h> -#include <linux/i2c.h> -#include <linux/platform_device.h> -#include <linux/reboot.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/pci.h> -#include <asm/mach/time.h> -#include <asm/mach-types.h> -#include <asm/page.h> - -#include "hardware.h" -#include "irqs.h" -#include "gpio-iop32x.h" - -/* - * N2100 timer tick configuration. - */ -static void __init n2100_timer_init(void) -{ - /* 33.000 MHz crystal. */ - iop_init_time(198000000); -} - - -/* - * N2100 I/O. - */ -static struct map_desc n2100_io_desc[] __initdata = { - { /* on-board devices */ - .virtual = N2100_UART, - .pfn = __phys_to_pfn(N2100_UART), - .length = 0x00100000, - .type = MT_DEVICE - }, -}; - -void __init n2100_map_io(void) -{ - iop3xx_map_io(); - iotable_init(n2100_io_desc, ARRAY_SIZE(n2100_io_desc)); -} - - -/* - * N2100 PCI. - */ -static int n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq; - - if (PCI_SLOT(dev->devfn) == 1) { - /* RTL8110SB #1 */ - irq = IRQ_IOP32X_XINT0; - } else if (PCI_SLOT(dev->devfn) == 2) { - /* RTL8110SB #2 */ - irq = IRQ_IOP32X_XINT3; - } else if (PCI_SLOT(dev->devfn) == 3) { - /* Sil3512 */ - irq = IRQ_IOP32X_XINT2; - } else if (PCI_SLOT(dev->devfn) == 4 && pin == 1) { - /* VT6212 INTA */ - irq = IRQ_IOP32X_XINT1; - } else if (PCI_SLOT(dev->devfn) == 4 && pin == 2) { - /* VT6212 INTB */ - irq = IRQ_IOP32X_XINT0; - } else if (PCI_SLOT(dev->devfn) == 4 && pin == 3) { - /* VT6212 INTC */ - irq = IRQ_IOP32X_XINT2; - } else if (PCI_SLOT(dev->devfn) == 5) { - /* Mini-PCI slot */ - irq = IRQ_IOP32X_XINT3; - } else { - printk(KERN_ERR "n2100_pci_map_irq() called for unknown " - "device PCI:%d:%d:%d\n", dev->bus->number, - PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); - irq = -1; - } - - return irq; -} - -static struct hw_pci n2100_pci __initdata = { - .nr_controllers = 1, - .ops = &iop3xx_ops, - .setup = iop3xx_pci_setup, - .preinit = iop3xx_pci_preinit, - .map_irq = n2100_pci_map_irq, -}; - -/* - * Both r8169 chips on the n2100 exhibit PCI parity problems. Turn - * off parity reporting for both ports so we don't get error interrupts - * for them. - */ -static void n2100_fixup_r8169(struct pci_dev *dev) -{ - if (dev->bus->number == 0 && - (dev->devfn == PCI_DEVFN(1, 0) || - dev->devfn == PCI_DEVFN(2, 0))) - pci_disable_parity(dev); -} -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_REALTEK, PCI_ANY_ID, n2100_fixup_r8169); - -static int __init n2100_pci_init(void) -{ - if (machine_is_n2100()) - pci_common_init(&n2100_pci); - - return 0; -} - -subsys_initcall(n2100_pci_init); - - -/* - * N2100 machine initialisation. - */ -static struct physmap_flash_data n2100_flash_data = { - .width = 2, -}; - -static struct resource n2100_flash_resource = { - .start = 0xf0000000, - .end = 0xf0ffffff, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device n2100_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &n2100_flash_data, - }, - .num_resources = 1, - .resource = &n2100_flash_resource, -}; - - -static struct plat_serial8250_port n2100_serial_port[] = { - { - .mapbase = N2100_UART, - .membase = (char *)N2100_UART, - .irq = 0, - .flags = UPF_SKIP_TEST | UPF_AUTO_IRQ | UPF_SHARE_IRQ, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = 1843200, - }, - { }, -}; - -static struct resource n2100_uart_resource = { - .start = N2100_UART, - .end = N2100_UART + 7, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device n2100_serial_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = n2100_serial_port, - }, - .num_resources = 1, - .resource = &n2100_uart_resource, -}; - -static struct f75375s_platform_data n2100_f75375s = { - .pwm = { 255, 255 }, - .pwm_enable = { 0, 0 }, -}; - -static struct pca9532_platform_data n2100_leds = { - .leds = { - { .name = "n2100:red:satafail0", - .state = PCA9532_OFF, - .type = PCA9532_TYPE_LED, - }, - { .name = "n2100:red:satafail1", - .state = PCA9532_OFF, - .type = PCA9532_TYPE_LED, - }, - { .name = "n2100:blue:usb", - .state = PCA9532_OFF, - .type = PCA9532_TYPE_LED, - }, - { .type = PCA9532_TYPE_NONE }, - - { .type = PCA9532_TYPE_NONE }, - { .type = PCA9532_TYPE_NONE }, - { .type = PCA9532_TYPE_NONE }, - { .name = "n2100:red:usb", - .state = PCA9532_OFF, - .type = PCA9532_TYPE_LED, - }, - - { .type = PCA9532_TYPE_NONE }, /* power OFF gpio */ - { .type = PCA9532_TYPE_NONE }, /* reset gpio */ - { .type = PCA9532_TYPE_NONE }, - { .type = PCA9532_TYPE_NONE }, - - { .type = PCA9532_TYPE_NONE }, - { .name = "n2100:orange:system", - .state = PCA9532_OFF, - .type = PCA9532_TYPE_LED, - }, - { .name = "n2100:red:system", - .state = PCA9532_OFF, - .type = PCA9532_TYPE_LED, - }, - { .name = "N2100 beeper" , - .state = PCA9532_OFF, - .type = PCA9532_TYPE_N2100_BEEP, - }, - }, - .psc = { 0, 0 }, - .pwm = { 0, 0 }, -}; - -static struct i2c_board_info __initdata n2100_i2c_devices[] = { - { - I2C_BOARD_INFO("rs5c372b", 0x32), - }, - { - I2C_BOARD_INFO("f75375", 0x2e), - .platform_data = &n2100_f75375s, - }, - { - I2C_BOARD_INFO("pca9532", 0x60), - .platform_data = &n2100_leds, - }, -}; - -/* - * Pull PCA9532 GPIO #8 low to power off the machine. - */ -static void n2100_power_off(void) -{ - local_irq_disable(); - - /* Start condition, I2C address of PCA9532, write transaction. */ - *IOP3XX_IDBR0 = 0xc0; - *IOP3XX_ICR0 = 0xe9; - mdelay(1); - - /* Write address 0x08. */ - *IOP3XX_IDBR0 = 0x08; - *IOP3XX_ICR0 = 0xe8; - mdelay(1); - - /* Write data 0x01, stop condition. */ - *IOP3XX_IDBR0 = 0x01; - *IOP3XX_ICR0 = 0xea; - - while (1) - ; -} - -static void n2100_restart(enum reboot_mode mode, const char *cmd) -{ - int ret; - - ret = gpio_direction_output(N2100_HARDWARE_RESET, 0); - if (ret) { - pr_crit("could not drive reset GPIO low\n"); - return; - } - /* Wait for reset to happen */ - while (1) - ; -} - - -static struct timer_list power_button_poll_timer; - -static void power_button_poll(struct timer_list *unused) -{ - if (gpio_get_value(N2100_POWER_BUTTON) == 0) { - ctrl_alt_del(); - return; - } - - power_button_poll_timer.expires = jiffies + (HZ / 10); - add_timer(&power_button_poll_timer); -} - -static int __init n2100_request_gpios(void) -{ - int ret; - - if (!machine_is_n2100()) - return 0; - - ret = gpio_request(N2100_HARDWARE_RESET, "reset"); - if (ret) - pr_err("could not request reset GPIO\n"); - - ret = gpio_request(N2100_POWER_BUTTON, "power"); - if (ret) - pr_err("could not request power GPIO\n"); - else { - ret = gpio_direction_input(N2100_POWER_BUTTON); - if (ret) - pr_err("could not set power GPIO as input\n"); - } - /* Set up power button poll timer */ - timer_setup(&power_button_poll_timer, power_button_poll, 0); - power_button_poll_timer.expires = jiffies + (HZ / 10); - add_timer(&power_button_poll_timer); - return 0; -} -device_initcall(n2100_request_gpios); - -static void __init n2100_init_machine(void) -{ - register_iop32x_gpio(); - gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); - platform_device_register(&iop3xx_i2c0_device); - platform_device_register(&n2100_flash_device); - platform_device_register(&n2100_serial_device); - platform_device_register(&iop3xx_dma_0_channel); - platform_device_register(&iop3xx_dma_1_channel); - - i2c_register_board_info(0, n2100_i2c_devices, - ARRAY_SIZE(n2100_i2c_devices)); - - pm_power_off = n2100_power_off; -} - -MACHINE_START(N2100, "Thecus N2100") - /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ - .atag_offset = 0x100, - .nr_irqs = IOP32X_NR_IRQS, - .map_io = n2100_map_io, - .init_irq = iop32x_init_irq, - .init_time = n2100_timer_init, - .init_machine = n2100_init_machine, - .restart = n2100_restart, -MACHINE_END diff --git a/arch/arm/mach-iop32x/n2100.h b/arch/arm/mach-iop32x/n2100.h deleted file mode 100644 index 0b97b940d3e7..000000000000 --- a/arch/arm/mach-iop32x/n2100.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Thecus N2100 board registers - */ - -#ifndef __N2100_H -#define __N2100_H - -#define N2100_UART 0xfe800000 /* UART */ - -#define N2100_COPY_BUTTON IOP3XX_GPIO_LINE(0) -#define N2100_PCA9532_RESET IOP3XX_GPIO_LINE(2) -#define N2100_RESET_BUTTON IOP3XX_GPIO_LINE(3) -#define N2100_HARDWARE_RESET IOP3XX_GPIO_LINE(4) -#define N2100_POWER_BUTTON IOP3XX_GPIO_LINE(5) - - -#endif diff --git a/arch/arm/mach-iop32x/pci.c b/arch/arm/mach-iop32x/pci.c deleted file mode 100644 index 7a215d2ee7e2..000000000000 --- a/arch/arm/mach-iop32x/pci.c +++ /dev/null @@ -1,404 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/plat-iop/pci.c - * - * PCI support for the Intel IOP32X and IOP33X processors - * - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright (C) 2002 Rory Bolt - */ - -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/slab.h> -#include <linux/mm.h> -#include <linux/init.h> -#include <linux/ioport.h> -#include <linux/io.h> -#include <asm/irq.h> -#include <asm/signal.h> -#include <asm/mach/pci.h> -#include "hardware.h" -#include "iop3xx.h" - -// #define DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) do { } while (0) -#endif - -/* - * This routine builds either a type0 or type1 configuration command. If the - * bus is on the 803xx then a type0 made, else a type1 is created. - */ -static u32 iop3xx_cfg_address(struct pci_bus *bus, int devfn, int where) -{ - struct pci_sys_data *sys = bus->sysdata; - u32 addr; - - if (sys->busnr == bus->number) - addr = 1 << (PCI_SLOT(devfn) + 16) | (PCI_SLOT(devfn) << 11); - else - addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1; - - addr |= PCI_FUNC(devfn) << 8 | (where & ~3); - - return addr; -} - -/* - * This routine checks the status of the last configuration cycle. If an error - * was detected it returns a 1, else it returns a 0. The errors being checked - * are parity, master abort, target abort (master and target). These types of - * errors occur during a config cycle where there is no device, like during - * the discovery stage. - */ -static int iop3xx_pci_status(void) -{ - unsigned int status; - int ret = 0; - - /* - * Check the status registers. - */ - status = *IOP3XX_ATUSR; - if (status & 0xf900) { - DBG("\t\t\tPCI: P0 - status = 0x%08x\n", status); - *IOP3XX_ATUSR = status & 0xf900; - ret = 1; - } - - status = *IOP3XX_ATUISR; - if (status & 0x679f) { - DBG("\t\t\tPCI: P1 - status = 0x%08x\n", status); - *IOP3XX_ATUISR = status & 0x679f; - ret = 1; - } - - return ret; -} - -/* - * Simply write the address register and read the configuration - * data. Note that the 4 nops ensure that we are able to handle - * a delayed abort (in theory.) - */ -static u32 iop3xx_read(unsigned long addr) -{ - u32 val; - - __asm__ __volatile__( - "str %1, [%2]\n\t" - "ldr %0, [%3]\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - : "=r" (val) - : "r" (addr), "r" (IOP3XX_OCCAR), "r" (IOP3XX_OCCDR)); - - return val; -} - -/* - * The read routines must check the error status of the last configuration - * cycle. If there was an error, the routine returns all hex f's. - */ -static int -iop3xx_read_config(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 *value) -{ - unsigned long addr = iop3xx_cfg_address(bus, devfn, where); - u32 val = iop3xx_read(addr) >> ((where & 3) * 8); - - if (iop3xx_pci_status()) - val = 0xffffffff; - - *value = val; - - return PCIBIOS_SUCCESSFUL; -} - -static int -iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 value) -{ - unsigned long addr = iop3xx_cfg_address(bus, devfn, where); - u32 val; - - if (size != 4) { - val = iop3xx_read(addr); - if (iop3xx_pci_status()) - return PCIBIOS_SUCCESSFUL; - - where = (where & 3) * 8; - - if (size == 1) - val &= ~(0xff << where); - else - val &= ~(0xffff << where); - - *IOP3XX_OCCDR = val | value << where; - } else { - asm volatile( - "str %1, [%2]\n\t" - "str %0, [%3]\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - : - : "r" (value), "r" (addr), - "r" (IOP3XX_OCCAR), "r" (IOP3XX_OCCDR)); - } - - return PCIBIOS_SUCCESSFUL; -} - -struct pci_ops iop3xx_ops = { - .read = iop3xx_read_config, - .write = iop3xx_write_config, -}; - -/* - * When a PCI device does not exist during config cycles, the 80200 gets a - * bus error instead of returning 0xffffffff. This handler simply returns. - */ -static int -iop3xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) -{ - DBG("PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx\n", - addr, fsr, regs->ARM_pc, regs->ARM_lr); - - /* - * If it was an imprecise abort, then we need to correct the - * return address to be _after_ the instruction. - */ - if (fsr & (1 << 10)) - regs->ARM_pc += 4; - - return 0; -} - -int iop3xx_pci_setup(int nr, struct pci_sys_data *sys) -{ - struct resource *res; - struct resource realio; - - if (nr != 0) - return 0; - - res = kzalloc(sizeof(struct resource), GFP_KERNEL); - if (!res) - panic("PCI: unable to alloc resources"); - - res->start = IOP3XX_PCI_LOWER_MEM_PA; - res->end = IOP3XX_PCI_LOWER_MEM_PA + IOP3XX_PCI_MEM_WINDOW_SIZE - 1; - res->name = "IOP3XX PCI Memory Space"; - res->flags = IORESOURCE_MEM; - request_resource(&iomem_resource, res); - - /* - * Use whatever translation is already setup. - */ - sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0; - - pci_add_resource_offset(&sys->resources, res, sys->mem_offset); - - realio.start = 0; - realio.end = realio.start + SZ_64K - 1; - pci_remap_iospace(&realio, IOP3XX_PCI_LOWER_IO_PA); - - return 1; -} - -void __init iop3xx_atu_setup(void) -{ - /* BAR 0 ( Disabled ) */ - *IOP3XX_IAUBAR0 = 0x0; - *IOP3XX_IABAR0 = 0x0; - *IOP3XX_IATVR0 = 0x0; - *IOP3XX_IALR0 = 0x0; - - /* BAR 1 ( Disabled ) */ - *IOP3XX_IAUBAR1 = 0x0; - *IOP3XX_IABAR1 = 0x0; - *IOP3XX_IALR1 = 0x0; - - /* BAR 2 (1:1 mapping with Physical RAM) */ - /* Set limit and enable */ - *IOP3XX_IALR2 = ~((u32)IOP3XX_MAX_RAM_SIZE - 1) & ~0x1; - *IOP3XX_IAUBAR2 = 0x0; - - /* Align the inbound bar with the base of memory */ - *IOP3XX_IABAR2 = PHYS_OFFSET | - PCI_BASE_ADDRESS_MEM_TYPE_64 | - PCI_BASE_ADDRESS_MEM_PREFETCH; - - *IOP3XX_IATVR2 = PHYS_OFFSET; - - /* Outbound window 0 */ - *IOP3XX_OMWTVR0 = IOP3XX_PCI_LOWER_MEM_BA; - *IOP3XX_OUMWTVR0 = 0; - - /* Outbound window 1 */ - *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_BA + - IOP3XX_PCI_MEM_WINDOW_SIZE / 2; - *IOP3XX_OUMWTVR1 = 0; - - /* BAR 3 ( Disabled ) */ - *IOP3XX_IAUBAR3 = 0x0; - *IOP3XX_IABAR3 = 0x0; - *IOP3XX_IATVR3 = 0x0; - *IOP3XX_IALR3 = 0x0; - - /* Setup the I/O Bar - */ - *IOP3XX_OIOWTVR = IOP3XX_PCI_LOWER_IO_BA; - - /* Enable inbound and outbound cycles - */ - *IOP3XX_ATUCMD |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | - PCI_COMMAND_PARITY | PCI_COMMAND_SERR; - *IOP3XX_ATUCR |= IOP3XX_ATUCR_OUT_EN; -} - -void __init iop3xx_atu_disable(void) -{ - *IOP3XX_ATUCMD = 0; - *IOP3XX_ATUCR = 0; - - /* wait for cycles to quiesce */ - while (*IOP3XX_PCSR & (IOP3XX_PCSR_OUT_Q_BUSY | - IOP3XX_PCSR_IN_Q_BUSY)) - cpu_relax(); - - /* BAR 0 ( Disabled ) */ - *IOP3XX_IAUBAR0 = 0x0; - *IOP3XX_IABAR0 = 0x0; - *IOP3XX_IATVR0 = 0x0; - *IOP3XX_IALR0 = 0x0; - - /* BAR 1 ( Disabled ) */ - *IOP3XX_IAUBAR1 = 0x0; - *IOP3XX_IABAR1 = 0x0; - *IOP3XX_IALR1 = 0x0; - - /* BAR 2 ( Disabled ) */ - *IOP3XX_IAUBAR2 = 0x0; - *IOP3XX_IABAR2 = 0x0; - *IOP3XX_IATVR2 = 0x0; - *IOP3XX_IALR2 = 0x0; - - /* BAR 3 ( Disabled ) */ - *IOP3XX_IAUBAR3 = 0x0; - *IOP3XX_IABAR3 = 0x0; - *IOP3XX_IATVR3 = 0x0; - *IOP3XX_IALR3 = 0x0; - - /* Clear the outbound windows */ - *IOP3XX_OIOWTVR = 0; - - /* Outbound window 0 */ - *IOP3XX_OMWTVR0 = 0; - *IOP3XX_OUMWTVR0 = 0; - - /* Outbound window 1 */ - *IOP3XX_OMWTVR1 = 0; - *IOP3XX_OUMWTVR1 = 0; -} - -/* Flag to determine whether the ATU is initialized and the PCI bus scanned */ -int init_atu; - -int iop3xx_get_init_atu(void) { - /* check if default has been overridden */ - if (init_atu != IOP3XX_INIT_ATU_DEFAULT) - return init_atu; - else - return IOP3XX_INIT_ATU_DISABLE; -} - -static void __init iop3xx_atu_debug(void) -{ - DBG("PCI: Intel IOP3xx PCI init.\n"); - DBG("PCI: Outbound memory window 0: PCI 0x%08x%08x\n", - *IOP3XX_OUMWTVR0, *IOP3XX_OMWTVR0); - DBG("PCI: Outbound memory window 1: PCI 0x%08x%08x\n", - *IOP3XX_OUMWTVR1, *IOP3XX_OMWTVR1); - DBG("PCI: Outbound IO window: PCI 0x%08x\n", - *IOP3XX_OIOWTVR); - - DBG("PCI: Inbound memory window 0: PCI 0x%08x%08x 0x%08x -> 0x%08x\n", - *IOP3XX_IAUBAR0, *IOP3XX_IABAR0, *IOP3XX_IALR0, *IOP3XX_IATVR0); - DBG("PCI: Inbound memory window 1: PCI 0x%08x%08x 0x%08x\n", - *IOP3XX_IAUBAR1, *IOP3XX_IABAR1, *IOP3XX_IALR1); - DBG("PCI: Inbound memory window 2: PCI 0x%08x%08x 0x%08x -> 0x%08x\n", - *IOP3XX_IAUBAR2, *IOP3XX_IABAR2, *IOP3XX_IALR2, *IOP3XX_IATVR2); - DBG("PCI: Inbound memory window 3: PCI 0x%08x%08x 0x%08x -> 0x%08x\n", - *IOP3XX_IAUBAR3, *IOP3XX_IABAR3, *IOP3XX_IALR3, *IOP3XX_IATVR3); - - DBG("PCI: Expansion ROM window: PCI 0x%08x%08x 0x%08x -> 0x%08x\n", - 0, *IOP3XX_ERBAR, *IOP3XX_ERLR, *IOP3XX_ERTVR); - - DBG("ATU: IOP3XX_ATUCMD=0x%04x\n", *IOP3XX_ATUCMD); - DBG("ATU: IOP3XX_ATUCR=0x%08x\n", *IOP3XX_ATUCR); - - hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, 0, "imprecise external abort"); -} - -/* for platforms that might be host-bus-adapters */ -void __init iop3xx_pci_preinit_cond(void) -{ - if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) { - iop3xx_atu_disable(); - iop3xx_atu_setup(); - iop3xx_atu_debug(); - } -} - -void __init iop3xx_pci_preinit(void) -{ - pcibios_min_mem = 0; - - iop3xx_atu_disable(); - iop3xx_atu_setup(); - iop3xx_atu_debug(); -} - -/* allow init_atu to be user overridden */ -static int __init iop3xx_init_atu_setup(char *str) -{ - init_atu = IOP3XX_INIT_ATU_DEFAULT; - if (str) { - while (*str != '\0') { - switch (*str) { - case 'y': - case 'Y': - init_atu = IOP3XX_INIT_ATU_ENABLE; - break; - case 'n': - case 'N': - init_atu = IOP3XX_INIT_ATU_DISABLE; - break; - case ',': - case '=': - break; - default: - printk(KERN_DEBUG "\"%s\" malformed at " - "character: \'%c\'", - __func__, - *str); - *(str + 1) = '\0'; - } - str++; - } - } - - return 1; -} - -__setup("iop3xx_init_atu", iop3xx_init_atu_setup); - diff --git a/arch/arm/mach-iop32x/pmu.c b/arch/arm/mach-iop32x/pmu.c deleted file mode 100644 index bdbc7a3cb8a3..000000000000 --- a/arch/arm/mach-iop32x/pmu.c +++ /dev/null @@ -1,29 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * PMU IRQ registration for the iop3xx xscale PMU families. - * Copyright (C) 2010 Will Deacon, ARM Ltd. - */ - -#include <linux/platform_device.h> -#include "irqs.h" - -static struct resource pmu_resource = { - .start = IRQ_IOP32X_CORE_PMU, - .end = IRQ_IOP32X_CORE_PMU, - .flags = IORESOURCE_IRQ, -}; - -static struct platform_device pmu_device = { - .name = "xscale-pmu", - .id = -1, - .resource = &pmu_resource, - .num_resources = 1, -}; - -static int __init iop3xx_pmu_init(void) -{ - platform_device_register(&pmu_device); - return 0; -} - -arch_initcall(iop3xx_pmu_init); diff --git a/arch/arm/mach-iop32x/restart.c b/arch/arm/mach-iop32x/restart.c deleted file mode 100644 index 3dfa54d3a7a8..000000000000 --- a/arch/arm/mach-iop32x/restart.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * restart.c - * - * Copyright (C) 2001 MontaVista Software, Inc. - */ -#include <asm/system_misc.h> -#include "hardware.h" -#include "iop3xx.h" - -void iop3xx_restart(enum reboot_mode mode, const char *cmd) -{ - *IOP3XX_PCSR = 0x30; - - /* Jump into ROM at address 0 */ - soft_restart(0); -} diff --git a/arch/arm/mach-iop32x/setup.c b/arch/arm/mach-iop32x/setup.c deleted file mode 100644 index a0a81c28a632..000000000000 --- a/arch/arm/mach-iop32x/setup.c +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/plat-iop/setup.c - * - * Author: Nicolas Pitre <nico@fluxnic.net> - * Copyright (C) 2001 MontaVista Software, Inc. - * Copyright (C) 2004 Intel Corporation. - */ - -#include <linux/mm.h> -#include <linux/init.h> -#include <asm/mach/map.h> -#include "iop3xx.h" - -/* - * Standard IO mapping for all IOP3xx based systems. Note that - * the IOP3xx OCCDR must be mapped uncached and unbuffered. - */ -static struct map_desc iop3xx_std_desc[] __initdata = { - { /* mem mapped registers */ - .virtual = IOP3XX_PERIPHERAL_VIRT_BASE, - .pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE), - .length = IOP3XX_PERIPHERAL_SIZE, - .type = MT_UNCACHED, - }, -}; - -void __init iop3xx_map_io(void) -{ - iotable_init(iop3xx_std_desc, ARRAY_SIZE(iop3xx_std_desc)); -} diff --git a/arch/arm/mach-iop32x/time.c b/arch/arm/mach-iop32x/time.c deleted file mode 100644 index ae533b66fefd..000000000000 --- a/arch/arm/mach-iop32x/time.c +++ /dev/null @@ -1,179 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/plat-iop/time.c - * - * Timer code for IOP32x and IOP33x based systems - * - * Author: Deepak Saxena <dsaxena@mvista.com> - * - * Copyright 2002-2003 MontaVista Software Inc. - */ - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/time.h> -#include <linux/init.h> -#include <linux/timex.h> -#include <linux/io.h> -#include <linux/clocksource.h> -#include <linux/clockchips.h> -#include <linux/export.h> -#include <linux/sched_clock.h> -#include <asm/irq.h> -#include <linux/uaccess.h> -#include <asm/mach/irq.h> -#include <asm/mach/time.h> - -#include "hardware.h" -#include "irqs.h" - -/* - * Minimum clocksource/clockevent timer range in seconds - */ -#define IOP_MIN_RANGE 4 - -/* - * IOP clocksource (free-running timer 1). - */ -static u64 notrace iop_clocksource_read(struct clocksource *unused) -{ - return 0xffffffffu - read_tcr1(); -} - -static struct clocksource iop_clocksource = { - .name = "iop_timer1", - .rating = 300, - .read = iop_clocksource_read, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -/* - * IOP sched_clock() implementation via its clocksource. - */ -static u64 notrace iop_read_sched_clock(void) -{ - return 0xffffffffu - read_tcr1(); -} - -/* - * IOP clockevents (interrupting timer 0). - */ -static int iop_set_next_event(unsigned long delta, - struct clock_event_device *unused) -{ - u32 tmr = IOP_TMR_PRIVILEGED | IOP_TMR_RATIO_1_1; - - BUG_ON(delta == 0); - write_tmr0(tmr & ~(IOP_TMR_EN | IOP_TMR_RELOAD)); - write_tcr0(delta); - write_tmr0((tmr & ~IOP_TMR_RELOAD) | IOP_TMR_EN); - - return 0; -} - -static unsigned long ticks_per_jiffy; - -static int iop_set_periodic(struct clock_event_device *evt) -{ - u32 tmr = read_tmr0(); - - write_tmr0(tmr & ~IOP_TMR_EN); - write_tcr0(ticks_per_jiffy - 1); - write_trr0(ticks_per_jiffy - 1); - tmr |= (IOP_TMR_RELOAD | IOP_TMR_EN); - - write_tmr0(tmr); - return 0; -} - -static int iop_set_oneshot(struct clock_event_device *evt) -{ - u32 tmr = read_tmr0(); - - /* ->set_next_event sets period and enables timer */ - tmr &= ~(IOP_TMR_RELOAD | IOP_TMR_EN); - write_tmr0(tmr); - return 0; -} - -static int iop_shutdown(struct clock_event_device *evt) -{ - u32 tmr = read_tmr0(); - - tmr &= ~IOP_TMR_EN; - write_tmr0(tmr); - return 0; -} - -static int iop_resume(struct clock_event_device *evt) -{ - u32 tmr = read_tmr0(); - - tmr |= IOP_TMR_EN; - write_tmr0(tmr); - return 0; -} - -static struct clock_event_device iop_clockevent = { - .name = "iop_timer0", - .features = CLOCK_EVT_FEAT_PERIODIC | - CLOCK_EVT_FEAT_ONESHOT, - .rating = 300, - .set_next_event = iop_set_next_event, - .set_state_shutdown = iop_shutdown, - .set_state_periodic = iop_set_periodic, - .tick_resume = iop_resume, - .set_state_oneshot = iop_set_oneshot, -}; - -static irqreturn_t -iop_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = dev_id; - - write_tisr(1); - evt->event_handler(evt); - return IRQ_HANDLED; -} - -static unsigned long iop_tick_rate; -unsigned long get_iop_tick_rate(void) -{ - return iop_tick_rate; -} -EXPORT_SYMBOL(get_iop_tick_rate); - -void __init iop_init_time(unsigned long tick_rate) -{ - u32 timer_ctl; - int irq = IRQ_IOP32X_TIMER0; - - sched_clock_register(iop_read_sched_clock, 32, tick_rate); - - ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ); - iop_tick_rate = tick_rate; - - timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | - IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; - - /* - * Set up interrupting clockevent timer 0. - */ - write_tmr0(timer_ctl & ~IOP_TMR_EN); - write_tisr(1); - if (request_irq(irq, iop_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL, - "IOP Timer Tick", &iop_clockevent)) - pr_err("Failed to request irq() %d (IOP Timer Tick)\n", irq); - iop_clockevent.cpumask = cpumask_of(0); - clockevents_config_and_register(&iop_clockevent, tick_rate, - 0xf, 0xfffffffe); - - /* - * Set up free-running clocksource timer 1. - */ - write_trr1(0xffffffff); - write_tcr1(0xffffffff); - write_tmr1(timer_ctl); - clocksource_register_hz(&iop_clocksource, tick_rate); -} diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index d71417d57961..85b0d9ddb7d8 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig @@ -13,99 +13,6 @@ if ARCH_MMP menu "Marvell PXA168/910/MMP2 Implementations" -if ATAGS - -config MACH_ASPENITE - bool "Marvell's PXA168 Aspenite Development Board" - depends on ARCH_MULTI_V5 - depends on UNUSED_BOARD_FILES - select CPU_PXA168 - help - Say 'Y' here if you want to support the Marvell PXA168-based - Aspenite Development Board. - -config MACH_ZYLONITE2 - bool "Marvell's PXA168 Zylonite2 Development Board" - depends on ARCH_MULTI_V5 - depends on UNUSED_BOARD_FILES - select CPU_PXA168 - help - Say 'Y' here if you want to support the Marvell PXA168-based - Zylonite2 Development Board. - -config MACH_AVENGERS_LITE - bool "Marvell's PXA168 Avengers Lite Development Board" - depends on ARCH_MULTI_V5 - depends on UNUSED_BOARD_FILES - select CPU_PXA168 - help - Say 'Y' here if you want to support the Marvell PXA168-based - Avengers Lite Development Board. - -config MACH_TTC_DKB - bool "Marvell's PXA910 TavorEVB/TTC_DKB Development Board" - depends on ARCH_MULTI_V5 - depends on UNUSED_BOARD_FILES - select CPU_PXA910 - help - Say 'Y' here if you want to support the Marvell PXA910-based - TTC_DKB Development Board. - -config MACH_BROWNSTONE - bool "Marvell's Brownstone Development Platform" - depends on ARCH_MULTI_V7 - depends on UNUSED_BOARD_FILES - select CPU_MMP2 - help - Say 'Y' here if you want to support the Marvell MMP2-based - Brown Development Platform. - MMP2-based board can't be co-existed with PXA168-based & - PXA910-based development board. Since MMP2 is compatible to - ARMv7 architecture. - -config MACH_FLINT - bool "Marvell's Flint Development Platform" - depends on ARCH_MULTI_V7 - depends on UNUSED_BOARD_FILES - select CPU_MMP2 - help - Say 'Y' here if you want to support the Marvell MMP2-based - Flint Development Platform. - MMP2-based board can't be co-existed with PXA168-based & - PXA910-based development board. Since MMP2 is compatible to - ARMv7 architecture. - -config MACH_MARVELL_JASPER - bool "Marvell's Jasper Development Platform" - depends on ARCH_MULTI_V7 - depends on UNUSED_BOARD_FILES - select CPU_MMP2 - help - Say 'Y' here if you want to support the Marvell MMP2-base - Jasper Development Platform. - MMP2-based board can't be co-existed with PXA168-based & - PXA910-based development board. Since MMP2 is compatible to - ARMv7 architecture. - -config MACH_TETON_BGA - bool "Marvell's PXA168 Teton BGA Development Board" - depends on ARCH_MULTI_V5 - depends on UNUSED_BOARD_FILES - select CPU_PXA168 - help - Say 'Y' here if you want to support the Marvell PXA168-based - Teton BGA Development Board. - -config MACH_GPLUGD - bool "Marvell's PXA168 GuruPlug Display (gplugD) Board" - depends on ARCH_MULTI_V5 - depends on UNUSED_BOARD_FILES - select CPU_PXA168 - help - Say 'Y' here if you want to support the Marvell PXA168-based - GuruPlug Display (gplugD) Board -endif - config MACH_MMP_DT bool "Support MMP (ARMv5) platforms from device tree" depends on ARCH_MULTI_V5 @@ -175,7 +82,4 @@ config USB_EHCI_MV_U2O help Enables support for OTG controller which can be switched to host mode. -config MMP_SRAM - bool - endif diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index 539d750aaf10..5d4a1a4a48cf 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile @@ -2,32 +2,13 @@ # # Makefile for Marvell's PXA168 processors line # -obj-y += common.o devices.o time.o +obj-y += common.o time.o -# SoC support -obj-$(CONFIG_CPU_PXA168) += pxa168.o -obj-$(CONFIG_CPU_PXA910) += pxa910.o -obj-$(CONFIG_CPU_MMP2) += mmp2.o -obj-$(CONFIG_MMP_SRAM) += sram.o - -ifeq ($(CONFIG_PM),y) -obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o -obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o -endif ifeq ($(CONFIG_SMP),y) obj-$(CONFIG_MACH_MMP3_DT) += platsmp.o endif # board support -obj-$(CONFIG_MACH_ASPENITE) += aspenite.o -obj-$(CONFIG_MACH_ZYLONITE2) += aspenite.o -obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o -obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o -obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o -obj-$(CONFIG_MACH_FLINT) += flint.o -obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o obj-$(CONFIG_MACH_MMP_DT) += mmp-dt.o obj-$(CONFIG_MACH_MMP2_DT) += mmp2-dt.o obj-$(CONFIG_MACH_MMP3_DT) += mmp3.o -obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o -obj-$(CONFIG_MACH_GPLUGD) += gplugd.o diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c deleted file mode 100644 index 6314824b62fc..000000000000 --- a/arch/arm/mach-mmp/aspenite.c +++ /dev/null @@ -1,284 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/aspenite.c - * - * Support for the Marvell PXA168-based Aspenite and Zylonite2 - * Development Platform. - */ -#include <linux/gpio.h> -#include <linux/gpio-pxa.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/smc91x.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/rawnand.h> -#include <linux/interrupt.h> -#include <linux/platform_data/mv_usb.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <video/pxa168fb.h> -#include <linux/input.h> -#include <linux/platform_data/keypad-pxa27x.h> - -#include "addr-map.h" -#include "mfp-pxa168.h" -#include "pxa168.h" -#include "pxa910.h" -#include "irqs.h" -#include "common.h" - -static unsigned long common_pin_config[] __initdata = { - /* Data Flash Interface */ - GPIO0_DFI_D15, - GPIO1_DFI_D14, - GPIO2_DFI_D13, - GPIO3_DFI_D12, - GPIO4_DFI_D11, - GPIO5_DFI_D10, - GPIO6_DFI_D9, - GPIO7_DFI_D8, - GPIO8_DFI_D7, - GPIO9_DFI_D6, - GPIO10_DFI_D5, - GPIO11_DFI_D4, - GPIO12_DFI_D3, - GPIO13_DFI_D2, - GPIO14_DFI_D1, - GPIO15_DFI_D0, - - /* Static Memory Controller */ - GPIO18_SMC_nCS0, - GPIO34_SMC_nCS1, - GPIO23_SMC_nLUA, - GPIO25_SMC_nLLA, - GPIO28_SMC_RDY, - GPIO29_SMC_SCLK, - GPIO35_SMC_BE1, - GPIO36_SMC_BE2, - GPIO27_GPIO, /* Ethernet IRQ */ - - /* UART1 */ - GPIO107_UART1_RXD, - GPIO108_UART1_TXD, - - /* SSP1 */ - GPIO113_I2S_MCLK, - GPIO114_I2S_FRM, - GPIO115_I2S_BCLK, - GPIO116_I2S_RXD, - GPIO117_I2S_TXD, - - /* LCD */ - GPIO56_LCD_FCLK_RD, - GPIO57_LCD_LCLK_A0, - GPIO58_LCD_PCLK_WR, - GPIO59_LCD_DENA_BIAS, - GPIO60_LCD_DD0, - GPIO61_LCD_DD1, - GPIO62_LCD_DD2, - GPIO63_LCD_DD3, - GPIO64_LCD_DD4, - GPIO65_LCD_DD5, - GPIO66_LCD_DD6, - GPIO67_LCD_DD7, - GPIO68_LCD_DD8, - GPIO69_LCD_DD9, - GPIO70_LCD_DD10, - GPIO71_LCD_DD11, - GPIO72_LCD_DD12, - GPIO73_LCD_DD13, - GPIO74_LCD_DD14, - GPIO75_LCD_DD15, - GPIO76_LCD_DD16, - GPIO77_LCD_DD17, - GPIO78_LCD_DD18, - GPIO79_LCD_DD19, - GPIO80_LCD_DD20, - GPIO81_LCD_DD21, - GPIO82_LCD_DD22, - GPIO83_LCD_DD23, - - /* Keypad */ - GPIO109_KP_MKIN1, - GPIO110_KP_MKIN0, - GPIO111_KP_MKOUT7, - GPIO112_KP_MKOUT6, - GPIO121_KP_MKIN4, -}; - -static struct pxa_gpio_platform_data pxa168_gpio_pdata = { - .irq_base = MMP_GPIO_TO_IRQ(0), -}; - -static struct smc91x_platdata smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = SMC_CS1_PHYS_BASE + 0x300, - .end = SMC_CS1_PHYS_BASE + 0xfffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MMP_GPIO_TO_IRQ(27), - .end = MMP_GPIO_TO_IRQ(27), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .dev = { - .platform_data = &smc91x_info, - }, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static struct mtd_partition aspenite_nand_partitions[] = { - { - .name = "bootloader", - .offset = 0, - .size = SZ_1M, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_8M, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = (SZ_2M + SZ_1M), - .mask_flags = 0, - }, { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = SZ_32M + SZ_16M, - .mask_flags = 0, - } -}; - -static struct pxa3xx_nand_platform_data aspenite_nand_info = { - .parts = aspenite_nand_partitions, - .nr_parts = ARRAY_SIZE(aspenite_nand_partitions), -}; - -static struct i2c_board_info aspenite_i2c_info[] __initdata = { - { I2C_BOARD_INFO("wm8753", 0x1b), }, -}; - -static struct fb_videomode video_modes[] = { - [0] = { - .pixclock = 30120, - .refresh = 60, - .xres = 800, - .yres = 480, - .hsync_len = 1, - .left_margin = 215, - .right_margin = 40, - .vsync_len = 1, - .upper_margin = 34, - .lower_margin = 10, - .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, - }, -}; - -struct pxa168fb_mach_info aspenite_lcd_info = { - .id = "Graphic Frame", - .modes = video_modes, - .num_modes = ARRAY_SIZE(video_modes), - .pix_fmt = PIX_FMT_RGB565, - .io_pin_allocation_mode = PIN_MODE_DUMB_24, - .dumb_mode = DUMB_MODE_RGB888, - .active = 1, - .panel_rbswap = 0, - .invert_pixclock = 0, -}; - -static const unsigned int aspenite_matrix_key_map[] = { - KEY(0, 6, KEY_UP), /* SW 4 */ - KEY(0, 7, KEY_DOWN), /* SW 5 */ - KEY(1, 6, KEY_LEFT), /* SW 6 */ - KEY(1, 7, KEY_RIGHT), /* SW 7 */ - KEY(4, 6, KEY_ENTER), /* SW 8 */ - KEY(4, 7, KEY_ESC), /* SW 9 */ -}; - -static struct matrix_keymap_data aspenite_matrix_keymap_data = { - .keymap = aspenite_matrix_key_map, - .keymap_size = ARRAY_SIZE(aspenite_matrix_key_map), -}; - -static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = { - .matrix_key_rows = 5, - .matrix_key_cols = 8, - .matrix_keymap_data = &aspenite_matrix_keymap_data, - .debounce_interval = 30, -}; - -#if IS_ENABLED(CONFIG_USB_EHCI_MV) -static struct mv_usb_platform_data pxa168_sph_pdata = { - .mode = MV_USB_MODE_HOST, - .phy_init = pxa_usb_phy_init, - .phy_deinit = pxa_usb_phy_deinit, - .set_vbus = NULL, -}; -#endif - -static void __init common_init(void) -{ - mfp_config(ARRAY_AND_SIZE(common_pin_config)); - - /* on-chip devices */ - pxa168_add_uart(1); - pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info)); - pxa168_add_ssp(1); - pxa168_add_nand(&aspenite_nand_info); - pxa168_add_fb(&aspenite_lcd_info); - pxa168_add_keypad(&aspenite_keypad_info); - platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata, - sizeof(struct pxa_gpio_platform_data)); - platform_device_register(&pxa168_device_gpio); - - /* off-chip devices */ - platform_device_register(&smc91x_device); - -#if IS_ENABLED(CONFIG_USB_SUPPORT) -#if IS_ENABLED(CONFIG_PHY_PXA_USB) - platform_device_register(&pxa168_device_usb_phy); -#endif - -#if IS_ENABLED(CONFIG_USB_EHCI_MV) - pxa168_add_usb_host(&pxa168_sph_pdata); -#endif -#endif -} - -MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") - .map_io = mmp_map_io, - .nr_irqs = MMP_NR_IRQS, - .init_irq = pxa168_init_irq, - .init_time = pxa168_timer_init, - .init_machine = common_init, - .restart = pxa168_restart, -MACHINE_END - -MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") - .map_io = mmp_map_io, - .nr_irqs = MMP_NR_IRQS, - .init_irq = pxa168_init_irq, - .init_time = pxa168_timer_init, - .init_machine = common_init, - .restart = pxa168_restart, -MACHINE_END diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c deleted file mode 100644 index 12e5a9441df9..000000000000 --- a/arch/arm/mach-mmp/avengers_lite.c +++ /dev/null @@ -1,55 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/avengers_lite.c - * - * Support for the Marvell PXA168-based Avengers lite Development Platform. - * - * Copyright (C) 2009-2010 Marvell International Ltd. - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/gpio-pxa.h> -#include <linux/platform_device.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "addr-map.h" -#include "mfp-pxa168.h" -#include "pxa168.h" -#include "irqs.h" - - -#include "common.h" -#include <linux/delay.h> - -/* Avengers lite MFP configurations */ -static unsigned long avengers_lite_pin_config_V16F[] __initdata = { - /* DEBUG_UART */ - GPIO88_UART2_TXD, - GPIO89_UART2_RXD, -}; - -static struct pxa_gpio_platform_data pxa168_gpio_pdata = { - .irq_base = MMP_GPIO_TO_IRQ(0), -}; - -static void __init avengers_lite_init(void) -{ - mfp_config(ARRAY_AND_SIZE(avengers_lite_pin_config_V16F)); - - /* on-chip devices */ - pxa168_add_uart(2); - platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata, - sizeof(struct pxa_gpio_platform_data)); - platform_device_register(&pxa168_device_gpio); -} - -MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") - .map_io = mmp_map_io, - .nr_irqs = MMP_NR_IRQS, - .init_irq = pxa168_init_irq, - .init_time = pxa168_timer_init, - .init_machine = avengers_lite_init, - .restart = pxa168_restart, -MACHINE_END diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c deleted file mode 100644 index ce93bc395546..000000000000 --- a/arch/arm/mach-mmp/brownstone.c +++ /dev/null @@ -1,237 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/brownstone.c - * - * Support for the Marvell Brownstone Development Platform. - * - * Copyright (C) 2009-2010 Marvell International Ltd. - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio-pxa.h> -#include <linux/gpio/machine.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/max8649.h> -#include <linux/regulator/fixed.h> -#include <linux/mfd/max8925.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "addr-map.h" -#include "mfp-mmp2.h" -#include "mmp2.h" -#include "irqs.h" - -#include "common.h" - -#define BROWNSTONE_NR_IRQS (MMP_NR_IRQS + 40) - -#define GPIO_5V_ENABLE (89) - -static unsigned long brownstone_pin_config[] __initdata = { - /* UART1 */ - GPIO29_UART1_RXD, - GPIO30_UART1_TXD, - - /* UART3 */ - GPIO51_UART3_RXD, - GPIO52_UART3_TXD, - - /* DFI */ - GPIO168_DFI_D0, - GPIO167_DFI_D1, - GPIO166_DFI_D2, - GPIO165_DFI_D3, - GPIO107_DFI_D4, - GPIO106_DFI_D5, - GPIO105_DFI_D6, - GPIO104_DFI_D7, - GPIO111_DFI_D8, - GPIO164_DFI_D9, - GPIO163_DFI_D10, - GPIO162_DFI_D11, - GPIO161_DFI_D12, - GPIO110_DFI_D13, - GPIO109_DFI_D14, - GPIO108_DFI_D15, - GPIO143_ND_nCS0, - GPIO144_ND_nCS1, - GPIO147_ND_nWE, - GPIO148_ND_nRE, - GPIO150_ND_ALE, - GPIO149_ND_CLE, - GPIO112_ND_RDY0, - GPIO160_ND_RDY1, - - /* PMIC */ - PMIC_PMIC_INT | MFP_LPM_EDGE_FALL, - - /* MMC0 */ - GPIO131_MMC1_DAT3 | MFP_PULL_HIGH, - GPIO132_MMC1_DAT2 | MFP_PULL_HIGH, - GPIO133_MMC1_DAT1 | MFP_PULL_HIGH, - GPIO134_MMC1_DAT0 | MFP_PULL_HIGH, - GPIO136_MMC1_CMD | MFP_PULL_HIGH, - GPIO139_MMC1_CLK, - GPIO140_MMC1_CD | MFP_PULL_LOW, - GPIO141_MMC1_WP | MFP_PULL_LOW, - - /* MMC1 */ - GPIO37_MMC2_DAT3 | MFP_PULL_HIGH, - GPIO38_MMC2_DAT2 | MFP_PULL_HIGH, - GPIO39_MMC2_DAT1 | MFP_PULL_HIGH, - GPIO40_MMC2_DAT0 | MFP_PULL_HIGH, - GPIO41_MMC2_CMD | MFP_PULL_HIGH, - GPIO42_MMC2_CLK, - - /* MMC2 */ - GPIO165_MMC3_DAT7 | MFP_PULL_HIGH, - GPIO162_MMC3_DAT6 | MFP_PULL_HIGH, - GPIO166_MMC3_DAT5 | MFP_PULL_HIGH, - GPIO163_MMC3_DAT4 | MFP_PULL_HIGH, - GPIO167_MMC3_DAT3 | MFP_PULL_HIGH, - GPIO164_MMC3_DAT2 | MFP_PULL_HIGH, - GPIO168_MMC3_DAT1 | MFP_PULL_HIGH, - GPIO111_MMC3_DAT0 | MFP_PULL_HIGH, - GPIO112_MMC3_CMD | MFP_PULL_HIGH, - GPIO151_MMC3_CLK, - - /* 5V regulator */ - GPIO89_GPIO, -}; - -static struct pxa_gpio_platform_data mmp2_gpio_pdata = { - .irq_base = MMP_GPIO_TO_IRQ(0), -}; - -static struct regulator_consumer_supply max8649_supply[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data max8649_init_data = { - .constraints = { - .name = "vcc_core range", - .min_uV = 1150000, - .max_uV = 1280000, - .always_on = 1, - .boot_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8649_supply[0], -}; - -static struct max8649_platform_data brownstone_max8649_info = { - .mode = 2, /* VID1 = 1, VID0 = 0 */ - .extclk = 0, - .ramp_timing = MAX8649_RAMP_32MV, - .regulator = &max8649_init_data, -}; - -static struct regulator_consumer_supply brownstone_v_5vp_supplies[] = { - REGULATOR_SUPPLY("v_5vp", NULL), -}; - -static struct regulator_init_data brownstone_v_5vp_data = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(brownstone_v_5vp_supplies), - .consumer_supplies = brownstone_v_5vp_supplies, -}; - -static struct fixed_voltage_config brownstone_v_5vp = { - .supply_name = "v_5vp", - .microvolts = 5000000, - .enabled_at_boot = 1, - .init_data = &brownstone_v_5vp_data, -}; - -static struct platform_device brownstone_v_5vp_device = { - .name = "reg-fixed-voltage", - .id = 1, - .dev = { - .platform_data = &brownstone_v_5vp, - }, -}; - -static struct gpiod_lookup_table brownstone_v_5vp_gpiod_table = { - .dev_id = "reg-fixed-voltage.1", /* .id set to 1 above */ - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_5V_ENABLE, - NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct max8925_platform_data brownstone_max8925_info = { - .irq_base = MMP_NR_IRQS, -}; - -static struct i2c_board_info brownstone_twsi1_info[] = { - [0] = { - .type = "max8649", - .addr = 0x60, - .platform_data = &brownstone_max8649_info, - }, - [1] = { - .type = "max8925", - .addr = 0x3c, - .irq = IRQ_MMP2_PMIC, - .platform_data = &brownstone_max8925_info, - }, -}; - -static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = { - .clk_delay_cycles = 0x1f, -}; - -static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc2 = { - .clk_delay_cycles = 0x1f, - .flags = PXA_FLAG_CARD_PERMANENT - | PXA_FLAG_SD_8_BIT_CAPABLE_SLOT, -}; - -static struct sram_platdata mmp2_asram_platdata = { - .pool_name = "asram", - .granularity = SRAM_GRANULARITY, -}; - -static struct sram_platdata mmp2_isram_platdata = { - .pool_name = "isram", - .granularity = SRAM_GRANULARITY, -}; - -static void __init brownstone_init(void) -{ - mfp_config(ARRAY_AND_SIZE(brownstone_pin_config)); - - /* on-chip devices */ - mmp2_add_uart(1); - mmp2_add_uart(3); - platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata, - sizeof(struct pxa_gpio_platform_data)); - platform_device_register(&mmp2_device_gpio); - mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); - mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ - mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ - mmp2_add_asram(&mmp2_asram_platdata); - mmp2_add_isram(&mmp2_isram_platdata); - - /* enable 5v regulator */ - gpiod_add_lookup_table(&brownstone_v_5vp_gpiod_table); - platform_device_register(&brownstone_v_5vp_device); -} - -MACHINE_START(BROWNSTONE, "Brownstone Development Platform") - /* Maintainer: Haojian Zhuang <haojian.zhuang@marvell.com> */ - .map_io = mmp_map_io, - .nr_irqs = BROWNSTONE_NR_IRQS, - .init_irq = mmp2_init_irq, - .init_time = mmp2_timer_init, - .init_machine = brownstone_init, - .restart = mmp_restart, -MACHINE_END diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c index e94349d4726c..b3c1a248db31 100644 --- a/arch/arm/mach-mmp/common.c +++ b/arch/arm/mach-mmp/common.c @@ -58,8 +58,3 @@ void __init mmp2_map_io(void) mmp_map_io(); iotable_init(mmp2_io_desc, ARRAY_SIZE(mmp2_io_desc)); } - -void mmp_restart(enum reboot_mode mode, const char *cmd) -{ - soft_restart(0); -} diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h index ed56b3f15b45..e18f05d5d68d 100644 --- a/arch/arm/mach-mmp/common.h +++ b/arch/arm/mach-mmp/common.h @@ -1,9 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ #include <linux/reboot.h> -#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) extern void mmp_timer_init(int irq, unsigned long rate); extern void __init mmp_map_io(void); extern void __init mmp2_map_io(void); -extern void mmp_restart(enum reboot_mode, const char *); diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c deleted file mode 100644 index 9968239d8041..000000000000 --- a/arch/arm/mach-mmp/devices.c +++ /dev/null @@ -1,359 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/devices.c - */ - -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/delay.h> - -#include <asm/irq.h> -#include "irqs.h" -#include "devices.h" -#include <linux/soc/mmp/cputype.h> -#include "regs-usb.h" - -int __init mmp_register_device(struct mmp_device_desc *desc, - void *data, size_t size) -{ - struct platform_device *pdev; - struct resource res[2 + MAX_RESOURCE_DMA]; - int i, ret = 0, nres = 0; - - pdev = platform_device_alloc(desc->drv_name, desc->id); - if (pdev == NULL) - return -ENOMEM; - - pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); - - memset(res, 0, sizeof(res)); - - if (desc->start != -1ul && desc->size > 0) { - res[nres].start = desc->start; - res[nres].end = desc->start + desc->size - 1; - res[nres].flags = IORESOURCE_MEM; - nres++; - } - - if (desc->irq != NO_IRQ) { - res[nres].start = desc->irq; - res[nres].end = desc->irq; - res[nres].flags = IORESOURCE_IRQ; - nres++; - } - - for (i = 0; i < MAX_RESOURCE_DMA; i++, nres++) { - if (desc->dma[i] == 0) - break; - - res[nres].start = desc->dma[i]; - res[nres].end = desc->dma[i]; - res[nres].flags = IORESOURCE_DMA; - } - - ret = platform_device_add_resources(pdev, res, nres); - if (ret) { - platform_device_put(pdev); - return ret; - } - - if (data && size) { - ret = platform_device_add_data(pdev, data, size); - if (ret) { - platform_device_put(pdev); - return ret; - } - } - - return platform_device_add(pdev); -} - -#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET) -#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV) -#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168) - -/***************************************************************************** - * The registers read/write routines - *****************************************************************************/ - -static unsigned int u2o_get(void __iomem *base, unsigned int offset) -{ - return readl_relaxed(base + offset); -} - -static void u2o_set(void __iomem *base, unsigned int offset, - unsigned int value) -{ - u32 reg; - - reg = readl_relaxed(base + offset); - reg |= value; - writel_relaxed(reg, base + offset); - readl_relaxed(base + offset); -} - -static void u2o_clear(void __iomem *base, unsigned int offset, - unsigned int value) -{ - u32 reg; - - reg = readl_relaxed(base + offset); - reg &= ~value; - writel_relaxed(reg, base + offset); - readl_relaxed(base + offset); -} - -static void u2o_write(void __iomem *base, unsigned int offset, - unsigned int value) -{ - writel_relaxed(value, base + offset); - readl_relaxed(base + offset); -} - - -static DEFINE_MUTEX(phy_lock); -static int phy_init_cnt; - -static int usb_phy_init_internal(void __iomem *base) -{ - int loops; - - pr_info("Init usb phy!!!\n"); - - /* Initialize the USB PHY power */ - if (cpu_is_pxa910()) { - u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT) - | (1<<UTMI_CTRL_PU_REF_SHIFT)); - } - - u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT); - u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT); - - /* UTMI_PLL settings */ - u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK - | UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK - | UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK - | UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK); - - u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT - | 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT - | 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT - | 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT); - - /* UTMI_TX */ - u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK - | UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK - | UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK - | UTMI_TX_AMP_MASK); - u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT - | 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT - | 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT); - - /* UTMI_RX */ - u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK - | UTMI_REG_SQ_LENGTH_MASK); - u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT - | 2<<UTMI_REG_SQ_LENGTH_SHIFT); - - /* UTMI_IVREF */ - if (cpu_is_pxa168()) - /* fixing Microsoft Altair board interface with NEC hub issue - - * Set UTMI_IVREF from 0x4a3 to 0x4bf */ - u2o_write(base, UTMI_IVREF, 0x4bf); - - /* toggle VCOCAL_START bit of UTMI_PLL */ - udelay(200); - u2o_set(base, UTMI_PLL, VCOCAL_START); - udelay(40); - u2o_clear(base, UTMI_PLL, VCOCAL_START); - - /* toggle REG_RCAL_START bit of UTMI_TX */ - udelay(400); - u2o_set(base, UTMI_TX, REG_RCAL_START); - udelay(40); - u2o_clear(base, UTMI_TX, REG_RCAL_START); - udelay(400); - - /* Make sure PHY PLL is ready */ - loops = 0; - while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) { - mdelay(1); - loops++; - if (loops > 100) { - printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n", - u2o_get(base, UTMI_PLL)); - break; - } - } - - if (cpu_is_pxa168()) { - u2o_set(base, UTMI_RESERVE, 1 << 5); - /* Turn on UTMI PHY OTG extension */ - u2o_write(base, UTMI_OTG_ADDON, 1); - } - - return 0; -} - -static int usb_phy_deinit_internal(void __iomem *base) -{ - pr_info("Deinit usb phy!!!\n"); - - if (cpu_is_pxa168()) - u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON); - - u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN); - u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN); - u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN); - u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT); - u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT); - - return 0; -} - -int pxa_usb_phy_init(void __iomem *phy_reg) -{ - mutex_lock(&phy_lock); - if (phy_init_cnt++ == 0) - usb_phy_init_internal(phy_reg); - mutex_unlock(&phy_lock); - return 0; -} - -void pxa_usb_phy_deinit(void __iomem *phy_reg) -{ - WARN_ON(phy_init_cnt == 0); - - mutex_lock(&phy_lock); - if (--phy_init_cnt == 0) - usb_phy_deinit_internal(phy_reg); - mutex_unlock(&phy_lock); -} -#endif -#endif -#endif - -#if IS_ENABLED(CONFIG_USB_SUPPORT) -static u64 __maybe_unused usb_dma_mask = ~(u32)0; - -#if IS_ENABLED(CONFIG_PHY_PXA_USB) -static struct resource pxa168_usb_phy_resources[] = { - [0] = { - .start = PXA168_U2O_PHYBASE, - .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device pxa168_device_usb_phy = { - .name = "pxa-usb-phy", - .id = -1, - .resource = pxa168_usb_phy_resources, - .num_resources = ARRAY_SIZE(pxa168_usb_phy_resources), - .dev = { - .dma_mask = &usb_dma_mask, - .coherent_dma_mask = 0xffffffff, - } -}; -#endif /* CONFIG_PHY_PXA_USB */ - -#if IS_ENABLED(CONFIG_USB_MV_UDC) -static struct resource pxa168_u2o_resources[] = { - /* regbase */ - [0] = { - .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET, - .end = PXA168_U2O_REGBASE + USB_REG_RANGE, - .flags = IORESOURCE_MEM, - .name = "capregs", - }, - /* phybase */ - [1] = { - .start = PXA168_U2O_PHYBASE, - .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE, - .flags = IORESOURCE_MEM, - .name = "phyregs", - }, - [2] = { - .start = IRQ_PXA168_USB1, - .end = IRQ_PXA168_USB1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa168_device_u2o = { - .name = "mv-udc", - .id = -1, - .resource = pxa168_u2o_resources, - .num_resources = ARRAY_SIZE(pxa168_u2o_resources), - .dev = { - .dma_mask = &usb_dma_mask, - .coherent_dma_mask = 0xffffffff, - } -}; -#endif /* CONFIG_USB_MV_UDC */ - -#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O) -static struct resource pxa168_u2oehci_resources[] = { - [0] = { - .start = PXA168_U2O_REGBASE, - .end = PXA168_U2O_REGBASE + USB_REG_RANGE, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PXA168_USB1, - .end = IRQ_PXA168_USB1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa168_device_u2oehci = { - .name = "pxa-u2oehci", - .id = -1, - .dev = { - .dma_mask = &usb_dma_mask, - .coherent_dma_mask = 0xffffffff, - }, - - .num_resources = ARRAY_SIZE(pxa168_u2oehci_resources), - .resource = pxa168_u2oehci_resources, -}; -#endif - -#if IS_ENABLED(CONFIG_USB_MV_OTG) -static struct resource pxa168_u2ootg_resources[] = { - /* regbase */ - [0] = { - .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET, - .end = PXA168_U2O_REGBASE + USB_REG_RANGE, - .flags = IORESOURCE_MEM, - .name = "capregs", - }, - /* phybase */ - [1] = { - .start = PXA168_U2O_PHYBASE, - .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE, - .flags = IORESOURCE_MEM, - .name = "phyregs", - }, - [2] = { - .start = IRQ_PXA168_USB1, - .end = IRQ_PXA168_USB1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa168_device_u2ootg = { - .name = "mv-otg", - .id = -1, - .dev = { - .dma_mask = &usb_dma_mask, - .coherent_dma_mask = 0xffffffff, - }, - - .num_resources = ARRAY_SIZE(pxa168_u2ootg_resources), - .resource = pxa168_u2ootg_resources, -}; -#endif /* CONFIG_USB_MV_OTG */ - -#endif diff --git a/arch/arm/mach-mmp/devices.h b/arch/arm/mach-mmp/devices.h deleted file mode 100644 index d4920ebfebc5..000000000000 --- a/arch/arm/mach-mmp/devices.h +++ /dev/null @@ -1,57 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __MACH_DEVICE_H -#define __MACH_DEVICE_H - -#include <linux/types.h> - -#define MAX_RESOURCE_DMA 2 - -/* structure for describing the on-chip devices */ -struct mmp_device_desc { - const char *dev_name; - const char *drv_name; - int id; - int irq; - unsigned long start; - unsigned long size; - int dma[MAX_RESOURCE_DMA]; -}; - -#define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ -struct mmp_device_desc pxa168_device_##_name __initdata = { \ - .dev_name = "pxa168-" #_name, \ - .drv_name = _drv, \ - .id = _id, \ - .irq = IRQ_PXA168_##_irq, \ - .start = _start, \ - .size = _size, \ - .dma = { _dma }, \ -}; - -#define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ -struct mmp_device_desc pxa910_device_##_name __initdata = { \ - .dev_name = "pxa910-" #_name, \ - .drv_name = _drv, \ - .id = _id, \ - .irq = IRQ_PXA910_##_irq, \ - .start = _start, \ - .size = _size, \ - .dma = { _dma }, \ -}; - -#define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ -struct mmp_device_desc mmp2_device_##_name __initdata = { \ - .dev_name = "mmp2-" #_name, \ - .drv_name = _drv, \ - .id = _id, \ - .irq = IRQ_MMP2_##_irq, \ - .start = _start, \ - .size = _size, \ - .dma = { _dma }, \ -} - -extern int mmp_register_device(struct mmp_device_desc *, void *, size_t); -extern int pxa_usb_phy_init(void __iomem *phy_reg); -extern void pxa_usb_phy_deinit(void __iomem *phy_reg); - -#endif /* __MACH_DEVICE_H */ diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c deleted file mode 100644 index 9a7054368e55..000000000000 --- a/arch/arm/mach-mmp/flint.c +++ /dev/null @@ -1,131 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/flint.c - * - * Support for the Marvell Flint Development Platform. - * - * Copyright (C) 2009 Marvell International Ltd. - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/smc91x.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/gpio-pxa.h> -#include <linux/interrupt.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "addr-map.h" -#include "mfp-mmp2.h" -#include "mmp2.h" -#include "irqs.h" - -#include "common.h" - -#define FLINT_NR_IRQS (MMP_NR_IRQS + 48) - -static unsigned long flint_pin_config[] __initdata = { - /* UART1 */ - GPIO45_UART1_RXD, - GPIO46_UART1_TXD, - - /* UART2 */ - GPIO47_UART2_RXD, - GPIO48_UART2_TXD, - - /* SMC */ - GPIO151_SMC_SCLK, - GPIO145_SMC_nCS0, - GPIO146_SMC_nCS1, - GPIO152_SMC_BE0, - GPIO153_SMC_BE1, - GPIO154_SMC_IRQ, - GPIO113_SMC_RDY, - - /*Ethernet*/ - GPIO155_GPIO, - - /* DFI */ - GPIO168_DFI_D0, - GPIO167_DFI_D1, - GPIO166_DFI_D2, - GPIO165_DFI_D3, - GPIO107_DFI_D4, - GPIO106_DFI_D5, - GPIO105_DFI_D6, - GPIO104_DFI_D7, - GPIO111_DFI_D8, - GPIO164_DFI_D9, - GPIO163_DFI_D10, - GPIO162_DFI_D11, - GPIO161_DFI_D12, - GPIO110_DFI_D13, - GPIO109_DFI_D14, - GPIO108_DFI_D15, - GPIO143_ND_nCS0, - GPIO144_ND_nCS1, - GPIO147_ND_nWE, - GPIO148_ND_nRE, - GPIO150_ND_ALE, - GPIO149_ND_CLE, - GPIO112_ND_RDY0, - GPIO160_ND_RDY1, -}; - -static struct pxa_gpio_platform_data mmp2_gpio_pdata = { - .irq_base = MMP_GPIO_TO_IRQ(0), -}; - -static struct smc91x_platdata flint_smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = SMC_CS1_PHYS_BASE + 0x300, - .end = SMC_CS1_PHYS_BASE + 0xfffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MMP_GPIO_TO_IRQ(155), - .end = MMP_GPIO_TO_IRQ(155), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .dev = { - .platform_data = &flint_smc91x_info, - }, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static void __init flint_init(void) -{ - mfp_config(ARRAY_AND_SIZE(flint_pin_config)); - - /* on-chip devices */ - mmp2_add_uart(1); - mmp2_add_uart(2); - platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata, - sizeof(struct pxa_gpio_platform_data)); - platform_device_register(&mmp2_device_gpio); - - /* off-chip devices */ - platform_device_register(&smc91x_device); -} - -MACHINE_START(FLINT, "Flint Development Platform") - .map_io = mmp_map_io, - .nr_irqs = FLINT_NR_IRQS, - .init_irq = mmp2_init_irq, - .init_time = mmp2_timer_init, - .init_machine = flint_init, - .restart = mmp_restart, -MACHINE_END diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c deleted file mode 100644 index 5888b71944b8..000000000000 --- a/arch/arm/mach-mmp/gplugd.c +++ /dev/null @@ -1,206 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/gplugd.c - * - * Support for the Marvell PXA168-based GuruPlug Display (gplugD) Platform. - */ - -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <linux/gpio-pxa.h> - -#include <asm/mach/arch.h> -#include <asm/mach-types.h> - -#include "irqs.h" -#include "pxa168.h" -#include "mfp-pxa168.h" - -#include "common.h" - -static unsigned long gplugd_pin_config[] __initdata = { - /* UART3 */ - GPIO8_UART3_TXD, - GPIO9_UART3_RXD, - GPIO1O_UART3_CTS, - GPIO11_UART3_RTS, - - /* USB OTG PEN */ - GPIO18_GPIO, - - /* MMC2 */ - GPIO28_MMC2_CMD, - GPIO29_MMC2_CLK, - GPIO30_MMC2_DAT0, - GPIO31_MMC2_DAT1, - GPIO32_MMC2_DAT2, - GPIO33_MMC2_DAT3, - - /* LCD & HDMI clock selection GPIO: 0: 74.176MHz, 1: 74.25 MHz */ - GPIO35_GPIO, - GPIO36_GPIO, /* CEC Interrupt */ - - /* MMC1 */ - GPIO43_MMC1_CLK, - GPIO49_MMC1_CMD, - GPIO41_MMC1_DAT0, - GPIO40_MMC1_DAT1, - GPIO52_MMC1_DAT2, - GPIO51_MMC1_DAT3, - GPIO53_MMC1_CD, - - /* LCD */ - GPIO56_LCD_FCLK_RD, - GPIO57_LCD_LCLK_A0, - GPIO58_LCD_PCLK_WR, - GPIO59_LCD_DENA_BIAS, - GPIO60_LCD_DD0, - GPIO61_LCD_DD1, - GPIO62_LCD_DD2, - GPIO63_LCD_DD3, - GPIO64_LCD_DD4, - GPIO65_LCD_DD5, - GPIO66_LCD_DD6, - GPIO67_LCD_DD7, - GPIO68_LCD_DD8, - GPIO69_LCD_DD9, - GPIO70_LCD_DD10, - GPIO71_LCD_DD11, - GPIO72_LCD_DD12, - GPIO73_LCD_DD13, - GPIO74_LCD_DD14, - GPIO75_LCD_DD15, - GPIO76_LCD_DD16, - GPIO77_LCD_DD17, - GPIO78_LCD_DD18, - GPIO79_LCD_DD19, - GPIO80_LCD_DD20, - GPIO81_LCD_DD21, - GPIO82_LCD_DD22, - GPIO83_LCD_DD23, - - /* GPIO */ - GPIO84_GPIO, - GPIO85_GPIO, - - /* Fast-Ethernet*/ - GPIO86_TX_CLK, - GPIO87_TX_EN, - GPIO88_TX_DQ3, - GPIO89_TX_DQ2, - GPIO90_TX_DQ1, - GPIO91_TX_DQ0, - GPIO92_MII_CRS, - GPIO93_MII_COL, - GPIO94_RX_CLK, - GPIO95_RX_ER, - GPIO96_RX_DQ3, - GPIO97_RX_DQ2, - GPIO98_RX_DQ1, - GPIO99_RX_DQ0, - GPIO100_MII_MDC, - GPIO101_MII_MDIO, - GPIO103_RX_DV, - GPIO104_GPIO, /* Reset PHY */ - - /* RTC interrupt */ - GPIO102_GPIO, - - /* I2C */ - GPIO105_CI2C_SDA, - GPIO106_CI2C_SCL, - - /* SPI NOR Flash on SSP2 */ - GPIO107_SSP2_RXD, - GPIO108_SSP2_TXD, - GPIO110_GPIO, /* SPI_CSn */ - GPIO111_SSP2_CLK, - - /* Select JTAG */ - GPIO109_GPIO, - - /* I2S */ - GPIO114_I2S_FRM, - GPIO115_I2S_BCLK, - GPIO116_I2S_TXD -}; - -static struct pxa_gpio_platform_data pxa168_gpio_pdata = { - .irq_base = MMP_GPIO_TO_IRQ(0), -}; - -static struct i2c_board_info gplugd_i2c_board_info[] = { - { - .type = "isl1208", - .addr = 0x6F, - } -}; - -/* Bring PHY out of reset by setting GPIO 104 */ -static int gplugd_eth_init(void) -{ - if (unlikely(gpio_request(104, "ETH_RESET_N"))) { - printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet " - "PHY out of reset\n"); - return -EIO; - } - - gpio_direction_output(104, 1); - gpio_free(104); - return 0; -} - -struct pxa168_eth_platform_data gplugd_eth_platform_data = { - .port_number = 0, - .phy_addr = 0, - .speed = 0, /* Autonagotiation */ - .intf = PHY_INTERFACE_MODE_RMII, - .init = gplugd_eth_init, -}; - -static void __init select_disp_freq(void) -{ - /* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */ - if (unlikely(gpio_request(35, "DISP_FREQ_SEL"))) { - printk(KERN_ERR "Can't get hold of GPIO 35 to select display " - "frequency\n"); - } else { - gpio_direction_output(35, 1); - gpio_free(35); - } - - if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) { - printk(KERN_ERR "Can't get hold of GPIO 85 to select display " - "frequency\n"); - } else { - gpio_direction_output(85, 0); - gpio_free(85); - } -} - -static void __init gplugd_init(void) -{ - mfp_config(ARRAY_AND_SIZE(gplugd_pin_config)); - - select_disp_freq(); - - /* on-chip devices */ - pxa168_add_uart(3); - pxa168_add_ssp(1); - pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); - platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata, - sizeof(struct pxa_gpio_platform_data)); - platform_device_register(&pxa168_device_gpio); - - pxa168_add_eth(&gplugd_eth_platform_data); -} - -MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform") - .map_io = mmp_map_io, - .nr_irqs = MMP_NR_IRQS, - .init_irq = pxa168_init_irq, - .init_time = pxa168_timer_init, - .init_machine = gplugd_init, - .restart = pxa168_restart, -MACHINE_END diff --git a/arch/arm/mach-mmp/irqs.h b/arch/arm/mach-mmp/irqs.h deleted file mode 100644 index 5acc4d532a43..000000000000 --- a/arch/arm/mach-mmp/irqs.h +++ /dev/null @@ -1,240 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_MACH_IRQS_H -#define __ASM_MACH_IRQS_H - -/* - * Interrupt numbers for PXA168 - */ -#define IRQ_PXA168_NONE (-1) -#define IRQ_PXA168_SSP4 0 -#define IRQ_PXA168_SSP3 1 -#define IRQ_PXA168_SSP2 2 -#define IRQ_PXA168_SSP1 3 -#define IRQ_PXA168_PMIC_INT 4 -#define IRQ_PXA168_RTC_INT 5 -#define IRQ_PXA168_RTC_ALARM 6 -#define IRQ_PXA168_TWSI0 7 -#define IRQ_PXA168_GPU 8 -#define IRQ_PXA168_KEYPAD 9 -#define IRQ_PXA168_ONEWIRE 12 -#define IRQ_PXA168_TIMER1 13 -#define IRQ_PXA168_TIMER2 14 -#define IRQ_PXA168_TIMER3 15 -#define IRQ_PXA168_CMU 16 -#define IRQ_PXA168_SSP5 17 -#define IRQ_PXA168_MSP_WAKEUP 19 -#define IRQ_PXA168_CF_WAKEUP 20 -#define IRQ_PXA168_XD_WAKEUP 21 -#define IRQ_PXA168_MFU 22 -#define IRQ_PXA168_MSP 23 -#define IRQ_PXA168_CF 24 -#define IRQ_PXA168_XD 25 -#define IRQ_PXA168_DDR_INT 26 -#define IRQ_PXA168_UART1 27 -#define IRQ_PXA168_UART2 28 -#define IRQ_PXA168_UART3 29 -#define IRQ_PXA168_WDT 35 -#define IRQ_PXA168_MAIN_PMU 36 -#define IRQ_PXA168_FRQ_CHANGE 38 -#define IRQ_PXA168_SDH1 39 -#define IRQ_PXA168_SDH2 40 -#define IRQ_PXA168_LCD 41 -#define IRQ_PXA168_CI 42 -#define IRQ_PXA168_USB1 44 -#define IRQ_PXA168_NAND 45 -#define IRQ_PXA168_HIFI_DMA 46 -#define IRQ_PXA168_DMA_INT0 47 -#define IRQ_PXA168_DMA_INT1 48 -#define IRQ_PXA168_GPIOX 49 -#define IRQ_PXA168_USB2 51 -#define IRQ_PXA168_AC97 57 -#define IRQ_PXA168_TWSI1 58 -#define IRQ_PXA168_AP_PMU 60 -#define IRQ_PXA168_SM_INT 63 - -/* - * Interrupt numbers for PXA910 - */ -#define IRQ_PXA910_NONE (-1) -#define IRQ_PXA910_AIRQ 0 -#define IRQ_PXA910_SSP3 1 -#define IRQ_PXA910_SSP2 2 -#define IRQ_PXA910_SSP1 3 -#define IRQ_PXA910_PMIC_INT 4 -#define IRQ_PXA910_RTC_INT 5 -#define IRQ_PXA910_RTC_ALARM 6 -#define IRQ_PXA910_TWSI0 7 -#define IRQ_PXA910_GPU 8 -#define IRQ_PXA910_KEYPAD 9 -#define IRQ_PXA910_ROTARY 10 -#define IRQ_PXA910_TRACKBALL 11 -#define IRQ_PXA910_ONEWIRE 12 -#define IRQ_PXA910_AP1_TIMER1 13 -#define IRQ_PXA910_AP1_TIMER2 14 -#define IRQ_PXA910_AP1_TIMER3 15 -#define IRQ_PXA910_IPC_AP0 16 -#define IRQ_PXA910_IPC_AP1 17 -#define IRQ_PXA910_IPC_AP2 18 -#define IRQ_PXA910_IPC_AP3 19 -#define IRQ_PXA910_IPC_AP4 20 -#define IRQ_PXA910_IPC_CP0 21 -#define IRQ_PXA910_IPC_CP1 22 -#define IRQ_PXA910_IPC_CP2 23 -#define IRQ_PXA910_IPC_CP3 24 -#define IRQ_PXA910_IPC_CP4 25 -#define IRQ_PXA910_L2_DDR 26 -#define IRQ_PXA910_UART2 27 -#define IRQ_PXA910_UART3 28 -#define IRQ_PXA910_AP2_TIMER1 29 -#define IRQ_PXA910_AP2_TIMER2 30 -#define IRQ_PXA910_CP2_TIMER1 31 -#define IRQ_PXA910_CP2_TIMER2 32 -#define IRQ_PXA910_CP2_TIMER3 33 -#define IRQ_PXA910_GSSP 34 -#define IRQ_PXA910_CP2_WDT 35 -#define IRQ_PXA910_MAIN_PMU 36 -#define IRQ_PXA910_CP_FREQ_CHG 37 -#define IRQ_PXA910_AP_FREQ_CHG 38 -#define IRQ_PXA910_MMC 39 -#define IRQ_PXA910_AEU 40 -#define IRQ_PXA910_LCD 41 -#define IRQ_PXA910_CCIC 42 -#define IRQ_PXA910_IRE 43 -#define IRQ_PXA910_USB1 44 -#define IRQ_PXA910_NAND 45 -#define IRQ_PXA910_HIFI_DMA 46 -#define IRQ_PXA910_DMA_INT0 47 -#define IRQ_PXA910_DMA_INT1 48 -#define IRQ_PXA910_AP_GPIO 49 -#define IRQ_PXA910_AP2_TIMER3 50 -#define IRQ_PXA910_USB2 51 -#define IRQ_PXA910_TWSI1 54 -#define IRQ_PXA910_CP_GPIO 55 -#define IRQ_PXA910_UART1 59 /* Slow UART */ -#define IRQ_PXA910_AP_PMU 60 -#define IRQ_PXA910_SM_INT 63 /* from PinMux */ - -/* - * Interrupt numbers for MMP2 - */ -#define IRQ_MMP2_NONE (-1) -#define IRQ_MMP2_SSP1 0 -#define IRQ_MMP2_SSP2 1 -#define IRQ_MMP2_SSPA1 2 -#define IRQ_MMP2_SSPA2 3 -#define IRQ_MMP2_PMIC_MUX 4 /* PMIC & Charger */ -#define IRQ_MMP2_RTC_MUX 5 -#define IRQ_MMP2_TWSI1 7 -#define IRQ_MMP2_GPU 8 -#define IRQ_MMP2_KEYPAD_MUX 9 -#define IRQ_MMP2_ROTARY 10 -#define IRQ_MMP2_TRACKBALL 11 -#define IRQ_MMP2_ONEWIRE 12 -#define IRQ_MMP2_TIMER1 13 -#define IRQ_MMP2_TIMER2 14 -#define IRQ_MMP2_TIMER3 15 -#define IRQ_MMP2_RIPC 16 -#define IRQ_MMP2_TWSI_MUX 17 /* TWSI2 ~ TWSI6 */ -#define IRQ_MMP2_HDMI 19 -#define IRQ_MMP2_SSP3 20 -#define IRQ_MMP2_SSP4 21 -#define IRQ_MMP2_USB_HS1 22 -#define IRQ_MMP2_USB_HS2 23 -#define IRQ_MMP2_UART3 24 -#define IRQ_MMP2_UART1 27 -#define IRQ_MMP2_UART2 28 -#define IRQ_MMP2_MIPI_DSI 29 -#define IRQ_MMP2_CI2 30 -#define IRQ_MMP2_PMU_TIMER1 31 -#define IRQ_MMP2_PMU_TIMER2 32 -#define IRQ_MMP2_PMU_TIMER3 33 -#define IRQ_MMP2_USB_FS 34 -#define IRQ_MMP2_MISC_MUX 35 -#define IRQ_MMP2_WDT1 36 -#define IRQ_MMP2_NAND_DMA 37 -#define IRQ_MMP2_USIM 38 -#define IRQ_MMP2_MMC 39 -#define IRQ_MMP2_WTM 40 -#define IRQ_MMP2_LCD 41 -#define IRQ_MMP2_CI 42 -#define IRQ_MMP2_IRE 43 -#define IRQ_MMP2_USB_OTG 44 -#define IRQ_MMP2_NAND 45 -#define IRQ_MMP2_UART4 46 -#define IRQ_MMP2_DMA_FIQ 47 -#define IRQ_MMP2_DMA_RIQ 48 -#define IRQ_MMP2_GPIO 49 -#define IRQ_MMP2_MIPI_HSI1_MUX 51 -#define IRQ_MMP2_MMC2 52 -#define IRQ_MMP2_MMC3 53 -#define IRQ_MMP2_MMC4 54 -#define IRQ_MMP2_MIPI_HSI0_MUX 55 -#define IRQ_MMP2_MSP 58 -#define IRQ_MMP2_MIPI_SLIM_DMA 59 -#define IRQ_MMP2_PJ4_FREQ_CHG 60 -#define IRQ_MMP2_MIPI_SLIM 62 -#define IRQ_MMP2_SM 63 - -#define IRQ_MMP2_MUX_BASE 64 - -/* secondary interrupt of INT #4 */ -#define IRQ_MMP2_PMIC_BASE (IRQ_MMP2_MUX_BASE) -#define IRQ_MMP2_CHARGER (IRQ_MMP2_PMIC_BASE + 0) -#define IRQ_MMP2_PMIC (IRQ_MMP2_PMIC_BASE + 1) - -/* secondary interrupt of INT #5 */ -#define IRQ_MMP2_RTC_BASE (IRQ_MMP2_PMIC_BASE + 2) -#define IRQ_MMP2_RTC_ALARM (IRQ_MMP2_RTC_BASE + 0) -#define IRQ_MMP2_RTC (IRQ_MMP2_RTC_BASE + 1) - -/* secondary interrupt of INT #9 */ -#define IRQ_MMP2_KEYPAD_BASE (IRQ_MMP2_RTC_BASE + 2) -#define IRQ_MMP2_KPC (IRQ_MMP2_KEYPAD_BASE + 0) -#define IRQ_MMP2_ROTORY (IRQ_MMP2_KEYPAD_BASE + 1) -#define IRQ_MMP2_TBALL (IRQ_MMP2_KEYPAD_BASE + 2) - -/* secondary interrupt of INT #17 */ -#define IRQ_MMP2_TWSI_BASE (IRQ_MMP2_KEYPAD_BASE + 3) -#define IRQ_MMP2_TWSI2 (IRQ_MMP2_TWSI_BASE + 0) -#define IRQ_MMP2_TWSI3 (IRQ_MMP2_TWSI_BASE + 1) -#define IRQ_MMP2_TWSI4 (IRQ_MMP2_TWSI_BASE + 2) -#define IRQ_MMP2_TWSI5 (IRQ_MMP2_TWSI_BASE + 3) -#define IRQ_MMP2_TWSI6 (IRQ_MMP2_TWSI_BASE + 4) - -/* secondary interrupt of INT #35 */ -#define IRQ_MMP2_MISC_BASE (IRQ_MMP2_TWSI_BASE + 5) -#define IRQ_MMP2_PERF (IRQ_MMP2_MISC_BASE + 0) -#define IRQ_MMP2_L2_PA_ECC (IRQ_MMP2_MISC_BASE + 1) -#define IRQ_MMP2_L2_ECC (IRQ_MMP2_MISC_BASE + 2) -#define IRQ_MMP2_L2_UECC (IRQ_MMP2_MISC_BASE + 3) -#define IRQ_MMP2_DDR (IRQ_MMP2_MISC_BASE + 4) -#define IRQ_MMP2_FAB0_TIMEOUT (IRQ_MMP2_MISC_BASE + 5) -#define IRQ_MMP2_FAB1_TIMEOUT (IRQ_MMP2_MISC_BASE + 6) -#define IRQ_MMP2_FAB2_TIMEOUT (IRQ_MMP2_MISC_BASE + 7) -#define IRQ_MMP2_THERMAL (IRQ_MMP2_MISC_BASE + 9) -#define IRQ_MMP2_MAIN_PMU (IRQ_MMP2_MISC_BASE + 10) -#define IRQ_MMP2_WDT2 (IRQ_MMP2_MISC_BASE + 11) -#define IRQ_MMP2_CORESIGHT (IRQ_MMP2_MISC_BASE + 12) -#define IRQ_MMP2_COMMTX (IRQ_MMP2_MISC_BASE + 13) -#define IRQ_MMP2_COMMRX (IRQ_MMP2_MISC_BASE + 14) - -/* secondary interrupt of INT #51 */ -#define IRQ_MMP2_MIPI_HSI1_BASE (IRQ_MMP2_MISC_BASE + 15) -#define IRQ_MMP2_HSI1_CAWAKE (IRQ_MMP2_MIPI_HSI1_BASE + 0) -#define IRQ_MMP2_MIPI_HSI_INT1 (IRQ_MMP2_MIPI_HSI1_BASE + 1) - -/* secondary interrupt of INT #55 */ -#define IRQ_MMP2_MIPI_HSI0_BASE (IRQ_MMP2_MIPI_HSI1_BASE + 2) -#define IRQ_MMP2_HSI0_CAWAKE (IRQ_MMP2_MIPI_HSI0_BASE + 0) -#define IRQ_MMP2_MIPI_HSI_INT0 (IRQ_MMP2_MIPI_HSI0_BASE + 1) - -#define IRQ_MMP2_MUX_END (IRQ_MMP2_MIPI_HSI0_BASE + 2) - -#define IRQ_GPIO_START 128 -#define MMP_NR_BUILTIN_GPIO 192 -#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio)) - -#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO) -#define MMP_NR_IRQS IRQ_BOARD_START - -#endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c deleted file mode 100644 index 2578e176fd48..000000000000 --- a/arch/arm/mach-mmp/jasper.c +++ /dev/null @@ -1,185 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/jasper.c - * - * Support for the Marvell Jasper Development Platform. - * - * Copyright (C) 2009-2010 Marvell International Ltd. - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/gpio-pxa.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/max8649.h> -#include <linux/mfd/max8925.h> -#include <linux/interrupt.h> - -#include "irqs.h" -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "addr-map.h" -#include "mfp-mmp2.h" -#include "mmp2.h" - -#include "common.h" - -#define JASPER_NR_IRQS (MMP_NR_IRQS + 48) - -static unsigned long jasper_pin_config[] __initdata = { - /* UART1 */ - GPIO29_UART1_RXD, - GPIO30_UART1_TXD, - - /* UART3 */ - GPIO51_UART3_RXD, - GPIO52_UART3_TXD, - - /* DFI */ - GPIO168_DFI_D0, - GPIO167_DFI_D1, - GPIO166_DFI_D2, - GPIO165_DFI_D3, - GPIO107_DFI_D4, - GPIO106_DFI_D5, - GPIO105_DFI_D6, - GPIO104_DFI_D7, - GPIO111_DFI_D8, - GPIO164_DFI_D9, - GPIO163_DFI_D10, - GPIO162_DFI_D11, - GPIO161_DFI_D12, - GPIO110_DFI_D13, - GPIO109_DFI_D14, - GPIO108_DFI_D15, - GPIO143_ND_nCS0, - GPIO144_ND_nCS1, - GPIO147_ND_nWE, - GPIO148_ND_nRE, - GPIO150_ND_ALE, - GPIO149_ND_CLE, - GPIO112_ND_RDY0, - GPIO160_ND_RDY1, - - /* PMIC */ - PMIC_PMIC_INT | MFP_LPM_EDGE_FALL, - - /* MMC1 */ - GPIO131_MMC1_DAT3, - GPIO132_MMC1_DAT2, - GPIO133_MMC1_DAT1, - GPIO134_MMC1_DAT0, - GPIO136_MMC1_CMD, - GPIO139_MMC1_CLK, - GPIO140_MMC1_CD, - GPIO141_MMC1_WP, - - /* MMC2 */ - GPIO37_MMC2_DAT3, - GPIO38_MMC2_DAT2, - GPIO39_MMC2_DAT1, - GPIO40_MMC2_DAT0, - GPIO41_MMC2_CMD, - GPIO42_MMC2_CLK, - - /* MMC3 */ - GPIO165_MMC3_DAT7, - GPIO162_MMC3_DAT6, - GPIO166_MMC3_DAT5, - GPIO163_MMC3_DAT4, - GPIO167_MMC3_DAT3, - GPIO164_MMC3_DAT2, - GPIO168_MMC3_DAT1, - GPIO111_MMC3_DAT0, - GPIO112_MMC3_CMD, - GPIO151_MMC3_CLK, -}; - -static struct pxa_gpio_platform_data mmp2_gpio_pdata = { - .irq_base = MMP_GPIO_TO_IRQ(0), -}; - -static struct regulator_consumer_supply max8649_supply[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data max8649_init_data = { - .constraints = { - .name = "vcc_core range", - .min_uV = 1150000, - .max_uV = 1280000, - .always_on = 1, - .boot_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8649_supply[0], -}; - -static struct max8649_platform_data jasper_max8649_info = { - .mode = 2, /* VID1 = 1, VID0 = 0 */ - .extclk = 0, - .ramp_timing = MAX8649_RAMP_32MV, - .regulator = &max8649_init_data, -}; - -static struct max8925_backlight_pdata jasper_backlight_data = { - .dual_string = 0, -}; - -static struct max8925_power_pdata jasper_power_data = { - .batt_detect = 0, /* can't detect battery by ID pin */ - .topoff_threshold = MAX8925_TOPOFF_THR_10PER, - .fast_charge = MAX8925_FCHG_1000MA, -}; - -static struct max8925_platform_data jasper_max8925_info = { - .backlight = &jasper_backlight_data, - .power = &jasper_power_data, - .irq_base = MMP_NR_IRQS, -}; - -static struct i2c_board_info jasper_twsi1_info[] = { - [0] = { - .type = "max8649", - .addr = 0x60, - .platform_data = &jasper_max8649_info, - }, - [1] = { - .type = "max8925", - .addr = 0x3c, - .irq = IRQ_MMP2_PMIC, - .platform_data = &jasper_max8925_info, - }, -}; - -static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = { - .clk_delay_cycles = 0x1f, -}; - -static void __init jasper_init(void) -{ - mfp_config(ARRAY_AND_SIZE(jasper_pin_config)); - - /* on-chip devices */ - mmp2_add_uart(1); - mmp2_add_uart(3); - mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info)); - platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata, - sizeof(struct pxa_gpio_platform_data)); - platform_device_register(&mmp2_device_gpio); - mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ - - regulator_has_full_constraints(); -} - -MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") - .map_io = mmp_map_io, - .nr_irqs = JASPER_NR_IRQS, - .init_irq = mmp2_init_irq, - .init_time = mmp2_timer_init, - .init_machine = jasper_init, - .restart = mmp_restart, -MACHINE_END diff --git a/arch/arm/mach-mmp/mfp-mmp2.h b/arch/arm/mach-mmp/mfp-mmp2.h deleted file mode 100644 index 1620222981e3..000000000000 --- a/arch/arm/mach-mmp/mfp-mmp2.h +++ /dev/null @@ -1,396 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_MACH_MFP_MMP2_H -#define __ASM_MACH_MFP_MMP2_H - -#include "mfp.h" - -#define MFP_DRIVE_VERY_SLOW (0x0 << 13) -#define MFP_DRIVE_SLOW (0x2 << 13) -#define MFP_DRIVE_MEDIUM (0x4 << 13) -#define MFP_DRIVE_FAST (0x6 << 13) - -/* GPIO */ -#define GPIO0_GPIO MFP_CFG(GPIO0, AF0) -#define GPIO1_GPIO MFP_CFG(GPIO1, AF0) -#define GPIO2_GPIO MFP_CFG(GPIO2, AF0) -#define GPIO3_GPIO MFP_CFG(GPIO3, AF0) -#define GPIO4_GPIO MFP_CFG(GPIO4, AF0) -#define GPIO5_GPIO MFP_CFG(GPIO5, AF0) -#define GPIO6_GPIO MFP_CFG(GPIO6, AF0) -#define GPIO7_GPIO MFP_CFG(GPIO7, AF0) -#define GPIO8_GPIO MFP_CFG(GPIO8, AF0) -#define GPIO9_GPIO MFP_CFG(GPIO9, AF0) -#define GPIO10_GPIO MFP_CFG(GPIO10, AF0) -#define GPIO11_GPIO MFP_CFG(GPIO11, AF0) -#define GPIO12_GPIO MFP_CFG(GPIO12, AF0) -#define GPIO13_GPIO MFP_CFG(GPIO13, AF0) -#define GPIO14_GPIO MFP_CFG(GPIO14, AF0) -#define GPIO15_GPIO MFP_CFG(GPIO15, AF0) -#define GPIO16_GPIO MFP_CFG(GPIO16, AF0) -#define GPIO17_GPIO MFP_CFG(GPIO17, AF0) -#define GPIO18_GPIO MFP_CFG(GPIO18, AF0) -#define GPIO19_GPIO MFP_CFG(GPIO19, AF0) -#define GPIO20_GPIO MFP_CFG(GPIO20, AF0) -#define GPIO21_GPIO MFP_CFG(GPIO21, AF0) -#define GPIO22_GPIO MFP_CFG(GPIO22, AF0) -#define GPIO23_GPIO MFP_CFG(GPIO23, AF0) -#define GPIO24_GPIO MFP_CFG(GPIO24, AF0) -#define GPIO25_GPIO MFP_CFG(GPIO25, AF0) -#define GPIO26_GPIO MFP_CFG(GPIO26, AF0) -#define GPIO27_GPIO MFP_CFG(GPIO27, AF0) -#define GPIO28_GPIO MFP_CFG(GPIO28, AF0) -#define GPIO29_GPIO MFP_CFG(GPIO29, AF0) -#define GPIO30_GPIO MFP_CFG(GPIO30, AF0) -#define GPIO31_GPIO MFP_CFG(GPIO31, AF0) -#define GPIO32_GPIO MFP_CFG(GPIO32, AF0) -#define GPIO33_GPIO MFP_CFG(GPIO33, AF0) -#define GPIO34_GPIO MFP_CFG(GPIO34, AF0) -#define GPIO35_GPIO MFP_CFG(GPIO35, AF0) -#define GPIO36_GPIO MFP_CFG(GPIO36, AF0) -#define GPIO37_GPIO MFP_CFG(GPIO37, AF0) -#define GPIO38_GPIO MFP_CFG(GPIO38, AF0) -#define GPIO39_GPIO MFP_CFG(GPIO39, AF0) -#define GPIO40_GPIO MFP_CFG(GPIO40, AF0) -#define GPIO41_GPIO MFP_CFG(GPIO41, AF0) -#define GPIO42_GPIO MFP_CFG(GPIO42, AF0) -#define GPIO43_GPIO MFP_CFG(GPIO43, AF0) -#define GPIO44_GPIO MFP_CFG(GPIO44, AF0) -#define GPIO45_GPIO MFP_CFG(GPIO45, AF0) -#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) -#define GPIO47_GPIO MFP_CFG(GPIO47, AF0) -#define GPIO48_GPIO MFP_CFG(GPIO48, AF0) -#define GPIO49_GPIO MFP_CFG(GPIO49, AF0) -#define GPIO50_GPIO MFP_CFG(GPIO50, AF0) -#define GPIO51_GPIO MFP_CFG(GPIO51, AF0) -#define GPIO52_GPIO MFP_CFG(GPIO52, AF0) -#define GPIO53_GPIO MFP_CFG(GPIO53, AF0) -#define GPIO54_GPIO MFP_CFG(GPIO54, AF0) -#define GPIO55_GPIO MFP_CFG(GPIO55, AF0) -#define GPIO56_GPIO MFP_CFG(GPIO56, AF0) -#define GPIO57_GPIO MFP_CFG(GPIO57, AF0) -#define GPIO58_GPIO MFP_CFG(GPIO58, AF0) -#define GPIO59_GPIO MFP_CFG(GPIO59, AF0) -#define GPIO60_GPIO MFP_CFG(GPIO60, AF0) -#define GPIO61_GPIO MFP_CFG(GPIO61, AF0) -#define GPIO62_GPIO MFP_CFG(GPIO62, AF0) -#define GPIO63_GPIO MFP_CFG(GPIO63, AF0) -#define GPIO64_GPIO MFP_CFG(GPIO64, AF0) -#define GPIO65_GPIO MFP_CFG(GPIO65, AF0) -#define GPIO66_GPIO MFP_CFG(GPIO66, AF0) -#define GPIO67_GPIO MFP_CFG(GPIO67, AF0) -#define GPIO68_GPIO MFP_CFG(GPIO68, AF0) -#define GPIO69_GPIO MFP_CFG(GPIO69, AF0) -#define GPIO70_GPIO MFP_CFG(GPIO70, AF0) -#define GPIO71_GPIO MFP_CFG(GPIO71, AF0) -#define GPIO72_GPIO MFP_CFG(GPIO72, AF0) -#define GPIO73_GPIO MFP_CFG(GPIO73, AF0) -#define GPIO74_GPIO MFP_CFG(GPIO74, AF0) -#define GPIO75_GPIO MFP_CFG(GPIO75, AF0) -#define GPIO76_GPIO MFP_CFG(GPIO76, AF0) -#define GPIO77_GPIO MFP_CFG(GPIO77, AF0) -#define GPIO78_GPIO MFP_CFG(GPIO78, AF0) -#define GPIO79_GPIO MFP_CFG(GPIO79, AF0) -#define GPIO80_GPIO MFP_CFG(GPIO80, AF0) -#define GPIO81_GPIO MFP_CFG(GPIO81, AF0) -#define GPIO82_GPIO MFP_CFG(GPIO82, AF0) -#define GPIO83_GPIO MFP_CFG(GPIO83, AF0) -#define GPIO84_GPIO MFP_CFG(GPIO84, AF0) -#define GPIO85_GPIO MFP_CFG(GPIO85, AF0) -#define GPIO86_GPIO MFP_CFG(GPIO86, AF0) -#define GPIO87_GPIO MFP_CFG(GPIO87, AF0) -#define GPIO88_GPIO MFP_CFG(GPIO88, AF0) -#define GPIO89_GPIO MFP_CFG(GPIO89, AF0) -#define GPIO90_GPIO MFP_CFG(GPIO90, AF0) -#define GPIO91_GPIO MFP_CFG(GPIO91, AF0) -#define GPIO92_GPIO MFP_CFG(GPIO92, AF0) -#define GPIO93_GPIO MFP_CFG(GPIO93, AF0) -#define GPIO94_GPIO MFP_CFG(GPIO94, AF0) -#define GPIO95_GPIO MFP_CFG(GPIO95, AF0) -#define GPIO96_GPIO MFP_CFG(GPIO96, AF0) -#define GPIO97_GPIO MFP_CFG(GPIO97, AF0) -#define GPIO98_GPIO MFP_CFG(GPIO98, AF0) -#define GPIO99_GPIO MFP_CFG(GPIO99, AF0) -#define GPIO100_GPIO MFP_CFG(GPIO100, AF0) -#define GPIO101_GPIO MFP_CFG(GPIO101, AF0) -#define GPIO102_GPIO MFP_CFG(GPIO102, AF1) -#define GPIO103_GPIO MFP_CFG(GPIO103, AF1) -#define GPIO104_GPIO MFP_CFG(GPIO104, AF1) -#define GPIO105_GPIO MFP_CFG(GPIO105, AF1) -#define GPIO106_GPIO MFP_CFG(GPIO106, AF1) -#define GPIO107_GPIO MFP_CFG(GPIO107, AF1) -#define GPIO108_GPIO MFP_CFG(GPIO108, AF1) -#define GPIO109_GPIO MFP_CFG(GPIO109, AF1) -#define GPIO110_GPIO MFP_CFG(GPIO110, AF1) -#define GPIO111_GPIO MFP_CFG(GPIO111, AF1) -#define GPIO112_GPIO MFP_CFG(GPIO112, AF1) -#define GPIO113_GPIO MFP_CFG(GPIO113, AF1) -#define GPIO114_GPIO MFP_CFG(GPIO114, AF0) -#define GPIO115_GPIO MFP_CFG(GPIO115, AF0) -#define GPIO116_GPIO MFP_CFG(GPIO116, AF0) -#define GPIO117_GPIO MFP_CFG(GPIO117, AF0) -#define GPIO118_GPIO MFP_CFG(GPIO118, AF0) -#define GPIO119_GPIO MFP_CFG(GPIO119, AF0) -#define GPIO120_GPIO MFP_CFG(GPIO120, AF0) -#define GPIO121_GPIO MFP_CFG(GPIO121, AF0) -#define GPIO122_GPIO MFP_CFG(GPIO122, AF0) -#define GPIO123_GPIO MFP_CFG(GPIO123, AF0) -#define GPIO124_GPIO MFP_CFG(GPIO124, AF0) -#define GPIO125_GPIO MFP_CFG(GPIO125, AF0) -#define GPIO126_GPIO MFP_CFG(GPIO126, AF0) -#define GPIO127_GPIO MFP_CFG(GPIO127, AF0) -#define GPIO128_GPIO MFP_CFG(GPIO128, AF0) -#define GPIO129_GPIO MFP_CFG(GPIO129, AF0) -#define GPIO130_GPIO MFP_CFG(GPIO130, AF0) -#define GPIO131_GPIO MFP_CFG(GPIO131, AF0) -#define GPIO132_GPIO MFP_CFG(GPIO132, AF0) -#define GPIO133_GPIO MFP_CFG(GPIO133, AF0) -#define GPIO134_GPIO MFP_CFG(GPIO134, AF0) -#define GPIO135_GPIO MFP_CFG(GPIO135, AF0) -#define GPIO136_GPIO MFP_CFG(GPIO136, AF0) -#define GPIO137_GPIO MFP_CFG(GPIO137, AF0) -#define GPIO138_GPIO MFP_CFG(GPIO138, AF0) -#define GPIO139_GPIO MFP_CFG(GPIO139, AF0) -#define GPIO140_GPIO MFP_CFG(GPIO140, AF0) -#define GPIO141_GPIO MFP_CFG(GPIO141, AF0) -#define GPIO142_GPIO MFP_CFG(GPIO142, AF1) -#define GPIO143_GPIO MFP_CFG(GPIO143, AF1) -#define GPIO144_GPIO MFP_CFG(GPIO144, AF1) -#define GPIO145_GPIO MFP_CFG(GPIO145, AF1) -#define GPIO146_GPIO MFP_CFG(GPIO146, AF1) -#define GPIO147_GPIO MFP_CFG(GPIO147, AF1) -#define GPIO148_GPIO MFP_CFG(GPIO148, AF1) -#define GPIO149_GPIO MFP_CFG(GPIO149, AF1) -#define GPIO150_GPIO MFP_CFG(GPIO150, AF1) -#define GPIO151_GPIO MFP_CFG(GPIO151, AF1) -#define GPIO152_GPIO MFP_CFG(GPIO152, AF1) -#define GPIO153_GPIO MFP_CFG(GPIO153, AF1) -#define GPIO154_GPIO MFP_CFG(GPIO154, AF1) -#define GPIO155_GPIO MFP_CFG(GPIO155, AF1) -#define GPIO156_GPIO MFP_CFG(GPIO156, AF1) -#define GPIO157_GPIO MFP_CFG(GPIO157, AF1) -#define GPIO158_GPIO MFP_CFG(GPIO158, AF1) -#define GPIO159_GPIO MFP_CFG(GPIO159, AF1) -#define GPIO160_GPIO MFP_CFG(GPIO160, AF1) -#define GPIO161_GPIO MFP_CFG(GPIO161, AF1) -#define GPIO162_GPIO MFP_CFG(GPIO162, AF1) -#define GPIO163_GPIO MFP_CFG(GPIO163, AF1) -#define GPIO164_GPIO MFP_CFG(GPIO164, AF1) -#define GPIO165_GPIO MFP_CFG(GPIO165, AF1) -#define GPIO166_GPIO MFP_CFG(GPIO166, AF1) -#define GPIO167_GPIO MFP_CFG(GPIO167, AF1) -#define GPIO168_GPIO MFP_CFG(GPIO168, AF1) - -/* DFI */ -#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0) -#define GPIO109_DFI_D14 MFP_CFG(GPIO109, AF0) -#define GPIO110_DFI_D13 MFP_CFG(GPIO110, AF0) -#define GPIO161_DFI_D12 MFP_CFG(GPIO161, AF0) -#define GPIO162_DFI_D11 MFP_CFG(GPIO162, AF0) -#define GPIO163_DFI_D10 MFP_CFG(GPIO163, AF0) -#define GPIO164_DFI_D9 MFP_CFG(GPIO164, AF0) -#define GPIO111_DFI_D8 MFP_CFG(GPIO111, AF0) -#define GPIO104_DFI_D7 MFP_CFG(GPIO104, AF0) -#define GPIO105_DFI_D6 MFP_CFG(GPIO105, AF0) -#define GPIO106_DFI_D5 MFP_CFG(GPIO106, AF0) -#define GPIO107_DFI_D4 MFP_CFG(GPIO107, AF0) -#define GPIO165_DFI_D3 MFP_CFG(GPIO165, AF0) -#define GPIO166_DFI_D2 MFP_CFG(GPIO166, AF0) -#define GPIO167_DFI_D1 MFP_CFG(GPIO167, AF0) -#define GPIO168_DFI_D0 MFP_CFG(GPIO168, AF0) -#define GPIO143_ND_nCS0 MFP_CFG(GPIO143, AF0) -#define GPIO144_ND_nCS1 MFP_CFG(GPIO144, AF0) -#define GPIO147_ND_nWE MFP_CFG(GPIO147, AF0) -#define GPIO148_ND_nRE MFP_CFG(GPIO148, AF0) -#define GPIO150_ND_ALE MFP_CFG(GPIO150, AF0) -#define GPIO149_ND_CLE MFP_CFG(GPIO149, AF0) -#define GPIO112_ND_RDY0 MFP_CFG(GPIO112, AF0) -#define GPIO160_ND_RDY1 MFP_CFG(GPIO160, AF0) - -/* Static Memory Controller */ -#define GPIO145_SMC_nCS0 MFP_CFG(GPIO145, AF0) -#define GPIO146_SMC_nCS1 MFP_CFG(GPIO146, AF0) -#define GPIO152_SMC_BE0 MFP_CFG(GPIO152, AF0) -#define GPIO153_SMC_BE1 MFP_CFG(GPIO153, AF0) -#define GPIO154_SMC_IRQ MFP_CFG(GPIO154, AF0) -#define GPIO113_SMC_RDY MFP_CFG(GPIO113, AF0) -#define GPIO151_SMC_SCLK MFP_CFG(GPIO151, AF0) - -/* Ethernet */ -#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2) - -/* UART1 */ -#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1) -#define GPIO46_UART1_TXD MFP_CFG(GPIO46, AF1) -#define GPIO29_UART1_RXD MFP_CFG(GPIO29, AF1) -#define GPIO30_UART1_TXD MFP_CFG(GPIO30, AF1) -#define GPIO31_UART1_CTS MFP_CFG(GPIO31, AF1) -#define GPIO32_UART1_RTS MFP_CFG(GPIO32, AF1) - -/* UART2 */ -#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF1) -#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF1) -#define GPIO49_UART2_CTS MFP_CFG(GPIO49, AF1) -#define GPIO50_UART2_RTS MFP_CFG(GPIO50, AF1) - -/* UART3 */ -#define GPIO51_UART3_RXD MFP_CFG(GPIO51, AF1) -#define GPIO52_UART3_TXD MFP_CFG(GPIO52, AF1) -#define GPIO53_UART3_CTS MFP_CFG(GPIO53, AF1) -#define GPIO54_UART3_RTS MFP_CFG(GPIO54, AF1) - -/* MMC1 */ -#define GPIO124_MMC1_DAT7 MFP_CFG_DRV(GPIO124, AF1, FAST) -#define GPIO125_MMC1_DAT6 MFP_CFG_DRV(GPIO125, AF1, FAST) -#define GPIO129_MMC1_DAT5 MFP_CFG_DRV(GPIO129, AF1, FAST) -#define GPIO130_MMC1_DAT4 MFP_CFG_DRV(GPIO130, AF1, FAST) -#define GPIO131_MMC1_DAT3 MFP_CFG_DRV(GPIO131, AF1, FAST) -#define GPIO132_MMC1_DAT2 MFP_CFG_DRV(GPIO132, AF1, FAST) -#define GPIO133_MMC1_DAT1 MFP_CFG_DRV(GPIO133, AF1, FAST) -#define GPIO134_MMC1_DAT0 MFP_CFG_DRV(GPIO134, AF1, FAST) -#define GPIO136_MMC1_CMD MFP_CFG_DRV(GPIO136, AF1, FAST) -#define GPIO139_MMC1_CLK MFP_CFG_DRV(GPIO139, AF1, FAST) -#define GPIO140_MMC1_CD MFP_CFG_DRV(GPIO140, AF1, FAST) -#define GPIO141_MMC1_WP MFP_CFG_DRV(GPIO141, AF1, FAST) - -/*MMC2*/ -#define GPIO37_MMC2_DAT3 MFP_CFG_DRV(GPIO37, AF1, FAST) -#define GPIO38_MMC2_DAT2 MFP_CFG_DRV(GPIO38, AF1, FAST) -#define GPIO39_MMC2_DAT1 MFP_CFG_DRV(GPIO39, AF1, FAST) -#define GPIO40_MMC2_DAT0 MFP_CFG_DRV(GPIO40, AF1, FAST) -#define GPIO41_MMC2_CMD MFP_CFG_DRV(GPIO41, AF1, FAST) -#define GPIO42_MMC2_CLK MFP_CFG_DRV(GPIO42, AF1, FAST) - -/*MMC3*/ -#define GPIO165_MMC3_DAT7 MFP_CFG_DRV(GPIO165, AF2, FAST) -#define GPIO162_MMC3_DAT6 MFP_CFG_DRV(GPIO162, AF2, FAST) -#define GPIO166_MMC3_DAT5 MFP_CFG_DRV(GPIO166, AF2, FAST) -#define GPIO163_MMC3_DAT4 MFP_CFG_DRV(GPIO163, AF2, FAST) -#define GPIO167_MMC3_DAT3 MFP_CFG_DRV(GPIO167, AF2, FAST) -#define GPIO164_MMC3_DAT2 MFP_CFG_DRV(GPIO164, AF2, FAST) -#define GPIO168_MMC3_DAT1 MFP_CFG_DRV(GPIO168, AF2, FAST) -#define GPIO111_MMC3_DAT0 MFP_CFG_DRV(GPIO111, AF2, FAST) -#define GPIO112_MMC3_CMD MFP_CFG_DRV(GPIO112, AF2, FAST) -#define GPIO151_MMC3_CLK MFP_CFG_DRV(GPIO151, AF2, FAST) - -/* LCD */ -#define GPIO74_LCD_FCLK MFP_CFG_DRV(GPIO74, AF1, FAST) -#define GPIO75_LCD_LCLK MFP_CFG_DRV(GPIO75, AF1, FAST) -#define GPIO76_LCD_PCLK MFP_CFG_DRV(GPIO76, AF1, FAST) -#define GPIO77_LCD_DENA MFP_CFG_DRV(GPIO77, AF1, FAST) -#define GPIO78_LCD_DD0 MFP_CFG_DRV(GPIO78, AF1, FAST) -#define GPIO79_LCD_DD1 MFP_CFG_DRV(GPIO79, AF1, FAST) -#define GPIO80_LCD_DD2 MFP_CFG_DRV(GPIO80, AF1, FAST) -#define GPIO81_LCD_DD3 MFP_CFG_DRV(GPIO81, AF1, FAST) -#define GPIO82_LCD_DD4 MFP_CFG_DRV(GPIO82, AF1, FAST) -#define GPIO83_LCD_DD5 MFP_CFG_DRV(GPIO83, AF1, FAST) -#define GPIO84_LCD_DD6 MFP_CFG_DRV(GPIO84, AF1, FAST) -#define GPIO85_LCD_DD7 MFP_CFG_DRV(GPIO85, AF1, FAST) -#define GPIO86_LCD_DD8 MFP_CFG_DRV(GPIO86, AF1, FAST) -#define GPIO87_LCD_DD9 MFP_CFG_DRV(GPIO87, AF1, FAST) -#define GPIO88_LCD_DD10 MFP_CFG_DRV(GPIO88, AF1, FAST) -#define GPIO89_LCD_DD11 MFP_CFG_DRV(GPIO89, AF1, FAST) -#define GPIO90_LCD_DD12 MFP_CFG_DRV(GPIO90, AF1, FAST) -#define GPIO91_LCD_DD13 MFP_CFG_DRV(GPIO91, AF1, FAST) -#define GPIO92_LCD_DD14 MFP_CFG_DRV(GPIO92, AF1, FAST) -#define GPIO93_LCD_DD15 MFP_CFG_DRV(GPIO93, AF1, FAST) -#define GPIO94_LCD_DD16 MFP_CFG_DRV(GPIO94, AF1, FAST) -#define GPIO95_LCD_DD17 MFP_CFG_DRV(GPIO95, AF1, FAST) -#define GPIO96_LCD_DD18 MFP_CFG_DRV(GPIO96, AF1, FAST) -#define GPIO97_LCD_DD19 MFP_CFG_DRV(GPIO97, AF1, FAST) -#define GPIO98_LCD_DD20 MFP_CFG_DRV(GPIO98, AF1, FAST) -#define GPIO99_LCD_DD21 MFP_CFG_DRV(GPIO99, AF1, FAST) -#define GPIO100_LCD_DD22 MFP_CFG_DRV(GPIO100, AF1, FAST) -#define GPIO101_LCD_DD23 MFP_CFG_DRV(GPIO101, AF1, FAST) -#define GPIO94_SPI_DCLK MFP_CFG_DRV(GPIO94, AF3, FAST) -#define GPIO95_SPI_CS0 MFP_CFG_DRV(GPIO95, AF3, FAST) -#define GPIO96_SPI_DIN MFP_CFG_DRV(GPIO96, AF3, FAST) -#define GPIO97_SPI_DOUT MFP_CFG_DRV(GPIO97, AF3, FAST) -#define GPIO98_LCD_RST MFP_CFG_DRV(GPIO98, AF0, FAST) - -#define GPIO114_MN_CLK_OUT MFP_CFG_DRV(GPIO114, AF1, FAST) - -/*LCD TV path*/ -#define GPIO124_LCD_DD24 MFP_CFG_DRV(GPIO124, AF2, FAST) -#define GPIO125_LCD_DD25 MFP_CFG_DRV(GPIO125, AF2, FAST) -#define GPIO126_LCD_DD33 MFP_CFG_DRV(GPIO126, AF2, FAST) -#define GPIO127_LCD_DD26 MFP_CFG_DRV(GPIO127, AF2, FAST) -#define GPIO128_LCD_DD27 MFP_CFG_DRV(GPIO128, AF2, FAST) -#define GPIO129_LCD_DD28 MFP_CFG_DRV(GPIO129, AF2, FAST) -#define GPIO130_LCD_DD29 MFP_CFG_DRV(GPIO130, AF2, FAST) -#define GPIO135_LCD_DD30 MFP_CFG_DRV(GPIO135, AF2, FAST) -#define GPIO137_LCD_DD31 MFP_CFG_DRV(GPIO137, AF2, FAST) -#define GPIO138_LCD_DD32 MFP_CFG_DRV(GPIO138, AF2, FAST) -#define GPIO140_LCD_DD34 MFP_CFG_DRV(GPIO140, AF2, FAST) -#define GPIO141_LCD_DD35 MFP_CFG_DRV(GPIO141, AF2, FAST) - -/* I2C */ -#define GPIO43_TWSI2_SCL MFP_CFG_DRV(GPIO43, AF1, SLOW) -#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW) -#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW) -#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW) -#define TWSI4_SCL MFP_CFG_DRV(TWSI4_SCL, AF0, SLOW) -#define TWSI4_SDA MFP_CFG_DRV(TWSI4_SDA, AF0, SLOW) -#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW) -#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW) -#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW) -#define GPIO98_TWSI6_SDA MFP_CFG_DRV(GPIO98, AF2, SLOW) - -/* SSPA1 */ -#define GPIO24_I2S_SYSCLK MFP_CFG(GPIO24, AF1) -#define GPIO25_I2S_BITCLK MFP_CFG(GPIO25, AF1) -#define GPIO26_I2S_SYNC MFP_CFG(GPIO26, AF1) -#define GPIO27_I2S_DATA_OUT MFP_CFG(GPIO27, AF1) -#define GPIO28_I2S_SDATA_IN MFP_CFG(GPIO28, AF1) -#define GPIO114_I2S_MCLK MFP_CFG(GPIO114, AF1) - -/* SSPA2 */ -#define GPIO33_SSPA2_CLK MFP_CFG(GPIO33, AF1) -#define GPIO34_SSPA2_FRM MFP_CFG(GPIO34, AF1) -#define GPIO35_SSPA2_TXD MFP_CFG(GPIO35, AF1) -#define GPIO36_SSPA2_RXD MFP_CFG(GPIO36, AF1) - -/* Keypad */ -#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1) -#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1) -#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1) -#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1) -#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1) -#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1) -#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1) -#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1) -#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1) -#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1) -#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1) -#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1) -#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1) -#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1) -#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1) -#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1) -#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1) -#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1) -#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1) -#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1) -#define GPIO20_KP_DKIN4 MFP_CFG(GPIO20, AF1) -#define GPIO21_KP_DKIN5 MFP_CFG(GPIO21, AF1) -#define GPIO22_KP_DKIN6 MFP_CFG(GPIO22, AF1) -#define GPIO23_KP_DKIN7 MFP_CFG(GPIO23, AF1) - -/* CAMERA */ -#define GPIO59_CCIC_IN7 MFP_CFG_DRV(GPIO59, AF1, FAST) -#define GPIO60_CCIC_IN6 MFP_CFG_DRV(GPIO60, AF1, FAST) -#define GPIO61_CCIC_IN5 MFP_CFG_DRV(GPIO61, AF1, FAST) -#define GPIO62_CCIC_IN4 MFP_CFG_DRV(GPIO62, AF1, FAST) -#define GPIO63_CCIC_IN3 MFP_CFG_DRV(GPIO63, AF1, FAST) -#define GPIO64_CCIC_IN2 MFP_CFG_DRV(GPIO64, AF1, FAST) -#define GPIO65_CCIC_IN1 MFP_CFG_DRV(GPIO65, AF1, FAST) -#define GPIO66_CCIC_IN0 MFP_CFG_DRV(GPIO66, AF1, FAST) -#define GPIO67_CAM_HSYNC MFP_CFG_DRV(GPIO67, AF1, FAST) -#define GPIO68_CAM_VSYNC MFP_CFG_DRV(GPIO68, AF1, FAST) -#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST) -#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST) - -/* PMIC */ -#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0) - -#endif /* __ASM_MACH_MFP_MMP2_H */ - diff --git a/arch/arm/mach-mmp/mfp-pxa168.h b/arch/arm/mach-mmp/mfp-pxa168.h deleted file mode 100644 index 90d16d3419a4..000000000000 --- a/arch/arm/mach-mmp/mfp-pxa168.h +++ /dev/null @@ -1,355 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_MACH_MFP_PXA168_H -#define __ASM_MACH_MFP_PXA168_H - -#include "mfp.h" - -#define MFP_DRIVE_VERY_SLOW (0x0 << 13) -#define MFP_DRIVE_SLOW (0x1 << 13) -#define MFP_DRIVE_MEDIUM (0x2 << 13) -#define MFP_DRIVE_FAST (0x3 << 13) - -#undef MFP_CFG -#undef MFP_CFG_DRV - -#define MFP_CFG(pin, af) \ - (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) - -#define MFP_CFG_DRV(pin, af, drv) \ - (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) - -/* GPIO */ -#define GPIO0_GPIO MFP_CFG(GPIO0, AF5) -#define GPIO1_GPIO MFP_CFG(GPIO1, AF5) -#define GPIO2_GPIO MFP_CFG(GPIO2, AF5) -#define GPIO3_GPIO MFP_CFG(GPIO3, AF5) -#define GPIO4_GPIO MFP_CFG(GPIO4, AF5) -#define GPIO5_GPIO MFP_CFG(GPIO5, AF5) -#define GPIO6_GPIO MFP_CFG(GPIO6, AF5) -#define GPIO7_GPIO MFP_CFG(GPIO7, AF5) -#define GPIO8_GPIO MFP_CFG(GPIO8, AF5) -#define GPIO9_GPIO MFP_CFG(GPIO9, AF5) -#define GPIO10_GPIO MFP_CFG(GPIO10, AF5) -#define GPIO11_GPIO MFP_CFG(GPIO11, AF5) -#define GPIO12_GPIO MFP_CFG(GPIO12, AF5) -#define GPIO13_GPIO MFP_CFG(GPIO13, AF5) -#define GPIO14_GPIO MFP_CFG(GPIO14, AF5) -#define GPIO15_GPIO MFP_CFG(GPIO15, AF5) -#define GPIO16_GPIO MFP_CFG(GPIO16, AF0) -#define GPIO17_GPIO MFP_CFG(GPIO17, AF5) -#define GPIO18_GPIO MFP_CFG(GPIO18, AF0) -#define GPIO19_GPIO MFP_CFG(GPIO19, AF5) -#define GPIO20_GPIO MFP_CFG(GPIO20, AF0) -#define GPIO21_GPIO MFP_CFG(GPIO21, AF5) -#define GPIO22_GPIO MFP_CFG(GPIO22, AF5) -#define GPIO23_GPIO MFP_CFG(GPIO23, AF5) -#define GPIO24_GPIO MFP_CFG(GPIO24, AF5) -#define GPIO25_GPIO MFP_CFG(GPIO25, AF5) -#define GPIO26_GPIO MFP_CFG(GPIO26, AF0) -#define GPIO27_GPIO MFP_CFG(GPIO27, AF5) -#define GPIO28_GPIO MFP_CFG(GPIO28, AF5) -#define GPIO29_GPIO MFP_CFG(GPIO29, AF5) -#define GPIO30_GPIO MFP_CFG(GPIO30, AF5) -#define GPIO31_GPIO MFP_CFG(GPIO31, AF5) -#define GPIO32_GPIO MFP_CFG(GPIO32, AF5) -#define GPIO33_GPIO MFP_CFG(GPIO33, AF5) -#define GPIO34_GPIO MFP_CFG(GPIO34, AF0) -#define GPIO35_GPIO MFP_CFG(GPIO35, AF0) -#define GPIO36_GPIO MFP_CFG(GPIO36, AF0) -#define GPIO37_GPIO MFP_CFG(GPIO37, AF0) -#define GPIO38_GPIO MFP_CFG(GPIO38, AF0) -#define GPIO39_GPIO MFP_CFG(GPIO39, AF0) -#define GPIO40_GPIO MFP_CFG(GPIO40, AF0) -#define GPIO41_GPIO MFP_CFG(GPIO41, AF0) -#define GPIO42_GPIO MFP_CFG(GPIO42, AF0) -#define GPIO43_GPIO MFP_CFG(GPIO43, AF0) -#define GPIO44_GPIO MFP_CFG(GPIO44, AF0) -#define GPIO45_GPIO MFP_CFG(GPIO45, AF0) -#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) -#define GPIO47_GPIO MFP_CFG(GPIO47, AF0) -#define GPIO48_GPIO MFP_CFG(GPIO48, AF0) -#define GPIO49_GPIO MFP_CFG(GPIO49, AF0) -#define GPIO50_GPIO MFP_CFG(GPIO50, AF0) -#define GPIO51_GPIO MFP_CFG(GPIO51, AF0) -#define GPIO52_GPIO MFP_CFG(GPIO52, AF0) -#define GPIO53_GPIO MFP_CFG(GPIO53, AF0) -#define GPIO54_GPIO MFP_CFG(GPIO54, AF0) -#define GPIO55_GPIO MFP_CFG(GPIO55, AF0) -#define GPIO56_GPIO MFP_CFG(GPIO56, AF0) -#define GPIO57_GPIO MFP_CFG(GPIO57, AF0) -#define GPIO58_GPIO MFP_CFG(GPIO58, AF0) -#define GPIO59_GPIO MFP_CFG(GPIO59, AF0) -#define GPIO60_GPIO MFP_CFG(GPIO60, AF0) -#define GPIO61_GPIO MFP_CFG(GPIO61, AF0) -#define GPIO62_GPIO MFP_CFG(GPIO62, AF0) -#define GPIO63_GPIO MFP_CFG(GPIO63, AF0) -#define GPIO64_GPIO MFP_CFG(GPIO64, AF0) -#define GPIO65_GPIO MFP_CFG(GPIO65, AF0) -#define GPIO66_GPIO MFP_CFG(GPIO66, AF0) -#define GPIO67_GPIO MFP_CFG(GPIO67, AF0) -#define GPIO68_GPIO MFP_CFG(GPIO68, AF0) -#define GPIO69_GPIO MFP_CFG(GPIO69, AF0) -#define GPIO70_GPIO MFP_CFG(GPIO70, AF0) -#define GPIO71_GPIO MFP_CFG(GPIO71, AF0) -#define GPIO72_GPIO MFP_CFG(GPIO72, AF0) -#define GPIO73_GPIO MFP_CFG(GPIO73, AF0) -#define GPIO74_GPIO MFP_CFG(GPIO74, AF0) -#define GPIO75_GPIO MFP_CFG(GPIO75, AF0) -#define GPIO76_GPIO MFP_CFG(GPIO76, AF0) -#define GPIO77_GPIO MFP_CFG(GPIO77, AF0) -#define GPIO78_GPIO MFP_CFG(GPIO78, AF0) -#define GPIO79_GPIO MFP_CFG(GPIO79, AF0) -#define GPIO80_GPIO MFP_CFG(GPIO80, AF0) -#define GPIO81_GPIO MFP_CFG(GPIO81, AF0) -#define GPIO82_GPIO MFP_CFG(GPIO82, AF0) -#define GPIO83_GPIO MFP_CFG(GPIO83, AF0) -#define GPIO84_GPIO MFP_CFG(GPIO84, AF0) -#define GPIO85_GPIO MFP_CFG(GPIO85, AF0) -#define GPIO86_GPIO MFP_CFG(GPIO86, AF0) -#define GPIO87_GPIO MFP_CFG(GPIO87, AF0) -#define GPIO88_GPIO MFP_CFG(GPIO88, AF0) -#define GPIO89_GPIO MFP_CFG(GPIO89, AF0) -#define GPIO90_GPIO MFP_CFG(GPIO90, AF0) -#define GPIO91_GPIO MFP_CFG(GPIO91, AF0) -#define GPIO92_GPIO MFP_CFG(GPIO92, AF0) -#define GPIO93_GPIO MFP_CFG(GPIO93, AF0) -#define GPIO94_GPIO MFP_CFG(GPIO94, AF0) -#define GPIO95_GPIO MFP_CFG(GPIO95, AF0) -#define GPIO96_GPIO MFP_CFG(GPIO96, AF0) -#define GPIO97_GPIO MFP_CFG(GPIO97, AF0) -#define GPIO98_GPIO MFP_CFG(GPIO98, AF0) -#define GPIO99_GPIO MFP_CFG(GPIO99, AF0) -#define GPIO100_GPIO MFP_CFG(GPIO100, AF0) -#define GPIO101_GPIO MFP_CFG(GPIO101, AF0) -#define GPIO102_GPIO MFP_CFG(GPIO102, AF0) -#define GPIO103_GPIO MFP_CFG(GPIO103, AF0) -#define GPIO104_GPIO MFP_CFG(GPIO104, AF0) -#define GPIO105_GPIO MFP_CFG(GPIO105, AF0) -#define GPIO106_GPIO MFP_CFG(GPIO106, AF0) -#define GPIO107_GPIO MFP_CFG(GPIO107, AF0) -#define GPIO108_GPIO MFP_CFG(GPIO108, AF0) -#define GPIO109_GPIO MFP_CFG(GPIO109, AF0) -#define GPIO110_GPIO MFP_CFG(GPIO110, AF0) -#define GPIO111_GPIO MFP_CFG(GPIO111, AF0) -#define GPIO112_GPIO MFP_CFG(GPIO112, AF0) -#define GPIO113_GPIO MFP_CFG(GPIO113, AF0) -#define GPIO114_GPIO MFP_CFG(GPIO114, AF0) -#define GPIO115_GPIO MFP_CFG(GPIO115, AF0) -#define GPIO116_GPIO MFP_CFG(GPIO116, AF0) -#define GPIO117_GPIO MFP_CFG(GPIO117, AF0) -#define GPIO118_GPIO MFP_CFG(GPIO118, AF0) -#define GPIO119_GPIO MFP_CFG(GPIO119, AF0) -#define GPIO120_GPIO MFP_CFG(GPIO120, AF0) -#define GPIO121_GPIO MFP_CFG(GPIO121, AF0) -#define GPIO122_GPIO MFP_CFG(GPIO122, AF0) - -/* DFI */ -#define GPIO0_DFI_D15 MFP_CFG(GPIO0, AF0) -#define GPIO1_DFI_D14 MFP_CFG(GPIO1, AF0) -#define GPIO2_DFI_D13 MFP_CFG(GPIO2, AF0) -#define GPIO3_DFI_D12 MFP_CFG(GPIO3, AF0) -#define GPIO4_DFI_D11 MFP_CFG(GPIO4, AF0) -#define GPIO5_DFI_D10 MFP_CFG(GPIO5, AF0) -#define GPIO6_DFI_D9 MFP_CFG(GPIO6, AF0) -#define GPIO7_DFI_D8 MFP_CFG(GPIO7, AF0) -#define GPIO8_DFI_D7 MFP_CFG(GPIO8, AF0) -#define GPIO9_DFI_D6 MFP_CFG(GPIO9, AF0) -#define GPIO10_DFI_D5 MFP_CFG(GPIO10, AF0) -#define GPIO11_DFI_D4 MFP_CFG(GPIO11, AF0) -#define GPIO12_DFI_D3 MFP_CFG(GPIO12, AF0) -#define GPIO13_DFI_D2 MFP_CFG(GPIO13, AF0) -#define GPIO14_DFI_D1 MFP_CFG(GPIO14, AF0) -#define GPIO15_DFI_D0 MFP_CFG(GPIO15, AF0) - -#define GPIO30_DFI_ADDR0 MFP_CFG(GPIO30, AF0) -#define GPIO31_DFI_ADDR1 MFP_CFG(GPIO31, AF0) -#define GPIO32_DFI_ADDR2 MFP_CFG(GPIO32, AF0) -#define GPIO33_DFI_ADDR3 MFP_CFG(GPIO33, AF0) - -/* NAND */ -#define GPIO16_ND_nCS0 MFP_CFG(GPIO16, AF1) -#define GPIO17_ND_nWE MFP_CFG(GPIO17, AF0) -#define GPIO21_ND_ALE MFP_CFG(GPIO21, AF0) -#define GPIO22_ND_CLE MFP_CFG(GPIO22, AF0) -#define GPIO24_ND_nRE MFP_CFG(GPIO24, AF0) -#define GPIO26_ND_RnB1 MFP_CFG(GPIO26, AF1) -#define GPIO27_ND_RnB2 MFP_CFG(GPIO27, AF1) - -/* Static Memory Controller */ -#define GPIO18_SMC_nCS0 MFP_CFG(GPIO18, AF3) -#define GPIO18_SMC_nCS1 MFP_CFG(GPIO18, AF2) -#define GPIO16_SMC_nCS0 MFP_CFG(GPIO16, AF2) -#define GPIO16_SMC_nCS1 MFP_CFG(GPIO16, AF3) -#define GPIO19_SMC_nCS0 MFP_CFG(GPIO19, AF0) -#define GPIO20_SMC_nCS1 MFP_CFG(GPIO20, AF2) -#define GPIO23_SMC_nLUA MFP_CFG(GPIO23, AF0) -#define GPIO25_SMC_nLLA MFP_CFG(GPIO25, AF0) -#define GPIO27_SMC_IRQ MFP_CFG(GPIO27, AF0) -#define GPIO28_SMC_RDY MFP_CFG(GPIO28, AF0) -#define GPIO29_SMC_SCLK MFP_CFG(GPIO29, AF0) -#define GPIO34_SMC_nCS1 MFP_CFG(GPIO34, AF2) -#define GPIO35_SMC_BE1 MFP_CFG(GPIO35, AF2) -#define GPIO36_SMC_BE2 MFP_CFG(GPIO36, AF2) - -/* Compact Flash */ -#define GPIO19_CF_nCE1 MFP_CFG(GPIO19, AF3) -#define GPIO20_CF_nCE2 MFP_CFG(GPIO20, AF3) -#define GPIO23_CF_nALE MFP_CFG(GPIO23, AF3) -#define GPIO25_CF_nRESET MFP_CFG(GPIO25, AF3) -#define GPIO28_CF_RDY MFP_CFG(GPIO28, AF3) -#define GPIO29_CF_STSCH MFP_CFG(GPIO29, AF3) -#define GPIO30_CF_nREG MFP_CFG(GPIO30, AF3) -#define GPIO31_CF_nIOIS16 MFP_CFG(GPIO31, AF3) -#define GPIO32_CF_nCD1 MFP_CFG(GPIO32, AF3) -#define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3) - -/* UART */ -#define GPIO8_UART3_TXD MFP_CFG(GPIO8, AF2) -#define GPIO9_UART3_RXD MFP_CFG(GPIO9, AF2) -#define GPIO1O_UART3_CTS MFP_CFG(GPIO10, AF2) -#define GPIO11_UART3_RTS MFP_CFG(GPIO11, AF2) -#define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2) -#define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2) -#define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST) -#define GPIO107_UART1_RXD MFP_CFG_DRV(GPIO107, AF2, FAST) -#define GPIO108_UART1_RXD MFP_CFG_DRV(GPIO108, AF1, FAST) -#define GPIO108_UART1_TXD MFP_CFG_DRV(GPIO108, AF2, FAST) -#define GPIO109_UART1_CTS MFP_CFG(GPIO109, AF1) -#define GPIO109_UART1_RTS MFP_CFG(GPIO109, AF2) -#define GPIO110_UART1_RTS MFP_CFG(GPIO110, AF1) -#define GPIO110_UART1_CTS MFP_CFG(GPIO110, AF2) -#define GPIO111_UART1_RI MFP_CFG(GPIO111, AF1) -#define GPIO111_UART1_DSR MFP_CFG(GPIO111, AF2) -#define GPIO112_UART1_DTR MFP_CFG(GPIO111, AF1) -#define GPIO112_UART1_DCD MFP_CFG(GPIO112, AF2) - -/* MMC1 */ -#define GPIO37_MMC1_DAT7 MFP_CFG(GPIO37, AF1) -#define GPIO38_MMC1_DAT6 MFP_CFG(GPIO38, AF1) -#define GPIO54_MMC1_DAT5 MFP_CFG(GPIO54, AF1) -#define GPIO48_MMC1_DAT4 MFP_CFG(GPIO48, AF1) -#define GPIO51_MMC1_DAT3 MFP_CFG(GPIO51, AF1) -#define GPIO52_MMC1_DAT2 MFP_CFG(GPIO52, AF1) -#define GPIO40_MMC1_DAT1 MFP_CFG(GPIO40, AF1) -#define GPIO41_MMC1_DAT0 MFP_CFG(GPIO41, AF1) -#define GPIO49_MMC1_CMD MFP_CFG(GPIO49, AF1) -#define GPIO43_MMC1_CLK MFP_CFG(GPIO43, AF1) -#define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1) -#define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1) - -/* MMC2 */ -#define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST) -#define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST) -#define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST) -#define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST) -#define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST) -#define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST) - -/* MMC4 */ -#define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST) -#define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST) -#define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST) -#define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST) -#define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST) -#define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST) - -/* LCD */ -#define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1) -#define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1) -#define GPIO61_LCD_DD1 MFP_CFG(GPIO61, AF1) -#define GPIO70_LCD_DD10 MFP_CFG(GPIO70, AF1) -#define GPIO71_LCD_DD11 MFP_CFG(GPIO71, AF1) -#define GPIO72_LCD_DD12 MFP_CFG(GPIO72, AF1) -#define GPIO73_LCD_DD13 MFP_CFG(GPIO73, AF1) -#define GPIO74_LCD_DD14 MFP_CFG(GPIO74, AF1) -#define GPIO75_LCD_DD15 MFP_CFG(GPIO75, AF1) -#define GPIO76_LCD_DD16 MFP_CFG(GPIO76, AF1) -#define GPIO77_LCD_DD17 MFP_CFG(GPIO77, AF1) -#define GPIO78_LCD_DD18 MFP_CFG(GPIO78, AF1) -#define GPIO79_LCD_DD19 MFP_CFG(GPIO79, AF1) -#define GPIO62_LCD_DD2 MFP_CFG(GPIO62, AF1) -#define GPIO80_LCD_DD20 MFP_CFG(GPIO80, AF1) -#define GPIO81_LCD_DD21 MFP_CFG(GPIO81, AF1) -#define GPIO82_LCD_DD22 MFP_CFG(GPIO82, AF1) -#define GPIO83_LCD_DD23 MFP_CFG(GPIO83, AF1) -#define GPIO63_LCD_DD3 MFP_CFG(GPIO63, AF1) -#define GPIO64_LCD_DD4 MFP_CFG(GPIO64, AF1) -#define GPIO65_LCD_DD5 MFP_CFG(GPIO65, AF1) -#define GPIO66_LCD_DD6 MFP_CFG(GPIO66, AF1) -#define GPIO67_LCD_DD7 MFP_CFG(GPIO67, AF1) -#define GPIO68_LCD_DD8 MFP_CFG(GPIO68, AF1) -#define GPIO69_LCD_DD9 MFP_CFG(GPIO69, AF1) -#define GPIO59_LCD_DENA_BIAS MFP_CFG(GPIO59, AF1) -#define GPIO56_LCD_FCLK_RD MFP_CFG(GPIO56, AF1) -#define GPIO57_LCD_LCLK_A0 MFP_CFG(GPIO57, AF1) -#define GPIO58_LCD_PCLK_WR MFP_CFG(GPIO58, AF1) -#define GPIO85_LCD_VSYNC MFP_CFG(GPIO85, AF1) - -/* I2C */ -#define GPIO105_CI2C_SDA MFP_CFG(GPIO105, AF1) -#define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1) - -/* I2S */ -#define GPIO113_I2S_MCLK MFP_CFG(GPIO113, AF6) -#define GPIO114_I2S_FRM MFP_CFG(GPIO114, AF1) -#define GPIO115_I2S_BCLK MFP_CFG(GPIO115, AF1) -#define GPIO116_I2S_RXD MFP_CFG(GPIO116, AF2) -#define GPIO116_I2S_TXD MFP_CFG(GPIO116, AF1) -#define GPIO117_I2S_TXD MFP_CFG(GPIO117, AF2) - -/* PWM */ -#define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1) -#define GPIO97_PWM2_OUT MFP_CFG(GPIO97, AF1) -#define GPIO98_PWM1_OUT MFP_CFG(GPIO98, AF1) -#define GPIO104_PWM4_OUT MFP_CFG(GPIO104, AF1) -#define GPIO106_PWM2_OUT MFP_CFG(GPIO106, AF2) -#define GPIO74_PWM4_OUT MFP_CFG(GPIO74, AF2) -#define GPIO75_PWM3_OUT MFP_CFG(GPIO75, AF2) -#define GPIO76_PWM2_OUT MFP_CFG(GPIO76, AF2) -#define GPIO77_PWM1_OUT MFP_CFG(GPIO77, AF2) -#define GPIO82_PWM4_OUT MFP_CFG(GPIO82, AF2) -#define GPIO83_PWM3_OUT MFP_CFG(GPIO83, AF2) -#define GPIO84_PWM2_OUT MFP_CFG(GPIO84, AF2) -#define GPIO85_PWM1_OUT MFP_CFG(GPIO85, AF2) -#define GPIO84_PWM1_OUT MFP_CFG(GPIO84, AF4) -#define GPIO122_PWM3_OUT MFP_CFG(GPIO122, AF3) -#define GPIO123_PWM1_OUT MFP_CFG(GPIO123, AF1) -#define GPIO124_PWM2_OUT MFP_CFG(GPIO124, AF1) -#define GPIO125_PWM3_OUT MFP_CFG(GPIO125, AF1) -#define GPIO126_PWM4_OUT MFP_CFG(GPIO126, AF1) -#define GPIO86_PWM1_OUT MFP_CFG(GPIO86, AF2) -#define GPIO86_PWM2_OUT MFP_CFG(GPIO86, AF3) - -/* Keypad */ -#define GPIO109_KP_MKIN1 MFP_CFG(GPIO109, AF7) -#define GPIO110_KP_MKIN0 MFP_CFG(GPIO110, AF7) -#define GPIO111_KP_MKOUT7 MFP_CFG(GPIO111, AF7) -#define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7) -#define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7) - -/* Fast Ethernet */ -#define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5) -#define GPIO87_TX_EN MFP_CFG(GPIO87, AF5) -#define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5) -#define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5) -#define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5) -#define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5) -#define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5) -#define GPIO93_MII_COL MFP_CFG(GPIO93, AF5) -#define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5) -#define GPIO95_RX_ER MFP_CFG(GPIO95, AF5) -#define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5) -#define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5) -#define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5) -#define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5) -#define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5) -#define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) -#define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) - -/* SSP2 */ -#define GPIO107_SSP2_RXD MFP_CFG(GPIO107, AF4) -#define GPIO108_SSP2_TXD MFP_CFG(GPIO108, AF4) -#define GPIO111_SSP2_CLK MFP_CFG(GPIO111, AF4) -#define GPIO112_SSP2_FRM MFP_CFG(GPIO112, AF4) - -#endif /* __ASM_MACH_MFP_PXA168_H */ diff --git a/arch/arm/mach-mmp/mfp-pxa910.h b/arch/arm/mach-mmp/mfp-pxa910.h deleted file mode 100644 index 6f900cade631..000000000000 --- a/arch/arm/mach-mmp/mfp-pxa910.h +++ /dev/null @@ -1,170 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_MACH_MFP_PXA910_H -#define __ASM_MACH_MFP_PXA910_H - -#include "mfp.h" - -#define MFP_DRIVE_VERY_SLOW (0x0 << 13) -#define MFP_DRIVE_SLOW (0x2 << 13) -#define MFP_DRIVE_MEDIUM (0x4 << 13) -#define MFP_DRIVE_FAST (0x6 << 13) - -/* UART2 */ -#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6) -#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6) - -/* UART3 */ -#define GPIO31_UART3_RXD MFP_CFG(GPIO31, AF4) -#define GPIO32_UART3_TXD MFP_CFG(GPIO32, AF4) - -/*IRDA*/ -#define GPIO51_IRDA_SHDN MFP_CFG(GPIO51, AF0) - -/* SMC */ -#define SM_nCS0_nCS0 MFP_CFG(SM_nCS0, AF0) -#define SM_ADV_SM_ADV MFP_CFG(SM_ADV, AF0) -#define SM_SCLK_SM_SCLK MFP_CFG(SM_SCLK, AF0) -#define SM_BE0_SM_BE0 MFP_CFG(SM_BE0, AF1) -#define SM_BE1_SM_BE1 MFP_CFG(SM_BE1, AF1) - -/* I2C */ -#define GPIO53_CI2C_SCL MFP_CFG(GPIO53, AF2) -#define GPIO54_CI2C_SDA MFP_CFG(GPIO54, AF2) - -/* SSP1 (I2S) */ -#define GPIO24_SSP1_SDATA_IN MFP_CFG_DRV(GPIO24, AF1, MEDIUM) -#define GPIO21_SSP1_BITCLK MFP_CFG_DRV(GPIO21, AF1, MEDIUM) -#define GPIO20_SSP1_SYSCLK MFP_CFG_DRV(GPIO20, AF1, MEDIUM) -#define GPIO22_SSP1_SYNC MFP_CFG_DRV(GPIO22, AF1, MEDIUM) -#define GPIO23_SSP1_DATA_OUT MFP_CFG_DRV(GPIO23, AF1, MEDIUM) -#define GPIO124_MN_CLK_OUT MFP_CFG_DRV(GPIO124, AF1, MEDIUM) -#define GPIO123_CLK_REQ MFP_CFG_DRV(GPIO123, AF0, MEDIUM) - -/* DFI */ -#define DF_IO0_ND_IO0 MFP_CFG(DF_IO0, AF0) -#define DF_IO1_ND_IO1 MFP_CFG(DF_IO1, AF0) -#define DF_IO2_ND_IO2 MFP_CFG(DF_IO2, AF0) -#define DF_IO3_ND_IO3 MFP_CFG(DF_IO3, AF0) -#define DF_IO4_ND_IO4 MFP_CFG(DF_IO4, AF0) -#define DF_IO5_ND_IO5 MFP_CFG(DF_IO5, AF0) -#define DF_IO6_ND_IO6 MFP_CFG(DF_IO6, AF0) -#define DF_IO7_ND_IO7 MFP_CFG(DF_IO7, AF0) -#define DF_IO8_ND_IO8 MFP_CFG(DF_IO8, AF0) -#define DF_IO9_ND_IO9 MFP_CFG(DF_IO9, AF0) -#define DF_IO10_ND_IO10 MFP_CFG(DF_IO10, AF0) -#define DF_IO11_ND_IO11 MFP_CFG(DF_IO11, AF0) -#define DF_IO12_ND_IO12 MFP_CFG(DF_IO12, AF0) -#define DF_IO13_ND_IO13 MFP_CFG(DF_IO13, AF0) -#define DF_IO14_ND_IO14 MFP_CFG(DF_IO14, AF0) -#define DF_IO15_ND_IO15 MFP_CFG(DF_IO15, AF0) -#define DF_nCS0_SM_nCS2_nCS0 MFP_CFG(DF_nCS0_SM_nCS2, AF0) -#define DF_ALE_SM_WEn_ND_ALE MFP_CFG(DF_ALE_SM_WEn, AF1) -#define DF_CLE_SM_OEn_ND_CLE MFP_CFG(DF_CLE_SM_OEn, AF0) -#define DF_WEn_DF_WEn MFP_CFG(DF_WEn, AF1) -#define DF_REn_DF_REn MFP_CFG(DF_REn, AF1) -#define DF_RDY0_DF_RDY0 MFP_CFG(DF_RDY0, AF0) - -/*keypad*/ -#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1) -#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1) -#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1) -#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1) -#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1) -#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1) -#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1) -#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1) -#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1) -#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1) -#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1) -#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1) -#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1) -#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1) -#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1) -#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1) -#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1) -#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1) -#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1) -#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1) - -/* LCD */ -#define GPIO81_LCD_FCLK MFP_CFG(GPIO81, AF1) -#define GPIO82_LCD_LCLK MFP_CFG(GPIO82, AF1) -#define GPIO83_LCD_PCLK MFP_CFG(GPIO83, AF1) -#define GPIO84_LCD_DENA MFP_CFG(GPIO84, AF1) -#define GPIO85_LCD_DD0 MFP_CFG(GPIO85, AF1) -#define GPIO86_LCD_DD1 MFP_CFG(GPIO86, AF1) -#define GPIO87_LCD_DD2 MFP_CFG(GPIO87, AF1) -#define GPIO88_LCD_DD3 MFP_CFG(GPIO88, AF1) -#define GPIO89_LCD_DD4 MFP_CFG(GPIO89, AF1) -#define GPIO90_LCD_DD5 MFP_CFG(GPIO90, AF1) -#define GPIO91_LCD_DD6 MFP_CFG(GPIO91, AF1) -#define GPIO92_LCD_DD7 MFP_CFG(GPIO92, AF1) -#define GPIO93_LCD_DD8 MFP_CFG(GPIO93, AF1) -#define GPIO94_LCD_DD9 MFP_CFG(GPIO94, AF1) -#define GPIO95_LCD_DD10 MFP_CFG(GPIO95, AF1) -#define GPIO96_LCD_DD11 MFP_CFG(GPIO96, AF1) -#define GPIO97_LCD_DD12 MFP_CFG(GPIO97, AF1) -#define GPIO98_LCD_DD13 MFP_CFG(GPIO98, AF1) -#define GPIO100_LCD_DD14 MFP_CFG(GPIO100, AF1) -#define GPIO101_LCD_DD15 MFP_CFG(GPIO101, AF1) -#define GPIO102_LCD_DD16 MFP_CFG(GPIO102, AF1) -#define GPIO103_LCD_DD17 MFP_CFG(GPIO103, AF1) -#define GPIO104_LCD_DD18 MFP_CFG(GPIO104, AF1) -#define GPIO105_LCD_DD19 MFP_CFG(GPIO105, AF1) -#define GPIO106_LCD_DD20 MFP_CFG(GPIO106, AF1) -#define GPIO107_LCD_DD21 MFP_CFG(GPIO107, AF1) -#define GPIO108_LCD_DD22 MFP_CFG(GPIO108, AF1) -#define GPIO109_LCD_DD23 MFP_CFG(GPIO109, AF1) - -#define GPIO104_LCD_SPIDOUT MFP_CFG(GPIO104, AF3) -#define GPIO105_LCD_SPIDIN MFP_CFG(GPIO105, AF3) -#define GPIO107_LCD_CS1 MFP_CFG(GPIO107, AF3) -#define GPIO108_LCD_DCLK MFP_CFG(GPIO108, AF3) - -#define GPIO106_LCD_RESET MFP_CFG(GPIO106, AF0) - -/*smart panel*/ -#define GPIO82_LCD_A0 MFP_CFG(GPIO82, AF0) -#define GPIO83_LCD_WR MFP_CFG(GPIO83, AF0) -#define GPIO103_LCD_CS MFP_CFG(GPIO103, AF0) - -/*1wire*/ -#define GPIO106_1WIRE MFP_CFG(GPIO106, AF3) - -/*CCIC*/ -#define GPIO67_CCIC_IN7 MFP_CFG_DRV(GPIO67, AF1, MEDIUM) -#define GPIO68_CCIC_IN6 MFP_CFG_DRV(GPIO68, AF1, MEDIUM) -#define GPIO69_CCIC_IN5 MFP_CFG_DRV(GPIO69, AF1, MEDIUM) -#define GPIO70_CCIC_IN4 MFP_CFG_DRV(GPIO70, AF1, MEDIUM) -#define GPIO71_CCIC_IN3 MFP_CFG_DRV(GPIO71, AF1, MEDIUM) -#define GPIO72_CCIC_IN2 MFP_CFG_DRV(GPIO72, AF1, MEDIUM) -#define GPIO73_CCIC_IN1 MFP_CFG_DRV(GPIO73, AF1, MEDIUM) -#define GPIO74_CCIC_IN0 MFP_CFG_DRV(GPIO74, AF1, MEDIUM) -#define GPIO75_CAM_HSYNC MFP_CFG_DRV(GPIO75, AF1, MEDIUM) -#define GPIO76_CAM_VSYNC MFP_CFG_DRV(GPIO76, AF1, MEDIUM) -#define GPIO77_CAM_MCLK MFP_CFG_DRV(GPIO77, AF1, MEDIUM) -#define GPIO78_CAM_PCLK MFP_CFG_DRV(GPIO78, AF1, MEDIUM) - -/* MMC1 */ -#define MMC1_DAT7_MMC1_DAT7 MFP_CFG_DRV(MMC1_DAT7, AF0, MEDIUM) -#define MMC1_DAT6_MMC1_DAT6 MFP_CFG_DRV(MMC1_DAT6, AF0, MEDIUM) -#define MMC1_DAT5_MMC1_DAT5 MFP_CFG_DRV(MMC1_DAT5, AF0, MEDIUM) -#define MMC1_DAT4_MMC1_DAT4 MFP_CFG_DRV(MMC1_DAT4, AF0, MEDIUM) -#define MMC1_DAT3_MMC1_DAT3 MFP_CFG_DRV(MMC1_DAT3, AF0, MEDIUM) -#define MMC1_DAT2_MMC1_DAT2 MFP_CFG_DRV(MMC1_DAT2, AF0, MEDIUM) -#define MMC1_DAT1_MMC1_DAT1 MFP_CFG_DRV(MMC1_DAT1, AF0, MEDIUM) -#define MMC1_DAT0_MMC1_DAT0 MFP_CFG_DRV(MMC1_DAT0, AF0, MEDIUM) -#define MMC1_CMD_MMC1_CMD MFP_CFG_DRV(MMC1_CMD, AF0, MEDIUM) -#define MMC1_CLK_MMC1_CLK MFP_CFG_DRV(MMC1_CLK, AF0, MEDIUM) -#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM) -#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM) - -/* PWM */ -#define GPIO27_PWM3_AF2 MFP_CFG(GPIO27, AF2) -#define GPIO51_PWM2_OUT MFP_CFG(GPIO51, AF2) -#define GPIO117_PWM1_OUT MFP_CFG(GPIO117, AF2) -#define GPIO118_PWM2_OUT MFP_CFG(GPIO118, AF2) -#define GPIO119_PWM3_OUT MFP_CFG(GPIO119, AF2) -#define GPIO120_PWM4_OUT MFP_CFG(GPIO120, AF2) - -#endif /* __ASM_MACH MFP_PXA910_H */ diff --git a/arch/arm/mach-mmp/mfp.h b/arch/arm/mach-mmp/mfp.h deleted file mode 100644 index 6f3057987756..000000000000 --- a/arch/arm/mach-mmp/mfp.h +++ /dev/null @@ -1,35 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_MACH_MFP_H -#define __ASM_MACH_MFP_H - -#include <linux/soc/pxa/mfp.h> - -/* - * NOTE: the MFPR register bit definitions on PXA168 processor lines are a - * bit different from those on PXA3xx. Bit [7:10] are now reserved, which - * were SLEEP_OE_N, SLEEP_DATA, SLEEP_SEL and the LSB of DRIVE bits. - * - * To cope with this difference and re-use the pxa3xx mfp code as much as - * possible, we make the following compromise: - * - * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT) - * 2. DRIVE strength definitions redefined to include the reserved bit - * - the reserved bit differs between pxa168 and pxa910, and the - * MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h - * 3. Override MFP_CFG() and MFP_CFG_DRV() - * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X() - */ - -#undef MFP_CFG -#undef MFP_CFG_DRV -#undef MFP_CFG_LPM -#undef MFP_CFG_X -#undef MFP_CFG_DEFAULT - -#define MFP_CFG(pin, af) \ - (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) - -#define MFP_CFG_DRV(pin, af, drv) \ - (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) - -#endif /* __ASM_MACH_MFP_H */ diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c deleted file mode 100644 index bbc4c2274de3..000000000000 --- a/arch/arm/mach-mmp/mmp2.c +++ /dev/null @@ -1,175 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/mmp2.c - * - * code name MMP2 - * - * Copyright (C) 2009 Marvell International Ltd. - */ -#include <linux/clk/mmp.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/irqchip/mmp.h> -#include <linux/platform_device.h> - -#include <asm/hardware/cache-tauros2.h> - -#include <asm/mach/time.h> -#include "addr-map.h" -#include "regs-apbc.h" -#include <linux/soc/mmp/cputype.h> -#include "irqs.h" -#include "mfp.h" -#include "devices.h" -#include "mmp2.h" -#include "pm-mmp2.h" - -#include "common.h" - -#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) - -static struct mfp_addr_map mmp2_addr_map[] __initdata = { - - MFP_ADDR_X(GPIO0, GPIO58, 0x54), - MFP_ADDR_X(GPIO59, GPIO73, 0x280), - MFP_ADDR_X(GPIO74, GPIO101, 0x170), - - MFP_ADDR(GPIO102, 0x0), - MFP_ADDR(GPIO103, 0x4), - MFP_ADDR(GPIO104, 0x1fc), - MFP_ADDR(GPIO105, 0x1f8), - MFP_ADDR(GPIO106, 0x1f4), - MFP_ADDR(GPIO107, 0x1f0), - MFP_ADDR(GPIO108, 0x21c), - MFP_ADDR(GPIO109, 0x218), - MFP_ADDR(GPIO110, 0x214), - MFP_ADDR(GPIO111, 0x200), - MFP_ADDR(GPIO112, 0x244), - MFP_ADDR(GPIO113, 0x25c), - MFP_ADDR(GPIO114, 0x164), - MFP_ADDR_X(GPIO115, GPIO122, 0x260), - - MFP_ADDR(GPIO123, 0x148), - MFP_ADDR_X(GPIO124, GPIO141, 0xc), - - MFP_ADDR(GPIO142, 0x8), - MFP_ADDR_X(GPIO143, GPIO151, 0x220), - MFP_ADDR_X(GPIO152, GPIO153, 0x248), - MFP_ADDR_X(GPIO154, GPIO155, 0x254), - MFP_ADDR_X(GPIO156, GPIO159, 0x14c), - - MFP_ADDR(GPIO160, 0x250), - MFP_ADDR(GPIO161, 0x210), - MFP_ADDR(GPIO162, 0x20c), - MFP_ADDR(GPIO163, 0x208), - MFP_ADDR(GPIO164, 0x204), - MFP_ADDR(GPIO165, 0x1ec), - MFP_ADDR(GPIO166, 0x1e8), - MFP_ADDR(GPIO167, 0x1e4), - MFP_ADDR(GPIO168, 0x1e0), - - MFP_ADDR_X(TWSI1_SCL, TWSI1_SDA, 0x140), - MFP_ADDR_X(TWSI4_SCL, TWSI4_SDA, 0x2bc), - - MFP_ADDR(PMIC_INT, 0x2c4), - MFP_ADDR(CLK_REQ, 0x160), - - MFP_ADDR_END, -}; - -void mmp2_clear_pmic_int(void) -{ - void __iomem *mfpr_pmic; - unsigned long data; - - mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4; - data = __raw_readl(mfpr_pmic); - __raw_writel(data | (1 << 6), mfpr_pmic); - __raw_writel(data, mfpr_pmic); -} - -void __init mmp2_init_irq(void) -{ - mmp2_init_icu(); -#ifdef CONFIG_PM - icu_irq_chip.irq_set_wake = mmp2_set_wake; -#endif -} - -static int __init mmp2_init(void) -{ - if (cpu_is_mmp2()) { -#ifdef CONFIG_CACHE_TAUROS2 - tauros2_init(0); -#endif - mfp_init_base(MFPR_VIRT_BASE); - mfp_init_addr(mmp2_addr_map); - mmp2_clk_init(APB_PHYS_BASE + 0x50000, - AXI_PHYS_BASE + 0x82800, - APB_PHYS_BASE + 0x15000); - } - - return 0; -} -postcore_initcall(mmp2_init); - -#define APBC_TIMERS APBC_REG(0x024) - -void __init mmp2_timer_init(void) -{ - unsigned long clk_rst; - - __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); - - /* - * enable bus/functional clock, enable 6.5MHz (divider 4), - * release reset - */ - clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); - __raw_writel(clk_rst, APBC_TIMERS); - - mmp_timer_init(IRQ_MMP2_TIMER1, 6500000); -} - -/* on-chip devices */ -MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); -MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); -MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23); -MMP2_DEVICE(uart4, "pxa2xx-uart", 3, UART4, 0xd4016000, 0x30, 18, 19); -MMP2_DEVICE(twsi1, "pxa2xx-i2c", 0, TWSI1, 0xd4011000, 0x70); -MMP2_DEVICE(twsi2, "pxa2xx-i2c", 1, TWSI2, 0xd4031000, 0x70); -MMP2_DEVICE(twsi3, "pxa2xx-i2c", 2, TWSI3, 0xd4032000, 0x70); -MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70); -MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70); -MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70); -MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29); -MMP2_DEVICE(sdh0, "sdhci-pxav3", 0, MMC, 0xd4280000, 0x120); -MMP2_DEVICE(sdh1, "sdhci-pxav3", 1, MMC2, 0xd4280800, 0x120); -MMP2_DEVICE(sdh2, "sdhci-pxav3", 2, MMC3, 0xd4281000, 0x120); -MMP2_DEVICE(sdh3, "sdhci-pxav3", 3, MMC4, 0xd4281800, 0x120); -MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000); -/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ -MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000); - -struct resource mmp2_resource_gpio[] = { - { - .start = 0xd4019000, - .end = 0xd4019fff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_MMP2_GPIO, - .end = IRQ_MMP2_GPIO, - .name = "gpio_mux", - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mmp2_device_gpio = { - .name = "mmp2-gpio", - .id = -1, - .num_resources = ARRAY_SIZE(mmp2_resource_gpio), - .resource = mmp2_resource_gpio, -}; diff --git a/arch/arm/mach-mmp/mmp2.h b/arch/arm/mach-mmp/mmp2.h deleted file mode 100644 index 7f80b90248fb..000000000000 --- a/arch/arm/mach-mmp/mmp2.h +++ /dev/null @@ -1,104 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_MACH_MMP2_H -#define __ASM_MACH_MMP2_H - -#include <linux/platform_data/pxa_sdhci.h> - -extern void mmp2_timer_init(void); -extern void __init mmp2_init_irq(void); -extern void mmp2_clear_pmic_int(void); - -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/platform_data/dma-mmp_tdma.h> -#include <linux/irqchip/mmp.h> - -#include "devices.h" - -extern struct mmp_device_desc mmp2_device_uart1; -extern struct mmp_device_desc mmp2_device_uart2; -extern struct mmp_device_desc mmp2_device_uart3; -extern struct mmp_device_desc mmp2_device_uart4; -extern struct mmp_device_desc mmp2_device_twsi1; -extern struct mmp_device_desc mmp2_device_twsi2; -extern struct mmp_device_desc mmp2_device_twsi3; -extern struct mmp_device_desc mmp2_device_twsi4; -extern struct mmp_device_desc mmp2_device_twsi5; -extern struct mmp_device_desc mmp2_device_twsi6; -extern struct mmp_device_desc mmp2_device_sdh0; -extern struct mmp_device_desc mmp2_device_sdh1; -extern struct mmp_device_desc mmp2_device_sdh2; -extern struct mmp_device_desc mmp2_device_sdh3; -extern struct mmp_device_desc mmp2_device_asram; -extern struct mmp_device_desc mmp2_device_isram; - -extern struct platform_device mmp2_device_gpio; - -static inline int mmp2_add_uart(int id) -{ - struct mmp_device_desc *d = NULL; - - switch (id) { - case 1: d = &mmp2_device_uart1; break; - case 2: d = &mmp2_device_uart2; break; - case 3: d = &mmp2_device_uart3; break; - case 4: d = &mmp2_device_uart4; break; - default: - return -EINVAL; - } - - return mmp_register_device(d, NULL, 0); -} - -static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data, - struct i2c_board_info *info, unsigned size) -{ - struct mmp_device_desc *d = NULL; - int ret; - - switch (id) { - case 1: d = &mmp2_device_twsi1; break; - case 2: d = &mmp2_device_twsi2; break; - case 3: d = &mmp2_device_twsi3; break; - case 4: d = &mmp2_device_twsi4; break; - case 5: d = &mmp2_device_twsi5; break; - case 6: d = &mmp2_device_twsi6; break; - default: - return -EINVAL; - } - - ret = i2c_register_board_info(id - 1, info, size); - if (ret) - return ret; - - return mmp_register_device(d, data, sizeof(*data)); -} - -static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data) -{ - struct mmp_device_desc *d = NULL; - - switch (id) { - case 0: d = &mmp2_device_sdh0; break; - case 1: d = &mmp2_device_sdh1; break; - case 2: d = &mmp2_device_sdh2; break; - case 3: d = &mmp2_device_sdh3; break; - default: - return -EINVAL; - } - - return mmp_register_device(d, data, sizeof(*data)); -} - -static inline int mmp2_add_asram(struct sram_platdata *data) -{ - return mmp_register_device(&mmp2_device_asram, data, sizeof(*data)); -} - -static inline int mmp2_add_isram(struct sram_platdata *data) -{ - return mmp_register_device(&mmp2_device_isram, data, sizeof(*data)); -} - -#endif /* __ASM_MACH_MMP2_H */ - diff --git a/arch/arm/mach-mmp/pm-mmp2.c b/arch/arm/mach-mmp/pm-mmp2.c deleted file mode 100644 index 7a6f74c32d42..000000000000 --- a/arch/arm/mach-mmp/pm-mmp2.c +++ /dev/null @@ -1,248 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * MMP2 Power Management Routines - * - * (C) Copyright 2012 Marvell International Ltd. - * All Rights Reserved - */ - -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/time.h> -#include <linux/delay.h> -#include <linux/suspend.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/interrupt.h> -#include <asm/mach-types.h> - -#include <linux/soc/mmp/cputype.h> -#include "addr-map.h" -#include "pm-mmp2.h" -#include "regs-icu.h" -#include "irqs.h" - -int mmp2_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned long data = 0; - int irq = d->irq; - - /* enable wakeup sources */ - switch (irq) { - case IRQ_MMP2_RTC: - case IRQ_MMP2_RTC_ALARM: - data = MPMU_WUCRM_PJ_WAKEUP(4) | MPMU_WUCRM_PJ_RTC_ALARM; - break; - case IRQ_MMP2_PMIC: - data = MPMU_WUCRM_PJ_WAKEUP(7); - break; - case IRQ_MMP2_MMC2: - /* mmc use WAKEUP2, same as GPIO wakeup source */ - data = MPMU_WUCRM_PJ_WAKEUP(2); - break; - } - if (on) { - if (data) { - data |= __raw_readl(MPMU_WUCRM_PJ); - __raw_writel(data, MPMU_WUCRM_PJ); - } - } else { - if (data) { - data = ~data & __raw_readl(MPMU_WUCRM_PJ); - __raw_writel(data, MPMU_WUCRM_PJ); - } - } - return 0; -} - -static void pm_scu_clk_disable(void) -{ - unsigned int val; - - /* close AXI fabric clock gate */ - __raw_writel(0x0, CIU_REG(0x64)); - __raw_writel(0x0, CIU_REG(0x68)); - - /* close MCB master clock gate */ - val = __raw_readl(CIU_REG(0x1c)); - val |= 0xf0; - __raw_writel(val, CIU_REG(0x1c)); - - return ; -} - -static void pm_scu_clk_enable(void) -{ - unsigned int val; - - /* open AXI fabric clock gate */ - __raw_writel(0x03003003, CIU_REG(0x64)); - __raw_writel(0x00303030, CIU_REG(0x68)); - - /* open MCB master clock gate */ - val = __raw_readl(CIU_REG(0x1c)); - val &= ~(0xf0); - __raw_writel(val, CIU_REG(0x1c)); - - return ; -} - -static void pm_mpmu_clk_disable(void) -{ - /* - * disable clocks in MPMU_CGR_PJ register - * except clock for APMU_PLL1, APMU_PLL1_2 and AP_26M - */ - __raw_writel(0x0000a010, MPMU_CGR_PJ); -} - -static void pm_mpmu_clk_enable(void) -{ - unsigned int val; - - __raw_writel(0xdffefffe, MPMU_CGR_PJ); - val = __raw_readl(MPMU_PLL2_CTRL1); - val |= (1 << 29); - __raw_writel(val, MPMU_PLL2_CTRL1); - - return ; -} - -void mmp2_pm_enter_lowpower_mode(int state) -{ - uint32_t idle_cfg, apcr; - - idle_cfg = __raw_readl(APMU_PJ_IDLE_CFG); - apcr = __raw_readl(MPMU_PCR_PJ); - apcr &= ~(MPMU_PCR_PJ_SLPEN | MPMU_PCR_PJ_DDRCORSD | MPMU_PCR_PJ_APBSD - | MPMU_PCR_PJ_AXISD | MPMU_PCR_PJ_VCTCXOSD | (1 << 13)); - idle_cfg &= ~APMU_PJ_IDLE_CFG_PJ_IDLE; - - switch (state) { - case POWER_MODE_SYS_SLEEP: - apcr |= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */ - apcr |= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */ - fallthrough; - case POWER_MODE_CHIP_SLEEP: - apcr |= MPMU_PCR_PJ_SLPEN; - fallthrough; - case POWER_MODE_APPS_SLEEP: - apcr |= MPMU_PCR_PJ_APBSD; /* set APBSD */ - fallthrough; - case POWER_MODE_APPS_IDLE: - apcr |= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */ - apcr |= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */ - idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */ - apcr |= MPMU_PCR_PJ_SPSD; - fallthrough; - case POWER_MODE_CORE_EXTIDLE: - idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */ - idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK; - idle_cfg |= APMU_PJ_IDLE_CFG_PWR_SW(3) - | APMU_PJ_IDLE_CFG_L2_PWR_SW; - break; - case POWER_MODE_CORE_INTIDLE: - apcr &= ~MPMU_PCR_PJ_SPSD; - break; - } - - /* set reserve bits */ - apcr |= (1 << 30) | (1 << 25); - - /* finally write the registers back */ - __raw_writel(idle_cfg, APMU_PJ_IDLE_CFG); - __raw_writel(apcr, MPMU_PCR_PJ); /* 0xfe086000 */ -} - -static int mmp2_pm_enter(suspend_state_t state) -{ - int temp; - - temp = __raw_readl(MMP2_ICU_INT4_MASK); - if (temp & (1 << 1)) { - printk(KERN_ERR "%s: PMIC interrupt is handling\n", __func__); - return -EAGAIN; - } - - temp = __raw_readl(APMU_SRAM_PWR_DWN); - temp |= ((1 << 19) | (1 << 18)); - __raw_writel(temp, APMU_SRAM_PWR_DWN); - pm_mpmu_clk_disable(); - pm_scu_clk_disable(); - - printk(KERN_INFO "%s: before suspend\n", __func__); - cpu_do_idle(); - printk(KERN_INFO "%s: after suspend\n", __func__); - - pm_mpmu_clk_enable(); /* enable clocks in MPMU */ - pm_scu_clk_enable(); /* enable clocks in SCU */ - - return 0; -} - -/* - * Called after processes are frozen, but before we shut down devices. - */ -static int mmp2_pm_prepare(void) -{ - mmp2_pm_enter_lowpower_mode(POWER_MODE_SYS_SLEEP); - - return 0; -} - -/* - * Called after devices are re-setup, but before processes are thawed. - */ -static void mmp2_pm_finish(void) -{ - mmp2_pm_enter_lowpower_mode(POWER_MODE_CORE_INTIDLE); -} - -static int mmp2_pm_valid(suspend_state_t state) -{ - return ((state == PM_SUSPEND_STANDBY) || (state == PM_SUSPEND_MEM)); -} - -/* - * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk. - */ -static const struct platform_suspend_ops mmp2_pm_ops = { - .valid = mmp2_pm_valid, - .prepare = mmp2_pm_prepare, - .enter = mmp2_pm_enter, - .finish = mmp2_pm_finish, -}; - -static int __init mmp2_pm_init(void) -{ - uint32_t apcr; - - if (!cpu_is_mmp2()) - return -EIO; - - suspend_set_ops(&mmp2_pm_ops); - - /* - * Set bit 0, Slow clock Select 32K clock input instead of VCXO - * VCXO is chosen by default, which would be disabled in suspend - */ - __raw_writel(0x5, MPMU_SCCR); - - /* - * Clear bit 23 of CIU_CPU_CONF - * direct PJ4 to DDR access through Memory Controller slow queue - * fast queue has issue and cause lcd will flick - */ - __raw_writel(__raw_readl(CIU_REG(0x8)) & ~(0x1 << 23), CIU_REG(0x8)); - - /* Clear default low power control bit */ - apcr = __raw_readl(MPMU_PCR_PJ); - apcr &= ~(MPMU_PCR_PJ_SLPEN | MPMU_PCR_PJ_DDRCORSD - | MPMU_PCR_PJ_APBSD | MPMU_PCR_PJ_AXISD | 1 << 13); - __raw_writel(apcr, MPMU_PCR_PJ); - - return 0; -} - -late_initcall(mmp2_pm_init); diff --git a/arch/arm/mach-mmp/pm-mmp2.h b/arch/arm/mach-mmp/pm-mmp2.h deleted file mode 100644 index 70299a9450d3..000000000000 --- a/arch/arm/mach-mmp/pm-mmp2.h +++ /dev/null @@ -1,59 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * MMP2 Power Management Routines - * - * (C) Copyright 2010 Marvell International Ltd. - * All Rights Reserved - */ - -#ifndef __MMP2_PM_H__ -#define __MMP2_PM_H__ - -#include "addr-map.h" - -#define APMU_PJ_IDLE_CFG APMU_REG(0x018) -#define APMU_PJ_IDLE_CFG_PJ_IDLE (1 << 1) -#define APMU_PJ_IDLE_CFG_PJ_PWRDWN (1 << 5) -#define APMU_PJ_IDLE_CFG_PWR_SW(x) ((x) << 16) -#define APMU_PJ_IDLE_CFG_L2_PWR_SW (1 << 19) -#define APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK (3 << 28) - -#define APMU_SRAM_PWR_DWN APMU_REG(0x08c) - -#define MPMU_SCCR MPMU_REG(0x038) -#define MPMU_PCR_PJ MPMU_REG(0x1000) -#define MPMU_PCR_PJ_AXISD (1 << 31) -#define MPMU_PCR_PJ_SLPEN (1 << 29) -#define MPMU_PCR_PJ_SPSD (1 << 28) -#define MPMU_PCR_PJ_DDRCORSD (1 << 27) -#define MPMU_PCR_PJ_APBSD (1 << 26) -#define MPMU_PCR_PJ_INTCLR (1 << 24) -#define MPMU_PCR_PJ_SLPWP0 (1 << 23) -#define MPMU_PCR_PJ_SLPWP1 (1 << 22) -#define MPMU_PCR_PJ_SLPWP2 (1 << 21) -#define MPMU_PCR_PJ_SLPWP3 (1 << 20) -#define MPMU_PCR_PJ_VCTCXOSD (1 << 19) -#define MPMU_PCR_PJ_SLPWP4 (1 << 18) -#define MPMU_PCR_PJ_SLPWP5 (1 << 17) -#define MPMU_PCR_PJ_SLPWP6 (1 << 16) -#define MPMU_PCR_PJ_SLPWP7 (1 << 15) - -#define MPMU_PLL2_CTRL1 MPMU_REG(0x0414) -#define MPMU_CGR_PJ MPMU_REG(0x1024) -#define MPMU_WUCRM_PJ MPMU_REG(0x104c) -#define MPMU_WUCRM_PJ_WAKEUP(x) (1 << (x)) -#define MPMU_WUCRM_PJ_RTC_ALARM (1 << 17) - -enum { - POWER_MODE_ACTIVE = 0, - POWER_MODE_CORE_INTIDLE, - POWER_MODE_CORE_EXTIDLE, - POWER_MODE_APPS_IDLE, - POWER_MODE_APPS_SLEEP, - POWER_MODE_CHIP_SLEEP, - POWER_MODE_SYS_SLEEP, -}; - -extern void mmp2_pm_enter_lowpower_mode(int state); -extern int mmp2_set_wake(struct irq_data *d, unsigned int on); -#endif diff --git a/arch/arm/mach-mmp/pm-pxa910.c b/arch/arm/mach-mmp/pm-pxa910.c deleted file mode 100644 index 1d71d73c1862..000000000000 --- a/arch/arm/mach-mmp/pm-pxa910.c +++ /dev/null @@ -1,272 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * PXA910 Power Management Routines - * - * (C) Copyright 2009 Marvell International Ltd. - * All Rights Reserved - */ - -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/time.h> -#include <linux/delay.h> -#include <linux/suspend.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <asm/mach-types.h> -#include <asm/outercache.h> - -#include <linux/soc/mmp/cputype.h> -#include "addr-map.h" -#include "pm-pxa910.h" -#include "regs-icu.h" -#include "irqs.h" - -int pxa910_set_wake(struct irq_data *data, unsigned int on) -{ - uint32_t awucrm = 0, apcr = 0; - int irq = data->irq; - - /* setting wakeup sources */ - switch (irq) { - /* wakeup line 2 */ - case IRQ_PXA910_AP_GPIO: - awucrm = MPMU_AWUCRM_WAKEUP(2); - apcr |= MPMU_APCR_SLPWP2; - break; - /* wakeup line 3 */ - case IRQ_PXA910_KEYPAD: - awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_KEYPRESS; - apcr |= MPMU_APCR_SLPWP3; - break; - case IRQ_PXA910_ROTARY: - awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_NEWROTARY; - apcr |= MPMU_APCR_SLPWP3; - break; - case IRQ_PXA910_TRACKBALL: - awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_TRACKBALL; - apcr |= MPMU_APCR_SLPWP3; - break; - /* wakeup line 4 */ - case IRQ_PXA910_AP1_TIMER1: - awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_1; - apcr |= MPMU_APCR_SLPWP4; - break; - case IRQ_PXA910_AP1_TIMER2: - awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_2; - apcr |= MPMU_APCR_SLPWP4; - break; - case IRQ_PXA910_AP1_TIMER3: - awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_3; - apcr |= MPMU_APCR_SLPWP4; - break; - case IRQ_PXA910_AP2_TIMER1: - awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_1; - apcr |= MPMU_APCR_SLPWP4; - break; - case IRQ_PXA910_AP2_TIMER2: - awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_2; - apcr |= MPMU_APCR_SLPWP4; - break; - case IRQ_PXA910_AP2_TIMER3: - awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_3; - apcr |= MPMU_APCR_SLPWP4; - break; - case IRQ_PXA910_RTC_ALARM: - awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_RTC_ALARM; - apcr |= MPMU_APCR_SLPWP4; - break; - /* wakeup line 5 */ - case IRQ_PXA910_USB1: - case IRQ_PXA910_USB2: - awucrm = MPMU_AWUCRM_WAKEUP(5); - apcr |= MPMU_APCR_SLPWP5; - break; - /* wakeup line 6 */ - case IRQ_PXA910_MMC: - awucrm = MPMU_AWUCRM_WAKEUP(6) - | MPMU_AWUCRM_SDH1 - | MPMU_AWUCRM_SDH2; - apcr |= MPMU_APCR_SLPWP6; - break; - /* wakeup line 7 */ - case IRQ_PXA910_PMIC_INT: - awucrm = MPMU_AWUCRM_WAKEUP(7); - apcr |= MPMU_APCR_SLPWP7; - break; - default: - if (irq >= IRQ_GPIO_START && irq < IRQ_BOARD_START) { - awucrm = MPMU_AWUCRM_WAKEUP(2); - apcr |= MPMU_APCR_SLPWP2; - } else { - /* FIXME: This should return a proper error code ! */ - printk(KERN_ERR "Error: no defined wake up source irq: %d\n", - irq); - } - } - - if (on) { - if (awucrm) { - awucrm |= __raw_readl(MPMU_AWUCRM); - __raw_writel(awucrm, MPMU_AWUCRM); - } - if (apcr) { - apcr = ~apcr & __raw_readl(MPMU_APCR); - __raw_writel(apcr, MPMU_APCR); - } - } else { - if (awucrm) { - awucrm = ~awucrm & __raw_readl(MPMU_AWUCRM); - __raw_writel(awucrm, MPMU_AWUCRM); - } - if (apcr) { - apcr |= __raw_readl(MPMU_APCR); - __raw_writel(apcr, MPMU_APCR); - } - } - return 0; -} - -void pxa910_pm_enter_lowpower_mode(int state) -{ - uint32_t idle_cfg, apcr; - - idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG); - apcr = __raw_readl(MPMU_APCR); - - apcr &= ~(MPMU_APCR_DDRCORSD | MPMU_APCR_APBSD | MPMU_APCR_AXISD - | MPMU_APCR_VCTCXOSD | MPMU_APCR_STBYEN); - idle_cfg &= ~(APMU_MOH_IDLE_CFG_MOH_IDLE - | APMU_MOH_IDLE_CFG_MOH_PWRDWN); - - switch (state) { - case POWER_MODE_UDR: - /* only shutdown APB in UDR */ - apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD; - fallthrough; - case POWER_MODE_SYS_SLEEP: - apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */ - apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */ - fallthrough; - case POWER_MODE_APPS_SLEEP: - apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */ - fallthrough; - case POWER_MODE_APPS_IDLE: - apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */ - fallthrough; - case POWER_MODE_CORE_EXTIDLE: - idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE; - idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN; - idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3) - | APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3); - fallthrough; - case POWER_MODE_CORE_INTIDLE: - break; - } - - /* program the memory controller hardware sleep type and auto wakeup */ - idle_cfg |= APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ; - idle_cfg |= APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN; - __raw_writel(0x0, APMU_MC_HW_SLP_TYPE); /* auto refresh */ - - /* set DSPSD, DTCMSD, BBSD, MSASLPEN */ - apcr |= MPMU_APCR_DSPSD | MPMU_APCR_DTCMSD | MPMU_APCR_BBSD - | MPMU_APCR_MSASLPEN; - - /*always set SLEPEN bit mainly for MSA*/ - apcr |= MPMU_APCR_SLPEN; - - /* finally write the registers back */ - __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG); - __raw_writel(apcr, MPMU_APCR); - -} - -static int pxa910_pm_enter(suspend_state_t state) -{ - unsigned int idle_cfg, reg = 0; - - /*pmic thread not completed,exit;otherwise system can't be waked up*/ - reg = __raw_readl(ICU_INT_CONF(IRQ_PXA910_PMIC_INT)); - if ((reg & 0x3) == 0) - return -EAGAIN; - - idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG); - idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN - | APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN; - __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG); - - /* disable L2 */ - outer_disable(); - /* wait for l2 idle */ - while (!(readl(CIU_REG(0x8)) & (1 << 16))) - udelay(1); - - cpu_do_idle(); - - /* enable L2 */ - outer_resume(); - /* wait for l2 idle */ - while (!(readl(CIU_REG(0x8)) & (1 << 16))) - udelay(1); - - idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG); - idle_cfg &= ~(APMU_MOH_IDLE_CFG_MOH_PWRDWN - | APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN); - __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG); - - return 0; -} - -/* - * Called after processes are frozen, but before we shut down devices. - */ -static int pxa910_pm_prepare(void) -{ - pxa910_pm_enter_lowpower_mode(POWER_MODE_UDR); - return 0; -} - -/* - * Called after devices are re-setup, but before processes are thawed. - */ -static void pxa910_pm_finish(void) -{ - pxa910_pm_enter_lowpower_mode(POWER_MODE_CORE_INTIDLE); -} - -static int pxa910_pm_valid(suspend_state_t state) -{ - return ((state == PM_SUSPEND_STANDBY) || (state == PM_SUSPEND_MEM)); -} - -static const struct platform_suspend_ops pxa910_pm_ops = { - .valid = pxa910_pm_valid, - .prepare = pxa910_pm_prepare, - .enter = pxa910_pm_enter, - .finish = pxa910_pm_finish, -}; - -static int __init pxa910_pm_init(void) -{ - uint32_t awucrm = 0; - - if (!cpu_is_pxa910()) - return -EIO; - - suspend_set_ops(&pxa910_pm_ops); - - /* Set the following bits for MMP3 playback with VCTXO on */ - __raw_writel(__raw_readl(APMU_SQU_CLK_GATE_CTRL) | (1 << 30), - APMU_SQU_CLK_GATE_CTRL); - __raw_writel(__raw_readl(MPMU_FCCR) | (1 << 28), MPMU_FCCR); - - awucrm |= MPMU_AWUCRM_AP_ASYNC_INT | MPMU_AWUCRM_AP_FULL_IDLE; - __raw_writel(awucrm, MPMU_AWUCRM); - - return 0; -} - -late_initcall(pxa910_pm_init); diff --git a/arch/arm/mach-mmp/pm-pxa910.h b/arch/arm/mach-mmp/pm-pxa910.h deleted file mode 100644 index 8e6344adaf51..000000000000 --- a/arch/arm/mach-mmp/pm-pxa910.h +++ /dev/null @@ -1,75 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * PXA910 Power Management Routines - * - * (C) Copyright 2009 Marvell International Ltd. - * All Rights Reserved - */ - -#ifndef __PXA910_PM_H__ -#define __PXA910_PM_H__ - -#define APMU_MOH_IDLE_CFG APMU_REG(0x0018) -#define APMU_MOH_IDLE_CFG_MOH_IDLE (1 << 1) -#define APMU_MOH_IDLE_CFG_MOH_PWRDWN (1 << 5) -#define APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN (1 << 6) -#define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x) (((x) & 0x3) << 16) -#define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x) (((x) & 0x3) << 18) -#define APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ (1 << 21) -#define APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN (1 << 20) - -#define APMU_SQU_CLK_GATE_CTRL APMU_REG(0x001c) -#define APMU_MC_HW_SLP_TYPE APMU_REG(0x00b0) - -#define MPMU_FCCR MPMU_REG(0x0008) -#define MPMU_APCR MPMU_REG(0x1000) -#define MPMU_APCR_AXISD (1 << 31) -#define MPMU_APCR_DSPSD (1 << 30) -#define MPMU_APCR_SLPEN (1 << 29) -#define MPMU_APCR_DTCMSD (1 << 28) -#define MPMU_APCR_DDRCORSD (1 << 27) -#define MPMU_APCR_APBSD (1 << 26) -#define MPMU_APCR_BBSD (1 << 25) -#define MPMU_APCR_SLPWP0 (1 << 23) -#define MPMU_APCR_SLPWP1 (1 << 22) -#define MPMU_APCR_SLPWP2 (1 << 21) -#define MPMU_APCR_SLPWP3 (1 << 20) -#define MPMU_APCR_VCTCXOSD (1 << 19) -#define MPMU_APCR_SLPWP4 (1 << 18) -#define MPMU_APCR_SLPWP5 (1 << 17) -#define MPMU_APCR_SLPWP6 (1 << 16) -#define MPMU_APCR_SLPWP7 (1 << 15) -#define MPMU_APCR_MSASLPEN (1 << 14) -#define MPMU_APCR_STBYEN (1 << 13) - -#define MPMU_AWUCRM MPMU_REG(0x104c) -#define MPMU_AWUCRM_AP_ASYNC_INT (1 << 25) -#define MPMU_AWUCRM_AP_FULL_IDLE (1 << 24) -#define MPMU_AWUCRM_SDH1 (1 << 23) -#define MPMU_AWUCRM_SDH2 (1 << 22) -#define MPMU_AWUCRM_KEYPRESS (1 << 21) -#define MPMU_AWUCRM_TRACKBALL (1 << 20) -#define MPMU_AWUCRM_NEWROTARY (1 << 19) -#define MPMU_AWUCRM_RTC_ALARM (1 << 17) -#define MPMU_AWUCRM_AP2_TIMER_3 (1 << 13) -#define MPMU_AWUCRM_AP2_TIMER_2 (1 << 12) -#define MPMU_AWUCRM_AP2_TIMER_1 (1 << 11) -#define MPMU_AWUCRM_AP1_TIMER_3 (1 << 10) -#define MPMU_AWUCRM_AP1_TIMER_2 (1 << 9) -#define MPMU_AWUCRM_AP1_TIMER_1 (1 << 8) -#define MPMU_AWUCRM_WAKEUP(x) (1 << ((x) & 0x7)) - -enum { - POWER_MODE_ACTIVE = 0, - POWER_MODE_CORE_INTIDLE, - POWER_MODE_CORE_EXTIDLE, - POWER_MODE_APPS_IDLE, - POWER_MODE_APPS_SLEEP, - POWER_MODE_SYS_SLEEP, - POWER_MODE_HIBERNATE, - POWER_MODE_UDR, -}; - -extern int pxa910_set_wake(struct irq_data *data, unsigned int on); - -#endif diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c deleted file mode 100644 index 1e9389245d0e..000000000000 --- a/arch/arm/mach-mmp/pxa168.c +++ /dev/null @@ -1,175 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/pxa168.c - * - * Code specific to PXA168 - */ -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/list.h> -#include <linux/io.h> -#include <linux/clk.h> -#include <linux/clk/mmp.h> -#include <linux/platform_device.h> -#include <linux/platform_data/mv_usb.h> -#include <linux/dma-mapping.h> - -#include <asm/mach/time.h> -#include <asm/system_misc.h> - -#include "addr-map.h" -#include "common.h" -#include <linux/soc/mmp/cputype.h> -#include "devices.h" -#include "irqs.h" -#include "mfp.h" -#include "pxa168.h" -#include "regs-apbc.h" -#include "regs-apmu.h" -#include "regs-usb.h" - -#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) - -static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata = -{ - MFP_ADDR_X(GPIO0, GPIO36, 0x04c), - MFP_ADDR_X(GPIO37, GPIO55, 0x000), - MFP_ADDR_X(GPIO56, GPIO123, 0x0e0), - MFP_ADDR_X(GPIO124, GPIO127, 0x0f4), - - MFP_ADDR_END, -}; - -void __init pxa168_init_irq(void) -{ - icu_init_irq(); -} - -static int __init pxa168_init(void) -{ - if (cpu_is_pxa168()) { - mfp_init_base(MFPR_VIRT_BASE); - mfp_init_addr(pxa168_mfp_addr_map); - pxa168_clk_init(APB_PHYS_BASE + 0x50000, - AXI_PHYS_BASE + 0x82800, - APB_PHYS_BASE + 0x15000); - } - - return 0; -} -postcore_initcall(pxa168_init); - -/* system timer - clock enabled, 3.25MHz */ -#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) -#define APBC_TIMERS APBC_REG(0x34) - -void __init pxa168_timer_init(void) -{ - /* this is early, we have to initialize the CCU registers by - * ourselves instead of using clk_* API. Clock rate is defined - * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running - */ - __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); - - /* 3.25MHz, bus/functional clock enabled, release reset */ - __raw_writel(TIMER_CLK_RST, APBC_TIMERS); - - mmp_timer_init(IRQ_PXA168_TIMER1, 3250000); -} - -void pxa168_clear_keypad_wakeup(void) -{ - uint32_t val; - uint32_t mask = APMU_PXA168_KP_WAKE_CLR; - - /* wake event clear is needed in order to clear keypad interrupt */ - val = __raw_readl(APMU_WAKE_CLR); - __raw_writel(val | mask, APMU_WAKE_CLR); -} - -/* on-chip devices */ -PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); -PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); -PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24); -PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); -PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); -PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); -PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10); -PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); -PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); -PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); -PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53); -PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55); -PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57); -PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59); -PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61); -PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8); -PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); -PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); - -struct resource pxa168_resource_gpio[] = { - { - .start = 0xd4019000, - .end = 0xd4019fff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_PXA168_GPIOX, - .end = IRQ_PXA168_GPIOX, - .name = "gpio_mux", - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa168_device_gpio = { - .name = "mmp-gpio", - .id = -1, - .num_resources = ARRAY_SIZE(pxa168_resource_gpio), - .resource = pxa168_resource_gpio, -}; - -struct resource pxa168_usb_host_resources[] = { - /* USB Host conroller register base */ - [0] = { - .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET, - .end = PXA168_U2H_REGBASE + USB_REG_RANGE, - .flags = IORESOURCE_MEM, - .name = "capregs", - }, - /* USB PHY register base */ - [1] = { - .start = PXA168_U2H_PHYBASE, - .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE, - .flags = IORESOURCE_MEM, - .name = "phyregs", - }, - [2] = { - .start = IRQ_PXA168_USB2, - .end = IRQ_PXA168_USB2, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32); -struct platform_device pxa168_device_usb_host = { - .name = "pxa-sph", - .id = -1, - .dev = { - .dma_mask = &pxa168_usb_host_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - - .num_resources = ARRAY_SIZE(pxa168_usb_host_resources), - .resource = pxa168_usb_host_resources, -}; - -int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata) -{ - pxa168_device_usb_host.dev.platform_data = pdata; - return platform_device_register(&pxa168_device_usb_host); -} - -void pxa168_restart(enum reboot_mode mode, const char *cmd) -{ - soft_restart(0xffff0000); -} diff --git a/arch/arm/mach-mmp/pxa168.h b/arch/arm/mach-mmp/pxa168.h deleted file mode 100644 index c1547e098f09..000000000000 --- a/arch/arm/mach-mmp/pxa168.h +++ /dev/null @@ -1,139 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_MACH_PXA168_H -#define __ASM_MACH_PXA168_H - -#include <linux/reboot.h> - -extern void pxa168_timer_init(void); -extern void __init pxa168_init_irq(void); -extern void pxa168_restart(enum reboot_mode, const char *); -extern void pxa168_clear_keypad_wakeup(void); - -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/platform_data/mtd-nand-pxa3xx.h> -#include <video/pxa168fb.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include <linux/pxa168_eth.h> -#include <linux/platform_data/mv_usb.h> -#include <linux/soc/mmp/cputype.h> -#include <linux/irqchip/mmp.h> - -#include "devices.h" - -extern struct mmp_device_desc pxa168_device_uart1; -extern struct mmp_device_desc pxa168_device_uart2; -extern struct mmp_device_desc pxa168_device_uart3; -extern struct mmp_device_desc pxa168_device_twsi0; -extern struct mmp_device_desc pxa168_device_twsi1; -extern struct mmp_device_desc pxa168_device_pwm1; -extern struct mmp_device_desc pxa168_device_pwm2; -extern struct mmp_device_desc pxa168_device_pwm3; -extern struct mmp_device_desc pxa168_device_pwm4; -extern struct mmp_device_desc pxa168_device_ssp1; -extern struct mmp_device_desc pxa168_device_ssp2; -extern struct mmp_device_desc pxa168_device_ssp3; -extern struct mmp_device_desc pxa168_device_ssp4; -extern struct mmp_device_desc pxa168_device_ssp5; -extern struct mmp_device_desc pxa168_device_nand; -extern struct mmp_device_desc pxa168_device_fb; -extern struct mmp_device_desc pxa168_device_keypad; -extern struct mmp_device_desc pxa168_device_eth; - -/* pdata can be NULL */ -extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata); - - -extern struct platform_device pxa168_device_gpio; - -static inline int pxa168_add_uart(int id) -{ - struct mmp_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa168_device_uart1; break; - case 2: d = &pxa168_device_uart2; break; - case 3: d = &pxa168_device_uart3; break; - } - - if (d == NULL) - return -EINVAL; - - return mmp_register_device(d, NULL, 0); -} - -static inline int pxa168_add_twsi(int id, struct i2c_pxa_platform_data *data, - struct i2c_board_info *info, unsigned size) -{ - struct mmp_device_desc *d = NULL; - int ret; - - switch (id) { - case 0: d = &pxa168_device_twsi0; break; - case 1: d = &pxa168_device_twsi1; break; - default: - return -EINVAL; - } - - ret = i2c_register_board_info(id, info, size); - if (ret) - return ret; - - return mmp_register_device(d, data, sizeof(*data)); -} - -static inline int pxa168_add_pwm(int id) -{ - struct mmp_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa168_device_pwm1; break; - case 2: d = &pxa168_device_pwm2; break; - case 3: d = &pxa168_device_pwm3; break; - case 4: d = &pxa168_device_pwm4; break; - default: - return -EINVAL; - } - - return mmp_register_device(d, NULL, 0); -} - -static inline int pxa168_add_ssp(int id) -{ - struct mmp_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa168_device_ssp1; break; - case 2: d = &pxa168_device_ssp2; break; - case 3: d = &pxa168_device_ssp3; break; - case 4: d = &pxa168_device_ssp4; break; - case 5: d = &pxa168_device_ssp5; break; - default: - return -EINVAL; - } - return mmp_register_device(d, NULL, 0); -} - -static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info) -{ - return mmp_register_device(&pxa168_device_nand, info, sizeof(*info)); -} - -static inline int pxa168_add_fb(struct pxa168fb_mach_info *mi) -{ - return mmp_register_device(&pxa168_device_fb, mi, sizeof(*mi)); -} - -static inline int pxa168_add_keypad(struct pxa27x_keypad_platform_data *data) -{ - if (cpu_is_pxa168()) - data->clear_wakeup_event = pxa168_clear_keypad_wakeup; - - return mmp_register_device(&pxa168_device_keypad, data, sizeof(*data)); -} - -static inline int pxa168_add_eth(struct pxa168_eth_platform_data *data) -{ - return mmp_register_device(&pxa168_device_eth, data, sizeof(*data)); -} -#endif /* __ASM_MACH_PXA168_H */ diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c deleted file mode 100644 index b19a069d9fab..000000000000 --- a/arch/arm/mach-mmp/pxa910.c +++ /dev/null @@ -1,190 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/pxa910.c - * - * Code specific to PXA910 - */ -#include <linux/clk/mmp.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/list.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/irqchip/mmp.h> -#include <linux/platform_device.h> - -#include <asm/hardware/cache-tauros2.h> -#include <asm/mach/time.h> -#include "addr-map.h" -#include "regs-apbc.h" -#include <linux/soc/mmp/cputype.h> -#include "irqs.h" -#include "mfp.h" -#include "devices.h" -#include "pm-pxa910.h" -#include "pxa910.h" - -#include "common.h" - -#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) - -static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata = -{ - MFP_ADDR_X(GPIO0, GPIO54, 0xdc), - MFP_ADDR_X(GPIO67, GPIO98, 0x1b8), - MFP_ADDR_X(GPIO100, GPIO109, 0x238), - - MFP_ADDR(GPIO123, 0xcc), - MFP_ADDR(GPIO124, 0xd0), - - MFP_ADDR(DF_IO0, 0x40), - MFP_ADDR(DF_IO1, 0x3c), - MFP_ADDR(DF_IO2, 0x38), - MFP_ADDR(DF_IO3, 0x34), - MFP_ADDR(DF_IO4, 0x30), - MFP_ADDR(DF_IO5, 0x2c), - MFP_ADDR(DF_IO6, 0x28), - MFP_ADDR(DF_IO7, 0x24), - MFP_ADDR(DF_IO8, 0x20), - MFP_ADDR(DF_IO9, 0x1c), - MFP_ADDR(DF_IO10, 0x18), - MFP_ADDR(DF_IO11, 0x14), - MFP_ADDR(DF_IO12, 0x10), - MFP_ADDR(DF_IO13, 0xc), - MFP_ADDR(DF_IO14, 0x8), - MFP_ADDR(DF_IO15, 0x4), - - MFP_ADDR(DF_nCS0_SM_nCS2, 0x44), - MFP_ADDR(DF_nCS1_SM_nCS3, 0x48), - MFP_ADDR(SM_nCS0, 0x4c), - MFP_ADDR(SM_nCS1, 0x50), - MFP_ADDR(DF_WEn, 0x54), - MFP_ADDR(DF_REn, 0x58), - MFP_ADDR(DF_CLE_SM_OEn, 0x5c), - MFP_ADDR(DF_ALE_SM_WEn, 0x60), - MFP_ADDR(SM_SCLK, 0x64), - MFP_ADDR(DF_RDY0, 0x68), - MFP_ADDR(SM_BE0, 0x6c), - MFP_ADDR(SM_BE1, 0x70), - MFP_ADDR(SM_ADV, 0x74), - MFP_ADDR(DF_RDY1, 0x78), - MFP_ADDR(SM_ADVMUX, 0x7c), - MFP_ADDR(SM_RDY, 0x80), - - MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84), - - MFP_ADDR_END, -}; - -void __init pxa910_init_irq(void) -{ - icu_init_irq(); -#ifdef CONFIG_PM - icu_irq_chip.irq_set_wake = pxa910_set_wake; -#endif -} - -static int __init pxa910_init(void) -{ - if (cpu_is_pxa910()) { -#ifdef CONFIG_CACHE_TAUROS2 - tauros2_init(0); -#endif - mfp_init_base(MFPR_VIRT_BASE); - mfp_init_addr(pxa910_mfp_addr_map); - pxa910_clk_init(APB_PHYS_BASE + 0x50000, - AXI_PHYS_BASE + 0x82800, - APB_PHYS_BASE + 0x15000, - APB_PHYS_BASE + 0x3b000); - } - - return 0; -} -postcore_initcall(pxa910_init); - -/* system timer - clock enabled, 3.25MHz */ -#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) -#define APBC_TIMERS APBC_REG(0x34) - -void __init pxa910_timer_init(void) -{ - /* reset and configure */ - __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); - __raw_writel(TIMER_CLK_RST, APBC_TIMERS); - - mmp_timer_init(IRQ_PXA910_AP1_TIMER1, 3250000); -} - -/* on-chip devices */ - -/* NOTE: there are totally 3 UARTs on PXA910: - * - * UART1 - Slow UART (can be used both by AP and CP) - * UART2/3 - Fast UART - * - * To be backward compatible with the legacy FFUART/BTUART/STUART sequence, - * they are re-ordered as: - * - * pxa910_device_uart1 - UART2 as FFUART - * pxa910_device_uart2 - UART3 as BTUART - * - * UART1 is not used by AP for the moment. - */ -PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22); -PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24); -PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); -PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); -PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10); -PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10); -PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); -PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); -PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); -PXA910_DEVICE(disp, "mmp-disp", 0, LCD, 0xd420b000, 0x1ec); -PXA910_DEVICE(fb, "mmp-fb", -1, NONE, 0, 0); -PXA910_DEVICE(panel, "tpo-hvga", -1, NONE, 0, 0); - -struct resource pxa910_resource_gpio[] = { - { - .start = 0xd4019000, - .end = 0xd4019fff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_PXA910_AP_GPIO, - .end = IRQ_PXA910_AP_GPIO, - .name = "gpio_mux", - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa910_device_gpio = { - .name = "mmp-gpio", - .id = -1, - .num_resources = ARRAY_SIZE(pxa910_resource_gpio), - .resource = pxa910_resource_gpio, -}; - -static struct resource pxa910_resource_rtc[] = { - { - .start = 0xd4010000, - .end = 0xd401003f, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_PXA910_RTC_INT, - .end = IRQ_PXA910_RTC_INT, - .name = "rtc 1Hz", - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_PXA910_RTC_ALARM, - .end = IRQ_PXA910_RTC_ALARM, - .name = "rtc alarm", - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa910_device_rtc = { - .name = "sa1100-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(pxa910_resource_rtc), - .resource = pxa910_resource_rtc, -}; diff --git a/arch/arm/mach-mmp/pxa910.h b/arch/arm/mach-mmp/pxa910.h deleted file mode 100644 index 7d229214065a..000000000000 --- a/arch/arm/mach-mmp/pxa910.h +++ /dev/null @@ -1,90 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_MACH_PXA910_H -#define __ASM_MACH_PXA910_H - -extern void pxa910_timer_init(void); -extern void __init pxa910_init_irq(void); - -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/platform_data/mtd-nand-pxa3xx.h> -#include <video/mmp_disp.h> -#include <linux/irqchip/mmp.h> - -#include "devices.h" - -extern struct mmp_device_desc pxa910_device_uart1; -extern struct mmp_device_desc pxa910_device_uart2; -extern struct mmp_device_desc pxa910_device_twsi0; -extern struct mmp_device_desc pxa910_device_twsi1; -extern struct mmp_device_desc pxa910_device_pwm1; -extern struct mmp_device_desc pxa910_device_pwm2; -extern struct mmp_device_desc pxa910_device_pwm3; -extern struct mmp_device_desc pxa910_device_pwm4; -extern struct mmp_device_desc pxa910_device_nand; -extern struct platform_device pxa168_device_usb_phy; -extern struct platform_device pxa168_device_u2o; -extern struct platform_device pxa168_device_u2ootg; -extern struct platform_device pxa168_device_u2oehci; -extern struct mmp_device_desc pxa910_device_disp; -extern struct mmp_device_desc pxa910_device_fb; -extern struct mmp_device_desc pxa910_device_panel; -extern struct platform_device pxa910_device_gpio; -extern struct platform_device pxa910_device_rtc; - -static inline int pxa910_add_uart(int id) -{ - struct mmp_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa910_device_uart1; break; - case 2: d = &pxa910_device_uart2; break; - } - - if (d == NULL) - return -EINVAL; - - return mmp_register_device(d, NULL, 0); -} - -static inline int pxa910_add_twsi(int id, struct i2c_pxa_platform_data *data, - struct i2c_board_info *info, unsigned size) -{ - struct mmp_device_desc *d = NULL; - int ret; - - switch (id) { - case 0: d = &pxa910_device_twsi0; break; - case 1: d = &pxa910_device_twsi1; break; - default: - return -EINVAL; - } - - ret = i2c_register_board_info(id, info, size); - if (ret) - return ret; - - return mmp_register_device(d, data, sizeof(*data)); -} - -static inline int pxa910_add_pwm(int id) -{ - struct mmp_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa910_device_pwm1; break; - case 2: d = &pxa910_device_pwm2; break; - case 3: d = &pxa910_device_pwm3; break; - case 4: d = &pxa910_device_pwm4; break; - default: - return -EINVAL; - } - - return mmp_register_device(d, NULL, 0); -} - -static inline int pxa910_add_nand(struct pxa3xx_nand_platform_data *info) -{ - return mmp_register_device(&pxa910_device_nand, info, sizeof(*info)); -} -#endif /* __ASM_MACH_PXA910_H */ diff --git a/arch/arm/mach-mmp/regs-apbc.h b/arch/arm/mach-mmp/regs-apbc.h deleted file mode 100644 index d0d00c2cce38..000000000000 --- a/arch/arm/mach-mmp/regs-apbc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Application Peripheral Bus Clock Unit - */ - -#ifndef __ASM_MACH_REGS_APBC_H -#define __ASM_MACH_REGS_APBC_H - -#include "addr-map.h" - -/* Common APB clock register bit definitions */ -#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */ -#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */ -#define APBC_RST (1 << 2) /* Reset Generation */ - -/* Functional Clock Selection Mask */ -#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4) - -#endif /* __ASM_MACH_REGS_APBC_H */ diff --git a/arch/arm/mach-mmp/regs-apmu.h b/arch/arm/mach-mmp/regs-apmu.h deleted file mode 100644 index e36f6503adfb..000000000000 --- a/arch/arm/mach-mmp/regs-apmu.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Application Subsystem Power Management Unit - */ - -#ifndef __ASM_MACH_REGS_APMU_H -#define __ASM_MACH_REGS_APMU_H - -#include "addr-map.h" - -#define APMU_FNCLK_EN (1 << 4) -#define APMU_AXICLK_EN (1 << 3) -#define APMU_FNRST_DIS (1 << 1) -#define APMU_AXIRST_DIS (1 << 0) - -/* Wake Clear Register */ -#define APMU_WAKE_CLR APMU_REG(0x07c) - -#define APMU_PXA168_KP_WAKE_CLR (1 << 7) -#define APMU_PXA168_CFI_WAKE_CLR (1 << 6) -#define APMU_PXA168_XD_WAKE_CLR (1 << 5) -#define APMU_PXA168_MSP_WAKE_CLR (1 << 4) -#define APMU_PXA168_SD4_WAKE_CLR (1 << 3) -#define APMU_PXA168_SD3_WAKE_CLR (1 << 2) -#define APMU_PXA168_SD2_WAKE_CLR (1 << 1) -#define APMU_PXA168_SD1_WAKE_CLR (1 << 0) - -#endif /* __ASM_MACH_REGS_APMU_H */ diff --git a/arch/arm/mach-mmp/regs-icu.h b/arch/arm/mach-mmp/regs-icu.h deleted file mode 100644 index 410743d2b402..000000000000 --- a/arch/arm/mach-mmp/regs-icu.h +++ /dev/null @@ -1,69 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Interrupt Control Unit - */ - -#ifndef __ASM_MACH_ICU_H -#define __ASM_MACH_ICU_H - -#include "addr-map.h" - -#define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000) -#define ICU_REG(x) (ICU_VIRT_BASE + (x)) - -#define ICU2_VIRT_BASE (AXI_VIRT_BASE + 0x84000) -#define ICU2_REG(x) (ICU2_VIRT_BASE + (x)) - -#define ICU_INT_CONF(n) ICU_REG((n) << 2) -#define ICU_INT_CONF_MASK (0xf) - -/************ PXA168/PXA910 (MMP) *********************/ -#define ICU_INT_CONF_AP_INT (1 << 6) -#define ICU_INT_CONF_CP_INT (1 << 5) -#define ICU_INT_CONF_IRQ (1 << 4) - -#define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */ -#define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */ -#define ICU_AP_GBL_IRQ_MSK ICU_REG(0x114) /* AP Global Interrupt Mask */ -#define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */ -#define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */ - -/************************** MMP2 ***********************/ - -/* - * IRQ0/FIQ0 is routed to SP IRQ/FIQ. - * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ. - */ -#define ICU_INT_ROUTE_SP_IRQ (1 << 4) -#define ICU_INT_ROUTE_PJ4_IRQ (1 << 5) -#define ICU_INT_ROUTE_PJ4_FIQ (1 << 6) - -#define MMP2_ICU_PJ4_IRQ_STATUS0 ICU_REG(0x138) -#define MMP2_ICU_PJ4_IRQ_STATUS1 ICU_REG(0x13c) -#define MMP2_ICU_PJ4_FIQ_STATUS0 ICU_REG(0x140) -#define MMP2_ICU_PJ4_FIQ_STATUS1 ICU_REG(0x144) - -#define MMP2_ICU_INT4_STATUS ICU_REG(0x150) -#define MMP2_ICU_INT5_STATUS ICU_REG(0x154) -#define MMP2_ICU_INT17_STATUS ICU_REG(0x158) -#define MMP2_ICU_INT35_STATUS ICU_REG(0x15c) -#define MMP2_ICU_INT51_STATUS ICU_REG(0x160) - -#define MMP2_ICU_INT4_MASK ICU_REG(0x168) -#define MMP2_ICU_INT5_MASK ICU_REG(0x16C) -#define MMP2_ICU_INT17_MASK ICU_REG(0x170) -#define MMP2_ICU_INT35_MASK ICU_REG(0x174) -#define MMP2_ICU_INT51_MASK ICU_REG(0x178) - -#define MMP2_ICU_SP_IRQ_SEL ICU_REG(0x100) -#define MMP2_ICU_PJ4_IRQ_SEL ICU_REG(0x104) -#define MMP2_ICU_PJ4_FIQ_SEL ICU_REG(0x108) - -#define MMP2_ICU_INVERT ICU_REG(0x164) - -#define MMP2_ICU_INV_PMIC (1 << 0) -#define MMP2_ICU_INV_PERF (1 << 1) -#define MMP2_ICU_INV_COMMTX (1 << 2) -#define MMP2_ICU_INV_COMMRX (1 << 3) - -#endif /* __ASM_MACH_ICU_H */ diff --git a/arch/arm/mach-mmp/regs-timers.h b/arch/arm/mach-mmp/regs-timers.h index a69f4d7e3443..0cc4aca40e2c 100644 --- a/arch/arm/mach-mmp/regs-timers.h +++ b/arch/arm/mach-mmp/regs-timers.h @@ -6,11 +6,6 @@ #ifndef __ASM_MACH_REGS_TIMERS_H #define __ASM_MACH_REGS_TIMERS_H -#include "addr-map.h" - -#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000) -#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000) - #define TMR_CCR (0x0000) #define TMR_TN_MM(n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2)) #define TMR_CR(n) (0x0028 + ((n) << 2)) diff --git a/arch/arm/mach-mmp/regs-usb.h b/arch/arm/mach-mmp/regs-usb.h deleted file mode 100644 index ed0d1aa0ad6c..000000000000 --- a/arch/arm/mach-mmp/regs-usb.h +++ /dev/null @@ -1,155 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2011 Marvell International Ltd. All rights reserved. - */ - -#ifndef __ASM_ARCH_REGS_USB_H -#define __ASM_ARCH_REGS_USB_H - -#define PXA168_U2O_REGBASE (0xd4208000) -#define PXA168_U2O_PHYBASE (0xd4207000) - -#define PXA168_U2H_REGBASE (0xd4209000) -#define PXA168_U2H_PHYBASE (0xd4206000) - -#define MMP3_HSIC1_REGBASE (0xf0001000) -#define MMP3_HSIC1_PHYBASE (0xf0001800) - -#define MMP3_HSIC2_REGBASE (0xf0002000) -#define MMP3_HSIC2_PHYBASE (0xf0002800) - -#define MMP3_FSIC_REGBASE (0xf0003000) -#define MMP3_FSIC_PHYBASE (0xf0003800) - - -#define USB_REG_RANGE (0x1ff) -#define USB_PHY_RANGE (0xff) - -/* registers */ -#define U2x_CAPREGS_OFFSET 0x100 - -/* phy regs */ -#define UTMI_REVISION 0x0 -#define UTMI_CTRL 0x4 -#define UTMI_PLL 0x8 -#define UTMI_TX 0xc -#define UTMI_RX 0x10 -#define UTMI_IVREF 0x14 -#define UTMI_T0 0x18 -#define UTMI_T1 0x1c -#define UTMI_T2 0x20 -#define UTMI_T3 0x24 -#define UTMI_T4 0x28 -#define UTMI_T5 0x2c -#define UTMI_RESERVE 0x30 -#define UTMI_USB_INT 0x34 -#define UTMI_DBG_CTL 0x38 -#define UTMI_OTG_ADDON 0x3c - -/* For UTMICTRL Register */ -#define UTMI_CTRL_USB_CLK_EN (1 << 31) -/* pxa168 */ -#define UTMI_CTRL_SUSPEND_SET1 (1 << 30) -#define UTMI_CTRL_SUSPEND_SET2 (1 << 29) -#define UTMI_CTRL_RXBUF_PDWN (1 << 24) -#define UTMI_CTRL_TXBUF_PDWN (1 << 11) - -#define UTMI_CTRL_INPKT_DELAY_SHIFT 30 -#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT 28 -#define UTMI_CTRL_PU_REF_SHIFT 20 -#define UTMI_CTRL_ARC_PULLDN_SHIFT 12 -#define UTMI_CTRL_PLL_PWR_UP_SHIFT 1 -#define UTMI_CTRL_PWR_UP_SHIFT 0 - -/* For UTMI_PLL Register */ -#define UTMI_PLL_PLLCALI12_SHIFT 29 -#define UTMI_PLL_PLLCALI12_MASK (0x3 << 29) - -#define UTMI_PLL_PLLVDD18_SHIFT 27 -#define UTMI_PLL_PLLVDD18_MASK (0x3 << 27) - -#define UTMI_PLL_PLLVDD12_SHIFT 25 -#define UTMI_PLL_PLLVDD12_MASK (0x3 << 25) - -#define UTMI_PLL_CLK_BLK_EN_SHIFT 24 -#define CLK_BLK_EN (0x1 << 24) -#define PLL_READY (0x1 << 23) -#define KVCO_EXT (0x1 << 22) -#define VCOCAL_START (0x1 << 21) - -#define UTMI_PLL_KVCO_SHIFT 15 -#define UTMI_PLL_KVCO_MASK (0x7 << 15) - -#define UTMI_PLL_ICP_SHIFT 12 -#define UTMI_PLL_ICP_MASK (0x7 << 12) - -#define UTMI_PLL_FBDIV_SHIFT 4 -#define UTMI_PLL_FBDIV_MASK (0xFF << 4) - -#define UTMI_PLL_REFDIV_SHIFT 0 -#define UTMI_PLL_REFDIV_MASK (0xF << 0) - -/* For UTMI_TX Register */ -#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT 27 -#define UTMI_TX_REG_EXT_FS_RCAL_MASK (0xf << 27) - -#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT 26 -#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK (0x1 << 26) - -#define UTMI_TX_TXVDD12_SHIFT 22 -#define UTMI_TX_TXVDD12_MASK (0x3 << 22) - -#define UTMI_TX_CK60_PHSEL_SHIFT 17 -#define UTMI_TX_CK60_PHSEL_MASK (0xf << 17) - -#define UTMI_TX_IMPCAL_VTH_SHIFT 14 -#define UTMI_TX_IMPCAL_VTH_MASK (0x7 << 14) - -#define REG_RCAL_START (0x1 << 12) - -#define UTMI_TX_LOW_VDD_EN_SHIFT 11 - -#define UTMI_TX_AMP_SHIFT 0 -#define UTMI_TX_AMP_MASK (0x7 << 0) - -/* For UTMI_RX Register */ -#define UTMI_REG_SQ_LENGTH_SHIFT 15 -#define UTMI_REG_SQ_LENGTH_MASK (0x3 << 15) - -#define UTMI_RX_SQ_THRESH_SHIFT 4 -#define UTMI_RX_SQ_THRESH_MASK (0xf << 4) - -#define UTMI_OTG_ADDON_OTG_ON (1 << 0) - -/* fsic registers */ -#define FSIC_MISC 0x4 -#define FSIC_INT 0x28 -#define FSIC_CTRL 0x30 - -/* HSIC registers */ -#define HSIC_PAD_CTRL 0x4 - -#define HSIC_CTRL 0x8 -#define HSIC_CTRL_HSIC_ENABLE (1<<7) -#define HSIC_CTRL_PLL_BYPASS (1<<4) - -#define TEST_GRP_0 0xc -#define TEST_GRP_1 0x10 - -#define HSIC_INT 0x14 -#define HSIC_INT_READY_INT_EN (1<<10) -#define HSIC_INT_CONNECT_INT_EN (1<<9) -#define HSIC_INT_CORE_INT_EN (1<<8) -#define HSIC_INT_HS_READY (1<<2) -#define HSIC_INT_CONNECT (1<<1) -#define HSIC_INT_CORE (1<<0) - -#define HSIC_CONFIG 0x18 -#define USBHSIC_CTRL 0x20 - -#define HSIC_USB_CTRL 0x28 -#define HSIC_USB_CTRL_CLKEN 1 -#define HSIC_USB_CLK_PHY 0x0 -#define HSIC_USB_CLK_PMU 0x1 - -#endif /* __ASM_ARCH_PXA_U2O_H */ diff --git a/arch/arm/mach-mmp/sram.c b/arch/arm/mach-mmp/sram.c deleted file mode 100644 index ecc46c31004f..000000000000 --- a/arch/arm/mach-mmp/sram.c +++ /dev/null @@ -1,167 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/sram.c - * - * based on mach-davinci/sram.c - DaVinci simple SRAM allocator - * - * Copyright (c) 2011 Marvell Semiconductors Inc. - * All Rights Reserved - * - * Add for mmp sram support - Leo Yan <leoy@marvell.com> - */ - -#include <linux/module.h> -#include <linux/mod_devicetable.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/err.h> -#include <linux/slab.h> -#include <linux/genalloc.h> - -#include <linux/platform_data/dma-mmp_tdma.h> - -struct sram_bank_info { - char *pool_name; - struct gen_pool *gpool; - int granularity; - - phys_addr_t sram_phys; - void __iomem *sram_virt; - u32 sram_size; - - struct list_head node; -}; - -static DEFINE_MUTEX(sram_lock); -static LIST_HEAD(sram_bank_list); - -struct gen_pool *sram_get_gpool(char *pool_name) -{ - struct sram_bank_info *info = NULL; - - if (!pool_name) - return NULL; - - mutex_lock(&sram_lock); - - list_for_each_entry(info, &sram_bank_list, node) - if (!strcmp(pool_name, info->pool_name)) - break; - - mutex_unlock(&sram_lock); - - if (&info->node == &sram_bank_list) - return NULL; - - return info->gpool; -} -EXPORT_SYMBOL(sram_get_gpool); - -static int sram_probe(struct platform_device *pdev) -{ - struct sram_platdata *pdata = pdev->dev.platform_data; - struct sram_bank_info *info; - struct resource *res; - int ret = 0; - - if (!pdata || !pdata->pool_name) - return -ENODEV; - - info = kzalloc(sizeof(*info), GFP_KERNEL); - if (!info) - return -ENOMEM; - - platform_set_drvdata(pdev, info); - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (res == NULL) { - dev_err(&pdev->dev, "no memory resource defined\n"); - ret = -ENODEV; - goto out; - } - - if (!resource_size(res)) - return 0; - - info->sram_phys = (phys_addr_t)res->start; - info->sram_size = resource_size(res); - info->sram_virt = ioremap(info->sram_phys, info->sram_size); - info->pool_name = kstrdup(pdata->pool_name, GFP_KERNEL); - info->granularity = pdata->granularity; - - info->gpool = gen_pool_create(ilog2(info->granularity), -1); - if (!info->gpool) { - dev_err(&pdev->dev, "create pool failed\n"); - ret = -ENOMEM; - goto create_pool_err; - } - - ret = gen_pool_add_virt(info->gpool, (unsigned long)info->sram_virt, - info->sram_phys, info->sram_size, -1); - if (ret < 0) { - dev_err(&pdev->dev, "add new chunk failed\n"); - ret = -ENOMEM; - goto add_chunk_err; - } - - mutex_lock(&sram_lock); - list_add(&info->node, &sram_bank_list); - mutex_unlock(&sram_lock); - - dev_info(&pdev->dev, "initialized\n"); - return 0; - -add_chunk_err: - gen_pool_destroy(info->gpool); -create_pool_err: - iounmap(info->sram_virt); - kfree(info->pool_name); -out: - kfree(info); - return ret; -} - -static int sram_remove(struct platform_device *pdev) -{ - struct sram_bank_info *info; - - info = platform_get_drvdata(pdev); - - if (info->sram_size) { - mutex_lock(&sram_lock); - list_del(&info->node); - mutex_unlock(&sram_lock); - - gen_pool_destroy(info->gpool); - iounmap(info->sram_virt); - kfree(info->pool_name); - } - - kfree(info); - - return 0; -} - -static const struct platform_device_id sram_id_table[] = { - { "asram", MMP_ASRAM }, - { "isram", MMP_ISRAM }, - { } -}; - -static struct platform_driver sram_driver = { - .probe = sram_probe, - .remove = sram_remove, - .driver = { - .name = "mmp-sram", - }, - .id_table = sram_id_table, -}; - -static int __init sram_init(void) -{ - return platform_driver_register(&sram_driver); -} -core_initcall(sram_init); - -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c deleted file mode 100644 index 7111535f325f..000000000000 --- a/arch/arm/mach-mmp/teton_bga.c +++ /dev/null @@ -1,100 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/teton_bga.c - * - * Support for the Marvell PXA168 Teton BGA Development Platform. - * - * Author: Mark F. Brown <mark.brown314@gmail.com> - * - * This code is based on aspenite.c - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <linux/gpio-pxa.h> -#include <linux/input.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include <linux/i2c.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "addr-map.h" -#include "mfp-pxa168.h" -#include "pxa168.h" -#include "teton_bga.h" -#include "irqs.h" - -#include "common.h" - -static unsigned long teton_bga_pin_config[] __initdata = { - /* UART1 */ - GPIO107_UART1_TXD, - GPIO108_UART1_RXD, - - /* Keypad */ - GPIO109_KP_MKIN1, - GPIO110_KP_MKIN0, - GPIO111_KP_MKOUT7, - GPIO112_KP_MKOUT6, - - /* I2C Bus */ - GPIO105_CI2C_SDA, - GPIO106_CI2C_SCL, - - /* RTC */ - GPIO78_GPIO, -}; - -static struct pxa_gpio_platform_data pxa168_gpio_pdata = { - .irq_base = MMP_GPIO_TO_IRQ(0), -}; - -static unsigned int teton_bga_matrix_key_map[] = { - KEY(0, 6, KEY_ESC), - KEY(0, 7, KEY_ENTER), - KEY(1, 6, KEY_LEFT), - KEY(1, 7, KEY_RIGHT), -}; - -static struct matrix_keymap_data teton_bga_matrix_keymap_data = { - .keymap = teton_bga_matrix_key_map, - .keymap_size = ARRAY_SIZE(teton_bga_matrix_key_map), -}; - -static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = { - .matrix_key_rows = 2, - .matrix_key_cols = 8, - .matrix_keymap_data = &teton_bga_matrix_keymap_data, - .debounce_interval = 30, -}; - -static struct i2c_board_info teton_bga_i2c_info[] __initdata = { - { - I2C_BOARD_INFO("ds1337", 0x68), - .irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO) - }, -}; - -static void __init teton_bga_init(void) -{ - mfp_config(ARRAY_AND_SIZE(teton_bga_pin_config)); - - /* on-chip devices */ - pxa168_add_uart(1); - pxa168_add_keypad(&teton_bga_keypad_info); - pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info)); - platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata, - sizeof(struct pxa_gpio_platform_data)); - platform_device_register(&pxa168_device_gpio); -} - -MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") - .map_io = mmp_map_io, - .nr_irqs = MMP_NR_IRQS, - .init_irq = pxa168_init_irq, - .init_time = pxa168_timer_init, - .init_machine = teton_bga_init, - .restart = pxa168_restart, -MACHINE_END diff --git a/arch/arm/mach-mmp/teton_bga.h b/arch/arm/mach-mmp/teton_bga.h deleted file mode 100644 index 73050096f0bd..000000000000 --- a/arch/arm/mach-mmp/teton_bga.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Support for the Marvell PXA168 Teton BGA Development Platform. - */ -#ifndef __ASM_MACH_TETON_BGA_H -#define __ASM_MACH_TETON_BGA_H - -/* GPIOs */ -#define MMC_PWENA_GPIO 27 -#define USBHPENB_GPIO 55 -#define RTC_INT_GPIO 78 -#define LCD_VBLK_EN_GPIO 79 -#define LCD_DVDD_EN_GPIO 80 -#define RST_WIFI_GPIO 81 -#define CF_PWEN_GPIO 82 -#define USB_OC_GPIO 83 -#define PWM_GPIO 84 -#define USBHPENA_GPIO 85 -#define TS_INT_GPIO 86 -#define CIR_GPIO 108 - -#endif /* __ASM_MACH_TETON_BGA_H */ diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 708816caf859..fcb190826dd1 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -29,18 +29,13 @@ #include <linux/sched_clock.h> #include <asm/mach/time.h> -#include "addr-map.h" #include "regs-timers.h" -#include "regs-apbc.h" -#include "irqs.h" #include <linux/soc/mmp/cputype.h> -#define TIMERS_VIRT_BASE TIMERS1_VIRT_BASE - #define MAX_DELTA (0xfffffffe) #define MIN_DELTA (16) -static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE; +static void __iomem *mmp_timer_base; /* * Read the timer through the CVWR register. Delay is required after requesting @@ -177,7 +172,7 @@ static void __init timer_config(void) __raw_writel(0x2, mmp_timer_base + TMR_CER); } -void __init mmp_timer_init(int irq, unsigned long rate) +static void __init mmp_timer_init(int irq, unsigned long rate) { timer_config(); diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c deleted file mode 100644 index 345b2e6d5c7e..000000000000 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ /dev/null @@ -1,315 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/ttc_dkb.c - * - * Support for the Marvell PXA910-based TTC_DKB Development Platform. - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/onenand.h> -#include <linux/interrupt.h> -#include <linux/platform_data/pca953x.h> -#include <linux/gpio.h> -#include <linux/gpio-pxa.h> -#include <linux/mfd/88pm860x.h> -#include <linux/platform_data/mv_usb.h> -#include <linux/spi/spi.h> -#include <linux/delay.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include "addr-map.h" -#include "mfp-pxa910.h" -#include "pxa910.h" -#include "irqs.h" -#include "regs-usb.h" - -#include "common.h" - -#define TTCDKB_GPIO_EXT0(x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ - ((x < 16) ? x : 15))) -#define TTCDKB_GPIO_EXT1(x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ - ((x < 16) ? x : 15))) - -/* - * 16 board interrupts -- MAX7312 GPIO expander - * 16 board interrupts -- PCA9575 GPIO expander - * 24 board interrupts -- 88PM860x PMIC - */ -#define TTCDKB_NR_IRQS (MMP_NR_IRQS + 16 + 16 + 24) - -static unsigned long ttc_dkb_pin_config[] __initdata = { - /* UART2 */ - GPIO47_UART2_RXD, - GPIO48_UART2_TXD, - - /* DFI */ - DF_IO0_ND_IO0, - DF_IO1_ND_IO1, - DF_IO2_ND_IO2, - DF_IO3_ND_IO3, - DF_IO4_ND_IO4, - DF_IO5_ND_IO5, - DF_IO6_ND_IO6, - DF_IO7_ND_IO7, - DF_IO8_ND_IO8, - DF_IO9_ND_IO9, - DF_IO10_ND_IO10, - DF_IO11_ND_IO11, - DF_IO12_ND_IO12, - DF_IO13_ND_IO13, - DF_IO14_ND_IO14, - DF_IO15_ND_IO15, - DF_nCS0_SM_nCS2_nCS0, - DF_ALE_SM_WEn_ND_ALE, - DF_CLE_SM_OEn_ND_CLE, - DF_WEn_DF_WEn, - DF_REn_DF_REn, - DF_RDY0_DF_RDY0, -}; - -static struct pxa_gpio_platform_data pxa910_gpio_pdata = { - .irq_base = MMP_GPIO_TO_IRQ(0), -}; - -static struct mtd_partition ttc_dkb_onenand_partitions[] = { - { - .name = "bootloader", - .offset = 0, - .size = SZ_1M, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_8M, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = (SZ_2M + SZ_1M), - .mask_flags = 0, - }, { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = SZ_32M + SZ_16M, - .mask_flags = 0, - } -}; - -static struct onenand_platform_data ttc_dkb_onenand_info = { - .parts = ttc_dkb_onenand_partitions, - .nr_parts = ARRAY_SIZE(ttc_dkb_onenand_partitions), -}; - -static struct resource ttc_dkb_resource_onenand[] = { - [0] = { - .start = SMC_CS0_PHYS_BASE, - .end = SMC_CS0_PHYS_BASE + SZ_1M, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device ttc_dkb_device_onenand = { - .name = "onenand-flash", - .id = -1, - .resource = ttc_dkb_resource_onenand, - .num_resources = ARRAY_SIZE(ttc_dkb_resource_onenand), - .dev = { - .platform_data = &ttc_dkb_onenand_info, - }, -}; - -static struct platform_device *ttc_dkb_devices[] = { - &pxa910_device_gpio, - &pxa910_device_rtc, - &ttc_dkb_device_onenand, -}; - -static struct pca953x_platform_data max7312_data[] = { - { - .gpio_base = TTCDKB_GPIO_EXT0(0), - .irq_base = MMP_NR_IRQS, - }, -}; - -static struct pm860x_platform_data ttc_dkb_pm8607_info = { - .irq_base = IRQ_BOARD_START, -}; - -static struct i2c_board_info ttc_dkb_i2c_info[] = { - { - .type = "88PM860x", - .addr = 0x34, - .platform_data = &ttc_dkb_pm8607_info, - .irq = IRQ_PXA910_PMIC_INT, - }, - { - .type = "max7312", - .addr = 0x23, - .irq = MMP_GPIO_TO_IRQ(80), - .platform_data = &max7312_data, - }, -}; - -#if IS_ENABLED(CONFIG_USB_SUPPORT) -#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV_U2O) - -static struct mv_usb_platform_data ttc_usb_pdata = { - .vbus = NULL, - .mode = MV_USB_MODE_OTG, - .otg_force_a_bus_req = 1, - .phy_init = pxa_usb_phy_init, - .phy_deinit = pxa_usb_phy_deinit, - .set_vbus = NULL, -}; -#endif -#endif - -#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL) -static struct pxa3xx_nand_platform_data dkb_nand_info = {}; -#endif - -#if IS_ENABLED(CONFIG_MMP_DISP) -/* path config */ -#define CFG_IOPADMODE(iopad) (iopad) /* 0x0 ~ 0xd */ -#define SCLK_SOURCE_SELECT(x) (x << 30) /* 0x0 ~ 0x3 */ -/* link config */ -#define CFG_DUMBMODE(mode) (mode << 28) /* 0x0 ~ 0x6*/ -static struct mmp_mach_path_config dkb_disp_config[] = { - [0] = { - .name = "mmp-parallel", - .overlay_num = 2, - .output_type = PATH_OUT_PARALLEL, - .path_config = CFG_IOPADMODE(0x1) - | SCLK_SOURCE_SELECT(0x1), - .link_config = CFG_DUMBMODE(0x2), - }, -}; - -static struct mmp_mach_plat_info dkb_disp_info = { - .name = "mmp-disp", - .clk_name = "disp0", - .path_num = 1, - .paths = dkb_disp_config, -}; - -static struct mmp_buffer_driver_mach_info dkb_fb_info = { - .name = "mmp-fb", - .path_name = "mmp-parallel", - .overlay_id = 0, - .dmafetch_id = 1, - .default_pixfmt = PIXFMT_RGB565, -}; - -static void dkb_tpo_panel_power(int on) -{ - int err; - u32 spi_reset = mfp_to_gpio(MFP_PIN_GPIO106); - - if (on) { - err = gpio_request(spi_reset, "TPO_LCD_SPI_RESET"); - if (err) { - pr_err("failed to request GPIO for TPO LCD RESET\n"); - return; - } - gpio_direction_output(spi_reset, 0); - udelay(100); - gpio_set_value(spi_reset, 1); - gpio_free(spi_reset); - } else { - err = gpio_request(spi_reset, "TPO_LCD_SPI_RESET"); - if (err) { - pr_err("failed to request LCD RESET gpio\n"); - return; - } - gpio_set_value(spi_reset, 0); - gpio_free(spi_reset); - } -} - -static struct mmp_mach_panel_info dkb_tpo_panel_info = { - .name = "tpo-hvga", - .plat_path_name = "mmp-parallel", - .plat_set_onoff = dkb_tpo_panel_power, -}; - -static struct spi_board_info spi_board_info[] __initdata = { - { - .modalias = "tpo-hvga", - .platform_data = &dkb_tpo_panel_info, - .bus_num = 5, - } -}; - -static void __init add_disp(void) -{ - mmp_register_device(&pxa910_device_disp, - &dkb_disp_info, sizeof(dkb_disp_info)); - spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); - mmp_register_device(&pxa910_device_fb, - &dkb_fb_info, sizeof(dkb_fb_info)); - mmp_register_device(&pxa910_device_panel, - &dkb_tpo_panel_info, sizeof(dkb_tpo_panel_info)); -} -#endif - -static void __init ttc_dkb_init(void) -{ - mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config)); - - /* on-chip devices */ - pxa910_add_uart(1); -#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL) - pxa910_add_nand(&dkb_nand_info); -#endif - - /* off-chip devices */ - pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info)); - platform_device_add_data(&pxa910_device_gpio, &pxa910_gpio_pdata, - sizeof(struct pxa_gpio_platform_data)); - platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices)); - -#if IS_ENABLED(CONFIG_USB_SUPPORT) -#if IS_ENABLED(CONFIG_PHY_PXA_USB) - platform_device_register(&pxa168_device_usb_phy); -#endif - -#if IS_ENABLED(CONFIG_USB_MV_UDC) - pxa168_device_u2o.dev.platform_data = &ttc_usb_pdata; - platform_device_register(&pxa168_device_u2o); -#endif - -#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O) - pxa168_device_u2oehci.dev.platform_data = &ttc_usb_pdata; - platform_device_register(&pxa168_device_u2oehci); -#endif - -#if IS_ENABLED(CONFIG_USB_MV_OTG) - pxa168_device_u2ootg.dev.platform_data = &ttc_usb_pdata; - platform_device_register(&pxa168_device_u2ootg); -#endif -#endif - -#if IS_ENABLED(CONFIG_MMP_DISP) - add_disp(); -#endif -} - -MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") - .map_io = mmp_map_io, - .nr_irqs = TTCDKB_NR_IRQS, - .init_irq = pxa910_init_irq, - .init_time = pxa910_timer_init, - .init_machine = ttc_dkb_init, - .restart = mmp_restart, -MACHINE_END diff --git a/arch/arm/mach-mv78xx0/Kconfig b/arch/arm/mach-mv78xx0/Kconfig index da92f94494cc..9de3bbc09c3a 100644 --- a/arch/arm/mach-mv78xx0/Kconfig +++ b/arch/arm/mach-mv78xx0/Kconfig @@ -3,7 +3,7 @@ menuconfig ARCH_MV78XX0 bool "Marvell MV78xx0" depends on ARCH_MULTI_V5 depends on CPU_LITTLE_ENDIAN - depends on ATAGS && UNUSED_BOARD_FILES + depends on ATAGS select CPU_FEROCEON select GPIOLIB select MVEBU_MBUS @@ -15,18 +15,6 @@ menuconfig ARCH_MV78XX0 if ARCH_MV78XX0 -config MACH_DB78X00_BP - bool "Marvell DB-78x00-BP Development Board" - help - Say 'Y' here if you want your kernel to support the - Marvell DB-78x00-BP Development Board. - -config MACH_RD78X00_MASA - bool "Marvell RD-78x00-mASA Reference Design" - help - Say 'Y' here if you want your kernel to support the - Marvell RD-78x00-mASA Reference Design. - config MACH_TERASTATION_WXL bool "Buffalo WLX (Terastation Duo) NAS" help diff --git a/arch/arm/mach-mv78xx0/Makefile b/arch/arm/mach-mv78xx0/Makefile index 50aff70065f2..ddee6ae501bb 100644 --- a/arch/arm/mach-mv78xx0/Makefile +++ b/arch/arm/mach-mv78xx0/Makefile @@ -2,6 +2,4 @@ ccflags-y := -I$(srctree)/arch/arm/plat-orion/include obj-y += common.o mpp.o irq.o pcie.o -obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o -obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o obj-$(CONFIG_MACH_TERASTATION_WXL) += buffalo-wxl-setup.o diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c deleted file mode 100644 index da633a33a0c1..000000000000 --- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ /dev/null @@ -1,101 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-mv78xx0/db78x00-bp-setup.c - * - * Marvell DB-78x00-BP Development Board Setup - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/ata_platform.h> -#include <linux/mv643xx_eth.h> -#include <linux/ethtool.h> -#include <linux/i2c.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "mv78xx0.h" -#include "common.h" - -static struct mv643xx_eth_platform_data db78x00_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -static struct mv643xx_eth_platform_data db78x00_ge01_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(9), -}; - -static struct mv643xx_eth_platform_data db78x00_ge10_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(10), -}; - -static struct mv643xx_eth_platform_data db78x00_ge11_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(11), -}; - -static struct mv_sata_platform_data db78x00_sata_data = { - .n_ports = 2, -}; - -static struct i2c_board_info __initdata db78x00_i2c_rtc = { - I2C_BOARD_INFO("ds1338", 0x68), -}; - - -static void __init db78x00_init(void) -{ - /* - * Basic MV78xx0 setup. Needs to be called early. - */ - mv78xx0_init(); - - /* - * Partition on-chip peripherals between the two CPU cores. - */ - if (mv78xx0_core_index() == 0) { - mv78xx0_ehci0_init(); - mv78xx0_ehci1_init(); - mv78xx0_ehci2_init(); - mv78xx0_ge00_init(&db78x00_ge00_data); - mv78xx0_ge01_init(&db78x00_ge01_data); - mv78xx0_ge10_init(&db78x00_ge10_data); - mv78xx0_ge11_init(&db78x00_ge11_data); - mv78xx0_sata_init(&db78x00_sata_data); - mv78xx0_uart0_init(); - mv78xx0_uart2_init(); - mv78xx0_i2c_init(); - i2c_register_board_info(0, &db78x00_i2c_rtc, 1); - } else { - mv78xx0_uart1_init(); - mv78xx0_uart3_init(); - } -} - -static int __init db78x00_pci_init(void) -{ - if (machine_is_db78x00_bp()) { - /* - * Assign the x16 PCIe slot on the board to CPU core - * #0, and let CPU core #1 have the four x1 slots. - */ - if (mv78xx0_core_index() == 0) - mv78xx0_pcie_init(0, 1); - else - mv78xx0_pcie_init(1, 0); - } - - return 0; -} -subsys_initcall(db78x00_pci_init); - -MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board") - /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ - .atag_offset = 0x100, - .nr_irqs = MV78XX0_NR_IRQS, - .init_machine = db78x00_init, - .map_io = mv78xx0_map_io, - .init_early = mv78xx0_init_early, - .init_irq = mv78xx0_init_irq, - .init_time = mv78xx0_timer_init, - .restart = mv78xx0_restart, -MACHINE_END diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c deleted file mode 100644 index 80ca8b1a81de..000000000000 --- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +++ /dev/null @@ -1,86 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-mv78x00/rd78x00-masa-setup.c - * - * Marvell RD-78x00-mASA Development Board Setup - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/ata_platform.h> -#include <linux/mv643xx_eth.h> -#include <linux/ethtool.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "mv78xx0.h" -#include "common.h" - -static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(9), -}; - -static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = { -}; - -static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = { -}; - -static struct mv_sata_platform_data rd78x00_masa_sata_data = { - .n_ports = 2, -}; - -static void __init rd78x00_masa_init(void) -{ - /* - * Basic MV78x00 setup. Needs to be called early. - */ - mv78xx0_init(); - - /* - * Partition on-chip peripherals between the two CPU cores. - */ - if (mv78xx0_core_index() == 0) { - mv78xx0_ehci0_init(); - mv78xx0_ehci1_init(); - mv78xx0_ge00_init(&rd78x00_masa_ge00_data); - mv78xx0_ge10_init(&rd78x00_masa_ge10_data); - mv78xx0_sata_init(&rd78x00_masa_sata_data); - mv78xx0_uart0_init(); - mv78xx0_uart2_init(); - } else { - mv78xx0_ehci2_init(); - mv78xx0_ge01_init(&rd78x00_masa_ge01_data); - mv78xx0_ge11_init(&rd78x00_masa_ge11_data); - mv78xx0_uart1_init(); - mv78xx0_uart3_init(); - } -} - -static int __init rd78x00_pci_init(void) -{ - /* - * Assign all PCIe devices to CPU core #0. - */ - if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0) - mv78xx0_pcie_init(1, 1); - - return 0; -} -subsys_initcall(rd78x00_pci_init); - -MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") - /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ - .atag_offset = 0x100, - .nr_irqs = MV78XX0_NR_IRQS, - .init_machine = rd78x00_masa_init, - .map_io = mv78xx0_map_io, - .init_early = mv78xx0_init_early, - .init_irq = mv78xx0_init_irq, - .init_time = mv78xx0_timer_init, - .restart = mv78xx0_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 7ec7ada287e0..8df9a4de0e79 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -19,19 +19,6 @@ menu "TI OMAP1 specific features" comment "OMAP Core Type" -config ARCH_OMAP730 - depends on ARCH_MULTI_V5 - bool "OMAP730 Based System" - select ARCH_OMAP_OTG - select CPU_ARM926T - select OMAP_MPU_TIMER - -config ARCH_OMAP850 - depends on ARCH_MULTI_V5 - bool "OMAP850 Based System" - select ARCH_OMAP_OTG - select CPU_ARM926T - config ARCH_OMAP15XX depends on ARCH_MULTI_V4T default y @@ -126,37 +113,6 @@ config ARCH_OMAP_OTG comment "OMAP Board Type" -config MACH_OMAP_INNOVATOR - bool "TI Innovator" - depends on ARCH_OMAP15XX || ARCH_OMAP16XX - depends on UNUSED_BOARD_FILES - help - TI OMAP 1510 or 1610 Innovator board support. Say Y here if you - have such a board. - -config MACH_OMAP_H2 - bool "TI H2 Support" - depends on ARCH_OMAP16XX - depends on UNUSED_BOARD_FILES - help - TI OMAP 1610/1611B H2 board support. Say Y here if you have such - a board. - -config MACH_OMAP_H3 - bool "TI H3 Support" - depends on ARCH_OMAP16XX - depends on UNUSED_BOARD_FILES - help - TI OMAP 1710 H3 board support. Say Y here if you have such - a board. - -config MACH_HERALD - bool "HTC Herald" - depends on ARCH_OMAP850 - depends on UNUSED_BOARD_FILES - help - HTC Herald smartphone support (AKA T-Mobile Wing, ...) - config MACH_OMAP_OSK bool "TI OSK Support" depends on ARCH_OMAP16XX @@ -164,31 +120,6 @@ config MACH_OMAP_OSK TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here if you have such a board. -config OMAP_OSK_MISTRAL - bool "Mistral QVGA board Support" - depends on MACH_OMAP_OSK - depends on UNUSED_BOARD_FILES - help - The OSK supports an optional add-on board with a Quarter-VGA - touchscreen, PDA-ish buttons, a resume button, bicolor LED, - and camera connector. Say Y here if you have this board. - -config MACH_OMAP_PERSEUS2 - bool "TI Perseus2" - depends on ARCH_OMAP730 - depends on UNUSED_BOARD_FILES - help - Support for TI OMAP 730 Perseus2 board. Say Y here if you have such - a board. - -config MACH_OMAP_FSAMPLE - bool "TI F-Sample" - depends on ARCH_OMAP730 - depends on UNUSED_BOARD_FILES - help - Support for TI OMAP 850 F-Sample board. Say Y here if you have such - a board. - config MACH_OMAP_PALMTE bool "Palm Tungsten E" depends on ARCH_OMAP15XX @@ -198,26 +129,6 @@ config MACH_OMAP_PALMTE http://palmtelinux.sourceforge.net/ for more information. Say Y here if you have this PDA model, say N otherwise. -config MACH_OMAP_PALMZ71 - bool "Palm Zire71" - depends on ARCH_OMAP15XX - depends on UNUSED_BOARD_FILES - help - Support for the Palm Zire71 PDA. To boot the kernel, - you'll need a PalmOS compatible bootloader; check out - http://hackndev.com/palm/z71 for more information. - Say Y here if you have such a PDA, say N otherwise. - -config MACH_OMAP_PALMTT - bool "Palm Tungsten|T" - depends on ARCH_OMAP15XX - depends on UNUSED_BOARD_FILES - help - Support for the Palm Tungsten|T PDA. To boot the kernel, you'll - need a PalmOS compatible bootloader (Garux); check out - http://garux.sourceforge.net/ for more information. - Say Y here if you have this PDA model, say N otherwise. - config MACH_SX1 bool "Siemens SX1" depends on ARCH_OMAP15XX @@ -249,16 +160,6 @@ config MACH_AMS_DELTA Support for the Amstrad E3 (codename Delta) videophone. Say Y here if you have such a device. -config MACH_OMAP_GENERIC - bool "Generic OMAP board" - depends on ARCH_OMAP15XX || ARCH_OMAP16XX - depends on UNUSED_BOARD_FILES - help - Support for generic OMAP-1510, 1610 or 1710 board with - no FPGA. Can be used as template for porting Linux to - custom OMAP boards. Say Y here if you have a custom - board. - endmenu endif diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 0615cb0ba580..d9e251ea4773 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -29,31 +29,13 @@ usb-fs-$(CONFIG_USB_SUPPORT) := usb.o obj-y += $(usb-fs-m) $(usb-fs-y) # Specific board support -obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o board-h2-mmc.o \ - board-nand.o -obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o -obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o -obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o board-nand.o -obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o board-nand.o obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o -obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o board-h3-mmc.o \ - board-nand.o obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o -obj-$(CONFIG_MACH_OMAP_PALMZ71) += board-palmz71.o -obj-$(CONFIG_MACH_OMAP_PALMTT) += board-palmtt.o obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o ams-delta-fiq.o \ ams-delta-fiq-handler.o obj-$(CONFIG_MACH_SX1) += board-sx1.o board-sx1-mmc.o -obj-$(CONFIG_MACH_HERALD) += board-htcherald.o - -ifeq ($(CONFIG_ARCH_OMAP15XX),y) -# Innovator-1510 FPGA -obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o -endif # GPIO -obj-$(CONFIG_ARCH_OMAP730) += gpio7xx.o -obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 651c28d81132..0f67ac4c6fd2 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -871,7 +871,7 @@ static void __init ams_delta_init_late(void) static void __init ams_delta_map_io(void) { - omap15xx_map_io(); + omap1_map_io(); iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc)); } diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c deleted file mode 100644 index f21e15c7b973..000000000000 --- a/arch/arm/mach-omap1/board-fsample.c +++ /dev/null @@ -1,366 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-fsample.c - * - * Modified from board-perseus2.c - * - * Original OMAP730 support by Jean Pihet <j-pihet@ti.com> - * Updated for 2.6 by Kevin Hilman <kjh@hilman.org> - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/platnand.h> -#include <linux/mtd/physmap.h> -#include <linux/input.h> -#include <linux/smc91x.h> -#include <linux/omapfb.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <linux/soc/ti/omap1-io.h> -#include <linux/platform_data/keypad-omap.h> -#include "tc.h" - -#include "mux.h" -#include "flash.h" -#include "hardware.h" -#include "iomap.h" -#include "common.h" -#include "fpga.h" - -/* fsample is pretty close to p2-sample */ - -#define fsample_cpld_read(reg) __raw_readb(reg) -#define fsample_cpld_write(val, reg) __raw_writeb(val, reg) - -#define FSAMPLE_CPLD_BASE 0xE8100000 -#define FSAMPLE_CPLD_SIZE SZ_4K -#define FSAMPLE_CPLD_START 0x05080000 - -#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00) -#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02) -#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02) -#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04) -#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06) -#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06) - -#define FSAMPLE_CPLD_BIT_BT_RESET 0 -#define FSAMPLE_CPLD_BIT_LCD_RESET 1 -#define FSAMPLE_CPLD_BIT_CAM_PWDN 2 -#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3 -#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4 -#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5 -#define FSAMPLE_CPLD_BIT_BACKLIGHT 6 -#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7 -#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8 -#define FSAMPLE_CPLD_BIT_OTG_RESET 9 - -#define fsample_cpld_set(bit) \ - fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR) - -#define fsample_cpld_clear(bit) \ - fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) - -static const unsigned int fsample_keymap[] = { - KEY(0, 0, KEY_UP), - KEY(1, 0, KEY_RIGHT), - KEY(2, 0, KEY_LEFT), - KEY(3, 0, KEY_DOWN), - KEY(4, 0, KEY_ENTER), - KEY(0, 1, KEY_F10), - KEY(1, 1, KEY_SEND), - KEY(2, 1, KEY_END), - KEY(3, 1, KEY_VOLUMEDOWN), - KEY(4, 1, KEY_VOLUMEUP), - KEY(5, 1, KEY_RECORD), - KEY(0, 2, KEY_F9), - KEY(1, 2, KEY_3), - KEY(2, 2, KEY_6), - KEY(3, 2, KEY_9), - KEY(4, 2, KEY_KPDOT), - KEY(0, 3, KEY_BACK), - KEY(1, 3, KEY_2), - KEY(2, 3, KEY_5), - KEY(3, 3, KEY_8), - KEY(4, 3, KEY_0), - KEY(5, 3, KEY_KPSLASH), - KEY(0, 4, KEY_HOME), - KEY(1, 4, KEY_1), - KEY(2, 4, KEY_4), - KEY(3, 4, KEY_7), - KEY(4, 4, KEY_KPASTERISK), - KEY(5, 4, KEY_POWER), -}; - -static struct smc91x_platdata smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, - .leda = RPC_LED_100_10, - .ledb = RPC_LED_TX_RX, -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */ - .end = H2P2_DBG_FPGA_ETHR_START + 0xf, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = INT_7XX_MPU_EXT_NIRQ, - .end = 0, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -static void __init fsample_init_smc91x(void) -{ - __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET); - mdelay(50); - __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1, - H2P2_DBG_FPGA_LAN_RESET); - mdelay(50); -} - -static struct mtd_partition nor_partitions[] = { - /* bootloader (U-Boot, etc) in first sector */ - { - .name = "bootloader", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* bootloader params in the next sector */ - { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = 0, - }, - /* kernel */ - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - .mask_flags = 0 - }, - /* rest of flash is a file system */ - { - .name = "rootfs", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - }, -}; - -static struct physmap_flash_data nor_data = { - .width = 2, - .set_vpp = omap1_set_vpp, - .parts = nor_partitions, - .nr_parts = ARRAY_SIZE(nor_partitions), -}; - -static struct resource nor_resource = { - .start = OMAP_CS0_PHYS, - .end = OMAP_CS0_PHYS + SZ_32M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device nor_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &nor_data, - }, - .num_resources = 1, - .resource = &nor_resource, -}; - -#define FSAMPLE_NAND_RB_GPIO_PIN 62 - -static int nand_dev_ready(struct nand_chip *chip) -{ - return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN); -} - -static struct platform_nand_data nand_data = { - .chip = { - .nr_chips = 1, - .chip_offset = 0, - .options = NAND_SAMSUNG_LP_OPTIONS, - }, - .ctrl = { - .cmd_ctrl = omap1_nand_cmd_ctl, - .dev_ready = nand_dev_ready, - }, -}; - -static struct resource nand_resource = { - .start = OMAP_CS3_PHYS, - .end = OMAP_CS3_PHYS + SZ_4K - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device nand_device = { - .name = "gen_nand", - .id = 0, - .dev = { - .platform_data = &nand_data, - }, - .num_resources = 1, - .resource = &nand_resource, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .dev = { - .platform_data = &smc91x_info, - }, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static struct resource kp_resources[] = { - [0] = { - .start = INT_7XX_MPUIO_KEYPAD, - .end = INT_7XX_MPUIO_KEYPAD, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct matrix_keymap_data fsample_keymap_data = { - .keymap = fsample_keymap, - .keymap_size = ARRAY_SIZE(fsample_keymap), -}; - -static struct omap_kp_platform_data kp_data = { - .rows = 8, - .cols = 8, - .keymap_data = &fsample_keymap_data, - .delay = 4, -}; - -static struct platform_device kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &kp_data, - }, - .num_resources = ARRAY_SIZE(kp_resources), - .resource = kp_resources, -}; - -static struct platform_device *devices[] __initdata = { - &nor_device, - &nand_device, - &smc91x_device, - &kp_device, -}; - -static const struct omap_lcd_config fsample_lcd_config = { - .ctrl_name = "internal", -}; - -static void __init omap_fsample_init(void) -{ - /* Early, board-dependent init */ - - /* - * Hold GSM Reset until needed - */ - omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); - - /* - * UARTs -> done automagically by 8250 driver - */ - - /* - * CSx timings, GPIO Mux ... setup - */ - - /* Flash: CS0 timings setup */ - omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); - omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); - - /* - * Ethernet support through the debug board - * CS1 timings setup - */ - omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); - omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); - - /* - * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, - * It is used as the Ethernet controller interrupt - */ - omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, - OMAP7XX_IO_CONF_9); - - fsample_init_smc91x(); - - BUG_ON(gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0); - gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN); - - omap_cfg_reg(L3_1610_FLASH_CS2B_OE); - omap_cfg_reg(M8_1610_FLASH_CS2B_WE); - - /* Mux pins for keypad */ - omap_cfg_reg(E2_7XX_KBR0); - omap_cfg_reg(J7_7XX_KBR1); - omap_cfg_reg(E1_7XX_KBR2); - omap_cfg_reg(F3_7XX_KBR3); - omap_cfg_reg(D2_7XX_KBR4); - omap_cfg_reg(C2_7XX_KBC0); - omap_cfg_reg(D3_7XX_KBC1); - omap_cfg_reg(E4_7XX_KBC2); - omap_cfg_reg(F4_7XX_KBC3); - omap_cfg_reg(E3_7XX_KBC4); - - platform_add_devices(devices, ARRAY_SIZE(devices)); - - omap_serial_init(); - omap_register_i2c_bus(1, 100, NULL, 0); - - omapfb_set_lcd_config(&fsample_lcd_config); -} - -/* Only FPGA needs to be mapped here. All others are done with ioremap */ -static struct map_desc omap_fsample_io_desc[] __initdata = { - { - .virtual = H2P2_DBG_FPGA_BASE, - .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START), - .length = H2P2_DBG_FPGA_SIZE, - .type = MT_DEVICE - }, - { - .virtual = FSAMPLE_CPLD_BASE, - .pfn = __phys_to_pfn(FSAMPLE_CPLD_START), - .length = FSAMPLE_CPLD_SIZE, - .type = MT_DEVICE - } -}; - -static void __init omap_fsample_map_io(void) -{ - omap15xx_map_io(); - iotable_init(omap_fsample_io_desc, - ARRAY_SIZE(omap_fsample_io_desc)); -} - -MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") -/* Maintainer: Brian Swetland <swetland@google.com> */ - .atag_offset = 0x100, - .map_io = omap_fsample_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = omap_fsample_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c deleted file mode 100644 index 3b2bcaf4bb01..000000000000 --- a/arch/arm/mach-omap1/board-generic.c +++ /dev/null @@ -1,85 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-generic.c - * - * Modified from board-innovator1510.c - * - * Code for generic OMAP board. Should work on many OMAP systems where - * the device drivers take care of all the necessary hardware initialization. - * Do not put any board specific code to this file; create a new machine - * type if you need custom low-level initializations. - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "hardware.h" -#include "mux.h" -#include "usb.h" -#include "common.h" - -/* assume no Mini-AB port */ - -#ifdef CONFIG_ARCH_OMAP15XX -static struct omap_usb_config generic1510_usb_config __initdata = { - .register_host = 1, - .register_dev = 1, - .hmc_mode = 16, - .pins[0] = 3, -}; -#endif - -#if defined(CONFIG_ARCH_OMAP16XX) -static struct omap_usb_config generic1610_usb_config __initdata = { -#ifdef CONFIG_USB_OTG - .otg = 1, -#endif - .register_host = 1, - .register_dev = 1, - .hmc_mode = 16, - .pins[0] = 6, -}; -#endif - -static void __init omap_generic_init(void) -{ -#ifdef CONFIG_ARCH_OMAP15XX - if (cpu_is_omap15xx()) { - /* mux pins for uarts */ - omap_cfg_reg(UART1_TX); - omap_cfg_reg(UART1_RTS); - omap_cfg_reg(UART2_TX); - omap_cfg_reg(UART2_RTS); - omap_cfg_reg(UART3_TX); - omap_cfg_reg(UART3_RX); - - omap1_usb_init(&generic1510_usb_config); - } -#endif -#if defined(CONFIG_ARCH_OMAP16XX) - if (!cpu_is_omap1510()) { - omap1_usb_init(&generic1610_usb_config); - } -#endif - - omap_serial_init(); - omap_register_i2c_bus(1, 100, NULL, 0); -} - -MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") - /* Maintainer: Tony Lindgren <tony@atomide.com> */ - .atag_offset = 0x100, - .map_io = omap16xx_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = omap_generic_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c deleted file mode 100644 index 06c5404078aa..000000000000 --- a/arch/arm/mach-omap1/board-h2-mmc.c +++ /dev/null @@ -1,74 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-h2-mmc.c - * - * Copyright (C) 2007 Instituto Nokia de Tecnologia - INdT - * Author: Felipe Balbi <felipe.lima@indt.org.br> - * - * This code is based on linux/arch/arm/mach-omap2/board-n800-mmc.c, which is: - * Copyright (C) 2006 Nokia Corporation - */ -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/platform_data/gpio-omap.h> -#include <linux/mfd/tps65010.h> - -#include "board-h2.h" -#include "mmc.h" - -#if IS_ENABLED(CONFIG_MMC_OMAP) - -static int mmc_set_power(struct device *dev, int slot, int power_on, - int vdd) -{ - gpio_set_value(H2_TPS_GPIO_MMC_PWR_EN, power_on); - return 0; -} - -static int mmc_late_init(struct device *dev) -{ - int ret = gpio_request(H2_TPS_GPIO_MMC_PWR_EN, "MMC power"); - if (ret < 0) - return ret; - - gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 0); - - return ret; -} - -static void mmc_cleanup(struct device *dev) -{ - gpio_free(H2_TPS_GPIO_MMC_PWR_EN); -} - -/* - * H2 could use the following functions tested: - * - mmc_get_cover_state that uses OMAP_MPUIO(1) - * - mmc_get_wp that uses OMAP_MPUIO(3) - */ -static struct omap_mmc_platform_data mmc1_data = { - .nr_slots = 1, - .init = mmc_late_init, - .cleanup = mmc_cleanup, - .slots[0] = { - .set_power = mmc_set_power, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .name = "mmcblk", - }, -}; - -static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC]; - -void __init h2_mmc_init(void) -{ - mmc_data[0] = &mmc1_data; - omap1_init_mmc(mmc_data, OMAP16XX_NR_MMC); -} - -#else - -void __init h2_mmc_init(void) -{ -} - -#endif diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c deleted file mode 100644 index f28a4c3ea501..000000000000 --- a/arch/arm/mach-omap1/board-h2.c +++ /dev/null @@ -1,448 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-h2.c - * - * Board specific inits for OMAP-1610 H2 - * - * Copyright (C) 2001 RidgeRun, Inc. - * Author: Greg Lonnon <glonnon@ridgerun.com> - * - * Copyright (C) 2002 MontaVista Software, Inc. - * - * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 - * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> - * - * H2 specific changes and cleanup - * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com> - */ -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/i2c.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/platnand.h> -#include <linux/mtd/physmap.h> -#include <linux/input.h> -#include <linux/mfd/tps65010.h> -#include <linux/smc91x.h> -#include <linux/omapfb.h> -#include <linux/omap-dma.h> -#include <linux/platform_data/gpio-omap.h> -#include <linux/platform_data/keypad-omap.h> -#include <linux/leds.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "tc.h" -#include "mux.h" -#include "flash.h" -#include "hardware.h" -#include "usb.h" -#include "common.h" -#include "board-h2.h" - -/* The first 16 SoC GPIO lines are on this GPIO chip */ -#define OMAP_GPIO_LABEL "gpio-0-15" - -/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ -#define OMAP1610_ETHR_START 0x04000300 - -static const unsigned int h2_keymap[] = { - KEY(0, 0, KEY_LEFT), - KEY(1, 0, KEY_RIGHT), - KEY(2, 0, KEY_3), - KEY(3, 0, KEY_F10), - KEY(4, 0, KEY_F5), - KEY(5, 0, KEY_9), - KEY(0, 1, KEY_DOWN), - KEY(1, 1, KEY_UP), - KEY(2, 1, KEY_2), - KEY(3, 1, KEY_F9), - KEY(4, 1, KEY_F7), - KEY(5, 1, KEY_0), - KEY(0, 2, KEY_ENTER), - KEY(1, 2, KEY_6), - KEY(2, 2, KEY_1), - KEY(3, 2, KEY_F2), - KEY(4, 2, KEY_F6), - KEY(5, 2, KEY_HOME), - KEY(0, 3, KEY_8), - KEY(1, 3, KEY_5), - KEY(2, 3, KEY_F12), - KEY(3, 3, KEY_F3), - KEY(4, 3, KEY_F8), - KEY(5, 3, KEY_END), - KEY(0, 4, KEY_7), - KEY(1, 4, KEY_4), - KEY(2, 4, KEY_F11), - KEY(3, 4, KEY_F1), - KEY(4, 4, KEY_F4), - KEY(5, 4, KEY_ESC), - KEY(0, 5, KEY_F13), - KEY(1, 5, KEY_F14), - KEY(2, 5, KEY_F15), - KEY(3, 5, KEY_F16), - KEY(4, 5, KEY_SLEEP), -}; - -static struct mtd_partition h2_nor_partitions[] = { - /* bootloader (U-Boot, etc) in first sector */ - { - .name = "bootloader", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* bootloader params in the next sector */ - { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = 0, - }, - /* kernel */ - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - .mask_flags = 0 - }, - /* file system */ - { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - } -}; - -static struct physmap_flash_data h2_nor_data = { - .width = 2, - .set_vpp = omap1_set_vpp, - .parts = h2_nor_partitions, - .nr_parts = ARRAY_SIZE(h2_nor_partitions), -}; - -static struct resource h2_nor_resource = { - /* This is on CS3, wherever it's mapped */ - .flags = IORESOURCE_MEM, -}; - -static struct platform_device h2_nor_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &h2_nor_data, - }, - .num_resources = 1, - .resource = &h2_nor_resource, -}; - -static struct mtd_partition h2_nand_partitions[] = { -#if 0 - /* REVISIT: enable these partitions if you make NAND BOOT - * work on your H2 (rev C or newer); published versions of - * x-load only support P2 and H3. - */ - { - .name = "xloader", - .offset = 0, - .size = 64 * 1024, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "bootloader", - .offset = MTDPART_OFS_APPEND, - .size = 256 * 1024, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = 192 * 1024, - }, - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = 2 * SZ_1M, - }, -#endif - { - .name = "filesystem", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - }, -}; - -#define H2_NAND_RB_GPIO_PIN 62 - -static int h2_nand_dev_ready(struct nand_chip *chip) -{ - return gpio_get_value(H2_NAND_RB_GPIO_PIN); -} - -static struct platform_nand_data h2_nand_platdata = { - .chip = { - .nr_chips = 1, - .chip_offset = 0, - .nr_partitions = ARRAY_SIZE(h2_nand_partitions), - .partitions = h2_nand_partitions, - .options = NAND_SAMSUNG_LP_OPTIONS, - }, - .ctrl = { - .cmd_ctrl = omap1_nand_cmd_ctl, - .dev_ready = h2_nand_dev_ready, - }, -}; - -static struct resource h2_nand_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device h2_nand_device = { - .name = "gen_nand", - .id = 0, - .dev = { - .platform_data = &h2_nand_platdata, - }, - .num_resources = 1, - .resource = &h2_nand_resource, -}; - -static struct smc91x_platdata h2_smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, - .leda = RPC_LED_100_10, - .ledb = RPC_LED_TX_RX, -}; - -static struct resource h2_smc91x_resources[] = { - [0] = { - .start = OMAP1610_ETHR_START, /* Physical */ - .end = OMAP1610_ETHR_START + 0xf, - .flags = IORESOURCE_MEM, - }, - [1] = { - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - }, -}; - -static struct platform_device h2_smc91x_device = { - .name = "smc91x", - .id = 0, - .dev = { - .platform_data = &h2_smc91x_info, - }, - .num_resources = ARRAY_SIZE(h2_smc91x_resources), - .resource = h2_smc91x_resources, -}; - -static struct resource h2_kp_resources[] = { - [0] = { - .start = INT_KEYBOARD, - .end = INT_KEYBOARD, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct matrix_keymap_data h2_keymap_data = { - .keymap = h2_keymap, - .keymap_size = ARRAY_SIZE(h2_keymap), -}; - -static struct omap_kp_platform_data h2_kp_data = { - .rows = 8, - .cols = 8, - .keymap_data = &h2_keymap_data, - .rep = true, - .delay = 9, - .dbounce = true, -}; - -static struct platform_device h2_kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &h2_kp_data, - }, - .num_resources = ARRAY_SIZE(h2_kp_resources), - .resource = h2_kp_resources, -}; - -static const struct gpio_led h2_gpio_led_pins[] = { - { - .name = "h2:red", - .default_trigger = "heartbeat", - .gpio = 3, - }, - { - .name = "h2:green", - .default_trigger = "cpu0", - .gpio = OMAP_MPUIO(4), - }, -}; - -static struct gpio_led_platform_data h2_gpio_led_data = { - .leds = h2_gpio_led_pins, - .num_leds = ARRAY_SIZE(h2_gpio_led_pins), -}; - -static struct platform_device h2_gpio_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &h2_gpio_led_data, - }, -}; - -static struct platform_device *h2_devices[] __initdata = { - &h2_nor_device, - &h2_nand_device, - &h2_smc91x_device, - &h2_kp_device, - &h2_gpio_leds, -}; - -static void __init h2_init_smc91x(void) -{ - if (gpio_request(0, "SMC91x irq") < 0) { - printk("Error requesting gpio 0 for smc91x irq\n"); - return; - } -} - -static int tps_setup(struct i2c_client *client, void *context) -{ - if (!IS_BUILTIN(CONFIG_TPS65010)) - return -ENOSYS; - - tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V | - TPS_LDO1_ENABLE | TPS_VLDO1_3_0V); - - return 0; -} - -static struct tps65010_board tps_board = { - .base = H2_TPS_GPIO_BASE, - .outmask = 0x0f, - .setup = tps_setup, -}; - -static struct i2c_board_info __initdata h2_i2c_board_info[] = { - { - I2C_BOARD_INFO("tps65010", 0x48), - .platform_data = &tps_board, - }, { - .type = "isp1301_omap", - .addr = 0x2d, - .dev_name = "isp1301", - }, -}; - -static struct gpiod_lookup_table isp1301_gpiod_table = { - .dev_id = "isp1301", - .table = { - /* Active low since the irq triggers on falling edge */ - GPIO_LOOKUP(OMAP_GPIO_LABEL, 2, - NULL, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct omap_usb_config h2_usb_config __initdata = { - /* usb1 has a Mini-AB port and external isp1301 transceiver */ - .otg = 2, - -#if IS_ENABLED(CONFIG_USB_OMAP) - .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */ - /* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */ -#elif IS_ENABLED(CONFIG_USB_OHCI_HCD) - /* needs OTG cable, or NONSTANDARD (B-to-MiniB) */ - .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */ -#endif - - .pins[1] = 3, -}; - -static const struct omap_lcd_config h2_lcd_config __initconst = { - .ctrl_name = "internal", -}; - -static void __init h2_init(void) -{ - h2_init_smc91x(); - - /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped - * to address 0 by a dip switch), NAND on CS2B. The NAND driver will - * notice whether a NAND chip is enabled at probe time. - * - * FIXME revC boards (and H3) support NAND-boot, with a dip switch to - * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try - * detecting that in code here, to avoid probing every possible flash - * configuration... - */ - h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys(); - h2_nor_resource.end += SZ_32M - 1; - - h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS; - h2_nand_resource.end += SZ_4K - 1; - BUG_ON(gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0); - gpio_direction_input(H2_NAND_RB_GPIO_PIN); - - gpiod_add_lookup_table(&isp1301_gpiod_table); - - omap_cfg_reg(L3_1610_FLASH_CS2B_OE); - omap_cfg_reg(M8_1610_FLASH_CS2B_WE); - - /* MMC: card detect and WP */ - /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ - omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ - - /* Mux pins for keypad */ - omap_cfg_reg(F18_1610_KBC0); - omap_cfg_reg(D20_1610_KBC1); - omap_cfg_reg(D19_1610_KBC2); - omap_cfg_reg(E18_1610_KBC3); - omap_cfg_reg(C21_1610_KBC4); - omap_cfg_reg(G18_1610_KBR0); - omap_cfg_reg(F19_1610_KBR1); - omap_cfg_reg(H14_1610_KBR2); - omap_cfg_reg(E20_1610_KBR3); - omap_cfg_reg(E19_1610_KBR4); - omap_cfg_reg(N19_1610_KBR5); - - /* GPIO based LEDs */ - omap_cfg_reg(P18_1610_GPIO3); - omap_cfg_reg(MPUIO4); - - h2_smc91x_resources[1].start = gpio_to_irq(0); - h2_smc91x_resources[1].end = gpio_to_irq(0); - platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); - omap_serial_init(); - - /* ISP1301 IRQ wired at M14 */ - omap_cfg_reg(M14_1510_GPIO2); - h2_i2c_board_info[0].irq = gpio_to_irq(58); - omap_register_i2c_bus(1, 100, h2_i2c_board_info, - ARRAY_SIZE(h2_i2c_board_info)); - omap1_usb_init(&h2_usb_config); - h2_mmc_init(); - - omapfb_set_lcd_config(&h2_lcd_config); -} - -MACHINE_START(OMAP_H2, "TI-H2") - /* Maintainer: Imre Deak <imre.deak@nokia.com> */ - .atag_offset = 0x100, - .map_io = omap16xx_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = h2_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-h2.h b/arch/arm/mach-omap1/board-h2.h deleted file mode 100644 index 315e2662547e..000000000000 --- a/arch/arm/mach-omap1/board-h2.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * arch/arm/mach-omap1/board-h2.h - * - * Hardware definitions for TI OMAP1610 H2 board. - * - * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP_H2_H -#define __ASM_ARCH_OMAP_H2_H - -#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) -# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3) - -extern void h2_mmc_init(void); - -#endif /* __ASM_ARCH_OMAP_H2_H */ - diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c deleted file mode 100644 index f595bd4f5024..000000000000 --- a/arch/arm/mach-omap1/board-h3-mmc.c +++ /dev/null @@ -1,64 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-h3-mmc.c - * - * Copyright (C) 2007 Instituto Nokia de Tecnologia - INdT - * Author: Felipe Balbi <felipe.lima@indt.org.br> - * - * This code is based on linux/arch/arm/mach-omap2/board-n800-mmc.c, which is: - * Copyright (C) 2006 Nokia Corporation - */ -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <linux/mfd/tps65010.h> - -#include "common.h" -#include "board-h3.h" -#include "mmc.h" - -#if IS_ENABLED(CONFIG_MMC_OMAP) - -static int mmc_set_power(struct device *dev, int slot, int power_on, - int vdd) -{ - gpio_set_value(H3_TPS_GPIO_MMC_PWR_EN, power_on); - return 0; -} - -/* - * H3 could use the following functions tested: - * - mmc_get_cover_state that uses OMAP_MPUIO(1) - * - mmc_get_wp that maybe uses OMAP_MPUIO(3) - */ -static struct omap_mmc_platform_data mmc1_data = { - .nr_slots = 1, - .slots[0] = { - .set_power = mmc_set_power, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .name = "mmcblk", - }, -}; - -static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC]; - -void __init h3_mmc_init(void) -{ - int ret; - - ret = gpio_request(H3_TPS_GPIO_MMC_PWR_EN, "MMC power"); - if (ret < 0) - return; - gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 0); - - mmc_data[0] = &mmc1_data; - omap1_init_mmc(mmc_data, OMAP16XX_NR_MMC); -} - -#else - -void __init h3_mmc_init(void) -{ -} - -#endif diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c deleted file mode 100644 index 1e4c57710fcc..000000000000 --- a/arch/arm/mach-omap1/board-h3.c +++ /dev/null @@ -1,455 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-h3.c - * - * This file contains OMAP1710 H3 specific code. - * - * Copyright (C) 2004 Texas Instruments, Inc. - * Copyright (C) 2002 MontaVista Software, Inc. - * Copyright (C) 2001 RidgeRun, Inc. - * Author: RidgeRun, Inc. - * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com - */ -#include <linux/gpio.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/major.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/errno.h> -#include <linux/workqueue.h> -#include <linux/i2c.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/platnand.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/input.h> -#include <linux/spi/spi.h> -#include <linux/mfd/tps65010.h> -#include <linux/smc91x.h> -#include <linux/omapfb.h> -#include <linux/platform_data/gpio-omap.h> -#include <linux/platform_data/keypad-omap.h> -#include <linux/omap-dma.h> -#include <linux/leds.h> - -#include <asm/setup.h> -#include <asm/page.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "tc.h" -#include "mux.h" -#include "flash.h" -#include "hardware.h" -#include "irqs.h" -#include "usb.h" -#include "common.h" -#include "board-h3.h" - -/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ -#define OMAP1710_ETHR_START 0x04000300 - -#define H3_TS_GPIO 48 - -static const unsigned int h3_keymap[] = { - KEY(0, 0, KEY_LEFT), - KEY(1, 0, KEY_RIGHT), - KEY(2, 0, KEY_3), - KEY(3, 0, KEY_F10), - KEY(4, 0, KEY_F5), - KEY(5, 0, KEY_9), - KEY(0, 1, KEY_DOWN), - KEY(1, 1, KEY_UP), - KEY(2, 1, KEY_2), - KEY(3, 1, KEY_F9), - KEY(4, 1, KEY_F7), - KEY(5, 1, KEY_0), - KEY(0, 2, KEY_ENTER), - KEY(1, 2, KEY_6), - KEY(2, 2, KEY_1), - KEY(3, 2, KEY_F2), - KEY(4, 2, KEY_F6), - KEY(5, 2, KEY_HOME), - KEY(0, 3, KEY_8), - KEY(1, 3, KEY_5), - KEY(2, 3, KEY_F12), - KEY(3, 3, KEY_F3), - KEY(4, 3, KEY_F8), - KEY(5, 3, KEY_END), - KEY(0, 4, KEY_7), - KEY(1, 4, KEY_4), - KEY(2, 4, KEY_F11), - KEY(3, 4, KEY_F1), - KEY(4, 4, KEY_F4), - KEY(5, 4, KEY_ESC), - KEY(0, 5, KEY_F13), - KEY(1, 5, KEY_F14), - KEY(2, 5, KEY_F15), - KEY(3, 5, KEY_F16), - KEY(4, 5, KEY_SLEEP), -}; - - -static struct mtd_partition nor_partitions[] = { - /* bootloader (U-Boot, etc) in first sector */ - { - .name = "bootloader", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* bootloader params in the next sector */ - { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = 0, - }, - /* kernel */ - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - .mask_flags = 0 - }, - /* file system */ - { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - } -}; - -static struct physmap_flash_data nor_data = { - .width = 2, - .set_vpp = omap1_set_vpp, - .parts = nor_partitions, - .nr_parts = ARRAY_SIZE(nor_partitions), -}; - -static struct resource nor_resource = { - /* This is on CS3, wherever it's mapped */ - .flags = IORESOURCE_MEM, -}; - -static struct platform_device nor_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &nor_data, - }, - .num_resources = 1, - .resource = &nor_resource, -}; - -static struct mtd_partition nand_partitions[] = { -#if 0 - /* REVISIT: enable these partitions if you make NAND BOOT work */ - { - .name = "xloader", - .offset = 0, - .size = 64 * 1024, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "bootloader", - .offset = MTDPART_OFS_APPEND, - .size = 256 * 1024, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = 192 * 1024, - }, - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = 2 * SZ_1M, - }, -#endif - { - .name = "filesystem", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - }, -}; - -#define H3_NAND_RB_GPIO_PIN 10 - -static int nand_dev_ready(struct nand_chip *chip) -{ - return gpio_get_value(H3_NAND_RB_GPIO_PIN); -} - -static struct platform_nand_data nand_platdata = { - .chip = { - .nr_chips = 1, - .chip_offset = 0, - .nr_partitions = ARRAY_SIZE(nand_partitions), - .partitions = nand_partitions, - .options = NAND_SAMSUNG_LP_OPTIONS, - }, - .ctrl = { - .cmd_ctrl = omap1_nand_cmd_ctl, - .dev_ready = nand_dev_ready, - - }, -}; - -static struct resource nand_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device nand_device = { - .name = "gen_nand", - .id = 0, - .dev = { - .platform_data = &nand_platdata, - }, - .num_resources = 1, - .resource = &nand_resource, -}; - -static struct smc91x_platdata smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, - .leda = RPC_LED_100_10, - .ledb = RPC_LED_TX_RX, -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = OMAP1710_ETHR_START, /* Physical */ - .end = OMAP1710_ETHR_START + 0xf, - .flags = IORESOURCE_MEM, - }, - [1] = { - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - }, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .dev = { - .platform_data = &smc91x_info, - }, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static void __init h3_init_smc91x(void) -{ - omap_cfg_reg(W15_1710_GPIO40); - if (gpio_request(40, "SMC91x irq") < 0) { - printk("Error requesting gpio 40 for smc91x irq\n"); - return; - } -} - -#define GPTIMER_BASE 0xFFFB1400 -#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800)) -#define GPTIMER_REGS_SIZE 0x46 - -static struct resource intlat_resources[] = { - [0] = { - .start = GPTIMER_REGS(0), /* Physical */ - .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = INT_1610_GPTIMER1, - .end = INT_1610_GPTIMER1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device intlat_device = { - .name = "omap_intlat", - .id = 0, - .num_resources = ARRAY_SIZE(intlat_resources), - .resource = intlat_resources, -}; - -static struct resource h3_kp_resources[] = { - [0] = { - .start = INT_KEYBOARD, - .end = INT_KEYBOARD, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct matrix_keymap_data h3_keymap_data = { - .keymap = h3_keymap, - .keymap_size = ARRAY_SIZE(h3_keymap), -}; - -static struct omap_kp_platform_data h3_kp_data = { - .rows = 8, - .cols = 8, - .keymap_data = &h3_keymap_data, - .rep = true, - .delay = 9, - .dbounce = true, -}; - -static struct platform_device h3_kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &h3_kp_data, - }, - .num_resources = ARRAY_SIZE(h3_kp_resources), - .resource = h3_kp_resources, -}; - -static struct platform_device h3_lcd_device = { - .name = "lcd_h3", - .id = -1, -}; - -static struct spi_board_info h3_spi_board_info[] __initdata = { - [0] = { - .modalias = "tsc2101", - .bus_num = 2, - .chip_select = 0, - .max_speed_hz = 16000000, - /* .platform_data = &tsc_platform_data, */ - }, -}; - -static const struct gpio_led h3_gpio_led_pins[] = { - { - .name = "h3:red", - .default_trigger = "heartbeat", - .gpio = 3, - }, - { - .name = "h3:green", - .default_trigger = "cpu0", - .gpio = OMAP_MPUIO(4), - }, -}; - -static struct gpio_led_platform_data h3_gpio_led_data = { - .leds = h3_gpio_led_pins, - .num_leds = ARRAY_SIZE(h3_gpio_led_pins), -}; - -static struct platform_device h3_gpio_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &h3_gpio_led_data, - }, -}; - -static struct platform_device *devices[] __initdata = { - &nor_device, - &nand_device, - &smc91x_device, - &intlat_device, - &h3_kp_device, - &h3_lcd_device, - &h3_gpio_leds, -}; - -static struct omap_usb_config h3_usb_config __initdata = { - /* usb1 has a Mini-AB port and external isp1301 transceiver */ - .otg = 2, - -#if IS_ENABLED(CONFIG_USB_OMAP) - .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */ -#elif IS_ENABLED(CONFIG_USB_OHCI_HCD) - /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */ - .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */ -#endif - - .pins[1] = 3, -}; - -static const struct omap_lcd_config h3_lcd_config __initconst = { - .ctrl_name = "internal", -}; - -static struct i2c_board_info __initdata h3_i2c_board_info[] = { - { - I2C_BOARD_INFO("tps65013", 0x48), - }, - { - I2C_BOARD_INFO("isp1301_omap", 0x2d), - }, -}; - -static void __init h3_init(void) -{ - h3_init_smc91x(); - - /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped - * to address 0 by a dip switch), NAND on CS2B. The NAND driver will - * notice whether a NAND chip is enabled at probe time. - * - * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND - * (which on H2 may be 16bit) on CS3. Try detecting that in code here, - * to avoid probing every possible flash configuration... - */ - nor_resource.end = nor_resource.start = omap_cs3_phys(); - nor_resource.end += SZ_32M - 1; - - nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; - nand_resource.end += SZ_4K - 1; - BUG_ON(gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0); - gpio_direction_input(H3_NAND_RB_GPIO_PIN); - - /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ - /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ - omap_cfg_reg(V2_1710_GPIO10); - - /* Mux pins for keypad */ - omap_cfg_reg(F18_1610_KBC0); - omap_cfg_reg(D20_1610_KBC1); - omap_cfg_reg(D19_1610_KBC2); - omap_cfg_reg(E18_1610_KBC3); - omap_cfg_reg(C21_1610_KBC4); - omap_cfg_reg(G18_1610_KBR0); - omap_cfg_reg(F19_1610_KBR1); - omap_cfg_reg(H14_1610_KBR2); - omap_cfg_reg(E20_1610_KBR3); - omap_cfg_reg(E19_1610_KBR4); - omap_cfg_reg(N19_1610_KBR5); - - /* GPIO based LEDs */ - omap_cfg_reg(P18_1610_GPIO3); - omap_cfg_reg(MPUIO4); - - smc91x_resources[1].start = gpio_to_irq(40); - smc91x_resources[1].end = gpio_to_irq(40); - platform_add_devices(devices, ARRAY_SIZE(devices)); - h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO); - spi_register_board_info(h3_spi_board_info, - ARRAY_SIZE(h3_spi_board_info)); - omap_serial_init(); - h3_i2c_board_info[1].irq = gpio_to_irq(14); - omap_register_i2c_bus(1, 100, h3_i2c_board_info, - ARRAY_SIZE(h3_i2c_board_info)); - omap1_usb_init(&h3_usb_config); - h3_mmc_init(); - - omapfb_set_lcd_config(&h3_lcd_config); -} - -MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") - /* Maintainer: Texas Instruments, Inc. */ - .atag_offset = 0x100, - .map_io = omap16xx_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = h3_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-h3.h b/arch/arm/mach-omap1/board-h3.h deleted file mode 100644 index 78de535be3c5..000000000000 --- a/arch/arm/mach-omap1/board-h3.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-omap1/board-h3.h - * - * Copyright (C) 2001 RidgeRun, Inc. - * Copyright (C) 2004 Texas Instruments, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef __ASM_ARCH_OMAP_H3_H -#define __ASM_ARCH_OMAP_H3_H - -#define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) -# define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4) - -extern void h3_mmc_init(void); - -#endif /* __ASM_ARCH_OMAP_H3_H */ diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c deleted file mode 100644 index 291d294b5824..000000000000 --- a/arch/arm/mach-omap1/board-htcherald.c +++ /dev/null @@ -1,585 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * HTC Herald board configuration - * Copyright (C) 2009 Cory Maccarrone <darkstar6262@gmail.com> - * Copyright (C) 2009 Wing Linux - * - * Based on the board-htcwizard.c file from the linwizard project: - * Copyright (C) 2006 Unai Uribarri - * Copyright (C) 2008 linwizard.sourceforge.net - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/input.h> -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/gpio_keys.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-gpio.h> -#include <linux/htcpld.h> -#include <linux/leds.h> -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> -#include <linux/omapfb.h> -#include <linux/platform_data/keypad-omap.h> -#include <linux/soc/ti/omap1-io.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "hardware.h" -#include "omap7xx.h" -#include "mmc.h" -#include "irqs.h" -#include "usb.h" -#include "common.h" - -/* LCD register definition */ -#define OMAP_LCDC_CONTROL (0xfffec000 + 0x00) -#define OMAP_LCDC_STATUS (0xfffec000 + 0x10) -#define OMAP_DMA_LCD_CCR (0xfffee300 + 0xc2) -#define OMAP_DMA_LCD_CTRL (0xfffee300 + 0xc4) -#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) -#define OMAP_LCDC_STAT_DONE (1 << 0) - -/* GPIO definitions for the power button and keyboard slide switch */ -#define HTCHERALD_GPIO_POWER 139 -#define HTCHERALD_GPIO_SLIDE 174 -#define HTCHERALD_GIRQ_BTNS 141 - -/* GPIO definitions for the touchscreen */ -#define HTCHERALD_GPIO_TS 76 - -/* HTCPLD definitions */ - -/* - * CPLD Logic - * - * Chip 3 - 0x03 - * - * Function 7 6 5 4 3 2 1 0 - * ------------------------------------ - * DPAD light x x x x x x x 1 - * SoundDev x x x x 1 x x x - * Screen white 1 x x x x x x x - * MMC power on x x x x x 1 x x - * Happy times (n) 0 x x x x 1 x x - * - * Chip 4 - 0x04 - * - * Function 7 6 5 4 3 2 1 0 - * ------------------------------------ - * Keyboard light x x x x x x x 1 - * LCD Bright (4) x x x x x 1 1 x - * LCD Bright (3) x x x x x 0 1 x - * LCD Bright (2) x x x x x 1 0 x - * LCD Bright (1) x x x x x 0 0 x - * LCD Off x x x x 0 x x x - * LCD image (fb) 1 x x x x x x x - * LCD image (white) 0 x x x x x x x - * Caps lock LED x x 1 x x x x x - * - * Chip 5 - 0x05 - * - * Function 7 6 5 4 3 2 1 0 - * ------------------------------------ - * Red (solid) x x x x x 1 x x - * Red (flash) x x x x x x 1 x - * Green (GSM flash) x x x x 1 x x x - * Green (GSM solid) x x x 1 x x x x - * Green (wifi flash) x x 1 x x x x x - * Blue (bt flash) x 1 x x x x x x - * DPAD Int Enable 1 x x x x x x 0 - * - * (Combinations of the above can be made for different colors.) - * The direction pad interrupt enable must be set each time the - * interrupt is handled. - * - * Chip 6 - 0x06 - * - * Function 7 6 5 4 3 2 1 0 - * ------------------------------------ - * Vibrator x x x x 1 x x x - * Alt LED x x x 1 x x x x - * Screen white 1 x x x x x x x - * Screen white x x 1 x x x x x - * Screen white x 0 x x x x x x - * Enable kbd dpad x x x x x x 0 x - * Happy Times 0 1 0 x x x 0 x - */ - -/* - * HTCPLD GPIO lines start 16 after OMAP_MAX_GPIO_LINES to account - * for the 16 MPUIO lines. - */ -#define HTCPLD_GPIO_START_OFFSET (OMAP_MAX_GPIO_LINES + 16) -#define HTCPLD_IRQ(chip, offset) (OMAP_IRQ_END + 8 * (chip) + (offset)) -#define HTCPLD_BASE(chip, offset) \ - (HTCPLD_GPIO_START_OFFSET + 8 * (chip) + (offset)) - -#define HTCPLD_GPIO_LED_DPAD HTCPLD_BASE(0, 0) -#define HTCPLD_GPIO_LED_KBD HTCPLD_BASE(1, 0) -#define HTCPLD_GPIO_LED_CAPS HTCPLD_BASE(1, 5) -#define HTCPLD_GPIO_LED_RED_FLASH HTCPLD_BASE(2, 1) -#define HTCPLD_GPIO_LED_RED_SOLID HTCPLD_BASE(2, 2) -#define HTCPLD_GPIO_LED_GREEN_FLASH HTCPLD_BASE(2, 3) -#define HTCPLD_GPIO_LED_GREEN_SOLID HTCPLD_BASE(2, 4) -#define HTCPLD_GPIO_LED_WIFI HTCPLD_BASE(2, 5) -#define HTCPLD_GPIO_LED_BT HTCPLD_BASE(2, 6) -#define HTCPLD_GPIO_LED_VIBRATE HTCPLD_BASE(3, 3) -#define HTCPLD_GPIO_LED_ALT HTCPLD_BASE(3, 4) - -#define HTCPLD_GPIO_RIGHT_KBD HTCPLD_BASE(6, 7) -#define HTCPLD_GPIO_UP_KBD HTCPLD_BASE(6, 6) -#define HTCPLD_GPIO_LEFT_KBD HTCPLD_BASE(6, 5) -#define HTCPLD_GPIO_DOWN_KBD HTCPLD_BASE(6, 4) - -#define HTCPLD_GPIO_RIGHT_DPAD HTCPLD_BASE(7, 7) -#define HTCPLD_GPIO_UP_DPAD HTCPLD_BASE(7, 6) -#define HTCPLD_GPIO_LEFT_DPAD HTCPLD_BASE(7, 5) -#define HTCPLD_GPIO_DOWN_DPAD HTCPLD_BASE(7, 4) -#define HTCPLD_GPIO_ENTER_DPAD HTCPLD_BASE(7, 3) - -/* Chip 5 */ -#define HTCPLD_IRQ_RIGHT_KBD HTCPLD_IRQ(0, 7) -#define HTCPLD_IRQ_UP_KBD HTCPLD_IRQ(0, 6) -#define HTCPLD_IRQ_LEFT_KBD HTCPLD_IRQ(0, 5) -#define HTCPLD_IRQ_DOWN_KBD HTCPLD_IRQ(0, 4) - -/* Chip 6 */ -#define HTCPLD_IRQ_RIGHT_DPAD HTCPLD_IRQ(1, 7) -#define HTCPLD_IRQ_UP_DPAD HTCPLD_IRQ(1, 6) -#define HTCPLD_IRQ_LEFT_DPAD HTCPLD_IRQ(1, 5) -#define HTCPLD_IRQ_DOWN_DPAD HTCPLD_IRQ(1, 4) -#define HTCPLD_IRQ_ENTER_DPAD HTCPLD_IRQ(1, 3) - -/* Keyboard definition */ - -static const unsigned int htc_herald_keymap[] = { - KEY(0, 0, KEY_RECORD), /* Mail button */ - KEY(1, 0, KEY_CAMERA), /* Camera */ - KEY(2, 0, KEY_PHONE), /* Send key */ - KEY(3, 0, KEY_VOLUMEUP), /* Volume up */ - KEY(4, 0, KEY_F2), /* Right bar (landscape) */ - KEY(5, 0, KEY_MAIL), /* Win key (portrait) */ - KEY(6, 0, KEY_DIRECTORY), /* Right bar (portrait) */ - KEY(0, 1, KEY_LEFTCTRL), /* Windows key */ - KEY(1, 1, KEY_COMMA), - KEY(2, 1, KEY_M), - KEY(3, 1, KEY_K), - KEY(4, 1, KEY_SLASH), /* OK key */ - KEY(5, 1, KEY_I), - KEY(6, 1, KEY_U), - KEY(0, 2, KEY_LEFTALT), - KEY(1, 2, KEY_TAB), - KEY(2, 2, KEY_N), - KEY(3, 2, KEY_J), - KEY(4, 2, KEY_ENTER), - KEY(5, 2, KEY_H), - KEY(6, 2, KEY_Y), - KEY(0, 3, KEY_SPACE), - KEY(1, 3, KEY_L), - KEY(2, 3, KEY_B), - KEY(3, 3, KEY_V), - KEY(4, 3, KEY_BACKSPACE), - KEY(5, 3, KEY_G), - KEY(6, 3, KEY_T), - KEY(0, 4, KEY_CAPSLOCK), /* Shift */ - KEY(1, 4, KEY_C), - KEY(2, 4, KEY_F), - KEY(3, 4, KEY_R), - KEY(4, 4, KEY_O), - KEY(5, 4, KEY_E), - KEY(6, 4, KEY_D), - KEY(0, 5, KEY_X), - KEY(1, 5, KEY_Z), - KEY(2, 5, KEY_S), - KEY(3, 5, KEY_W), - KEY(4, 5, KEY_P), - KEY(5, 5, KEY_Q), - KEY(6, 5, KEY_A), - KEY(0, 6, KEY_CONNECT), /* Voice button */ - KEY(2, 6, KEY_CANCEL), /* End key */ - KEY(3, 6, KEY_VOLUMEDOWN), /* Volume down */ - KEY(4, 6, KEY_F1), /* Left bar (landscape) */ - KEY(5, 6, KEY_WWW), /* OK button (portrait) */ - KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */ -}; - -static const struct matrix_keymap_data htc_herald_keymap_data = { - .keymap = htc_herald_keymap, - .keymap_size = ARRAY_SIZE(htc_herald_keymap), -}; - -static struct omap_kp_platform_data htcherald_kp_data = { - .rows = 7, - .cols = 7, - .delay = 20, - .rep = true, - .keymap_data = &htc_herald_keymap_data, -}; - -static struct resource kp_resources[] = { - [0] = { - .start = INT_7XX_MPUIO_KEYPAD, - .end = INT_7XX_MPUIO_KEYPAD, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &htcherald_kp_data, - }, - .num_resources = ARRAY_SIZE(kp_resources), - .resource = kp_resources, -}; - -/* GPIO buttons for keyboard slide and power button */ -static struct gpio_keys_button herald_gpio_keys_table[] = { - {BTN_0, HTCHERALD_GPIO_POWER, 1, "POWER", EV_KEY, 1, 20}, - {SW_LID, HTCHERALD_GPIO_SLIDE, 0, "SLIDE", EV_SW, 1, 20}, - - {KEY_LEFT, HTCPLD_GPIO_LEFT_KBD, 1, "LEFT", EV_KEY, 1, 20}, - {KEY_RIGHT, HTCPLD_GPIO_RIGHT_KBD, 1, "RIGHT", EV_KEY, 1, 20}, - {KEY_UP, HTCPLD_GPIO_UP_KBD, 1, "UP", EV_KEY, 1, 20}, - {KEY_DOWN, HTCPLD_GPIO_DOWN_KBD, 1, "DOWN", EV_KEY, 1, 20}, - - {KEY_LEFT, HTCPLD_GPIO_LEFT_DPAD, 1, "DLEFT", EV_KEY, 1, 20}, - {KEY_RIGHT, HTCPLD_GPIO_RIGHT_DPAD, 1, "DRIGHT", EV_KEY, 1, 20}, - {KEY_UP, HTCPLD_GPIO_UP_DPAD, 1, "DUP", EV_KEY, 1, 20}, - {KEY_DOWN, HTCPLD_GPIO_DOWN_DPAD, 1, "DDOWN", EV_KEY, 1, 20}, - {KEY_ENTER, HTCPLD_GPIO_ENTER_DPAD, 1, "DENTER", EV_KEY, 1, 20}, -}; - -static struct gpio_keys_platform_data herald_gpio_keys_data = { - .buttons = herald_gpio_keys_table, - .nbuttons = ARRAY_SIZE(herald_gpio_keys_table), - .rep = true, -}; - -static struct platform_device herald_gpiokeys_device = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &herald_gpio_keys_data, - }, -}; - -/* LEDs for the Herald. These connect to the HTCPLD GPIO device. */ -static const struct gpio_led gpio_leds[] = { - {"dpad", NULL, HTCPLD_GPIO_LED_DPAD, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"kbd", NULL, HTCPLD_GPIO_LED_KBD, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"vibrate", NULL, HTCPLD_GPIO_LED_VIBRATE, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"green_solid", NULL, HTCPLD_GPIO_LED_GREEN_SOLID, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"green_flash", NULL, HTCPLD_GPIO_LED_GREEN_FLASH, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"red_solid", "mmc0", HTCPLD_GPIO_LED_RED_SOLID, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"red_flash", NULL, HTCPLD_GPIO_LED_RED_FLASH, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"wifi", NULL, HTCPLD_GPIO_LED_WIFI, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"bt", NULL, HTCPLD_GPIO_LED_BT, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"caps", NULL, HTCPLD_GPIO_LED_CAPS, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, - {"alt", NULL, HTCPLD_GPIO_LED_ALT, 0, 0, LEDS_GPIO_DEFSTATE_OFF}, -}; - -static struct gpio_led_platform_data gpio_leds_data = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device gpio_leds_device = { - .name = "leds-gpio", - .id = 0, - .dev = { - .platform_data = &gpio_leds_data, - }, -}; - -/* HTC PLD chips */ - -static struct resource htcpld_resources[] = { - [0] = { - .flags = IORESOURCE_IRQ, - }, -}; - -static struct htcpld_chip_platform_data htcpld_chips[] = { - [0] = { - .addr = 0x03, - .reset = 0x04, - .num_gpios = 8, - .gpio_out_base = HTCPLD_BASE(0, 0), - .gpio_in_base = HTCPLD_BASE(4, 0), - }, - [1] = { - .addr = 0x04, - .reset = 0x8e, - .num_gpios = 8, - .gpio_out_base = HTCPLD_BASE(1, 0), - .gpio_in_base = HTCPLD_BASE(5, 0), - }, - [2] = { - .addr = 0x05, - .reset = 0x80, - .num_gpios = 8, - .gpio_out_base = HTCPLD_BASE(2, 0), - .gpio_in_base = HTCPLD_BASE(6, 0), - .irq_base = HTCPLD_IRQ(0, 0), - .num_irqs = 8, - }, - [3] = { - .addr = 0x06, - .reset = 0x40, - .num_gpios = 8, - .gpio_out_base = HTCPLD_BASE(3, 0), - .gpio_in_base = HTCPLD_BASE(7, 0), - .irq_base = HTCPLD_IRQ(1, 0), - .num_irqs = 8, - }, -}; - -static struct htcpld_core_platform_data htcpld_pfdata = { - .i2c_adapter_id = 1, - - .chip = htcpld_chips, - .num_chip = ARRAY_SIZE(htcpld_chips), -}; - -static struct platform_device htcpld_device = { - .name = "i2c-htcpld", - .id = -1, - .resource = htcpld_resources, - .num_resources = ARRAY_SIZE(htcpld_resources), - .dev = { - .platform_data = &htcpld_pfdata, - }, -}; - -/* USB Device */ -static struct omap_usb_config htcherald_usb_config __initdata = { - .otg = 0, - .register_host = 0, - .register_dev = 1, - .hmc_mode = 4, - .pins[0] = 2, -}; - -/* LCD Device resources */ -static const struct omap_lcd_config htcherald_lcd_config __initconst = { - .ctrl_name = "internal", -}; - -static struct platform_device lcd_device = { - .name = "lcd_htcherald", - .id = -1, -}; - -/* MMC Card */ -#if IS_ENABLED(CONFIG_MMC_OMAP) -static struct omap_mmc_platform_data htc_mmc1_data = { - .nr_slots = 1, - .switch_slot = NULL, - .slots[0] = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .name = "mmcblk", - .nomux = 1, - .wires = 4, - .switch_pin = -1, - }, -}; - -static struct omap_mmc_platform_data *htc_mmc_data[1]; -#endif - - -/* Platform devices for the Herald */ -static struct platform_device *devices[] __initdata = { - &kp_device, - &lcd_device, - &htcpld_device, - &gpio_leds_device, - &herald_gpiokeys_device, -}; - -/* - * Touchscreen - */ -static const struct ads7846_platform_data htcherald_ts_platform_data = { - .model = 7846, - .keep_vref_on = 1, - .x_plate_ohms = 496, - .gpio_pendown = HTCHERALD_GPIO_TS, - .pressure_max = 10000, - .pressure_min = 5000, - .x_min = 528, - .x_max = 3760, - .y_min = 624, - .y_max = 3760, -}; - -static struct spi_board_info __initdata htcherald_spi_board_info[] = { - { - .modalias = "ads7846", - .platform_data = &htcherald_ts_platform_data, - .max_speed_hz = 2500000, - .bus_num = 2, - .chip_select = 1, - } -}; - -/* - * Init functions from here on - */ - -static void __init htcherald_lcd_init(void) -{ - u32 reg; - unsigned int tries = 200; - - /* disable controller if active */ - reg = omap_readl(OMAP_LCDC_CONTROL); - if (reg & OMAP_LCDC_CTRL_LCD_EN) { - reg &= ~OMAP_LCDC_CTRL_LCD_EN; - omap_writel(reg, OMAP_LCDC_CONTROL); - - /* wait for end of frame */ - while (!(omap_readl(OMAP_LCDC_STATUS) & OMAP_LCDC_STAT_DONE)) { - tries--; - if (!tries) - break; - } - if (!tries) - pr_err("Timeout waiting for end of frame -- LCD may not be available\n"); - - /* turn off DMA */ - reg = omap_readw(OMAP_DMA_LCD_CCR); - reg &= ~(1 << 7); - omap_writew(reg, OMAP_DMA_LCD_CCR); - - reg = omap_readw(OMAP_DMA_LCD_CTRL); - reg &= ~(1 << 8); - omap_writew(reg, OMAP_DMA_LCD_CTRL); - } -} - -static void __init htcherald_map_io(void) -{ - omap7xx_map_io(); - - /* - * The LCD panel must be disabled and DMA turned off here, as doing - * it later causes the LCD never to reinitialize. - */ - htcherald_lcd_init(); - - printk(KERN_INFO "htcherald_map_io done.\n"); -} - -static void __init htcherald_disable_watchdog(void) -{ - /* Disable watchdog if running */ - if (omap_readl(OMAP_WDT_TIMER_MODE) & 0x8000) { - /* - * disable a potentially running watchdog timer before - * it kills us. - */ - printk(KERN_WARNING "OMAP850 Watchdog seems to be activated, disabling it for now.\n"); - omap_writel(0xF5, OMAP_WDT_TIMER_MODE); - omap_writel(0xA0, OMAP_WDT_TIMER_MODE); - } -} - -#define HTCHERALD_GPIO_USB_EN1 33 -#define HTCHERALD_GPIO_USB_EN2 73 -#define HTCHERALD_GPIO_USB_DM 35 -#define HTCHERALD_GPIO_USB_DP 36 - -static void __init htcherald_usb_enable(void) -{ - unsigned int tries = 20; - unsigned int value = 0; - - /* Request the GPIOs we need to control here */ - if (gpio_request(HTCHERALD_GPIO_USB_EN1, "herald_usb") < 0) - goto err1; - - if (gpio_request(HTCHERALD_GPIO_USB_EN2, "herald_usb") < 0) - goto err2; - - if (gpio_request(HTCHERALD_GPIO_USB_DM, "herald_usb") < 0) - goto err3; - - if (gpio_request(HTCHERALD_GPIO_USB_DP, "herald_usb") < 0) - goto err4; - - /* force USB_EN GPIO to 0 */ - do { - /* output low */ - gpio_direction_output(HTCHERALD_GPIO_USB_EN1, 0); - } while ((value = gpio_get_value(HTCHERALD_GPIO_USB_EN1)) == 1 && - --tries); - - if (value == 1) - printk(KERN_WARNING "Unable to reset USB, trying to continue\n"); - - gpio_direction_output(HTCHERALD_GPIO_USB_EN2, 0); /* output low */ - gpio_direction_input(HTCHERALD_GPIO_USB_DM); /* input */ - gpio_direction_input(HTCHERALD_GPIO_USB_DP); /* input */ - - goto done; - -err4: - gpio_free(HTCHERALD_GPIO_USB_DM); -err3: - gpio_free(HTCHERALD_GPIO_USB_EN2); -err2: - gpio_free(HTCHERALD_GPIO_USB_EN1); -err1: - printk(KERN_ERR "Unabled to request GPIO for USB\n"); -done: - printk(KERN_INFO "USB setup complete.\n"); -} - -static void __init htcherald_init(void) -{ - printk(KERN_INFO "HTC Herald init.\n"); - - /* Do board initialization before we register all the devices */ - htcpld_resources[0].start = gpio_to_irq(HTCHERALD_GIRQ_BTNS); - htcpld_resources[0].end = gpio_to_irq(HTCHERALD_GIRQ_BTNS); - platform_add_devices(devices, ARRAY_SIZE(devices)); - - htcherald_disable_watchdog(); - - htcherald_usb_enable(); - omap1_usb_init(&htcherald_usb_config); - - htcherald_spi_board_info[0].irq = gpio_to_irq(HTCHERALD_GPIO_TS); - spi_register_board_info(htcherald_spi_board_info, - ARRAY_SIZE(htcherald_spi_board_info)); - - omap_register_i2c_bus(1, 100, NULL, 0); - -#if IS_ENABLED(CONFIG_MMC_OMAP) - htc_mmc_data[0] = &htc_mmc1_data; - omap1_init_mmc(htc_mmc_data, 1); -#endif - - omapfb_set_lcd_config(&htcherald_lcd_config); -} - -MACHINE_START(HERALD, "HTC Herald") - /* Maintainer: Cory Maccarrone <darkstar6262@gmail.com> */ - /* Maintainer: wing-linux.sourceforge.net */ - .atag_offset = 0x100, - .map_io = htcherald_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = htcherald_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c deleted file mode 100644 index 6deb4ca079e9..000000000000 --- a/arch/arm/mach-omap1/board-innovator.c +++ /dev/null @@ -1,481 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-innovator.c - * - * Board specific inits for OMAP-1510 and OMAP-1610 Innovator - * - * Copyright (C) 2001 RidgeRun, Inc. - * Author: Greg Lonnon <glonnon@ridgerun.com> - * - * Copyright (C) 2002 MontaVista Software, Inc. - * - * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 - * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/input.h> -#include <linux/smc91x.h> -#include <linux/omapfb.h> -#include <linux/platform_data/keypad-omap.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "tc.h" -#include "mux.h" -#include "flash.h" -#include "hardware.h" -#include "usb.h" -#include "iomap.h" -#include "common.h" -#include "mmc.h" - -/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ -#define INNOVATOR1610_ETHR_START 0x04000300 - -static const unsigned int innovator_keymap[] = { - KEY(0, 0, KEY_F1), - KEY(3, 0, KEY_DOWN), - KEY(1, 1, KEY_F2), - KEY(2, 1, KEY_RIGHT), - KEY(0, 2, KEY_F3), - KEY(1, 2, KEY_F4), - KEY(2, 2, KEY_UP), - KEY(2, 3, KEY_ENTER), - KEY(3, 3, KEY_LEFT), -}; - -static struct mtd_partition innovator_partitions[] = { - /* bootloader (U-Boot, etc) in first sector */ - { - .name = "bootloader", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* bootloader params in the next sector */ - { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = 0, - }, - /* kernel */ - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - .mask_flags = 0 - }, - /* rest of flash1 is a file system */ - { - .name = "rootfs", - .offset = MTDPART_OFS_APPEND, - .size = SZ_16M - SZ_2M - 2 * SZ_128K, - .mask_flags = 0 - }, - /* file system */ - { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - } -}; - -static struct physmap_flash_data innovator_flash_data = { - .width = 2, - .set_vpp = omap1_set_vpp, - .parts = innovator_partitions, - .nr_parts = ARRAY_SIZE(innovator_partitions), -}; - -static struct resource innovator_flash_resource = { - .start = OMAP_CS0_PHYS, - .end = OMAP_CS0_PHYS + SZ_32M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device innovator_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &innovator_flash_data, - }, - .num_resources = 1, - .resource = &innovator_flash_resource, -}; - -static struct resource innovator_kp_resources[] = { - [0] = { - .start = INT_KEYBOARD, - .end = INT_KEYBOARD, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct matrix_keymap_data innovator_keymap_data = { - .keymap = innovator_keymap, - .keymap_size = ARRAY_SIZE(innovator_keymap), -}; - -static struct omap_kp_platform_data innovator_kp_data = { - .rows = 8, - .cols = 8, - .keymap_data = &innovator_keymap_data, - .delay = 4, -}; - -static struct platform_device innovator_kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &innovator_kp_data, - }, - .num_resources = ARRAY_SIZE(innovator_kp_resources), - .resource = innovator_kp_resources, -}; - -static struct smc91x_platdata innovator_smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, - .leda = RPC_LED_100_10, - .ledb = RPC_LED_TX_RX, -}; - -#ifdef CONFIG_ARCH_OMAP15XX - -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> - - -/* Only FPGA needs to be mapped here. All others are done with ioremap */ -static struct map_desc innovator1510_io_desc[] __initdata = { - { - .virtual = OMAP1510_FPGA_BASE, - .pfn = __phys_to_pfn(OMAP1510_FPGA_START), - .length = OMAP1510_FPGA_SIZE, - .type = MT_DEVICE - } -}; - -static struct resource innovator1510_smc91x_resources[] = { - [0] = { - .start = OMAP1510_FPGA_ETHR_START, /* Physical */ - .end = OMAP1510_FPGA_ETHR_START + 0xf, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = OMAP1510_INT_ETHER, - .end = OMAP1510_INT_ETHER, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -static struct platform_device innovator1510_smc91x_device = { - .name = "smc91x", - .id = 0, - .dev = { - .platform_data = &innovator_smc91x_info, - }, - .num_resources = ARRAY_SIZE(innovator1510_smc91x_resources), - .resource = innovator1510_smc91x_resources, -}; - -static struct platform_device innovator1510_lcd_device = { - .name = "lcd_inn1510", - .id = -1, - .dev = { - .platform_data = (void __force *)OMAP1510_FPGA_LCD_PANEL_CONTROL, - } -}; - -static struct platform_device innovator1510_spi_device = { - .name = "spi_inn1510", - .id = -1, -}; - -static struct platform_device *innovator1510_devices[] __initdata = { - &innovator_flash_device, - &innovator1510_smc91x_device, - &innovator_kp_device, - &innovator1510_lcd_device, - &innovator1510_spi_device, -}; - -static int innovator_get_pendown_state(void) -{ - return !(__raw_readb(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5)); -} - -static const struct ads7846_platform_data innovator1510_ts_info = { - .model = 7846, - .vref_delay_usecs = 100, /* internal, no capacitor */ - .x_plate_ohms = 419, - .y_plate_ohms = 486, - .get_pendown_state = innovator_get_pendown_state, -}; - -static struct spi_board_info __initdata innovator1510_boardinfo[] = { { - /* FPGA (bus "10") CS0 has an ads7846e */ - .modalias = "ads7846", - .platform_data = &innovator1510_ts_info, - .irq = OMAP1510_INT_FPGA_TS, - .max_speed_hz = 120000 /* max sample rate at 3V */ - * 26 /* command + data + overhead */, - .bus_num = 10, - .chip_select = 0, -} }; - -#endif /* CONFIG_ARCH_OMAP15XX */ - -#ifdef CONFIG_ARCH_OMAP16XX - -static struct resource innovator1610_smc91x_resources[] = { - [0] = { - .start = INNOVATOR1610_ETHR_START, /* Physical */ - .end = INNOVATOR1610_ETHR_START + 0xf, - .flags = IORESOURCE_MEM, - }, - [1] = { - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - }, -}; - -static struct platform_device innovator1610_smc91x_device = { - .name = "smc91x", - .id = 0, - .dev = { - .platform_data = &innovator_smc91x_info, - }, - .num_resources = ARRAY_SIZE(innovator1610_smc91x_resources), - .resource = innovator1610_smc91x_resources, -}; - -static struct platform_device innovator1610_lcd_device = { - .name = "inn1610_lcd", - .id = -1, -}; - -static struct platform_device *innovator1610_devices[] __initdata = { - &innovator_flash_device, - &innovator1610_smc91x_device, - &innovator_kp_device, - &innovator1610_lcd_device, -}; - -#endif /* CONFIG_ARCH_OMAP16XX */ - -static void __init innovator_init_smc91x(void) -{ - if (cpu_is_omap1510()) { - __raw_writeb(__raw_readb(OMAP1510_FPGA_RST) & ~1, - OMAP1510_FPGA_RST); - udelay(750); - } else { - if (gpio_request(0, "SMC91x irq") < 0) { - printk("Error requesting gpio 0 for smc91x irq\n"); - return; - } - } -} - -#ifdef CONFIG_ARCH_OMAP15XX -/* - * Board specific gang-switched transceiver power on/off. - */ -static int innovator_omap_ohci_transceiver_power(int on) -{ - if (on) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - - return 0; -} - -static struct omap_usb_config innovator1510_usb_config __initdata = { - /* for bundled non-standard host and peripheral cables */ - .hmc_mode = 4, - - .register_host = 1, - .pins[1] = 6, - .pins[2] = 6, /* Conflicts with UART2 */ - - .register_dev = 1, - .pins[0] = 2, - - .transceiver_power = innovator_omap_ohci_transceiver_power, -}; - -static const struct omap_lcd_config innovator1510_lcd_config __initconst = { - .ctrl_name = "internal", -}; -#endif - -#ifdef CONFIG_ARCH_OMAP16XX -static struct omap_usb_config h2_usb_config __initdata = { - /* usb1 has a Mini-AB port and external isp1301 transceiver */ - .otg = 2, - -#if IS_ENABLED(CONFIG_USB_OMAP) - .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */ - /* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */ -#elif IS_ENABLED(CONFIG_USB_OHCI_HCD) - /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */ - .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */ -#endif - - .pins[1] = 3, -}; - -static const struct omap_lcd_config innovator1610_lcd_config __initconst = { - .ctrl_name = "internal", -}; -#endif - -#if IS_ENABLED(CONFIG_MMC_OMAP) - -static int mmc_set_power(struct device *dev, int slot, int power_on, - int vdd) -{ - if (power_on) - __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) | (1 << 3), - OMAP1510_FPGA_POWER); - else - __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) & ~(1 << 3), - OMAP1510_FPGA_POWER); - - return 0; -} - -/* - * Innovator could use the following functions tested: - * - mmc_get_wp that uses OMAP_MPUIO(3) - * - mmc_get_cover_state that uses FPGA F4 UIO43 - */ -static struct omap_mmc_platform_data mmc1_data = { - .nr_slots = 1, - .slots[0] = { - .set_power = mmc_set_power, - .wires = 4, - .name = "mmcblk", - }, -}; - -static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC]; - -static void __init innovator_mmc_init(void) -{ - mmc_data[0] = &mmc1_data; - omap1_init_mmc(mmc_data, OMAP15XX_NR_MMC); -} - -#else -static inline void innovator_mmc_init(void) -{ -} -#endif - -static void __init innovator_init(void) -{ - if (cpu_is_omap1510()) - omap1510_fpga_init_irq(); - innovator_init_smc91x(); - -#ifdef CONFIG_ARCH_OMAP15XX - if (cpu_is_omap1510()) { - unsigned char reg; - - /* mux pins for uarts */ - omap_cfg_reg(UART1_TX); - omap_cfg_reg(UART1_RTS); - omap_cfg_reg(UART2_TX); - omap_cfg_reg(UART2_RTS); - omap_cfg_reg(UART3_TX); - omap_cfg_reg(UART3_RX); - - reg = __raw_readb(OMAP1510_FPGA_POWER); - reg |= OMAP1510_FPGA_PCR_COM1_EN; - __raw_writeb(reg, OMAP1510_FPGA_POWER); - udelay(10); - - reg = __raw_readb(OMAP1510_FPGA_POWER); - reg |= OMAP1510_FPGA_PCR_COM2_EN; - __raw_writeb(reg, OMAP1510_FPGA_POWER); - udelay(10); - - platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); - spi_register_board_info(innovator1510_boardinfo, - ARRAY_SIZE(innovator1510_boardinfo)); - } -#endif -#ifdef CONFIG_ARCH_OMAP16XX - if (!cpu_is_omap1510()) { - innovator1610_smc91x_resources[1].start = gpio_to_irq(0); - innovator1610_smc91x_resources[1].end = gpio_to_irq(0); - platform_add_devices(innovator1610_devices, ARRAY_SIZE(innovator1610_devices)); - } -#endif - -#ifdef CONFIG_ARCH_OMAP15XX - if (cpu_is_omap1510()) { - omap1_usb_init(&innovator1510_usb_config); - omapfb_set_lcd_config(&innovator1510_lcd_config); - } -#endif -#ifdef CONFIG_ARCH_OMAP16XX - if (cpu_is_omap1610()) { - omap1_usb_init(&h2_usb_config); - omapfb_set_lcd_config(&innovator1610_lcd_config); - } -#endif - omap_serial_init(); - omap_register_i2c_bus(1, 100, NULL, 0); - innovator_mmc_init(); -} - -/* - * REVISIT: Assume 15xx for now, we don't want to do revision check - * until later on. The right way to fix this is to set up a different - * machine_id for 16xx Innovator, or use device tree. - */ -static void __init innovator_map_io(void) -{ -#ifdef CONFIG_ARCH_OMAP15XX - omap15xx_map_io(); - - iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc)); - udelay(10); /* Delay needed for FPGA */ - - /* Dump the Innovator FPGA rev early - useful info for support. */ - pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n", - __raw_readb(OMAP1510_FPGA_REV_HIGH), - __raw_readb(OMAP1510_FPGA_REV_LOW), - __raw_readb(OMAP1510_FPGA_BOARD_REV)); -#endif -} - -MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") - /* Maintainer: MontaVista Software, Inc. */ - .atag_offset = 0x100, - .map_io = innovator_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = innovator_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-nand.c b/arch/arm/mach-omap1/board-nand.c deleted file mode 100644 index 479ab9be784d..000000000000 --- a/arch/arm/mach-omap1/board-nand.c +++ /dev/null @@ -1,33 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-nand.c - * - * Common OMAP1 board NAND code - * - * Copyright (C) 2004, 2012 Texas Instruments, Inc. - * Copyright (C) 2002 MontaVista Software, Inc. - * Copyright (C) 2001 RidgeRun, Inc. - * Author: RidgeRun, Inc. - * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com - */ -#include <linux/kernel.h> -#include <linux/io.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> - -#include "common.h" - -void omap1_nand_cmd_ctl(struct nand_chip *this, int cmd, unsigned int ctrl) -{ - unsigned long mask; - - if (cmd == NAND_CMD_NONE) - return; - - mask = (ctrl & NAND_CLE) ? 0x02 : 0; - if (ctrl & NAND_ALE) - mask |= 0x04; - - writeb(cmd, this->legacy.IO_ADDR_W + mask); -} - diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 8e0e58495023..a501a473ffd6 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -288,7 +288,7 @@ static void __init omap_nokia770_init(void) MACHINE_START(NOKIA770, "Nokia 770") .atag_offset = 0x100, - .map_io = omap16xx_map_io, + .map_io = omap1_map_io, .init_early = omap1_init_early, .init_irq = omap1_init_irq, .handle_irq = omap1_handle_irq, diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 76684b7a4e87..df758c1f9237 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -339,267 +339,6 @@ static struct omap_usb_config osk_usb_config __initdata = { .pins[0] = 2, }; -#ifdef CONFIG_OMAP_OSK_MISTRAL -static const struct omap_lcd_config osk_lcd_config __initconst = { - .ctrl_name = "internal", -}; -#endif - -#ifdef CONFIG_OMAP_OSK_MISTRAL - -#include <linux/input.h> -#include <linux/property.h> -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> - -#include <linux/platform_data/keypad-omap.h> - -static const struct property_entry mistral_at24_properties[] = { - PROPERTY_ENTRY_U32("pagesize", 16), - { } -}; - -static const struct software_node mistral_at24_node = { - .properties = mistral_at24_properties, -}; - -static struct i2c_board_info __initdata mistral_i2c_board_info[] = { - { - /* NOTE: powered from LCD supply */ - I2C_BOARD_INFO("24c04", 0x50), - .swnode = &mistral_at24_node, - }, - /* TODO when driver support is ready: - * - optionally ov9640 camera sensor at 0x30 - */ -}; - -static const unsigned int osk_keymap[] = { - /* KEY(col, row, code) */ - KEY(0, 0, KEY_F1), /* SW4 */ - KEY(3, 0, KEY_UP), /* (sw2/up) */ - KEY(1, 1, KEY_LEFTCTRL), /* SW5 */ - KEY(2, 1, KEY_LEFT), /* (sw2/left) */ - KEY(0, 2, KEY_SPACE), /* SW3 */ - KEY(1, 2, KEY_ESC), /* SW6 */ - KEY(2, 2, KEY_DOWN), /* (sw2/down) */ - KEY(2, 3, KEY_ENTER), /* (sw2/select) */ - KEY(3, 3, KEY_RIGHT), /* (sw2/right) */ -}; - -static const struct matrix_keymap_data osk_keymap_data = { - .keymap = osk_keymap, - .keymap_size = ARRAY_SIZE(osk_keymap), -}; - -static struct omap_kp_platform_data osk_kp_data = { - .rows = 8, - .cols = 8, - .keymap_data = &osk_keymap_data, - .delay = 9, -}; - -static struct resource osk5912_kp_resources[] = { - [0] = { - .start = INT_KEYBOARD, - .end = INT_KEYBOARD, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device osk5912_kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &osk_kp_data, - }, - .num_resources = ARRAY_SIZE(osk5912_kp_resources), - .resource = osk5912_kp_resources, -}; - -static struct omap_backlight_config mistral_bl_data = { - .default_intensity = 0xa0, -}; - -static struct platform_device mistral_bl_device = { - .name = "omap-bl", - .id = -1, - .dev = { - .platform_data = &mistral_bl_data, - }, -}; - -static struct platform_device osk5912_lcd_device = { - .name = "lcd_osk", - .id = -1, -}; - -static const struct gpio_led mistral_gpio_led_pins[] = { - { - .name = "mistral:red", - .default_trigger = "heartbeat", - .gpio = 3, - }, - { - .name = "mistral:green", - .default_trigger = "cpu0", - .gpio = OMAP_MPUIO(4), - }, -}; - -static struct gpio_led_platform_data mistral_gpio_led_data = { - .leds = mistral_gpio_led_pins, - .num_leds = ARRAY_SIZE(mistral_gpio_led_pins), -}; - -static struct platform_device mistral_gpio_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mistral_gpio_led_data, - }, -}; - -static struct platform_device *mistral_devices[] __initdata = { - &osk5912_kp_device, - &mistral_bl_device, - &osk5912_lcd_device, - &mistral_gpio_leds, -}; - -static int mistral_get_pendown_state(void) -{ - return !gpio_get_value(4); -} - -static const struct ads7846_platform_data mistral_ts_info = { - .model = 7846, - .vref_delay_usecs = 100, /* internal, no capacitor */ - .x_plate_ohms = 419, - .y_plate_ohms = 486, - .get_pendown_state = mistral_get_pendown_state, -}; - -static struct spi_board_info __initdata mistral_boardinfo[] = { { - /* MicroWire (bus 2) CS0 has an ads7846e */ - .modalias = "ads7846", - .platform_data = &mistral_ts_info, - .max_speed_hz = 120000 /* max sample rate at 3V */ - * 26 /* command + data + overhead */, - .bus_num = 2, - .chip_select = 0, -} }; - -static irqreturn_t -osk_mistral_wake_interrupt(int irq, void *ignored) -{ - return IRQ_HANDLED; -} - -static void __init osk_mistral_init(void) -{ - /* NOTE: we could actually tell if there's a Mistral board - * attached, e.g. by trying to read something from the ads7846. - * But this arch_init() code is too early for that, since we - * can't talk to the ads or even the i2c eeprom. - */ - - /* parallel camera interface */ - omap_cfg_reg(J15_1610_CAM_LCLK); - omap_cfg_reg(J18_1610_CAM_D7); - omap_cfg_reg(J19_1610_CAM_D6); - omap_cfg_reg(J14_1610_CAM_D5); - omap_cfg_reg(K18_1610_CAM_D4); - omap_cfg_reg(K19_1610_CAM_D3); - omap_cfg_reg(K15_1610_CAM_D2); - omap_cfg_reg(K14_1610_CAM_D1); - omap_cfg_reg(L19_1610_CAM_D0); - omap_cfg_reg(L18_1610_CAM_VS); - omap_cfg_reg(L15_1610_CAM_HS); - omap_cfg_reg(M19_1610_CAM_RSTZ); - omap_cfg_reg(Y15_1610_CAM_OUTCLK); - - /* serial camera interface */ - omap_cfg_reg(H19_1610_CAM_EXCLK); - omap_cfg_reg(W13_1610_CCP_CLKM); - omap_cfg_reg(Y12_1610_CCP_CLKP); - /* CCP_DATAM CONFLICTS WITH UART1.TX (and serial console) */ - /* omap_cfg_reg(Y14_1610_CCP_DATAM); */ - omap_cfg_reg(W14_1610_CCP_DATAP); - - /* CAM_PWDN */ - if (gpio_request(11, "cam_pwdn") == 0) { - omap_cfg_reg(N20_1610_GPIO11); - gpio_direction_output(11, 0); - } else - pr_debug("OSK+Mistral: CAM_PWDN is awol\n"); - - - /* omap_cfg_reg(P19_1610_GPIO6); */ /* BUSY */ - gpio_request(6, "ts_busy"); - gpio_direction_input(6); - - omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ - gpio_request(4, "ts_int"); - gpio_direction_input(4); - irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING); - - mistral_boardinfo[0].irq = gpio_to_irq(4); - spi_register_board_info(mistral_boardinfo, - ARRAY_SIZE(mistral_boardinfo)); - - /* the sideways button (SW1) is for use as a "wakeup" button - * - * NOTE: The Mistral board has the wakeup button (SW1) wired - * to the LCD 3.3V rail, which is powered down during suspend. - * To allow this button to wake up the omap, work around this - * HW bug by rewiring SW1 to use the main 3.3V rail. - */ - omap_cfg_reg(N15_1610_MPUIO2); - if (gpio_request(OMAP_MPUIO(2), "wakeup") == 0) { - int ret = 0; - int irq = gpio_to_irq(OMAP_MPUIO(2)); - - gpio_direction_input(OMAP_MPUIO(2)); - irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); - /* share the IRQ in case someone wants to use the - * button for more than wakeup from system sleep. - */ - ret = request_irq(irq, - &osk_mistral_wake_interrupt, - IRQF_SHARED, "mistral_wakeup", - &osk_mistral_wake_interrupt); - if (ret != 0) { - gpio_free(OMAP_MPUIO(2)); - printk(KERN_ERR "OSK+Mistral: no wakeup irq, %d?\n", - ret); - } else - enable_irq_wake(irq); - } else - printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n"); - - /* LCD: backlight, and power; power controls other devices on the - * board, like the touchscreen, EEPROM, and wakeup (!) switch. - */ - omap_cfg_reg(PWL); - if (gpio_request(2, "lcd_pwr") == 0) - gpio_direction_output(2, 1); - - /* - * GPIO based LEDs - */ - omap_cfg_reg(P18_1610_GPIO3); - omap_cfg_reg(MPUIO4); - - i2c_register_board_info(1, mistral_i2c_board_info, - ARRAY_SIZE(mistral_i2c_board_info)); - - platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices)); -} -#else -static void __init osk_mistral_init(void) { } -#endif - #define EMIFS_CS3_VAL (0x88013141) static void __init osk_init(void) @@ -642,18 +381,12 @@ static void __init osk_init(void) osk_i2c_board_info[0].irq = gpio_to_irq(OMAP_MPUIO(1)); omap_register_i2c_bus(1, 400, osk_i2c_board_info, ARRAY_SIZE(osk_i2c_board_info)); - osk_mistral_init(); - -#ifdef CONFIG_OMAP_OSK_MISTRAL - omapfb_set_lcd_config(&osk_lcd_config); -#endif - } MACHINE_START(OMAP_OSK, "TI-OSK") /* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */ .atag_offset = 0x100, - .map_io = omap16xx_map_io, + .map_io = omap1_map_io, .init_early = omap1_init_early, .init_irq = omap1_init_irq, .handle_irq = omap1_handle_irq, diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 72e1979c7a8b..f79c497f04d5 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -256,7 +256,7 @@ static void __init omap_palmte_init(void) MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") .atag_offset = 0x100, - .map_io = omap15xx_map_io, + .map_io = omap1_map_io, .init_early = omap1_init_early, .init_irq = omap1_init_irq, .handle_irq = omap1_handle_irq, diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c deleted file mode 100644 index 537f0e6a2ff7..000000000000 --- a/arch/arm/mach-omap1/board-palmtt.c +++ /dev/null @@ -1,285 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-palmtt.c - * - * Modified from board-palmtt2.c - * - * Modified and amended for Palm Tungsten|T - * by Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/notifier.h> -#include <linux/clk.h> -#include <linux/input.h> -#include <linux/interrupt.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/leds.h> -#include <linux/omapfb.h> -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> -#include <linux/omap-dma.h> -#include <linux/platform_data/omap1_bl.h> -#include <linux/platform_data/leds-omap.h> -#include <linux/platform_data/keypad-omap.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "tc.h" -#include "flash.h" -#include "mux.h" -#include "hardware.h" -#include "usb.h" -#include "common.h" - -#define PALMTT_USBDETECT_GPIO 0 -#define PALMTT_CABLE_GPIO 1 -#define PALMTT_LED_GPIO 3 -#define PALMTT_PENIRQ_GPIO 6 -#define PALMTT_MMC_WP_GPIO 8 -#define PALMTT_HDQ_GPIO 11 - -static const unsigned int palmtt_keymap[] = { - KEY(0, 0, KEY_ESC), - KEY(1, 0, KEY_SPACE), - KEY(2, 0, KEY_LEFTCTRL), - KEY(3, 0, KEY_TAB), - KEY(4, 0, KEY_ENTER), - KEY(0, 1, KEY_LEFT), - KEY(1, 1, KEY_DOWN), - KEY(2, 1, KEY_UP), - KEY(3, 1, KEY_RIGHT), - KEY(0, 2, KEY_SLEEP), - KEY(4, 2, KEY_Y), -}; - -static struct mtd_partition palmtt_partitions[] = { - { - .name = "write8k", - .offset = 0, - .size = SZ_8K, - .mask_flags = 0, - }, - { - .name = "PalmOS-BootLoader(ro)", - .offset = SZ_8K, - .size = 7 * SZ_8K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "u-boot", - .offset = MTDPART_OFS_APPEND, - .size = 8 * SZ_8K, - .mask_flags = 0, - }, - { - .name = "PalmOS-FS(ro)", - .offset = MTDPART_OFS_APPEND, - .size = 7 * SZ_1M + 4 * SZ_64K - 16 * SZ_8K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "u-boot(rez)", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = 0 - }, - { - .name = "empty", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - } -}; - -static struct physmap_flash_data palmtt_flash_data = { - .width = 2, - .set_vpp = omap1_set_vpp, - .parts = palmtt_partitions, - .nr_parts = ARRAY_SIZE(palmtt_partitions), -}; - -static struct resource palmtt_flash_resource = { - .start = OMAP_CS0_PHYS, - .end = OMAP_CS0_PHYS + SZ_8M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device palmtt_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &palmtt_flash_data, - }, - .num_resources = 1, - .resource = &palmtt_flash_resource, -}; - -static struct resource palmtt_kp_resources[] = { - [0] = { - .start = INT_KEYBOARD, - .end = INT_KEYBOARD, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct matrix_keymap_data palmtt_keymap_data = { - .keymap = palmtt_keymap, - .keymap_size = ARRAY_SIZE(palmtt_keymap), -}; - -static struct omap_kp_platform_data palmtt_kp_data = { - .rows = 6, - .cols = 3, - .keymap_data = &palmtt_keymap_data, -}; - -static struct platform_device palmtt_kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &palmtt_kp_data, - }, - .num_resources = ARRAY_SIZE(palmtt_kp_resources), - .resource = palmtt_kp_resources, -}; - -static struct platform_device palmtt_lcd_device = { - .name = "lcd_palmtt", - .id = -1, -}; - -static struct platform_device palmtt_spi_device = { - .name = "spi_palmtt", - .id = -1, -}; - -static struct omap_backlight_config palmtt_backlight_config = { - .default_intensity = 0xa0, -}; - -static struct platform_device palmtt_backlight_device = { - .name = "omap-bl", - .id = -1, - .dev = { - .platform_data= &palmtt_backlight_config, - }, -}; - -static struct omap_led_config palmtt_led_config[] = { - { - .cdev = { - .name = "palmtt:led0", - }, - .gpio = PALMTT_LED_GPIO, - }, -}; - -static struct omap_led_platform_data palmtt_led_data = { - .nr_leds = ARRAY_SIZE(palmtt_led_config), - .leds = palmtt_led_config, -}; - -static struct platform_device palmtt_led_device = { - .name = "omap-led", - .id = -1, - .dev = { - .platform_data = &palmtt_led_data, - }, -}; - -static struct platform_device *palmtt_devices[] __initdata = { - &palmtt_flash_device, - &palmtt_kp_device, - &palmtt_lcd_device, - &palmtt_spi_device, - &palmtt_backlight_device, - &palmtt_led_device, -}; - -static int palmtt_get_pendown_state(void) -{ - return !gpio_get_value(6); -} - -static const struct ads7846_platform_data palmtt_ts_info = { - .model = 7846, - .vref_delay_usecs = 100, /* internal, no capacitor */ - .x_plate_ohms = 419, - .y_plate_ohms = 486, - .get_pendown_state = palmtt_get_pendown_state, -}; - -static struct spi_board_info __initdata palmtt_boardinfo[] = { - { - /* MicroWire (bus 2) CS0 has an ads7846e */ - .modalias = "ads7846", - .platform_data = &palmtt_ts_info, - .max_speed_hz = 120000 /* max sample rate at 3V */ - * 26 /* command + data + overhead */, - .bus_num = 2, - .chip_select = 0, - } -}; - -static struct omap_usb_config palmtt_usb_config __initdata = { - .register_dev = 1, - .hmc_mode = 0, - .pins[0] = 2, -}; - -static const struct omap_lcd_config palmtt_lcd_config __initconst = { - .ctrl_name = "internal", -}; - -static void __init omap_mpu_wdt_mode(int mode) { - if (mode) - omap_writew(0x8000, OMAP_WDT_TIMER_MODE); - else { - omap_writew(0x00f5, OMAP_WDT_TIMER_MODE); - omap_writew(0x00a0, OMAP_WDT_TIMER_MODE); - } -} - -static void __init omap_palmtt_init(void) -{ - /* mux pins for uarts */ - omap_cfg_reg(UART1_TX); - omap_cfg_reg(UART1_RTS); - omap_cfg_reg(UART2_TX); - omap_cfg_reg(UART2_RTS); - omap_cfg_reg(UART3_TX); - omap_cfg_reg(UART3_RX); - - omap_mpu_wdt_mode(0); - - platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices)); - - palmtt_boardinfo[0].irq = gpio_to_irq(6); - spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); - omap_serial_init(); - omap1_usb_init(&palmtt_usb_config); - omap_register_i2c_bus(1, 100, NULL, 0); - - omapfb_set_lcd_config(&palmtt_lcd_config); -} - -MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") - .atag_offset = 0x100, - .map_io = omap15xx_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = omap_palmtt_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c deleted file mode 100644 index 47f08ae5a2f3..000000000000 --- a/arch/arm/mach-omap1/board-palmz71.c +++ /dev/null @@ -1,300 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-palmz71.c - * - * Modified from board-generic.c - * - * Support for the Palm Zire71 PDA. - * - * Original version : Laurent Gonzalez - * - * Modified for zire71 : Marek Vasut - */ - -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/notifier.h> -#include <linux/clk.h> -#include <linux/irq.h> -#include <linux/input.h> -#include <linux/interrupt.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/omapfb.h> -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> -#include <linux/platform_data/omap1_bl.h> -#include <linux/platform_data/keypad-omap.h> -#include <linux/omap-dma.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "tc.h" -#include "flash.h" -#include "mux.h" -#include "hardware.h" -#include "usb.h" -#include "common.h" - -#define PALMZ71_USBDETECT_GPIO 0 -#define PALMZ71_PENIRQ_GPIO 6 -#define PALMZ71_MMC_WP_GPIO 8 -#define PALMZ71_HDQ_GPIO 11 - -#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1) -#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2) -#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3) -#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4) - -static const unsigned int palmz71_keymap[] = { - KEY(0, 0, KEY_F1), - KEY(1, 0, KEY_F2), - KEY(2, 0, KEY_F3), - KEY(3, 0, KEY_F4), - KEY(4, 0, KEY_POWER), - KEY(0, 1, KEY_LEFT), - KEY(1, 1, KEY_DOWN), - KEY(2, 1, KEY_UP), - KEY(3, 1, KEY_RIGHT), - KEY(4, 1, KEY_ENTER), - KEY(0, 2, KEY_CAMERA), -}; - -static const struct matrix_keymap_data palmz71_keymap_data = { - .keymap = palmz71_keymap, - .keymap_size = ARRAY_SIZE(palmz71_keymap), -}; - -static struct omap_kp_platform_data palmz71_kp_data = { - .rows = 8, - .cols = 8, - .keymap_data = &palmz71_keymap_data, - .rep = true, - .delay = 80, -}; - -static struct resource palmz71_kp_resources[] = { - [0] = { - .start = INT_KEYBOARD, - .end = INT_KEYBOARD, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device palmz71_kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &palmz71_kp_data, - }, - .num_resources = ARRAY_SIZE(palmz71_kp_resources), - .resource = palmz71_kp_resources, -}; - -static struct mtd_partition palmz71_rom_partitions[] = { - /* PalmOS "Small ROM", contains the bootloader and the debugger */ - { - .name = "smallrom", - .offset = 0, - .size = 0xa000, - .mask_flags = MTD_WRITEABLE, - }, - /* PalmOS "Big ROM", a filesystem with all the OS code and data */ - { - .name = "bigrom", - .offset = SZ_128K, - /* - * 0x5f0000 bytes big in the multi-language ("EFIGS") version, - * 0x7b0000 bytes in the English-only ("enUS") version. - */ - .size = 0x7b0000, - .mask_flags = MTD_WRITEABLE, - }, -}; - -static struct physmap_flash_data palmz71_rom_data = { - .width = 2, - .set_vpp = omap1_set_vpp, - .parts = palmz71_rom_partitions, - .nr_parts = ARRAY_SIZE(palmz71_rom_partitions), -}; - -static struct resource palmz71_rom_resource = { - .start = OMAP_CS0_PHYS, - .end = OMAP_CS0_PHYS + SZ_8M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device palmz71_rom_device = { - .name = "physmap-flash", - .id = -1, - .dev = { - .platform_data = &palmz71_rom_data, - }, - .num_resources = 1, - .resource = &palmz71_rom_resource, -}; - -static struct platform_device palmz71_lcd_device = { - .name = "lcd_palmz71", - .id = -1, -}; - -static struct platform_device palmz71_spi_device = { - .name = "spi_palmz71", - .id = -1, -}; - -static struct omap_backlight_config palmz71_backlight_config = { - .default_intensity = 0xa0, -}; - -static struct platform_device palmz71_backlight_device = { - .name = "omap-bl", - .id = -1, - .dev = { - .platform_data = &palmz71_backlight_config, - }, -}; - -static struct platform_device *devices[] __initdata = { - &palmz71_rom_device, - &palmz71_kp_device, - &palmz71_lcd_device, - &palmz71_spi_device, - &palmz71_backlight_device, -}; - -static int -palmz71_get_pendown_state(void) -{ - return !gpio_get_value(PALMZ71_PENIRQ_GPIO); -} - -static const struct ads7846_platform_data palmz71_ts_info = { - .model = 7846, - .vref_delay_usecs = 100, /* internal, no capacitor */ - .x_plate_ohms = 419, - .y_plate_ohms = 486, - .get_pendown_state = palmz71_get_pendown_state, -}; - -static struct spi_board_info __initdata palmz71_boardinfo[] = { { - /* MicroWire (bus 2) CS0 has an ads7846e */ - .modalias = "ads7846", - .platform_data = &palmz71_ts_info, - .max_speed_hz = 120000 /* max sample rate at 3V */ - * 26 /* command + data + overhead */, - .bus_num = 2, - .chip_select = 0, -} }; - -static struct omap_usb_config palmz71_usb_config __initdata = { - .register_dev = 1, /* Mini-B only receptacle */ - .hmc_mode = 0, - .pins[0] = 2, -}; - -static const struct omap_lcd_config palmz71_lcd_config __initconst = { - .ctrl_name = "internal", -}; - -static irqreturn_t -palmz71_powercable(int irq, void *dev_id) -{ - if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) { - printk(KERN_INFO "PM: Power cable connected\n"); - irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), - IRQ_TYPE_EDGE_FALLING); - } else { - printk(KERN_INFO "PM: Power cable disconnected\n"); - irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), - IRQ_TYPE_EDGE_RISING); - } - return IRQ_HANDLED; -} - -static void __init -omap_mpu_wdt_mode(int mode) -{ - if (mode) - omap_writew(0x8000, OMAP_WDT_TIMER_MODE); - else { - omap_writew(0x00f5, OMAP_WDT_TIMER_MODE); - omap_writew(0x00a0, OMAP_WDT_TIMER_MODE); - } -} - -static void __init -palmz71_gpio_setup(int early) -{ - if (early) { - /* Only set GPIO1 so we have a working serial */ - gpio_direction_output(1, 1); - } else { - /* Set MMC/SD host WP pin as input */ - if (gpio_request(PALMZ71_MMC_WP_GPIO, "MMC WP") < 0) { - printk(KERN_ERR "Could not reserve WP GPIO!\n"); - return; - } - gpio_direction_input(PALMZ71_MMC_WP_GPIO); - - /* Monitor the Power-cable-connected signal */ - if (gpio_request(PALMZ71_USBDETECT_GPIO, "USB detect") < 0) { - printk(KERN_ERR - "Could not reserve cable signal GPIO!\n"); - return; - } - gpio_direction_input(PALMZ71_USBDETECT_GPIO); - if (request_irq(gpio_to_irq(PALMZ71_USBDETECT_GPIO), - palmz71_powercable, 0, "palmz71-cable", NULL)) - printk(KERN_ERR - "IRQ request for power cable failed!\n"); - palmz71_powercable(gpio_to_irq(PALMZ71_USBDETECT_GPIO), NULL); - } -} - -static void __init -omap_palmz71_init(void) -{ - /* mux pins for uarts */ - omap_cfg_reg(UART1_TX); - omap_cfg_reg(UART1_RTS); - omap_cfg_reg(UART2_TX); - omap_cfg_reg(UART2_RTS); - omap_cfg_reg(UART3_TX); - omap_cfg_reg(UART3_RX); - - palmz71_gpio_setup(1); - omap_mpu_wdt_mode(0); - - platform_add_devices(devices, ARRAY_SIZE(devices)); - - palmz71_boardinfo[0].irq = gpio_to_irq(PALMZ71_PENIRQ_GPIO); - spi_register_board_info(palmz71_boardinfo, - ARRAY_SIZE(palmz71_boardinfo)); - omap1_usb_init(&palmz71_usb_config); - omap_serial_init(); - omap_register_i2c_bus(1, 100, NULL, 0); - palmz71_gpio_setup(0); - - omapfb_set_lcd_config(&palmz71_lcd_config); -} - -MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") - .atag_offset = 0x100, - .map_io = omap15xx_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = omap_palmz71_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c deleted file mode 100644 index b041e6f6e9cf..000000000000 --- a/arch/arm/mach-omap1/board-perseus2.c +++ /dev/null @@ -1,333 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/board-perseus2.c - * - * Modified from board-generic.c - * - * Original OMAP730 support by Jean Pihet <j-pihet@ti.com> - * Updated for 2.6 by Kevin Hilman <kjh@hilman.org> - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/platnand.h> -#include <linux/mtd/physmap.h> -#include <linux/input.h> -#include <linux/smc91x.h> -#include <linux/omapfb.h> -#include <linux/platform_data/keypad-omap.h> -#include <linux/soc/ti/omap1-io.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "tc.h" -#include "mux.h" -#include "flash.h" -#include "hardware.h" -#include "iomap.h" -#include "common.h" -#include "fpga.h" - -static const unsigned int p2_keymap[] = { - KEY(0, 0, KEY_UP), - KEY(1, 0, KEY_RIGHT), - KEY(2, 0, KEY_LEFT), - KEY(3, 0, KEY_DOWN), - KEY(4, 0, KEY_ENTER), - KEY(0, 1, KEY_F10), - KEY(1, 1, KEY_SEND), - KEY(2, 1, KEY_END), - KEY(3, 1, KEY_VOLUMEDOWN), - KEY(4, 1, KEY_VOLUMEUP), - KEY(5, 1, KEY_RECORD), - KEY(0, 2, KEY_F9), - KEY(1, 2, KEY_3), - KEY(2, 2, KEY_6), - KEY(3, 2, KEY_9), - KEY(4, 2, KEY_KPDOT), - KEY(0, 3, KEY_BACK), - KEY(1, 3, KEY_2), - KEY(2, 3, KEY_5), - KEY(3, 3, KEY_8), - KEY(4, 3, KEY_0), - KEY(5, 3, KEY_KPSLASH), - KEY(0, 4, KEY_HOME), - KEY(1, 4, KEY_1), - KEY(2, 4, KEY_4), - KEY(3, 4, KEY_7), - KEY(4, 4, KEY_KPASTERISK), - KEY(5, 4, KEY_POWER), -}; - -static struct smc91x_platdata smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, - .leda = RPC_LED_100_10, - .ledb = RPC_LED_TX_RX, -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */ - .end = H2P2_DBG_FPGA_ETHR_START + 0xf, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = INT_7XX_MPU_EXT_NIRQ, - .end = 0, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -static struct mtd_partition nor_partitions[] = { - /* bootloader (U-Boot, etc) in first sector */ - { - .name = "bootloader", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* bootloader params in the next sector */ - { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = 0, - }, - /* kernel */ - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - .mask_flags = 0 - }, - /* rest of flash is a file system */ - { - .name = "rootfs", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - }, -}; - -static struct physmap_flash_data nor_data = { - .width = 2, - .set_vpp = omap1_set_vpp, - .parts = nor_partitions, - .nr_parts = ARRAY_SIZE(nor_partitions), -}; - -static struct resource nor_resource = { - .start = OMAP_CS0_PHYS, - .end = OMAP_CS0_PHYS + SZ_32M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device nor_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &nor_data, - }, - .num_resources = 1, - .resource = &nor_resource, -}; - -#define P2_NAND_RB_GPIO_PIN 62 - -static int nand_dev_ready(struct nand_chip *chip) -{ - return gpio_get_value(P2_NAND_RB_GPIO_PIN); -} - -static struct platform_nand_data nand_data = { - .chip = { - .nr_chips = 1, - .chip_offset = 0, - .options = NAND_SAMSUNG_LP_OPTIONS, - }, - .ctrl = { - .cmd_ctrl = omap1_nand_cmd_ctl, - .dev_ready = nand_dev_ready, - }, -}; - -static struct resource nand_resource = { - .start = OMAP_CS3_PHYS, - .end = OMAP_CS3_PHYS + SZ_4K - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device nand_device = { - .name = "gen_nand", - .id = 0, - .dev = { - .platform_data = &nand_data, - }, - .num_resources = 1, - .resource = &nand_resource, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .dev = { - .platform_data = &smc91x_info, - }, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static struct resource kp_resources[] = { - [0] = { - .start = INT_7XX_MPUIO_KEYPAD, - .end = INT_7XX_MPUIO_KEYPAD, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct matrix_keymap_data p2_keymap_data = { - .keymap = p2_keymap, - .keymap_size = ARRAY_SIZE(p2_keymap), -}; - -static struct omap_kp_platform_data kp_data = { - .rows = 8, - .cols = 8, - .keymap_data = &p2_keymap_data, - .delay = 4, - .dbounce = true, -}; - -static struct platform_device kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &kp_data, - }, - .num_resources = ARRAY_SIZE(kp_resources), - .resource = kp_resources, -}; - -static struct platform_device *devices[] __initdata = { - &nor_device, - &nand_device, - &smc91x_device, - &kp_device, -}; - -static const struct omap_lcd_config perseus2_lcd_config __initconst = { - .ctrl_name = "internal", -}; - -static void __init perseus2_init_smc91x(void) -{ - __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET); - mdelay(50); - __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1, - H2P2_DBG_FPGA_LAN_RESET); - mdelay(50); -} - -static void __init omap_perseus2_init(void) -{ - /* Early, board-dependent init */ - - /* - * Hold GSM Reset until needed - */ - omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); - - /* - * UARTs -> done automagically by 8250 driver - */ - - /* - * CSx timings, GPIO Mux ... setup - */ - - /* Flash: CS0 timings setup */ - omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); - omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); - - /* - * Ethernet support through the debug board - * CS1 timings setup - */ - omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); - omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); - - /* - * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, - * It is used as the Ethernet controller interrupt - */ - omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, - OMAP7XX_IO_CONF_9); - - perseus2_init_smc91x(); - - BUG_ON(gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0); - gpio_direction_input(P2_NAND_RB_GPIO_PIN); - - omap_cfg_reg(L3_1610_FLASH_CS2B_OE); - omap_cfg_reg(M8_1610_FLASH_CS2B_WE); - - /* Mux pins for keypad */ - omap_cfg_reg(E2_7XX_KBR0); - omap_cfg_reg(J7_7XX_KBR1); - omap_cfg_reg(E1_7XX_KBR2); - omap_cfg_reg(F3_7XX_KBR3); - omap_cfg_reg(D2_7XX_KBR4); - omap_cfg_reg(C2_7XX_KBC0); - omap_cfg_reg(D3_7XX_KBC1); - omap_cfg_reg(E4_7XX_KBC2); - omap_cfg_reg(F4_7XX_KBC3); - omap_cfg_reg(E3_7XX_KBC4); - - if (IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)) { - /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ - int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000; - omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9); - } - - platform_add_devices(devices, ARRAY_SIZE(devices)); - - omap_serial_init(); - omap_register_i2c_bus(1, 100, NULL, 0); - - omapfb_set_lcd_config(&perseus2_lcd_config); -} - -/* Only FPGA needs to be mapped here. All others are done with ioremap */ -static struct map_desc omap_perseus2_io_desc[] __initdata = { - { - .virtual = H2P2_DBG_FPGA_BASE, - .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START), - .length = H2P2_DBG_FPGA_SIZE, - .type = MT_DEVICE - } -}; - -static void __init omap_perseus2_map_io(void) -{ - omap7xx_map_io(); - iotable_init(omap_perseus2_io_desc, - ARRAY_SIZE(omap_perseus2_io_desc)); -} - -MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") - /* Maintainer: Kevin Hilman <kjh@hilman.org> */ - .atag_offset = 0x100, - .map_io = omap_perseus2_map_io, - .init_early = omap1_init_early, - .init_irq = omap1_init_irq, - .handle_irq = omap1_handle_irq, - .init_machine = omap_perseus2_init, - .init_late = omap1_init_late, - .init_time = omap1_timer_init, - .restart = omap1_restart, -MACHINE_END diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index f0dbb0e8d8e7..0c0cdd5e77c7 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -335,7 +335,7 @@ static void __init omap_sx1_init(void) MACHINE_START(SX1, "OMAP310 based Siemens SX1") .atag_offset = 0x100, - .map_io = omap15xx_map_io, + .map_io = omap1_map_io, .init_early = omap1_init_early, .init_irq = omap1_init_irq, .handle_irq = omap1_handle_irq, diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 96d846c37c43..c58d200e4816 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -720,8 +720,6 @@ int __init omap1_clk_init(void) cpu_mask |= CK_16XX; if (cpu_is_omap1510()) cpu_mask |= CK_1510; - if (cpu_is_omap7xx()) - cpu_mask |= CK_7XX; if (cpu_is_omap310()) cpu_mask |= CK_310; @@ -730,9 +728,6 @@ int __init omap1_clk_init(void) ck_dpll1_p = &ck_dpll1; ck_ref_p = &ck_ref; - if (cpu_is_omap7xx()) - ck_ref.rate = 13000000; - pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), omap_readw(ARM_CKCTL)); @@ -771,12 +766,6 @@ int __init omap1_clk_init(void) } } - if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { - /* Select slicer output as OMAP input clock */ - omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, - OMAP7XX_PCC_UPLD_CTRL); - } - /* Amstrad Delta wants BCLK high when inactive */ if (machine_is_ams_delta()) omap_writel(omap_readl(ULPD_CLOCK_CTRL) | @@ -784,11 +773,7 @@ int __init omap1_clk_init(void) ULPD_CLOCK_CTRL); /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ - /* (on 730, bit 13 must not be cleared) */ - if (cpu_is_omap7xx()) - omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); - else - omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); + omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); /* Put DSP/MPUI into reset until needed */ omap_writew(0, ARM_RSTCT1); diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index 5ceff05e15c0..7a7c3d9eb84a 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -35,34 +35,6 @@ #include "soc.h" #include "i2c.h" -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) -void omap7xx_map_io(void); -#else -static inline void omap7xx_map_io(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP15XX -void omap1510_fpga_init_irq(void); -void omap15xx_map_io(void); -#else -static inline void omap1510_fpga_init_irq(void) -{ -} -static inline void omap15xx_map_io(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP16XX -void omap16xx_map_io(void); -#else -static inline void omap16xx_map_io(void) -{ -} -#endif - #ifdef CONFIG_OMAP_SERIAL_WAKE int omap_serial_wakeup_init(void); #else @@ -72,6 +44,7 @@ static inline int omap_serial_wakeup_init(void) } #endif +void omap1_map_io(void); void omap1_init_early(void); void omap1_init_irq(void); void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs); diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 80e94770582a..5304699c7a97 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -21,7 +21,6 @@ #include "tc.h" #include "mux.h" -#include "omap7xx.h" #include "hardware.h" #include "common.h" #include "clock.h" @@ -63,8 +62,6 @@ static void omap_init_rtc(void) static inline void omap_init_rtc(void) {} #endif -static inline void omap_init_mbox(void) { } - /*-------------------------------------------------------------------------*/ #if IS_ENABLED(CONFIG_MMC_OMAP) @@ -73,22 +70,16 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, int controller_nr) { if (controller_nr == 0) { - if (cpu_is_omap7xx()) { - omap_cfg_reg(MMC_7XX_CMD); - omap_cfg_reg(MMC_7XX_CLK); - omap_cfg_reg(MMC_7XX_DAT0); - } else { - omap_cfg_reg(MMC_CMD); - omap_cfg_reg(MMC_CLK); - omap_cfg_reg(MMC_DAT0); - } + omap_cfg_reg(MMC_CMD); + omap_cfg_reg(MMC_CLK); + omap_cfg_reg(MMC_DAT0); if (cpu_is_omap1710()) { omap_cfg_reg(M15_1710_MMC_CLKI); omap_cfg_reg(P19_1710_MMC_CMDDIR); omap_cfg_reg(P20_1710_MMC_DATDIR0); } - if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) { + if (mmc_controller->slots[0].wires == 4) { omap_cfg_reg(MMC_DAT1); /* NOTE: DAT2 can be on W10 (here) or M15 */ if (!mmc_controller->slots[0].nomux) @@ -154,8 +145,6 @@ static int __init omap_mmc_add(const char *name, int id, unsigned long base, res[3].name = "tx"; res[3].flags = IORESOURCE_DMA; - if (cpu_is_omap7xx()) - data->slots[0].features = MMC_OMAP7XX; if (cpu_is_omap15xx()) data->slots[0].features = MMC_OMAP15XX; if (cpu_is_omap16xx()) @@ -224,43 +213,6 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, /*-------------------------------------------------------------------------*/ -/* OMAP7xx SPI support */ -#if IS_ENABLED(CONFIG_SPI_OMAP_100K) - -struct platform_device omap_spi1 = { - .name = "omap1_spi100k", - .id = 1, -}; - -struct platform_device omap_spi2 = { - .name = "omap1_spi100k", - .id = 2, -}; - -static void omap_init_spi100k(void) -{ - if (!cpu_is_omap7xx()) - return; - - omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); - if (omap_spi1.dev.platform_data) - platform_device_register(&omap_spi1); - - omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); - if (omap_spi2.dev.platform_data) - platform_device_register(&omap_spi2); -} - -#else -static inline void omap_init_spi100k(void) -{ -} -#endif - -/*-------------------------------------------------------------------------*/ - -static inline void omap_init_sti(void) {} - /* Numbering for the SPI-capable controllers when used for SPI: * spi = 1 * uwire = 2 @@ -363,10 +315,7 @@ static int __init omap1_init_devices(void) * in alphabetical order so they're easier to sort through. */ - omap_init_mbox(); omap_init_rtc(); - omap_init_spi100k(); - omap_init_sti(); omap_init_uwire(); omap1_init_rng(); diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c index c3f280c3c5d7..756966cb715f 100644 --- a/arch/arm/mach-omap1/dma.c +++ b/arch/arm/mach-omap1/dma.c @@ -261,22 +261,6 @@ static const struct platform_device_info omap_dma_dev_info = { .num_res = 1, }; -/* OMAP730, OMAP850 */ -static const struct dma_slave_map omap7xx_sdma_map[] = { - { "omap-mcbsp.1", "tx", SDMA_FILTER_PARAM(8) }, - { "omap-mcbsp.1", "rx", SDMA_FILTER_PARAM(9) }, - { "omap-mcbsp.2", "tx", SDMA_FILTER_PARAM(10) }, - { "omap-mcbsp.2", "rx", SDMA_FILTER_PARAM(11) }, - { "mmci-omap.0", "tx", SDMA_FILTER_PARAM(21) }, - { "mmci-omap.0", "rx", SDMA_FILTER_PARAM(22) }, - { "omap_udc", "rx0", SDMA_FILTER_PARAM(26) }, - { "omap_udc", "rx1", SDMA_FILTER_PARAM(27) }, - { "omap_udc", "rx2", SDMA_FILTER_PARAM(28) }, - { "omap_udc", "tx0", SDMA_FILTER_PARAM(29) }, - { "omap_udc", "tx1", SDMA_FILTER_PARAM(30) }, - { "omap_udc", "tx2", SDMA_FILTER_PARAM(31) }, -}; - /* OMAP1510, OMAP1610*/ static const struct dma_slave_map omap1xxx_sdma_map[] = { { "omap-mcbsp.1", "tx", SDMA_FILTER_PARAM(8) }, @@ -371,13 +355,8 @@ static int __init omap1_system_dma_init(void) p.dma_attr = d; p.errata = configure_dma_errata(); - if (cpu_is_omap7xx()) { - p.slave_map = omap7xx_sdma_map; - p.slavecnt = ARRAY_SIZE(omap7xx_sdma_map); - } else { - p.slave_map = omap1xxx_sdma_map; - p.slavecnt = ARRAY_SIZE(omap1xxx_sdma_map); - } + p.slave_map = omap1xxx_sdma_map; + p.slavecnt = ARRAY_SIZE(omap1xxx_sdma_map); ret = platform_device_add_data(pdev, &p, sizeof(p)); if (ret) { diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c deleted file mode 100644 index 4c71a195969f..000000000000 --- a/arch/arm/mach-omap1/fpga.c +++ /dev/null @@ -1,186 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/fpga.c - * - * Interrupt handler for OMAP-1510 Innovator FPGA - * - * Copyright (C) 2001 RidgeRun, Inc. - * Author: Greg Lonnon <glonnon@ridgerun.com> - * - * Copyright (C) 2002 MontaVista Software, Inc. - * - * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 - * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> - */ - -#include <linux/types.h> -#include <linux/gpio.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/errno.h> -#include <linux/io.h> - -#include <asm/irq.h> -#include <asm/mach/irq.h> - -#include "hardware.h" -#include "iomap.h" -#include "common.h" -#include "fpga.h" - -static void fpga_mask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE; - - if (irq < 8) - __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) - & ~(1 << irq)), OMAP1510_FPGA_IMR_LO); - else if (irq < 16) - __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI) - & ~(1 << (irq - 8))), OMAP1510_FPGA_IMR_HI); - else - __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2) - & ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2); -} - - -static inline u32 get_fpga_unmasked_irqs(void) -{ - return - ((__raw_readb(OMAP1510_FPGA_ISR_LO) & - __raw_readb(OMAP1510_FPGA_IMR_LO))) | - ((__raw_readb(OMAP1510_FPGA_ISR_HI) & - __raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) | - ((__raw_readb(INNOVATOR_FPGA_ISR2) & - __raw_readb(INNOVATOR_FPGA_IMR2)) << 16); -} - - -static void fpga_ack_irq(struct irq_data *d) -{ - /* Don't need to explicitly ACK FPGA interrupts */ -} - -static void fpga_unmask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE; - - if (irq < 8) - __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)), - OMAP1510_FPGA_IMR_LO); - else if (irq < 16) - __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI) - | (1 << (irq - 8))), OMAP1510_FPGA_IMR_HI); - else - __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2) - | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2); -} - -static void fpga_mask_ack_irq(struct irq_data *d) -{ - fpga_mask_irq(d); - fpga_ack_irq(d); -} - -static void innovator_fpga_IRQ_demux(struct irq_desc *desc) -{ - u32 stat; - int fpga_irq; - - stat = get_fpga_unmasked_irqs(); - - if (!stat) - return; - - for (fpga_irq = OMAP_FPGA_IRQ_BASE; - (fpga_irq < OMAP_FPGA_IRQ_END) && stat; - fpga_irq++, stat >>= 1) { - if (stat & 1) { - generic_handle_irq(fpga_irq); - } - } -} - -static struct irq_chip omap_fpga_irq_ack = { - .name = "FPGA-ack", - .irq_ack = fpga_mask_ack_irq, - .irq_mask = fpga_mask_irq, - .irq_unmask = fpga_unmask_irq, -}; - - -static struct irq_chip omap_fpga_irq = { - .name = "FPGA", - .irq_ack = fpga_ack_irq, - .irq_mask = fpga_mask_irq, - .irq_unmask = fpga_unmask_irq, -}; - -/* - * All of the FPGA interrupt request inputs except for the touchscreen are - * edge-sensitive; the touchscreen is level-sensitive. The edge-sensitive - * interrupts are acknowledged as a side-effect of reading the interrupt - * status register from the FPGA. The edge-sensitive interrupt inputs - * cause a problem with level interrupt requests, such as Ethernet. The - * problem occurs when a level interrupt request is asserted while its - * interrupt input is masked in the FPGA, which results in a missed - * interrupt. - * - * In an attempt to workaround the problem with missed interrupts, the - * mask_ack routine for all of the FPGA interrupts has been changed from - * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt - * being serviced is left unmasked. We can do this because the FPGA cascade - * interrupt is run with all interrupts masked. - * - * Limited testing indicates that this workaround appears to be effective - * for the smc9194 Ethernet driver used on the Innovator. It should work - * on other FPGA interrupts as well, but any drivers that explicitly mask - * interrupts at the interrupt controller via disable_irq/enable_irq - * could pose a problem. - */ -void omap1510_fpga_init_irq(void) -{ - int i, res; - - __raw_writeb(0, OMAP1510_FPGA_IMR_LO); - __raw_writeb(0, OMAP1510_FPGA_IMR_HI); - __raw_writeb(0, INNOVATOR_FPGA_IMR2); - - for (i = OMAP_FPGA_IRQ_BASE; i < OMAP_FPGA_IRQ_END; i++) { - - if (i == OMAP1510_INT_FPGA_TS) { - /* - * The touchscreen interrupt is level-sensitive, so - * we'll use the regular mask_ack routine for it. - */ - irq_set_chip(i, &omap_fpga_irq_ack); - } - else { - /* - * All FPGA interrupts except the touchscreen are - * edge-sensitive, so we won't mask them. - */ - irq_set_chip(i, &omap_fpga_irq); - } - - irq_set_handler(i, handle_edge_irq); - irq_clear_status_flags(i, IRQ_NOREQUEST); - } - - /* - * The FPGA interrupt line is connected to GPIO13. Claim this pin for - * the ARM. - * - * NOTE: For general GPIO/MPUIO access and interrupts, please see - * gpio.[ch] - */ - res = gpio_request(13, "FPGA irq"); - if (res) { - pr_err("%s failed to get gpio\n", __func__); - return; - } - gpio_direction_input(13); - irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); - irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); -} diff --git a/arch/arm/mach-omap1/fpga.h b/arch/arm/mach-omap1/fpga.h deleted file mode 100644 index 7e7450edacc1..000000000000 --- a/arch/arm/mach-omap1/fpga.h +++ /dev/null @@ -1,49 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Interrupt handler for OMAP-1510 FPGA - * - * Copyright (C) 2001 RidgeRun, Inc. - * Author: Greg Lonnon <glonnon@ridgerun.com> - * - * Copyright (C) 2002 MontaVista Software, Inc. - * - * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 - * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> - */ - -#ifndef __ASM_ARCH_OMAP_FPGA_H -#define __ASM_ARCH_OMAP_FPGA_H - -/* - * --------------------------------------------------------------------------- - * H2/P2 Debug board FPGA - * --------------------------------------------------------------------------- - */ -/* maps in the FPGA registers and the ETHR registers */ -#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ -#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ -#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ - -#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) -#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ -#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */ -#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */ -#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */ -#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */ -#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */ -#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */ - -/* LEDs definition on debug board (16 LEDs, all physically green) */ -#define H2P2_DBG_FPGA_LED_GREEN (1 << 15) -#define H2P2_DBG_FPGA_LED_AMBER (1 << 14) -#define H2P2_DBG_FPGA_LED_RED (1 << 13) -#define H2P2_DBG_FPGA_LED_BLUE (1 << 12) -/* cpu0 load-meter LEDs */ -#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ... -#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 -#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) - -#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0) -#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1) - -#endif diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c deleted file mode 100644 index c372b357eab4..000000000000 --- a/arch/arm/mach-omap1/gpio7xx.c +++ /dev/null @@ -1,272 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * OMAP7xx specific gpio init - * - * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ - * - * Author: - * Charulatha V <charu@ti.com> - */ - -#include <linux/gpio.h> -#include <linux/platform_data/gpio-omap.h> - -#include "irqs.h" -#include "soc.h" - -#define OMAP7XX_GPIO1_BASE 0xfffbc000 -#define OMAP7XX_GPIO2_BASE 0xfffbc800 -#define OMAP7XX_GPIO3_BASE 0xfffbd000 -#define OMAP7XX_GPIO4_BASE 0xfffbd800 -#define OMAP7XX_GPIO5_BASE 0xfffbe000 -#define OMAP7XX_GPIO6_BASE 0xfffbe800 -#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE - -/* mpu gpio */ -static struct resource omap7xx_mpu_gpio_resources[] = { - { - .start = OMAP1_MPUIO_VBASE, - .end = OMAP1_MPUIO_VBASE + SZ_2K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_7XX_MPUIO, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { - .revision = USHRT_MAX, - .direction = OMAP_MPUIO_IO_CNTL / 2, - .datain = OMAP_MPUIO_INPUT_LATCH / 2, - .dataout = OMAP_MPUIO_OUTPUT / 2, - .irqstatus = OMAP_MPUIO_GPIO_INT / 2, - .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2, - .irqenable_inv = true, - .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE >> 1, -}; - -static struct omap_gpio_platform_data omap7xx_mpu_gpio_config = { - .is_mpuio = true, - .bank_width = 16, - .bank_stride = 2, - .regs = &omap7xx_mpuio_regs, -}; - -static struct platform_device omap7xx_mpu_gpio = { - .name = "omap_gpio", - .id = 0, - .dev = { - .platform_data = &omap7xx_mpu_gpio_config, - }, - .num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources), - .resource = omap7xx_mpu_gpio_resources, -}; - -/* gpio1 */ -static struct resource omap7xx_gpio1_resources[] = { - { - .start = OMAP7XX_GPIO1_BASE, - .end = OMAP7XX_GPIO1_BASE + SZ_2K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_7XX_GPIO_BANK1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct omap_gpio_reg_offs omap7xx_gpio_regs = { - .revision = USHRT_MAX, - .direction = OMAP7XX_GPIO_DIR_CONTROL, - .datain = OMAP7XX_GPIO_DATA_INPUT, - .dataout = OMAP7XX_GPIO_DATA_OUTPUT, - .irqstatus = OMAP7XX_GPIO_INT_STATUS, - .irqenable = OMAP7XX_GPIO_INT_MASK, - .irqenable_inv = true, - .irqctrl = OMAP7XX_GPIO_INT_CONTROL, -}; - -static struct omap_gpio_platform_data omap7xx_gpio1_config = { - .bank_width = 32, - .regs = &omap7xx_gpio_regs, -}; - -static struct platform_device omap7xx_gpio1 = { - .name = "omap_gpio", - .id = 1, - .dev = { - .platform_data = &omap7xx_gpio1_config, - }, - .num_resources = ARRAY_SIZE(omap7xx_gpio1_resources), - .resource = omap7xx_gpio1_resources, -}; - -/* gpio2 */ -static struct resource omap7xx_gpio2_resources[] = { - { - .start = OMAP7XX_GPIO2_BASE, - .end = OMAP7XX_GPIO2_BASE + SZ_2K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_7XX_GPIO_BANK2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct omap_gpio_platform_data omap7xx_gpio2_config = { - .bank_width = 32, - .regs = &omap7xx_gpio_regs, -}; - -static struct platform_device omap7xx_gpio2 = { - .name = "omap_gpio", - .id = 2, - .dev = { - .platform_data = &omap7xx_gpio2_config, - }, - .num_resources = ARRAY_SIZE(omap7xx_gpio2_resources), - .resource = omap7xx_gpio2_resources, -}; - -/* gpio3 */ -static struct resource omap7xx_gpio3_resources[] = { - { - .start = OMAP7XX_GPIO3_BASE, - .end = OMAP7XX_GPIO3_BASE + SZ_2K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_7XX_GPIO_BANK3, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct omap_gpio_platform_data omap7xx_gpio3_config = { - .bank_width = 32, - .regs = &omap7xx_gpio_regs, -}; - -static struct platform_device omap7xx_gpio3 = { - .name = "omap_gpio", - .id = 3, - .dev = { - .platform_data = &omap7xx_gpio3_config, - }, - .num_resources = ARRAY_SIZE(omap7xx_gpio3_resources), - .resource = omap7xx_gpio3_resources, -}; - -/* gpio4 */ -static struct resource omap7xx_gpio4_resources[] = { - { - .start = OMAP7XX_GPIO4_BASE, - .end = OMAP7XX_GPIO4_BASE + SZ_2K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_7XX_GPIO_BANK4, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct omap_gpio_platform_data omap7xx_gpio4_config = { - .bank_width = 32, - .regs = &omap7xx_gpio_regs, -}; - -static struct platform_device omap7xx_gpio4 = { - .name = "omap_gpio", - .id = 4, - .dev = { - .platform_data = &omap7xx_gpio4_config, - }, - .num_resources = ARRAY_SIZE(omap7xx_gpio4_resources), - .resource = omap7xx_gpio4_resources, -}; - -/* gpio5 */ -static struct resource omap7xx_gpio5_resources[] = { - { - .start = OMAP7XX_GPIO5_BASE, - .end = OMAP7XX_GPIO5_BASE + SZ_2K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_7XX_GPIO_BANK5, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct omap_gpio_platform_data omap7xx_gpio5_config = { - .bank_width = 32, - .regs = &omap7xx_gpio_regs, -}; - -static struct platform_device omap7xx_gpio5 = { - .name = "omap_gpio", - .id = 5, - .dev = { - .platform_data = &omap7xx_gpio5_config, - }, - .num_resources = ARRAY_SIZE(omap7xx_gpio5_resources), - .resource = omap7xx_gpio5_resources, -}; - -/* gpio6 */ -static struct resource omap7xx_gpio6_resources[] = { - { - .start = OMAP7XX_GPIO6_BASE, - .end = OMAP7XX_GPIO6_BASE + SZ_2K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_7XX_GPIO_BANK6, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct omap_gpio_platform_data omap7xx_gpio6_config = { - .bank_width = 32, - .regs = &omap7xx_gpio_regs, -}; - -static struct platform_device omap7xx_gpio6 = { - .name = "omap_gpio", - .id = 6, - .dev = { - .platform_data = &omap7xx_gpio6_config, - }, - .num_resources = ARRAY_SIZE(omap7xx_gpio6_resources), - .resource = omap7xx_gpio6_resources, -}; - -static struct platform_device *omap7xx_gpio_dev[] __initdata = { - &omap7xx_mpu_gpio, - &omap7xx_gpio1, - &omap7xx_gpio2, - &omap7xx_gpio3, - &omap7xx_gpio4, - &omap7xx_gpio5, - &omap7xx_gpio6, -}; - -/* - * omap7xx_gpio_init needs to be done before - * machine_init functions access gpio APIs. - * Hence omap7xx_gpio_init is a postcore_initcall. - */ -static int __init omap7xx_gpio_init(void) -{ - int i; - - if (!cpu_is_omap7xx()) - return -EINVAL; - - for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++) - platform_device_register(omap7xx_gpio_dev[i]); - - return 0; -} -postcore_initcall(omap7xx_gpio_init); diff --git a/arch/arm/mach-omap1/hardware.h b/arch/arm/mach-omap1/hardware.h index c228234a1ed4..0aa571c9e0eb 100644 --- a/arch/arm/mach-omap1/hardware.h +++ b/arch/arm/mach-omap1/hardware.h @@ -114,6 +114,10 @@ static inline u32 omap_cs3_phys(void) #define OMAP_IH1_BASE 0xfffecb00 #define OMAP_IH2_BASE 0xfffe0000 +#define OMAP_IH2_0_BASE (0xfffe0000) +#define OMAP_IH2_1_BASE (0xfffe0100) +#define OMAP_IH2_2_BASE (0xfffe0200) +#define OMAP_IH2_3_BASE (0xfffe0300) #define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00) #define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04) @@ -131,6 +135,38 @@ static inline u32 omap_cs3_phys(void) #define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c) #define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c) +#define OMAP_IH2_0_ITR (OMAP_IH2_0_BASE + 0x00) +#define OMAP_IH2_0_MIR (OMAP_IH2_0_BASE + 0x04) +#define OMAP_IH2_0_SIR_IRQ (OMAP_IH2_0_BASE + 0x10) +#define OMAP_IH2_0_SIR_FIQ (OMAP_IH2_0_BASE + 0x14) +#define OMAP_IH2_0_CONTROL (OMAP_IH2_0_BASE + 0x18) +#define OMAP_IH2_0_ILR0 (OMAP_IH2_0_BASE + 0x1c) +#define OMAP_IH2_0_ISR (OMAP_IH2_0_BASE + 0x9c) + +#define OMAP_IH2_1_ITR (OMAP_IH2_1_BASE + 0x00) +#define OMAP_IH2_1_MIR (OMAP_IH2_1_BASE + 0x04) +#define OMAP_IH2_1_SIR_IRQ (OMAP_IH2_1_BASE + 0x10) +#define OMAP_IH2_1_SIR_FIQ (OMAP_IH2_1_BASE + 0x14) +#define OMAP_IH2_1_CONTROL (OMAP_IH2_1_BASE + 0x18) +#define OMAP_IH2_1_ILR1 (OMAP_IH2_1_BASE + 0x1c) +#define OMAP_IH2_1_ISR (OMAP_IH2_1_BASE + 0x9c) + +#define OMAP_IH2_2_ITR (OMAP_IH2_2_BASE + 0x00) +#define OMAP_IH2_2_MIR (OMAP_IH2_2_BASE + 0x04) +#define OMAP_IH2_2_SIR_IRQ (OMAP_IH2_2_BASE + 0x10) +#define OMAP_IH2_2_SIR_FIQ (OMAP_IH2_2_BASE + 0x14) +#define OMAP_IH2_2_CONTROL (OMAP_IH2_2_BASE + 0x18) +#define OMAP_IH2_2_ILR2 (OMAP_IH2_2_BASE + 0x1c) +#define OMAP_IH2_2_ISR (OMAP_IH2_2_BASE + 0x9c) + +#define OMAP_IH2_3_ITR (OMAP_IH2_3_BASE + 0x00) +#define OMAP_IH2_3_MIR (OMAP_IH2_3_BASE + 0x04) +#define OMAP_IH2_3_SIR_IRQ (OMAP_IH2_3_BASE + 0x10) +#define OMAP_IH2_3_SIR_FIQ (OMAP_IH2_3_BASE + 0x14) +#define OMAP_IH2_3_CONTROL (OMAP_IH2_3_BASE + 0x18) +#define OMAP_IH2_3_ILR3 (OMAP_IH2_3_BASE + 0x1c) +#define OMAP_IH2_3_ISR (OMAP_IH2_3_BASE + 0x9c) + #define IRQ_ITR_REG_OFFSET 0x00 #define IRQ_MIR_REG_OFFSET 0x04 #define IRQ_SIR_IRQ_REG_OFFSET 0x10 @@ -184,12 +220,16 @@ static inline u32 omap_cs3_phys(void) /* * --------------------------------------------------------------------------- - * Processor specific defines + * DSP * --------------------------------------------------------------------------- */ -#include "omap7xx.h" -#include "omap1510.h" -#include "omap16xx.h" +#define OMAP1_DSP_BASE 0xE0000000 +#define OMAP1_DSP_SIZE 0x28000 +#define OMAP1_DSP_START 0xE0000000 + +#define OMAP1_DSPREG_BASE 0xE1000000 +#define OMAP1_DSPREG_SIZE SZ_128K +#define OMAP1_DSPREG_START 0xE1000000 #endif /* __ASM_ARCH_OMAP_HARDWARE_H */ diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c index 22f945360599..94d3e7883e02 100644 --- a/arch/arm/mach-omap1/i2c.c +++ b/arch/arm/mach-omap1/i2c.c @@ -25,13 +25,8 @@ static struct platform_device omap_i2c_devices[1] = { static void __init omap1_i2c_mux_pins(int bus_id) { - if (cpu_is_omap7xx()) { - omap_cfg_reg(I2C_7XX_SDA); - omap_cfg_reg(I2C_7XX_SCL); - } else { - omap_cfg_reg(I2C_SDA); - omap_cfg_reg(I2C_SCL); - } + omap_cfg_reg(I2C_SDA); + omap_cfg_reg(I2C_SCL); } int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata, @@ -68,10 +63,7 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata, /* how the cpu bus is wired up differs for 7xx only */ - if (cpu_is_omap7xx()) - pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1; - else - pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2; + pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2; pdev->dev.platform_data = pdata; diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 0074b011a05a..1f20fe99be57 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -22,92 +22,32 @@ * The machine specific code may provide the extra mapping besides the * default mapping provided here. */ -#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) -static struct map_desc omap7xx_io_desc[] __initdata = { +static struct map_desc omap1_io_desc[] __initdata = { { .virtual = OMAP1_IO_VIRT, .pfn = __phys_to_pfn(OMAP1_IO_PHYS), .length = OMAP1_IO_SIZE, .type = MT_DEVICE - }, - { - .virtual = OMAP7XX_DSP_BASE, - .pfn = __phys_to_pfn(OMAP7XX_DSP_START), - .length = OMAP7XX_DSP_SIZE, - .type = MT_DEVICE - }, { - .virtual = OMAP7XX_DSPREG_BASE, - .pfn = __phys_to_pfn(OMAP7XX_DSPREG_START), - .length = OMAP7XX_DSPREG_SIZE, - .type = MT_DEVICE - } -}; -#endif - -#ifdef CONFIG_ARCH_OMAP15XX -static struct map_desc omap1510_io_desc[] __initdata = { - { - .virtual = OMAP1_IO_VIRT, - .pfn = __phys_to_pfn(OMAP1_IO_PHYS), - .length = OMAP1_IO_SIZE, - .type = MT_DEVICE - }, - { - .virtual = OMAP1510_DSP_BASE, - .pfn = __phys_to_pfn(OMAP1510_DSP_START), - .length = OMAP1510_DSP_SIZE, - .type = MT_DEVICE }, { - .virtual = OMAP1510_DSPREG_BASE, - .pfn = __phys_to_pfn(OMAP1510_DSPREG_START), - .length = OMAP1510_DSPREG_SIZE, - .type = MT_DEVICE - } -}; -#endif - -#if defined(CONFIG_ARCH_OMAP16XX) -static struct map_desc omap16xx_io_desc[] __initdata = { - { - .virtual = OMAP1_IO_VIRT, - .pfn = __phys_to_pfn(OMAP1_IO_PHYS), - .length = OMAP1_IO_SIZE, - .type = MT_DEVICE - }, - { - .virtual = OMAP16XX_DSP_BASE, - .pfn = __phys_to_pfn(OMAP16XX_DSP_START), - .length = OMAP16XX_DSP_SIZE, + .virtual = OMAP1_DSP_BASE, + .pfn = __phys_to_pfn(OMAP1_DSP_START), + .length = OMAP1_DSP_SIZE, .type = MT_DEVICE }, { - .virtual = OMAP16XX_DSPREG_BASE, - .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START), - .length = OMAP16XX_DSPREG_SIZE, + .virtual = OMAP1_DSPREG_BASE, + .pfn = __phys_to_pfn(OMAP1_DSPREG_START), + .length = OMAP1_DSPREG_SIZE, .type = MT_DEVICE } }; -#endif -#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) -void __init omap7xx_map_io(void) -{ - iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc)); -} -#endif - -#ifdef CONFIG_ARCH_OMAP15XX -void __init omap15xx_map_io(void) -{ - iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); -} -#endif - -#if defined(CONFIG_ARCH_OMAP16XX) -void __init omap16xx_map_io(void) +/* + * Maps common IO regions for omap1 + */ +void __init omap1_map_io(void) { - iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc)); + iotable_init(omap1_io_desc, ARRAY_SIZE(omap1_io_desc)); } -#endif /* * Common low-level hardware init for omap1. diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 70868e9f19ac..9ccc784fd614 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -110,14 +110,6 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger) irq_bank_writel(val, bank, offset); } -#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) -static struct omap_irq_bank omap7xx_irq_banks[] = { - { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, - { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, - { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, -}; -#endif - #ifdef CONFIG_ARCH_OMAP15XX static struct omap_irq_bank omap1510_irq_banks[] = { { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, @@ -194,12 +186,6 @@ void __init omap1_init_irq(void) int i, j, irq_base; unsigned long nr_irqs; -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) - if (cpu_is_omap7xx()) { - irq_banks = omap7xx_irq_banks; - irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks); - } -#endif #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap1510()) { irq_banks = omap1510_irq_banks; @@ -230,7 +216,7 @@ void __init omap1_init_irq(void) pr_warn("Couldn't allocate IRQ numbers\n"); irq_base = 0; } - omap_l2_irq = cpu_is_omap7xx() ? irq_base + 1 : irq_base; + omap_l2_irq = irq_base; omap_l2_irq -= NR_IRQS_LEGACY; domain = irq_domain_add_legacy(NULL, nr_irqs, irq_base, 0, @@ -249,10 +235,6 @@ void __init omap1_init_irq(void) irq_bank_writel(0x03, 0, IRQ_CONTROL_REG_OFFSET); irq_bank_writel(0x03, 1, IRQ_CONTROL_REG_OFFSET); - /* Enable interrupts in global mask */ - if (cpu_is_omap7xx()) - irq_bank_writel(0x0, 0, IRQ_GMR_REG_OFFSET); - /* Install the interrupt handlers for each bank */ for (i = 0; i < irq_bank_count; i++) { for (j = i * 32; j < (i + 1) * 32; j++) { diff --git a/arch/arm/mach-omap1/irqs.h b/arch/arm/mach-omap1/irqs.h index 2851acfe5ff3..3ab7050b1b6b 100644 --- a/arch/arm/mach-omap1/irqs.h +++ b/arch/arm/mach-omap1/irqs.h @@ -231,15 +231,6 @@ #define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) #define OMAP_IRQ_END (IH_MPUIO_BASE + 16) -/* External FPGA handles interrupts on Innovator boards */ -#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END) -#ifdef CONFIG_MACH_OMAP_INNOVATOR -#define OMAP_FPGA_NR_IRQS 24 -#else -#define OMAP_FPGA_NR_IRQS 0 -#endif -#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS) - #define OMAP_IRQ_BIT(irq) (1 << ((irq - NR_IRQS_LEGACY) % 32)) #ifdef CONFIG_FIQ diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index b1632cbe37e6..37863bdce9ea 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -89,76 +89,6 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { #define OMAP1610_MCBSP2_BASE 0xfffb1000 #define OMAP1610_MCBSP3_BASE 0xe1017000 -struct resource omap7xx_mcbsp_res[][6] = { - { - { - .start = OMAP7XX_MCBSP1_BASE, - .end = OMAP7XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_7XX_McBSP1RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_7XX_McBSP1TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = 9, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = 8, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP7XX_MCBSP2_BASE, - .end = OMAP7XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_7XX_McBSP2RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_7XX_McBSP2TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = 11, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = 10, - .flags = IORESOURCE_DMA, - }, - }, -}; - -#define omap7xx_mcbsp_res_0 omap7xx_mcbsp_res[0] - -static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = { - { - .ops = &omap1_mcbsp_ops, - }, - { - .ops = &omap1_mcbsp_ops, - }, -}; -#define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1]) -#define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res) - struct resource omap15xx_mcbsp_res[][6] = { { { @@ -397,12 +327,6 @@ static int __init omap1_mcbsp_init(void) if (!cpu_class_is_omap1()) return -ENODEV; - if (cpu_is_omap7xx()) - omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0, - OMAP7XX_MCBSP_RES_SZ, - omap7xx_mcbsp_pdata, - OMAP7XX_MCBSP_COUNT); - if (cpu_is_omap15xx()) omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res_0, OMAP15XX_MCBSP_RES_SZ, diff --git a/arch/arm/mach-omap1/mtd-xip.h b/arch/arm/mach-omap1/mtd-xip.h index 5ae312ff08a1..cbeda46dd526 100644 --- a/arch/arm/mach-omap1/mtd-xip.h +++ b/arch/arm/mach-omap1/mtd-xip.h @@ -42,11 +42,7 @@ static inline unsigned long xip_omap_mpu_timer_read(int nr) * (see linux/mtd/xip.h) */ -#ifdef CONFIG_MACH_OMAP_PERSEUS2 -#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 7) -#else #define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 6) -#endif /* * xip_cpu_idle() is used when waiting for a delay equal or larger than diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 2d9458ff1d29..4456fbc8aa3d 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -21,52 +21,6 @@ static struct omap_mux_cfg arch_mux_cfg; -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) -static struct pin_config omap7xx_pins[] = { -MUX_CFG_7XX("E2_7XX_KBR0", 12, 21, 0, 20, 1, 0) -MUX_CFG_7XX("J7_7XX_KBR1", 12, 25, 0, 24, 1, 0) -MUX_CFG_7XX("E1_7XX_KBR2", 12, 29, 0, 28, 1, 0) -MUX_CFG_7XX("F3_7XX_KBR3", 13, 1, 0, 0, 1, 0) -MUX_CFG_7XX("D2_7XX_KBR4", 13, 5, 0, 4, 1, 0) -MUX_CFG_7XX("C2_7XX_KBC0", 13, 9, 0, 8, 1, 0) -MUX_CFG_7XX("D3_7XX_KBC1", 13, 13, 0, 12, 1, 0) -MUX_CFG_7XX("E4_7XX_KBC2", 13, 17, 0, 16, 1, 0) -MUX_CFG_7XX("F4_7XX_KBC3", 13, 21, 0, 20, 1, 0) -MUX_CFG_7XX("E3_7XX_KBC4", 13, 25, 0, 24, 1, 0) - -MUX_CFG_7XX("AA17_7XX_USB_DM", 2, 21, 0, 20, 0, 0) -MUX_CFG_7XX("W16_7XX_USB_PU_EN", 2, 25, 0, 24, 0, 0) -MUX_CFG_7XX("W17_7XX_USB_VBUSI", 2, 29, 6, 28, 1, 0) -MUX_CFG_7XX("W18_7XX_USB_DMCK_OUT",3, 3, 1, 2, 0, 0) -MUX_CFG_7XX("W19_7XX_USB_DCRST", 3, 7, 1, 6, 0, 0) - -/* MMC Pins */ -MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0) -MUX_CFG_7XX("MMC_7XX_CLK", 2, 13, 0, 12, 1, 0) -MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0) - -/* I2C interface */ -MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0) -MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0) - -/* SPI pins */ -MUX_CFG_7XX("SPI_7XX_1", 6, 5, 4, 4, 1, 0) -MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0) -MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) -MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) -MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) -MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) - -/* UART pins */ -MUX_CFG_7XX("UART_7XX_1", 3, 21, 0, 20, 0, 0) -MUX_CFG_7XX("UART_7XX_2", 8, 1, 6, 0, 0, 0) -}; -#define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) -#else -#define omap7xx_pins NULL -#define OMAP7XX_PINS_SZ 0 -#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ - #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) static struct pin_config omap1xxx_pins[] = { /* @@ -489,12 +443,6 @@ EXPORT_SYMBOL(omap_cfg_reg); int __init omap1_mux_init(void) { - if (cpu_is_omap7xx()) { - arch_mux_cfg.pins = omap7xx_pins; - arch_mux_cfg.size = OMAP7XX_PINS_SZ; - arch_mux_cfg.cfg_reg = omap1_cfg_reg; - } - if (cpu_is_omap15xx() || cpu_is_omap16xx()) { arch_mux_cfg.pins = omap1xxx_pins; arch_mux_cfg.size = OMAP1XXX_PINS_SZ; diff --git a/arch/arm/mach-omap1/omap1510.h b/arch/arm/mach-omap1/omap1510.h deleted file mode 100644 index 3d235244bf5c..000000000000 --- a/arch/arm/mach-omap1/omap1510.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * Hardware definitions for TI OMAP1510 processor. - * - * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP15XX_H -#define __ASM_ARCH_OMAP15XX_H - -/* - * ---------------------------------------------------------------------------- - * Base addresses - * ---------------------------------------------------------------------------- - */ - -/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ - -#define OMAP1510_DSP_BASE 0xE0000000 -#define OMAP1510_DSP_SIZE 0x28000 -#define OMAP1510_DSP_START 0xE0000000 - -#define OMAP1510_DSPREG_BASE 0xE1000000 -#define OMAP1510_DSPREG_SIZE SZ_128K -#define OMAP1510_DSPREG_START 0xE1000000 - -#define OMAP1510_DSP_MMU_BASE (0xfffed200) - -/* - * --------------------------------------------------------------------------- - * OMAP-1510 FPGA - * --------------------------------------------------------------------------- - */ -#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */ -#define OMAP1510_FPGA_SIZE SZ_4K -#define OMAP1510_FPGA_START 0x08000000 /* PA */ - -/* Revision */ -#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0) -#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1) -#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2) -#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3) -#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4) -#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5) - -/* Interrupt status */ -#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6) -#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7) - -/* Interrupt mask */ -#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8) -#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9) - -/* Reset registers */ -#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa) -#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb) - -#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc) -#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe) -#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf) -#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14) -#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15) -#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16) -#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18) -#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c) -#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100) -#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101) -#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102) - -#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204) - -#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205) -#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206) -#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207) -#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208) -#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209) -#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a) -#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b) -#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d) -#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e) -#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210) - -#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300) - -/* - * Power up Giga UART driver, turn on HID clock. - * Turn off BT power, since we're not using it and it - * draws power. - */ -#define OMAP1510_FPGA_RESET_VALUE 0x42 - -#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7) -#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6) -#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5) -#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4) -#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3) -#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2) -#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1) -#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0) - -/* - * Innovator/OMAP1510 FPGA HID register bit definitions - */ -#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */ -#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */ -#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */ -#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */ -#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */ -#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */ -#define OMAP1510_FPGA_HID_rsrvd (1<<6) -#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */ - -/* The FPGA IRQ is cascaded through GPIO_13 */ -#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13) - -/* IRQ Numbers for interrupts muxed through the FPGA */ -#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0) -#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1) -#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2) -#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3) -#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4) -#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5) -#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6) -#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7) -#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8) -#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9) -#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10) -#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11) -#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12) -#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13) -#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14) -#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15) -#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16) -#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17) -#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18) -#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19) -#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20) -#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21) -#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22) -#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23) - -#endif /* __ASM_ARCH_OMAP15XX_H */ - diff --git a/arch/arm/mach-omap1/omap16xx.h b/arch/arm/mach-omap1/omap16xx.h deleted file mode 100644 index cd1c724869c7..000000000000 --- a/arch/arm/mach-omap1/omap16xx.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Hardware definitions for TI OMAP1610/5912/1710 processors. - * - * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP16XX_H -#define __ASM_ARCH_OMAP16XX_H - -/* - * ---------------------------------------------------------------------------- - * Base addresses - * ---------------------------------------------------------------------------- - */ - -/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ - -#define OMAP16XX_DSP_BASE 0xE0000000 -#define OMAP16XX_DSP_SIZE 0x28000 -#define OMAP16XX_DSP_START 0xE0000000 - -#define OMAP16XX_DSPREG_BASE 0xE1000000 -#define OMAP16XX_DSPREG_SIZE SZ_128K -#define OMAP16XX_DSPREG_START 0xE1000000 - -#define OMAP16XX_SEC_BASE 0xFFFE4000 -#define OMAP16XX_SEC_DES (OMAP16XX_SEC_BASE + 0x0000) -#define OMAP16XX_SEC_SHA1MD5 (OMAP16XX_SEC_BASE + 0x0800) -#define OMAP16XX_SEC_RNG (OMAP16XX_SEC_BASE + 0x1000) - -/* - * --------------------------------------------------------------------------- - * Interrupts - * --------------------------------------------------------------------------- - */ -#define OMAP_IH2_0_BASE (0xfffe0000) -#define OMAP_IH2_1_BASE (0xfffe0100) -#define OMAP_IH2_2_BASE (0xfffe0200) -#define OMAP_IH2_3_BASE (0xfffe0300) - -#define OMAP_IH2_0_ITR (OMAP_IH2_0_BASE + 0x00) -#define OMAP_IH2_0_MIR (OMAP_IH2_0_BASE + 0x04) -#define OMAP_IH2_0_SIR_IRQ (OMAP_IH2_0_BASE + 0x10) -#define OMAP_IH2_0_SIR_FIQ (OMAP_IH2_0_BASE + 0x14) -#define OMAP_IH2_0_CONTROL (OMAP_IH2_0_BASE + 0x18) -#define OMAP_IH2_0_ILR0 (OMAP_IH2_0_BASE + 0x1c) -#define OMAP_IH2_0_ISR (OMAP_IH2_0_BASE + 0x9c) - -#define OMAP_IH2_1_ITR (OMAP_IH2_1_BASE + 0x00) -#define OMAP_IH2_1_MIR (OMAP_IH2_1_BASE + 0x04) -#define OMAP_IH2_1_SIR_IRQ (OMAP_IH2_1_BASE + 0x10) -#define OMAP_IH2_1_SIR_FIQ (OMAP_IH2_1_BASE + 0x14) -#define OMAP_IH2_1_CONTROL (OMAP_IH2_1_BASE + 0x18) -#define OMAP_IH2_1_ILR1 (OMAP_IH2_1_BASE + 0x1c) -#define OMAP_IH2_1_ISR (OMAP_IH2_1_BASE + 0x9c) - -#define OMAP_IH2_2_ITR (OMAP_IH2_2_BASE + 0x00) -#define OMAP_IH2_2_MIR (OMAP_IH2_2_BASE + 0x04) -#define OMAP_IH2_2_SIR_IRQ (OMAP_IH2_2_BASE + 0x10) -#define OMAP_IH2_2_SIR_FIQ (OMAP_IH2_2_BASE + 0x14) -#define OMAP_IH2_2_CONTROL (OMAP_IH2_2_BASE + 0x18) -#define OMAP_IH2_2_ILR2 (OMAP_IH2_2_BASE + 0x1c) -#define OMAP_IH2_2_ISR (OMAP_IH2_2_BASE + 0x9c) - -#define OMAP_IH2_3_ITR (OMAP_IH2_3_BASE + 0x00) -#define OMAP_IH2_3_MIR (OMAP_IH2_3_BASE + 0x04) -#define OMAP_IH2_3_SIR_IRQ (OMAP_IH2_3_BASE + 0x10) -#define OMAP_IH2_3_SIR_FIQ (OMAP_IH2_3_BASE + 0x14) -#define OMAP_IH2_3_CONTROL (OMAP_IH2_3_BASE + 0x18) -#define OMAP_IH2_3_ILR3 (OMAP_IH2_3_BASE + 0x1c) -#define OMAP_IH2_3_ISR (OMAP_IH2_3_BASE + 0x9c) - -/* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define OMAP16XX_ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -/* - * ---------------------------------------------------------------------------- - * Pin configuration registers - * ---------------------------------------------------------------------------- - */ -#define OMAP16XX_CONF_VOLTAGE_VDDSHV6 (1 << 8) -#define OMAP16XX_CONF_VOLTAGE_VDDSHV7 (1 << 9) -#define OMAP16XX_CONF_VOLTAGE_VDDSHV8 (1 << 10) -#define OMAP16XX_CONF_VOLTAGE_VDDSHV9 (1 << 11) -#define OMAP16XX_SUBLVDS_CONF_VALID (1 << 13) - -/* - * ---------------------------------------------------------------------------- - * System control registers - * ---------------------------------------------------------------------------- - */ -#define OMAP1610_RESET_CONTROL 0xfffe1140 - -/* - * --------------------------------------------------------------------------- - * TIPB bus interface - * --------------------------------------------------------------------------- - */ -#define TIPB_SWITCH_BASE (0xfffbc800) -#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160) - -/* UART3 Registers Mapping through MPU bus */ -#define UART3_RHR (OMAP1_UART3_BASE + 0) -#define UART3_THR (OMAP1_UART3_BASE + 0) -#define UART3_DLL (OMAP1_UART3_BASE + 0) -#define UART3_IER (OMAP1_UART3_BASE + 4) -#define UART3_DLH (OMAP1_UART3_BASE + 4) -#define UART3_IIR (OMAP1_UART3_BASE + 8) -#define UART3_FCR (OMAP1_UART3_BASE + 8) -#define UART3_EFR (OMAP1_UART3_BASE + 8) -#define UART3_LCR (OMAP1_UART3_BASE + 0x0C) -#define UART3_MCR (OMAP1_UART3_BASE + 0x10) -#define UART3_XON1_ADDR1 (OMAP1_UART3_BASE + 0x10) -#define UART3_XON2_ADDR2 (OMAP1_UART3_BASE + 0x14) -#define UART3_LSR (OMAP1_UART3_BASE + 0x14) -#define UART3_TCR (OMAP1_UART3_BASE + 0x18) -#define UART3_MSR (OMAP1_UART3_BASE + 0x18) -#define UART3_XOFF1 (OMAP1_UART3_BASE + 0x18) -#define UART3_XOFF2 (OMAP1_UART3_BASE + 0x1C) -#define UART3_SPR (OMAP1_UART3_BASE + 0x1C) -#define UART3_TLR (OMAP1_UART3_BASE + 0x1C) -#define UART3_MDR1 (OMAP1_UART3_BASE + 0x20) -#define UART3_MDR2 (OMAP1_UART3_BASE + 0x24) -#define UART3_SFLSR (OMAP1_UART3_BASE + 0x28) -#define UART3_TXFLL (OMAP1_UART3_BASE + 0x28) -#define UART3_RESUME (OMAP1_UART3_BASE + 0x2C) -#define UART3_TXFLH (OMAP1_UART3_BASE + 0x2C) -#define UART3_SFREGL (OMAP1_UART3_BASE + 0x30) -#define UART3_RXFLL (OMAP1_UART3_BASE + 0x30) -#define UART3_SFREGH (OMAP1_UART3_BASE + 0x34) -#define UART3_RXFLH (OMAP1_UART3_BASE + 0x34) -#define UART3_BLR (OMAP1_UART3_BASE + 0x38) -#define UART3_ACREG (OMAP1_UART3_BASE + 0x3C) -#define UART3_DIV16 (OMAP1_UART3_BASE + 0x3C) -#define UART3_SCR (OMAP1_UART3_BASE + 0x40) -#define UART3_SSR (OMAP1_UART3_BASE + 0x44) -#define UART3_EBLR (OMAP1_UART3_BASE + 0x48) -#define UART3_OSC_12M_SEL (OMAP1_UART3_BASE + 0x4C) -#define UART3_MVR (OMAP1_UART3_BASE + 0x50) - -/* - * --------------------------------------------------------------------------- - * Watchdog timer - * --------------------------------------------------------------------------- - */ - -/* 32-bit Watchdog timer in OMAP 16XX */ -#define OMAP_16XX_WATCHDOG_BASE (0xfffeb000) -#define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00) -#define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10) -#define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14) -#define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24) -#define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28) -#define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c) -#define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30) -#define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34) -#define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48) - -#define WCLR_PRE_SHIFT 5 -#define WCLR_PTV_SHIFT 2 - -#define WWPS_W_PEND_WSPR (1 << 4) -#define WWPS_W_PEND_WTGR (1 << 3) -#define WWPS_W_PEND_WLDR (1 << 2) -#define WWPS_W_PEND_WCRR (1 << 1) -#define WWPS_W_PEND_WCLR (1 << 0) - -#define WSPR_ENABLE_0 (0x0000bbbb) -#define WSPR_ENABLE_1 (0x00004444) -#define WSPR_DISABLE_0 (0x0000aaaa) -#define WSPR_DISABLE_1 (0x00005555) - -#define OMAP16XX_DSP_MMU_BASE (0xfffed200) -#define OMAP16XX_MAILBOX_BASE (0xfffcf000) - -#endif /* __ASM_ARCH_OMAP16XX_H */ - diff --git a/arch/arm/mach-omap1/omap7xx.h b/arch/arm/mach-omap1/omap7xx.h deleted file mode 100644 index 63da994bc609..000000000000 --- a/arch/arm/mach-omap1/omap7xx.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Hardware definitions for TI OMAP7XX processor. - * - * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com> - * Adapted for omap850 by Zebediah C. McClure <zmc@lurian.net> - * Adapted for omap7xx by Alistair Buxton <a.j.buxton@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP7XX_H -#define __ASM_ARCH_OMAP7XX_H - -/* - * ---------------------------------------------------------------------------- - * Base addresses - * ---------------------------------------------------------------------------- - */ - -/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ - -#define OMAP7XX_DSP_BASE 0xE0000000 -#define OMAP7XX_DSP_SIZE 0x50000 -#define OMAP7XX_DSP_START 0xE0000000 - -#define OMAP7XX_DSPREG_BASE 0xE1000000 -#define OMAP7XX_DSPREG_SIZE SZ_128K -#define OMAP7XX_DSPREG_START 0xE1000000 - -#define OMAP7XX_SPI1_BASE 0xfffc0800 -#define OMAP7XX_SPI2_BASE 0xfffc1000 - -/* - * ---------------------------------------------------------------------------- - * OMAP7XX specific configuration registers - * ---------------------------------------------------------------------------- - */ -#define OMAP7XX_CONFIG_BASE 0xfffe1000 -#define OMAP7XX_IO_CONF_0 0xfffe1070 -#define OMAP7XX_IO_CONF_1 0xfffe1074 -#define OMAP7XX_IO_CONF_2 0xfffe1078 -#define OMAP7XX_IO_CONF_3 0xfffe107c -#define OMAP7XX_IO_CONF_4 0xfffe1080 -#define OMAP7XX_IO_CONF_5 0xfffe1084 -#define OMAP7XX_IO_CONF_6 0xfffe1088 -#define OMAP7XX_IO_CONF_7 0xfffe108c -#define OMAP7XX_IO_CONF_8 0xfffe1090 -#define OMAP7XX_IO_CONF_9 0xfffe1094 -#define OMAP7XX_IO_CONF_10 0xfffe1098 -#define OMAP7XX_IO_CONF_11 0xfffe109c -#define OMAP7XX_IO_CONF_12 0xfffe10a0 -#define OMAP7XX_IO_CONF_13 0xfffe10a4 - -#define OMAP7XX_MODE_1 0xfffe1010 -#define OMAP7XX_MODE_2 0xfffe1014 - -/* CSMI specials: in terms of base + offset */ -#define OMAP7XX_MODE2_OFFSET 0x14 - -/* - * ---------------------------------------------------------------------------- - * OMAP7XX traffic controller configuration registers - * ---------------------------------------------------------------------------- - */ -#define OMAP7XX_FLASH_CFG_0 0xfffecc10 -#define OMAP7XX_FLASH_ACFG_0 0xfffecc50 -#define OMAP7XX_FLASH_CFG_1 0xfffecc14 -#define OMAP7XX_FLASH_ACFG_1 0xfffecc54 - -/* - * ---------------------------------------------------------------------------- - * OMAP7XX DSP control registers - * ---------------------------------------------------------------------------- - */ -#define OMAP7XX_ICR_BASE 0xfffbb800 -#define OMAP7XX_DSP_M_CTL 0xfffbb804 -#define OMAP7XX_DSP_MMU_BASE 0xfffed200 - -/* - * ---------------------------------------------------------------------------- - * OMAP7XX PCC_UPLD configuration registers - * ---------------------------------------------------------------------------- - */ -#define OMAP7XX_PCC_UPLD_CTRL_BASE (0xfffe0900) -#define OMAP7XX_PCC_UPLD_CTRL (OMAP7XX_PCC_UPLD_CTRL_BASE + 0x00) - -#endif /* __ASM_ARCH_OMAP7XX_H */ - diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index fce7d2b572bf..9761d8404949 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -69,7 +69,6 @@ static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; -static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; @@ -166,10 +165,7 @@ static void omap_pm_wakeup_setup(void) * drivers must still separately call omap_set_gpio_wakeup() to * wake up to a GPIO interrupt. */ - if (cpu_is_omap7xx()) - level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) | - OMAP_IRQ_BIT(INT_7XX_IH2_IRQ); - else if (cpu_is_omap15xx()) + if (cpu_is_omap15xx()) level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); else if (cpu_is_omap16xx()) @@ -178,12 +174,7 @@ static void omap_pm_wakeup_setup(void) omap_writel(~level1_wake, OMAP_IH1_MIR); - if (cpu_is_omap7xx()) { - omap_writel(~level2_wake, OMAP_IH2_0_MIR); - omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) | - OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)), - OMAP_IH2_1_MIR); - } else if (cpu_is_omap15xx()) { + if (cpu_is_omap15xx()) { level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); omap_writel(~level2_wake, OMAP_IH2_MIR); } else if (cpu_is_omap16xx()) { @@ -236,17 +227,7 @@ void omap1_pm_suspend(void) * Save interrupt, MPUI, ARM and UPLD control registers. */ - if (cpu_is_omap7xx()) { - MPUI7XX_SAVE(OMAP_IH1_MIR); - MPUI7XX_SAVE(OMAP_IH2_0_MIR); - MPUI7XX_SAVE(OMAP_IH2_1_MIR); - MPUI7XX_SAVE(MPUI_CTRL); - MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); - MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); - MPUI7XX_SAVE(EMIFS_CONFIG); - MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); - - } else if (cpu_is_omap15xx()) { + if (cpu_is_omap15xx()) { MPUI1510_SAVE(OMAP_IH1_MIR); MPUI1510_SAVE(OMAP_IH2_MIR); MPUI1510_SAVE(MPUI_CTRL); @@ -288,9 +269,8 @@ void omap1_pm_suspend(void) /* stop DSP */ omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); - /* shut down dsp_ck */ - if (!cpu_is_omap7xx()) - omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); + /* shut down dsp_ck */ + omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); /* temporarily enabling api_ck to access DSP registers */ omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); @@ -366,13 +346,7 @@ void omap1_pm_suspend(void) ULPD_RESTORE(ULPD_CLOCK_CTRL); ULPD_RESTORE(ULPD_STATUS_REQ); - if (cpu_is_omap7xx()) { - MPUI7XX_RESTORE(EMIFS_CONFIG); - MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG); - MPUI7XX_RESTORE(OMAP_IH1_MIR); - MPUI7XX_RESTORE(OMAP_IH2_0_MIR); - MPUI7XX_RESTORE(OMAP_IH2_1_MIR); - } else if (cpu_is_omap15xx()) { + if (cpu_is_omap15xx()) { MPUI1510_RESTORE(MPUI_CTRL); MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); MPUI1510_RESTORE(MPUI_DSP_API_CONFIG); @@ -433,14 +407,7 @@ static int omap_pm_debug_show(struct seq_file *m, void *v) ULPD_SAVE(ULPD_DPLL_CTRL); ULPD_SAVE(ULPD_POWER_CTRL); - if (cpu_is_omap7xx()) { - MPUI7XX_SAVE(MPUI_CTRL); - MPUI7XX_SAVE(MPUI_DSP_STATUS); - MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); - MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); - MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); - MPUI7XX_SAVE(EMIFS_CONFIG); - } else if (cpu_is_omap15xx()) { + if (cpu_is_omap15xx()) { MPUI1510_SAVE(MPUI_CTRL); MPUI1510_SAVE(MPUI_DSP_STATUS); MPUI1510_SAVE(MPUI_DSP_BOOT_CONFIG); @@ -486,21 +453,7 @@ static int omap_pm_debug_show(struct seq_file *m, void *v) ULPD_SHOW(ULPD_STATUS_REQ), ULPD_SHOW(ULPD_POWER_CTRL)); - if (cpu_is_omap7xx()) { - seq_printf(m, - "MPUI7XX_CTRL_REG 0x%-8x \n" - "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" - "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" - "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n" - "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n" - "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n", - MPUI7XX_SHOW(MPUI_CTRL), - MPUI7XX_SHOW(MPUI_DSP_STATUS), - MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG), - MPUI7XX_SHOW(MPUI_DSP_API_CONFIG), - MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG), - MPUI7XX_SHOW(EMIFS_CONFIG)); - } else if (cpu_is_omap15xx()) { + if (cpu_is_omap15xx()) { seq_printf(m, "MPUI1510_CTRL_REG 0x%-8x \n" "MPUI1510_DSP_STATUS_REG: 0x%-8x \n" @@ -634,10 +587,7 @@ static int __init omap_pm_init(void) * These routines need to be in SRAM as that's the only * memory the MPU can see when it wakes up. */ - if (cpu_is_omap7xx()) { - omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend, - omap7xx_cpu_suspend_sz); - } else if (cpu_is_omap15xx()) { + if (cpu_is_omap15xx()) { omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, omap1510_cpu_suspend_sz); } else if (cpu_is_omap16xx()) { @@ -652,9 +602,7 @@ static int __init omap_pm_init(void) arm_pm_idle = omap1_pm_idle; - if (cpu_is_omap7xx()) - irq = INT_7XX_WAKE_UP_REQ; - else if (cpu_is_omap16xx()) + if (cpu_is_omap16xx()) irq = INT_1610_WAKE_UP_REQ; else irq = -1; @@ -673,9 +621,7 @@ static int __init omap_pm_init(void) omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); /* Configure IDLECT3 */ - if (cpu_is_omap7xx()) - omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3); - else if (cpu_is_omap16xx()) + if (cpu_is_omap16xx()) omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); suspend_set_ops(&omap_pm_ops); diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index 0d1f092821ff..d4373a5c4697 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h @@ -100,12 +100,6 @@ #define OMAP1610_IDLECT3 0xfffece24 #define OMAP1610_IDLE_LOOP_REQUEST 0x0400 -#define OMAP7XX_IDLECT1_SLEEP_VAL 0x16c7 -#define OMAP7XX_IDLECT2_SLEEP_VAL 0x09c7 -#define OMAP7XX_IDLECT3_VAL 0x3f -#define OMAP7XX_IDLECT3 0xfffece24 -#define OMAP7XX_IDLE_LOOP_REQUEST 0x0C00 - #ifndef __ASSEMBLER__ #include <linux/clk.h> @@ -118,17 +112,13 @@ extern void allow_idle_sleep(void); extern void omap1_pm_idle(void); extern void omap1_pm_suspend(void); -extern void omap7xx_cpu_suspend(unsigned long, unsigned long); extern void omap1510_cpu_suspend(unsigned long, unsigned long); extern void omap1610_cpu_suspend(unsigned long, unsigned long); -extern void omap7xx_idle_loop_suspend(void); extern void omap1510_idle_loop_suspend(void); extern void omap1610_idle_loop_suspend(void); -extern unsigned int omap7xx_cpu_suspend_sz; extern unsigned int omap1510_cpu_suspend_sz; extern unsigned int omap1610_cpu_suspend_sz; -extern unsigned int omap7xx_idle_loop_suspend_sz; extern unsigned int omap1510_idle_loop_suspend_sz; extern unsigned int omap1610_idle_loop_suspend_sz; @@ -151,10 +141,6 @@ extern void omap_serial_wake_trigger(int enable); #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] -#define MPUI7XX_SAVE(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] = omap_readl(x) -#define MPUI7XX_RESTORE(x) omap_writel((mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x]), (x)) -#define MPUI7XX_SHOW(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] - #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) #define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] @@ -228,27 +214,6 @@ enum mpui1510_save_state { #endif }; -enum mpui7xx_save_state { - MPUI7XX_SLEEP_SAVE_START = 0, - /* - * MPUI registers 32 bits - */ - MPUI7XX_SLEEP_SAVE_MPUI_CTRL, - MPUI7XX_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, - MPUI7XX_SLEEP_SAVE_MPUI_DSP_API_CONFIG, - MPUI7XX_SLEEP_SAVE_MPUI_DSP_STATUS, - MPUI7XX_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, - MPUI7XX_SLEEP_SAVE_EMIFS_CONFIG, - MPUI7XX_SLEEP_SAVE_OMAP_IH1_MIR, - MPUI7XX_SLEEP_SAVE_OMAP_IH2_0_MIR, - MPUI7XX_SLEEP_SAVE_OMAP_IH2_1_MIR, -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) - MPUI7XX_SLEEP_SAVE_SIZE -#else - MPUI7XX_SLEEP_SAVE_SIZE = 0 -#endif -}; - enum mpui1610_save_state { MPUI1610_SLEEP_SAVE_START = 0, /* diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 88928fc33b2e..c7f590645774 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -106,13 +106,6 @@ void __init omap_serial_init(void) { int i; - if (cpu_is_omap7xx()) { - serial_platform_data[0].regshift = 0; - serial_platform_data[1].regshift = 0; - serial_platform_data[0].irq = INT_7XX_UART_MODEM_1; - serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2; - } - if (cpu_is_omap15xx()) { serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; @@ -120,14 +113,6 @@ void __init omap_serial_init(void) } for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { - - /* Don't look at UARTs higher than 2 for omap7xx */ - if (cpu_is_omap7xx() && i > 1) { - serial_platform_data[i].membase = NULL; - serial_platform_data[i].mapbase = 0; - continue; - } - /* Static mapping, never released */ serial_platform_data[i].membase = ioremap(serial_platform_data[i].mapbase, SZ_2K); diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index f111b79512ce..6192f52d531a 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S @@ -61,86 +61,6 @@ * */ -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) - .align 3 -ENTRY(omap7xx_cpu_suspend) - - @ save registers on stack - stmfd sp!, {r0 - r12, lr} - - @ Drain write cache - mov r4, #0 - mcr p15, 0, r0, c7, c10, 4 - nop - - @ load base address of Traffic Controller - mov r6, #TCMIF_ASM_BASE & 0xff000000 - orr r6, r6, #TCMIF_ASM_BASE & 0x00ff0000 - orr r6, r6, #TCMIF_ASM_BASE & 0x0000ff00 - - @ prepare to put SDRAM into self-refresh manually - ldr r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] - orr r9, r7, #SELF_REFRESH_MODE & 0xff000000 - orr r9, r9, #SELF_REFRESH_MODE & 0x000000ff - str r9, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] - - @ prepare to put EMIFS to Sleep - ldr r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] - orr r9, r8, #IDLE_EMIFS_REQUEST & 0xff - str r9, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] - - @ load base address of ARM_IDLECT1 and ARM_IDLECT2 - mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000 - orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000 - orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00 - - @ turn off clock domains - @ do not disable PERCK (0x04) - mov r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff - orr r5, r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff00 - strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] - - @ request ARM idle - mov r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff - orr r3, r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff00 - strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] - - @ disable instruction cache - mrc p15, 0, r9, c1, c0, 0 - bic r2, r9, #0x1000 - mcr p15, 0, r2, c1, c0, 0 - nop - -/* - * Let's wait for the next wake up event to wake us up. r0 can't be - * used here because r0 holds ARM_IDLECT1 - */ - mov r2, #0 - mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt -/* - * omap7xx_cpu_suspend()'s resume point. - * - * It will just start executing here, so we'll restore stuff from the - * stack. - */ - @ re-enable Icache - mcr p15, 0, r9, c1, c0, 0 - - @ reset the ARM_IDLECT1 and ARM_IDLECT2. - strh r1, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] - strh r0, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] - - @ Restore EMIFF controls - str r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff] - str r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff] - - @ restore regs and return - ldmfd sp!, {r0 - r12, pc} - -ENTRY(omap7xx_cpu_suspend_sz) - .word . - omap7xx_cpu_suspend -#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ - #ifdef CONFIG_ARCH_OMAP15XX .align 3 ENTRY(omap1510_cpu_suspend) diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c index dabf0c4defeb..26427d6be896 100644 --- a/arch/arm/mach-omap1/sram-init.c +++ b/arch/arm/mach-omap1/sram-init.c @@ -94,9 +94,7 @@ static void __init omap_detect_and_map_sram(void) omap_sram_skip = SRAM_BOOTLOADER_SZ; omap_sram_start = OMAP1_SRAM_PA; - if (cpu_is_omap7xx()) - omap_sram_size = 0x32000; /* 200K */ - else if (cpu_is_omap15xx()) + if (cpu_is_omap15xx()) omap_sram_size = 0x30000; /* 192K */ else if (cpu_is_omap1610() || cpu_is_omap1611() || cpu_is_omap1621() || cpu_is_omap1710()) @@ -133,9 +131,6 @@ static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) { BUG_ON(!_omap_sram_reprogram_clock); - /* On 730, bit 13 must always be 1 */ - if (cpu_is_omap7xx()) - ckctl |= 0x2000; _omap_sram_reprogram_clock(dpllctl, ckctl); } diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index 0119f3ddb7a6..08d42abc4a0f 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -190,12 +190,6 @@ static struct platform_device udc_device = { static inline void udc_device_init(struct omap_usb_config *pdata) { - /* IRQ numbers for omap7xx */ - if(cpu_is_omap7xx()) { - udc_resources[1].start = INT_7XX_USB_GENI; - udc_resources[2].start = INT_7XX_USB_NON_ISO; - udc_resources[3].start = INT_7XX_USB_ISO; - } pdata->udc_device = &udc_device; } @@ -238,8 +232,6 @@ static inline void ohci_device_init(struct omap_usb_config *pdata) if (!IS_ENABLED(CONFIG_USB_OHCI_HCD)) return; - if (cpu_is_omap7xx()) - ohci_resources[1].start = INT_7XX_USB_HHC_1; pdata->ohci_device = &ohci_device; pdata->ocpi_enable = &ocpi_enable; } @@ -267,8 +259,6 @@ static struct platform_device otg_device = { static inline void otg_device_init(struct omap_usb_config *pdata) { - if (cpu_is_omap7xx()) - otg_resources[1].start = INT_7XX_USB_OTG; pdata->otg_device = &otg_device; } @@ -297,14 +287,7 @@ static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) } if (is_device) { - if (cpu_is_omap7xx()) { - omap_cfg_reg(AA17_7XX_USB_DM); - omap_cfg_reg(W16_7XX_USB_PU_EN); - omap_cfg_reg(W17_7XX_USB_VBUSI); - omap_cfg_reg(W18_7XX_USB_DMCK_OUT); - omap_cfg_reg(W19_7XX_USB_DCRST); - } else - omap_cfg_reg(W4_USB_PUEN); + omap_cfg_reg(W4_USB_PUEN); } if (nwires == 2) { @@ -324,14 +307,11 @@ static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) * - OTG support on this port not yet written */ - /* Don't do this for omap7xx -- it causes USB to not work correctly */ - if (!cpu_is_omap7xx()) { - l = omap_readl(USB_TRANSCEIVER_CTRL); - l &= ~(7 << 4); - if (!is_device) - l |= (3 << 1); - omap_writel(l, USB_TRANSCEIVER_CTRL); - } + l = omap_readl(USB_TRANSCEIVER_CTRL); + l &= ~(7 << 4); + if (!is_device) + l |= (3 << 1); + omap_writel(l, USB_TRANSCEIVER_CTRL); return 3 << 16; } @@ -698,7 +678,7 @@ void __init omap1_usb_init(struct omap_usb_config *_pdata) ohci_device_init(pdata); otg_device_init(pdata); - if (cpu_is_omap7xx() || cpu_is_omap16xx()) + if (cpu_is_omap16xx()) omap_otg_init(pdata); else if (cpu_is_omap15xx()) omap_1510_usb_init(pdata); diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 0044b2823710..ee449ca032d2 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -28,22 +28,6 @@ config ARCH_ORION5X_DT Say 'Y' here if you want your kernel to support the Marvell Orion5x using flattened device tree. -config MACH_DB88F5281 - bool "Marvell Orion-2 Development Board" - select I2C_BOARDINFO if I2C - depends on ATAGS && UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Marvell Orion-2 (88F5281) Development Board - -config MACH_RD88F5182 - bool "Marvell Orion-NAS Reference Design" - select I2C_BOARDINFO if I2C - depends on ATAGS && UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Marvell Orion-NAS (88F5182) RD2 - config MACH_RD88F5182_DT bool "Marvell Orion-NAS Reference Design (Flattened Device Tree)" select ARCH_ORION5X_DT @@ -98,14 +82,6 @@ config MACH_LINKSTATION_MINI Say 'Y' here if you want your kernel to support the Buffalo Linkstation Mini (LS-WSGL) platform. -config MACH_LINKSTATION_LS_HGL - bool "Buffalo Linkstation LS-HGL" - depends on ATAGS && UNUSED_BOARD_FILES - select I2C_BOARDINFO if I2C - help - Say 'Y' here if you want your kernel to support the - Buffalo Linkstation LS-HGL platform. - config MACH_TS409 bool "QNAP TS-409" depends on ATAGS @@ -113,13 +89,6 @@ config MACH_TS409 Say 'Y' here if you want your kernel to support the QNAP TS-409 platform. -config MACH_WRT350N_V2 - bool "Linksys WRT350N v2" - depends on ATAGS && UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Linksys WRT350N v2 platform. - config MACH_TS78XX bool "Technologic Systems TS-78xx" depends on ATAGS @@ -156,32 +125,4 @@ config MACH_MSS2_DT Say 'Y' here if you want your kernel to support the Maxtor Shared Storage II platform. -config MACH_WNR854T - bool "Netgear WNR854T" - depends on ATAGS && UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Netgear WNR854T platform. - -config MACH_RD88F5181L_GE - bool "Marvell Orion-VoIP GE Reference Design" - depends on ATAGS && UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Marvell Orion-VoIP GE (88F5181L) RD. - -config MACH_RD88F5181L_FXO - bool "Marvell Orion-VoIP FXO Reference Design" - depends on ATAGS && UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Marvell Orion-VoIP FXO (88F5181L) RD. - -config MACH_RD88F6183AP_GE - bool "Marvell Orion-1-90 AP GE Reference Design" - depends on ATAGS && UNUSED_BOARD_FILES - help - Say 'Y' here if you want your kernel to support the - Marvell Orion-1-90 (88F6183) AP GE RD. - endif diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile index 572c3520f7fe..6f54d7fef27a 100644 --- a/arch/arm/mach-orion5x/Makefile +++ b/arch/arm/mach-orion5x/Makefile @@ -2,23 +2,15 @@ ccflags-y := -I$(srctree)/arch/arm/plat-orion/include obj-y += common.o pci.o irq.o mpp.o -obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o -obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o obj-$(CONFIG_MACH_TERASTATION_PRO2) += terastation_pro2-setup.o obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o -obj-$(CONFIG_MACH_LINKSTATION_LS_HGL) += ls_hgl-setup.o obj-$(CONFIG_MACH_DNS323) += dns323-setup.o obj-$(CONFIG_MACH_TS209) += ts209-setup.o tsx09-common.o obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o -obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o -obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o -obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o -obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o -obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 2e711b7252c6..df056d60b675 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -18,7 +18,6 @@ #include <linux/delay.h> #include <linux/clk-provider.h> #include <linux/cpu.h> -#include <linux/platform_data/dsa.h> #include <asm/page.h> #include <asm/setup.h> #include <asm/system_misc.h> @@ -101,15 +100,6 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) /***************************************************************************** - * Ethernet switch - ****************************************************************************/ -void __init orion5x_eth_switch_init(struct dsa_chip_data *d) -{ - orion_ge00_switch_init(d); -} - - -/***************************************************************************** * I2C ****************************************************************************/ void __init orion5x_i2c_init(void) diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index eb96009e21c4..f2e0577bf50f 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -4,7 +4,6 @@ #include <linux/reboot.h> -struct dsa_chip_data; struct mv643xx_eth_platform_data; struct mv_sata_platform_data; @@ -42,7 +41,6 @@ void orion5x_setup_wins(void); void orion5x_ehci0_init(void); void orion5x_ehci1_init(void); void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data); -void orion5x_eth_switch_init(struct dsa_chip_data *d); void orion5x_i2c_init(void); void orion5x_sata_init(struct mv_sata_platform_data *sata_data); void orion5x_spi_init(void); diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c deleted file mode 100644 index fe1a4cef1ba2..000000000000 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ /dev/null @@ -1,376 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-orion5x/db88f5281-setup.c - * - * Marvell Orion-2 Development Board Setup - * - * Maintainer: Tzachi Perelstein <tzachi@marvell.com> - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/irq.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/rawnand.h> -#include <linux/timer.h> -#include <linux/mv643xx_eth.h> -#include <linux/i2c.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/pci.h> -#include <linux/platform_data/mtd-orion_nand.h> -#include "common.h" -#include "mpp.h" -#include "orion5x.h" - -/***************************************************************************** - * DB-88F5281 on board devices - ****************************************************************************/ - -/* - * 512K NOR flash Device bus boot chip select - */ - -#define DB88F5281_NOR_BOOT_BASE 0xf4000000 -#define DB88F5281_NOR_BOOT_SIZE SZ_512K - -/* - * 7-Segment on Device bus chip select 0 - */ - -#define DB88F5281_7SEG_BASE 0xfa000000 -#define DB88F5281_7SEG_SIZE SZ_1K - -/* - * 32M NOR flash on Device bus chip select 1 - */ - -#define DB88F5281_NOR_BASE 0xfc000000 -#define DB88F5281_NOR_SIZE SZ_32M - -/* - * 32M NAND flash on Device bus chip select 2 - */ - -#define DB88F5281_NAND_BASE 0xfa800000 -#define DB88F5281_NAND_SIZE SZ_1K - -/* - * PCI - */ - -#define DB88F5281_PCI_SLOT0_OFFS 7 -#define DB88F5281_PCI_SLOT0_IRQ_PIN 12 -#define DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN 13 - -/***************************************************************************** - * 512M NOR Flash on Device bus Boot CS - ****************************************************************************/ - -static struct physmap_flash_data db88f5281_boot_flash_data = { - .width = 1, /* 8 bit bus width */ -}; - -static struct resource db88f5281_boot_flash_resource = { - .flags = IORESOURCE_MEM, - .start = DB88F5281_NOR_BOOT_BASE, - .end = DB88F5281_NOR_BOOT_BASE + DB88F5281_NOR_BOOT_SIZE - 1, -}; - -static struct platform_device db88f5281_boot_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &db88f5281_boot_flash_data, - }, - .num_resources = 1, - .resource = &db88f5281_boot_flash_resource, -}; - -/***************************************************************************** - * 32M NOR Flash on Device bus CS1 - ****************************************************************************/ - -static struct physmap_flash_data db88f5281_nor_flash_data = { - .width = 4, /* 32 bit bus width */ -}; - -static struct resource db88f5281_nor_flash_resource = { - .flags = IORESOURCE_MEM, - .start = DB88F5281_NOR_BASE, - .end = DB88F5281_NOR_BASE + DB88F5281_NOR_SIZE - 1, -}; - -static struct platform_device db88f5281_nor_flash = { - .name = "physmap-flash", - .id = 1, - .dev = { - .platform_data = &db88f5281_nor_flash_data, - }, - .num_resources = 1, - .resource = &db88f5281_nor_flash_resource, -}; - -/***************************************************************************** - * 32M NAND Flash on Device bus CS2 - ****************************************************************************/ - -static struct mtd_partition db88f5281_nand_parts[] = { - { - .name = "kernel", - .offset = 0, - .size = SZ_2M, - }, { - .name = "root", - .offset = SZ_2M, - .size = (SZ_16M - SZ_2M), - }, { - .name = "user", - .offset = SZ_16M, - .size = SZ_8M, - }, { - .name = "recovery", - .offset = (SZ_16M + SZ_8M), - .size = SZ_8M, - }, -}; - -static struct resource db88f5281_nand_resource = { - .flags = IORESOURCE_MEM, - .start = DB88F5281_NAND_BASE, - .end = DB88F5281_NAND_BASE + DB88F5281_NAND_SIZE - 1, -}; - -static struct orion_nand_data db88f5281_nand_data = { - .parts = db88f5281_nand_parts, - .nr_parts = ARRAY_SIZE(db88f5281_nand_parts), - .cle = 0, - .ale = 1, - .width = 8, -}; - -static struct platform_device db88f5281_nand_flash = { - .name = "orion_nand", - .id = -1, - .dev = { - .platform_data = &db88f5281_nand_data, - }, - .resource = &db88f5281_nand_resource, - .num_resources = 1, -}; - -/***************************************************************************** - * 7-Segment on Device bus CS0 - * Dummy counter every 2 sec - ****************************************************************************/ - -static void __iomem *db88f5281_7seg; -static struct timer_list db88f5281_timer; - -static void db88f5281_7seg_event(struct timer_list *unused) -{ - static int count = 0; - writel(0, db88f5281_7seg + (count << 4)); - count = (count + 1) & 7; - mod_timer(&db88f5281_timer, jiffies + 2 * HZ); -} - -static int __init db88f5281_7seg_init(void) -{ - if (machine_is_db88f5281()) { - db88f5281_7seg = ioremap(DB88F5281_7SEG_BASE, - DB88F5281_7SEG_SIZE); - if (!db88f5281_7seg) { - printk(KERN_ERR "Failed to ioremap db88f5281_7seg\n"); - return -EIO; - } - timer_setup(&db88f5281_timer, db88f5281_7seg_event, 0); - mod_timer(&db88f5281_timer, jiffies + 2 * HZ); - } - - return 0; -} - -__initcall(db88f5281_7seg_init); - -/***************************************************************************** - * PCI - ****************************************************************************/ - -static void __init db88f5281_pci_preinit(void) -{ - int pin; - - /* - * Configure PCI GPIO IRQ pins - */ - pin = DB88F5281_PCI_SLOT0_IRQ_PIN; - if (gpio_request(pin, "PCI Int1") == 0) { - if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); - } else { - printk(KERN_ERR "db88f5281_pci_preinit failed to " - "set_irq_type pin %d\n", pin); - gpio_free(pin); - } - } else { - printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin); - } - - pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; - if (gpio_request(pin, "PCI Int2") == 0) { - if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); - } else { - printk(KERN_ERR "db88f5281_pci_preinit failed " - "to set_irq_type pin %d\n", pin); - gpio_free(pin); - } - } else { - printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin); - } -} - -static int __init db88f5281_pci_map_irq(const struct pci_dev *dev, u8 slot, - u8 pin) -{ - int irq; - - /* - * Check for devices with hard-wired IRQs. - */ - irq = orion5x_pci_map_irq(dev, slot, pin); - if (irq != -1) - return irq; - - /* - * PCI IRQs are connected via GPIOs. - */ - switch (slot - DB88F5281_PCI_SLOT0_OFFS) { - case 0: - return gpio_to_irq(DB88F5281_PCI_SLOT0_IRQ_PIN); - case 1: - case 2: - return gpio_to_irq(DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN); - default: - return -1; - } -} - -static struct hw_pci db88f5281_pci __initdata = { - .nr_controllers = 2, - .preinit = db88f5281_pci_preinit, - .setup = orion5x_pci_sys_setup, - .scan = orion5x_pci_sys_scan_bus, - .map_irq = db88f5281_pci_map_irq, -}; - -static int __init db88f5281_pci_init(void) -{ - if (machine_is_db88f5281()) - pci_common_init(&db88f5281_pci); - - return 0; -} - -subsys_initcall(db88f5281_pci_init); - -/***************************************************************************** - * Ethernet - ****************************************************************************/ -static struct mv643xx_eth_platform_data db88f5281_eth_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -/***************************************************************************** - * RTC DS1339 on I2C bus - ****************************************************************************/ -static struct i2c_board_info __initdata db88f5281_i2c_rtc = { - I2C_BOARD_INFO("ds1339", 0x68), -}; - -/***************************************************************************** - * General Setup - ****************************************************************************/ -static unsigned int db88f5281_mpp_modes[] __initdata = { - MPP0_GPIO, /* USB Over Current */ - MPP1_GPIO, /* USB Vbat input */ - MPP2_PCI_ARB, /* PCI_REQn[2] */ - MPP3_PCI_ARB, /* PCI_GNTn[2] */ - MPP4_PCI_ARB, /* PCI_REQn[3] */ - MPP5_PCI_ARB, /* PCI_GNTn[3] */ - MPP6_GPIO, /* JP0, CON17.2 */ - MPP7_GPIO, /* JP1, CON17.1 */ - MPP8_GPIO, /* JP2, CON11.2 */ - MPP9_GPIO, /* JP3, CON11.3 */ - MPP10_GPIO, /* RTC int */ - MPP11_GPIO, /* Baud Rate Generator */ - MPP12_GPIO, /* PCI int 1 */ - MPP13_GPIO, /* PCI int 2 */ - MPP14_NAND, /* NAND_REn[2] */ - MPP15_NAND, /* NAND_WEn[2] */ - MPP16_UART, /* UART1_RX */ - MPP17_UART, /* UART1_TX */ - MPP18_UART, /* UART1_CTSn */ - MPP19_UART, /* UART1_RTSn */ - 0, -}; - -static void __init db88f5281_init(void) -{ - /* - * Basic Orion setup. Need to be called early. - */ - orion5x_init(); - - orion5x_mpp_conf(db88f5281_mpp_modes); - writel(0, MPP_DEV_CTRL); /* DEV_D[31:16] */ - - /* - * Configure peripherals. - */ - orion5x_ehci0_init(); - orion5x_eth_init(&db88f5281_eth_data); - orion5x_i2c_init(); - orion5x_uart0_init(); - orion5x_uart1_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, - ORION_MBUS_DEVBUS_BOOT_ATTR, - DB88F5281_NOR_BOOT_BASE, - DB88F5281_NOR_BOOT_SIZE); - platform_device_register(&db88f5281_boot_flash); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(0), - ORION_MBUS_DEVBUS_ATTR(0), - DB88F5281_7SEG_BASE, - DB88F5281_7SEG_SIZE); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(1), - ORION_MBUS_DEVBUS_ATTR(1), - DB88F5281_NOR_BASE, - DB88F5281_NOR_SIZE); - platform_device_register(&db88f5281_nor_flash); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(2), - ORION_MBUS_DEVBUS_ATTR(2), - DB88F5281_NAND_BASE, - DB88F5281_NAND_SIZE); - platform_device_register(&db88f5281_nand_flash); - - i2c_register_board_info(0, &db88f5281_i2c_rtc, 1); -} - -MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") - /* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = db88f5281_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c deleted file mode 100644 index af07f617465f..000000000000 --- a/arch/arm/mach-orion5x/ls_hgl-setup.c +++ /dev/null @@ -1,275 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-orion5x/ls_hgl-setup.c - * - * Maintainer: Zhu Qingsen <zhuqs@cn.fujitsu.com> - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/mtd/physmap.h> -#include <linux/mv643xx_eth.h> -#include <linux/leds.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/i2c.h> -#include <linux/ata_platform.h> -#include <linux/gpio.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "common.h" -#include "mpp.h" -#include "orion5x.h" - -/***************************************************************************** - * Linkstation LS-HGL Info - ****************************************************************************/ - -/* - * 256K NOR flash Device bus boot chip select - */ - -#define LS_HGL_NOR_BOOT_BASE 0xf4000000 -#define LS_HGL_NOR_BOOT_SIZE SZ_256K - -/***************************************************************************** - * 256KB NOR Flash on BOOT Device - ****************************************************************************/ - -static struct physmap_flash_data ls_hgl_nor_flash_data = { - .width = 1, -}; - -static struct resource ls_hgl_nor_flash_resource = { - .flags = IORESOURCE_MEM, - .start = LS_HGL_NOR_BOOT_BASE, - .end = LS_HGL_NOR_BOOT_BASE + LS_HGL_NOR_BOOT_SIZE - 1, -}; - -static struct platform_device ls_hgl_nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &ls_hgl_nor_flash_data, - }, - .num_resources = 1, - .resource = &ls_hgl_nor_flash_resource, -}; - -/***************************************************************************** - * Ethernet - ****************************************************************************/ - -static struct mv643xx_eth_platform_data ls_hgl_eth_data = { - .phy_addr = 8, -}; - -/***************************************************************************** - * RTC 5C372a on I2C bus - ****************************************************************************/ - -static struct i2c_board_info __initdata ls_hgl_i2c_rtc = { - I2C_BOARD_INFO("rs5c372a", 0x32), -}; - -/***************************************************************************** - * LEDs attached to GPIO - ****************************************************************************/ - -#define LS_HGL_GPIO_LED_ALARM 2 -#define LS_HGL_GPIO_LED_INFO 3 -#define LS_HGL_GPIO_LED_FUNC 17 -#define LS_HGL_GPIO_LED_PWR 0 - - -static struct gpio_led ls_hgl_led_pins[] = { - { - .name = "alarm:red", - .gpio = LS_HGL_GPIO_LED_ALARM, - .active_low = 1, - }, { - .name = "info:amber", - .gpio = LS_HGL_GPIO_LED_INFO, - .active_low = 1, - }, { - .name = "func:blue:top", - .gpio = LS_HGL_GPIO_LED_FUNC, - .active_low = 1, - }, { - .name = "power:blue:bottom", - .gpio = LS_HGL_GPIO_LED_PWR, - }, -}; - -static struct gpio_led_platform_data ls_hgl_led_data = { - .leds = ls_hgl_led_pins, - .num_leds = ARRAY_SIZE(ls_hgl_led_pins), -}; - -static struct platform_device ls_hgl_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &ls_hgl_led_data, - }, -}; - -/**************************************************************************** - * GPIO Attached Keys - ****************************************************************************/ -#define LS_HGL_GPIO_KEY_FUNC 15 -#define LS_HGL_GPIO_KEY_POWER 8 -#define LS_HGL_GPIO_KEY_AUTOPOWER 10 - -#define LS_HGL_SW_POWER 0x00 -#define LS_HGL_SW_AUTOPOWER 0x01 - -static struct gpio_keys_button ls_hgl_buttons[] = { - { - .code = KEY_OPTION, - .gpio = LS_HGL_GPIO_KEY_FUNC, - .desc = "Function Button", - .active_low = 1, - }, { - .type = EV_SW, - .code = LS_HGL_SW_POWER, - .gpio = LS_HGL_GPIO_KEY_POWER, - .desc = "Power-on Switch", - .active_low = 1, - }, { - .type = EV_SW, - .code = LS_HGL_SW_AUTOPOWER, - .gpio = LS_HGL_GPIO_KEY_AUTOPOWER, - .desc = "Power-auto Switch", - .active_low = 1, - }, -}; - -static struct gpio_keys_platform_data ls_hgl_button_data = { - .buttons = ls_hgl_buttons, - .nbuttons = ARRAY_SIZE(ls_hgl_buttons), -}; - -static struct platform_device ls_hgl_button_device = { - .name = "gpio-keys", - .id = -1, - .num_resources = 0, - .dev = { - .platform_data = &ls_hgl_button_data, - }, -}; - - -/***************************************************************************** - * SATA - ****************************************************************************/ -static struct mv_sata_platform_data ls_hgl_sata_data = { - .n_ports = 2, -}; - - -/***************************************************************************** - * Linkstation LS-HGL specific power off method: reboot - ****************************************************************************/ -/* - * On the Linkstation LS-HGL, the shutdown process is following: - * - Userland monitors key events until the power switch goes to off position - * - The board reboots - * - U-boot starts and goes into an idle mode waiting for the user - * to move the switch to ON position - */ - -static void ls_hgl_power_off(void) -{ - orion5x_restart(REBOOT_HARD, NULL); -} - - -/***************************************************************************** - * General Setup - ****************************************************************************/ - -#define LS_HGL_GPIO_USB_POWER 9 -#define LS_HGL_GPIO_AUTO_POWER 10 -#define LS_HGL_GPIO_POWER 8 - -#define LS_HGL_GPIO_HDD_POWER 1 - -static unsigned int ls_hgl_mpp_modes[] __initdata = { - MPP0_GPIO, /* LED_PWR */ - MPP1_GPIO, /* HDD_PWR */ - MPP2_GPIO, /* LED_ALARM */ - MPP3_GPIO, /* LED_INFO */ - MPP4_UNUSED, - MPP5_UNUSED, - MPP6_GPIO, /* FAN_LCK */ - MPP7_GPIO, /* INIT */ - MPP8_GPIO, /* POWER */ - MPP9_GPIO, /* USB_PWR */ - MPP10_GPIO, /* AUTO_POWER */ - MPP11_UNUSED, /* LED_ETH (dummy) */ - MPP12_UNUSED, - MPP13_UNUSED, - MPP14_UNUSED, - MPP15_GPIO, /* FUNC */ - MPP16_UNUSED, - MPP17_GPIO, /* LED_FUNC */ - MPP18_UNUSED, - MPP19_UNUSED, - 0, -}; - -static void __init ls_hgl_init(void) -{ - /* - * Setup basic Orion functions. Need to be called early. - */ - orion5x_init(); - - orion5x_mpp_conf(ls_hgl_mpp_modes); - - /* - * Configure peripherals. - */ - orion5x_ehci0_init(); - orion5x_ehci1_init(); - orion5x_eth_init(&ls_hgl_eth_data); - orion5x_i2c_init(); - orion5x_sata_init(&ls_hgl_sata_data); - orion5x_uart0_init(); - orion5x_xor_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, - ORION_MBUS_DEVBUS_BOOT_ATTR, - LS_HGL_NOR_BOOT_BASE, - LS_HGL_NOR_BOOT_SIZE); - platform_device_register(&ls_hgl_nor_flash); - - platform_device_register(&ls_hgl_button_device); - - platform_device_register(&ls_hgl_leds); - - i2c_register_board_info(0, &ls_hgl_i2c_rtc, 1); - - /* enable USB power */ - gpio_set_value(LS_HGL_GPIO_USB_POWER, 1); - - /* register power-off method */ - pm_power_off = ls_hgl_power_off; - - pr_info("%s: finished\n", __func__); -} - -MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL") - /* Maintainer: Zhu Qingsen <zhuqs@cn.fujistu.com> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = ls_hgl_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .fixup = tag_fixup_mem32, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c deleted file mode 100644 index 432fc8357d9e..000000000000 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ /dev/null @@ -1,172 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c - * - * Marvell Orion-VoIP FXO Reference Design Setup - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/irq.h> -#include <linux/mtd/physmap.h> -#include <linux/mv643xx_eth.h> -#include <linux/ethtool.h> -#include <linux/platform_data/dsa.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/pci.h> -#include "common.h" -#include "mpp.h" -#include "orion5x.h" - -/***************************************************************************** - * RD-88F5181L FXO Info - ****************************************************************************/ -/* - * 8M NOR flash Device bus boot chip select - */ -#define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000 -#define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M - - -/***************************************************************************** - * 8M NOR Flash on Device bus Boot chip select - ****************************************************************************/ -static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = { - .width = 1, -}; - -static struct resource rd88f5181l_fxo_nor_boot_flash_resource = { - .flags = IORESOURCE_MEM, - .start = RD88F5181L_FXO_NOR_BOOT_BASE, - .end = RD88F5181L_FXO_NOR_BOOT_BASE + - RD88F5181L_FXO_NOR_BOOT_SIZE - 1, -}; - -static struct platform_device rd88f5181l_fxo_nor_boot_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &rd88f5181l_fxo_nor_boot_flash_data, - }, - .num_resources = 1, - .resource = &rd88f5181l_fxo_nor_boot_flash_resource, -}; - - -/***************************************************************************** - * General Setup - ****************************************************************************/ -static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = { - MPP0_GPIO, /* LED1 CardBus LED (front panel) */ - MPP1_GPIO, /* PCI_intA */ - MPP2_GPIO, /* Hard Reset / Factory Init*/ - MPP3_GPIO, /* FXS or DAA select */ - MPP4_GPIO, /* LED6 - phone LED (front panel) */ - MPP5_GPIO, /* LED5 - phone LED (front panel) */ - MPP6_PCI_CLK, /* CPU PCI refclk */ - MPP7_PCI_CLK, /* PCI/PCIe refclk */ - MPP8_GPIO, /* CardBus reset */ - MPP9_GPIO, /* GE_RXERR */ - MPP10_GPIO, /* LED2 MiniPCI LED (front panel) */ - MPP11_GPIO, /* Lifeline control */ - MPP12_GIGE, /* GE_TXD[4] */ - MPP13_GIGE, /* GE_TXD[5] */ - MPP14_GIGE, /* GE_TXD[6] */ - MPP15_GIGE, /* GE_TXD[7] */ - MPP16_GIGE, /* GE_RXD[4] */ - MPP17_GIGE, /* GE_RXD[5] */ - MPP18_GIGE, /* GE_RXD[6] */ - MPP19_GIGE, /* GE_RXD[7] */ - 0, -}; - -static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = { - .phy_addr = MV643XX_ETH_PHY_NONE, - .speed = SPEED_1000, - .duplex = DUPLEX_FULL, -}; - -static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = { - .port_names[0] = "lan2", - .port_names[1] = "lan1", - .port_names[2] = "wan", - .port_names[3] = "cpu", - .port_names[5] = "lan4", - .port_names[7] = "lan3", -}; - -static void __init rd88f5181l_fxo_init(void) -{ - /* - * Setup basic Orion functions. Need to be called early. - */ - orion5x_init(); - - orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes); - - /* - * Configure peripherals. - */ - orion5x_ehci0_init(); - orion5x_eth_init(&rd88f5181l_fxo_eth_data); - orion5x_eth_switch_init(&rd88f5181l_fxo_switch_chip_data); - orion5x_uart0_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, - ORION_MBUS_DEVBUS_BOOT_ATTR, - RD88F5181L_FXO_NOR_BOOT_BASE, - RD88F5181L_FXO_NOR_BOOT_SIZE); - platform_device_register(&rd88f5181l_fxo_nor_boot_flash); -} - -static int __init -rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq; - - /* - * Check for devices with hard-wired IRQs. - */ - irq = orion5x_pci_map_irq(dev, slot, pin); - if (irq != -1) - return irq; - - /* - * Mini-PCI / Cardbus slot. - */ - return gpio_to_irq(1); -} - -static struct hw_pci rd88f5181l_fxo_pci __initdata = { - .nr_controllers = 2, - .setup = orion5x_pci_sys_setup, - .scan = orion5x_pci_sys_scan_bus, - .map_irq = rd88f5181l_fxo_pci_map_irq, -}; - -static int __init rd88f5181l_fxo_pci_init(void) -{ - if (machine_is_rd88f5181l_fxo()) { - orion5x_pci_set_cardbus_mode(); - pci_common_init(&rd88f5181l_fxo_pci); - } - - return 0; -} -subsys_initcall(rd88f5181l_fxo_pci_init); - -MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design") - /* Maintainer: Nicolas Pitre <nico@marvell.com> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = rd88f5181l_fxo_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .fixup = tag_fixup_mem32, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c deleted file mode 100644 index d4b1a9c3cd36..000000000000 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ /dev/null @@ -1,183 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c - * - * Marvell Orion-VoIP GE Reference Design Setup - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/irq.h> -#include <linux/mtd/physmap.h> -#include <linux/mv643xx_eth.h> -#include <linux/ethtool.h> -#include <linux/i2c.h> -#include <linux/platform_data/dsa.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/pci.h> -#include "common.h" -#include "mpp.h" -#include "orion5x.h" - -/***************************************************************************** - * RD-88F5181L GE Info - ****************************************************************************/ -/* - * 16M NOR flash Device bus boot chip select - */ -#define RD88F5181L_GE_NOR_BOOT_BASE 0xff000000 -#define RD88F5181L_GE_NOR_BOOT_SIZE SZ_16M - - -/***************************************************************************** - * 16M NOR Flash on Device bus Boot chip select - ****************************************************************************/ -static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = { - .width = 1, -}; - -static struct resource rd88f5181l_ge_nor_boot_flash_resource = { - .flags = IORESOURCE_MEM, - .start = RD88F5181L_GE_NOR_BOOT_BASE, - .end = RD88F5181L_GE_NOR_BOOT_BASE + - RD88F5181L_GE_NOR_BOOT_SIZE - 1, -}; - -static struct platform_device rd88f5181l_ge_nor_boot_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &rd88f5181l_ge_nor_boot_flash_data, - }, - .num_resources = 1, - .resource = &rd88f5181l_ge_nor_boot_flash_resource, -}; - - -/***************************************************************************** - * General Setup - ****************************************************************************/ -static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = { - MPP0_GPIO, /* LED1 */ - MPP1_GPIO, /* LED5 */ - MPP2_GPIO, /* LED4 */ - MPP3_GPIO, /* LED3 */ - MPP4_GPIO, /* PCI_intA */ - MPP5_GPIO, /* RTC interrupt */ - MPP6_PCI_CLK, /* CPU PCI refclk */ - MPP7_PCI_CLK, /* PCI/PCIe refclk */ - MPP8_GPIO, /* 88e6131 interrupt */ - MPP9_GPIO, /* GE_RXERR */ - MPP10_GPIO, /* PCI_intB */ - MPP11_GPIO, /* LED2 */ - MPP12_GIGE, /* GE_TXD[4] */ - MPP13_GIGE, /* GE_TXD[5] */ - MPP14_GIGE, /* GE_TXD[6] */ - MPP15_GIGE, /* GE_TXD[7] */ - MPP16_GIGE, /* GE_RXD[4] */ - MPP17_GIGE, /* GE_RXD[5] */ - MPP18_GIGE, /* GE_RXD[6] */ - MPP19_GIGE, /* GE_RXD[7] */ - 0, -}; - -static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = { - .phy_addr = MV643XX_ETH_PHY_NONE, - .speed = SPEED_1000, - .duplex = DUPLEX_FULL, -}; - -static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = { - .port_names[0] = "lan2", - .port_names[1] = "lan1", - .port_names[2] = "wan", - .port_names[3] = "cpu", - .port_names[5] = "lan4", - .port_names[7] = "lan3", -}; - -static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = { - I2C_BOARD_INFO("ds1338", 0x68), -}; - -static void __init rd88f5181l_ge_init(void) -{ - /* - * Setup basic Orion functions. Need to be called early. - */ - orion5x_init(); - - orion5x_mpp_conf(rd88f5181l_ge_mpp_modes); - - /* - * Configure peripherals. - */ - orion5x_ehci0_init(); - orion5x_eth_init(&rd88f5181l_ge_eth_data); - orion5x_eth_switch_init(&rd88f5181l_ge_switch_chip_data); - orion5x_i2c_init(); - orion5x_uart0_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, - ORION_MBUS_DEVBUS_BOOT_ATTR, - RD88F5181L_GE_NOR_BOOT_BASE, - RD88F5181L_GE_NOR_BOOT_SIZE); - platform_device_register(&rd88f5181l_ge_nor_boot_flash); - - i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1); -} - -static int __init -rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq; - - /* - * Check for devices with hard-wired IRQs. - */ - irq = orion5x_pci_map_irq(dev, slot, pin); - if (irq != -1) - return irq; - - /* - * Cardbus slot. - */ - if (pin == 1) - return gpio_to_irq(4); - else - return gpio_to_irq(10); -} - -static struct hw_pci rd88f5181l_ge_pci __initdata = { - .nr_controllers = 2, - .setup = orion5x_pci_sys_setup, - .scan = orion5x_pci_sys_scan_bus, - .map_irq = rd88f5181l_ge_pci_map_irq, -}; - -static int __init rd88f5181l_ge_pci_init(void) -{ - if (machine_is_rd88f5181l_ge()) { - orion5x_pci_set_cardbus_mode(); - pci_common_init(&rd88f5181l_ge_pci); - } - - return 0; -} -subsys_initcall(rd88f5181l_ge_pci_init); - -MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design") - /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = rd88f5181l_ge_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .fixup = tag_fixup_mem32, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c deleted file mode 100644 index 6ffcfc6445e2..000000000000 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ /dev/null @@ -1,288 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-orion5x/rd88f5182-setup.c - * - * Marvell Orion-NAS Reference Design Setup - * - * Maintainer: Ronen Shitrit <rshitrit@marvell.com> - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/irq.h> -#include <linux/mtd/physmap.h> -#include <linux/mv643xx_eth.h> -#include <linux/ata_platform.h> -#include <linux/i2c.h> -#include <linux/leds.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/pci.h> -#include "common.h" -#include "mpp.h" -#include "orion5x.h" - -/***************************************************************************** - * RD-88F5182 Info - ****************************************************************************/ - -/* - * 512K NOR flash Device bus boot chip select - */ - -#define RD88F5182_NOR_BOOT_BASE 0xf4000000 -#define RD88F5182_NOR_BOOT_SIZE SZ_512K - -/* - * 16M NOR flash on Device bus chip select 1 - */ - -#define RD88F5182_NOR_BASE 0xfc000000 -#define RD88F5182_NOR_SIZE SZ_16M - -/* - * PCI - */ - -#define RD88F5182_PCI_SLOT0_OFFS 7 -#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7 -#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6 - -/***************************************************************************** - * 16M NOR Flash on Device bus CS1 - ****************************************************************************/ - -static struct physmap_flash_data rd88f5182_nor_flash_data = { - .width = 1, -}; - -static struct resource rd88f5182_nor_flash_resource = { - .flags = IORESOURCE_MEM, - .start = RD88F5182_NOR_BASE, - .end = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1, -}; - -static struct platform_device rd88f5182_nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &rd88f5182_nor_flash_data, - }, - .num_resources = 1, - .resource = &rd88f5182_nor_flash_resource, -}; - -/***************************************************************************** - * Use GPIO LED as CPU active indication - ****************************************************************************/ - -#define RD88F5182_GPIO_LED 0 - -static struct gpio_led rd88f5182_gpio_led_pins[] = { - { - .name = "rd88f5182:cpu", - .default_trigger = "cpu0", - .gpio = RD88F5182_GPIO_LED, - }, -}; - -static struct gpio_led_platform_data rd88f5182_gpio_led_data = { - .leds = rd88f5182_gpio_led_pins, - .num_leds = ARRAY_SIZE(rd88f5182_gpio_led_pins), -}; - -static struct platform_device rd88f5182_gpio_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &rd88f5182_gpio_led_data, - }, -}; - -/***************************************************************************** - * PCI - ****************************************************************************/ - -static void __init rd88f5182_pci_preinit(void) -{ - int pin; - - /* - * Configure PCI GPIO IRQ pins - */ - pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; - if (gpio_request(pin, "PCI IntA") == 0) { - if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); - } else { - printk(KERN_ERR "rd88f5182_pci_preinit failed to " - "set_irq_type pin %d\n", pin); - gpio_free(pin); - } - } else { - printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); - } - - pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; - if (gpio_request(pin, "PCI IntB") == 0) { - if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); - } else { - printk(KERN_ERR "rd88f5182_pci_preinit failed to " - "set_irq_type pin %d\n", pin); - gpio_free(pin); - } - } else { - printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin); - } -} - -static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot, - u8 pin) -{ - int irq; - - /* - * Check for devices with hard-wired IRQs. - */ - irq = orion5x_pci_map_irq(dev, slot, pin); - if (irq != -1) - return irq; - - /* - * PCI IRQs are connected via GPIOs - */ - switch (slot - RD88F5182_PCI_SLOT0_OFFS) { - case 0: - if (pin == 1) - return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN); - else - return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN); - default: - return -1; - } -} - -static struct hw_pci rd88f5182_pci __initdata = { - .nr_controllers = 2, - .preinit = rd88f5182_pci_preinit, - .setup = orion5x_pci_sys_setup, - .scan = orion5x_pci_sys_scan_bus, - .map_irq = rd88f5182_pci_map_irq, -}; - -static int __init rd88f5182_pci_init(void) -{ - if (machine_is_rd88f5182()) - pci_common_init(&rd88f5182_pci); - - return 0; -} - -subsys_initcall(rd88f5182_pci_init); - -/***************************************************************************** - * Ethernet - ****************************************************************************/ - -static struct mv643xx_eth_platform_data rd88f5182_eth_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -/***************************************************************************** - * RTC DS1338 on I2C bus - ****************************************************************************/ -static struct i2c_board_info __initdata rd88f5182_i2c_rtc = { - I2C_BOARD_INFO("ds1338", 0x68), -}; - -/***************************************************************************** - * Sata - ****************************************************************************/ -static struct mv_sata_platform_data rd88f5182_sata_data = { - .n_ports = 2, -}; - -/***************************************************************************** - * General Setup - ****************************************************************************/ -static unsigned int rd88f5182_mpp_modes[] __initdata = { - MPP0_GPIO, /* Debug Led */ - MPP1_GPIO, /* Reset Switch */ - MPP2_UNUSED, - MPP3_GPIO, /* RTC Int */ - MPP4_GPIO, - MPP5_GPIO, - MPP6_GPIO, /* PCI_intA */ - MPP7_GPIO, /* PCI_intB */ - MPP8_UNUSED, - MPP9_UNUSED, - MPP10_UNUSED, - MPP11_UNUSED, - MPP12_SATA_LED, /* SATA 0 presence */ - MPP13_SATA_LED, /* SATA 1 presence */ - MPP14_SATA_LED, /* SATA 0 active */ - MPP15_SATA_LED, /* SATA 1 active */ - MPP16_UNUSED, - MPP17_UNUSED, - MPP18_UNUSED, - MPP19_UNUSED, - 0, -}; - -static void __init rd88f5182_init(void) -{ - /* - * Setup basic Orion functions. Need to be called early. - */ - orion5x_init(); - - orion5x_mpp_conf(rd88f5182_mpp_modes); - - /* - * MPP[20] PCI Clock to MV88F5182 - * MPP[21] PCI Clock to mini PCI CON11 - * MPP[22] USB 0 over current indication - * MPP[23] USB 1 over current indication - * MPP[24] USB 1 over current enable - * MPP[25] USB 0 over current enable - */ - - /* - * Configure peripherals. - */ - orion5x_ehci0_init(); - orion5x_ehci1_init(); - orion5x_eth_init(&rd88f5182_eth_data); - orion5x_i2c_init(); - orion5x_sata_init(&rd88f5182_sata_data); - orion5x_uart0_init(); - orion5x_xor_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, - ORION_MBUS_DEVBUS_BOOT_ATTR, - RD88F5182_NOR_BOOT_BASE, - RD88F5182_NOR_BOOT_SIZE); - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(1), - ORION_MBUS_DEVBUS_ATTR(1), - RD88F5182_NOR_BASE, - RD88F5182_NOR_SIZE); - platform_device_register(&rd88f5182_nor_flash); - platform_device_register(&rd88f5182_gpio_leds); - - i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1); -} - -MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") - /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = rd88f5182_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c deleted file mode 100644 index 93f74fd6b4da..000000000000 --- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +++ /dev/null @@ -1,120 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c - * - * Marvell Orion-1-90 AP GE Reference Design Setup - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/irq.h> -#include <linux/mtd/physmap.h> -#include <linux/mv643xx_eth.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/ethtool.h> -#include <linux/platform_data/dsa.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/pci.h> -#include "common.h" -#include "orion5x.h" - -static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = { - .phy_addr = -1, - .speed = SPEED_1000, - .duplex = DUPLEX_FULL, -}; - -static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = { - .port_names[0] = "lan1", - .port_names[1] = "lan2", - .port_names[2] = "lan3", - .port_names[3] = "lan4", - .port_names[4] = "wan", - .port_names[5] = "cpu", -}; - -static struct mtd_partition rd88f6183ap_ge_partitions[] = { - { - .name = "kernel", - .offset = 0x00000000, - .size = 0x00200000, - }, { - .name = "rootfs", - .offset = 0x00200000, - .size = 0x00500000, - }, { - .name = "nvram", - .offset = 0x00700000, - .size = 0x00080000, - }, -}; - -static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = { - .type = "m25p64", - .nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions), - .parts = rd88f6183ap_ge_partitions, -}; - -static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = { - { - .modalias = "m25p80", - .platform_data = &rd88f6183ap_ge_spi_slave_data, - .max_speed_hz = 20000000, - .bus_num = 0, - .chip_select = 0, - }, -}; - -static void __init rd88f6183ap_ge_init(void) -{ - /* - * Setup basic Orion functions. Need to be called early. - */ - orion5x_init(); - - /* - * Configure peripherals. - */ - orion5x_ehci0_init(); - orion5x_eth_init(&rd88f6183ap_ge_eth_data); - orion5x_eth_switch_init(&rd88f6183ap_ge_switch_chip_data); - spi_register_board_info(rd88f6183ap_ge_spi_slave_info, - ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info)); - orion5x_spi_init(); - orion5x_uart0_init(); -} - -static struct hw_pci rd88f6183ap_ge_pci __initdata = { - .nr_controllers = 2, - .setup = orion5x_pci_sys_setup, - .scan = orion5x_pci_sys_scan_bus, - .map_irq = orion5x_pci_map_irq, -}; - -static int __init rd88f6183ap_ge_pci_init(void) -{ - if (machine_is_rd88f6183ap_ge()) { - orion5x_pci_disable(); - pci_common_init(&rd88f6183ap_ge_pci); - } - - return 0; -} -subsys_initcall(rd88f6183ap_ge_pci_init); - -MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") - /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = rd88f6183ap_ge_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .fixup = tag_fixup_mem32, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c deleted file mode 100644 index e5f327054dd3..000000000000 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ /dev/null @@ -1,175 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -// arch/arm/mach-orion5x/wnr854t-setup.c -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/irq.h> -#include <linux/delay.h> -#include <linux/mtd/physmap.h> -#include <linux/mv643xx_eth.h> -#include <linux/ethtool.h> -#include <linux/platform_data/dsa.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/pci.h> -#include "orion5x.h" -#include "common.h" -#include "mpp.h" - -static unsigned int wnr854t_mpp_modes[] __initdata = { - MPP0_GPIO, /* Power LED green (0=on) */ - MPP1_GPIO, /* Reset Button (0=off) */ - MPP2_GPIO, /* Power LED blink (0=off) */ - MPP3_GPIO, /* WAN Status LED amber (0=off) */ - MPP4_GPIO, /* PCI int */ - MPP5_GPIO, /* ??? */ - MPP6_GPIO, /* ??? */ - MPP7_GPIO, /* ??? */ - MPP8_UNUSED, /* ??? */ - MPP9_GIGE, /* GE_RXERR */ - MPP10_UNUSED, /* ??? */ - MPP11_UNUSED, /* ??? */ - MPP12_GIGE, /* GE_TXD[4] */ - MPP13_GIGE, /* GE_TXD[5] */ - MPP14_GIGE, /* GE_TXD[6] */ - MPP15_GIGE, /* GE_TXD[7] */ - MPP16_GIGE, /* GE_RXD[4] */ - MPP17_GIGE, /* GE_RXD[5] */ - MPP18_GIGE, /* GE_RXD[6] */ - MPP19_GIGE, /* GE_RXD[7] */ - 0, -}; - -/* - * 8M NOR flash Device bus boot chip select - */ -#define WNR854T_NOR_BOOT_BASE 0xf4000000 -#define WNR854T_NOR_BOOT_SIZE SZ_8M - -static struct mtd_partition wnr854t_nor_flash_partitions[] = { - { - .name = "kernel", - .offset = 0x00000000, - .size = 0x00100000, - }, { - .name = "rootfs", - .offset = 0x00100000, - .size = 0x00660000, - }, { - .name = "uboot", - .offset = 0x00760000, - .size = 0x00040000, - }, -}; - -static struct physmap_flash_data wnr854t_nor_flash_data = { - .width = 2, - .parts = wnr854t_nor_flash_partitions, - .nr_parts = ARRAY_SIZE(wnr854t_nor_flash_partitions), -}; - -static struct resource wnr854t_nor_flash_resource = { - .flags = IORESOURCE_MEM, - .start = WNR854T_NOR_BOOT_BASE, - .end = WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1, -}; - -static struct platform_device wnr854t_nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &wnr854t_nor_flash_data, - }, - .num_resources = 1, - .resource = &wnr854t_nor_flash_resource, -}; - -static struct mv643xx_eth_platform_data wnr854t_eth_data = { - .phy_addr = MV643XX_ETH_PHY_NONE, - .speed = SPEED_1000, - .duplex = DUPLEX_FULL, -}; - -static struct dsa_chip_data wnr854t_switch_chip_data = { - .port_names[0] = "lan3", - .port_names[1] = "lan4", - .port_names[2] = "wan", - .port_names[3] = "cpu", - .port_names[5] = "lan1", - .port_names[7] = "lan2", -}; - -static void __init wnr854t_init(void) -{ - /* - * Setup basic Orion functions. Need to be called early. - */ - orion5x_init(); - - orion5x_mpp_conf(wnr854t_mpp_modes); - - /* - * Configure peripherals. - */ - orion5x_eth_init(&wnr854t_eth_data); - orion5x_eth_switch_init(&wnr854t_switch_chip_data); - orion5x_uart0_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, - ORION_MBUS_DEVBUS_BOOT_ATTR, - WNR854T_NOR_BOOT_BASE, - WNR854T_NOR_BOOT_SIZE); - platform_device_register(&wnr854t_nor_flash); -} - -static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot, - u8 pin) -{ - int irq; - - /* - * Check for devices with hard-wired IRQs. - */ - irq = orion5x_pci_map_irq(dev, slot, pin); - if (irq != -1) - return irq; - - /* - * Mini-PCI slot. - */ - if (slot == 7) - return gpio_to_irq(4); - - return -1; -} - -static struct hw_pci wnr854t_pci __initdata = { - .nr_controllers = 2, - .setup = orion5x_pci_sys_setup, - .scan = orion5x_pci_sys_scan_bus, - .map_irq = wnr854t_pci_map_irq, -}; - -static int __init wnr854t_pci_init(void) -{ - if (machine_is_wnr854t()) - pci_common_init(&wnr854t_pci); - - return 0; -} -subsys_initcall(wnr854t_pci_init); - -MACHINE_START(WNR854T, "Netgear WNR854T") - /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = wnr854t_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .fixup = tag_fixup_mem32, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c deleted file mode 100644 index e6a2da6662df..000000000000 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ /dev/null @@ -1,263 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -// arch/arm/mach-orion5x/wrt350n-v2-setup.c -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/irq.h> -#include <linux/delay.h> -#include <linux/mtd/physmap.h> -#include <linux/mv643xx_eth.h> -#include <linux/ethtool.h> -#include <linux/leds.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/platform_data/dsa.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/pci.h> -#include "orion5x.h" -#include "common.h" -#include "mpp.h" - -/* - * LEDs attached to GPIO - */ -static struct gpio_led wrt350n_v2_led_pins[] = { - { - .name = "wrt350nv2:green:power", - .gpio = 0, - .active_low = 1, - }, { - .name = "wrt350nv2:green:security", - .gpio = 1, - .active_low = 1, - }, { - .name = "wrt350nv2:orange:power", - .gpio = 5, - .active_low = 1, - }, { - .name = "wrt350nv2:green:usb", - .gpio = 6, - .active_low = 1, - }, { - .name = "wrt350nv2:green:wireless", - .gpio = 7, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data wrt350n_v2_led_data = { - .leds = wrt350n_v2_led_pins, - .num_leds = ARRAY_SIZE(wrt350n_v2_led_pins), -}; - -static struct platform_device wrt350n_v2_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &wrt350n_v2_led_data, - }, -}; - -/* - * Buttons attached to GPIO - */ -static struct gpio_keys_button wrt350n_v2_buttons[] = { - { - .code = KEY_RESTART, - .gpio = 3, - .desc = "Reset Button", - .active_low = 1, - }, { - .code = KEY_WPS_BUTTON, - .gpio = 2, - .desc = "WPS Button", - .active_low = 1, - }, -}; - -static struct gpio_keys_platform_data wrt350n_v2_button_data = { - .buttons = wrt350n_v2_buttons, - .nbuttons = ARRAY_SIZE(wrt350n_v2_buttons), -}; - -static struct platform_device wrt350n_v2_button_device = { - .name = "gpio-keys", - .id = -1, - .num_resources = 0, - .dev = { - .platform_data = &wrt350n_v2_button_data, - }, -}; - -/* - * General setup - */ -static unsigned int wrt350n_v2_mpp_modes[] __initdata = { - MPP0_GPIO, /* Power LED green (0=on) */ - MPP1_GPIO, /* Security LED (0=on) */ - MPP2_GPIO, /* Internal Button (0=on) */ - MPP3_GPIO, /* Reset Button (0=on) */ - MPP4_GPIO, /* PCI int */ - MPP5_GPIO, /* Power LED orange (0=on) */ - MPP6_GPIO, /* USB LED (0=on) */ - MPP7_GPIO, /* Wireless LED (0=on) */ - MPP8_UNUSED, /* ??? */ - MPP9_GIGE, /* GE_RXERR */ - MPP10_UNUSED, /* ??? */ - MPP11_UNUSED, /* ??? */ - MPP12_GIGE, /* GE_TXD[4] */ - MPP13_GIGE, /* GE_TXD[5] */ - MPP14_GIGE, /* GE_TXD[6] */ - MPP15_GIGE, /* GE_TXD[7] */ - MPP16_GIGE, /* GE_RXD[4] */ - MPP17_GIGE, /* GE_RXD[5] */ - MPP18_GIGE, /* GE_RXD[6] */ - MPP19_GIGE, /* GE_RXD[7] */ - 0, -}; - -/* - * 8M NOR flash Device bus boot chip select - */ -#define WRT350N_V2_NOR_BOOT_BASE 0xf4000000 -#define WRT350N_V2_NOR_BOOT_SIZE SZ_8M - -static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = { - { - .name = "kernel", - .offset = 0x00000000, - .size = 0x00760000, - }, { - .name = "rootfs", - .offset = 0x001a0000, - .size = 0x005c0000, - }, { - .name = "lang", - .offset = 0x00760000, - .size = 0x00040000, - }, { - .name = "nvram", - .offset = 0x007a0000, - .size = 0x00020000, - }, { - .name = "u-boot", - .offset = 0x007c0000, - .size = 0x00040000, - }, -}; - -static struct physmap_flash_data wrt350n_v2_nor_flash_data = { - .width = 1, - .parts = wrt350n_v2_nor_flash_partitions, - .nr_parts = ARRAY_SIZE(wrt350n_v2_nor_flash_partitions), -}; - -static struct resource wrt350n_v2_nor_flash_resource = { - .flags = IORESOURCE_MEM, - .start = WRT350N_V2_NOR_BOOT_BASE, - .end = WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1, -}; - -static struct platform_device wrt350n_v2_nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &wrt350n_v2_nor_flash_data, - }, - .num_resources = 1, - .resource = &wrt350n_v2_nor_flash_resource, -}; - -static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = { - .phy_addr = MV643XX_ETH_PHY_NONE, - .speed = SPEED_1000, - .duplex = DUPLEX_FULL, -}; - -static struct dsa_chip_data wrt350n_v2_switch_chip_data = { - .port_names[0] = "lan2", - .port_names[1] = "lan1", - .port_names[2] = "wan", - .port_names[3] = "cpu", - .port_names[5] = "lan3", - .port_names[7] = "lan4", -}; - -static void __init wrt350n_v2_init(void) -{ - /* - * Setup basic Orion functions. Need to be called early. - */ - orion5x_init(); - - orion5x_mpp_conf(wrt350n_v2_mpp_modes); - - /* - * Configure peripherals. - */ - orion5x_ehci0_init(); - orion5x_eth_init(&wrt350n_v2_eth_data); - orion5x_eth_switch_init(&wrt350n_v2_switch_chip_data); - orion5x_uart0_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, - ORION_MBUS_DEVBUS_BOOT_ATTR, - WRT350N_V2_NOR_BOOT_BASE, - WRT350N_V2_NOR_BOOT_SIZE); - platform_device_register(&wrt350n_v2_nor_flash); - platform_device_register(&wrt350n_v2_leds); - platform_device_register(&wrt350n_v2_button_device); -} - -static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot, - u8 pin) -{ - int irq; - - /* - * Check for devices with hard-wired IRQs. - */ - irq = orion5x_pci_map_irq(dev, slot, pin); - if (irq != -1) - return irq; - - /* - * Mini-PCI slot. - */ - if (slot == 7) - return gpio_to_irq(4); - - return -1; -} - -static struct hw_pci wrt350n_v2_pci __initdata = { - .nr_controllers = 2, - .setup = orion5x_pci_sys_setup, - .scan = orion5x_pci_sys_scan_bus, - .map_irq = wrt350n_v2_pci_map_irq, -}; - -static int __init wrt350n_v2_pci_init(void) -{ - if (machine_is_wrt350n_v2()) - pci_common_init(&wrt350n_v2_pci); - - return 0; -} -subsys_initcall(wrt350n_v2_pci_init); - -MACHINE_START(WRT350N_V2, "Linksys WRT350N v2") - /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = wrt350n_v2_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .fixup = tag_fixup_mem32, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 03e25af6f48c..10e472f4fa43 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -16,10 +16,6 @@ menuconfig ARCH_PXA if ARCH_PXA -menu "Intel PXA2xx/PXA3xx Implementations" - -comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" - config MACH_PXA25X_DT bool "Support PXA25x platforms from device tree" select PINCTRL @@ -58,115 +54,7 @@ config MACH_PXA3XX_DT if ATAGS -config ARCH_LUBBOCK - bool "Intel DBPXA250 Development Platform (aka Lubbock)" - depends on UNUSED_BOARD_FILES - select GPIO_REG - select PXA25x - select SA1111 - -config MACH_MAINSTONE - bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)" - depends on UNUSED_BOARD_FILES - select GPIO_REG - select PXA27x - -config MACH_ZYLONITE - bool - select PXA3xx - -config MACH_ZYLONITE300 - bool "PXA3xx Development Platform (aka Zylonite) PXA300/310" - depends on UNUSED_BOARD_FILES - select CPU_PXA300 - select CPU_PXA310 - select MACH_ZYLONITE - -config MACH_ZYLONITE320 - bool "PXA3xx Development Platform (aka Zylonite) PXA320" - depends on UNUSED_BOARD_FILES - select CPU_PXA320 - select MACH_ZYLONITE - -config MACH_LITTLETON - bool "PXA3xx Form Factor Platform (aka Littleton)" - depends on UNUSED_BOARD_FILES - select CPU_PXA300 - select CPU_PXA310 - select PXA3xx - -config MACH_TAVOREVB - bool "PXA930 Evaluation Board (aka TavorEVB)" - depends on UNUSED_BOARD_FILES - select CPU_PXA930 - select CPU_PXA935 - select PXA3xx - select FB - select FB_PXA - -config MACH_SAAR - bool "PXA930 Handheld Platform (aka SAAR)" - depends on UNUSED_BOARD_FILES - select CPU_PXA930 - select CPU_PXA935 - select PXA3xx - select FB - select FB_PXA - -comment "Third Party Dev Platforms (sorted by vendor name)" - -config ARCH_PXA_IDP - bool "Accelent Xscale IDP" - depends on UNUSED_BOARD_FILES - select PXA25x - -config ARCH_VIPER - bool "Arcom/Eurotech VIPER SBC" - depends on UNUSED_BOARD_FILES - select ARCOM_PCMCIA - select I2C_GPIO if I2C=y - select ISA - select PXA25x - -config MACH_ARCOM_ZEUS - bool "Arcom/Eurotech ZEUS SBC" - depends on UNUSED_BOARD_FILES - select ARCOM_PCMCIA - select ISA - select PXA27x - -config MACH_BALLOON3 - bool "Balloon 3 board" - depends on UNUSED_BOARD_FILES - select IWMMXT - select PXA27x - -config MACH_CSB726 - bool "Enable Cogent CSB726 System On a Module" - depends on UNUSED_BOARD_FILES - select IWMMXT - select PXA27x - help - Say Y here if you intend to run this kernel on a Cogent - CSB726 System On Module. - -config CSB726_CSB701 - bool "Enable support for CSB701 baseboard" - depends on UNUSED_BOARD_FILES - depends on MACH_CSB726 - -config MACH_CM_X300 - bool "CompuLab CM-X300 modules" - depends on UNUSED_BOARD_FILES - select CPU_PXA300 - select CPU_PXA310 - select PXA3xx - -config MACH_CAPC7117 - bool "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM" - depends on UNUSED_BOARD_FILES - select CPU_PXA320 - select PXA3xx +comment "Legacy board files" config ARCH_GUMSTIX bool "Gumstix XScale 255 boards" @@ -187,307 +75,6 @@ config GUMSTIX_AM300EPD endchoice -config MACH_XCEP - bool "Iskratel Electronics XCEP" - depends on UNUSED_BOARD_FILES - select MTD - select MTD_CFI - select MTD_CFI_INTELEXT - select MTD_PHYSMAP - select PXA25x - help - PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash. - Tuned for usage in Libera instruments for particle accelerators. - -config TRIZEPS_PXA - bool "PXA based Keith und Koep Trizeps DIMM-Modules" - depends on UNUSED_BOARD_FILES - -config MACH_TRIZEPS4 - bool "Keith und Koep Trizeps4 DIMM-Module" - depends on TRIZEPS_PXA - select PXA27x - select TRIZEPS_PCMCIA - -config MACH_TRIZEPS4WL - bool "Keith und Koep Trizeps4-WL DIMM-Module" - depends on TRIZEPS_PXA - select MACH_TRIZEPS4 - select PXA27x - select TRIZEPS_PCMCIA - -choice - prompt "Select base board for Trizeps module" - depends on TRIZEPS_PXA - -config MACH_TRIZEPS_CONXS - bool "ConXS Eval Board" - -config MACH_TRIZEPS_UCONXS - bool "uConXS Eval Board" - -config MACH_TRIZEPS_ANY - bool "another Board" - -endchoice - -config ARCOM_PCMCIA - bool - help - Generic option for Arcom Viper/Zeus PCMCIA - -config TRIZEPS_PCMCIA - bool - help - Enable PCMCIA support for Trizeps modules - -config MACH_LOGICPD_PXA270 - bool "LogicPD PXA270 Card Engine Development Platform" - depends on UNUSED_BOARD_FILES - select PXA27x - -config MACH_PCM027 - bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" - depends on UNUSED_BOARD_FILES - select IWMMXT - select PXA27x - -config MACH_PCM990_BASEBOARD - bool "PHYTEC PCM-990 development board" - depends on UNUSED_BOARD_FILES - depends on MACH_PCM027 - -choice - prompt "display on pcm990" - depends on MACH_PCM990_BASEBOARD - -config PCM990_DISPLAY_SHARP - bool "sharp lq084v1dg21 stn display" - -config PCM990_DISPLAY_NEC - bool "nec nl6448bc20_18d tft display" - -config PCM990_DISPLAY_NONE - bool "no display" - -endchoice - -config MACH_COLIBRI - bool "Toradex Colibri PXA270" - depends on UNUSED_BOARD_FILES - select PXA27x - -config MACH_COLIBRI_PXA270_INCOME - bool "Income s.r.o. PXA270 SBC" - depends on UNUSED_BOARD_FILES - depends on MACH_COLIBRI - select PXA27x - -config MACH_COLIBRI300 - bool "Toradex Colibri PXA300/310" - depends on UNUSED_BOARD_FILES - select CPU_PXA300 - select CPU_PXA310 - select PXA3xx - -config MACH_COLIBRI320 - bool "Toradex Colibri PXA320" - depends on UNUSED_BOARD_FILES - select CPU_PXA320 - select PXA3xx - -config MACH_COLIBRI_EVALBOARD - bool "Toradex Colibri Evaluation Carrier Board support" - depends on UNUSED_BOARD_FILES - depends on MACH_COLIBRI || MACH_COLIBRI300 || MACH_COLIBRI320 - -config MACH_VPAC270 - bool "Voipac PXA270" - depends on UNUSED_BOARD_FILES - select HAVE_PATA_PLATFORM - select PXA27x - help - PXA270 based Single Board Computer. - -comment "End-user Products (sorted by vendor name)" - -config MACH_H4700 - bool "HP iPAQ hx4700" - depends on UNUSED_BOARD_FILES - select IWMMXT - select PXA27x - -config MACH_H5000 - bool "HP iPAQ h5000" - depends on UNUSED_BOARD_FILES - select PXA25x - -config MACH_HIMALAYA - bool "HTC Himalaya Support" - depends on UNUSED_BOARD_FILES - select CPU_PXA26x - -config MACH_MAGICIAN - bool "Enable HTC Magician Support" - depends on UNUSED_BOARD_FILES - select IWMMXT - select PXA27x - -config MACH_MIOA701 - bool "Mitac Mio A701 Support" - depends on UNUSED_BOARD_FILES - select IWMMXT - select PXA27x - help - Say Y here if you intend to run this kernel on a - MIO A701. Currently there is only basic support - for this PDA. - -config PXA_EZX - bool "Motorola EZX Platform" - depends on UNUSED_BOARD_FILES - select IWMMXT - select PXA27x - -config MACH_EZX_A780 - bool "Motorola EZX A780" - default y - depends on PXA_EZX - -config MACH_EZX_E680 - bool "Motorola EZX E680" - default y - depends on PXA_EZX - -config MACH_EZX_A1200 - bool "Motorola EZX A1200" - default y - depends on PXA_EZX - -config MACH_EZX_A910 - bool "Motorola EZX A910" - default y - depends on PXA_EZX - -config MACH_EZX_E6 - bool "Motorola EZX E6" - default y - depends on PXA_EZX - -config MACH_EZX_E2 - bool "Motorola EZX E2" - default y - depends on PXA_EZX - -config MACH_MP900C - bool "Nec Mobilepro 900/c" - depends on UNUSED_BOARD_FILES - select PXA25x - -config ARCH_PXA_PALM - bool "PXA based Palm PDAs" - depends on UNUSED_BOARD_FILES - -config MACH_PALM27X - bool - -config MACH_PALMTE2 - bool "Palm Tungsten|E2" - depends on UNUSED_BOARD_FILES - default y - depends on ARCH_PXA_PALM - select PXA25x - help - Say Y here if you intend to run this kernel on a Palm Tungsten|E2 - handheld computer. - -config MACH_PALMTC - bool "Palm Tungsten|C" - default y - depends on ARCH_PXA_PALM - select PXA25x - help - Say Y here if you intend to run this kernel on a Palm Tungsten|C - handheld computer. - -config MACH_PALMT5 - bool "Palm Tungsten|T5" - depends on UNUSED_BOARD_FILES - default y - depends on ARCH_PXA_PALM - select IWMMXT - select MACH_PALM27X - select PXA27x - help - Say Y here if you intend to run this kernel on a Palm Tungsten|T5 - handheld computer. - -config MACH_PALMTX - bool "Palm T|X" - depends on UNUSED_BOARD_FILES - default y - depends on ARCH_PXA_PALM - select IWMMXT - select MACH_PALM27X - select PXA27x - help - Say Y here if you intend to run this kernel on a Palm T|X - handheld computer. - -config MACH_PALMZ72 - bool "Palm Zire 72" - depends on UNUSED_BOARD_FILES - default y - depends on ARCH_PXA_PALM - select IWMMXT - select MACH_PALM27X - select PXA27x - help - Say Y here if you intend to run this kernel on Palm Zire 72 - handheld computer. - -config MACH_PALMLD - bool "Palm LifeDrive" - depends on UNUSED_BOARD_FILES - default y - depends on ARCH_PXA_PALM - select IWMMXT - select MACH_PALM27X - select PXA27x - help - Say Y here if you intend to run this kernel on a Palm LifeDrive - handheld computer. - -config PALM_TREO - bool - depends on ARCH_PXA_PALM - -config MACH_CENTRO - bool "Palm Centro 685 (GSM)" - depends on UNUSED_BOARD_FILES - default y - depends on ARCH_PXA_PALM - select IWMMXT - select MACH_PALM27X - select PALM_TREO - select PXA27x - help - Say Y here if you intend to run this kernel on Palm Centro 685 (GSM) - smartphone. - -config MACH_TREO680 - bool "Palm Treo 680" - depends on UNUSED_BOARD_FILES - default y - depends on ARCH_PXA_PALM - select IWMMXT - select MACH_PALM27X - select PALM_TREO - select PXA27x - help - Say Y here if you intend to run this kernel on Palm Treo 680 - smartphone. - config PXA_SHARPSL bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models" select SHARP_PARAM @@ -507,34 +94,6 @@ config PXA_SHARPSL_DETECT_MACH_ID the Zaurus machine ID at run-time. For latest kexec-based boot loader, this is not necessary. -config MACH_POODLE - bool "Enable Sharp SL-5600 (Poodle) Support" - depends on PXA_SHARPSL - depends on UNUSED_BOARD_FILES - select PXA25x - select SHARP_LOCOMO - -config MACH_CORGI - bool "Enable Sharp SL-C700 (Corgi) Support" - depends on PXA_SHARPSL - depends on UNUSED_BOARD_FILES - select PXA25x - select PXA_SHARP_C7xx - -config MACH_SHEPHERD - bool "Enable Sharp SL-C750 (Shepherd) Support" - depends on PXA_SHARPSL - depends on UNUSED_BOARD_FILES - select PXA25x - select PXA_SHARP_C7xx - -config MACH_HUSKY - bool "Enable Sharp SL-C760 (Husky) Support" - depends on PXA_SHARPSL - depends on UNUSED_BOARD_FILES - select PXA25x - select PXA_SHARP_C7xx - config MACH_AKITA bool "Enable Sharp SL-1000 (Akita) Support" depends on PXA_SHARPSL @@ -556,98 +115,7 @@ config MACH_BORZOI select PXA27x select PXA_SHARP_Cxx00 -config MACH_TOSA - bool "Enable Sharp SL-6000x (Tosa) Support" - depends on UNUSED_BOARD_FILES - depends on PXA_SHARPSL - select PXA25x - -config TOSA_BT - tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" - depends on MACH_TOSA && NET - select RFKILL - help - This is a simple driver that is able to control - the state of built in bluetooth chip on tosa. - -config TOSA_USE_EXT_KEYCODES - bool "Tosa keyboard: use extended keycodes" - depends on MACH_TOSA - help - Say Y here to enable the tosa keyboard driver to generate extended - (>= 127) keycodes. Be aware, that they can't be correctly interpreted - by either console keyboard driver or by Kdrive keybd driver. - - Say Y only if you know, what you are doing! - -config MACH_ICONTROL - bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM" - depends on UNUSED_BOARD_FILES - select CPU_PXA320 - select PXA3xx - -config ARCH_PXA_ESERIES - bool "PXA based Toshiba e-series PDAs" - depends on UNUSED_BOARD_FILES - select FB_W100 - select FB - select PXA25x - -config MACH_E330 - bool "Toshiba e330" - default y - depends on ARCH_PXA_ESERIES - help - Say Y here if you intend to run this kernel on a Toshiba - e330 family PDA. - -config MACH_E350 - bool "Toshiba e350" - default y - depends on ARCH_PXA_ESERIES - help - Say Y here if you intend to run this kernel on a Toshiba - e350 family PDA. - -config MACH_E740 - bool "Toshiba e740" - default y - depends on ARCH_PXA_ESERIES - help - Say Y here if you intend to run this kernel on a Toshiba - e740 family PDA. - -config MACH_E750 - bool "Toshiba e750" - default y - depends on ARCH_PXA_ESERIES - help - Say Y here if you intend to run this kernel on a Toshiba - e750 family PDA. - -config MACH_E400 - bool "Toshiba e400" - default y - depends on ARCH_PXA_ESERIES - help - Say Y here if you intend to run this kernel on a Toshiba - e400 family PDA. - -config MACH_E800 - bool "Toshiba e800" - default y - depends on ARCH_PXA_ESERIES - help - Say Y here if you intend to run this kernel on a Toshiba - e800 family PDA. - -config MACH_ZIPIT2 - bool "Zipit Z2 Handheld" - depends on UNUSED_BOARD_FILES - select PXA27x - endif # ATAGS -endmenu config PXA25x bool @@ -661,12 +129,6 @@ config PXA27x help Select code specific to PXA27x variants -config CPU_PXA26x - bool - select PXA25x - help - Select code specific to PXA26x (codename Dalhart) - config PXA3xx bool select CPU_XSC3 @@ -682,7 +144,6 @@ config CPU_PXA300 config CPU_PXA310 bool select CPU_PXA300 - select PXA310_ULPI if USB_ULPI help PXA310 (codename Monahans-LV) @@ -692,24 +153,6 @@ config CPU_PXA320 help PXA320 (codename Monahans-P) -config CPU_PXA930 - bool - select PXA3xx - help - PXA930 (codename Tavor-P) - -config CPU_PXA935 - bool - select CPU_PXA930 - help - PXA935 (codename Tavor-P65) - -config PXA_SHARP_C7xx - bool - select SHARPSL_PM - help - Enable support for all Sharp C7xx models - config PXA_SHARP_Cxx00 bool select SHARPSL_PM @@ -728,16 +171,4 @@ config SHARPSL_PM_MAX1111 select SPI select SPI_MASTER -config PXA310_ULPI - bool - -config PXA_SYSTEMS_CPLDS - tristate "Motherboard cplds" - default ARCH_LUBBOCK || MACH_MAINSTONE - help - This driver supports the Lubbock and Mainstone multifunction chip - found on the pxa25x development platform system (Lubbock) and pxa27x - development platform system (Mainstone). This IO board supports the - interrupts handling, ethernet controller, flash chips, etc ... - endif diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 0aec36e67dc1..faccdd356482 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -12,10 +12,9 @@ obj-$(CONFIG_PM) += pm.o sleep.o standby.o # SoC-specific code obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa2xx.o pxa27x.o -obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o +obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o obj-$(CONFIG_CPU_PXA300) += pxa300.o obj-$(CONFIG_CPU_PXA320) += pxa320.o -obj-$(CONFIG_CPU_PXA930) += pxa930.o # NOTE: keep the order of boards in accordance to their order in Kconfig @@ -24,66 +23,10 @@ obj-$(CONFIG_MACH_PXA25X_DT) += pxa-dt.o obj-$(CONFIG_MACH_PXA27X_DT) += pxa-dt.o obj-$(CONFIG_MACH_PXA3XX_DT) += pxa-dt.o -# Intel/Marvell Dev Platforms -obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o -obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o -obj-$(CONFIG_MACH_ZYLONITE300) += zylonite.o zylonite_pxa300.o -obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o -obj-$(CONFIG_MACH_LITTLETON) += littleton.o -obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o -obj-$(CONFIG_MACH_SAAR) += saar.o - # 3rd Party Dev Platforms -obj-$(CONFIG_ARCH_PXA_IDP) += idp.o -obj-$(CONFIG_ARCH_VIPER) += viper.o -obj-$(CONFIG_MACH_ARCOM_ZEUS) += zeus.o -obj-$(CONFIG_ARCOM_PCMCIA) += viper-pcmcia.o -obj-$(CONFIG_MACH_BALLOON3) += balloon3.o balloon3-pcmcia.o -obj-$(CONFIG_MACH_CSB726) += csb726.o -obj-$(CONFIG_CSB726_CSB701) += csb701.o -obj-$(CONFIG_MACH_CM_X300) += cm-x300.o -obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o -obj-$(CONFIG_MACH_XCEP) += xcep.o -obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o -obj-$(CONFIG_TRIZEPS_PCMCIA) += trizeps4-pcmcia.o -obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o -obj-$(CONFIG_MACH_PCM027) += pcm027.o -obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o -obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o colibri-pcmcia.o -obj-$(CONFIG_MACH_COLIBRI_EVALBOARD) += colibri-evalboard.o -obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o -obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o -obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o colibri-pcmcia.o -obj-$(CONFIG_MACH_VPAC270) += vpac270.o vpac270-pcmcia.o # End-user Products -obj-$(CONFIG_MACH_H4700) += hx4700.o -obj-$(CONFIG_MACH_H4700) += hx4700-pcmcia.o -obj-$(CONFIG_MACH_H5000) += h5000.o -obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o -obj-$(CONFIG_MACH_MAGICIAN) += magician.o -obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o -obj-$(CONFIG_PXA_EZX) += ezx.o -obj-$(CONFIG_MACH_MP900C) += mp900.o -obj-$(CONFIG_MACH_PALMTE2) += palmte2.o -obj-$(CONFIG_MACH_PALMTC) += palmtc.o palmtc-pcmcia.o -obj-$(CONFIG_MACH_PALM27X) += palm27x.o -obj-$(CONFIG_MACH_PALMT5) += palmt5.o -obj-$(CONFIG_MACH_PALMTX) += palmtx.o palmtx-pcmcia.o -obj-$(CONFIG_MACH_PALMZ72) += palmz72.o -obj-$(CONFIG_MACH_PALMLD) += palmld.o palmld-pcmcia.o -obj-$(CONFIG_PALM_TREO) += palmtreo.o -obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o -obj-$(CONFIG_MACH_POODLE) += poodle.o -obj-$(CONFIG_MACH_TOSA) += tosa.o -obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o -obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o -obj-$(CONFIG_MACH_E740) += e740-pcmcia.o -obj-$(CONFIG_MACH_ZIPIT2) += z2.o - -obj-$(CONFIG_PXA_SYSTEMS_CPLDS) += pxa_cplds_irqs.o -obj-$(CONFIG_TOSA_BT) += tosa-bt.o diff --git a/arch/arm/mach-pxa/balloon3-pcmcia.c b/arch/arm/mach-pxa/balloon3-pcmcia.c deleted file mode 100644 index 6a27b76cc603..000000000000 --- a/arch/arm/mach-pxa/balloon3-pcmcia.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_balloon3.c - * - * Balloon3 PCMCIA specific routines. - * - * Author: Nick Bane - * Created: June, 2006 - * Copyright: Toby Churchill Ltd - * Derived from pxa2xx_mainstone.c, by Nico Pitre - * - * Various modification by Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/module.h> -#include <linux/gpio.h> -#include <linux/errno.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/irq.h> -#include <linux/io.h> - -#include "balloon3.h" - -#include <asm/mach-types.h> - -#include <pcmcia/soc_common.h> - -static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - uint16_t ver; - - ver = __raw_readw(BALLOON3_FPGA_VER); - if (ver < 0x4f08) - pr_warn("The FPGA code, version 0x%04x, is too old. " - "PCMCIA/CF support might be broken in this version!", - ver); - - skt->socket.pci_irq = BALLOON3_BP_CF_NRDY_IRQ; - skt->stat[SOC_STAT_CD].gpio = BALLOON3_GPIO_S0_CD; - skt->stat[SOC_STAT_CD].name = "PCMCIA0 CD"; - skt->stat[SOC_STAT_BVD1].irq = BALLOON3_BP_NSTSCHG_IRQ; - skt->stat[SOC_STAT_BVD1].name = "PCMCIA0 STSCHG"; - - return 0; -} - -static unsigned long balloon3_pcmcia_status[2] = { - BALLOON3_CF_nSTSCHG_BVD1, - BALLOON3_CF_nSTSCHG_BVD1 -}; - -static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - uint16_t status; - int flip; - - /* This actually reads the STATUS register */ - status = __raw_readw(BALLOON3_CF_STATUS_REG); - flip = (status ^ balloon3_pcmcia_status[skt->nr]) - & BALLOON3_CF_nSTSCHG_BVD1; - /* - * Workaround for STSCHG which can't be deasserted: - * We therefore disable/enable corresponding IRQs - * as needed to avoid IRQ locks. - */ - if (flip) { - balloon3_pcmcia_status[skt->nr] = status; - if (status & BALLOON3_CF_nSTSCHG_BVD1) - enable_irq(BALLOON3_BP_NSTSCHG_IRQ); - else - disable_irq(BALLOON3_BP_NSTSCHG_IRQ); - } - - state->ready = !!(status & BALLOON3_CF_nIRQ); - state->bvd1 = !!(status & BALLOON3_CF_nSTSCHG_BVD1); - state->bvd2 = 0; /* not available */ - state->vs_3v = 1; /* Always true its a CF card */ - state->vs_Xv = 0; /* not available */ -} - -static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG + - ((state->flags & SS_RESET) ? - BALLOON3_FPGA_SETnCLR : 0)); - return 0; -} - -static struct pcmcia_low_level balloon3_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = balloon3_pcmcia_hw_init, - .socket_state = balloon3_pcmcia_socket_state, - .configure_socket = balloon3_pcmcia_configure_socket, - .first = 0, - .nr = 1, -}; - -static struct platform_device *balloon3_pcmcia_device; - -static int __init balloon3_pcmcia_init(void) -{ - int ret; - - if (!machine_is_balloon3()) - return -ENODEV; - - balloon3_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!balloon3_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(balloon3_pcmcia_device, - &balloon3_pcmcia_ops, sizeof(balloon3_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(balloon3_pcmcia_device); - - if (ret) - platform_device_put(balloon3_pcmcia_device); - - return ret; -} - -static void __exit balloon3_pcmcia_exit(void) -{ - platform_device_unregister(balloon3_pcmcia_device); -} - -module_init(balloon3_pcmcia_init); -module_exit(balloon3_pcmcia_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Nick Bane <nick@cecomputing.co.uk>"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_DESCRIPTION("Balloon3 board CF/PCMCIA driver"); diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c deleted file mode 100644 index 896d47d9a8dc..000000000000 --- a/arch/arm/mach-pxa/balloon3.c +++ /dev/null @@ -1,821 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/balloon3.c - * - * Support for Balloonboard.org Balloon3 board. - * - * Author: Nick Bane, Wookey, Jonathan McDowell - * Created: June, 2006 - * Copyright: Toby Churchill Ltd - * Derived from mainstone.c, by Nico Pitre - */ - -#include <linux/export.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <linux/leds.h> -#include <linux/sched.h> -#include <linux/bitops.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/ioport.h> -#include <linux/ucb1400.h> -#include <linux/mtd/mtd.h> -#include <linux/types.h> -#include <linux/platform_data/pcf857x.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/mtd/platnand.h> -#include <linux/mtd/physmap.h> -#include <linux/regulator/max1586.h> - -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <asm/irq.h> -#include <linux/sizes.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/mach/flash.h> - -#include "pxa27x.h" -#include "balloon3.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include "udc.h" -#include "pxa27x-udc.h" -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long balloon3_pin_config[] __initdata = { - /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* Reset, configured as GPIO wakeup source */ - GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, -}; - -/****************************************************************************** - * Compatibility: Parameter parsing - ******************************************************************************/ -static unsigned long balloon3_irq_enabled; - -static unsigned long balloon3_features_present = - (1 << BALLOON3_FEATURE_OHCI) | (1 << BALLOON3_FEATURE_CF) | - (1 << BALLOON3_FEATURE_AUDIO) | - (1 << BALLOON3_FEATURE_TOPPOLY); - -int balloon3_has(enum balloon3_features feature) -{ - return (balloon3_features_present & (1 << feature)) ? 1 : 0; -} -EXPORT_SYMBOL_GPL(balloon3_has); - -int __init parse_balloon3_features(char *arg) -{ - if (!arg) - return 0; - - return kstrtoul(arg, 0, &balloon3_features_present); -} -early_param("balloon3_features", parse_balloon3_features); - -/****************************************************************************** - * Compact Flash slot - ******************************************************************************/ -#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE) -static unsigned long balloon3_cf_pin_config[] __initdata = { - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO85_nPCE_1, - GPIO54_nPCE_2, - GPIO79_PSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, -}; - -static void __init balloon3_cf_init(void) -{ - if (!balloon3_has(BALLOON3_FEATURE_CF)) - return; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_cf_pin_config)); -} -#else -static inline void balloon3_cf_init(void) {} -#endif - -/****************************************************************************** - * NOR Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct mtd_partition balloon3_nor_partitions[] = { - { - .name = "Flash", - .offset = 0x00000000, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct physmap_flash_data balloon3_flash_data[] = { - { - .width = 2, /* bankwidth in bytes */ - .parts = balloon3_nor_partitions, - .nr_parts = ARRAY_SIZE(balloon3_nor_partitions) - } -}; - -static struct resource balloon3_flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device balloon3_flash = { - .name = "physmap-flash", - .id = 0, - .resource = &balloon3_flash_resource, - .num_resources = 1, - .dev = { - .platform_data = balloon3_flash_data, - }, -}; -static void __init balloon3_nor_init(void) -{ - platform_device_register(&balloon3_flash); -} -#else -static inline void balloon3_nor_init(void) {} -#endif - -/****************************************************************************** - * Audio and Touchscreen - ******************************************************************************/ -#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ - defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) -static unsigned long balloon3_ac97_pin_config[] __initdata = { - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO113_AC97_nRESET, - GPIO95_GPIO, -}; - -static struct ucb1400_pdata vpac270_ucb1400_pdata = { - .irq = PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ), -}; - - -static struct platform_device balloon3_ucb1400_device = { - .name = "ucb1400_core", - .id = -1, - .dev = { - .platform_data = &vpac270_ucb1400_pdata, - }, -}; - -static void __init balloon3_ts_init(void) -{ - if (!balloon3_has(BALLOON3_FEATURE_AUDIO)) - return; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config)); - pxa_set_ac97_info(NULL); - platform_device_register(&balloon3_ucb1400_device); -} -#else -static inline void balloon3_ts_init(void) {} -#endif - -/****************************************************************************** - * Framebuffer - ******************************************************************************/ -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static unsigned long balloon3_lcd_pin_config[] __initdata = { - GPIOxx_LCD_TFT_16BPP, - GPIO99_GPIO, -}; - -static struct pxafb_mode_info balloon3_lcd_modes[] = { - { - .pixclock = 38000, - .xres = 480, - .yres = 640, - .bpp = 16, - .hsync_len = 8, - .left_margin = 8, - .right_margin = 8, - .vsync_len = 2, - .upper_margin = 4, - .lower_margin = 5, - .sync = 0, - }, -}; - -static struct pxafb_mach_info balloon3_lcd_screen = { - .modes = balloon3_lcd_modes, - .num_modes = ARRAY_SIZE(balloon3_lcd_modes), - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -static void balloon3_backlight_power(int on) -{ - gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on); -} - -static void __init balloon3_lcd_init(void) -{ - int ret; - - if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY)) - return; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config)); - - ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON"); - if (ret) { - pr_err("Requesting BKL-ON GPIO failed!\n"); - goto err; - } - - ret = gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1); - if (ret) { - pr_err("Setting BKL-ON GPIO direction failed!\n"); - goto err2; - } - - balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power; - pxa_set_fb_info(NULL, &balloon3_lcd_screen); - return; - -err2: - gpio_free(BALLOON3_GPIO_RUN_BACKLIGHT); -err: - return; -} -#else -static inline void balloon3_lcd_init(void) {} -#endif - -/****************************************************************************** - * SD/MMC card controller - ******************************************************************************/ -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -static unsigned long balloon3_mmc_pin_config[] __initdata = { - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, -}; - -static struct pxamci_platform_data balloon3_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .detect_delay_ms = 200, -}; - -static void __init balloon3_mmc_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config)); - pxa_set_mci_info(&balloon3_mci_platform_data); -} -#else -static inline void balloon3_mmc_init(void) {} -#endif - -/****************************************************************************** - * USB Gadget - ******************************************************************************/ -#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE) -static void balloon3_udc_command(int cmd) -{ - if (cmd == PXA2XX_UDC_CMD_CONNECT) - UP2OCR |= UP2OCR_DPPUE | UP2OCR_DPPUBE; - else if (cmd == PXA2XX_UDC_CMD_DISCONNECT) - UP2OCR &= ~UP2OCR_DPPUE; -} - -static int balloon3_udc_is_connected(void) -{ - return 1; -} - -static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = { - .udc_command = balloon3_udc_command, - .udc_is_connected = balloon3_udc_is_connected, - .gpio_pullup = -1, -}; - -static void __init balloon3_udc_init(void) -{ - pxa_set_udc_info(&balloon3_udc_info); -} -#else -static inline void balloon3_udc_init(void) {} -#endif - -/****************************************************************************** - * IrDA - ******************************************************************************/ -#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE) -static struct pxaficp_platform_data balloon3_ficp_platform_data = { - .transceiver_cap = IR_FIRMODE | IR_SIRMODE | IR_OFF, -}; - -static void __init balloon3_irda_init(void) -{ - pxa_set_ficp_info(&balloon3_ficp_platform_data); -} -#else -static inline void balloon3_irda_init(void) {} -#endif - -/****************************************************************************** - * USB Host - ******************************************************************************/ -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static unsigned long balloon3_uhc_pin_config[] __initdata = { - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, -}; - -static struct pxaohci_platform_data balloon3_ohci_info = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, -}; - -static void __init balloon3_uhc_init(void) -{ - if (!balloon3_has(BALLOON3_FEATURE_OHCI)) - return; - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_uhc_pin_config)); - pxa_set_ohci_info(&balloon3_ohci_info); -} -#else -static inline void balloon3_uhc_init(void) {} -#endif - -/****************************************************************************** - * LEDs - ******************************************************************************/ -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -static unsigned long balloon3_led_pin_config[] __initdata = { - GPIO9_GPIO, /* NAND activity LED */ - GPIO10_GPIO, /* Heartbeat LED */ -}; - -struct gpio_led balloon3_gpio_leds[] = { - { - .name = "balloon3:green:idle", - .default_trigger = "heartbeat", - .gpio = BALLOON3_GPIO_LED_IDLE, - .active_low = 1, - }, { - .name = "balloon3:green:nand", - .default_trigger = "nand-disk", - .gpio = BALLOON3_GPIO_LED_NAND, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data balloon3_gpio_led_info = { - .leds = balloon3_gpio_leds, - .num_leds = ARRAY_SIZE(balloon3_gpio_leds), -}; - -static struct platform_device balloon3_leds = { - .name = "leds-gpio", - .id = 0, - .dev = { - .platform_data = &balloon3_gpio_led_info, - } -}; - -struct gpio_led balloon3_pcf_gpio_leds[] = { - { - .name = "balloon3:green:led0", - .gpio = BALLOON3_PCF_GPIO_LED0, - .active_low = 1, - }, { - .name = "balloon3:green:led1", - .gpio = BALLOON3_PCF_GPIO_LED1, - .active_low = 1, - }, { - .name = "balloon3:orange:led2", - .gpio = BALLOON3_PCF_GPIO_LED2, - .active_low = 1, - }, { - .name = "balloon3:orange:led3", - .gpio = BALLOON3_PCF_GPIO_LED3, - .active_low = 1, - }, { - .name = "balloon3:orange:led4", - .gpio = BALLOON3_PCF_GPIO_LED4, - .active_low = 1, - }, { - .name = "balloon3:orange:led5", - .gpio = BALLOON3_PCF_GPIO_LED5, - .active_low = 1, - }, { - .name = "balloon3:red:led6", - .gpio = BALLOON3_PCF_GPIO_LED6, - .active_low = 1, - }, { - .name = "balloon3:red:led7", - .gpio = BALLOON3_PCF_GPIO_LED7, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data balloon3_pcf_gpio_led_info = { - .leds = balloon3_pcf_gpio_leds, - .num_leds = ARRAY_SIZE(balloon3_pcf_gpio_leds), -}; - -static struct platform_device balloon3_pcf_leds = { - .name = "leds-gpio", - .id = 1, - .dev = { - .platform_data = &balloon3_pcf_gpio_led_info, - } -}; - -static void __init balloon3_leds_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_led_pin_config)); - platform_device_register(&balloon3_leds); - platform_device_register(&balloon3_pcf_leds); -} -#else -static inline void balloon3_leds_init(void) {} -#endif - -/****************************************************************************** - * FPGA IRQ - ******************************************************************************/ -static void balloon3_mask_irq(struct irq_data *d) -{ - int balloon3_irq = (d->irq - BALLOON3_IRQ(0)); - balloon3_irq_enabled &= ~(1 << balloon3_irq); - __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); -} - -static void balloon3_unmask_irq(struct irq_data *d) -{ - int balloon3_irq = (d->irq - BALLOON3_IRQ(0)); - balloon3_irq_enabled |= (1 << balloon3_irq); - __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); -} - -static struct irq_chip balloon3_irq_chip = { - .name = "FPGA", - .irq_ack = balloon3_mask_irq, - .irq_mask = balloon3_mask_irq, - .irq_unmask = balloon3_unmask_irq, -}; - -static void balloon3_irq_handler(struct irq_desc *desc) -{ - unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) & - balloon3_irq_enabled; - do { - struct irq_data *d = irq_desc_get_irq_data(desc); - struct irq_chip *chip = irq_desc_get_chip(desc); - unsigned int irq; - - /* clear useless edge notification */ - if (chip->irq_ack) - chip->irq_ack(d); - - while (pending) { - irq = BALLOON3_IRQ(0) + __ffs(pending); - generic_handle_irq(irq); - pending &= pending - 1; - } - pending = __raw_readl(BALLOON3_INT_CONTROL_REG) & - balloon3_irq_enabled; - } while (pending); -} - -static void __init balloon3_init_irq(void) -{ - int irq; - - pxa27x_init_irq(); - /* setup extra Balloon3 irqs */ - for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) { - irq_set_chip_and_handler(irq, &balloon3_irq_chip, - handle_level_irq); - irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); - } - - irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler); - irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING); - - pr_debug("%s: chained handler installed - irq %d automatically " - "enabled\n", __func__, BALLOON3_AUX_NIRQ); -} - -/****************************************************************************** - * GPIO expander - ******************************************************************************/ -#if defined(CONFIG_GPIO_PCF857X) || defined(CONFIG_GPIO_PCF857X_MODULE) -static struct pcf857x_platform_data balloon3_pcf857x_pdata = { - .gpio_base = BALLOON3_PCF_GPIO_BASE, - .n_latch = 0, - .setup = NULL, - .teardown = NULL, - .context = NULL, -}; - -static struct i2c_board_info __initdata balloon3_i2c_devs[] = { - { - I2C_BOARD_INFO("pcf8574a", 0x38), - .platform_data = &balloon3_pcf857x_pdata, - }, -}; - -static void __init balloon3_i2c_init(void) -{ - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(balloon3_i2c_devs)); -} -#else -static inline void balloon3_i2c_init(void) {} -#endif - -/****************************************************************************** - * NAND - ******************************************************************************/ -#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE) -static void balloon3_nand_cmd_ctl(struct nand_chip *this, int cmd, - unsigned int ctrl) -{ - uint8_t balloon3_ctl_set = 0, balloon3_ctl_clr = 0; - - if (ctrl & NAND_CTRL_CHANGE) { - if (ctrl & NAND_CLE) - balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLCLE; - else - balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLCLE; - - if (ctrl & NAND_ALE) - balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLALE; - else - balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLALE; - - if (balloon3_ctl_clr) - __raw_writel(balloon3_ctl_clr, - BALLOON3_NAND_CONTROL_REG); - if (balloon3_ctl_set) - __raw_writel(balloon3_ctl_set, - BALLOON3_NAND_CONTROL_REG + - BALLOON3_FPGA_SETnCLR); - } - - if (cmd != NAND_CMD_NONE) - writeb(cmd, this->legacy.IO_ADDR_W); -} - -static void balloon3_nand_select_chip(struct nand_chip *this, int chip) -{ - if (chip < 0 || chip > 3) - return; - - /* Assert all nCE lines */ - __raw_writew( - BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | - BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3, - BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR); - - /* Deassert correct nCE line */ - __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip, - BALLOON3_NAND_CONTROL_REG); -} - -static int balloon3_nand_dev_ready(struct nand_chip *this) -{ - return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB; -} - -static int balloon3_nand_probe(struct platform_device *pdev) -{ - uint16_t ver; - int ret; - - __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, - BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR); - - ver = __raw_readw(BALLOON3_FPGA_VER); - if (ver < 0x4f08) - pr_warn("The FPGA code, version 0x%04x, is too old. " - "NAND support might be broken in this version!", ver); - - /* Power up the NAND chips */ - ret = gpio_request(BALLOON3_GPIO_RUN_NAND, "NAND"); - if (ret) - goto err1; - - ret = gpio_direction_output(BALLOON3_GPIO_RUN_NAND, 1); - if (ret) - goto err2; - - gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1); - - /* Deassert all nCE lines and write protect line */ - __raw_writel( - BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | - BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | - BALLOON3_NAND_CONTROL_FLWP, - BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR); - return 0; - -err2: - gpio_free(BALLOON3_GPIO_RUN_NAND); -err1: - return ret; -} - -static void balloon3_nand_remove(struct platform_device *pdev) -{ - /* Power down the NAND chips */ - gpio_set_value(BALLOON3_GPIO_RUN_NAND, 0); - gpio_free(BALLOON3_GPIO_RUN_NAND); -} - -static struct mtd_partition balloon3_partition_info[] = { - [0] = { - .name = "Boot", - .offset = 0, - .size = SZ_4M, - }, - [1] = { - .name = "RootFS", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL - }, -}; - -struct platform_nand_data balloon3_nand_pdata = { - .chip = { - .nr_chips = 4, - .chip_offset = 0, - .nr_partitions = ARRAY_SIZE(balloon3_partition_info), - .partitions = balloon3_partition_info, - .chip_delay = 50, - }, - .ctrl = { - .dev_ready = balloon3_nand_dev_ready, - .select_chip = balloon3_nand_select_chip, - .cmd_ctrl = balloon3_nand_cmd_ctl, - .probe = balloon3_nand_probe, - .remove = balloon3_nand_remove, - }, -}; - -static struct resource balloon3_nand_resource[] = { - [0] = { - .start = BALLOON3_NAND_BASE, - .end = BALLOON3_NAND_BASE + 0x4, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device balloon3_nand = { - .name = "gen_nand", - .num_resources = ARRAY_SIZE(balloon3_nand_resource), - .resource = balloon3_nand_resource, - .id = -1, - .dev = { - .platform_data = &balloon3_nand_pdata, - } -}; - -static void __init balloon3_nand_init(void) -{ - platform_device_register(&balloon3_nand); -} -#else -static inline void balloon3_nand_init(void) {} -#endif - -/****************************************************************************** - * Core power regulator - ******************************************************************************/ -#if defined(CONFIG_REGULATOR_MAX1586) || \ - defined(CONFIG_REGULATOR_MAX1586_MODULE) -static struct regulator_consumer_supply balloon3_max1587a_consumers[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data balloon3_max1587a_v3_info = { - .constraints = { - .name = "vcc_core range", - .min_uV = 900000, - .max_uV = 1705000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .consumer_supplies = balloon3_max1587a_consumers, - .num_consumer_supplies = ARRAY_SIZE(balloon3_max1587a_consumers), -}; - -static struct max1586_subdev_data balloon3_max1587a_subdevs[] = { - { - .name = "vcc_core", - .id = MAX1586_V3, - .platform_data = &balloon3_max1587a_v3_info, - } -}; - -static struct max1586_platform_data balloon3_max1587a_info = { - .subdevs = balloon3_max1587a_subdevs, - .num_subdevs = ARRAY_SIZE(balloon3_max1587a_subdevs), - .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */ -}; - -static struct i2c_board_info __initdata balloon3_pi2c_board_info[] = { - { - I2C_BOARD_INFO("max1586", 0x14), - .platform_data = &balloon3_max1587a_info, - }, -}; - -static void __init balloon3_pmic_init(void) -{ - pxa27x_set_i2c_power_info(NULL); - i2c_register_board_info(1, ARRAY_AND_SIZE(balloon3_pi2c_board_info)); -} -#else -static inline void balloon3_pmic_init(void) {} -#endif - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static void __init balloon3_init(void) -{ - ARB_CNTRL = ARB_CORE_PARK | 0x234; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - balloon3_i2c_init(); - balloon3_irda_init(); - balloon3_lcd_init(); - balloon3_leds_init(); - balloon3_mmc_init(); - balloon3_nand_init(); - balloon3_nor_init(); - balloon3_pmic_init(); - balloon3_ts_init(); - balloon3_udc_init(); - balloon3_uhc_init(); - balloon3_cf_init(); -} - -static struct map_desc balloon3_io_desc[] __initdata = { - { /* CPLD/FPGA */ - .virtual = (unsigned long)BALLOON3_FPGA_VIRT, - .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS), - .length = BALLOON3_FPGA_LENGTH, - .type = MT_DEVICE, - }, -}; - -static void __init balloon3_map_io(void) -{ - pxa27x_map_io(); - iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc)); -} - -MACHINE_START(BALLOON3, "Balloon3") - /* Maintainer: Nick Bane. */ - .map_io = balloon3_map_io, - .nr_irqs = BALLOON3_NR_IRQS, - .init_irq = balloon3_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = balloon3_init, - .atag_offset = 0x100, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/balloon3.h b/arch/arm/mach-pxa/balloon3.h deleted file mode 100644 index 04f3639c4082..000000000000 --- a/arch/arm/mach-pxa/balloon3.h +++ /dev/null @@ -1,181 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/include/asm-arm/arch-pxa/balloon3.h - * - * Authors: Nick Bane and Wookey - * Created: Oct, 2005 - * Copyright: Toby Churchill Ltd - * Cribbed from mainstone.c, by Nicholas Pitre - */ - -#ifndef ASM_ARCH_BALLOON3_H -#define ASM_ARCH_BALLOON3_H - -#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ - -enum balloon3_features { - BALLOON3_FEATURE_OHCI, - BALLOON3_FEATURE_MMC, - BALLOON3_FEATURE_CF, - BALLOON3_FEATURE_AUDIO, - BALLOON3_FEATURE_TOPPOLY, -}; - -#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS -#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */ -#define BALLOON3_FPGA_LENGTH 0x01000000 - -#define BALLOON3_FPGA_SETnCLR (0x1000) - -/* FPGA / CPLD registers for CF socket */ -#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) -#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) -/* FPGA / CPLD version register */ -#define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c) -/* FPGA / CPLD registers for NAND flash */ -#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) -#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) -#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) -#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014) -#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) - -/* fpga/cpld interrupt control register */ -#define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C) -#define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c) - -#define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000) -#define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004) -#define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c) - -/* CF Status Register bits (read-only) bits */ -#define BALLOON3_CF_nIRQ (1 << 0) -#define BALLOON3_CF_nSTSCHG_BVD1 (1 << 1) - -/* CF Control Set Register bits / CF Control Clear Register bits (write-only) */ -#define BALLOON3_CF_RESET (1 << 0) -#define BALLOON3_CF_ENABLE (1 << 1) -#define BALLOON3_CF_ADD_ENABLE (1 << 2) - -/* CF Interrupt sources */ -#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) -#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) - -/* NAND Control register */ -#define BALLOON3_NAND_CONTROL_FLWP (1 << 7) -#define BALLOON3_NAND_CONTROL_FLSE (1 << 6) -#define BALLOON3_NAND_CONTROL_FLCE3 (1 << 5) -#define BALLOON3_NAND_CONTROL_FLCE2 (1 << 4) -#define BALLOON3_NAND_CONTROL_FLCE1 (1 << 3) -#define BALLOON3_NAND_CONTROL_FLCE0 (1 << 2) -#define BALLOON3_NAND_CONTROL_FLALE (1 << 1) -#define BALLOON3_NAND_CONTROL_FLCLE (1 << 0) - -/* NAND Status register */ -#define BALLOON3_NAND_STAT_RNB (1 << 0) - -/* NAND Control2 register */ -#define BALLOON3_NAND_CONTROL2_16BIT (1 << 0) - -/* GPIOs for irqs */ -#define BALLOON3_GPIO_AUX_NIRQ (94) -#define BALLOON3_GPIO_CODEC_IRQ (95) - -/* Timer and Idle LED locations */ -#define BALLOON3_GPIO_LED_NAND (9) -#define BALLOON3_GPIO_LED_IDLE (10) - -/* backlight control */ -#define BALLOON3_GPIO_RUN_BACKLIGHT (99) - -#define BALLOON3_GPIO_S0_CD (105) - -/* NAND */ -#define BALLOON3_GPIO_RUN_NAND (102) - -/* PCF8574A Leds */ -#define BALLOON3_PCF_GPIO_BASE 160 -#define BALLOON3_PCF_GPIO_LED0 (BALLOON3_PCF_GPIO_BASE + 0) -#define BALLOON3_PCF_GPIO_LED1 (BALLOON3_PCF_GPIO_BASE + 1) -#define BALLOON3_PCF_GPIO_LED2 (BALLOON3_PCF_GPIO_BASE + 2) -#define BALLOON3_PCF_GPIO_LED3 (BALLOON3_PCF_GPIO_BASE + 3) -#define BALLOON3_PCF_GPIO_LED4 (BALLOON3_PCF_GPIO_BASE + 4) -#define BALLOON3_PCF_GPIO_LED5 (BALLOON3_PCF_GPIO_BASE + 5) -#define BALLOON3_PCF_GPIO_LED6 (BALLOON3_PCF_GPIO_BASE + 6) -#define BALLOON3_PCF_GPIO_LED7 (BALLOON3_PCF_GPIO_BASE + 7) - -/* FPGA Interrupt Mask/Acknowledge Register */ -#define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */ -#define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */ - -/* CPLD (and FPGA) interface definitions */ -#define CPLD_LCD0_DATA_SET 0x00 -#define CPLD_LCD0_DATA_CLR 0x10 -#define CPLD_LCD0_COMMAND_SET 0x01 -#define CPLD_LCD0_COMMAND_CLR 0x11 -#define CPLD_LCD1_DATA_SET 0x02 -#define CPLD_LCD1_DATA_CLR 0x12 -#define CPLD_LCD1_COMMAND_SET 0x03 -#define CPLD_LCD1_COMMAND_CLR 0x13 - -#define CPLD_MISC_SET 0x07 -#define CPLD_MISC_CLR 0x17 -#define CPLD_MISC_LOON_NRESET_BIT 0 -#define CPLD_MISC_LOON_UNSUSP_BIT 1 -#define CPLD_MISC_RUN_5V_BIT 2 -#define CPLD_MISC_CHG_D0_BIT 3 -#define CPLD_MISC_CHG_D1_BIT 4 -#define CPLD_MISC_DAC_NCS_BIT 5 - -#define CPLD_LCD_SET 0x08 -#define CPLD_LCD_CLR 0x18 -#define CPLD_LCD_BACKLIGHT_EN_0_BIT 0 -#define CPLD_LCD_BACKLIGHT_EN_1_BIT 1 -#define CPLD_LCD_LED_RED_BIT 4 -#define CPLD_LCD_LED_GREEN_BIT 5 -#define CPLD_LCD_NRESET_BIT 7 - -#define CPLD_LCD_RO_SET 0x09 -#define CPLD_LCD_RO_CLR 0x19 -#define CPLD_LCD_RO_LCD0_nWAIT_BIT 0 -#define CPLD_LCD_RO_LCD1_nWAIT_BIT 1 - -#define CPLD_SERIAL_SET 0x0a -#define CPLD_SERIAL_CLR 0x1a -#define CPLD_SERIAL_GSM_RI_BIT 0 -#define CPLD_SERIAL_GSM_CTS_BIT 1 -#define CPLD_SERIAL_GSM_DTR_BIT 2 -#define CPLD_SERIAL_LPR_CTS_BIT 3 -#define CPLD_SERIAL_TC232_CTS_BIT 4 -#define CPLD_SERIAL_TC232_DSR_BIT 5 - -#define CPLD_SROUTING_SET 0x0b -#define CPLD_SROUTING_CLR 0x1b -#define CPLD_SROUTING_MSP430_LPR 0 -#define CPLD_SROUTING_MSP430_TC232 1 -#define CPLD_SROUTING_MSP430_GSM 2 -#define CPLD_SROUTING_LOON_LPR (0 << 4) -#define CPLD_SROUTING_LOON_TC232 (1 << 4) -#define CPLD_SROUTING_LOON_GSM (2 << 4) - -#define CPLD_AROUTING_SET 0x0c -#define CPLD_AROUTING_CLR 0x1c -#define CPLD_AROUTING_MIC2PHONE_BIT 0 -#define CPLD_AROUTING_PHONE2INT_BIT 1 -#define CPLD_AROUTING_PHONE2EXT_BIT 2 -#define CPLD_AROUTING_LOONL2INT_BIT 3 -#define CPLD_AROUTING_LOONL2EXT_BIT 4 -#define CPLD_AROUTING_LOONR2PHONE_BIT 5 -#define CPLD_AROUTING_LOONR2INT_BIT 6 -#define CPLD_AROUTING_LOONR2EXT_BIT 7 - -/* Balloon3 Interrupts */ -#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) - -#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) -#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) - -#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) - -extern int balloon3_has(enum balloon3_features feature); - -#endif diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c deleted file mode 100644 index 7712327f56a8..000000000000 --- a/arch/arm/mach-pxa/capc7117.c +++ /dev/null @@ -1,159 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/capc7117.c - * - * Support for the Embedian CAPC-7117 Evaluation Kit - * based on the Embedian MXM-8x10 Computer on Module - * - * Copyright (C) 2009 Embedian Inc. - * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd. - * - * 2007-09-04: eric miao <eric.y.miao@gmail.com> - * rewrite to align with latest kernel - * - * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za> - * Hennie van der Merwe <hvdmerwe@tmtservices.co.za> - * rework for upstream merge - */ - -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/ata_platform.h> -#include <linux/serial_8250.h> -#include <linux/gpio.h> -#include <linux/regulator/machine.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa320.h" -#include "mxm8x10.h" - -#include "generic.h" - -/* IDE (PATA) Support */ -static struct pata_platform_info pata_platform_data = { - .ioport_shift = 1 -}; - -static struct resource capc7117_ide_resources[] = { - [0] = { - .start = 0x11000020, - .end = 0x1100003f, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = 0x1100001c, - .end = 0x1100001c, - .flags = IORESOURCE_MEM - }, - [2] = { - .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)), - .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)), - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING - } -}; - -static struct platform_device capc7117_ide_device = { - .name = "pata_platform", - .num_resources = ARRAY_SIZE(capc7117_ide_resources), - .resource = capc7117_ide_resources, - .dev = { - .platform_data = &pata_platform_data, - .coherent_dma_mask = ~0 /* grumble */ - } -}; - -static void __init capc7117_ide_init(void) -{ - platform_device_register(&capc7117_ide_device); -} - -/* TI16C752 UART support */ -#define TI16C752_FLAGS (UPF_BOOT_AUTOCONF | \ - UPF_IOREMAP | \ - UPF_BUGGY_UART | \ - UPF_SKIP_TEST) -#define TI16C752_UARTCLK (22118400) -static struct plat_serial8250_port ti16c752_platform_data[] = { - [0] = { - .mapbase = 0x14000000, - .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)), - .irqflags = IRQF_TRIGGER_RISING, - .flags = TI16C752_FLAGS, - .iotype = UPIO_MEM, - .regshift = 1, - .uartclk = TI16C752_UARTCLK - }, - [1] = { - .mapbase = 0x14000040, - .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)), - .irqflags = IRQF_TRIGGER_RISING, - .flags = TI16C752_FLAGS, - .iotype = UPIO_MEM, - .regshift = 1, - .uartclk = TI16C752_UARTCLK - }, - [2] = { - .mapbase = 0x14000080, - .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)), - .irqflags = IRQF_TRIGGER_RISING, - .flags = TI16C752_FLAGS, - .iotype = UPIO_MEM, - .regshift = 1, - .uartclk = TI16C752_UARTCLK - }, - [3] = { - .mapbase = 0x140000c0, - .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)), - .irqflags = IRQF_TRIGGER_RISING, - .flags = TI16C752_FLAGS, - .iotype = UPIO_MEM, - .regshift = 1, - .uartclk = TI16C752_UARTCLK - }, - [4] = { - /* end of array */ - } -}; - -static struct platform_device ti16c752_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = ti16c752_platform_data - } -}; - -static void __init capc7117_uarts_init(void) -{ - platform_device_register(&ti16c752_device); -} - -static void __init capc7117_init(void) -{ - /* Init CoM */ - mxm_8x10_barebones_init(); - - /* Init evaluation board peripherals */ - mxm_8x10_ac97_init(); - mxm_8x10_usb_host_init(); - mxm_8x10_mmc_init(); - - capc7117_uarts_init(); - capc7117_ide_init(); - - regulator_has_full_constraints(); -} - -MACHINE_START(CAPC7117, - "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM") - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .init_machine = capc7117_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c deleted file mode 100644 index 01f364a66446..000000000000 --- a/arch/arm/mach-pxa/cm-x300.c +++ /dev/null @@ -1,883 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/cm-x300.c - * - * Support for the CompuLab CM-X300 modules - * - * Copyright (C) 2008,2009 CompuLab Ltd. - * - * Mike Rapoport <mike@compulab.co.il> - * Igor Grinberg <grinberg@compulab.co.il> - */ -#define pr_fmt(fmt) "%s: " fmt, __func__ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/clk.h> - -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/dm9000.h> -#include <linux/leds.h> -#include <linux/platform_data/rtc-v3020.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> - -#include <linux/i2c.h> -#include <linux/platform_data/pca953x.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <linux/mfd/da903x.h> -#include <linux/regulator/machine.h> -#include <linux/power_supply.h> -#include <linux/apm-emulation.h> - -#include <linux/spi/spi.h> -#include <linux/spi/spi_gpio.h> -#include <linux/spi/tdo24m.h> - -#include <linux/soc/pxa/cpu.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/setup.h> -#include <asm/system_info.h> - -#include "pxa300.h" -#include "pxa27x-udc.h" -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/mtd-nand-pxa3xx.h> -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/usb-pxa3xx-ulpi.h> - -#include <asm/mach/map.h> - -#include "generic.h" -#include "devices.h" - -#define CM_X300_ETH_PHYS 0x08000010 - -#define GPIO82_MMC_IRQ (82) -#define GPIO85_MMC_WP (85) - -#define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ) - -#define GPIO95_RTC_CS (95) -#define GPIO96_RTC_WR (96) -#define GPIO97_RTC_RD (97) -#define GPIO98_RTC_IO (98) - -#define GPIO_ULPI_PHY_RST (127) - -static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = { - /* LCD */ - GPIO54_LCD_LDD_0, - GPIO55_LCD_LDD_1, - GPIO56_LCD_LDD_2, - GPIO57_LCD_LDD_3, - GPIO58_LCD_LDD_4, - GPIO59_LCD_LDD_5, - GPIO60_LCD_LDD_6, - GPIO61_LCD_LDD_7, - GPIO62_LCD_LDD_8, - GPIO63_LCD_LDD_9, - GPIO64_LCD_LDD_10, - GPIO65_LCD_LDD_11, - GPIO66_LCD_LDD_12, - GPIO67_LCD_LDD_13, - GPIO68_LCD_LDD_14, - GPIO69_LCD_LDD_15, - GPIO72_LCD_FCLK, - GPIO73_LCD_LCLK, - GPIO74_LCD_PCLK, - GPIO75_LCD_BIAS, - - /* BTUART */ - GPIO111_UART2_RTS, - GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, - GPIO113_UART2_TXD, - GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, - - /* STUART */ - GPIO109_UART3_TXD, - GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, - - /* AC97 */ - GPIO23_AC97_nACRESET, - GPIO24_AC97_SYSCLK, - GPIO29_AC97_BITCLK, - GPIO25_AC97_SDATA_IN_0, - GPIO27_AC97_SDATA_OUT, - GPIO28_AC97_SYNC, - - /* Keypad */ - GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, - GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, - GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, - GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, - GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, - GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, - GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, - GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, - GPIO121_KP_MKOUT_0, - GPIO122_KP_MKOUT_1, - GPIO123_KP_MKOUT_2, - GPIO124_KP_MKOUT_3, - GPIO125_KP_MKOUT_4, - GPIO4_2_KP_MKOUT_5, - - /* MMC1 */ - GPIO3_MMC1_DAT0, - GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, - GPIO5_MMC1_DAT2, - GPIO6_MMC1_DAT3, - GPIO7_MMC1_CLK, - GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ - - /* MMC2 */ - GPIO9_MMC2_DAT0, - GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, - GPIO11_MMC2_DAT2, - GPIO12_MMC2_DAT3, - GPIO13_MMC2_CLK, - GPIO14_MMC2_CMD, - - /* FFUART */ - GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, - GPIO31_UART1_TXD, - GPIO32_UART1_CTS, - GPIO37_UART1_RTS, - GPIO33_UART1_DCD, - GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, - GPIO35_UART1_RI, - GPIO36_UART1_DTR, - - /* GPIOs */ - GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ - GPIO85_GPIO, /* MMC WP */ - GPIO99_GPIO, /* Ethernet IRQ */ - - /* RTC GPIOs */ - GPIO95_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC CS */ - GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC WR */ - GPIO97_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC RD */ - GPIO98_GPIO, /* RTC IO */ - - /* Standard I2C */ - GPIO21_I2C_SCL, - GPIO22_I2C_SDA, - - /* PWM Backlight */ - GPIO19_PWM2_OUT, -}; - -static mfp_cfg_t cm_x3xx_rev_lt130_mfp_cfg[] __initdata = { - /* GPIOs */ - GPIO79_GPIO, /* LED */ - GPIO77_GPIO, /* WiFi reset */ - GPIO78_GPIO, /* BT reset */ -}; - -static mfp_cfg_t cm_x3xx_rev_ge130_mfp_cfg[] __initdata = { - /* GPIOs */ - GPIO76_GPIO, /* LED */ - GPIO71_GPIO, /* WiFi reset */ - GPIO70_GPIO, /* BT reset */ -}; - -static mfp_cfg_t cm_x310_mfp_cfg[] __initdata = { - /* USB PORT 2 */ - ULPI_STP, - ULPI_NXT, - ULPI_DIR, - GPIO30_ULPI_DATA_OUT_0, - GPIO31_ULPI_DATA_OUT_1, - GPIO32_ULPI_DATA_OUT_2, - GPIO33_ULPI_DATA_OUT_3, - GPIO34_ULPI_DATA_OUT_4, - GPIO35_ULPI_DATA_OUT_5, - GPIO36_ULPI_DATA_OUT_6, - GPIO37_ULPI_DATA_OUT_7, - GPIO38_ULPI_CLK, - /* external PHY reset pin */ - GPIO127_GPIO, - - /* USB PORT 3 */ - GPIO77_USB_P3_1, - GPIO78_USB_P3_2, - GPIO79_USB_P3_3, - GPIO80_USB_P3_4, - GPIO81_USB_P3_5, - GPIO82_USB_P3_6, - GPIO0_2_USBH_PEN, -}; - -#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) -static struct resource dm9000_resources[] = { - [0] = { - .start = CM_X300_ETH_PHYS, - .end = CM_X300_ETH_PHYS + 0x3, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = CM_X300_ETH_PHYS + 0x4, - .end = CM_X300_ETH_PHYS + 0x4 + 500, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)), - .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct dm9000_plat_data cm_x300_dm9000_platdata = { - .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM, -}; - -static struct platform_device dm9000_device = { - .name = "dm9000", - .id = 0, - .num_resources = ARRAY_SIZE(dm9000_resources), - .resource = dm9000_resources, - .dev = { - .platform_data = &cm_x300_dm9000_platdata, - } - -}; - -static void __init cm_x300_init_dm9000(void) -{ - platform_device_register(&dm9000_device); -} -#else -static inline void cm_x300_init_dm9000(void) {} -#endif - -/* LCD */ -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pxafb_mode_info cm_x300_lcd_modes[] = { - [0] = { - .pixclock = 38250, - .bpp = 16, - .xres = 480, - .yres = 640, - .hsync_len = 8, - .vsync_len = 2, - .left_margin = 8, - .upper_margin = 2, - .right_margin = 24, - .lower_margin = 4, - .cmap_greyscale = 0, - }, - [1] = { - .pixclock = 153800, - .bpp = 16, - .xres = 240, - .yres = 320, - .hsync_len = 8, - .vsync_len = 2, - .left_margin = 8, - .upper_margin = 2, - .right_margin = 88, - .lower_margin = 2, - .cmap_greyscale = 0, - }, -}; - -static struct pxafb_mach_info cm_x300_lcd = { - .modes = cm_x300_lcd_modes, - .num_modes = ARRAY_SIZE(cm_x300_lcd_modes), - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -static void __init cm_x300_init_lcd(void) -{ - pxa_set_fb_info(NULL, &cm_x300_lcd); -} -#else -static inline void cm_x300_init_lcd(void) {} -#endif - -#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) -static struct pwm_lookup cm_x300_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 1, "pwm-backlight.0", NULL, 10000, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data cm_x300_backlight_data = { - .max_brightness = 100, - .dft_brightness = 100, -}; - -static struct platform_device cm_x300_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa27x_device_pwm0.dev, - .platform_data = &cm_x300_backlight_data, - }, -}; - -static void cm_x300_init_bl(void) -{ - pwm_add_table(cm_x300_pwm_lookup, ARRAY_SIZE(cm_x300_pwm_lookup)); - platform_device_register(&cm_x300_backlight_device); -} -#else -static inline void cm_x300_init_bl(void) {} -#endif - -#if defined(CONFIG_SPI_GPIO) || defined(CONFIG_SPI_GPIO_MODULE) -#define GPIO_LCD_BASE (144) -#define GPIO_LCD_DIN (GPIO_LCD_BASE + 8) /* aux_gpio3_0 */ -#define GPIO_LCD_DOUT (GPIO_LCD_BASE + 9) /* aux_gpio3_1 */ -#define GPIO_LCD_SCL (GPIO_LCD_BASE + 10) /* aux_gpio3_2 */ -#define GPIO_LCD_CS (GPIO_LCD_BASE + 11) /* aux_gpio3_3 */ -#define LCD_SPI_BUS_NUM (1) - -static struct spi_gpio_platform_data cm_x300_spi_gpio_pdata = { - .num_chipselect = 1, -}; - -static struct platform_device cm_x300_spi_gpio = { - .name = "spi_gpio", - .id = LCD_SPI_BUS_NUM, - .dev = { - .platform_data = &cm_x300_spi_gpio_pdata, - }, -}; - -static struct gpiod_lookup_table cm_x300_spi_gpiod_table = { - .dev_id = "spi_gpio", - .table = { - GPIO_LOOKUP("pca9555.1", GPIO_LCD_SCL - GPIO_LCD_BASE, - "sck", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("pca9555.1", GPIO_LCD_DIN - GPIO_LCD_BASE, - "mosi", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("pca9555.1", GPIO_LCD_DOUT - GPIO_LCD_BASE, - "miso", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("pca9555.1", GPIO_LCD_CS - GPIO_LCD_BASE, - "cs", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct tdo24m_platform_data cm_x300_tdo24m_pdata = { - .model = TDO35S, -}; - -static struct spi_board_info cm_x300_spi_devices[] __initdata = { - { - .modalias = "tdo24m", - .max_speed_hz = 1000000, - .bus_num = LCD_SPI_BUS_NUM, - .chip_select = 0, - .platform_data = &cm_x300_tdo24m_pdata, - }, -}; - -static void __init cm_x300_init_spi(void) -{ - spi_register_board_info(cm_x300_spi_devices, - ARRAY_SIZE(cm_x300_spi_devices)); - gpiod_add_lookup_table(&cm_x300_spi_gpiod_table); - platform_device_register(&cm_x300_spi_gpio); -} -#else -static inline void cm_x300_init_spi(void) {} -#endif - -#if defined(CONFIG_SND_PXA2XX_LIB_AC97) -static void __init cm_x300_init_ac97(void) -{ - pxa_set_ac97_info(NULL); -} -#else -static inline void cm_x300_init_ac97(void) {} -#endif - -#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL) -static struct mtd_partition cm_x300_nand_partitions[] = { - [0] = { - .name = "OBM", - .offset = 0, - .size = SZ_256K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - [1] = { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, - .size = SZ_256K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - [2] = { - .name = "Environment", - .offset = MTDPART_OFS_APPEND, - .size = SZ_256K, - }, - [3] = { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_256K + SZ_1M, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - [4] = { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - }, - [5] = { - .name = "fs", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct pxa3xx_nand_platform_data cm_x300_nand_info = { - .keep_config = 1, - .parts = cm_x300_nand_partitions, - .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions), -}; - -static void __init cm_x300_init_nand(void) -{ - pxa3xx_set_nand_info(&cm_x300_nand_info); -} -#else -static inline void cm_x300_init_nand(void) {} -#endif - -#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) -static struct pxamci_platform_data cm_x300_mci_platform_data = { - .detect_delay_ms = 200, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table cm_x300_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - /* Card detect on GPIO 82 */ - GPIO_LOOKUP("gpio-pxa", GPIO82_MMC_IRQ, "cd", GPIO_ACTIVE_LOW), - /* Write protect on GPIO 85 */ - GPIO_LOOKUP("gpio-pxa", GPIO85_MMC_WP, "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -/* The second MMC slot of CM-X300 is hardwired to Libertas card and has - no detection/ro pins */ -static int cm_x300_mci2_init(struct device *dev, - irq_handler_t cm_x300_detect_int, - void *data) -{ - return 0; -} - -static void cm_x300_mci2_exit(struct device *dev, void *data) -{ -} - -static struct pxamci_platform_data cm_x300_mci2_platform_data = { - .detect_delay_ms = 200, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .init = cm_x300_mci2_init, - .exit = cm_x300_mci2_exit, -}; - -static void __init cm_x300_init_mmc(void) -{ - gpiod_add_lookup_table(&cm_x300_mci_gpio_table); - pxa_set_mci_info(&cm_x300_mci_platform_data); - pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data); -} -#else -static inline void cm_x300_init_mmc(void) {} -#endif - -#if defined(CONFIG_PXA310_ULPI) -static struct clk *pout_clk; - -static int cm_x300_ulpi_phy_reset(void) -{ - int err; - - /* reset the PHY */ - err = gpio_request_one(GPIO_ULPI_PHY_RST, GPIOF_OUT_INIT_LOW, - "ulpi reset"); - if (err) { - pr_err("failed to request ULPI reset GPIO: %d\n", err); - return err; - } - - msleep(10); - gpio_set_value(GPIO_ULPI_PHY_RST, 1); - msleep(10); - - gpio_free(GPIO_ULPI_PHY_RST); - - return 0; -} - -static int cm_x300_u2d_init(struct device *dev) -{ - int err = 0; - - if (cpu_is_pxa310()) { - /* CLK_POUT is connected to the ULPI PHY */ - pout_clk = clk_get(NULL, "CLK_POUT"); - if (IS_ERR(pout_clk)) { - err = PTR_ERR(pout_clk); - pr_err("failed to get CLK_POUT: %d\n", err); - return err; - } - clk_prepare_enable(pout_clk); - - err = cm_x300_ulpi_phy_reset(); - if (err) { - clk_disable(pout_clk); - clk_put(pout_clk); - } - } - - return err; -} - -static void cm_x300_u2d_exit(struct device *dev) -{ - if (cpu_is_pxa310()) { - clk_disable_unprepare(pout_clk); - clk_put(pout_clk); - } -} - -static struct pxa3xx_u2d_platform_data cm_x300_u2d_platform_data = { - .ulpi_mode = ULPI_SER_6PIN, - .init = cm_x300_u2d_init, - .exit = cm_x300_u2d_exit, -}; - -static void __init cm_x300_init_u2d(void) -{ - pxa3xx_set_u2d_info(&cm_x300_u2d_platform_data); -} -#else -static inline void cm_x300_init_u2d(void) {} -#endif - -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static int cm_x300_ohci_init(struct device *dev) -{ - if (cpu_is_pxa300()) - UP2OCR = UP2OCR_HXS - | UP2OCR_HXOE | UP2OCR_DMPDE | UP2OCR_DPPDE; - - return 0; -} - -static struct pxaohci_platform_data cm_x300_ohci_platform_data = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW, - .init = cm_x300_ohci_init, -}; - -static void __init cm_x300_init_ohci(void) -{ - pxa_set_ohci_info(&cm_x300_ohci_platform_data); -} -#else -static inline void cm_x300_init_ohci(void) {} -#endif - -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -static struct gpio_led cm_x300_leds[] = { - [0] = { - .name = "cm-x300:green", - .default_trigger = "heartbeat", - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data cm_x300_gpio_led_pdata = { - .num_leds = ARRAY_SIZE(cm_x300_leds), - .leds = cm_x300_leds, -}; - -static struct platform_device cm_x300_led_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &cm_x300_gpio_led_pdata, - }, -}; - -static void __init cm_x300_init_leds(void) -{ - if (system_rev < 130) - cm_x300_leds[0].gpio = 79; - else - cm_x300_leds[0].gpio = 76; - - platform_device_register(&cm_x300_led_device); -} -#else -static inline void cm_x300_init_leds(void) {} -#endif - -#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) -/* PCA9555 */ -static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = { - .gpio_base = 128, -}; - -static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = { - .gpio_base = 144, -}; - -static struct i2c_board_info cm_x300_gpio_ext_info[] = { - [0] = { - I2C_BOARD_INFO("pca9555", 0x24), - .platform_data = &cm_x300_gpio_ext_pdata_0, - }, - [1] = { - I2C_BOARD_INFO("pca9555", 0x25), - .platform_data = &cm_x300_gpio_ext_pdata_1, - }, -}; - -static void __init cm_x300_init_i2c(void) -{ - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, cm_x300_gpio_ext_info, - ARRAY_SIZE(cm_x300_gpio_ext_info)); -} -#else -static inline void cm_x300_init_i2c(void) {} -#endif - -#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) -struct v3020_platform_data cm_x300_v3020_pdata = { - .use_gpio = 1, - .gpio_cs = GPIO95_RTC_CS, - .gpio_wr = GPIO96_RTC_WR, - .gpio_rd = GPIO97_RTC_RD, - .gpio_io = GPIO98_RTC_IO, -}; - -static struct platform_device cm_x300_rtc_device = { - .name = "v3020", - .id = -1, - .dev = { - .platform_data = &cm_x300_v3020_pdata, - } -}; - -static void __init cm_x300_init_rtc(void) -{ - platform_device_register(&cm_x300_rtc_device); -} -#else -static inline void cm_x300_init_rtc(void) {} -#endif - -/* Battery */ -struct power_supply_info cm_x300_psy_info = { - .name = "battery", - .technology = POWER_SUPPLY_TECHNOLOGY_LIPO, - .voltage_max_design = 4200000, - .voltage_min_design = 3000000, - .use_for_apm = 1, -}; - -static void cm_x300_battery_low(void) -{ -#if defined(CONFIG_APM_EMULATION) - apm_queue_event(APM_LOW_BATTERY); -#endif -} - -static void cm_x300_battery_critical(void) -{ -#if defined(CONFIG_APM_EMULATION) - apm_queue_event(APM_CRITICAL_SUSPEND); -#endif -} - -struct da9030_battery_info cm_x300_battery_info = { - .battery_info = &cm_x300_psy_info, - - .charge_milliamp = 1000, - .charge_millivolt = 4200, - - .vbat_low = 3600, - .vbat_crit = 3400, - .vbat_charge_start = 4100, - .vbat_charge_stop = 4200, - .vbat_charge_restart = 4000, - - .vcharge_min = 3200, - .vcharge_max = 5500, - - .tbat_low = 197, - .tbat_high = 78, - .tbat_restart = 100, - - .batmon_interval = 0, - - .battery_low = cm_x300_battery_low, - .battery_critical = cm_x300_battery_critical, -}; - -static struct regulator_consumer_supply buck2_consumers[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data buck2_data = { - .constraints = { - .min_uV = 1375000, - .max_uV = 1375000, - .state_mem = { - .enabled = 0, - }, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .apply_uV = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(buck2_consumers), - .consumer_supplies = buck2_consumers, -}; - -/* DA9030 */ -struct da903x_subdev_info cm_x300_da9030_subdevs[] = { - { - .name = "da903x-battery", - .id = DA9030_ID_BAT, - .platform_data = &cm_x300_battery_info, - }, - { - .name = "da903x-regulator", - .id = DA9030_ID_BUCK2, - .platform_data = &buck2_data, - }, -}; - -static struct da903x_platform_data cm_x300_da9030_info = { - .num_subdevs = ARRAY_SIZE(cm_x300_da9030_subdevs), - .subdevs = cm_x300_da9030_subdevs, -}; - -static struct i2c_board_info cm_x300_pmic_info = { - I2C_BOARD_INFO("da9030", 0x49), - .irq = IRQ_WAKEUP0, - .platform_data = &cm_x300_da9030_info, -}; - -static struct i2c_pxa_platform_data cm_x300_pwr_i2c_info = { - .use_pio = 1, -}; - -static void __init cm_x300_init_da9030(void) -{ - pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); - i2c_register_board_info(1, &cm_x300_pmic_info, 1); - irq_set_irq_wake(IRQ_WAKEUP0, 1); -} - -/* wi2wi gpio setting for system_rev >= 130 */ -static struct gpio cm_x300_wi2wi_gpios[] __initdata = { - { 71, GPIOF_OUT_INIT_HIGH, "wlan en" }, - { 70, GPIOF_OUT_INIT_HIGH, "bt reset" }, -}; - -static void __init cm_x300_init_wi2wi(void) -{ - int err; - - if (system_rev < 130) { - cm_x300_wi2wi_gpios[0].gpio = 77; /* wlan en */ - cm_x300_wi2wi_gpios[1].gpio = 78; /* bt reset */ - } - - /* Libertas and CSR reset */ - err = gpio_request_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios)); - if (err) { - pr_err("failed to request wifi/bt gpios: %d\n", err); - return; - } - - udelay(10); - gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0); - udelay(10); - gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1); - - gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios)); -} - -/* MFP */ -static void __init cm_x300_init_mfp(void) -{ - /* board-processor specific GPIO initialization */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_mfp_cfg)); - - if (system_rev < 130) - pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_lt130_mfp_cfg)); - else - pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_ge130_mfp_cfg)); - - if (cpu_is_pxa310()) - pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x310_mfp_cfg)); -} - -static void __init cm_x300_init(void) -{ - cm_x300_init_mfp(); - - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - if (cpu_is_pxa300()) - pxa_set_ffuart_info(NULL); - - cm_x300_init_da9030(); - cm_x300_init_dm9000(); - cm_x300_init_lcd(); - cm_x300_init_u2d(); - cm_x300_init_ohci(); - cm_x300_init_mmc(); - cm_x300_init_nand(); - cm_x300_init_leds(); - cm_x300_init_i2c(); - cm_x300_init_spi(); - cm_x300_init_rtc(); - cm_x300_init_ac97(); - cm_x300_init_wi2wi(); - cm_x300_init_bl(); - - regulator_has_full_constraints(); -} - -static void __init cm_x300_fixup(struct tag *tags, char **cmdline) -{ - /* Make sure that mi->bank[0].start = PHYS_ADDR */ - for (; tags->hdr.size; tags = tag_next(tags)) - if (tags->hdr.tag == ATAG_MEM && - tags->u.mem.start == 0x80000000) { - tags->u.mem.start = 0xa0000000; - break; - } -} - -MACHINE_START(CM_X300, "CM-X300 module") - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .init_machine = cm_x300_init, - .fixup = cm_x300_fixup, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c deleted file mode 100644 index b62af07b8f96..000000000000 --- a/arch/arm/mach-pxa/colibri-evalboard.c +++ /dev/null @@ -1,138 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/colibri-evalboard.c - * - * Support for Toradex Colibri Evaluation Carrier Board - * Daniel Mack <daniel@caiaq.de> - * Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <linux/gpio/machine.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <asm/io.h> - -#include "pxa27x.h" -#include "colibri.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include "pxa27x-udc.h" - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * SD/MMC card controller - ******************************************************************************/ -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -static struct pxamci_platform_data colibri_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .detect_delay_ms = 200, -}; - -static struct gpiod_lookup_table colibri_pxa270_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO0_COLIBRI_PXA270_SD_DETECT, - "cd", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct gpiod_lookup_table colibri_pxa300_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO13_COLIBRI_PXA300_SD_DETECT, - "cd", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct gpiod_lookup_table colibri_pxa320_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO28_COLIBRI_PXA320_SD_DETECT, - "cd", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init colibri_mmc_init(void) -{ - if (machine_is_colibri()) /* PXA270 Colibri */ - gpiod_add_lookup_table(&colibri_pxa270_mci_gpio_table); - if (machine_is_colibri300()) /* PXA300 Colibri */ - gpiod_add_lookup_table(&colibri_pxa300_mci_gpio_table); - else /* PXA320 Colibri */ - gpiod_add_lookup_table(&colibri_pxa320_mci_gpio_table); - - pxa_set_mci_info(&colibri_mci_platform_data); -} -#else -static inline void colibri_mmc_init(void) {} -#endif - -/****************************************************************************** - * USB Host - ******************************************************************************/ -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static int colibri_ohci_init(struct device *dev) -{ - UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; - return 0; -} - -static struct pxaohci_platform_data colibri_ohci_info = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT1 | - POWER_CONTROL_LOW | POWER_SENSE_LOW, - .init = colibri_ohci_init, -}; - -static void __init colibri_uhc_init(void) -{ - /* Colibri PXA270 has two usb ports, TBA for 320 */ - if (machine_is_colibri()) - colibri_ohci_info.flags |= ENABLE_PORT2; - - pxa_set_ohci_info(&colibri_ohci_info); -} -#else -static inline void colibri_uhc_init(void) {} -#endif - -/****************************************************************************** - * I2C RTC - ******************************************************************************/ -#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE) -static struct i2c_board_info __initdata colibri_i2c_devs[] = { - { - I2C_BOARD_INFO("m41t00", 0x68), - }, -}; - -static void __init colibri_rtc_init(void) -{ - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(colibri_i2c_devs)); -} -#else -static inline void colibri_rtc_init(void) {} -#endif - -void __init colibri_evalboard_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - colibri_mmc_init(); - colibri_uhc_init(); - colibri_rtc_init(); -} diff --git a/arch/arm/mach-pxa/colibri-pcmcia.c b/arch/arm/mach-pxa/colibri-pcmcia.c deleted file mode 100644 index 9da7b478e5eb..000000000000 --- a/arch/arm/mach-pxa/colibri-pcmcia.c +++ /dev/null @@ -1,165 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_colibri.c - * - * Driver for Toradex Colibri PXA270 CF socket - * - * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/gpio.h> - -#include <asm/mach-types.h> - -#include <pcmcia/soc_common.h> - -#define COLIBRI270_RESET_GPIO 53 -#define COLIBRI270_PPEN_GPIO 107 -#define COLIBRI270_BVD1_GPIO 83 -#define COLIBRI270_BVD2_GPIO 82 -#define COLIBRI270_DETECT_GPIO 84 -#define COLIBRI270_READY_GPIO 1 - -#define COLIBRI320_RESET_GPIO 77 -#define COLIBRI320_PPEN_GPIO 57 -#define COLIBRI320_BVD1_GPIO 53 -#define COLIBRI320_BVD2_GPIO 79 -#define COLIBRI320_DETECT_GPIO 81 -#define COLIBRI320_READY_GPIO 29 - -enum { - DETECT = 0, - READY = 1, - BVD1 = 2, - BVD2 = 3, - PPEN = 4, - RESET = 5, -}; - -/* Contents of this array are configured on-the-fly in init function */ -static struct gpio colibri_pcmcia_gpios[] = { - { 0, GPIOF_IN, "PCMCIA Detect" }, - { 0, GPIOF_IN, "PCMCIA Ready" }, - { 0, GPIOF_IN, "PCMCIA BVD1" }, - { 0, GPIOF_IN, "PCMCIA BVD2" }, - { 0, GPIOF_INIT_LOW, "PCMCIA PPEN" }, - { 0, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int colibri_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(colibri_pcmcia_gpios, - ARRAY_SIZE(colibri_pcmcia_gpios)); - if (ret) - goto err1; - - skt->socket.pci_irq = gpio_to_irq(colibri_pcmcia_gpios[READY].gpio); - skt->stat[SOC_STAT_CD].irq = gpio_to_irq(colibri_pcmcia_gpios[DETECT].gpio); - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - -err1: - return ret; -} - -static void colibri_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(colibri_pcmcia_gpios, - ARRAY_SIZE(colibri_pcmcia_gpios)); -} - -static void colibri_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - - state->detect = !!gpio_get_value(colibri_pcmcia_gpios[DETECT].gpio); - state->ready = !!gpio_get_value(colibri_pcmcia_gpios[READY].gpio); - state->bvd1 = !!gpio_get_value(colibri_pcmcia_gpios[BVD1].gpio); - state->bvd2 = !!gpio_get_value(colibri_pcmcia_gpios[BVD2].gpio); - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -colibri_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(colibri_pcmcia_gpios[PPEN].gpio, - !(state->Vcc == 33 && state->Vpp < 50)); - gpio_set_value(colibri_pcmcia_gpios[RESET].gpio, - state->flags & SS_RESET); - return 0; -} - -static struct pcmcia_low_level colibri_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = colibri_pcmcia_hw_init, - .hw_shutdown = colibri_pcmcia_hw_shutdown, - - .socket_state = colibri_pcmcia_socket_state, - .configure_socket = colibri_pcmcia_configure_socket, -}; - -static struct platform_device *colibri_pcmcia_device; - -static int __init colibri_pcmcia_init(void) -{ - int ret; - - if (!machine_is_colibri() && !machine_is_colibri320()) - return -ENODEV; - - colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!colibri_pcmcia_device) - return -ENOMEM; - - /* Colibri PXA270 */ - if (machine_is_colibri()) { - colibri_pcmcia_gpios[RESET].gpio = COLIBRI270_RESET_GPIO; - colibri_pcmcia_gpios[PPEN].gpio = COLIBRI270_PPEN_GPIO; - colibri_pcmcia_gpios[BVD1].gpio = COLIBRI270_BVD1_GPIO; - colibri_pcmcia_gpios[BVD2].gpio = COLIBRI270_BVD2_GPIO; - colibri_pcmcia_gpios[DETECT].gpio = COLIBRI270_DETECT_GPIO; - colibri_pcmcia_gpios[READY].gpio = COLIBRI270_READY_GPIO; - /* Colibri PXA320 */ - } else if (machine_is_colibri320()) { - colibri_pcmcia_gpios[RESET].gpio = COLIBRI320_RESET_GPIO; - colibri_pcmcia_gpios[PPEN].gpio = COLIBRI320_PPEN_GPIO; - colibri_pcmcia_gpios[BVD1].gpio = COLIBRI320_BVD1_GPIO; - colibri_pcmcia_gpios[BVD2].gpio = COLIBRI320_BVD2_GPIO; - colibri_pcmcia_gpios[DETECT].gpio = COLIBRI320_DETECT_GPIO; - colibri_pcmcia_gpios[READY].gpio = COLIBRI320_READY_GPIO; - } - - ret = platform_device_add_data(colibri_pcmcia_device, - &colibri_pcmcia_ops, sizeof(colibri_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(colibri_pcmcia_device); - - if (ret) - platform_device_put(colibri_pcmcia_device); - - return ret; -} - -static void __exit colibri_pcmcia_exit(void) -{ - platform_device_unregister(colibri_pcmcia_device); -} - -module_init(colibri_pcmcia_init); -module_exit(colibri_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>"); -MODULE_DESCRIPTION("PCMCIA support for Toradex Colibri PXA270/PXA320"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c deleted file mode 100644 index f6eaf464ca83..000000000000 --- a/arch/arm/mach-pxa/colibri-pxa270-income.c +++ /dev/null @@ -1,236 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/income.c - * - * Support for Income s.r.o. SH-Dmaster PXA270 SBC - * - * Copyright (C) 2010 - * Marek Vasut <marek.vasut@gmail.com> - * Pavel Revak <palo@bielyvlk.sk> - */ - -#include <linux/bitops.h> -#include <linux/delay.h> -#include <linux/gpio/machine.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/leds.h> -#include <linux/ioport.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include "pxa27x.h" -#include "pxa27x-udc.h" -#include <linux/platform_data/video-pxafb.h> - -#include "devices.h" -#include "generic.h" - -#define GPIO114_INCOME_ETH_IRQ (114) -#define GPIO0_INCOME_SD_DETECT (0) -#define GPIO0_INCOME_SD_RO (1) -#define GPIO54_INCOME_LED_A (54) -#define GPIO55_INCOME_LED_B (55) -#define GPIO113_INCOME_TS_IRQ (113) - -/****************************************************************************** - * SD/MMC card controller - ******************************************************************************/ -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -static struct pxamci_platform_data income_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .detect_delay_ms = 200, -}; - -static struct gpiod_lookup_table income_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - /* Card detect on GPIO 0 */ - GPIO_LOOKUP("gpio-pxa", GPIO0_INCOME_SD_DETECT, - "cd", GPIO_ACTIVE_LOW), - /* Write protect on GPIO 1 */ - GPIO_LOOKUP("gpio-pxa", GPIO0_INCOME_SD_RO, - "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init income_mmc_init(void) -{ - gpiod_add_lookup_table(&income_mci_gpio_table); - pxa_set_mci_info(&income_mci_platform_data); -} -#else -static inline void income_mmc_init(void) {} -#endif - -/****************************************************************************** - * USB Host - ******************************************************************************/ -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static struct pxaohci_platform_data income_ohci_info = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW, -}; - -static void __init income_uhc_init(void) -{ - pxa_set_ohci_info(&income_ohci_info); -} -#else -static inline void income_uhc_init(void) {} -#endif - -/****************************************************************************** - * LED - ******************************************************************************/ -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -struct gpio_led income_gpio_leds[] = { - { - .name = "income:green:leda", - .default_trigger = "none", - .gpio = GPIO54_INCOME_LED_A, - .active_low = 1, - }, - { - .name = "income:green:ledb", - .default_trigger = "none", - .gpio = GPIO55_INCOME_LED_B, - .active_low = 1, - } -}; - -static struct gpio_led_platform_data income_gpio_led_info = { - .leds = income_gpio_leds, - .num_leds = ARRAY_SIZE(income_gpio_leds), -}; - -static struct platform_device income_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &income_gpio_led_info, - } -}; - -static void __init income_led_init(void) -{ - platform_device_register(&income_leds); -} -#else -static inline void income_led_init(void) {} -#endif - -/****************************************************************************** - * I2C - ******************************************************************************/ -#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) -static struct i2c_board_info __initdata income_i2c_devs[] = { - { - I2C_BOARD_INFO("ds1340", 0x68), - }, { - I2C_BOARD_INFO("lm75", 0x4f), - }, -}; - -static void __init income_i2c_init(void) -{ - pxa_set_i2c_info(NULL); - pxa27x_set_i2c_power_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(income_i2c_devs)); -} -#else -static inline void income_i2c_init(void) {} -#endif - -/****************************************************************************** - * Framebuffer - ******************************************************************************/ -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pxafb_mode_info income_lcd_modes[] = { -{ - .pixclock = 144700, - .xres = 320, - .yres = 240, - .bpp = 32, - .depth = 18, - - .left_margin = 10, - .right_margin = 10, - .upper_margin = 7, - .lower_margin = 8, - - .hsync_len = 20, - .vsync_len = 2, - - .sync = FB_SYNC_VERT_HIGH_ACT, -}, -}; - -static struct pxafb_mach_info income_lcd_screen = { - .modes = income_lcd_modes, - .num_modes = ARRAY_SIZE(income_lcd_modes), - .lcd_conn = LCD_COLOR_TFT_18BPP | LCD_PCLK_EDGE_FALL, -}; - -static void __init income_lcd_init(void) -{ - pxa_set_fb_info(NULL, &income_lcd_screen); -} -#else -static inline void income_lcd_init(void) {} -#endif - -/****************************************************************************** - * Backlight - ******************************************************************************/ -#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) -static struct pwm_lookup income_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data income_backlight_data = { - .max_brightness = 0x3ff, - .dft_brightness = 0x1ff, -}; - -static struct platform_device income_backlight = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa27x_device_pwm0.dev, - .platform_data = &income_backlight_data, - }, -}; - -static void __init income_pwm_init(void) -{ - pwm_add_table(income_pwm_lookup, ARRAY_SIZE(income_pwm_lookup)); - platform_device_register(&income_backlight); -} -#else -static inline void income_pwm_init(void) {} -#endif - -void __init colibri_pxa270_income_boardinit(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - income_mmc_init(); - income_uhc_init(); - income_led_init(); - income_i2c_init(); - income_lcd_init(); - income_pwm_init(); -} - diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c deleted file mode 100644 index 5dc669752836..000000000000 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ /dev/null @@ -1,330 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/colibri-pxa270.c - * - * Support for Toradex PXA270 based Colibri module - * Daniel Mack <daniel@caiaq.de> - * Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/moduleparam.h> -#include <linux/kernel.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/platform_device.h> -#include <linux/regulator/machine.h> -#include <linux/ucb1400.h> - -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach-types.h> -#include <linux/sizes.h> - -#include <linux/platform_data/asoc-pxa.h> -#include "colibri.h" -#include "pxa27x.h" - -#include "devices.h" -#include "generic.h" - -/****************************************************************************** - * Evaluation board MFP - ******************************************************************************/ -#ifdef CONFIG_MACH_COLIBRI_EVALBOARD -static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO0_GPIO, /* SD detect */ - - /* FFUART */ - GPIO39_FFUART_TXD, - GPIO34_FFUART_RXD, - - /* UHC */ - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, - GPIO119_USBH2_PWR, - GPIO120_USBH2_PEN, - - /* PCMCIA */ - GPIO85_nPCE_1, - GPIO54_nPCE_2, - GPIO55_nPREG, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO49_nPWE, - GPIO48_nPOE, - GPIO57_nIOIS16, - GPIO56_nPWAIT, - GPIO104_PSKTSEL, - GPIO53_GPIO, /* RESET */ - GPIO83_GPIO, /* BVD1 */ - GPIO82_GPIO, /* BVD2 */ - GPIO1_GPIO, /* READY */ - GPIO84_GPIO, /* DETECT */ - GPIO107_GPIO, /* PPEN */ - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, -}; -#else -static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {}; -#endif - -#ifdef CONFIG_MACH_COLIBRI_PXA270_INCOME -static mfp_cfg_t income_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO0_GPIO, /* SD detect */ - GPIO1_GPIO, /* SD read-only */ - - /* FFUART */ - GPIO39_FFUART_TXD, - GPIO34_FFUART_RXD, - - /* BFUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO45_BTUART_RTS, - - /* STUART */ - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, - - /* UHC */ - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* PWM */ - GPIO16_PWM0_OUT, - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* LED */ - GPIO54_GPIO, /* LED A */ - GPIO55_GPIO, /* LED B */ -}; -#else -static mfp_cfg_t income_pin_config[] __initdata = {}; -#endif - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = { - /* Ethernet */ - GPIO78_nCS_2, /* Ethernet CS */ - GPIO114_GPIO, /* Ethernet IRQ */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO95_AC97_nRESET, - GPIO98_AC97_SYSCLK, - GPIO113_GPIO, /* Touchscreen IRQ */ -}; - -/****************************************************************************** - * NOR Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct mtd_partition colibri_partitions[] = { - { - .name = "Bootloader", - .offset = 0x00000000, - .size = 0x00040000, - .mask_flags = MTD_WRITEABLE /* force read-only */ - }, { - .name = "Kernel", - .offset = 0x00040000, - .size = 0x00400000, - .mask_flags = 0 - }, { - .name = "Rootfs", - .offset = 0x00440000, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - } -}; - -static struct physmap_flash_data colibri_flash_data[] = { - { - .width = 4, /* bankwidth in bytes */ - .parts = colibri_partitions, - .nr_parts = ARRAY_SIZE(colibri_partitions) - } -}; - -static struct resource colibri_pxa270_flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_32M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device colibri_pxa270_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = colibri_flash_data, - }, - .resource = &colibri_pxa270_flash_resource, - .num_resources = 1, -}; - -static void __init colibri_pxa270_nor_init(void) -{ - platform_device_register(&colibri_pxa270_flash_device); -} -#else -static inline void colibri_pxa270_nor_init(void) {} -#endif - -/****************************************************************************** - * Ethernet - ******************************************************************************/ -#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) -static struct resource colibri_pxa270_dm9000_resources[] = { - { - .start = PXA_CS2_PHYS, - .end = PXA_CS2_PHYS + 3, - .flags = IORESOURCE_MEM, - }, - { - .start = PXA_CS2_PHYS + 4, - .end = PXA_CS2_PHYS + 4 + 500, - .flags = IORESOURCE_MEM, - }, - { - .start = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ), - .end = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ), - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, - }, -}; - -static struct platform_device colibri_pxa270_dm9000_device = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(colibri_pxa270_dm9000_resources), - .resource = colibri_pxa270_dm9000_resources, -}; - -static void __init colibri_pxa270_eth_init(void) -{ - platform_device_register(&colibri_pxa270_dm9000_device); -} -#else -static inline void colibri_pxa270_eth_init(void) {} -#endif - -/****************************************************************************** - * Audio and Touchscreen - ******************************************************************************/ -#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ - defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) -static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = { - .reset_gpio = 95, -}; - -static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { - .irq = PXA_GPIO_TO_IRQ(GPIO113_COLIBRI_PXA270_TS_IRQ), -}; - -static struct platform_device colibri_pxa270_ucb1400_device = { - .name = "ucb1400_core", - .id = -1, - .dev = { - .platform_data = &colibri_pxa270_ucb1400_pdata, - }, -}; - -static void __init colibri_pxa270_tsc_init(void) -{ - pxa_set_ac97_info(&colibri_pxa270_ac97_pdata); - platform_device_register(&colibri_pxa270_ucb1400_device); -} -#else -static inline void colibri_pxa270_tsc_init(void) {} -#endif - -static int colibri_pxa270_baseboard; -core_param(colibri_pxa270_baseboard, colibri_pxa270_baseboard, int, 0444); - -static void __init colibri_pxa270_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config)); - - colibri_pxa270_nor_init(); - colibri_pxa270_eth_init(); - colibri_pxa270_tsc_init(); - - switch (colibri_pxa270_baseboard) { - case COLIBRI_EVALBOARD: - pxa2xx_mfp_config(ARRAY_AND_SIZE( - colibri_pxa270_evalboard_pin_config)); - colibri_evalboard_init(); - break; - case COLIBRI_PXA270_INCOME: - pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config)); - colibri_pxa270_income_boardinit(); - break; - default: - printk(KERN_ERR "Illegal colibri_pxa270_baseboard type %d\n", - colibri_pxa270_baseboard); - } - - regulator_has_full_constraints(); -} - -/* The "Income s.r.o. SH-Dmaster PXA270 SBC" board can be booted either - * with the INCOME mach type or with COLIBRI and the kernel parameter - * "colibri_pxa270_baseboard=1" - */ -static void __init colibri_pxa270_income_init(void) -{ - colibri_pxa270_baseboard = COLIBRI_PXA270_INCOME; - colibri_pxa270_init(); -} - -MACHINE_START(COLIBRI, "Toradex Colibri PXA270") - .atag_offset = 0x100, - .init_machine = colibri_pxa270_init, - .map_io = pxa27x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END - -MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") - .atag_offset = 0x100, - .init_machine = colibri_pxa270_income_init, - .map_io = pxa27x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END - diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c deleted file mode 100644 index 11ca6c4795e7..000000000000 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ /dev/null @@ -1,193 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-pxa/colibri-pxa300.c - * - * Support for Toradex PXA300/310 based Colibri module - * - * Daniel Mack <daniel@caiaq.de> - * Matthias Meier <matthias.j.meier@gmx.net> - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> -#include <linux/soc/pxa/cpu.h> - -#include <asm/mach-types.h> -#include <linux/sizes.h> -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> - -#include "pxa300.h" -#include "colibri.h" -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/asoc-pxa.h> - -#include "generic.h" -#include "devices.h" - - -#ifdef CONFIG_MACH_COLIBRI_EVALBOARD -static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = { - /* MMC */ - GPIO7_MMC1_CLK, - GPIO14_MMC1_CMD, - GPIO3_MMC1_DAT0, - GPIO4_MMC1_DAT1, - GPIO5_MMC1_DAT2, - GPIO6_MMC1_DAT3, - GPIO13_GPIO, /* GPIO13_COLIBRI_PXA300_SD_DETECT */ - - /* UHC */ - GPIO0_2_USBH_PEN, - GPIO1_2_USBH_PWR, - GPIO77_USB_P3_1, - GPIO78_USB_P3_2, - GPIO79_USB_P3_3, - GPIO80_USB_P3_4, - GPIO81_USB_P3_5, - GPIO82_USB_P3_6, - - /* I2C */ - GPIO21_I2C_SCL, - GPIO22_I2C_SDA, -}; -#else -static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {}; -#endif - -#if defined(CONFIG_AX88796) -#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO) -/* - * Asix AX88796 Ethernet - */ -static struct ax_plat_data colibri_asix_platdata = { - .flags = 0, /* defined later */ - .wordlength = 2, -}; - -static struct resource colibri_asix_resource[] = { - [0] = { - .start = PXA3xx_CS2_PHYS, - .end = PXA3xx_CS2_PHYS + (0x20 * 2) - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), - .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, - } -}; - -static struct platform_device asix_device = { - .name = "ax88796", - .id = 0, - .num_resources = ARRAY_SIZE(colibri_asix_resource), - .resource = colibri_asix_resource, - .dev = { - .platform_data = &colibri_asix_platdata - } -}; - -static mfp_cfg_t colibri_pxa300_eth_pin_config[] __initdata = { - GPIO1_nCS2, /* AX88796 chip select */ - GPIO26_GPIO | MFP_PULL_HIGH /* AX88796 IRQ */ -}; - -static void __init colibri_pxa300_init_eth(void) -{ - colibri_pxa3xx_init_eth(&colibri_asix_platdata); - pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_eth_pin_config)); - platform_device_register(&asix_device); -} -#else -static inline void __init colibri_pxa300_init_eth(void) {} -#endif /* CONFIG_AX88796 */ - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static mfp_cfg_t colibri_pxa300_lcd_pin_config[] __initdata = { - GPIO54_LCD_LDD_0, - GPIO55_LCD_LDD_1, - GPIO56_LCD_LDD_2, - GPIO57_LCD_LDD_3, - GPIO58_LCD_LDD_4, - GPIO59_LCD_LDD_5, - GPIO60_LCD_LDD_6, - GPIO61_LCD_LDD_7, - GPIO62_LCD_LDD_8, - GPIO63_LCD_LDD_9, - GPIO64_LCD_LDD_10, - GPIO65_LCD_LDD_11, - GPIO66_LCD_LDD_12, - GPIO67_LCD_LDD_13, - GPIO68_LCD_LDD_14, - GPIO69_LCD_LDD_15, - GPIO70_LCD_LDD_16, - GPIO71_LCD_LDD_17, - GPIO62_LCD_CS_N, - GPIO72_LCD_FCLK, - GPIO73_LCD_LCLK, - GPIO74_LCD_PCLK, - GPIO75_LCD_BIAS, - GPIO76_LCD_VSYNC, -}; - -static void __init colibri_pxa300_init_lcd(void) -{ - pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_lcd_pin_config)); -} - -#else -static inline void colibri_pxa300_init_lcd(void) {} -#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ - -#if defined(CONFIG_SND_AC97_CODEC) || defined(CONFIG_SND_AC97_CODEC_MODULE) -static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = { - GPIO24_AC97_SYSCLK, - GPIO23_AC97_nACRESET, - GPIO25_AC97_SDATA_IN_0, - GPIO27_AC97_SDATA_OUT, - GPIO28_AC97_SYNC, - GPIO29_AC97_BITCLK -}; - -static inline void __init colibri_pxa310_init_ac97(void) -{ - /* no AC97 codec on Colibri PXA300 */ - if (!cpu_is_pxa310()) - return; - - pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa310_ac97_pin_config)); - pxa_set_ac97_info(NULL); -} -#else -static inline void colibri_pxa310_init_ac97(void) {} -#endif - -void __init colibri_pxa300_init(void) -{ - colibri_pxa300_init_eth(); - colibri_pxa3xx_init_nand(); - colibri_pxa300_init_lcd(); - colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO)); - colibri_pxa310_init_ac97(); - - /* Evalboard init */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_evalboard_pin_config)); - colibri_evalboard_init(); -} - -MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") - .atag_offset = 0x100, - .init_machine = colibri_pxa300_init, - .map_io = pxa3xx_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END - diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c deleted file mode 100644 index 1a59056e181e..000000000000 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ /dev/null @@ -1,264 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-pxa/colibri-pxa320.c - * - * Support for Toradex PXA320/310 based Colibri module - * - * Daniel Mack <daniel@caiaq.de> - * Matthias Meier <matthias.j.meier@gmx.net> - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/gpio/machine.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> - -#include <asm/mach-types.h> -#include <linux/sizes.h> -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> - -#include "pxa320.h" -#include "colibri.h" -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/asoc-pxa.h> -#include "pxa27x-udc.h" -#include "udc.h" - -#include "generic.h" -#include "devices.h" - -#ifdef CONFIG_MACH_COLIBRI_EVALBOARD -static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = { - /* MMC */ - GPIO22_MMC1_CLK, - GPIO23_MMC1_CMD, - GPIO18_MMC1_DAT0, - GPIO19_MMC1_DAT1, - GPIO20_MMC1_DAT2, - GPIO21_MMC1_DAT3, - GPIO28_GPIO, /* SD detect */ - - /* UART 1 configuration (may be set by bootloader) */ - GPIO99_UART1_CTS, - GPIO104_UART1_RTS, - GPIO97_UART1_RXD, - GPIO98_UART1_TXD, - GPIO101_UART1_DTR, - GPIO103_UART1_DSR, - GPIO100_UART1_DCD, - GPIO102_UART1_RI, - - /* UART 2 configuration */ - GPIO109_UART2_CTS, - GPIO112_UART2_RTS, - GPIO110_UART2_RXD, - GPIO111_UART2_TXD, - - /* UART 3 configuration */ - GPIO30_UART3_RXD, - GPIO31_UART3_TXD, - - /* UHC */ - GPIO2_2_USBH_PEN, - GPIO3_2_USBH_PWR, - - /* I2C */ - GPIO32_I2C_SCL, - GPIO33_I2C_SDA, - - /* PCMCIA */ - MFP_CFG(GPIO59, AF7), /* PRST ; AF7 to tristate */ - MFP_CFG(GPIO61, AF7), /* PCE1 ; AF7 to tristate */ - MFP_CFG(GPIO60, AF7), /* PCE2 ; AF7 to tristate */ - MFP_CFG(GPIO62, AF7), /* PCD ; AF7 to tristate */ - MFP_CFG(GPIO56, AF7), /* PSKTSEL ; AF7 to tristate */ - GPIO27_GPIO, /* RDnWR ; input/tristate */ - GPIO50_GPIO, /* PREG ; input/tristate */ - GPIO2_RDY, - GPIO5_NPIOR, - GPIO6_NPIOW, - GPIO7_NPIOS16, - GPIO8_NPWAIT, - GPIO29_GPIO, /* PRDY (READY GPIO) */ - GPIO57_GPIO, /* PPEN (POWER GPIO) */ - GPIO81_GPIO, /* PCD (DETECT GPIO) */ - GPIO77_GPIO, /* PRST (RESET GPIO) */ - GPIO53_GPIO, /* PBVD1 */ - GPIO79_GPIO, /* PBVD2 */ - GPIO54_GPIO, /* POE */ -}; -#else -static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {}; -#endif - -#if defined(CONFIG_AX88796) -#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO36_GPIO) -/* - * Asix AX88796 Ethernet - */ -static struct ax_plat_data colibri_asix_platdata = { - .flags = 0, /* defined later */ - .wordlength = 2, -}; - -static struct resource colibri_asix_resource[] = { - [0] = { - .start = PXA3xx_CS2_PHYS, - .end = PXA3xx_CS2_PHYS + (0x20 * 2) - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), - .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, - } -}; - -static struct platform_device asix_device = { - .name = "ax88796", - .id = 0, - .num_resources = ARRAY_SIZE(colibri_asix_resource), - .resource = colibri_asix_resource, - .dev = { - .platform_data = &colibri_asix_platdata - } -}; - -static mfp_cfg_t colibri_pxa320_eth_pin_config[] __initdata = { - GPIO3_nCS2, /* AX88796 chip select */ - GPIO36_GPIO | MFP_PULL_HIGH /* AX88796 IRQ */ -}; - -static void __init colibri_pxa320_init_eth(void) -{ - colibri_pxa3xx_init_eth(&colibri_asix_platdata); - pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_eth_pin_config)); - platform_device_register(&asix_device); -} -#else -static inline void __init colibri_pxa320_init_eth(void) {} -#endif /* CONFIG_AX88796 */ - -#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE) -static struct gpiod_lookup_table gpio_vbus_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", MFP_PIN_GPIO96, - "vbus", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device colibri_pxa320_gpio_vbus = { - .name = "gpio-vbus", - .id = -1, -}; - -static void colibri_pxa320_udc_command(int cmd) -{ - if (cmd == PXA2XX_UDC_CMD_CONNECT) - UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE; - else if (cmd == PXA2XX_UDC_CMD_DISCONNECT) - UP2OCR = UP2OCR_HXOE; -} - -static struct pxa2xx_udc_mach_info colibri_pxa320_udc_info __initdata = { - .udc_command = colibri_pxa320_udc_command, - .gpio_pullup = -1, -}; - -static void __init colibri_pxa320_init_udc(void) -{ - pxa_set_udc_info(&colibri_pxa320_udc_info); - gpiod_add_lookup_table(&gpio_vbus_gpiod_table); - platform_device_register(&colibri_pxa320_gpio_vbus); -} -#else -static inline void colibri_pxa320_init_udc(void) {} -#endif - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static mfp_cfg_t colibri_pxa320_lcd_pin_config[] __initdata = { - GPIO6_2_LCD_LDD_0, - GPIO7_2_LCD_LDD_1, - GPIO8_2_LCD_LDD_2, - GPIO9_2_LCD_LDD_3, - GPIO10_2_LCD_LDD_4, - GPIO11_2_LCD_LDD_5, - GPIO12_2_LCD_LDD_6, - GPIO13_2_LCD_LDD_7, - GPIO63_LCD_LDD_8, - GPIO64_LCD_LDD_9, - GPIO65_LCD_LDD_10, - GPIO66_LCD_LDD_11, - GPIO67_LCD_LDD_12, - GPIO68_LCD_LDD_13, - GPIO69_LCD_LDD_14, - GPIO70_LCD_LDD_15, - GPIO71_LCD_LDD_16, - GPIO72_LCD_LDD_17, - GPIO73_LCD_CS_N, - GPIO74_LCD_VSYNC, - GPIO14_2_LCD_FCLK, - GPIO15_2_LCD_LCLK, - GPIO16_2_LCD_PCLK, - GPIO17_2_LCD_BIAS, -}; - -static void __init colibri_pxa320_init_lcd(void) -{ - pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_lcd_pin_config)); -} -#else -static inline void colibri_pxa320_init_lcd(void) {} -#endif - -#if defined(CONFIG_SND_AC97_CODEC) || \ - defined(CONFIG_SND_AC97_CODEC_MODULE) -static mfp_cfg_t colibri_pxa320_ac97_pin_config[] __initdata = { - GPIO34_AC97_SYSCLK, - GPIO35_AC97_SDATA_IN_0, - GPIO37_AC97_SDATA_OUT, - GPIO38_AC97_SYNC, - GPIO39_AC97_BITCLK, - GPIO40_AC97_nACRESET -}; - -static inline void __init colibri_pxa320_init_ac97(void) -{ - pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_ac97_pin_config)); - pxa_set_ac97_info(NULL); -} -#else -static inline void colibri_pxa320_init_ac97(void) {} -#endif - -void __init colibri_pxa320_init(void) -{ - colibri_pxa320_init_eth(); - colibri_pxa3xx_init_nand(); - colibri_pxa320_init_lcd(); - colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO)); - colibri_pxa320_init_ac97(); - colibri_pxa320_init_udc(); - - /* Evalboard init */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_evalboard_pin_config)); - colibri_evalboard_init(); -} - -MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") - .atag_offset = 0x100, - .init_machine = colibri_pxa320_init, - .map_io = pxa3xx_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END - diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c deleted file mode 100644 index 77d6ef5fa42d..000000000000 --- a/arch/arm/mach-pxa/colibri-pxa3xx.c +++ /dev/null @@ -1,147 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-pxa/colibri-pxa3xx.c - * - * Common functions for all Toradex PXA3xx modules - * - * Daniel Mack <daniel@caiaq.de> - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <linux/etherdevice.h> -#include <asm/mach-types.h> -#include <linux/sizes.h> -#include <asm/system_info.h> -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> -#include "pxa3xx-regs.h" -#include "mfp-pxa300.h" -#include "colibri.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mtd-nand-pxa3xx.h> - -#include "generic.h" -#include "devices.h" - -#if defined(CONFIG_AX88796) -#define ETHER_ADDR_LEN 6 -static u8 ether_mac_addr[ETHER_ADDR_LEN]; - -void __init colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data) -{ - int i; - u64 serial = ((u64) system_serial_high << 32) | system_serial_low; - - /* - * If the bootloader passed in a serial boot tag, which contains a - * valid ethernet MAC, pass it to the interface. Toradex ships the - * modules with their own bootloader which provides a valid MAC - * this way. - */ - - for (i = 0; i < ETHER_ADDR_LEN; i++) { - ether_mac_addr[i] = serial & 0xff; - serial >>= 8; - } - - if (is_valid_ether_addr(ether_mac_addr)) { - plat_data->flags |= AXFLG_MAC_FROMPLATFORM; - plat_data->mac_addr = ether_mac_addr; - printk(KERN_INFO "%s(): taking MAC from serial boot tag\n", - __func__); - } else { - plat_data->flags |= AXFLG_MAC_FROMDEV; - printk(KERN_INFO "%s(): no valid serial boot tag found, " - "taking MAC from device\n", __func__); - } -} -#endif - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static int lcd_bl_pin; - -/* - * LCD panel (Sharp LQ043T3DX02) - */ -static void colibri_lcd_backlight(int on) -{ - gpio_set_value(lcd_bl_pin, !!on); -} - -static struct pxafb_mode_info sharp_lq43_mode = { - .pixclock = 101936, - .xres = 480, - .yres = 272, - .bpp = 32, - .depth = 18, - .hsync_len = 41, - .left_margin = 2, - .right_margin = 2, - .vsync_len = 10, - .upper_margin = 2, - .lower_margin = 2, - .sync = 0, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info sharp_lq43_info = { - .modes = &sharp_lq43_mode, - .num_modes = 1, - .cmap_inverse = 0, - .cmap_static = 0, - .lcd_conn = LCD_COLOR_TFT_18BPP, - .pxafb_backlight_power = colibri_lcd_backlight, -}; - -void __init colibri_pxa3xx_init_lcd(int bl_pin) -{ - lcd_bl_pin = bl_pin; - gpio_request(bl_pin, "lcd backlight"); - gpio_direction_output(bl_pin, 0); - pxa_set_fb_info(NULL, &sharp_lq43_info); -} -#endif - -#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL) -static struct mtd_partition colibri_nand_partitions[] = { - { - .name = "bootloader", - .offset = 0, - .size = SZ_512K, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_1M, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "fs", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct pxa3xx_nand_platform_data colibri_nand_info = { - .keep_config = 1, - .parts = colibri_nand_partitions, - .nr_parts = ARRAY_SIZE(colibri_nand_partitions), -}; - -void __init colibri_pxa3xx_init_nand(void) -{ - pxa3xx_set_nand_info(&colibri_nand_info); -} -#endif - diff --git a/arch/arm/mach-pxa/colibri.h b/arch/arm/mach-pxa/colibri.h deleted file mode 100644 index 01a46f36cc1f..000000000000 --- a/arch/arm/mach-pxa/colibri.h +++ /dev/null @@ -1,70 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _COLIBRI_H_ -#define _COLIBRI_H_ - -#include <net/ax88796.h> -#include "mfp.h" - -/* - * base board glue for PXA270 module - */ - -enum { - COLIBRI_EVALBOARD = 0, - COLIBRI_PXA270_INCOME, -}; - -#if defined(CONFIG_MACH_COLIBRI_EVALBOARD) -extern void colibri_evalboard_init(void); -#else -static inline void colibri_evalboard_init(void) {} -#endif - -#if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME) -extern void colibri_pxa270_income_boardinit(void); -#else -static inline void colibri_pxa270_income_boardinit(void) {} -#endif - -/* - * common settings for all modules - */ - -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -extern void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin); -#else -static inline void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin) {} -#endif - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -extern void colibri_pxa3xx_init_lcd(int bl_pin); -#else -static inline void colibri_pxa3xx_init_lcd(int bl_pin) {} -#endif - -#if defined(CONFIG_AX88796) -extern void colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data); -#endif - -#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL) -extern void colibri_pxa3xx_init_nand(void); -#else -static inline void colibri_pxa3xx_init_nand(void) {} -#endif - -/* physical memory regions */ -#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */ - -/* GPIO definitions for Colibri PXA270 */ -#define GPIO114_COLIBRI_PXA270_ETH_IRQ 114 -#define GPIO0_COLIBRI_PXA270_SD_DETECT 0 -#define GPIO113_COLIBRI_PXA270_TS_IRQ 113 - -/* GPIO definitions for Colibri PXA300/310 */ -#define GPIO13_COLIBRI_PXA300_SD_DETECT 13 - -/* GPIO definitions for Colibri PXA320 */ -#define GPIO28_COLIBRI_PXA320_SD_DETECT 28 - -#endif /* _COLIBRI_H_ */ - diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c deleted file mode 100644 index 5738496717e2..000000000000 --- a/arch/arm/mach-pxa/corgi.c +++ /dev/null @@ -1,826 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Support for Sharp SL-C7xx PDAs - * Models: SL-C700 (Corgi), SL-C750 (Shepherd), SL-C760 (Husky) - * - * Copyright (c) 2004-2005 Richard Purdie - * - * Based on Sharp's 2.4 kernel patches/lubbock.c - */ - -#include <linux/kernel.h> -#include <linux/module.h> /* symbol_get ; symbol_put */ -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/major.h> -#include <linux/fs.h> -#include <linux/interrupt.h> -#include <linux/leds.h> -#include <linux/mmc/host.h> -#include <linux/mtd/physmap.h> -#include <linux/pm.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/backlight.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/io.h> -#include <linux/regulator/machine.h> -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> -#include <linux/spi/corgi_lcd.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/mtd/sharpsl.h> -#include <linux/input/matrix_keypad.h> -#include <linux/gpio_keys.h> -#include <linux/memblock.h> -#include <video/w100fb.h> - -#include <asm/setup.h> -#include <asm/memory.h> -#include <asm/mach-types.h> -#include <asm/irq.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "pxa25x.h" -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/mmc-pxamci.h> -#include "udc.h" -#include "corgi.h" -#include "sharpsl_pm.h" - -#include <asm/mach/sharpsl_param.h> -#include <asm/hardware/scoop.h> - -#include "generic.h" -#include "devices.h" - -static unsigned long corgi_pin_config[] __initdata = { - /* Static Memory I/O */ - GPIO78_nCS_2, /* w100fb */ - GPIO80_nCS_4, /* scoop */ - - /* SSP1 */ - GPIO23_SSP1_SCLK, - GPIO25_SSP1_TXD, - GPIO26_SSP1_RXD, - GPIO24_GPIO, /* CORGI_GPIO_ADS7846_CS - SFRM as chip select */ - - /* I2S */ - GPIO28_I2S_BITCLK_OUT, - GPIO29_I2S_SDATA_IN, - GPIO30_I2S_SDATA_OUT, - GPIO31_I2S_SYNC, - GPIO32_I2S_SYSCLK, - - /* Infra-Red */ - GPIO47_FICP_TXD, - GPIO46_FICP_RXD, - - /* FFUART */ - GPIO40_FFUART_DTR, - GPIO41_FFUART_RTS, - GPIO39_FFUART_TXD, - GPIO37_FFUART_DSR, - GPIO34_FFUART_RXD, - GPIO35_FFUART_CTS, - - /* PC Card */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* MMC */ - GPIO6_MMC_CLK, - GPIO8_MMC_CS0, - - /* GPIO Matrix Keypad */ - GPIO66_GPIO | MFP_LPM_DRIVE_HIGH, /* column 0 */ - GPIO67_GPIO | MFP_LPM_DRIVE_HIGH, /* column 1 */ - GPIO68_GPIO | MFP_LPM_DRIVE_HIGH, /* column 2 */ - GPIO69_GPIO | MFP_LPM_DRIVE_HIGH, /* column 3 */ - GPIO70_GPIO | MFP_LPM_DRIVE_HIGH, /* column 4 */ - GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* column 5 */ - GPIO72_GPIO | MFP_LPM_DRIVE_HIGH, /* column 6 */ - GPIO73_GPIO | MFP_LPM_DRIVE_HIGH, /* column 7 */ - GPIO74_GPIO | MFP_LPM_DRIVE_HIGH, /* column 8 */ - GPIO75_GPIO | MFP_LPM_DRIVE_HIGH, /* column 9 */ - GPIO76_GPIO | MFP_LPM_DRIVE_HIGH, /* column 10 */ - GPIO77_GPIO | MFP_LPM_DRIVE_HIGH, /* column 11 */ - GPIO58_GPIO, /* row 0 */ - GPIO59_GPIO, /* row 1 */ - GPIO60_GPIO, /* row 2 */ - GPIO61_GPIO, /* row 3 */ - GPIO62_GPIO, /* row 4 */ - GPIO63_GPIO, /* row 5 */ - GPIO64_GPIO, /* row 6 */ - GPIO65_GPIO, /* row 7 */ - - /* GPIO */ - GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */ - GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */ - GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_MAIN_BAT_{LOW,COVER} */ - GPIO13_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_LED_ORANGE */ - GPIO21_GPIO, /* CORGI_GPIO_ADC_TEMP */ - GPIO22_GPIO, /* CORGI_GPIO_IR_ON */ - GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */ - GPIO38_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_CHRG_ON */ - GPIO43_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_CHRG_UKN */ - GPIO44_GPIO, /* CORGI_GPIO_HSYNC */ - - GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_KEY_INT */ - GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* CORGI_GPIO_AC_IN */ - GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_WAKEUP */ -}; - -/* - * Corgi SCOOP Device - */ -static struct resource corgi_scoop_resources[] = { - [0] = { - .start = 0x10800000, - .end = 0x10800fff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct scoop_config corgi_scoop_setup = { - .io_dir = CORGI_SCOOP_IO_DIR, - .io_out = CORGI_SCOOP_IO_OUT, - .gpio_base = CORGI_SCOOP_GPIO_BASE, -}; - -struct platform_device corgiscoop_device = { - .name = "sharp-scoop", - .id = -1, - .dev = { - .platform_data = &corgi_scoop_setup, - }, - .num_resources = ARRAY_SIZE(corgi_scoop_resources), - .resource = corgi_scoop_resources, -}; - -static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = { -{ - .dev = &corgiscoop_device.dev, - .irq = CORGI_IRQ_GPIO_CF_IRQ, - .cd_irq = CORGI_IRQ_GPIO_CF_CD, - .cd_irq_str = "PCMCIA0 CD", -}, -}; - -static struct scoop_pcmcia_config corgi_pcmcia_config = { - .devs = &corgi_pcmcia_scoop[0], - .num_devs = 1, -}; - -static struct w100_mem_info corgi_fb_mem = { - .ext_cntl = 0x00040003, - .sdram_mode_reg = 0x00650021, - .ext_timing_cntl = 0x10002a4a, - .io_cntl = 0x7ff87012, - .size = 0x1fffff, -}; - -static struct w100_gen_regs corgi_fb_regs = { - .lcd_format = 0x00000003, - .lcdd_cntl1 = 0x01CC0000, - .lcdd_cntl2 = 0x0003FFFF, - .genlcd_cntl1 = 0x00FFFF0D, - .genlcd_cntl2 = 0x003F3003, - .genlcd_cntl3 = 0x000102aa, -}; - -static struct w100_gpio_regs corgi_fb_gpio = { - .init_data1 = 0x000000bf, - .init_data2 = 0x00000000, - .gpio_dir1 = 0x00000000, - .gpio_oe1 = 0x03c0feff, - .gpio_dir2 = 0x00000000, - .gpio_oe2 = 0x00000000, -}; - -static struct w100_mode corgi_fb_modes[] = { -{ - .xres = 480, - .yres = 640, - .left_margin = 0x56, - .right_margin = 0x55, - .upper_margin = 0x03, - .lower_margin = 0x00, - .crtc_ss = 0x82360056, - .crtc_ls = 0xA0280000, - .crtc_gs = 0x80280028, - .crtc_vpos_gs = 0x02830002, - .crtc_rev = 0x00400008, - .crtc_dclk = 0xA0000000, - .crtc_gclk = 0x8015010F, - .crtc_goe = 0x80100110, - .crtc_ps1_active = 0x41060010, - .pll_freq = 75, - .fast_pll_freq = 100, - .sysclk_src = CLK_SRC_PLL, - .sysclk_divider = 0, - .pixclk_src = CLK_SRC_PLL, - .pixclk_divider = 2, - .pixclk_divider_rotated = 6, -},{ - .xres = 240, - .yres = 320, - .left_margin = 0x27, - .right_margin = 0x2e, - .upper_margin = 0x01, - .lower_margin = 0x00, - .crtc_ss = 0x81170027, - .crtc_ls = 0xA0140000, - .crtc_gs = 0xC0140014, - .crtc_vpos_gs = 0x00010141, - .crtc_rev = 0x00400008, - .crtc_dclk = 0xA0000000, - .crtc_gclk = 0x8015010F, - .crtc_goe = 0x80100110, - .crtc_ps1_active = 0x41060010, - .pll_freq = 0, - .fast_pll_freq = 0, - .sysclk_src = CLK_SRC_XTAL, - .sysclk_divider = 0, - .pixclk_src = CLK_SRC_XTAL, - .pixclk_divider = 1, - .pixclk_divider_rotated = 1, -}, - -}; - -static struct w100fb_mach_info corgi_fb_info = { - .init_mode = INIT_MODE_ROTATED, - .mem = &corgi_fb_mem, - .regs = &corgi_fb_regs, - .modelist = &corgi_fb_modes[0], - .num_modes = 2, - .gpio = &corgi_fb_gpio, - .xtal_freq = 12500000, - .xtal_dbl = 0, -}; - -static struct resource corgi_fb_resources[] = { - [0] = { - .start = 0x08000000, - .end = 0x08ffffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device corgifb_device = { - .name = "w100fb", - .id = -1, - .num_resources = ARRAY_SIZE(corgi_fb_resources), - .resource = corgi_fb_resources, - .dev = { - .platform_data = &corgi_fb_info, - }, - -}; - -/* - * Corgi Keyboard Device - */ -#define CORGI_KEY_CALENDER KEY_F1 -#define CORGI_KEY_ADDRESS KEY_F2 -#define CORGI_KEY_FN KEY_F3 -#define CORGI_KEY_CANCEL KEY_F4 -#define CORGI_KEY_OFF KEY_SUSPEND -#define CORGI_KEY_EXOK KEY_F5 -#define CORGI_KEY_EXCANCEL KEY_F6 -#define CORGI_KEY_EXJOGDOWN KEY_F7 -#define CORGI_KEY_EXJOGUP KEY_F8 -#define CORGI_KEY_JAP1 KEY_LEFTCTRL -#define CORGI_KEY_JAP2 KEY_LEFTALT -#define CORGI_KEY_MAIL KEY_F10 -#define CORGI_KEY_OK KEY_F11 -#define CORGI_KEY_MENU KEY_F12 - -static const uint32_t corgikbd_keymap[] = { - KEY(0, 1, KEY_1), - KEY(0, 2, KEY_3), - KEY(0, 3, KEY_5), - KEY(0, 4, KEY_6), - KEY(0, 5, KEY_7), - KEY(0, 6, KEY_9), - KEY(0, 7, KEY_0), - KEY(0, 8, KEY_BACKSPACE), - KEY(1, 1, KEY_2), - KEY(1, 2, KEY_4), - KEY(1, 3, KEY_R), - KEY(1, 4, KEY_Y), - KEY(1, 5, KEY_8), - KEY(1, 6, KEY_I), - KEY(1, 7, KEY_O), - KEY(1, 8, KEY_P), - KEY(2, 0, KEY_TAB), - KEY(2, 1, KEY_Q), - KEY(2, 2, KEY_E), - KEY(2, 3, KEY_T), - KEY(2, 4, KEY_G), - KEY(2, 5, KEY_U), - KEY(2, 6, KEY_J), - KEY(2, 7, KEY_K), - KEY(3, 0, CORGI_KEY_CALENDER), - KEY(3, 1, KEY_W), - KEY(3, 2, KEY_S), - KEY(3, 3, KEY_F), - KEY(3, 4, KEY_V), - KEY(3, 5, KEY_H), - KEY(3, 6, KEY_M), - KEY(3, 7, KEY_L), - KEY(3, 9, KEY_RIGHTSHIFT), - KEY(4, 0, CORGI_KEY_ADDRESS), - KEY(4, 1, KEY_A), - KEY(4, 2, KEY_D), - KEY(4, 3, KEY_C), - KEY(4, 4, KEY_B), - KEY(4, 5, KEY_N), - KEY(4, 6, KEY_DOT), - KEY(4, 8, KEY_ENTER), - KEY(4, 10, KEY_LEFTSHIFT), - KEY(5, 0, CORGI_KEY_MAIL), - KEY(5, 1, KEY_Z), - KEY(5, 2, KEY_X), - KEY(5, 3, KEY_MINUS), - KEY(5, 4, KEY_SPACE), - KEY(5, 5, KEY_COMMA), - KEY(5, 7, KEY_UP), - KEY(5, 11, CORGI_KEY_FN), - KEY(6, 0, KEY_SYSRQ), - KEY(6, 1, CORGI_KEY_JAP1), - KEY(6, 2, CORGI_KEY_JAP2), - KEY(6, 3, CORGI_KEY_CANCEL), - KEY(6, 4, CORGI_KEY_OK), - KEY(6, 5, CORGI_KEY_MENU), - KEY(6, 6, KEY_LEFT), - KEY(6, 7, KEY_DOWN), - KEY(6, 8, KEY_RIGHT), - KEY(7, 0, CORGI_KEY_OFF), - KEY(7, 1, CORGI_KEY_EXOK), - KEY(7, 2, CORGI_KEY_EXCANCEL), - KEY(7, 3, CORGI_KEY_EXJOGDOWN), - KEY(7, 4, CORGI_KEY_EXJOGUP), -}; - -static struct matrix_keymap_data corgikbd_keymap_data = { - .keymap = corgikbd_keymap, - .keymap_size = ARRAY_SIZE(corgikbd_keymap), -}; - -static const int corgikbd_row_gpios[] = - { 58, 59, 60, 61, 62, 63, 64, 65 }; -static const int corgikbd_col_gpios[] = - { 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77 }; - -static struct matrix_keypad_platform_data corgikbd_pdata = { - .keymap_data = &corgikbd_keymap_data, - .row_gpios = corgikbd_row_gpios, - .col_gpios = corgikbd_col_gpios, - .num_row_gpios = ARRAY_SIZE(corgikbd_row_gpios), - .num_col_gpios = ARRAY_SIZE(corgikbd_col_gpios), - .col_scan_delay_us = 10, - .debounce_ms = 10, - .wakeup = 1, -}; - -static struct platform_device corgikbd_device = { - .name = "matrix-keypad", - .id = -1, - .dev = { - .platform_data = &corgikbd_pdata, - }, -}; - -static struct gpio_keys_button corgi_gpio_keys[] = { - { - .type = EV_SW, - .code = SW_LID, - .gpio = CORGI_GPIO_SWA, - .desc = "Lid close switch", - .debounce_interval = 500, - }, - { - .type = EV_SW, - .code = SW_TABLET_MODE, - .gpio = CORGI_GPIO_SWB, - .desc = "Tablet mode switch", - .debounce_interval = 500, - }, - { - .type = EV_SW, - .code = SW_HEADPHONE_INSERT, - .gpio = CORGI_GPIO_AK_INT, - .desc = "HeadPhone insert", - .debounce_interval = 500, - }, -}; - -static struct gpio_keys_platform_data corgi_gpio_keys_platform_data = { - .buttons = corgi_gpio_keys, - .nbuttons = ARRAY_SIZE(corgi_gpio_keys), - .poll_interval = 250, -}; - -static struct platform_device corgi_gpio_keys_device = { - .name = "gpio-keys-polled", - .id = -1, - .dev = { - .platform_data = &corgi_gpio_keys_platform_data, - }, -}; - -/* - * Corgi LEDs - */ -static struct gpio_led corgi_gpio_leds[] = { - { - .name = "corgi:amber:charge", - .default_trigger = "sharpsl-charge", - .gpio = CORGI_GPIO_LED_ORANGE, - }, - { - .name = "corgi:green:mail", - .default_trigger = "nand-disk", - .gpio = CORGI_GPIO_LED_GREEN, - }, -}; - -static struct gpio_led_platform_data corgi_gpio_leds_info = { - .leds = corgi_gpio_leds, - .num_leds = ARRAY_SIZE(corgi_gpio_leds), -}; - -static struct platform_device corgiled_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &corgi_gpio_leds_info, - }, -}; - -static struct gpiod_lookup_table corgi_audio_gpio_table = { - .dev_id = "corgi-audio", - .table = { - GPIO_LOOKUP("sharp-scoop", - CORGI_GPIO_MUTE_L - CORGI_SCOOP_GPIO_BASE, - "mute-l", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("sharp-scoop", - CORGI_GPIO_MUTE_R - CORGI_SCOOP_GPIO_BASE, - "mute-r", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("sharp-scoop", - CORGI_GPIO_APM_ON - CORGI_SCOOP_GPIO_BASE, - "apm-on", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("sharp-scoop", - CORGI_GPIO_MIC_BIAS - CORGI_SCOOP_GPIO_BASE, - "mic-bias", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* - * Corgi Audio - */ -static struct platform_device corgi_audio_device = { - .name = "corgi-audio", - .id = -1, -}; - -/* - * MMC/SD Device - * - * The card detect interrupt isn't debounced so we delay it by 250ms - * to give the card a chance to fully insert/eject. - */ -static struct pxamci_platform_data corgi_mci_platform_data = { - .detect_delay_ms = 250, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table corgi_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - /* Card detect on GPIO 9 */ - GPIO_LOOKUP("gpio-pxa", CORGI_GPIO_nSD_DETECT, - "cd", GPIO_ACTIVE_LOW), - /* Write protect on GPIO 7 */ - GPIO_LOOKUP("gpio-pxa", CORGI_GPIO_nSD_WP, - "wp", GPIO_ACTIVE_LOW), - /* Power on GPIO 33 */ - GPIO_LOOKUP("gpio-pxa", CORGI_GPIO_SD_PWR, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* - * Irda - */ -static struct pxaficp_platform_data corgi_ficp_platform_data = { - .gpio_pwdown = CORGI_GPIO_IR_ON, - .transceiver_cap = IR_SIRMODE | IR_OFF, -}; - - -/* - * USB Device Controller - */ -static struct pxa2xx_udc_mach_info udc_info __initdata = { - /* no connect GPIO; corgi can't tell connection status */ - .gpio_pullup = CORGI_GPIO_USB_PULLUP, -}; - -#if IS_ENABLED(CONFIG_SPI_PXA2XX) -static struct pxa2xx_spi_controller corgi_spi_info = { - .num_chipselect = 3, -}; - -static struct gpiod_lookup_table corgi_spi_gpio_table = { - .dev_id = "spi1", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_ADS7846_CS, "cs", 0, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_LCDCON_CS, "cs", 1, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_MAX1111_CS, "cs", 2, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void corgi_wait_for_hsync(void) -{ - while (gpio_get_value(CORGI_GPIO_HSYNC)) - cpu_relax(); - - while (!gpio_get_value(CORGI_GPIO_HSYNC)) - cpu_relax(); -} - -static struct ads7846_platform_data corgi_ads7846_info = { - .model = 7846, - .vref_delay_usecs = 100, - .x_plate_ohms = 419, - .y_plate_ohms = 486, - .gpio_pendown = CORGI_GPIO_TP_INT, - .wait_for_sync = corgi_wait_for_hsync, -}; - -static void corgi_bl_kick_battery(void) -{ - void (*kick_batt)(void); - - kick_batt = symbol_get(sharpsl_battery_kick); - if (kick_batt) { - kick_batt(); - symbol_put(sharpsl_battery_kick); - } -} - -static struct gpiod_lookup_table corgi_lcdcon_gpio_table = { - .dev_id = "spi1.1", - .table = { - GPIO_LOOKUP("gpio-pxa", CORGI_GPIO_BACKLIGHT_CONT, - "BL_CONT", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct corgi_lcd_platform_data corgi_lcdcon_info = { - .init_mode = CORGI_LCD_MODE_VGA, - .max_intensity = 0x2f, - .default_intensity = 0x1f, - .limit_mask = 0x0b, - .kick_battery = corgi_bl_kick_battery, -}; - -static struct spi_board_info corgi_spi_devices[] = { - { - .modalias = "ads7846", - .max_speed_hz = 1200000, - .bus_num = 1, - .chip_select = 0, - .platform_data = &corgi_ads7846_info, - .irq = PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT), - }, { - .modalias = "corgi-lcd", - .max_speed_hz = 50000, - .bus_num = 1, - .chip_select = 1, - .platform_data = &corgi_lcdcon_info, - }, { - .modalias = "max1111", - .max_speed_hz = 450000, - .bus_num = 1, - .chip_select = 2, - }, -}; - -static void __init corgi_init_spi(void) -{ - gpiod_add_lookup_table(&corgi_spi_gpio_table); - pxa2xx_set_spi_info(1, &corgi_spi_info); - gpiod_add_lookup_table(&corgi_lcdcon_gpio_table); - spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices)); -} -#else -static inline void corgi_init_spi(void) {} -#endif - -static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; - -static struct nand_bbt_descr sharpsl_bbt = { - .options = 0, - .offs = 4, - .len = 2, - .pattern = scan_ff_pattern -}; - -static const char * const probes[] = { - "cmdlinepart", - "ofpart", - "sharpslpart", - NULL, -}; - -static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = { - .badblock_pattern = &sharpsl_bbt, - .part_parsers = probes, -}; - -static struct resource sharpsl_nand_resources[] = { - { - .start = 0x0C000000, - .end = 0x0C000FFF, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device sharpsl_nand_device = { - .name = "sharpsl-nand", - .id = -1, - .resource = sharpsl_nand_resources, - .num_resources = ARRAY_SIZE(sharpsl_nand_resources), - .dev.platform_data = &sharpsl_nand_platform_data, -}; - -static struct mtd_partition sharpsl_rom_parts[] = { - { - .name ="Boot PROM Filesystem", - .offset = 0x00120000, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data sharpsl_rom_data = { - .width = 2, - .nr_parts = ARRAY_SIZE(sharpsl_rom_parts), - .parts = sharpsl_rom_parts, -}; - -static struct resource sharpsl_rom_resources[] = { - { - .start = 0x00000000, - .end = 0x007fffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device sharpsl_rom_device = { - .name = "physmap-flash", - .id = -1, - .resource = sharpsl_rom_resources, - .num_resources = ARRAY_SIZE(sharpsl_rom_resources), - .dev.platform_data = &sharpsl_rom_data, -}; - -static struct platform_device *devices[] __initdata = { - &corgiscoop_device, - &corgifb_device, - &corgi_gpio_keys_device, - &corgikbd_device, - &corgiled_device, - &corgi_audio_device, - &sharpsl_nand_device, - &sharpsl_rom_device, -}; - -static struct i2c_board_info __initdata corgi_i2c_devices[] = { - { I2C_BOARD_INFO("wm8731", 0x1b) }, -}; - -static void corgi_poweroff(void) -{ - if (!machine_is_corgi()) - /* Green LED off tells the bootloader to halt */ - gpio_set_value(CORGI_GPIO_LED_GREEN, 0); - - pxa_restart(REBOOT_HARD, NULL); -} - -static void corgi_restart(enum reboot_mode mode, const char *cmd) -{ - if (!machine_is_corgi()) - /* Green LED on tells the bootloader to reboot */ - gpio_set_value(CORGI_GPIO_LED_GREEN, 1); - - pxa_restart(REBOOT_HARD, cmd); -} - -static void __init corgi_init(void) -{ - pm_power_off = corgi_poweroff; - - /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ - PCFR |= PCFR_OPDE; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config)); - - /* allow wakeup from various GPIOs */ - gpio_set_wake(CORGI_GPIO_KEY_INT, 1); - gpio_set_wake(CORGI_GPIO_WAKEUP, 1); - gpio_set_wake(CORGI_GPIO_AC_IN, 1); - gpio_set_wake(CORGI_GPIO_CHRG_FULL, 1); - - if (!machine_is_corgi()) - gpio_set_wake(CORGI_GPIO_MAIN_BAT_LOW, 1); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - corgi_init_spi(); - - pxa_set_udc_info(&udc_info); - gpiod_add_lookup_table(&corgi_mci_gpio_table); - gpiod_add_lookup_table(&corgi_audio_gpio_table); - pxa_set_mci_info(&corgi_mci_platform_data); - pxa_set_ficp_info(&corgi_ficp_platform_data); - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(corgi_i2c_devices)); - - platform_scoop_config = &corgi_pcmcia_config; - - platform_add_devices(devices, ARRAY_SIZE(devices)); - - regulator_has_full_constraints(); -} - -static void __init fixup_corgi(struct tag *tags, char **cmdline) -{ - sharpsl_save_param(); - if (machine_is_corgi()) - memblock_add(0xa0000000, SZ_32M); - else - memblock_add(0xa0000000, SZ_64M); -} - -#ifdef CONFIG_MACH_CORGI -MACHINE_START(CORGI, "SHARP Corgi") - .fixup = fixup_corgi, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_machine = corgi_init, - .init_time = pxa_timer_init, - .restart = corgi_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_SHEPHERD -MACHINE_START(SHEPHERD, "SHARP Shepherd") - .fixup = fixup_corgi, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_machine = corgi_init, - .init_time = pxa_timer_init, - .restart = corgi_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_HUSKY -MACHINE_START(HUSKY, "SHARP Husky") - .fixup = fixup_corgi, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_machine = corgi_init, - .init_time = pxa_timer_init, - .restart = corgi_restart, -MACHINE_END -#endif - diff --git a/arch/arm/mach-pxa/corgi.h b/arch/arm/mach-pxa/corgi.h deleted file mode 100644 index b565ca7b8cda..000000000000 --- a/arch/arm/mach-pxa/corgi.h +++ /dev/null @@ -1,110 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Hardware specific definitions for SL-C7xx series of PDAs - * - * Copyright (c) 2004-2005 Richard Purdie - * - * Based on Sharp's 2.4 kernel patches - */ -#ifndef __ASM_ARCH_CORGI_H -#define __ASM_ARCH_CORGI_H 1 - -#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ - -/* - * Corgi (Non Standard) GPIO Definitions - */ -#define CORGI_GPIO_KEY_INT (0) /* Keyboard Interrupt */ -#define CORGI_GPIO_AC_IN (1) /* Charger Detection */ -#define CORGI_GPIO_WAKEUP (3) /* System wakeup notification? */ -#define CORGI_GPIO_AK_INT (4) /* Headphone Jack Control Interrupt */ -#define CORGI_GPIO_TP_INT (5) /* Touch Panel Interrupt */ -#define CORGI_GPIO_nSD_WP (7) /* SD Write Protect? */ -#define CORGI_GPIO_nSD_DETECT (9) /* MMC/SD Card Detect */ -#define CORGI_GPIO_nSD_INT (10) /* SD Interrupt for SDIO? */ -#define CORGI_GPIO_MAIN_BAT_LOW (11) /* Main Battery Low Notification */ -#define CORGI_GPIO_BAT_COVER (11) /* Battery Cover Detect */ -#define CORGI_GPIO_LED_ORANGE (13) /* Orange LED Control */ -#define CORGI_GPIO_CF_CD (14) /* Compact Flash Card Detect */ -#define CORGI_GPIO_CHRG_FULL (16) /* Charging Complete Notification */ -#define CORGI_GPIO_CF_IRQ (17) /* Compact Flash Interrupt */ -#define CORGI_GPIO_LCDCON_CS (19) /* LCD Control Chip Select */ -#define CORGI_GPIO_MAX1111_CS (20) /* MAX1111 Chip Select */ -#define CORGI_GPIO_ADC_TEMP_ON (21) /* Select battery voltage or temperature */ -#define CORGI_GPIO_IR_ON (22) /* Enable IR Transceiver */ -#define CORGI_GPIO_ADS7846_CS (24) /* ADS7846 Chip Select */ -#define CORGI_GPIO_SD_PWR (33) /* MMC/SD Power */ -#define CORGI_GPIO_CHRG_ON (38) /* Enable battery Charging */ -#define CORGI_GPIO_DISCHARGE_ON (42) /* Enable battery Discharge */ -#define CORGI_GPIO_CHRG_UKN (43) /* Unknown Charging (Bypass Control?) */ -#define CORGI_GPIO_HSYNC (44) /* LCD HSync Pulse */ -#define CORGI_GPIO_USB_PULLUP (45) /* USB show presence to host */ - - -/* - * Corgi Keyboard Definitions - */ -#define CORGI_KEY_STROBE_NUM (12) -#define CORGI_KEY_SENSE_NUM (8) -#define CORGI_GPIO_ALL_STROBE_BIT (0x00003ffc) -#define CORGI_GPIO_HIGH_SENSE_BIT (0xfc000000) -#define CORGI_GPIO_HIGH_SENSE_RSHIFT (26) -#define CORGI_GPIO_LOW_SENSE_BIT (0x00000003) -#define CORGI_GPIO_LOW_SENSE_LSHIFT (6) -#define CORGI_GPIO_STROBE_BIT(a) GPIO_bit(66+(a)) -#define CORGI_GPIO_SENSE_BIT(a) GPIO_bit(58+(a)) -#define CORGI_GAFR_ALL_STROBE_BIT (0x0ffffff0) -#define CORGI_GAFR_HIGH_SENSE_BIT (0xfff00000) -#define CORGI_GAFR_LOW_SENSE_BIT (0x0000000f) -#define CORGI_GPIO_KEY_SENSE(a) (58+(a)) -#define CORGI_GPIO_KEY_STROBE(a) (66+(a)) - - -/* - * Corgi Interrupts - */ -#define CORGI_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(0) -#define CORGI_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1) -#define CORGI_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(3) -#define CORGI_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(4) -#define CORGI_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5) -#define CORGI_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9) -#define CORGI_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(10) -#define CORGI_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(11) -#define CORGI_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14) -#define CORGI_IRQ_GPIO_CHRG_FULL PXA_GPIO_TO_IRQ(16) /* Battery fully charged */ -#define CORGI_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17) -#define CORGI_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(58+(a)) /* Keyboard Sense lines */ - - -/* - * Corgi SCOOP GPIOs and Config - */ -#define CORGI_SCP_LED_GREEN SCOOP_GPCR_PA11 -#define CORGI_SCP_SWA SCOOP_GPCR_PA12 /* Hinge Switch A */ -#define CORGI_SCP_SWB SCOOP_GPCR_PA13 /* Hinge Switch B */ -#define CORGI_SCP_MUTE_L SCOOP_GPCR_PA14 -#define CORGI_SCP_MUTE_R SCOOP_GPCR_PA15 -#define CORGI_SCP_AKIN_PULLUP SCOOP_GPCR_PA16 -#define CORGI_SCP_APM_ON SCOOP_GPCR_PA17 -#define CORGI_SCP_BACKLIGHT_CONT SCOOP_GPCR_PA18 -#define CORGI_SCP_MIC_BIAS SCOOP_GPCR_PA19 - -#define CORGI_SCOOP_IO_DIR ( CORGI_SCP_LED_GREEN | CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R | \ - CORGI_SCP_AKIN_PULLUP | CORGI_SCP_APM_ON | CORGI_SCP_BACKLIGHT_CONT | \ - CORGI_SCP_MIC_BIAS ) -#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) - -#define CORGI_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) -#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) -#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ -#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ -#define CORGI_GPIO_MUTE_L (CORGI_SCOOP_GPIO_BASE + 3) -#define CORGI_GPIO_MUTE_R (CORGI_SCOOP_GPIO_BASE + 4) -#define CORGI_GPIO_AKIN_PULLUP (CORGI_SCOOP_GPIO_BASE + 5) -#define CORGI_GPIO_APM_ON (CORGI_SCOOP_GPIO_BASE + 6) -#define CORGI_GPIO_BACKLIGHT_CONT (CORGI_SCOOP_GPIO_BASE + 7) -#define CORGI_GPIO_MIC_BIAS (CORGI_SCOOP_GPIO_BASE + 8) - -#endif /* __ASM_ARCH_CORGI_H */ - diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c deleted file mode 100644 index 555a5c1afd96..000000000000 --- a/arch/arm/mach-pxa/corgi_pm.c +++ /dev/null @@ -1,221 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Battery and Power Management code for the Sharp SL-C7xx - * - * Copyright (c) 2005 Richard Purdie - */ - -#include <linux/module.h> -#include <linux/stat.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/gpio-pxa.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/apm-emulation.h> -#include <linux/io.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "corgi.h" -#include "pxa2xx-regs.h" -#include "sharpsl_pm.h" - -#include "generic.h" - -#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ -#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ -#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */ -#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */ -#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ -#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ - -static struct gpio charger_gpios[] = { - { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, - { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, - { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" }, - { CORGI_GPIO_AC_IN, GPIOF_IN, "Charger Detection" }, - { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" }, - { CORGI_GPIO_WAKEUP, GPIOF_IN, "System wakeup notification" }, -}; - -static void corgi_charger_init(void) -{ - gpio_request_array(ARRAY_AND_SIZE(charger_gpios)); -} - -static void corgi_measure_temp(int on) -{ - gpio_set_value(CORGI_GPIO_ADC_TEMP_ON, on); -} - -static void corgi_charge(int on) -{ - if (on) { - if (machine_is_corgi() && (sharpsl_pm.flags & SHARPSL_SUSPENDED)) { - gpio_set_value(CORGI_GPIO_CHRG_ON, 0); - gpio_set_value(CORGI_GPIO_CHRG_UKN, 1); - } else { - gpio_set_value(CORGI_GPIO_CHRG_ON, 1); - gpio_set_value(CORGI_GPIO_CHRG_UKN, 0); - } - } else { - gpio_set_value(CORGI_GPIO_CHRG_ON, 0); - gpio_set_value(CORGI_GPIO_CHRG_UKN, 0); - } -} - -static void corgi_discharge(int on) -{ - gpio_set_value(CORGI_GPIO_DISCHARGE_ON, on); -} - -static void corgi_presuspend(void) -{ -} - -static void corgi_postsuspend(void) -{ -} - -/* - * Check what brought us out of the suspend. - * Return: 0 to sleep, otherwise wake - */ -static int corgi_should_wakeup(unsigned int resume_on_alarm) -{ - int is_resume = 0; - - dev_dbg(sharpsl_pm.dev, "PEDR = %x, GPIO_AC_IN = %d, " - "GPIO_CHRG_FULL = %d, GPIO_KEY_INT = %d, GPIO_WAKEUP = %d\n", - PEDR, gpio_get_value(CORGI_GPIO_AC_IN), - gpio_get_value(CORGI_GPIO_CHRG_FULL), - gpio_get_value(CORGI_GPIO_KEY_INT), - gpio_get_value(CORGI_GPIO_WAKEUP)); - - if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) { - if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) { - /* charge on */ - dev_dbg(sharpsl_pm.dev, "ac insert\n"); - sharpsl_pm.flags |= SHARPSL_DO_OFFLINE_CHRG; - } else { - /* charge off */ - dev_dbg(sharpsl_pm.dev, "ac remove\n"); - sharpsl_pm_led(SHARPSL_LED_OFF); - sharpsl_pm.machinfo->charge(0); - sharpsl_pm.charge_mode = CHRG_OFF; - } - } - - if ((PEDR & GPIO_bit(CORGI_GPIO_CHRG_FULL))) - dev_dbg(sharpsl_pm.dev, "Charge full interrupt\n"); - - if (PEDR & GPIO_bit(CORGI_GPIO_KEY_INT)) - is_resume |= GPIO_bit(CORGI_GPIO_KEY_INT); - - if (PEDR & GPIO_bit(CORGI_GPIO_WAKEUP)) - is_resume |= GPIO_bit(CORGI_GPIO_WAKEUP); - - if (resume_on_alarm && (PEDR & PWER_RTC)) - is_resume |= PWER_RTC; - - dev_dbg(sharpsl_pm.dev, "is_resume: %x\n",is_resume); - return is_resume; -} - -static bool corgi_charger_wakeup(void) -{ - return !gpio_get_value(CORGI_GPIO_AC_IN) || - !gpio_get_value(CORGI_GPIO_KEY_INT) || - !gpio_get_value(CORGI_GPIO_WAKEUP); -} - -unsigned long corgipm_read_devdata(int type) -{ - switch(type) { - case SHARPSL_STATUS_ACIN: - return !gpio_get_value(CORGI_GPIO_AC_IN); - case SHARPSL_STATUS_LOCK: - return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); - case SHARPSL_STATUS_CHRGFULL: - return gpio_get_value(sharpsl_pm.machinfo->gpio_batfull); - case SHARPSL_STATUS_FATAL: - return gpio_get_value(sharpsl_pm.machinfo->gpio_fatal); - case SHARPSL_ACIN_VOLT: - return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT); - case SHARPSL_BATT_TEMP: - return sharpsl_pm_pxa_read_max1111(MAX1111_BATT_TEMP); - case SHARPSL_BATT_VOLT: - default: - return sharpsl_pm_pxa_read_max1111(MAX1111_BATT_VOLT); - } -} - -static struct sharpsl_charger_machinfo corgi_pm_machinfo = { - .init = corgi_charger_init, - .exit = NULL, - .gpio_batlock = CORGI_GPIO_BAT_COVER, - .gpio_acin = CORGI_GPIO_AC_IN, - .gpio_batfull = CORGI_GPIO_CHRG_FULL, - .discharge = corgi_discharge, - .charge = corgi_charge, - .measure_temp = corgi_measure_temp, - .presuspend = corgi_presuspend, - .postsuspend = corgi_postsuspend, - .read_devdata = corgipm_read_devdata, - .charger_wakeup = corgi_charger_wakeup, - .should_wakeup = corgi_should_wakeup, -#if defined(CONFIG_LCD_CORGI) - .backlight_limit = corgi_lcd_limit_intensity, -#endif - .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, - .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, - .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, - .charge_acin_low = SHARPSL_CHARGE_ON_ACIN_LOW, - .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, - .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, - .bat_levels = 40, - .bat_levels_noac = sharpsl_battery_levels_noac, - .bat_levels_acin = sharpsl_battery_levels_acin, - .status_high_acin = 188, - .status_low_acin = 178, - .status_high_noac = 185, - .status_low_noac = 175, -}; - -static struct platform_device *corgipm_device; - -static int corgipm_init(void) -{ - int ret; - - if (!machine_is_corgi() && !machine_is_shepherd() - && !machine_is_husky()) - return -ENODEV; - - corgipm_device = platform_device_alloc("sharpsl-pm", -1); - if (!corgipm_device) - return -ENOMEM; - - if (!machine_is_corgi()) - corgi_pm_machinfo.batfull_irq = 1; - - corgipm_device->dev.platform_data = &corgi_pm_machinfo; - ret = platform_device_add(corgipm_device); - - if (ret) - platform_device_put(corgipm_device); - - return ret; -} - -static void corgipm_exit(void) -{ - platform_device_unregister(corgipm_device); -} - -module_init(corgipm_init); -module_exit(corgipm_exit); diff --git a/arch/arm/mach-pxa/csb701.c b/arch/arm/mach-pxa/csb701.c deleted file mode 100644 index 527c9fdf9795..000000000000 --- a/arch/arm/mach-pxa/csb701.c +++ /dev/null @@ -1,67 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/leds.h> - -#include <asm/mach-types.h> - -static struct gpio_keys_button csb701_buttons[] = { - { - .code = 0x7, - .gpio = 1, - .active_low = 1, - .desc = "SW2", - .type = EV_SW, - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data csb701_gpio_keys_data = { - .buttons = csb701_buttons, - .nbuttons = ARRAY_SIZE(csb701_buttons), -}; - -static struct gpio_led csb701_leds[] = { - { - .name = "csb701:yellow:heartbeat", - .default_trigger = "heartbeat", - .gpio = 11, - .active_low = 1, - }, -}; - -static struct platform_device csb701_gpio_keys = { - .name = "gpio-keys", - .id = -1, - .dev.platform_data = &csb701_gpio_keys_data, -}; - -static struct gpio_led_platform_data csb701_leds_gpio_data = { - .leds = csb701_leds, - .num_leds = ARRAY_SIZE(csb701_leds), -}; - -static struct platform_device csb701_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev.platform_data = &csb701_leds_gpio_data, -}; - -static struct platform_device *devices[] __initdata = { - &csb701_gpio_keys, - &csb701_leds_gpio, -}; - -static int __init csb701_init(void) -{ - if (!machine_is_csb726()) - return -ENODEV; - - return platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -module_init(csb701_init); - diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c deleted file mode 100644 index 410b1af87d55..000000000000 --- a/arch/arm/mach-pxa/csb726.c +++ /dev/null @@ -1,291 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Support for Cogent CSB726 - * - * Copyright (c) 2008 Dmitry Eremin-Solenikov - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/gpio/machine.h> -#include <linux/platform_device.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/partitions.h> -#include <linux/sm501.h> -#include <linux/smsc911x.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "csb726.h" -#include "pxa27x.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/asoc-pxa.h> -#include "smemc.h" - -#include "generic.h" -#include "devices.h" - -/* - * n/a: 2, 5, 6, 7, 8, 23, 24, 25, 26, 27, 87, 88, 89, - * nu: 58 -- 77, 90, 91, 93, 102, 105-108, 114-116, - * XXX: 21, - * XXX: 79 CS_3 for LAN9215 or PSKTSEL on R2, R3 - * XXX: 33 CS_5 for LAN9215 on R1 - */ - -static unsigned long csb726_pin_config[] = { - GPIO78_nCS_2, /* EXP_CS */ - GPIO79_nCS_3, /* SMSC9215 */ - GPIO80_nCS_4, /* SM501 */ - - GPIO52_GPIO, /* #SMSC9251 int */ - GPIO53_GPIO, /* SM501 int */ - - GPIO1_GPIO, /* GPIO0 */ - GPIO11_GPIO, /* GPIO1 */ - GPIO9_GPIO, /* GPIO2 */ - GPIO10_GPIO, /* GPIO3 */ - GPIO16_PWM0_OUT, /* or GPIO4 */ - GPIO17_PWM1_OUT, /* or GPIO5 */ - GPIO94_GPIO, /* GPIO6 */ - GPIO95_GPIO, /* GPIO7 */ - GPIO96_GPIO, /* GPIO8 */ - GPIO97_GPIO, /* GPIO9 */ - GPIO15_GPIO, /* EXP_IRQ */ - GPIO18_RDY, /* EXP_WAIT */ - - GPIO0_GPIO, /* PWR_INT */ - GPIO104_GPIO, /* PWR_OFF */ - - GPIO12_GPIO, /* touch irq */ - - GPIO13_SSP2_TXD, - GPIO14_SSP2_SFRM, - MFP_CFG_OUT(GPIO19, AF1, DRIVE_LOW),/* SSP2_SYSCLK */ - GPIO22_SSP2_SCLK, - - GPIO81_SSP3_TXD, - GPIO82_SSP3_RXD, - GPIO83_SSP3_SFRM, - GPIO84_SSP3_SCLK, - - GPIO20_GPIO, /* SDIO int */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO100_GPIO, /* SD CD */ - GPIO101_GPIO, /* SD WP */ - - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO113_AC97_nRESET, - - GPIO34_FFUART_RXD, - GPIO35_FFUART_CTS, - GPIO36_FFUART_DCD, - GPIO37_FFUART_DSR, - GPIO38_FFUART_RI, - GPIO39_FFUART_TXD, - GPIO40_FFUART_DTR, - GPIO41_FFUART_RTS, - - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, - - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO54_nPCE_2, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, /* maybe unused */ - GPIO85_nPCE_1, - GPIO98_GPIO, /* CF IRQ */ - GPIO99_GPIO, /* CF CD */ - GPIO103_GPIO, /* Reset */ - - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, -}; - -static struct pxamci_platform_data csb726_mci = { - .detect_delay_ms = 500, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - /* FIXME setpower */ -}; - -static struct gpiod_lookup_table csb726_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - /* Card detect on GPIO 100 */ - GPIO_LOOKUP("gpio-pxa", CSB726_GPIO_MMC_DETECT, - "cd", GPIO_ACTIVE_LOW), - /* Write protect on GPIO 101 */ - GPIO_LOOKUP("gpio-pxa", CSB726_GPIO_MMC_RO, - "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct pxaohci_platform_data csb726_ohci_platform_data = { - .port_mode = PMM_NPS_MODE, - .flags = ENABLE_PORT1 | NO_OC_PROTECTION, -}; - -static struct mtd_partition csb726_flash_partitions[] = { - { - .name = "Bootloader", - .offset = 0, - .size = CSB726_FLASH_uMON, - .mask_flags = MTD_WRITEABLE /* force read-only */ - }, - { - .name = "root", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct physmap_flash_data csb726_flash_data = { - .width = 2, - .parts = csb726_flash_partitions, - .nr_parts = ARRAY_SIZE(csb726_flash_partitions), -}; - -static struct resource csb726_flash_resources[] = { - { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + CSB726_FLASH_SIZE - 1 , - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device csb726_flash = { - .name = "physmap-flash", - .dev = { - .platform_data = &csb726_flash_data, - }, - .resource = csb726_flash_resources, - .num_resources = ARRAY_SIZE(csb726_flash_resources), -}; - -static struct resource csb726_sm501_resources[] = { - { - .start = PXA_CS4_PHYS, - .end = PXA_CS4_PHYS + SZ_8M - 1, - .flags = IORESOURCE_MEM, - .name = "sm501-localmem", - }, - { - .start = PXA_CS4_PHYS + SZ_64M - SZ_2M, - .end = PXA_CS4_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, - .name = "sm501-regs", - }, - { - .start = CSB726_IRQ_SM501, - .end = CSB726_IRQ_SM501, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct sm501_initdata csb726_sm501_initdata = { -/* .devices = SM501_USE_USB_HOST, */ - .devices = SM501_USE_USB_HOST | SM501_USE_UART0 | SM501_USE_UART1, -}; - -static struct sm501_platdata csb726_sm501_platdata = { - .init = &csb726_sm501_initdata, -}; - -static struct platform_device csb726_sm501 = { - .name = "sm501", - .id = 0, - .num_resources = ARRAY_SIZE(csb726_sm501_resources), - .resource = csb726_sm501_resources, - .dev = { - .platform_data = &csb726_sm501_platdata, - }, -}; - -static struct resource csb726_lan_resources[] = { - { - .start = PXA_CS3_PHYS, - .end = PXA_CS3_PHYS + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = CSB726_IRQ_LAN, - .end = CSB726_IRQ_LAN, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - }, -}; - -struct smsc911x_platform_config csb726_lan_config = { - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, - .flags = SMSC911X_USE_32BIT, - .phy_interface = PHY_INTERFACE_MODE_MII, -}; - - -static struct platform_device csb726_lan = { - .name = "smsc911x", - .id = -1, - .num_resources = ARRAY_SIZE(csb726_lan_resources), - .resource = csb726_lan_resources, - .dev = { - .platform_data = &csb726_lan_config, - }, -}; - -static struct platform_device *devices[] __initdata = { - &csb726_flash, - &csb726_sm501, - &csb726_lan, -}; - -static void __init csb726_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(csb726_pin_config)); -/* __raw_writel(0x7ffc3ffc, MSC1); *//* LAN9215/EXP_CS */ -/* __raw_writel(0x06697ff4, MSC2); *//* none/SM501 */ - __raw_writel((__raw_readl(MSC2) & ~0xffff) | 0x7ff4, MSC2); /* SM501 */ - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - pxa_set_i2c_info(NULL); - pxa27x_set_i2c_power_info(NULL); - gpiod_add_lookup_table(&csb726_mci_gpio_table); - pxa_set_mci_info(&csb726_mci); - pxa_set_ohci_info(&csb726_ohci_platform_data); - pxa_set_ac97_info(NULL); - - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -MACHINE_START(CSB726, "Cogent CSB726") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_machine = csb726_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/csb726.h b/arch/arm/mach-pxa/csb726.h deleted file mode 100644 index 628928743bd5..000000000000 --- a/arch/arm/mach-pxa/csb726.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Support for Cogent CSB726 - * - * Copyright (c) 2008 Dmitry Baryshkov - */ -#ifndef CSB726_H -#define CSB726_H - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -#define CSB726_GPIO_IRQ_LAN 52 -#define CSB726_GPIO_IRQ_SM501 53 -#define CSB726_GPIO_MMC_DETECT 100 -#define CSB726_GPIO_MMC_RO 101 - -#define CSB726_FLASH_SIZE (64 * 1024 * 1024) -#define CSB726_FLASH_uMON (8 * 1024 * 1024) - -#define CSB726_IRQ_LAN PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN) -#define CSB726_IRQ_SM501 PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501) - -#endif - diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index a7b92dd1ca9e..661b3fc43275 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -12,17 +12,11 @@ #include <linux/soc/pxa/cpu.h> #include "udc.h" -#include <linux/platform_data/usb-pxa3xx-ulpi.h> #include <linux/platform_data/video-pxafb.h> #include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/irda-pxaficp.h> #include "irqs.h" #include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include <linux/platform_data/media/camera-pxa.h> -#include <linux/platform_data/asoc-pxa.h> #include <linux/platform_data/mmp_dma.h> -#include <linux/platform_data/mtd-nand-pxa3xx.h> #include "regs-ost.h" #include "reset.h" @@ -84,16 +78,10 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info) pxa_register_device(&pxa_device_mci, info); } - static struct pxa2xx_udc_mach_info pxa_udc_info = { .gpio_pullup = -1, }; -void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) -{ - memcpy(&pxa_udc_info, info, sizeof *info); -} - static struct resource pxa2xx_udc_resources[] = { [0] = { .start = 0x40600000, @@ -131,33 +119,6 @@ struct platform_device pxa27x_device_udc = { } }; -#ifdef CONFIG_PXA3xx -static struct resource pxa3xx_u2d_resources[] = { - [0] = { - .start = 0x54100000, - .end = 0x54100fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_USB2, - .end = IRQ_USB2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa3xx_device_u2d = { - .name = "pxa3xx-u2d", - .id = -1, - .resource = pxa3xx_u2d_resources, - .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources), -}; - -void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info) -{ - pxa_register_device(&pxa3xx_device_u2d, info); -} -#endif /* CONFIG_PXA3xx */ - static struct resource pxafb_resources[] = { [0] = { .start = 0x44000000, @@ -378,47 +339,6 @@ struct platform_device pxa_device_asoc_platform = { .id = -1, }; -static u64 pxaficp_dmamask = ~(u32)0; - -static struct resource pxa_ir_resources[] = { - [0] = { - .start = IRQ_STUART, - .end = IRQ_STUART, - .flags = IORESOURCE_IRQ, - }, - [1] = { - .start = IRQ_ICP, - .end = IRQ_ICP, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = 0x40800000, - .end = 0x4080001b, - .flags = IORESOURCE_MEM, - }, - [4] = { - .start = 0x40700000, - .end = 0x40700023, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device pxa_device_ficp = { - .name = "pxa2xx-ir", - .id = -1, - .num_resources = ARRAY_SIZE(pxa_ir_resources), - .resource = pxa_ir_resources, - .dev = { - .dma_mask = &pxaficp_dmamask, - .coherent_dma_mask = 0xffffffff, - }, -}; - -void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) -{ - pxa_register_device(&pxa_device_ficp, info); -} - static struct resource pxa_rtc_resources[] = { [0] = { .start = 0x40900000, @@ -453,49 +373,6 @@ struct platform_device sa1100_device_rtc = { .resource = pxa_rtc_resources, }; -static struct resource pxa_ac97_resources[] = { - [0] = { - .start = 0x40500000, - .end = 0x40500000 + 0xfff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_AC97, - .end = IRQ_AC97, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 pxa_ac97_dmamask = 0xffffffffUL; - -struct platform_device pxa_device_ac97 = { - .name = "pxa2xx-ac97", - .id = -1, - .dev = { - .dma_mask = &pxa_ac97_dmamask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(pxa_ac97_resources), - .resource = pxa_ac97_resources, -}; - -void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops) -{ - int ret; - - ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK", - &pxa_device_ac97.dev); - if (ret) - pr_err("PXA AC97 clock1 alias error: %d\n", ret); - - ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK", - &pxa_device_ac97.dev); - if (ret) - pr_err("PXA AC97 clock2 alias error: %d\n", ret); - - pxa_register_device(&pxa_device_ac97, ops); -} - #ifdef CONFIG_PXA25x static struct resource pxa25x_resource_pwm0[] = { @@ -609,44 +486,6 @@ struct platform_device pxa25x_device_assp = { #endif /* CONFIG_PXA25x */ #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) -static struct resource pxa27x_resource_camera[] = { - [0] = { - .start = 0x50000000, - .end = 0x50000fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_CAMERA, - .end = IRQ_CAMERA, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32); - -static struct platform_device pxa27x_device_camera = { - .name = "pxa27x-camera", - .id = 0, /* This is used to put cameras on this interface */ - .dev = { - .dma_mask = &pxa27x_dma_mask_camera, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(pxa27x_resource_camera), - .resource = pxa27x_resource_camera, -}; - -void __init pxa_set_camera_info(struct pxacamera_platform_data *info) -{ - struct clk *mclk; - - /* Register a fixed-rate clock for camera sensors. */ - mclk = clk_register_fixed_rate(NULL, "pxa_camera_clk", NULL, 0, - info->mclk_10khz * 10000); - if (!IS_ERR(mclk)) - clkdev_create(mclk, "mclk", NULL); - pxa_register_device(&pxa27x_device_camera, info); -} - static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); static struct resource pxa27x_resource_ohci[] = { @@ -680,31 +519,6 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) -static struct resource pxa27x_resource_keypad[] = { - [0] = { - .start = 0x41500000, - .end = 0x4150004c, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_KEYPAD, - .end = IRQ_KEYPAD, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa27x_device_keypad = { - .name = "pxa27x-keypad", - .id = -1, - .resource = pxa27x_resource_keypad, - .num_resources = ARRAY_SIZE(pxa27x_resource_keypad), -}; - -void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info) -{ - pxa_register_device(&pxa27x_device_keypad, info); -} - static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); static struct resource pxa27x_resource_ssp1[] = { @@ -814,210 +628,6 @@ struct platform_device pxa27x_device_pwm1 = { }; #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ -#ifdef CONFIG_PXA3xx -static struct resource pxa3xx_resources_mci2[] = { - [0] = { - .start = 0x42000000, - .end = 0x42000fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_MMC2, - .end = IRQ_MMC2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa3xx_device_mci2 = { - .name = "pxa2xx-mci", - .id = 1, - .dev = { - .dma_mask = &pxamci_dmamask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2), - .resource = pxa3xx_resources_mci2, -}; - -void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info) -{ - pxa_register_device(&pxa3xx_device_mci2, info); -} - -static struct resource pxa3xx_resources_mci3[] = { - [0] = { - .start = 0x42500000, - .end = 0x42500fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_MMC3, - .end = IRQ_MMC3, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa3xx_device_mci3 = { - .name = "pxa2xx-mci", - .id = 2, - .dev = { - .dma_mask = &pxamci_dmamask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3), - .resource = pxa3xx_resources_mci3, -}; - -void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info) -{ - pxa_register_device(&pxa3xx_device_mci3, info); -} - -static struct resource pxa3xx_resources_gcu[] = { - { - .start = 0x54000000, - .end = 0x54000fff, - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_GCU, - .end = IRQ_GCU, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32); - -struct platform_device pxa3xx_device_gcu = { - .name = "pxa3xx-gcu", - .id = -1, - .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu), - .resource = pxa3xx_resources_gcu, - .dev = { - .dma_mask = &pxa3xx_gcu_dmamask, - .coherent_dma_mask = 0xffffffff, - }, -}; - -#endif /* CONFIG_PXA3xx */ - -#if defined(CONFIG_PXA3xx) -static struct resource pxa3xx_resources_i2c_power[] = { - { - .start = 0x40f500c0, - .end = 0x40f500d3, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_PWRI2C, - .end = IRQ_PWRI2C, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa3xx_device_i2c_power = { - .name = "pxa3xx-pwri2c", - .id = 1, - .resource = pxa3xx_resources_i2c_power, - .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power), -}; - -static struct resource pxa3xx_resources_nand[] = { - [0] = { - .start = 0x43100000, - .end = 0x43100053, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_NAND, - .end = IRQ_NAND, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32); - -struct platform_device pxa3xx_device_nand = { - .name = "pxa3xx-nand", - .id = -1, - .dev = { - .dma_mask = &pxa3xx_nand_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(pxa3xx_resources_nand), - .resource = pxa3xx_resources_nand, -}; - -void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info) -{ - pxa_register_device(&pxa3xx_device_nand, info); -} - -static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32); - -static struct resource pxa3xx_resource_ssp4[] = { - [0] = { - .start = 0x41a00000, - .end = 0x41a0003f, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_SSP4, - .end = IRQ_SSP4, - .flags = IORESOURCE_IRQ, - }, -}; - -/* - * PXA3xx SSP is basically equivalent to PXA27x. - * However, we need to register the device by the correct name in order to - * make the driver set the correct internal type, hence we provide specific - * platform_devices for each of them. - */ -struct platform_device pxa3xx_device_ssp1 = { - .name = "pxa3xx-ssp", - .id = 0, - .dev = { - .dma_mask = &pxa27x_ssp1_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = pxa27x_resource_ssp1, - .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), -}; - -struct platform_device pxa3xx_device_ssp2 = { - .name = "pxa3xx-ssp", - .id = 1, - .dev = { - .dma_mask = &pxa27x_ssp2_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = pxa27x_resource_ssp2, - .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), -}; - -struct platform_device pxa3xx_device_ssp3 = { - .name = "pxa3xx-ssp", - .id = 2, - .dev = { - .dma_mask = &pxa27x_ssp3_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = pxa27x_resource_ssp3, - .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), -}; - -struct platform_device pxa3xx_device_ssp4 = { - .name = "pxa3xx-ssp", - .id = 3, - .dev = { - .dma_mask = &pxa3xx_ssp4_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = pxa3xx_resource_ssp4, - .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), -}; -#endif /* CONFIG_PXA3xx */ - struct resource pxa_resource_gpio[] = { { .start = 0x40e00000, @@ -1042,11 +652,7 @@ struct resource pxa_resource_gpio[] = { }; struct platform_device pxa25x_device_gpio = { -#ifdef CONFIG_CPU_PXA26x - .name = "pxa26x-gpio", -#else .name = "pxa25x-gpio", -#endif .id = -1, .num_resources = ARRAY_SIZE(pxa_resource_gpio), .resource = pxa_resource_gpio, @@ -1059,20 +665,6 @@ struct platform_device pxa27x_device_gpio = { .resource = pxa_resource_gpio, }; -struct platform_device pxa3xx_device_gpio = { - .name = "pxa3xx-gpio", - .id = -1, - .num_resources = ARRAY_SIZE(pxa_resource_gpio), - .resource = pxa_resource_gpio, -}; - -struct platform_device pxa93x_device_gpio = { - .name = "pxa93x-gpio", - .id = -1, - .num_resources = ARRAY_SIZE(pxa_resource_gpio), - .resource = pxa_resource_gpio, -}; - /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info) diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 498b07bc6a3e..82c83939017a 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h @@ -9,7 +9,6 @@ extern struct platform_device pxa3xx_device_mci2; extern struct platform_device pxa3xx_device_mci3; extern struct platform_device pxa25x_device_udc; extern struct platform_device pxa27x_device_udc; -extern struct platform_device pxa3xx_device_u2d; extern struct platform_device pxa_device_fb; extern struct platform_device pxa_device_ffuart; extern struct platform_device pxa_device_btuart; @@ -17,7 +16,6 @@ extern struct platform_device pxa_device_stuart; extern struct platform_device pxa_device_hwuart; extern struct platform_device pxa_device_i2c; extern struct platform_device pxa_device_i2s; -extern struct platform_device pxa_device_ficp; extern struct platform_device sa1100_device_rtc; extern struct platform_device pxa_device_rtc; extern struct platform_device pxa_device_ac97; diff --git a/arch/arm/mach-pxa/e740-pcmcia.c b/arch/arm/mach-pxa/e740-pcmcia.c deleted file mode 100644 index 11a2c5d42920..000000000000 --- a/arch/arm/mach-pxa/e740-pcmcia.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Toshiba e740 PCMCIA specific routines. - * - * (c) 2004 Ian Molton <spyro@f2s.com> - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> - -#include "eseries-gpio.h" - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <pcmcia/soc_common.h> - -static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - if (skt->nr == 0) { - skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD0; - skt->stat[SOC_STAT_CD].name = "CF card detect"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY0; - skt->stat[SOC_STAT_RDY].name = "CF ready"; - } else { - skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD1; - skt->stat[SOC_STAT_CD].name = "Wifi switch"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY1; - skt->stat[SOC_STAT_RDY].name = "Wifi ready"; - } - - return 0; -} - -static void e740_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int e740_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - if (state->flags & SS_RESET) { - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_RST0, 1); - else - gpio_set_value(GPIO_E740_PCMCIA_RST1, 1); - } else { - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_RST0, 0); - else - gpio_set_value(GPIO_E740_PCMCIA_RST1, 0); - } - - switch (state->Vcc) { - case 0: /* Socket off */ - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_PWR0, 0); - else - gpio_set_value(GPIO_E740_PCMCIA_PWR1, 1); - break; - case 50: - case 33: /* socket on */ - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_PWR0, 1); - else - gpio_set_value(GPIO_E740_PCMCIA_PWR1, 0); - break; - default: - printk(KERN_ERR "e740_cs: Unsupported Vcc: %d\n", state->Vcc); - } - - return 0; -} - -static struct pcmcia_low_level e740_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = e740_pcmcia_hw_init, - .socket_state = e740_pcmcia_socket_state, - .configure_socket = e740_pcmcia_configure_socket, - .nr = 2, -}; - -static struct platform_device *e740_pcmcia_device; - -static int __init e740_pcmcia_init(void) -{ - int ret; - - if (!machine_is_e740()) - return -ENODEV; - - e740_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!e740_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(e740_pcmcia_device, &e740_pcmcia_ops, - sizeof(e740_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(e740_pcmcia_device); - - if (ret) - platform_device_put(e740_pcmcia_device); - - return ret; -} - -static void __exit e740_pcmcia_exit(void) -{ - platform_device_unregister(e740_pcmcia_device); -} - -module_init(e740_pcmcia_init); -module_exit(e740_pcmcia_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_DESCRIPTION("e740 PCMCIA platform support"); diff --git a/arch/arm/mach-pxa/eseries-gpio.h b/arch/arm/mach-pxa/eseries-gpio.h deleted file mode 100644 index 5c645600d401..000000000000 --- a/arch/arm/mach-pxa/eseries-gpio.h +++ /dev/null @@ -1,63 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * eseries-gpio.h - * - * Copyright (C) Ian Molton <spyro@f2s.com> - */ - -/* e-series power button */ -#define GPIO_ESERIES_POWERBTN 0 - -/* UDC GPIO definitions */ -#define GPIO_E7XX_USB_DISC 13 -#define GPIO_E7XX_USB_PULLUP 3 - -#define GPIO_E800_USB_DISC 4 -#define GPIO_E800_USB_PULLUP 84 - -/* e740 PCMCIA GPIO definitions */ -/* Note: PWR1 seems to be inverted */ -#define GPIO_E740_PCMCIA_CD0 8 -#define GPIO_E740_PCMCIA_CD1 44 -#define GPIO_E740_PCMCIA_RDY0 11 -#define GPIO_E740_PCMCIA_RDY1 6 -#define GPIO_E740_PCMCIA_RST0 27 -#define GPIO_E740_PCMCIA_RST1 24 -#define GPIO_E740_PCMCIA_PWR0 20 -#define GPIO_E740_PCMCIA_PWR1 23 - -/* e750 PCMCIA GPIO definitions */ -#define GPIO_E750_PCMCIA_CD0 8 -#define GPIO_E750_PCMCIA_RDY0 12 -#define GPIO_E750_PCMCIA_RST0 27 -#define GPIO_E750_PCMCIA_PWR0 20 - -/* e800 PCMCIA GPIO definitions */ -#define GPIO_E800_PCMCIA_RST0 69 -#define GPIO_E800_PCMCIA_RST1 72 -#define GPIO_E800_PCMCIA_PWR0 20 -#define GPIO_E800_PCMCIA_PWR1 73 - -/* e7xx IrDA power control */ -#define GPIO_E7XX_IR_OFF 38 - -/* e740 audio control GPIOs */ -#define GPIO_E740_WM9705_nAVDD2 16 -#define GPIO_E740_MIC_ON 40 -#define GPIO_E740_AMP_ON 41 - -/* e750 audio control GPIOs */ -#define GPIO_E750_HP_AMP_OFF 4 -#define GPIO_E750_SPK_AMP_OFF 7 -#define GPIO_E750_HP_DETECT 37 - -/* e800 audio control GPIOs */ -#define GPIO_E800_HP_DETECT 81 -#define GPIO_E800_HP_AMP_OFF 82 -#define GPIO_E800_SPK_AMP_ON 83 - -/* ASIC related GPIOs */ -#define GPIO_ESERIES_TMIO_IRQ 5 -#define GPIO_ESERIES_TMIO_PCLR 19 -#define GPIO_ESERIES_TMIO_SUSPEND 45 -#define GPIO_E800_ANGELX_IRQ 8 diff --git a/arch/arm/mach-pxa/eseries-irq.h b/arch/arm/mach-pxa/eseries-irq.h deleted file mode 100644 index 572d573ce66b..000000000000 --- a/arch/arm/mach-pxa/eseries-irq.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * eseries-irq.h - * - * Copyright (C) Ian Molton <spyro@f2s.com> - */ - -#define ANGELX_IRQ_BASE (IRQ_BOARD_START+8) -#define IRQ_ANGELX(n) (ANGELX_IRQ_BASE + (n)) - -#define ANGELX_RDY0_IRQ IRQ_ANGELX(0) -#define ANGELX_ST0_IRQ IRQ_ANGELX(1) -#define ANGELX_CD0_IRQ IRQ_ANGELX(2) -#define ANGELX_RDY1_IRQ IRQ_ANGELX(3) -#define ANGELX_ST1_IRQ IRQ_ANGELX(4) -#define ANGELX_CD1_IRQ IRQ_ANGELX(5) - -#define TMIO_IRQ_BASE (IRQ_BOARD_START+0) -#define IRQ_TMIO(n) (TMIO_IRQ_BASE + (n)) - -#define TMIO_SD_IRQ IRQ_TMIO(1) -#define TMIO_USB_IRQ IRQ_TMIO(2) - -#define ESERIES_NR_IRQS (IRQ_BOARD_START + 16) diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c deleted file mode 100644 index 2e4daeab6278..000000000000 --- a/arch/arm/mach-pxa/eseries.c +++ /dev/null @@ -1,1001 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hardware definitions for the Toshiba eseries PDAs - * - * Copyright (c) 2003 Ian Molton <spyro@f2s.com> - */ - -#include <linux/clkdev.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/clk-provider.h> -#include <linux/gpio/machine.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/mfd/tc6387xb.h> -#include <linux/mfd/tc6393xb.h> -#include <linux/mfd/t7l66xb.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/partitions.h> -#include <linux/memblock.h> -#include <linux/gpio/machine.h> - -#include <video/w100fb.h> - -#include <asm/setup.h> -#include <asm/mach/arch.h> -#include <asm/mach-types.h> - -#include "pxa25x.h" -#include "eseries-gpio.h" -#include "eseries-irq.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/video-pxafb.h> -#include "udc.h" -#include <linux/platform_data/irda-pxaficp.h> - -#include "devices.h" -#include "generic.h" - -/* Only e800 has 128MB RAM */ -void __init eseries_fixup(struct tag *tags, char **cmdline) -{ - if (machine_is_e800()) - memblock_add(0xa0000000, SZ_128M); - else - memblock_add(0xa0000000, SZ_64M); -} - -static struct gpiod_lookup_table e7xx_gpio_vbus_gpiod_table __maybe_unused = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_E7XX_USB_DISC, - "vbus", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO_E7XX_USB_PULLUP, - "pullup", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct platform_device e7xx_gpio_vbus __maybe_unused = { - .name = "gpio-vbus", - .id = -1, -}; - -struct pxaficp_platform_data e7xx_ficp_platform_data = { - .gpio_pwdown = GPIO_E7XX_IR_OFF, - .transceiver_cap = IR_SIRMODE | IR_OFF, -}; - -int eseries_tmio_enable(struct platform_device *dev) -{ - /* Reset - bring SUSPEND high before PCLR */ - gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); - gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0); - msleep(1); - gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1); - msleep(1); - gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 1); - msleep(1); - return 0; -} - -void eseries_tmio_disable(struct platform_device *dev) -{ - gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); - gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0); -} - -int eseries_tmio_suspend(struct platform_device *dev) -{ - gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); - return 0; -} - -int eseries_tmio_resume(struct platform_device *dev) -{ - gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1); - msleep(1); - return 0; -} - -void eseries_get_tmio_gpios(void) -{ - gpio_request(GPIO_ESERIES_TMIO_SUSPEND, NULL); - gpio_request(GPIO_ESERIES_TMIO_PCLR, NULL); - gpio_direction_output(GPIO_ESERIES_TMIO_SUSPEND, 0); - gpio_direction_output(GPIO_ESERIES_TMIO_PCLR, 0); -} - -/* TMIO controller uses the same resources on all e-series machines. */ -struct resource eseries_tmio_resources[] = { - [0] = { - .start = PXA_CS4_PHYS, - .end = PXA_CS4_PHYS + 0x1fffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ), - .end = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ), - .flags = IORESOURCE_IRQ, - }, -}; - -/* Some e-series hardware cannot control the 32K clock */ -static void __init __maybe_unused eseries_register_clks(void) -{ - clk_register_fixed_rate(NULL, "CLK_CK32K", NULL, 0, 32768); -} - -#ifdef CONFIG_MACH_E330 -/* -------------------- e330 tc6387xb parameters -------------------- */ - -static struct tc6387xb_platform_data e330_tc6387xb_info = { - .enable = &eseries_tmio_enable, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, -}; - -static struct platform_device e330_tc6387xb_device = { - .name = "tc6387xb", - .id = -1, - .dev = { - .platform_data = &e330_tc6387xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -/* --------------------------------------------------------------- */ - -static struct platform_device *e330_devices[] __initdata = { - &e330_tc6387xb_device, - &e7xx_gpio_vbus, -}; - -static void __init e330_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - eseries_register_clks(); - eseries_get_tmio_gpios(); - gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table); - platform_add_devices(ARRAY_AND_SIZE(e330_devices)); -} - -MACHINE_START(E330, "Toshiba e330") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = ESERIES_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .fixup = eseries_fixup, - .init_machine = e330_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E350 -/* -------------------- e350 t7l66xb parameters -------------------- */ - -static struct t7l66xb_platform_data e350_t7l66xb_info = { - .irq_base = IRQ_BOARD_START, - .enable = &eseries_tmio_enable, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, -}; - -static struct platform_device e350_t7l66xb_device = { - .name = "t7l66xb", - .id = -1, - .dev = { - .platform_data = &e350_t7l66xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -/* ---------------------------------------------------------- */ - -static struct platform_device *e350_devices[] __initdata = { - &e350_t7l66xb_device, - &e7xx_gpio_vbus, -}; - -static void __init e350_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - eseries_register_clks(); - eseries_get_tmio_gpios(); - gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table); - platform_add_devices(ARRAY_AND_SIZE(e350_devices)); -} - -MACHINE_START(E350, "Toshiba e350") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = ESERIES_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .fixup = eseries_fixup, - .init_machine = e350_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E400 -/* ------------------------ E400 LCD definitions ------------------------ */ - -static struct pxafb_mode_info e400_pxafb_mode_info = { - .pixclock = 140703, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 4, - .left_margin = 28, - .right_margin = 8, - .vsync_len = 3, - .upper_margin = 5, - .lower_margin = 6, - .sync = 0, -}; - -static struct pxafb_mach_info e400_pxafb_mach_info = { - .modes = &e400_pxafb_mode_info, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP, - .lccr3 = 0, - .pxafb_backlight_power = NULL, -}; - -/* ------------------------ E400 MFP config ----------------------------- */ - -static unsigned long e400_pin_config[] __initdata = { - /* Chip selects */ - GPIO15_nCS_1, /* CS1 - Flash */ - GPIO80_nCS_4, /* CS4 - TMIO */ - - /* Clocks */ - GPIO12_32KHz, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - - /* TMIO controller */ - GPIO19_GPIO, /* t7l66xb #PCLR */ - GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ - - /* wakeup */ - GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, -}; - -/* ---------------------------------------------------------------------- */ - -static struct mtd_partition partition_a = { - .name = "Internal NAND flash", - .offset = 0, - .size = MTDPART_SIZ_FULL, -}; - -static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; - -static struct nand_bbt_descr e400_t7l66xb_nand_bbt = { - .options = 0, - .offs = 4, - .len = 2, - .pattern = scan_ff_pattern -}; - -static struct tmio_nand_data e400_t7l66xb_nand_config = { - .num_partitions = 1, - .partition = &partition_a, - .badblock_pattern = &e400_t7l66xb_nand_bbt, -}; - -static struct t7l66xb_platform_data e400_t7l66xb_info = { - .irq_base = IRQ_BOARD_START, - .enable = &eseries_tmio_enable, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, - - .nand_data = &e400_t7l66xb_nand_config, -}; - -static struct platform_device e400_t7l66xb_device = { - .name = "t7l66xb", - .id = -1, - .dev = { - .platform_data = &e400_t7l66xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -/* ---------------------------------------------------------- */ - -static struct platform_device *e400_devices[] __initdata = { - &e400_t7l66xb_device, - &e7xx_gpio_vbus, -}; - -static void __init e400_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - /* Fixme - e400 may have a switched clock */ - eseries_register_clks(); - eseries_get_tmio_gpios(); - pxa_set_fb_info(NULL, &e400_pxafb_mach_info); - gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table); - platform_add_devices(ARRAY_AND_SIZE(e400_devices)); -} - -MACHINE_START(E400, "Toshiba e400") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = ESERIES_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .fixup = eseries_fixup, - .init_machine = e400_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E740 -/* ------------------------ e740 video support --------------------------- */ - -static struct w100_gen_regs e740_lcd_regs = { - .lcd_format = 0x00008023, - .lcdd_cntl1 = 0x0f000000, - .lcdd_cntl2 = 0x0003ffff, - .genlcd_cntl1 = 0x00ffff03, - .genlcd_cntl2 = 0x003c0f03, - .genlcd_cntl3 = 0x000143aa, -}; - -static struct w100_mode e740_lcd_mode = { - .xres = 240, - .yres = 320, - .left_margin = 20, - .right_margin = 28, - .upper_margin = 9, - .lower_margin = 8, - .crtc_ss = 0x80140013, - .crtc_ls = 0x81150110, - .crtc_gs = 0x80050005, - .crtc_vpos_gs = 0x000a0009, - .crtc_rev = 0x0040010a, - .crtc_dclk = 0xa906000a, - .crtc_gclk = 0x80050108, - .crtc_goe = 0x80050108, - .pll_freq = 57, - .pixclk_divider = 4, - .pixclk_divider_rotated = 4, - .pixclk_src = CLK_SRC_XTAL, - .sysclk_divider = 1, - .sysclk_src = CLK_SRC_PLL, - .crtc_ps1_active = 0x41060010, -}; - -static struct w100_gpio_regs e740_w100_gpio_info = { - .init_data1 = 0x21002103, - .gpio_dir1 = 0xffffdeff, - .gpio_oe1 = 0x03c00643, - .init_data2 = 0x003f003f, - .gpio_dir2 = 0xffffffff, - .gpio_oe2 = 0x000000ff, -}; - -static struct w100fb_mach_info e740_fb_info = { - .modelist = &e740_lcd_mode, - .num_modes = 1, - .regs = &e740_lcd_regs, - .gpio = &e740_w100_gpio_info, - .xtal_freq = 14318000, - .xtal_dbl = 1, -}; - -static struct resource e740_fb_resources[] = { - [0] = { - .start = 0x0c000000, - .end = 0x0cffffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device e740_fb_device = { - .name = "w100fb", - .id = -1, - .dev = { - .platform_data = &e740_fb_info, - }, - .num_resources = ARRAY_SIZE(e740_fb_resources), - .resource = e740_fb_resources, -}; - -/* --------------------------- MFP Pin config -------------------------- */ - -static unsigned long e740_pin_config[] __initdata = { - /* Chip selects */ - GPIO15_nCS_1, /* CS1 - Flash */ - GPIO79_nCS_3, /* CS3 - IMAGEON */ - GPIO80_nCS_4, /* CS4 - TMIO */ - - /* Clocks */ - GPIO12_32KHz, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - - /* TMIO controller */ - GPIO19_GPIO, /* t7l66xb #PCLR */ - GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ - - /* UDC */ - GPIO13_GPIO, - GPIO3_GPIO, - - /* IrDA */ - GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* Audio power control */ - GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */ - GPIO40_GPIO, /* Mic amp power */ - GPIO41_GPIO, /* Headphone amp power */ - - /* PC Card */ - GPIO8_GPIO, /* CD0 */ - GPIO44_GPIO, /* CD1 */ - GPIO11_GPIO, /* IRQ0 */ - GPIO6_GPIO, /* IRQ1 */ - GPIO27_GPIO, /* RST0 */ - GPIO24_GPIO, /* RST1 */ - GPIO20_GPIO, /* PWR0 */ - GPIO23_GPIO, /* PWR1 */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* wakeup */ - GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, -}; - -/* -------------------- e740 t7l66xb parameters -------------------- */ - -static struct t7l66xb_platform_data e740_t7l66xb_info = { - .irq_base = IRQ_BOARD_START, - .enable = &eseries_tmio_enable, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, -}; - -static struct platform_device e740_t7l66xb_device = { - .name = "t7l66xb", - .id = -1, - .dev = { - .platform_data = &e740_t7l66xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -static struct platform_device e740_audio_device = { - .name = "e740-audio", - .id = -1, -}; - -static struct gpiod_lookup_table e740_audio_gpio_table = { - .dev_id = "e740-audio", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_E740_WM9705_nAVDD2, "Audio power", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO_E740_AMP_ON, "Output amp", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO_E740_MIC_ON, "Mic amp", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* ----------------------------------------------------------------------- */ - -static struct platform_device *e740_devices[] __initdata = { - &e740_fb_device, - &e740_t7l66xb_device, - &e7xx_gpio_vbus, - &e740_audio_device, -}; - -static void __init e740_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - eseries_register_clks(); - clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name, - "UDCCLK", &pxa25x_device_udc.dev), - eseries_get_tmio_gpios(); - gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table); - gpiod_add_lookup_table(&e740_audio_gpio_table); - platform_add_devices(ARRAY_AND_SIZE(e740_devices)); - pxa_set_ac97_info(NULL); - pxa_set_ficp_info(&e7xx_ficp_platform_data); -} - -MACHINE_START(E740, "Toshiba e740") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = ESERIES_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .fixup = eseries_fixup, - .init_machine = e740_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E750 -/* ---------------------- E750 LCD definitions -------------------- */ - -static struct w100_gen_regs e750_lcd_regs = { - .lcd_format = 0x00008003, - .lcdd_cntl1 = 0x00000000, - .lcdd_cntl2 = 0x0003ffff, - .genlcd_cntl1 = 0x00fff003, - .genlcd_cntl2 = 0x003c0f03, - .genlcd_cntl3 = 0x000143aa, -}; - -static struct w100_mode e750_lcd_mode = { - .xres = 240, - .yres = 320, - .left_margin = 21, - .right_margin = 22, - .upper_margin = 5, - .lower_margin = 4, - .crtc_ss = 0x80150014, - .crtc_ls = 0x8014000d, - .crtc_gs = 0xc1000005, - .crtc_vpos_gs = 0x00020147, - .crtc_rev = 0x0040010a, - .crtc_dclk = 0xa1700030, - .crtc_gclk = 0x80cc0015, - .crtc_goe = 0x80cc0015, - .crtc_ps1_active = 0x61060017, - .pll_freq = 57, - .pixclk_divider = 4, - .pixclk_divider_rotated = 4, - .pixclk_src = CLK_SRC_XTAL, - .sysclk_divider = 1, - .sysclk_src = CLK_SRC_PLL, -}; - -static struct w100_gpio_regs e750_w100_gpio_info = { - .init_data1 = 0x01192f1b, - .gpio_dir1 = 0xd5ffdeff, - .gpio_oe1 = 0x000020bf, - .init_data2 = 0x010f010f, - .gpio_dir2 = 0xffffffff, - .gpio_oe2 = 0x000001cf, -}; - -static struct w100fb_mach_info e750_fb_info = { - .modelist = &e750_lcd_mode, - .num_modes = 1, - .regs = &e750_lcd_regs, - .gpio = &e750_w100_gpio_info, - .xtal_freq = 14318000, - .xtal_dbl = 1, -}; - -static struct resource e750_fb_resources[] = { - [0] = { - .start = 0x0c000000, - .end = 0x0cffffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device e750_fb_device = { - .name = "w100fb", - .id = -1, - .dev = { - .platform_data = &e750_fb_info, - }, - .num_resources = ARRAY_SIZE(e750_fb_resources), - .resource = e750_fb_resources, -}; - -/* -------------------- e750 MFP parameters -------------------- */ - -static unsigned long e750_pin_config[] __initdata = { - /* Chip selects */ - GPIO15_nCS_1, /* CS1 - Flash */ - GPIO79_nCS_3, /* CS3 - IMAGEON */ - GPIO80_nCS_4, /* CS4 - TMIO */ - - /* Clocks */ - GPIO11_3_6MHz, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - - /* TMIO controller */ - GPIO19_GPIO, /* t7l66xb #PCLR */ - GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ - - /* UDC */ - GPIO13_GPIO, - GPIO3_GPIO, - - /* IrDA */ - GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* Audio power control */ - GPIO4_GPIO, /* Headphone amp power */ - GPIO7_GPIO, /* Speaker amp power */ - GPIO37_GPIO, /* Headphone detect */ - - /* PC Card */ - GPIO8_GPIO, /* CD0 */ - GPIO44_GPIO, /* CD1 */ - /* GPIO11_GPIO, IRQ0 */ - GPIO6_GPIO, /* IRQ1 */ - GPIO27_GPIO, /* RST0 */ - GPIO24_GPIO, /* RST1 */ - GPIO20_GPIO, /* PWR0 */ - GPIO23_GPIO, /* PWR1 */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* wakeup */ - GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, -}; - -/* ----------------- e750 tc6393xb parameters ------------------ */ - -static struct tc6393xb_platform_data e750_tc6393xb_info = { - .irq_base = IRQ_BOARD_START, - .scr_pll2cr = 0x0cc1, - .scr_gper = 0, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, - .enable = &eseries_tmio_enable, - .disable = &eseries_tmio_disable, -}; - -static struct platform_device e750_tc6393xb_device = { - .name = "tc6393xb", - .id = -1, - .dev = { - .platform_data = &e750_tc6393xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -static struct gpiod_lookup_table e750_audio_gpio_table = { - .dev_id = "e750-audio", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_E750_HP_AMP_OFF, "Output amp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_E750_SPK_AMP_OFF, "Mic amp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct platform_device e750_audio_device = { - .name = "e750-audio", - .id = -1, -}; - -/* ------------------------------------------------------------- */ - -static struct platform_device *e750_devices[] __initdata = { - &e750_fb_device, - &e750_tc6393xb_device, - &e7xx_gpio_vbus, - &e750_audio_device, -}; - -static void __init e750_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name, - "GPIO11_CLK", NULL), - eseries_get_tmio_gpios(); - gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table); - gpiod_add_lookup_table(&e750_audio_gpio_table); - platform_add_devices(ARRAY_AND_SIZE(e750_devices)); - pxa_set_ac97_info(NULL); - pxa_set_ficp_info(&e7xx_ficp_platform_data); -} - -MACHINE_START(E750, "Toshiba e750") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = ESERIES_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .fixup = eseries_fixup, - .init_machine = e750_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E800 -/* ------------------------ e800 LCD definitions ------------------------- */ - -static unsigned long e800_pin_config[] __initdata = { - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* tc6393xb */ - GPIO11_3_6MHz, -}; - -static struct w100_gen_regs e800_lcd_regs = { - .lcd_format = 0x00008003, - .lcdd_cntl1 = 0x02a00000, - .lcdd_cntl2 = 0x0003ffff, - .genlcd_cntl1 = 0x000ff2a3, - .genlcd_cntl2 = 0x000002a3, - .genlcd_cntl3 = 0x000102aa, -}; - -static struct w100_mode e800_lcd_mode[2] = { - [0] = { - .xres = 480, - .yres = 640, - .left_margin = 52, - .right_margin = 148, - .upper_margin = 2, - .lower_margin = 6, - .crtc_ss = 0x80350034, - .crtc_ls = 0x802b0026, - .crtc_gs = 0x80160016, - .crtc_vpos_gs = 0x00020003, - .crtc_rev = 0x0040001d, - .crtc_dclk = 0xe0000000, - .crtc_gclk = 0x82a50049, - .crtc_goe = 0x80ee001c, - .crtc_ps1_active = 0x00000000, - .pll_freq = 128, - .pixclk_divider = 4, - .pixclk_divider_rotated = 6, - .pixclk_src = CLK_SRC_PLL, - .sysclk_divider = 0, - .sysclk_src = CLK_SRC_PLL, - }, - [1] = { - .xres = 240, - .yres = 320, - .left_margin = 15, - .right_margin = 88, - .upper_margin = 0, - .lower_margin = 7, - .crtc_ss = 0xd010000f, - .crtc_ls = 0x80070003, - .crtc_gs = 0x80000000, - .crtc_vpos_gs = 0x01460147, - .crtc_rev = 0x00400003, - .crtc_dclk = 0xa1700030, - .crtc_gclk = 0x814b0008, - .crtc_goe = 0x80cc0015, - .crtc_ps1_active = 0x00000000, - .pll_freq = 100, - .pixclk_divider = 6, /* Wince uses 14 which gives a */ - .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */ - .pixclk_src = CLK_SRC_PLL, - .sysclk_divider = 0, - .sysclk_src = CLK_SRC_PLL, - } -}; - - -static struct w100_gpio_regs e800_w100_gpio_info = { - .init_data1 = 0xc13fc019, - .gpio_dir1 = 0x3e40df7f, - .gpio_oe1 = 0x003c3000, - .init_data2 = 0x00000000, - .gpio_dir2 = 0x00000000, - .gpio_oe2 = 0x00000000, -}; - -static struct w100_mem_info e800_w100_mem_info = { - .ext_cntl = 0x09640011, - .sdram_mode_reg = 0x00600021, - .ext_timing_cntl = 0x10001545, - .io_cntl = 0x7ddd7333, - .size = 0x1fffff, -}; - -static void e800_tg_change(struct w100fb_par *par) -{ - unsigned long tmp; - - tmp = w100fb_gpio_read(W100_GPIO_PORT_A); - if (par->mode->xres == 480) - tmp |= 0x100; - else - tmp &= ~0x100; - w100fb_gpio_write(W100_GPIO_PORT_A, tmp); -} - -static struct w100_tg_info e800_tg_info = { - .change = e800_tg_change, -}; - -static struct w100fb_mach_info e800_fb_info = { - .modelist = e800_lcd_mode, - .num_modes = 2, - .regs = &e800_lcd_regs, - .gpio = &e800_w100_gpio_info, - .mem = &e800_w100_mem_info, - .tg = &e800_tg_info, - .xtal_freq = 16000000, -}; - -static struct resource e800_fb_resources[] = { - [0] = { - .start = 0x0c000000, - .end = 0x0cffffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device e800_fb_device = { - .name = "w100fb", - .id = -1, - .dev = { - .platform_data = &e800_fb_info, - }, - .num_resources = ARRAY_SIZE(e800_fb_resources), - .resource = e800_fb_resources, -}; - -/* --------------------------- UDC definitions --------------------------- */ - -static struct gpiod_lookup_table e800_gpio_vbus_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_E800_USB_DISC, - "vbus", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO_E800_USB_PULLUP, - "pullup", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct platform_device e800_gpio_vbus = { - .name = "gpio-vbus", - .id = -1, -}; - - -/* ----------------- e800 tc6393xb parameters ------------------ */ - -static struct tc6393xb_platform_data e800_tc6393xb_info = { - .irq_base = IRQ_BOARD_START, - .scr_pll2cr = 0x0cc1, - .scr_gper = 0, - .suspend = &eseries_tmio_suspend, - .resume = &eseries_tmio_resume, - .enable = &eseries_tmio_enable, - .disable = &eseries_tmio_disable, -}; - -static struct platform_device e800_tc6393xb_device = { - .name = "tc6393xb", - .id = -1, - .dev = { - .platform_data = &e800_tc6393xb_info, - }, - .num_resources = 2, - .resource = eseries_tmio_resources, -}; - -static struct gpiod_lookup_table e800_audio_gpio_table = { - .dev_id = "e800-audio", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_E800_HP_AMP_OFF, "Output amp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_E800_SPK_AMP_ON, "Mic amp", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device e800_audio_device = { - .name = "e800-audio", - .id = -1, -}; - -/* ----------------------------------------------------------------------- */ - -static struct platform_device *e800_devices[] __initdata = { - &e800_fb_device, - &e800_tc6393xb_device, - &e800_gpio_vbus, - &e800_audio_device, -}; - -static void __init e800_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name, - "GPIO11_CLK", NULL), - eseries_get_tmio_gpios(); - gpiod_add_lookup_table(&e800_gpio_vbus_gpiod_table); - gpiod_add_lookup_table(&e800_audio_gpio_table); - platform_add_devices(ARRAY_AND_SIZE(e800_devices)); - pxa_set_ac97_info(NULL); -} - -MACHINE_START(E800, "Toshiba e800") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = ESERIES_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .fixup = eseries_fixup, - .init_machine = e800_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END -#endif diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c deleted file mode 100644 index 69c2ec02a16c..000000000000 --- a/arch/arm/mach-pxa/ezx.c +++ /dev/null @@ -1,1254 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * ezx.c - Common code for the EZX platform. - * - * Copyright (C) 2005-2006 Harald Welte <laforge@openezx.org>, - * 2007-2008 Daniel Ribeiro <drwyrm@gmail.com>, - * 2007-2008 Stefan Schmidt <stefan@datenfreihafen.org> - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/fixed.h> -#include <linux/input.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/gpio_keys.h> -#include <linux/leds-lp3944.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa27x.h" -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include <linux/platform_data/media/camera-pxa.h> - -#include "devices.h" -#include "generic.h" - -#define EZX_NR_IRQS (IRQ_BOARD_START + 24) - -#define GPIO12_A780_FLIP_LID 12 -#define GPIO15_A1200_FLIP_LID 15 -#define GPIO15_A910_FLIP_LID 15 -#define GPIO12_E680_LOCK_SWITCH 12 -#define GPIO15_E6_LOCK_SWITCH 15 -#define GPIO50_nCAM_EN 50 -#define GPIO19_GEN1_CAM_RST 19 -#define GPIO28_GEN2_CAM_RST 28 - -static struct pwm_lookup ezx_pwm_lookup[] __maybe_unused = { - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78700, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data ezx_backlight_data = { - .max_brightness = 1023, - .dft_brightness = 1023, -}; - -static struct platform_device ezx_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa27x_device_pwm0.dev, - .platform_data = &ezx_backlight_data, - }, -}; - -static struct pxafb_mode_info mode_ezx_old = { - .pixclock = 150000, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 10, - .left_margin = 20, - .right_margin = 10, - .vsync_len = 2, - .upper_margin = 3, - .lower_margin = 2, - .sync = 0, -}; - -static struct pxafb_mach_info ezx_fb_info_1 __maybe_unused = { - .modes = &mode_ezx_old, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP, -}; - -static struct pxafb_mode_info mode_72r89803y01 = { - .pixclock = 192308, - .xres = 240, - .yres = 320, - .bpp = 32, - .depth = 18, - .hsync_len = 10, - .left_margin = 20, - .right_margin = 10, - .vsync_len = 2, - .upper_margin = 3, - .lower_margin = 2, - .sync = 0, -}; - -static struct pxafb_mach_info ezx_fb_info_2 __maybe_unused = { - .modes = &mode_72r89803y01, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_18BPP, -}; - -static struct platform_device *ezx_devices[] __initdata __maybe_unused = { - &ezx_backlight_device, -}; - -static unsigned long ezx_pin_config[] __initdata __maybe_unused = { - /* PWM backlight */ - GPIO16_PWM0_OUT, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* PCAP SSP */ - GPIO29_SSP1_SCLK, - GPIO25_SSP1_TXD, - GPIO26_SSP1_RXD, - GPIO24_GPIO, /* pcap chip select */ - GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* pcap interrupt */ - GPIO4_GPIO | MFP_LPM_DRIVE_HIGH, /* WDI_AP */ - GPIO55_GPIO | MFP_LPM_DRIVE_HIGH, /* SYS_RESTART */ - - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO11_GPIO, /* mmc detect */ - - /* usb to external transceiver */ - GPIO34_USB_P2_2, - GPIO35_USB_P2_1, - GPIO36_USB_P2_4, - GPIO39_USB_P2_6, - GPIO40_USB_P2_5, - GPIO53_USB_P2_3, - - /* usb to Neptune GSM chip */ - GPIO30_USB_P3_2, - GPIO31_USB_P3_6, - GPIO90_USB_P3_5, - GPIO91_USB_P3_1, - GPIO56_USB_P3_4, - GPIO113_USB_P3_3, -}; - -#if defined(CONFIG_MACH_EZX_A780) || defined(CONFIG_MACH_EZX_E680) -static unsigned long gen1_pin_config[] __initdata = { - /* flip / lockswitch */ - GPIO12_GPIO | WAKEUP_ON_EDGE_BOTH, - - /* bluetooth (bcm2035) */ - GPIO14_GPIO | WAKEUP_ON_EDGE_RISE, /* HOSTWAKE */ - GPIO48_GPIO, /* RESET */ - GPIO28_GPIO, /* WAKEUP */ - - /* Neptune handshake */ - GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* BP_RDY */ - GPIO57_GPIO | MFP_LPM_DRIVE_HIGH, /* AP_RDY */ - GPIO13_GPIO | WAKEUP_ON_EDGE_BOTH, /* WDI */ - GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH, /* WDI2 */ - GPIO82_GPIO | MFP_LPM_DRIVE_HIGH, /* RESET */ - GPIO99_GPIO | MFP_LPM_DRIVE_HIGH, /* TC_MM_EN */ - - /* sound */ - GPIO52_SSP3_SCLK, - GPIO83_SSP3_SFRM, - GPIO81_SSP3_TXD, - GPIO89_SSP3_RXD, - - /* ssp2 pins to in */ - GPIO22_GPIO, /* SSP2_SCLK */ - GPIO37_GPIO, /* SSP2_SFRM */ - GPIO38_GPIO, /* SSP2_TXD */ - GPIO88_GPIO, /* SSP2_RXD */ - - /* camera */ - GPIO23_CIF_MCLK, - GPIO54_CIF_PCLK, - GPIO85_CIF_LV, - GPIO84_CIF_FV, - GPIO27_CIF_DD_0, - GPIO114_CIF_DD_1, - GPIO51_CIF_DD_2, - GPIO115_CIF_DD_3, - GPIO95_CIF_DD_4, - GPIO94_CIF_DD_5, - GPIO17_CIF_DD_6, - GPIO108_CIF_DD_7, - GPIO50_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_EN */ - GPIO19_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_RST */ - - /* EMU */ - GPIO120_GPIO, /* EMU_MUX1 */ - GPIO119_GPIO, /* EMU_MUX2 */ - GPIO86_GPIO, /* SNP_INT_CTL */ - GPIO87_GPIO, /* SNP_INT_IN */ -}; -#endif - -#if defined(CONFIG_MACH_EZX_A1200) || defined(CONFIG_MACH_EZX_A910) || \ - defined(CONFIG_MACH_EZX_E2) || defined(CONFIG_MACH_EZX_E6) -static unsigned long gen2_pin_config[] __initdata = { - /* flip / lockswitch */ - GPIO15_GPIO | WAKEUP_ON_EDGE_BOTH, - - /* EOC */ - GPIO10_GPIO | WAKEUP_ON_EDGE_RISE, - - /* bluetooth (bcm2045) */ - GPIO13_GPIO | WAKEUP_ON_EDGE_RISE, /* HOSTWAKE */ - GPIO37_GPIO, /* RESET */ - GPIO57_GPIO, /* WAKEUP */ - - /* Neptune handshake */ - GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* BP_RDY */ - GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* AP_RDY */ - GPIO3_GPIO | WAKEUP_ON_EDGE_FALL, /* WDI */ - GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* RESET */ - GPIO41_GPIO, /* BP_FLASH */ - - /* sound */ - GPIO52_SSP3_SCLK, - GPIO83_SSP3_SFRM, - GPIO81_SSP3_TXD, - GPIO82_SSP3_RXD, - - /* ssp2 pins to in */ - GPIO22_GPIO, /* SSP2_SCLK */ - GPIO14_GPIO, /* SSP2_SFRM */ - GPIO38_GPIO, /* SSP2_TXD */ - GPIO88_GPIO, /* SSP2_RXD */ - - /* camera */ - GPIO23_CIF_MCLK, - GPIO54_CIF_PCLK, - GPIO85_CIF_LV, - GPIO84_CIF_FV, - GPIO27_CIF_DD_0, - GPIO114_CIF_DD_1, - GPIO51_CIF_DD_2, - GPIO115_CIF_DD_3, - GPIO95_CIF_DD_4, - GPIO48_CIF_DD_5, - GPIO93_CIF_DD_6, - GPIO12_CIF_DD_7, - GPIO50_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_EN */ - GPIO28_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_RST */ - GPIO17_GPIO, /* CAM_FLASH */ -}; -#endif - -#ifdef CONFIG_MACH_EZX_A780 -static unsigned long a780_pin_config[] __initdata = { - /* keypad */ - GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - GPIO107_KP_MKOUT_4, - - /* attenuate sound */ - GPIO96_GPIO, -}; -#endif - -#ifdef CONFIG_MACH_EZX_E680 -static unsigned long e680_pin_config[] __initdata = { - /* keypad */ - GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO96_KP_DKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_DKIN_4 | WAKEUP_ON_LEVEL_HIGH, - GPIO98_KP_DKIN_5 | WAKEUP_ON_LEVEL_HIGH, - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - - /* MIDI */ - GPIO79_GPIO, /* VA_SEL_BUL */ - GPIO80_GPIO, /* FLT_SEL_BUL */ - GPIO78_GPIO, /* MIDI_RESET */ - GPIO33_GPIO, /* MIDI_CS */ - GPIO15_GPIO, /* MIDI_IRQ */ - GPIO49_GPIO, /* MIDI_NPWE */ - GPIO18_GPIO, /* MIDI_RDY */ - - /* leds */ - GPIO46_GPIO, - GPIO47_GPIO, -}; -#endif - -#ifdef CONFIG_MACH_EZX_A1200 -static unsigned long a1200_pin_config[] __initdata = { - /* keypad */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - GPIO107_KP_MKOUT_4, - GPIO108_KP_MKOUT_5, -}; -#endif - -#ifdef CONFIG_MACH_EZX_A910 -static unsigned long a910_pin_config[] __initdata = { - /* keypad */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - GPIO107_KP_MKOUT_4, - GPIO108_KP_MKOUT_5, - - /* WLAN */ - GPIO89_GPIO, /* RESET */ - GPIO33_GPIO, /* WAKEUP */ - GPIO94_GPIO | WAKEUP_ON_LEVEL_HIGH, /* HOSTWAKE */ - - /* MMC CS */ - GPIO20_GPIO, -}; -#endif - -#ifdef CONFIG_MACH_EZX_E2 -static unsigned long e2_pin_config[] __initdata = { - /* keypad */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - GPIO107_KP_MKOUT_4, - GPIO108_KP_MKOUT_5, -}; -#endif - -#ifdef CONFIG_MACH_EZX_E6 -static unsigned long e6_pin_config[] __initdata = { - /* keypad */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - GPIO107_KP_MKOUT_4, - GPIO108_KP_MKOUT_5, -}; -#endif - -/* KEYPAD */ -#ifdef CONFIG_MACH_EZX_A780 -static const unsigned int a780_key_map[] = { - KEY(0, 0, KEY_SEND), - KEY(0, 1, KEY_BACK), - KEY(0, 2, KEY_END), - KEY(0, 3, KEY_PAGEUP), - KEY(0, 4, KEY_UP), - - KEY(1, 0, KEY_NUMERIC_1), - KEY(1, 1, KEY_NUMERIC_2), - KEY(1, 2, KEY_NUMERIC_3), - KEY(1, 3, KEY_SELECT), - KEY(1, 4, KEY_KPENTER), - - KEY(2, 0, KEY_NUMERIC_4), - KEY(2, 1, KEY_NUMERIC_5), - KEY(2, 2, KEY_NUMERIC_6), - KEY(2, 3, KEY_RECORD), - KEY(2, 4, KEY_LEFT), - - KEY(3, 0, KEY_NUMERIC_7), - KEY(3, 1, KEY_NUMERIC_8), - KEY(3, 2, KEY_NUMERIC_9), - KEY(3, 3, KEY_HOME), - KEY(3, 4, KEY_RIGHT), - - KEY(4, 0, KEY_NUMERIC_STAR), - KEY(4, 1, KEY_NUMERIC_0), - KEY(4, 2, KEY_NUMERIC_POUND), - KEY(4, 3, KEY_PAGEDOWN), - KEY(4, 4, KEY_DOWN), -}; - -static struct matrix_keymap_data a780_matrix_keymap_data = { - .keymap = a780_key_map, - .keymap_size = ARRAY_SIZE(a780_key_map), -}; - -static struct pxa27x_keypad_platform_data a780_keypad_platform_data = { - .matrix_key_rows = 5, - .matrix_key_cols = 5, - .matrix_keymap_data = &a780_matrix_keymap_data, - - .direct_key_map = { KEY_CAMERA }, - .direct_key_num = 1, - - .debounce_interval = 30, -}; -#endif /* CONFIG_MACH_EZX_A780 */ - -#ifdef CONFIG_MACH_EZX_E680 -static const unsigned int e680_key_map[] = { - KEY(0, 0, KEY_UP), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_RESERVED), - KEY(0, 3, KEY_SEND), - - KEY(1, 0, KEY_DOWN), - KEY(1, 1, KEY_LEFT), - KEY(1, 2, KEY_PAGEUP), - KEY(1, 3, KEY_PAGEDOWN), - - KEY(2, 0, KEY_RESERVED), - KEY(2, 1, KEY_RESERVED), - KEY(2, 2, KEY_RESERVED), - KEY(2, 3, KEY_KPENTER), -}; - -static struct matrix_keymap_data e680_matrix_keymap_data = { - .keymap = e680_key_map, - .keymap_size = ARRAY_SIZE(e680_key_map), -}; - -static struct pxa27x_keypad_platform_data e680_keypad_platform_data = { - .matrix_key_rows = 3, - .matrix_key_cols = 4, - .matrix_keymap_data = &e680_matrix_keymap_data, - - .direct_key_map = { - KEY_CAMERA, - KEY_RESERVED, - KEY_RESERVED, - KEY_F1, - KEY_CANCEL, - KEY_F2, - }, - .direct_key_num = 6, - - .debounce_interval = 30, -}; -#endif /* CONFIG_MACH_EZX_E680 */ - -#ifdef CONFIG_MACH_EZX_A1200 -static const unsigned int a1200_key_map[] = { - KEY(0, 0, KEY_RESERVED), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_PAGEDOWN), - KEY(0, 3, KEY_RESERVED), - KEY(0, 4, KEY_RESERVED), - KEY(0, 5, KEY_RESERVED), - - KEY(1, 0, KEY_RESERVED), - KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_CAMERA), - KEY(1, 3, KEY_RESERVED), - KEY(1, 4, KEY_RESERVED), - KEY(1, 5, KEY_RESERVED), - - KEY(2, 0, KEY_RESERVED), - KEY(2, 1, KEY_KPENTER), - KEY(2, 2, KEY_RECORD), - KEY(2, 3, KEY_RESERVED), - KEY(2, 4, KEY_RESERVED), - KEY(2, 5, KEY_SELECT), - - KEY(3, 0, KEY_RESERVED), - KEY(3, 1, KEY_UP), - KEY(3, 2, KEY_SEND), - KEY(3, 3, KEY_RESERVED), - KEY(3, 4, KEY_RESERVED), - KEY(3, 5, KEY_RESERVED), - - KEY(4, 0, KEY_RESERVED), - KEY(4, 1, KEY_LEFT), - KEY(4, 2, KEY_PAGEUP), - KEY(4, 3, KEY_RESERVED), - KEY(4, 4, KEY_RESERVED), - KEY(4, 5, KEY_RESERVED), -}; - -static struct matrix_keymap_data a1200_matrix_keymap_data = { - .keymap = a1200_key_map, - .keymap_size = ARRAY_SIZE(a1200_key_map), -}; - -static struct pxa27x_keypad_platform_data a1200_keypad_platform_data = { - .matrix_key_rows = 5, - .matrix_key_cols = 6, - .matrix_keymap_data = &a1200_matrix_keymap_data, - - .debounce_interval = 30, -}; -#endif /* CONFIG_MACH_EZX_A1200 */ - -#ifdef CONFIG_MACH_EZX_E6 -static const unsigned int e6_key_map[] = { - KEY(0, 0, KEY_RESERVED), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_PAGEDOWN), - KEY(0, 3, KEY_RESERVED), - KEY(0, 4, KEY_RESERVED), - KEY(0, 5, KEY_NEXTSONG), - - KEY(1, 0, KEY_RESERVED), - KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_PROG1), - KEY(1, 3, KEY_RESERVED), - KEY(1, 4, KEY_RESERVED), - KEY(1, 5, KEY_RESERVED), - - KEY(2, 0, KEY_RESERVED), - KEY(2, 1, KEY_ENTER), - KEY(2, 2, KEY_CAMERA), - KEY(2, 3, KEY_RESERVED), - KEY(2, 4, KEY_RESERVED), - KEY(2, 5, KEY_WWW), - - KEY(3, 0, KEY_RESERVED), - KEY(3, 1, KEY_UP), - KEY(3, 2, KEY_SEND), - KEY(3, 3, KEY_RESERVED), - KEY(3, 4, KEY_RESERVED), - KEY(3, 5, KEY_PLAYPAUSE), - - KEY(4, 0, KEY_RESERVED), - KEY(4, 1, KEY_LEFT), - KEY(4, 2, KEY_PAGEUP), - KEY(4, 3, KEY_RESERVED), - KEY(4, 4, KEY_RESERVED), - KEY(4, 5, KEY_PREVIOUSSONG), -}; - -static struct matrix_keymap_data e6_keymap_data = { - .keymap = e6_key_map, - .keymap_size = ARRAY_SIZE(e6_key_map), -}; - -static struct pxa27x_keypad_platform_data e6_keypad_platform_data = { - .matrix_key_rows = 5, - .matrix_key_cols = 6, - .matrix_keymap_data = &e6_keymap_data, - - .debounce_interval = 30, -}; -#endif /* CONFIG_MACH_EZX_E6 */ - -#ifdef CONFIG_MACH_EZX_A910 -static const unsigned int a910_key_map[] = { - KEY(0, 0, KEY_NUMERIC_6), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_PAGEDOWN), - KEY(0, 3, KEY_KPENTER), - KEY(0, 4, KEY_NUMERIC_5), - KEY(0, 5, KEY_CAMERA), - - KEY(1, 0, KEY_NUMERIC_8), - KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_RESERVED), - KEY(1, 3, KEY_F1), /* Left SoftKey */ - KEY(1, 4, KEY_NUMERIC_STAR), - KEY(1, 5, KEY_RESERVED), - - KEY(2, 0, KEY_NUMERIC_7), - KEY(2, 1, KEY_NUMERIC_9), - KEY(2, 2, KEY_RECORD), - KEY(2, 3, KEY_F2), /* Right SoftKey */ - KEY(2, 4, KEY_BACK), - KEY(2, 5, KEY_SELECT), - - KEY(3, 0, KEY_NUMERIC_2), - KEY(3, 1, KEY_UP), - KEY(3, 2, KEY_SEND), - KEY(3, 3, KEY_NUMERIC_0), - KEY(3, 4, KEY_NUMERIC_1), - KEY(3, 5, KEY_RECORD), - - KEY(4, 0, KEY_NUMERIC_4), - KEY(4, 1, KEY_LEFT), - KEY(4, 2, KEY_PAGEUP), - KEY(4, 3, KEY_NUMERIC_POUND), - KEY(4, 4, KEY_NUMERIC_3), - KEY(4, 5, KEY_RESERVED), -}; - -static struct matrix_keymap_data a910_matrix_keymap_data = { - .keymap = a910_key_map, - .keymap_size = ARRAY_SIZE(a910_key_map), -}; - -static struct pxa27x_keypad_platform_data a910_keypad_platform_data = { - .matrix_key_rows = 5, - .matrix_key_cols = 6, - .matrix_keymap_data = &a910_matrix_keymap_data, - - .debounce_interval = 30, -}; -#endif /* CONFIG_MACH_EZX_A910 */ - -#ifdef CONFIG_MACH_EZX_E2 -static const unsigned int e2_key_map[] = { - KEY(0, 0, KEY_NUMERIC_6), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_NUMERIC_9), - KEY(0, 3, KEY_NEXTSONG), - KEY(0, 4, KEY_NUMERIC_5), - KEY(0, 5, KEY_F1), /* Left SoftKey */ - - KEY(1, 0, KEY_NUMERIC_8), - KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_RESERVED), - KEY(1, 3, KEY_PAGEUP), - KEY(1, 4, KEY_NUMERIC_STAR), - KEY(1, 5, KEY_F2), /* Right SoftKey */ - - KEY(2, 0, KEY_NUMERIC_7), - KEY(2, 1, KEY_KPENTER), - KEY(2, 2, KEY_RECORD), - KEY(2, 3, KEY_PAGEDOWN), - KEY(2, 4, KEY_BACK), - KEY(2, 5, KEY_NUMERIC_0), - - KEY(3, 0, KEY_NUMERIC_2), - KEY(3, 1, KEY_UP), - KEY(3, 2, KEY_SEND), - KEY(3, 3, KEY_PLAYPAUSE), - KEY(3, 4, KEY_NUMERIC_1), - KEY(3, 5, KEY_SOUND), /* Music SoftKey */ - - KEY(4, 0, KEY_NUMERIC_4), - KEY(4, 1, KEY_LEFT), - KEY(4, 2, KEY_NUMERIC_POUND), - KEY(4, 3, KEY_PREVIOUSSONG), - KEY(4, 4, KEY_NUMERIC_3), - KEY(4, 5, KEY_RESERVED), -}; - -static struct matrix_keymap_data e2_matrix_keymap_data = { - .keymap = e2_key_map, - .keymap_size = ARRAY_SIZE(e2_key_map), -}; - -static struct pxa27x_keypad_platform_data e2_keypad_platform_data = { - .matrix_key_rows = 5, - .matrix_key_cols = 6, - .matrix_keymap_data = &e2_matrix_keymap_data, - - .debounce_interval = 30, -}; -#endif /* CONFIG_MACH_EZX_E2 */ - -#if defined(CONFIG_MACH_EZX_A780) || defined(CONFIG_MACH_EZX_A910) -/* camera */ -static struct regulator_consumer_supply camera_regulator_supplies[] = { - REGULATOR_SUPPLY("vdd", "0-005d"), -}; - -static struct regulator_init_data camera_regulator_initdata = { - .consumer_supplies = camera_regulator_supplies, - .num_consumer_supplies = ARRAY_SIZE(camera_regulator_supplies), - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -static struct fixed_voltage_config camera_regulator_config = { - .supply_name = "camera_vdd", - .microvolts = 2800000, - .init_data = &camera_regulator_initdata, -}; - -static struct platform_device camera_supply_regulator_device = { - .name = "reg-fixed-voltage", - .id = 1, - .dev = { - .platform_data = &camera_regulator_config, - }, -}; - -static struct gpiod_lookup_table camera_supply_gpiod_table = { - .dev_id = "reg-fixed-voltage.1", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO50_nCAM_EN, - NULL, GPIO_ACTIVE_LOW), - { }, - }, -}; -#endif - -#ifdef CONFIG_MACH_EZX_A780 -/* gpio_keys */ -static struct gpio_keys_button a780_buttons[] = { - [0] = { - .code = SW_LID, - .gpio = GPIO12_A780_FLIP_LID, - .active_low = 0, - .desc = "A780 flip lid", - .type = EV_SW, - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data a780_gpio_keys_platform_data = { - .buttons = a780_buttons, - .nbuttons = ARRAY_SIZE(a780_buttons), -}; - -static struct platform_device a780_gpio_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &a780_gpio_keys_platform_data, - }, -}; - -/* camera */ -static int a780_camera_reset(struct device *dev) -{ - gpio_set_value(GPIO19_GEN1_CAM_RST, 0); - msleep(10); - gpio_set_value(GPIO19_GEN1_CAM_RST, 1); - - return 0; -} - -static int a780_camera_init(void) -{ - int err; - - /* - * GPIO50_nCAM_EN is active low - * GPIO19_GEN1_CAM_RST is active on rising edge - */ - err = gpio_request(GPIO19_GEN1_CAM_RST, "CAM_RST"); - if (err) { - pr_err("%s: Failed to request CAM_RST\n", __func__); - return err; - } - - gpio_direction_output(GPIO19_GEN1_CAM_RST, 0); - a780_camera_reset(NULL); - - return 0; -} - -struct pxacamera_platform_data a780_pxacamera_platform_data = { - .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN | - PXA_CAMERA_PCP, - .mclk_10khz = 5000, - .sensor_i2c_adapter_id = 0, - .sensor_i2c_address = 0x5d, -}; - -static struct i2c_board_info a780_i2c_board_info[] = { - { - I2C_BOARD_INFO("mt9m111", 0x5d), - }, -}; - -static struct platform_device *a780_devices[] __initdata = { - &a780_gpio_keys, - &camera_supply_regulator_device, -}; - -static void __init a780_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(a780_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(a780_i2c_board_info)); - - pxa_set_fb_info(NULL, &ezx_fb_info_1); - - pxa_set_keypad_info(&a780_keypad_platform_data); - - if (a780_camera_init() == 0) - pxa_set_camera_info(&a780_pxacamera_platform_data); - - gpiod_add_lookup_table(&camera_supply_gpiod_table); - pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); - platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); - platform_add_devices(ARRAY_AND_SIZE(a780_devices)); - regulator_has_full_constraints(); -} - -MACHINE_START(EZX_A780, "Motorola EZX A780") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = EZX_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = a780_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_EZX_E680 -/* gpio_keys */ -static struct gpio_keys_button e680_buttons[] = { - [0] = { - .code = KEY_SCREENLOCK, - .gpio = GPIO12_E680_LOCK_SWITCH, - .active_low = 0, - .desc = "E680 lock switch", - .type = EV_KEY, - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data e680_gpio_keys_platform_data = { - .buttons = e680_buttons, - .nbuttons = ARRAY_SIZE(e680_buttons), -}; - -static struct platform_device e680_gpio_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &e680_gpio_keys_platform_data, - }, -}; - -static struct i2c_board_info __initdata e680_i2c_board_info[] = { - { I2C_BOARD_INFO("tea5767", 0x81) }, -}; - -static struct platform_device *e680_devices[] __initdata = { - &e680_gpio_keys, -}; - -static void __init e680_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(e680_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info)); - - pxa_set_fb_info(NULL, &ezx_fb_info_1); - - pxa_set_keypad_info(&e680_keypad_platform_data); - - pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); - platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); - platform_add_devices(ARRAY_AND_SIZE(e680_devices)); -} - -MACHINE_START(EZX_E680, "Motorola EZX E680") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = EZX_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = e680_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_EZX_A1200 -/* gpio_keys */ -static struct gpio_keys_button a1200_buttons[] = { - [0] = { - .code = SW_LID, - .gpio = GPIO15_A1200_FLIP_LID, - .active_low = 0, - .desc = "A1200 flip lid", - .type = EV_SW, - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data a1200_gpio_keys_platform_data = { - .buttons = a1200_buttons, - .nbuttons = ARRAY_SIZE(a1200_buttons), -}; - -static struct platform_device a1200_gpio_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &a1200_gpio_keys_platform_data, - }, -}; - -static struct i2c_board_info __initdata a1200_i2c_board_info[] = { - { I2C_BOARD_INFO("tea5767", 0x81) }, -}; - -static struct platform_device *a1200_devices[] __initdata = { - &a1200_gpio_keys, -}; - -static void __init a1200_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(a1200_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info)); - - pxa_set_fb_info(NULL, &ezx_fb_info_2); - - pxa_set_keypad_info(&a1200_keypad_platform_data); - - pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); - platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); - platform_add_devices(ARRAY_AND_SIZE(a1200_devices)); -} - -MACHINE_START(EZX_A1200, "Motorola EZX A1200") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = EZX_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = a1200_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_EZX_A910 -/* gpio_keys */ -static struct gpio_keys_button a910_buttons[] = { - [0] = { - .code = SW_LID, - .gpio = GPIO15_A910_FLIP_LID, - .active_low = 0, - .desc = "A910 flip lid", - .type = EV_SW, - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data a910_gpio_keys_platform_data = { - .buttons = a910_buttons, - .nbuttons = ARRAY_SIZE(a910_buttons), -}; - -static struct platform_device a910_gpio_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &a910_gpio_keys_platform_data, - }, -}; - -/* camera */ -static int a910_camera_reset(struct device *dev) -{ - gpio_set_value(GPIO28_GEN2_CAM_RST, 0); - msleep(10); - gpio_set_value(GPIO28_GEN2_CAM_RST, 1); - - return 0; -} - -static int a910_camera_init(void) -{ - int err; - - /* - * GPIO50_nCAM_EN is active low - * GPIO28_GEN2_CAM_RST is active on rising edge - */ - err = gpio_request(GPIO28_GEN2_CAM_RST, "CAM_RST"); - if (err) { - pr_err("%s: Failed to request CAM_RST\n", __func__); - return err; - } - - gpio_direction_output(GPIO28_GEN2_CAM_RST, 0); - a910_camera_reset(NULL); - - return 0; -} - -struct pxacamera_platform_data a910_pxacamera_platform_data = { - .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN | - PXA_CAMERA_PCP, - .mclk_10khz = 5000, - .sensor_i2c_adapter_id = 0, - .sensor_i2c_address = 0x5d, -}; - -/* leds-lp3944 */ -static struct lp3944_platform_data a910_lp3944_leds = { - .leds_size = LP3944_LEDS_MAX, - .leds = { - [0] = { - .name = "a910:red:", - .status = LP3944_LED_STATUS_OFF, - .type = LP3944_LED_TYPE_LED, - }, - [1] = { - .name = "a910:green:", - .status = LP3944_LED_STATUS_OFF, - .type = LP3944_LED_TYPE_LED, - }, - [2] { - .name = "a910:blue:", - .status = LP3944_LED_STATUS_OFF, - .type = LP3944_LED_TYPE_LED, - }, - /* Leds 3 and 4 are used as display power switches */ - [3] = { - .name = "a910::cli_display", - .status = LP3944_LED_STATUS_OFF, - .type = LP3944_LED_TYPE_LED_INVERTED - }, - [4] = { - .name = "a910::main_display", - .status = LP3944_LED_STATUS_ON, - .type = LP3944_LED_TYPE_LED_INVERTED - }, - [5] = { .type = LP3944_LED_TYPE_NONE }, - [6] = { - .name = "a910::torch", - .status = LP3944_LED_STATUS_OFF, - .type = LP3944_LED_TYPE_LED, - }, - [7] = { - .name = "a910::flash", - .status = LP3944_LED_STATUS_OFF, - .type = LP3944_LED_TYPE_LED_INVERTED, - }, - }, -}; - -static struct i2c_board_info __initdata a910_i2c_board_info[] = { - { - I2C_BOARD_INFO("lp3944", 0x60), - .platform_data = &a910_lp3944_leds, - }, - { - I2C_BOARD_INFO("mt9m111", 0x5d), - }, -}; - -static struct platform_device *a910_devices[] __initdata = { - &a910_gpio_keys, - &camera_supply_regulator_device, -}; - -static void __init a910_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(a910_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info)); - - pxa_set_fb_info(NULL, &ezx_fb_info_2); - - pxa_set_keypad_info(&a910_keypad_platform_data); - - if (a910_camera_init() == 0) - pxa_set_camera_info(&a910_pxacamera_platform_data); - - gpiod_add_lookup_table(&camera_supply_gpiod_table); - pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); - platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); - platform_add_devices(ARRAY_AND_SIZE(a910_devices)); - regulator_has_full_constraints(); -} - -MACHINE_START(EZX_A910, "Motorola EZX A910") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = EZX_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = a910_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_EZX_E6 -/* gpio_keys */ -static struct gpio_keys_button e6_buttons[] = { - [0] = { - .code = KEY_SCREENLOCK, - .gpio = GPIO15_E6_LOCK_SWITCH, - .active_low = 0, - .desc = "E6 lock switch", - .type = EV_KEY, - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data e6_gpio_keys_platform_data = { - .buttons = e6_buttons, - .nbuttons = ARRAY_SIZE(e6_buttons), -}; - -static struct platform_device e6_gpio_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &e6_gpio_keys_platform_data, - }, -}; - -static struct i2c_board_info __initdata e6_i2c_board_info[] = { - { I2C_BOARD_INFO("tea5767", 0x81) }, -}; - -static struct platform_device *e6_devices[] __initdata = { - &e6_gpio_keys, -}; - -static void __init e6_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(e6_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info)); - - pxa_set_fb_info(NULL, &ezx_fb_info_2); - - pxa_set_keypad_info(&e6_keypad_platform_data); - - pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); - platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); - platform_add_devices(ARRAY_AND_SIZE(e6_devices)); -} - -MACHINE_START(EZX_E6, "Motorola EZX E6") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = EZX_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = e6_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_EZX_E2 -static struct i2c_board_info __initdata e2_i2c_board_info[] = { - { I2C_BOARD_INFO("tea5767", 0x81) }, -}; - -static struct platform_device *e2_devices[] __initdata = { -}; - -static void __init e2_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); - pxa2xx_mfp_config(ARRAY_AND_SIZE(e2_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info)); - - pxa_set_fb_info(NULL, &ezx_fb_info_2); - - pxa_set_keypad_info(&e2_keypad_platform_data); - - pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); - platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); - platform_add_devices(ARRAY_AND_SIZE(e2_devices)); -} - -MACHINE_START(EZX_E2, "Motorola EZX E2") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = EZX_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = e2_init, - .restart = pxa_restart, -MACHINE_END -#endif diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c deleted file mode 100644 index 212efe24aedb..000000000000 --- a/arch/arm/mach-pxa/h5000.c +++ /dev/null @@ -1,210 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Hardware definitions for HP iPAQ h5xxx Handheld Computers - * - * Copyright 2000-2003 Hewlett-Packard Company. - * Copyright 2002 Jamey Hicks <jamey.hicks@hp.com> - * Copyright 2004-2005 Phil Blundell <pb@handhelds.org> - * Copyright 2007-2008 Anton Vorontsov <cbouatmailru@gmail.com> - * - * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, - * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS - * FITNESS FOR ANY PARTICULAR PURPOSE. - * - * Author: Jamey Hicks. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/irq.h> - -#include "pxa25x.h" -#include "h5000.h" -#include "udc.h" -#include "smemc.h" - -#include "generic.h" - -/* - * Flash - */ - -static struct mtd_partition h5000_flash0_partitions[] = { - { - .name = "bootldr", - .size = 0x00040000, - .offset = 0, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "root", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - }, -}; - -static struct mtd_partition h5000_flash1_partitions[] = { - { - .name = "second root", - .size = SZ_16M - 0x00040000, - .offset = 0, - }, - { - .name = "asset", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - .mask_flags = MTD_WRITEABLE, - }, -}; - -static struct physmap_flash_data h5000_flash0_data = { - .width = 4, - .parts = h5000_flash0_partitions, - .nr_parts = ARRAY_SIZE(h5000_flash0_partitions), -}; - -static struct physmap_flash_data h5000_flash1_data = { - .width = 4, - .parts = h5000_flash1_partitions, - .nr_parts = ARRAY_SIZE(h5000_flash1_partitions), -}; - -static struct resource h5000_flash0_resources = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_32M - 1, - .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, -}; - -static struct resource h5000_flash1_resources = { - .start = PXA_CS0_PHYS + SZ_32M, - .end = PXA_CS0_PHYS + SZ_32M + SZ_16M - 1, - .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, -}; - -static struct platform_device h5000_flash[] = { - { - .name = "physmap-flash", - .id = 0, - .resource = &h5000_flash0_resources, - .num_resources = 1, - .dev = { - .platform_data = &h5000_flash0_data, - }, - }, - { - .name = "physmap-flash", - .id = 1, - .resource = &h5000_flash1_resources, - .num_resources = 1, - .dev = { - .platform_data = &h5000_flash1_data, - }, - }, -}; - -/* - * USB Device Controller - */ - -static struct pxa2xx_udc_mach_info h5000_udc_mach_info __initdata = { - .gpio_pullup = H5000_GPIO_USB_PULLUP, -}; - -/* - * GPIO setup - */ - -static unsigned long h5000_pin_config[] __initdata = { - /* Crystal and Clock Signals */ - GPIO12_32KHz, - - /* SDRAM and Static Memory I/O Signals */ - GPIO15_nCS_1, - GPIO78_nCS_2, - GPIO79_nCS_3, - GPIO80_nCS_4, - - /* FFUART */ - GPIO34_FFUART_RXD, - GPIO35_FFUART_CTS, - GPIO36_FFUART_DCD, - GPIO37_FFUART_DSR, - GPIO38_FFUART_RI, - GPIO39_FFUART_TXD, - GPIO40_FFUART_DTR, - GPIO41_FFUART_RTS, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* SSP1 */ - GPIO23_SSP1_SCLK, - GPIO25_SSP1_TXD, - GPIO26_SSP1_RXD, - - /* I2S */ - GPIO28_I2S_BITCLK_OUT, - GPIO29_I2S_SDATA_IN, - GPIO30_I2S_SDATA_OUT, - GPIO31_I2S_SYNC, - GPIO32_I2S_SYSCLK, -}; - -/* - * Localbus setup: - * CS0: Flash; - * CS1: MediaQ chip, select 16-bit bus and vlio; - * CS5: SAMCOP. - */ - -static void fix_msc(void) -{ - __raw_writel(0x129c24f2, MSC0); - __raw_writel(0x7ff424fa, MSC1); - __raw_writel(0x7ff47ff4, MSC2); - - __raw_writel(__raw_readl(MDREFR) | 0x02080000, MDREFR); -} - -/* - * Platform devices - */ - -static struct platform_device *devices[] __initdata = { - &h5000_flash[0], - &h5000_flash[1], -}; - -static void __init h5000_init(void) -{ - fix_msc(); - - pxa2xx_mfp_config(ARRAY_AND_SIZE(h5000_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - pxa_set_udc_info(&h5000_udc_mach_info); - platform_add_devices(ARRAY_AND_SIZE(devices)); -} - -MACHINE_START(H5400, "HP iPAQ H5000") - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = h5000_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/h5000.h b/arch/arm/mach-pxa/h5000.h deleted file mode 100644 index 58687e94a0c7..000000000000 --- a/arch/arm/mach-pxa/h5000.h +++ /dev/null @@ -1,109 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Hardware definitions for HP iPAQ h5xxx Handheld Computers - * - * Copyright(20)02 Hewlett-Packard Company. - * - * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, - * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS - * FITNESS FOR ANY PARTICULAR PURPOSE. - * - * Author: Jamey Hicks - */ - -#ifndef __ASM_ARCH_H5000_H -#define __ASM_ARCH_H5000_H - -#include "mfp-pxa25x.h" - -/* - * CPU GPIOs - */ - -#define H5000_GPIO_POWER_BUTTON (0) -#define H5000_GPIO_RESET_BUTTON_N (1) -#define H5000_GPIO_OPT_INT (2) -#define H5000_GPIO_BACKUP_POWER (3) -#define H5000_GPIO_ACTION_BUTTON (4) -#define H5000_GPIO_COM_DCD_SOMETHING (5) /* what is this really ? */ -/* 6 not connected */ -#define H5000_GPIO_RESET_BUTTON_AGAIN_N (7) /* connected to gpio 1 as well */ -/* 8 not connected */ -#define H5000_GPIO_RSO_N (9) /* reset output from max1702 which regulates 3.3 and 2.5 */ -#define H5000_GPIO_ASIC_INT_N (10) /* from companion asic */ -#define H5000_GPIO_BT_ENV_0 (11) /* to LMX9814, set to 1 according to regdump */ -/*(12) not connected */ -#define H5000_GPIO_BT_ENV_1 (13) /* to LMX9814, set to 1 according to regdump */ -#define H5000_GPIO_BT_WU (14) /* from LMX9814, Defined as HOST_WAKEUP in the LMX9820 data sheet */ -/*(15) is CS1# */ -/*(16) not connected */ -/*(17) not connected */ -/*(18) is pcmcia ready */ -/*(19) is dreq1 */ -/*(20) is dreq0 */ -#define H5000_GPIO_OE_RD_NWR (21) /* output enable on rd/nwr signal to companion asic */ -/*(22) is not connected */ -#define H5000_GPIO_OPT_SPI_CLK (23) /* to extension pack */ -#define H5000_GPIO_OPT_SPI_CS_N (24) /* to extension pack */ -#define H5000_GPIO_OPT_SPI_DOUT (25) /* to extension pack */ -#define H5000_GPIO_OPT_SPI_DIN (26) /* to extension pack */ -/*(27) not connected */ -#define H5000_GPIO_I2S_BITCLK (28) /* connected to AC97 codec */ -#define H5000_GPIO_I2S_DATAOUT (29) /* connected to AC97 codec */ -#define H5000_GPIO_I2S_DATAIN (30) /* connected to AC97 codec */ -#define H5000_GPIO_I2S_LRCLK (31) /* connected to AC97 codec */ -#define H5000_GPIO_I2S_SYSCLK (32) /* connected to AC97 codec */ -/*(33) is CS5# */ -#define H5000_GPIO_COM_RXD (34) /* connected to cradle/cable connector */ -#define H5000_GPIO_COM_CTS (35) /* connected to cradle/cable connector */ -#define H5000_GPIO_COM_DCD (36) /* connected to cradle/cable connector */ -#define H5000_GPIO_COM_DSR (37) /* connected to cradle/cable connector */ -#define H5000_GPIO_COM_RI (38) /* connected to cradle/cable connector */ -#define H5000_GPIO_COM_TXD (39) /* connected to cradle/cable connector */ -#define H5000_GPIO_COM_DTR (40) /* connected to cradle/cable connector */ -#define H5000_GPIO_COM_RTS (41) /* connected to cradle/cable connector */ - -#define H5000_GPIO_BT_RXD (42) /* connected to BT (LMX9814) */ -#define H5000_GPIO_BT_TXD (43) /* connected to BT (LMX9814) */ -#define H5000_GPIO_BT_CTS (44) /* connected to BT (LMX9814) */ -#define H5000_GPIO_BT_RTS (45) /* connected to BT (LMX9814) */ - -#define H5000_GPIO_IRDA_RXD (46) -#define H5000_GPIO_IRDA_TXD (47) - -#define H5000_GPIO_POE_N (48) /* used for pcmcia */ -#define H5000_GPIO_PWE_N (49) /* used for pcmcia */ -#define H5000_GPIO_PIOR_N (50) /* used for pcmcia */ -#define H5000_GPIO_PIOW_N (51) /* used for pcmcia */ -#define H5000_GPIO_PCE1_N (52) /* used for pcmcia */ -#define H5000_GPIO_PCE2_N (53) /* used for pcmcia */ -#define H5000_GPIO_PSKTSEL (54) /* used for pcmcia */ -#define H5000_GPIO_PREG_N (55) /* used for pcmcia */ -#define H5000_GPIO_PWAIT_N (56) /* used for pcmcia */ -#define H5000_GPIO_IOIS16_N (57) /* used for pcmcia */ - -#define H5000_GPIO_IRDA_SD (58) /* to hsdl3002 sd */ -/*(59) not connected */ -#define H5000_GPIO_POWER_SD_N (60) /* controls power to SD */ -#define H5000_GPIO_POWER_RS232_N (61) /* inverted FORCEON to rs232 transceiver */ -#define H5000_GPIO_POWER_ACCEL_N (62) /* controls power to accel */ -/*(63) is not connected */ -#define H5000_GPIO_OPT_NVRAM (64) /* controls power to expansion pack */ -#define H5000_GPIO_CHG_EN (65) /* to sc801 en */ -#define H5000_GPIO_USB_PULLUP (66) /* USB d+ pullup via 1.5K resistor */ -#define H5000_GPIO_BT_2V8_N (67) /* 2.8V used by bluetooth */ -#define H5000_GPIO_EXT_CHG_RATE (68) /* enables external charging rate */ -/*(69) is not connected */ -#define H5000_GPIO_CIR_RESET (70) /* consumer IR reset */ -#define H5000_GPIO_POWER_LIGHT_SENSOR_N (71) -#define H5000_GPIO_BT_M_RESET (72) -#define H5000_GPIO_STD_CHG_RATE (73) -#define H5000_GPIO_SD_WP_N (74) -#define H5000_GPIO_MOTOR_ON_N (75) /* external pullup on this */ -#define H5000_GPIO_HEADPHONE_DETECT (76) -#define H5000_GPIO_USB_CHG_RATE (77) /* select rate for charging via usb */ -/*(78) is CS2# */ -/*(79) is CS3# */ -/*(80) is CS4# */ - -#endif /* __ASM_ARCH_H5000_H */ diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c deleted file mode 100644 index 469ffeec6da5..000000000000 --- a/arch/arm/mach-pxa/himalaya.c +++ /dev/null @@ -1,166 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/himalaya.c - * - * Hardware definitions for the HTC Himalaya - * - * Based on 2.6.21-hh20's himalaya.c and himalaya_lcd.c - * - * Copyright (c) 2008 Zbynek Michl <Zbynek.Michl@seznam.cz> - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/fb.h> -#include <linux/platform_device.h> - -#include <video/w100fb.h> - -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa25x.h" - -#include "generic.h" - -/* ---------------------- Himalaya LCD definitions -------------------- */ - -static struct w100_gen_regs himalaya_lcd_regs = { - .lcd_format = 0x00000003, - .lcdd_cntl1 = 0x00000000, - .lcdd_cntl2 = 0x0003ffff, - .genlcd_cntl1 = 0x00fff003, - .genlcd_cntl2 = 0x00000003, - .genlcd_cntl3 = 0x000102aa, -}; - -static struct w100_mode himalaya4_lcd_mode = { - .xres = 240, - .yres = 320, - .left_margin = 0, - .right_margin = 31, - .upper_margin = 15, - .lower_margin = 0, - .crtc_ss = 0x80150014, - .crtc_ls = 0xa0fb00f7, - .crtc_gs = 0xc0080007, - .crtc_vpos_gs = 0x00080007, - .crtc_rev = 0x0000000a, - .crtc_dclk = 0x81700030, - .crtc_gclk = 0x8015010f, - .crtc_goe = 0x00000000, - .pll_freq = 80, - .pixclk_divider = 15, - .pixclk_divider_rotated = 15, - .pixclk_src = CLK_SRC_PLL, - .sysclk_divider = 0, - .sysclk_src = CLK_SRC_PLL, -}; - -static struct w100_mode himalaya6_lcd_mode = { - .xres = 240, - .yres = 320, - .left_margin = 9, - .right_margin = 8, - .upper_margin = 5, - .lower_margin = 4, - .crtc_ss = 0x80150014, - .crtc_ls = 0xa0fb00f7, - .crtc_gs = 0xc0080007, - .crtc_vpos_gs = 0x00080007, - .crtc_rev = 0x0000000a, - .crtc_dclk = 0xa1700030, - .crtc_gclk = 0x8015010f, - .crtc_goe = 0x00000000, - .pll_freq = 95, - .pixclk_divider = 0xb, - .pixclk_divider_rotated = 4, - .pixclk_src = CLK_SRC_PLL, - .sysclk_divider = 1, - .sysclk_src = CLK_SRC_PLL, -}; - -static struct w100_gpio_regs himalaya_w100_gpio_info = { - .init_data1 = 0xffff0000, /* GPIO_DATA */ - .gpio_dir1 = 0x00000000, /* GPIO_CNTL1 */ - .gpio_oe1 = 0x003c0000, /* GPIO_CNTL2 */ - .init_data2 = 0x00000000, /* GPIO_DATA2 */ - .gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */ - .gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */ -}; - -static struct w100fb_mach_info himalaya_fb_info = { - .num_modes = 1, - .regs = &himalaya_lcd_regs, - .gpio = &himalaya_w100_gpio_info, - .xtal_freq = 16000000, -}; - -static struct resource himalaya_fb_resources[] = { - [0] = { - .start = 0x08000000, - .end = 0x08ffffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device himalaya_fb_device = { - .name = "w100fb", - .id = -1, - .dev = { - .platform_data = &himalaya_fb_info, - }, - .num_resources = ARRAY_SIZE(himalaya_fb_resources), - .resource = himalaya_fb_resources, -}; - -/* ----------------------------------------------------------------------- */ - -static struct platform_device *devices[] __initdata = { - &himalaya_fb_device, -}; - -static void __init himalaya_lcd_init(void) -{ - int himalaya_boardid; - - himalaya_boardid = 0x4; /* hardcoded (detection needs ASIC3 functions) */ - printk(KERN_INFO "himalaya LCD Driver init. boardid=%d\n", - himalaya_boardid); - - switch (himalaya_boardid) { - case 0x4: - himalaya_fb_info.modelist = &himalaya4_lcd_mode; - break; - case 0x6: - himalaya_fb_info.modelist = &himalaya6_lcd_mode; - break; - default: - printk(KERN_INFO "himalaya lcd_init: unknown boardid=%d. Using 0x4\n", - himalaya_boardid); - himalaya_fb_info.modelist = &himalaya4_lcd_mode; - } -} - -static void __init himalaya_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - himalaya_lcd_init(); - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - - -MACHINE_START(HIMALAYA, "HTC Himalaya") - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_machine = himalaya_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/hx4700-pcmcia.c b/arch/arm/mach-pxa/hx4700-pcmcia.c deleted file mode 100644 index e2331dfe427d..000000000000 --- a/arch/arm/mach-pxa/hx4700-pcmcia.c +++ /dev/null @@ -1,118 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2012 Paul Parsons <lost.distance@yahoo.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/err.h> -#include <linux/gpio.h> -#include <linux/irq.h> - -#include <asm/mach-types.h> -#include "hx4700.h" - -#include <pcmcia/soc_common.h> - -static struct gpio gpios[] = { - { GPIO114_HX4700_CF_RESET, GPIOF_OUT_INIT_LOW, "CF reset" }, - { EGPIO4_CF_3V3_ON, GPIOF_OUT_INIT_LOW, "CF 3.3V enable" }, -}; - -static int hx4700_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(gpios, ARRAY_SIZE(gpios)); - if (ret) - goto out; - - /* - * IRQ type must be set before soc_pcmcia_hw_init() calls request_irq(). - * The asic3 default IRQ type is level trigger low level detect, exactly - * the the signal present on GPIOD4_CF_nCD when a CF card is inserted. - * If the IRQ type is not changed, the asic3 interrupt handler will loop - * repeatedly because it is unable to clear the level trigger interrupt. - */ - irq_set_irq_type(gpio_to_irq(GPIOD4_CF_nCD), IRQ_TYPE_EDGE_BOTH); - - skt->stat[SOC_STAT_CD].gpio = GPIOD4_CF_nCD; - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO60_HX4700_CF_RNB; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - -out: - return ret; -} - -static void hx4700_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(gpios, ARRAY_SIZE(gpios)); -} - -static void hx4700_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int hx4700_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - switch (state->Vcc) { - case 0: - gpio_set_value(EGPIO4_CF_3V3_ON, 0); - break; - case 33: - gpio_set_value(EGPIO4_CF_3V3_ON, 1); - break; - default: - printk(KERN_ERR "pcmcia: Unsupported Vcc: %d\n", state->Vcc); - return -EINVAL; - } - - gpio_set_value(GPIO114_HX4700_CF_RESET, (state->flags & SS_RESET) != 0); - - return 0; -} - -static struct pcmcia_low_level hx4700_pcmcia_ops = { - .owner = THIS_MODULE, - .nr = 1, - .hw_init = hx4700_pcmcia_hw_init, - .hw_shutdown = hx4700_pcmcia_hw_shutdown, - .socket_state = hx4700_pcmcia_socket_state, - .configure_socket = hx4700_pcmcia_configure_socket, -}; - -static struct platform_device *hx4700_pcmcia_device; - -static int __init hx4700_pcmcia_init(void) -{ - struct platform_device *pdev; - - if (!machine_is_h4700()) - return -ENODEV; - - pdev = platform_device_register_data(NULL, "pxa2xx-pcmcia", -1, - &hx4700_pcmcia_ops, sizeof(hx4700_pcmcia_ops)); - if (IS_ERR(pdev)) - return PTR_ERR(pdev); - - hx4700_pcmcia_device = pdev; - - return 0; -} - -static void __exit hx4700_pcmcia_exit(void) -{ - platform_device_unregister(hx4700_pcmcia_device); -} - -module_init(hx4700_pcmcia_init); -module_exit(hx4700_pcmcia_exit); - -MODULE_AUTHOR("Paul Parsons <lost.distance@yahoo.com>"); -MODULE_DESCRIPTION("HP iPAQ hx4700 PCMCIA driver"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c deleted file mode 100644 index 2fd665944103..000000000000 --- a/arch/arm/mach-pxa/hx4700.c +++ /dev/null @@ -1,942 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Support for HP iPAQ hx4700 PDAs. - * - * Copyright (c) 2008-2009 Philipp Zabel - * - * Based on code: - * Copyright (c) 2004 Hewlett-Packard Company. - * Copyright (c) 2005 SDG Systems, LLC - * Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru> - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/gpio/machine.h> -#include <linux/gpio.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/input/navpoint.h> -#include <linux/lcd.h> -#include <linux/mfd/asic3.h> -#include <linux/mtd/physmap.h> -#include <linux/pda_power.h> -#include <linux/platform_data/gpio-htc-egpio.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/regulator/driver.h> -#include <linux/regulator/gpio-regulator.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/max1586.h> -#include <linux/spi/ads7846.h> -#include <linux/spi/spi.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa27x.h" -#include "addr-map.h" -#include "hx4700.h" -#include <linux/platform_data/irda-pxaficp.h> - -#include <sound/ak4641.h> -#include <video/platform_lcd.h> -#include <video/w100fb.h> - -#include "devices.h" -#include "generic.h" -#include "udc.h" - -/* Physical address space information */ - -#define ATI_W3220_PHYS PXA_CS2_PHYS /* ATI Imageon 3220 Graphics */ -#define ASIC3_PHYS PXA_CS3_PHYS -#define ASIC3_SD_PHYS (PXA_CS3_PHYS + 0x02000000) - -static unsigned long hx4700_pin_config[] __initdata = { - - /* SDRAM and Static Memory I/O Signals */ - GPIO20_nSDCS_2, - GPIO21_nSDCS_3, - GPIO15_nCS_1, - GPIO78_nCS_2, /* W3220 */ - GPIO79_nCS_3, /* ASIC3 */ - GPIO80_nCS_4, - GPIO33_nCS_5, /* EGPIO, WLAN */ - - /* PC CARD */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO54_nPCE_2, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - GPIO85_nPCE_1, - GPIO104_PSKTSEL, - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* FFUART (RS-232) */ - GPIO34_FFUART_RXD, - GPIO35_FFUART_CTS, - GPIO36_FFUART_DCD, - GPIO37_FFUART_DSR, - GPIO38_FFUART_RI, - GPIO39_FFUART_TXD, - GPIO40_FFUART_DTR, - GPIO41_FFUART_RTS, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD_LPM_LOW, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS_LPM_LOW, - - /* STUART (IRDA) */ - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, - - /* PWM 1 (Backlight) */ - GPIO17_PWM1_OUT, - - /* I2S */ - GPIO28_I2S_BITCLK_OUT, - GPIO29_I2S_SDATA_IN, - GPIO30_I2S_SDATA_OUT, - GPIO31_I2S_SYNC, - GPIO113_I2S_SYSCLK, - - /* SSP 1 (NavPoint) */ - GPIO23_SSP1_SCLK_IN, - GPIO24_SSP1_SFRM, - GPIO25_SSP1_TXD, - GPIO26_SSP1_RXD, - - /* SSP 2 (TSC2046) */ - GPIO19_SSP2_SCLK, - GPIO86_SSP2_RXD, - GPIO87_SSP2_TXD, - GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */ - - /* BQ24022 Regulator */ - GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */ - GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */ - - /* HX4700 specific input GPIOs */ - GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */ - GPIO13_GPIO, /* W3220_IRQ */ - GPIO14_GPIO, /* nWLAN_IRQ */ - - /* HX4700 specific output GPIOs */ - GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */ - GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */ - GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */ - GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */ - GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */ - - GPIO10_GPIO, /* GSM_IRQ */ - GPIO13_GPIO, /* CPLD_IRQ */ - GPIO107_GPIO, /* DS1WM_IRQ */ - GPIO108_GPIO, /* GSM_READY */ - GPIO58_GPIO, /* TSC2046_nPENIRQ */ - GPIO66_GPIO, /* nSDIO_IRQ */ -}; - -/* - * IRDA - */ - -static struct pxaficp_platform_data ficp_info = { - .gpio_pwdown = GPIO105_HX4700_nIR_ON, - .transceiver_cap = IR_SIRMODE | IR_OFF, -}; - -/* - * GPIO Keys - */ - -#define INIT_KEY(_code, _gpio, _active_low, _desc) \ - { \ - .code = KEY_##_code, \ - .gpio = _gpio, \ - .active_low = _active_low, \ - .desc = _desc, \ - .type = EV_KEY, \ - .wakeup = 1, \ - } - -static struct gpio_keys_button gpio_keys_buttons[] = { - INIT_KEY(POWER, GPIO0_HX4700_nKEY_POWER, 1, "Power button"), - INIT_KEY(MAIL, GPIO94_HX4700_KEY_MAIL, 0, "Mail button"), - INIT_KEY(ADDRESSBOOK, GPIO99_HX4700_KEY_CONTACTS,0, "Contacts button"), - INIT_KEY(RECORD, GPIOD6_nKEY_RECORD, 1, "Record button"), - INIT_KEY(CALENDAR, GPIOD1_nKEY_CALENDAR, 1, "Calendar button"), - INIT_KEY(HOMEPAGE, GPIOD3_nKEY_HOME, 1, "Home button"), -}; - -static struct gpio_keys_platform_data gpio_keys_data = { - .buttons = gpio_keys_buttons, - .nbuttons = ARRAY_SIZE(gpio_keys_buttons), -}; - -static struct platform_device gpio_keys = { - .name = "gpio-keys", - .dev = { - .platform_data = &gpio_keys_data, - }, - .id = -1, -}; - -/* - * Synaptics NavPoint connected to SSP1 - */ - -static struct navpoint_platform_data navpoint_platform_data = { - .port = 1, - .gpio = GPIO102_HX4700_SYNAPTICS_POWER_ON, -}; - -static struct platform_device navpoint = { - .name = "navpoint", - .id = -1, - .dev = { - .platform_data = &navpoint_platform_data, - }, -}; - -/* - * ASIC3 - */ - -static u16 asic3_gpio_config[] = { - /* ASIC3 GPIO banks A and B along with some of C and D - implement the buffering for the CF slot. */ - ASIC3_CONFIG_GPIO(0, 1, 1, 0), - ASIC3_CONFIG_GPIO(1, 1, 1, 0), - ASIC3_CONFIG_GPIO(2, 1, 1, 0), - ASIC3_CONFIG_GPIO(3, 1, 1, 0), - ASIC3_CONFIG_GPIO(4, 1, 1, 0), - ASIC3_CONFIG_GPIO(5, 1, 1, 0), - ASIC3_CONFIG_GPIO(6, 1, 1, 0), - ASIC3_CONFIG_GPIO(7, 1, 1, 0), - ASIC3_CONFIG_GPIO(8, 1, 1, 0), - ASIC3_CONFIG_GPIO(9, 1, 1, 0), - ASIC3_CONFIG_GPIO(10, 1, 1, 0), - ASIC3_CONFIG_GPIO(11, 1, 1, 0), - ASIC3_CONFIG_GPIO(12, 1, 1, 0), - ASIC3_CONFIG_GPIO(13, 1, 1, 0), - ASIC3_CONFIG_GPIO(14, 1, 1, 0), - ASIC3_CONFIG_GPIO(15, 1, 1, 0), - - ASIC3_CONFIG_GPIO(16, 1, 1, 0), - ASIC3_CONFIG_GPIO(17, 1, 1, 0), - ASIC3_CONFIG_GPIO(18, 1, 1, 0), - ASIC3_CONFIG_GPIO(19, 1, 1, 0), - ASIC3_CONFIG_GPIO(20, 1, 1, 0), - ASIC3_CONFIG_GPIO(21, 1, 1, 0), - ASIC3_CONFIG_GPIO(22, 1, 1, 0), - ASIC3_CONFIG_GPIO(23, 1, 1, 0), - ASIC3_CONFIG_GPIO(24, 1, 1, 0), - ASIC3_CONFIG_GPIO(25, 1, 1, 0), - ASIC3_CONFIG_GPIO(26, 1, 1, 0), - ASIC3_CONFIG_GPIO(27, 1, 1, 0), - ASIC3_CONFIG_GPIO(28, 1, 1, 0), - ASIC3_CONFIG_GPIO(29, 1, 1, 0), - ASIC3_CONFIG_GPIO(30, 1, 1, 0), - ASIC3_CONFIG_GPIO(31, 1, 1, 0), - - /* GPIOC - CF, LEDs, SD */ - ASIC3_GPIOC0_LED0, /* red */ - ASIC3_GPIOC1_LED1, /* green */ - ASIC3_GPIOC2_LED2, /* blue */ - ASIC3_GPIOC5_nCIOW, - ASIC3_GPIOC6_nCIOR, - ASIC3_GPIOC7_nPCE_1, - ASIC3_GPIOC8_nPCE_2, - ASIC3_GPIOC9_nPOE, - ASIC3_GPIOC10_nPWE, - ASIC3_GPIOC11_PSKTSEL, - ASIC3_GPIOC12_nPREG, - ASIC3_GPIOC13_nPWAIT, - ASIC3_GPIOC14_nPIOIS16, - ASIC3_GPIOC15_nPIOR, - - /* GPIOD: input GPIOs, CF */ - ASIC3_GPIOD4_CF_nCD, - ASIC3_GPIOD11_nCIOIS16, - ASIC3_GPIOD12_nCWAIT, - ASIC3_GPIOD15_nPIOW, -}; - -static struct asic3_led asic3_leds[ASIC3_NUM_LEDS] = { - [0] = { - .name = "hx4700:amber", - .default_trigger = "ds2760-battery.0-charging-blink-full-solid", - }, - [1] = { - .name = "hx4700:green", - .default_trigger = "unused", - }, - [2] = { - .name = "hx4700:blue", - .default_trigger = "hx4700-radio", - }, -}; - -static struct resource asic3_resources[] = { - /* GPIO part */ - [0] = DEFINE_RES_MEM(ASIC3_PHYS, ASIC3_MAP_SIZE_16BIT), - [1] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ)), - /* SD part */ - [2] = DEFINE_RES_MEM(ASIC3_SD_PHYS, ASIC3_MAP_SIZE_16BIT), - [3] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ)), -}; - -static struct asic3_platform_data asic3_platform_data = { - .gpio_config = asic3_gpio_config, - .gpio_config_num = ARRAY_SIZE(asic3_gpio_config), - .irq_base = IRQ_BOARD_START, - .gpio_base = HX4700_ASIC3_GPIO_BASE, - .clock_rate = 4000000, - .leds = asic3_leds, -}; - -static struct platform_device asic3 = { - .name = "asic3", - .id = -1, - .resource = asic3_resources, - .num_resources = ARRAY_SIZE(asic3_resources), - .dev = { - .platform_data = &asic3_platform_data, - }, -}; - -/* - * EGPIO - */ - -static struct resource egpio_resources[] = { - [0] = DEFINE_RES_MEM(PXA_CS5_PHYS, 0x4), -}; - -static struct htc_egpio_chip egpio_chips[] = { - [0] = { - .reg_start = 0, - .gpio_base = HX4700_EGPIO_BASE, - .num_gpios = 8, - .direction = HTC_EGPIO_OUTPUT, - }, -}; - -static struct htc_egpio_platform_data egpio_info = { - .reg_width = 16, - .bus_width = 16, - .chip = egpio_chips, - .num_chips = ARRAY_SIZE(egpio_chips), -}; - -static struct platform_device egpio = { - .name = "htc-egpio", - .id = -1, - .resource = egpio_resources, - .num_resources = ARRAY_SIZE(egpio_resources), - .dev = { - .platform_data = &egpio_info, - }, -}; - -/* - * LCD - Sony display connected to ATI Imageon w3220 - */ - -static void sony_lcd_init(void) -{ - gpio_set_value(GPIO84_HX4700_LCD_SQN, 1); - gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0); - gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0); - gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 0); - gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0); - mdelay(10); - gpio_set_value(GPIO59_HX4700_LCD_PC1, 0); - gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0); - mdelay(20); - - gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1); - mdelay(5); - gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1); - - /* FIXME: init w3220 registers here */ - - mdelay(5); - gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 1); - mdelay(10); - gpio_set_value(GPIO62_HX4700_LCD_nRESET, 1); - mdelay(10); - gpio_set_value(GPIO59_HX4700_LCD_PC1, 1); - mdelay(10); - gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 1); -} - -static void sony_lcd_off(void) -{ - gpio_set_value(GPIO59_HX4700_LCD_PC1, 0); - gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0); - mdelay(10); - gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 0); - mdelay(10); - gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0); - mdelay(10); - gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0); -} - -#ifdef CONFIG_PM -static void w3220_lcd_suspend(struct w100fb_par *wfb) -{ - sony_lcd_off(); -} - -static void w3220_lcd_resume(struct w100fb_par *wfb) -{ - sony_lcd_init(); -} -#else -#define w3220_lcd_resume NULL -#define w3220_lcd_suspend NULL -#endif - -static struct w100_tg_info w3220_tg_info = { - .suspend = w3220_lcd_suspend, - .resume = w3220_lcd_resume, -}; - -/* W3220_VGA QVGA */ -static struct w100_gen_regs w3220_regs = { - .lcd_format = 0x00000003, - .lcdd_cntl1 = 0x00000000, - .lcdd_cntl2 = 0x0003ffff, - .genlcd_cntl1 = 0x00abf003, /* 0x00fff003 */ - .genlcd_cntl2 = 0x00000003, - .genlcd_cntl3 = 0x000102aa, -}; - -static struct w100_mode w3220_modes[] = { -{ - .xres = 480, - .yres = 640, - .left_margin = 15, - .right_margin = 16, - .upper_margin = 8, - .lower_margin = 7, - .crtc_ss = 0x00000000, - .crtc_ls = 0xa1ff01f9, /* 0x21ff01f9 */ - .crtc_gs = 0xc0000000, /* 0x40000000 */ - .crtc_vpos_gs = 0x0000028f, - .crtc_ps1_active = 0x00000000, /* 0x41060010 */ - .crtc_rev = 0, - .crtc_dclk = 0x80000000, - .crtc_gclk = 0x040a0104, - .crtc_goe = 0, - .pll_freq = 95, - .pixclk_divider = 4, - .pixclk_divider_rotated = 4, - .pixclk_src = CLK_SRC_PLL, - .sysclk_divider = 0, - .sysclk_src = CLK_SRC_PLL, -}, -{ - .xres = 240, - .yres = 320, - .left_margin = 9, - .right_margin = 8, - .upper_margin = 5, - .lower_margin = 4, - .crtc_ss = 0x80150014, - .crtc_ls = 0xa0fb00f7, - .crtc_gs = 0xc0080007, - .crtc_vpos_gs = 0x00080007, - .crtc_rev = 0x0000000a, - .crtc_dclk = 0x81700030, - .crtc_gclk = 0x8015010f, - .crtc_goe = 0x00000000, - .pll_freq = 95, - .pixclk_divider = 4, - .pixclk_divider_rotated = 4, - .pixclk_src = CLK_SRC_PLL, - .sysclk_divider = 0, - .sysclk_src = CLK_SRC_PLL, -}, -}; - -struct w100_mem_info w3220_mem_info = { - .ext_cntl = 0x09640011, - .sdram_mode_reg = 0x00600021, - .ext_timing_cntl = 0x1a001545, /* 0x15001545 */ - .io_cntl = 0x7ddd7333, - .size = 0x1fffff, -}; - -struct w100_bm_mem_info w3220_bm_mem_info = { - .ext_mem_bw = 0x50413e01, - .offset = 0, - .ext_timing_ctl = 0x00043f7f, - .ext_cntl = 0x00000010, - .mode_reg = 0x00250000, - .io_cntl = 0x0fff0000, - .config = 0x08301480, -}; - -static struct w100_gpio_regs w3220_gpio_info = { - .init_data1 = 0xdfe00100, /* GPIO_DATA */ - .gpio_dir1 = 0xffff0000, /* GPIO_CNTL1 */ - .gpio_oe1 = 0x00000000, /* GPIO_CNTL2 */ - .init_data2 = 0x00000000, /* GPIO_DATA2 */ - .gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */ - .gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */ -}; - -static struct w100fb_mach_info w3220_info = { - .tg = &w3220_tg_info, - .mem = &w3220_mem_info, - .bm_mem = &w3220_bm_mem_info, - .gpio = &w3220_gpio_info, - .regs = &w3220_regs, - .modelist = w3220_modes, - .num_modes = 2, - .xtal_freq = 16000000, -}; - -static struct resource w3220_resources[] = { - [0] = DEFINE_RES_MEM(ATI_W3220_PHYS, SZ_16M), -}; - -static struct platform_device w3220 = { - .name = "w100fb", - .id = -1, - .dev = { - .platform_data = &w3220_info, - }, - .num_resources = ARRAY_SIZE(w3220_resources), - .resource = w3220_resources, -}; - -static void hx4700_lcd_set_power(struct plat_lcd_data *pd, unsigned int power) -{ - if (power) - sony_lcd_init(); - else - sony_lcd_off(); -} - -static struct plat_lcd_data hx4700_lcd_data = { - .set_power = hx4700_lcd_set_power, -}; - -static struct platform_device hx4700_lcd = { - .name = "platform-lcd", - .id = -1, - .dev = { - .platform_data = &hx4700_lcd_data, - .parent = &w3220.dev, - }, -}; - -/* - * Backlight - */ - -static struct platform_pwm_backlight_data backlight_data = { - .max_brightness = 200, - .dft_brightness = 100, -}; - -static struct platform_device backlight = { - .name = "pwm-backlight", - .id = -1, - .dev = { - .parent = &pxa27x_device_pwm1.dev, - .platform_data = &backlight_data, - }, -}; - -static struct pwm_lookup hx4700_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL, - 30923, PWM_POLARITY_NORMAL), -}; - -/* - * USB "Transceiver" - */ - -static struct gpiod_lookup_table gpio_vbus_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - /* This GPIO is on ASIC3 */ - GPIO_LOOKUP("asic3", - /* Convert to a local offset on the ASIC3 */ - GPIOD14_nUSBC_DETECT - HX4700_ASIC3_GPIO_BASE, - "vbus", GPIO_ACTIVE_LOW), - /* This one is on the primary SOC GPIO */ - GPIO_LOOKUP("gpio-pxa", GPIO76_HX4700_USBC_PUEN, - "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device gpio_vbus = { - .name = "gpio-vbus", - .id = -1, -}; - -static struct pxa2xx_udc_mach_info hx4700_udc_info; - -/* - * Touchscreen - TSC2046 connected to SSP2 - */ - -static const struct ads7846_platform_data tsc2046_info = { - .model = 7846, - .vref_delay_usecs = 100, - .pressure_max = 1024, - .debounce_max = 10, - .debounce_tol = 3, - .debounce_rep = 1, - .gpio_pendown = GPIO58_HX4700_TSC2046_nPENIRQ, -}; - -static struct pxa2xx_spi_chip tsc2046_chip = { - .tx_threshold = 1, - .rx_threshold = 2, - .timeout = 64, -}; - -static struct spi_board_info tsc2046_board_info[] __initdata = { - { - .modalias = "ads7846", - .bus_num = 2, - .max_speed_hz = 2600000, /* 100 kHz sample rate */ - .irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ), - .platform_data = &tsc2046_info, - .controller_data = &tsc2046_chip, - }, -}; - -static struct pxa2xx_spi_controller pxa_ssp2_master_info = { - .num_chipselect = 1, - .enable_dma = 1, -}; - -static struct gpiod_lookup_table pxa_ssp2_gpio_table = { - .dev_id = "spi2", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", GPIO88_HX4700_TSC2046_CS, "cs", 0, GPIO_ACTIVE_LOW), - { }, - }, -}; - -/* - * External power - */ - -static int power_supply_init(struct device *dev) -{ - return gpio_request(GPIOD9_nAC_IN, "AC charger detect"); -} - -static int hx4700_is_ac_online(void) -{ - return !gpio_get_value(GPIOD9_nAC_IN); -} - -static void power_supply_exit(struct device *dev) -{ - gpio_free(GPIOD9_nAC_IN); -} - -static char *hx4700_supplicants[] = { - "ds2760-battery.0", "backup-battery" -}; - -static struct pda_power_pdata power_supply_info = { - .init = power_supply_init, - .is_ac_online = hx4700_is_ac_online, - .exit = power_supply_exit, - .supplied_to = hx4700_supplicants, - .num_supplicants = ARRAY_SIZE(hx4700_supplicants), -}; - -static struct resource power_supply_resources[] = { - [0] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), 1, "ac", - IORESOURCE_IRQ | - IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE), - [1] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), 1, "usb", - IORESOURCE_IRQ | - IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE), -}; - -static struct platform_device power_supply = { - .name = "pda-power", - .id = -1, - .dev = { - .platform_data = &power_supply_info, - }, - .resource = power_supply_resources, - .num_resources = ARRAY_SIZE(power_supply_resources), -}; - -/* - * Battery charger - */ - -static struct regulator_consumer_supply bq24022_consumers[] = { - REGULATOR_SUPPLY("vbus_draw", NULL), - REGULATOR_SUPPLY("ac_draw", NULL), -}; - -static struct regulator_init_data bq24022_init_data = { - .constraints = { - .max_uA = 500000, - .valid_ops_mask = REGULATOR_CHANGE_CURRENT|REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers), - .consumer_supplies = bq24022_consumers, -}; - -static enum gpiod_flags bq24022_gpiod_gflags[] = { GPIOD_OUT_LOW }; - -static struct gpio_regulator_state bq24022_states[] = { - { .value = 100000, .gpios = (0 << 0) }, - { .value = 500000, .gpios = (1 << 0) }, -}; - -static struct gpio_regulator_config bq24022_info = { - .supply_name = "bq24022", - - .enabled_at_boot = 0, - - .gflags = bq24022_gpiod_gflags, - .ngpios = ARRAY_SIZE(bq24022_gpiod_gflags), - - .states = bq24022_states, - .nr_states = ARRAY_SIZE(bq24022_states), - - .type = REGULATOR_CURRENT, - .init_data = &bq24022_init_data, -}; - -static struct platform_device bq24022 = { - .name = "gpio-regulator", - .id = -1, - .dev = { - .platform_data = &bq24022_info, - }, -}; - -static struct gpiod_lookup_table bq24022_gpiod_table = { - .dev_id = "gpio-regulator", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO96_HX4700_BQ24022_ISET2, - NULL, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO72_HX4700_BQ24022_nCHARGE_EN, - "enable", GPIO_ACTIVE_LOW), - { }, - }, -}; - -/* - * StrataFlash - */ - -static void hx4700_set_vpp(struct platform_device *pdev, int vpp) -{ - gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp); -} - -static struct resource strataflash_resource[] = { - [0] = DEFINE_RES_MEM(PXA_CS0_PHYS, SZ_64M), - [1] = DEFINE_RES_MEM(PXA_CS0_PHYS + SZ_64M, SZ_64M), -}; - -static struct physmap_flash_data strataflash_data = { - .width = 4, - .set_vpp = hx4700_set_vpp, -}; - -static struct platform_device strataflash = { - .name = "physmap-flash", - .id = -1, - .resource = strataflash_resource, - .num_resources = ARRAY_SIZE(strataflash_resource), - .dev = { - .platform_data = &strataflash_data, - }, -}; - -/* - * Maxim MAX1587A on PI2C - */ - -static struct regulator_consumer_supply max1587a_consumer = - REGULATOR_SUPPLY("vcc_core", NULL); - -static struct regulator_init_data max1587a_v3_info = { - .constraints = { - .name = "vcc_core range", - .min_uV = 900000, - .max_uV = 1705000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max1587a_consumer, -}; - -static struct max1586_subdev_data max1587a_subdev = { - .name = "vcc_core", - .id = MAX1586_V3, - .platform_data = &max1587a_v3_info, -}; - -static struct max1586_platform_data max1587a_info = { - .num_subdevs = 1, - .subdevs = &max1587a_subdev, - .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */ -}; - -static struct i2c_board_info __initdata pi2c_board_info[] = { - { - I2C_BOARD_INFO("max1586", 0x14), - .platform_data = &max1587a_info, - }, -}; - -/* - * Asahi Kasei AK4641 on I2C - */ - -static struct ak4641_platform_data ak4641_info = { - .gpio_power = GPIO27_HX4700_CODEC_ON, - .gpio_npdn = GPIO109_HX4700_CODEC_nPDN, -}; - -static struct i2c_board_info i2c_board_info[] __initdata = { - { - I2C_BOARD_INFO("ak4641", 0x12), - .platform_data = &ak4641_info, - }, -}; - -static struct gpiod_lookup_table hx4700_audio_gpio_table = { - .dev_id = "hx4700-audio", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO75_HX4700_EARPHONE_nDET, - "earphone-det", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO92_HX4700_HP_DRIVER, - "hp-driver", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO107_HX4700_SPK_nSD, - "spk-sd", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct platform_device audio = { - .name = "hx4700-audio", - .id = -1, -}; - - -/* - * Platform devices - */ - -static struct platform_device *devices[] __initdata = { - &asic3, - &gpio_keys, - &navpoint, - &backlight, - &w3220, - &hx4700_lcd, - &egpio, - &bq24022, - &gpio_vbus, - &power_supply, - &strataflash, - &audio, -}; - -static struct gpio global_gpios[] = { - { GPIO12_HX4700_ASIC3_IRQ, GPIOF_IN, "ASIC3_IRQ" }, - { GPIO13_HX4700_W3220_IRQ, GPIOF_IN, "W3220_IRQ" }, - { GPIO14_HX4700_nWLAN_IRQ, GPIOF_IN, "WLAN_IRQ" }, - { GPIO59_HX4700_LCD_PC1, GPIOF_OUT_INIT_HIGH, "LCD_PC1" }, - { GPIO62_HX4700_LCD_nRESET, GPIOF_OUT_INIT_HIGH, "LCD_RESET" }, - { GPIO70_HX4700_LCD_SLIN1, GPIOF_OUT_INIT_HIGH, "LCD_SLIN1" }, - { GPIO84_HX4700_LCD_SQN, GPIOF_OUT_INIT_HIGH, "LCD_SQN" }, - { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" }, - { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" }, - { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" }, - { GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" }, - { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" }, - { GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" }, - { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" }, - { GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" }, -}; - -static void __init hx4700_init(void) -{ - int ret; - - PCFR = PCFR_GPR_EN | PCFR_OPDE; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config)); - gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1); - ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios)); - if (ret) - pr_err ("hx4700: Failed to request GPIOs.\n"); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - gpiod_add_lookup_table(&bq24022_gpiod_table); - gpiod_add_lookup_table(&gpio_vbus_gpiod_table); - gpiod_add_lookup_table(&hx4700_audio_gpio_table); - platform_add_devices(devices, ARRAY_SIZE(devices)); - pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup)); - - pxa_set_ficp_info(&ficp_info); - pxa27x_set_i2c_power_info(NULL); - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info)); - i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info)); - gpiod_add_lookup_table(&pxa_ssp2_gpio_table); - pxa2xx_set_spi_info(2, &pxa_ssp2_master_info); - spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info)); - - gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 0); - mdelay(10); - gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1); - mdelay(10); - - pxa_set_udc_info(&hx4700_udc_info); - regulator_has_full_constraints(); -} - -MACHINE_START(H4700, "HP iPAQ HX4700") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = HX4700_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_machine = hx4700_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/hx4700.h b/arch/arm/mach-pxa/hx4700.h deleted file mode 100644 index 0c30e6d9c660..000000000000 --- a/arch/arm/mach-pxa/hx4700.h +++ /dev/null @@ -1,129 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIO and IRQ definitions for HP iPAQ hx4700 - * - * Copyright (c) 2008 Philipp Zabel - */ - -#ifndef _HX4700_H_ -#define _HX4700_H_ - -#include <linux/gpio.h> -#include <linux/mfd/asic3.h> -#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ - -#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO -#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) -#define HX4700_NR_IRQS (IRQ_BOARD_START + 70) - -/* - * PXA GPIOs - */ - -#define GPIO0_HX4700_nKEY_POWER 0 -#define GPIO12_HX4700_ASIC3_IRQ 12 -#define GPIO13_HX4700_W3220_IRQ 13 -#define GPIO14_HX4700_nWLAN_IRQ 14 -#define GPIO18_HX4700_RDY 18 -#define GPIO22_HX4700_LCD_RL 22 -#define GPIO27_HX4700_CODEC_ON 27 -#define GPIO32_HX4700_RS232_ON 32 -#define GPIO52_HX4700_CPU_nBATT_FAULT 52 -#define GPIO58_HX4700_TSC2046_nPENIRQ 58 -#define GPIO59_HX4700_LCD_PC1 59 -#define GPIO60_HX4700_CF_RNB 60 -#define GPIO61_HX4700_W3220_nRESET 61 -#define GPIO62_HX4700_LCD_nRESET 62 -#define GPIO63_HX4700_CPU_SS_nRESET 63 -#define GPIO65_HX4700_TSC2046_PEN_PU 65 -#define GPIO66_HX4700_ASIC3_nSDIO_IRQ 66 -#define GPIO67_HX4700_EUART_PS 67 -#define GPIO70_HX4700_LCD_SLIN1 70 -#define GPIO71_HX4700_ASIC3_nRESET 71 -#define GPIO72_HX4700_BQ24022_nCHARGE_EN 72 -#define GPIO73_HX4700_LCD_UD_1 73 -#define GPIO75_HX4700_EARPHONE_nDET 75 -#define GPIO76_HX4700_USBC_PUEN 76 -#define GPIO81_HX4700_CPU_GP_nRESET 81 -#define GPIO82_HX4700_EUART_RESET 82 -#define GPIO83_HX4700_WLAN_nRESET 83 -#define GPIO84_HX4700_LCD_SQN 84 -#define GPIO85_HX4700_nPCE1 85 -#define GPIO88_HX4700_TSC2046_CS 88 -#define GPIO91_HX4700_FLASH_VPEN 91 -#define GPIO92_HX4700_HP_DRIVER 92 -#define GPIO93_HX4700_EUART_INT 93 -#define GPIO94_HX4700_KEY_MAIL 94 -#define GPIO95_HX4700_BATT_OFF 95 -#define GPIO96_HX4700_BQ24022_ISET2 96 -#define GPIO97_HX4700_nBL_DETECT 97 -#define GPIO99_HX4700_KEY_CONTACTS 99 -#define GPIO100_HX4700_AUTO_SENSE 100 /* BL auto brightness */ -#define GPIO102_HX4700_SYNAPTICS_POWER_ON 102 -#define GPIO103_HX4700_SYNAPTICS_INT 103 -#define GPIO105_HX4700_nIR_ON 105 -#define GPIO106_HX4700_CPU_BT_nRESET 106 -#define GPIO107_HX4700_SPK_nSD 107 -#define GPIO109_HX4700_CODEC_nPDN 109 -#define GPIO110_HX4700_LCD_LVDD_3V3_ON 110 -#define GPIO111_HX4700_LCD_AVDD_3V3_ON 111 -#define GPIO112_HX4700_LCD_N2V7_7V3_ON 112 -#define GPIO114_HX4700_CF_RESET 114 -#define GPIO116_HX4700_CPU_HW_nRESET 116 - -/* - * ASIC3 GPIOs - */ - -#define GPIOC_BASE (HX4700_ASIC3_GPIO_BASE + 32) -#define GPIOD_BASE (HX4700_ASIC3_GPIO_BASE + 48) - -#define GPIOC0_LED_RED (GPIOC_BASE + 0) -#define GPIOC1_LED_GREEN (GPIOC_BASE + 1) -#define GPIOC2_LED_BLUE (GPIOC_BASE + 2) -#define GPIOC3_nSD_CS (GPIOC_BASE + 3) -#define GPIOC4_CF_nCD (GPIOC_BASE + 4) /* Input */ -#define GPIOC5_nCIOW (GPIOC_BASE + 5) /* Output, to CF */ -#define GPIOC6_nCIOR (GPIOC_BASE + 6) /* Output, to CF */ -#define GPIOC7_nPCE1 (GPIOC_BASE + 7) /* Input, from CPU */ -#define GPIOC8_nPCE2 (GPIOC_BASE + 8) /* Input, from CPU */ -#define GPIOC9_nPOE (GPIOC_BASE + 9) /* Input, from CPU */ -#define GPIOC10_CF_nPWE (GPIOC_BASE + 10) /* Input */ -#define GPIOC11_PSKTSEL (GPIOC_BASE + 11) /* Input, from CPU */ -#define GPIOC12_nPREG (GPIOC_BASE + 12) /* Input, from CPU */ -#define GPIOC13_nPWAIT (GPIOC_BASE + 13) /* Output, to CPU */ -#define GPIOC14_nPIOIS16 (GPIOC_BASE + 14) /* Output, to CPU */ -#define GPIOC15_nPIOR (GPIOC_BASE + 15) /* Input, from CPU */ - -#define GPIOD0_CPU_SS_INT (GPIOD_BASE + 0) /* Input */ -#define GPIOD1_nKEY_CALENDAR (GPIOD_BASE + 1) -#define GPIOD2_BLUETOOTH_WAKEUP (GPIOD_BASE + 2) -#define GPIOD3_nKEY_HOME (GPIOD_BASE + 3) -#define GPIOD4_CF_nCD (GPIOD_BASE + 4) /* Input, from CF */ -#define GPIOD5_nPIO (GPIOD_BASE + 5) /* Input */ -#define GPIOD6_nKEY_RECORD (GPIOD_BASE + 6) -#define GPIOD7_nSDIO_DETECT (GPIOD_BASE + 7) -#define GPIOD8_COM_DCD (GPIOD_BASE + 8) /* Input */ -#define GPIOD9_nAC_IN (GPIOD_BASE + 9) -#define GPIOD10_nSDIO_IRQ (GPIOD_BASE + 10) /* Input */ -#define GPIOD11_nCIOIS16 (GPIOD_BASE + 11) /* Input, from CF */ -#define GPIOD12_nCWAIT (GPIOD_BASE + 12) /* Input, from CF */ -#define GPIOD13_CF_RNB (GPIOD_BASE + 13) /* Input */ -#define GPIOD14_nUSBC_DETECT (GPIOD_BASE + 14) -#define GPIOD15_nPIOW (GPIOD_BASE + 15) /* Input, from CPU */ - -/* - * EGPIOs - */ - -#define EGPIO0_VCC_3V3_EN (HX4700_EGPIO_BASE + 0) /* WLAN support chip */ -#define EGPIO1_WL_VREG_EN (HX4700_EGPIO_BASE + 1) /* WLAN power */ -#define EGPIO2_VCC_2V1_WL_EN (HX4700_EGPIO_BASE + 2) /* unused */ -#define EGPIO3_SS_PWR_ON (HX4700_EGPIO_BASE + 3) /* smart slot power */ -#define EGPIO4_CF_3V3_ON (HX4700_EGPIO_BASE + 4) /* CF 3.3V enable */ -#define EGPIO5_BT_3V3_ON (HX4700_EGPIO_BASE + 5) /* BT 3.3V enable */ -#define EGPIO6_WL1V8_EN (HX4700_EGPIO_BASE + 6) /* WLAN 1.8V enable */ -#define EGPIO7_VCC_3V3_WL_EN (HX4700_EGPIO_BASE + 7) /* WLAN 3.3V enable */ -#define EGPIO8_USB_3V3_ON (HX4700_EGPIO_BASE + 8) /* unused */ - -#endif /* _HX4700_H_ */ diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c deleted file mode 100644 index 624088257cfc..000000000000 --- a/arch/arm/mach-pxa/icontrol.c +++ /dev/null @@ -1,218 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/icontrol.c - * - * Support for the iControl and SafeTcam platforms from TMT Services - * using the Embedian MXM-8x10 Computer on Module - * - * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd. - * - * 2010-01-21 Hennie van der Merve <hvdmerwe@tmtservies.co.za> - */ - -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/property.h> -#include <linux/gpio/machine.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa320.h" -#include "mxm8x10.h" - -#include <linux/spi/spi.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/regulator/machine.h> - -#include "generic.h" - -#define ICONTROL_MCP251x_nCS1 (15) -#define ICONTROL_MCP251x_nCS2 (16) -#define ICONTROL_MCP251x_nCS3 (17) -#define ICONTROL_MCP251x_nCS4 (24) - -#define ICONTROL_MCP251x_nIRQ1 (74) -#define ICONTROL_MCP251x_nIRQ2 (75) -#define ICONTROL_MCP251x_nIRQ3 (76) -#define ICONTROL_MCP251x_nIRQ4 (77) - -static struct pxa2xx_spi_chip mcp251x_chip_info1 = { - .tx_threshold = 8, - .rx_threshold = 128, - .dma_burst_size = 8, - .timeout = 235, -}; - -static struct pxa2xx_spi_chip mcp251x_chip_info2 = { - .tx_threshold = 8, - .rx_threshold = 128, - .dma_burst_size = 8, - .timeout = 235, -}; - -static struct pxa2xx_spi_chip mcp251x_chip_info3 = { - .tx_threshold = 8, - .rx_threshold = 128, - .dma_burst_size = 8, - .timeout = 235, -}; - -static struct pxa2xx_spi_chip mcp251x_chip_info4 = { - .tx_threshold = 8, - .rx_threshold = 128, - .dma_burst_size = 8, - .timeout = 235, -}; - -static const struct property_entry mcp251x_properties[] = { - PROPERTY_ENTRY_U32("clock-frequency", 16000000), - {} -}; - -static const struct software_node mcp251x_node = { - .properties = mcp251x_properties, -}; - -static struct spi_board_info mcp251x_board_info[] = { - { - .modalias = "mcp2515", - .max_speed_hz = 6500000, - .bus_num = 3, - .chip_select = 0, - .swnode = &mcp251x_node, - .controller_data = &mcp251x_chip_info1, - .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ1) - }, - { - .modalias = "mcp2515", - .max_speed_hz = 6500000, - .bus_num = 3, - .chip_select = 1, - .swnode = &mcp251x_node, - .controller_data = &mcp251x_chip_info2, - .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ2) - }, - { - .modalias = "mcp2515", - .max_speed_hz = 6500000, - .bus_num = 4, - .chip_select = 0, - .swnode = &mcp251x_node, - .controller_data = &mcp251x_chip_info3, - .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ3) - }, - { - .modalias = "mcp2515", - .max_speed_hz = 6500000, - .bus_num = 4, - .chip_select = 1, - .swnode = &mcp251x_node, - .controller_data = &mcp251x_chip_info4, - .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4) - } -}; - -static struct pxa2xx_spi_controller pxa_ssp3_spi_master_info = { - .num_chipselect = 2, - .enable_dma = 1 -}; - -static struct pxa2xx_spi_controller pxa_ssp4_spi_master_info = { - .num_chipselect = 2, - .enable_dma = 1 -}; - -struct platform_device pxa_spi_ssp3 = { - .name = "pxa2xx-spi", - .id = 3, - .dev = { - .platform_data = &pxa_ssp3_spi_master_info, - } -}; - -struct platform_device pxa_spi_ssp4 = { - .name = "pxa2xx-spi", - .id = 4, - .dev = { - .platform_data = &pxa_ssp4_spi_master_info, - } -}; - -static struct gpiod_lookup_table pxa_ssp3_gpio_table = { - .dev_id = "spi3", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS1, "cs", 0, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS2, "cs", 1, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct gpiod_lookup_table pxa_ssp4_gpio_table = { - .dev_id = "spi4", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS3, "cs", 0, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS4, "cs", 1, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct platform_device *icontrol_spi_devices[] __initdata = { - &pxa_spi_ssp3, - &pxa_spi_ssp4, -}; - -static mfp_cfg_t mfp_can_cfg[] __initdata = { - /* CAN CS lines */ - GPIO15_GPIO, - GPIO16_GPIO, - GPIO17_GPIO, - GPIO24_GPIO, - - /* SPI (SSP3) lines */ - GPIO89_SSP3_SCLK, - GPIO91_SSP3_TXD, - GPIO92_SSP3_RXD, - - /* SPI (SSP4) lines */ - GPIO93_SSP4_SCLK, - GPIO95_SSP4_TXD, - GPIO96_SSP4_RXD, - - /* CAN nIRQ lines */ - GPIO74_GPIO | MFP_LPM_EDGE_RISE, - GPIO75_GPIO | MFP_LPM_EDGE_RISE, - GPIO76_GPIO | MFP_LPM_EDGE_RISE, - GPIO77_GPIO | MFP_LPM_EDGE_RISE -}; - -static void __init icontrol_can_init(void) -{ - pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_can_cfg)); - gpiod_add_lookup_table(&pxa_ssp3_gpio_table); - gpiod_add_lookup_table(&pxa_ssp4_gpio_table); - platform_add_devices(ARRAY_AND_SIZE(icontrol_spi_devices)); - spi_register_board_info(ARRAY_AND_SIZE(mcp251x_board_info)); -} - -static void __init icontrol_init(void) -{ - mxm_8x10_barebones_init(); - mxm_8x10_usb_host_init(); - mxm_8x10_mmc_init(); - - icontrol_can_init(); - - regulator_has_full_constraints(); -} - -MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .init_machine = icontrol_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c deleted file mode 100644 index 525d01ddfbbb..000000000000 --- a/arch/arm/mach-pxa/idp.c +++ /dev/null @@ -1,285 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/idp.c - * - * Copyright (c) 2001 Cliff Brake, Accelent Systems Inc. - * - * 2001-09-13: Cliff Brake <cbrake@accelent.com> - * Initial code - * - * 2005-02-15: Cliff Brake <cliff.brake@gmail.com> - * <http://www.vibren.com> <http://bec-systems.com> - * Updated for 2.6 kernel - */ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/leds.h> -#include <linux/platform_device.h> -#include <linux/fb.h> - -#include <asm/setup.h> -#include <asm/memory.h> -#include <asm/mach-types.h> -#include <asm/irq.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa25x.h" -#include "idp.h" -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/smc91x.h> - -#include "generic.h" -#include "devices.h" - -/* TODO: - * - add pxa2xx_audio_ops_t device structure - * - Ethernet interrupt - */ - -static unsigned long idp_pin_config[] __initdata = { - /* LCD */ - GPIOxx_LCD_DSTN_16BPP, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* STUART */ - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, - - /* MMC */ - GPIO6_MMC_CLK, - GPIO8_MMC_CS0, - - /* Ethernet */ - GPIO33_nCS_5, /* Ethernet CS */ - GPIO4_GPIO, /* Ethernet IRQ */ -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = (IDP_ETH_PHYS + 0x300), - .end = (IDP_ETH_PHYS + 0xfffff), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(4), - .end = PXA_GPIO_TO_IRQ(4), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct smc91x_platdata smc91x_platdata = { - .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | - SMC91X_USE_DMA | SMC91X_NOWAIT, - .pxa_u16_align4 = true, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev.platform_data = &smc91x_platdata, -}; - -static void idp_backlight_power(int on) -{ - if (on) { - IDP_CPLD_LCD |= (1<<1); - } else { - IDP_CPLD_LCD &= ~(1<<1); - } -} - -static void idp_vlcd(int on) -{ - if (on) { - IDP_CPLD_LCD |= (1<<2); - } else { - IDP_CPLD_LCD &= ~(1<<2); - } -} - -static void idp_lcd_power(int on, struct fb_var_screeninfo *var) -{ - if (on) { - IDP_CPLD_LCD |= (1<<0); - } else { - IDP_CPLD_LCD &= ~(1<<0); - } - - /* call idp_vlcd for now as core driver does not support - * both power and vlcd hooks. Note, this is not technically - * the correct sequence, but seems to work. Disclaimer: - * this may eventually damage the display. - */ - - idp_vlcd(on); -} - -static struct pxafb_mode_info sharp_lm8v31_mode = { - .pixclock = 270000, - .xres = 640, - .yres = 480, - .bpp = 16, - .hsync_len = 1, - .left_margin = 3, - .right_margin = 3, - .vsync_len = 1, - .upper_margin = 0, - .lower_margin = 0, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info sharp_lm8v31 = { - .modes = &sharp_lm8v31_mode, - .num_modes = 1, - .cmap_inverse = 0, - .cmap_static = 0, - .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL | - LCD_AC_BIAS_FREQ(255), - .pxafb_backlight_power = &idp_backlight_power, - .pxafb_lcd_power = &idp_lcd_power -}; - -static struct pxamci_platform_data idp_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, -}; - -static void __init idp_init(void) -{ - printk("idp_init()\n"); - - pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - platform_device_register(&smc91x_device); - //platform_device_register(&mst_audio_device); - pxa_set_fb_info(NULL, &sharp_lm8v31); - pxa_set_mci_info(&idp_mci_platform_data); -} - -static struct map_desc idp_io_desc[] __initdata = { - { - .virtual = IDP_COREVOLT_VIRT, - .pfn = __phys_to_pfn(IDP_COREVOLT_PHYS), - .length = IDP_COREVOLT_SIZE, - .type = MT_DEVICE - }, { - .virtual = IDP_CPLD_VIRT, - .pfn = __phys_to_pfn(IDP_CPLD_PHYS), - .length = IDP_CPLD_SIZE, - .type = MT_DEVICE - } -}; - -static void __init idp_map_io(void) -{ - pxa25x_map_io(); - iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); -} - -/* LEDs */ -#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS) -struct idp_led { - struct led_classdev cdev; - u8 mask; -}; - -/* - * The triggers lines up below will only be used if the - * LED triggers are compiled in. - */ -static const struct { - const char *name; - const char *trigger; -} idp_leds[] = { - { "idp:green", "heartbeat", }, - { "idp:red", "cpu0", }, -}; - -static void idp_led_set(struct led_classdev *cdev, - enum led_brightness b) -{ - struct idp_led *led = container_of(cdev, - struct idp_led, cdev); - u32 reg = IDP_CPLD_LED_CONTROL; - - if (b != LED_OFF) - reg &= ~led->mask; - else - reg |= led->mask; - - IDP_CPLD_LED_CONTROL = reg; -} - -static enum led_brightness idp_led_get(struct led_classdev *cdev) -{ - struct idp_led *led = container_of(cdev, - struct idp_led, cdev); - - return (IDP_CPLD_LED_CONTROL & led->mask) ? LED_OFF : LED_FULL; -} - -static int __init idp_leds_init(void) -{ - int i; - - if (!machine_is_pxa_idp()) - return -ENODEV; - - for (i = 0; i < ARRAY_SIZE(idp_leds); i++) { - struct idp_led *led; - - led = kzalloc(sizeof(*led), GFP_KERNEL); - if (!led) - break; - - led->cdev.name = idp_leds[i].name; - led->cdev.brightness_set = idp_led_set; - led->cdev.brightness_get = idp_led_get; - led->cdev.default_trigger = idp_leds[i].trigger; - - if (i == 0) - led->mask = IDP_HB_LED; - else - led->mask = IDP_BUSY_LED; - - if (led_classdev_register(NULL, &led->cdev) < 0) { - kfree(led); - break; - } - } - - return 0; -} - -/* - * Since we may have triggers on any subsystem, defer registration - * until after subsystem_init. - */ -fs_initcall(idp_leds_init); -#endif - -MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") - /* Maintainer: Vibren Technologies */ - .map_io = idp_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = idp_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/idp.h b/arch/arm/mach-pxa/idp.h deleted file mode 100644 index 81b9bd9ba754..000000000000 --- a/arch/arm/mach-pxa/idp.h +++ /dev/null @@ -1,195 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-pxa/include/mach/idp.h - * - * Copyright (c) 2001 Cliff Brake, Accelent Systems Inc. - * - * 2001-09-13: Cliff Brake <cbrake@accelent.com> - * Initial code - * - * 2005-02-15: Cliff Brake <cliff.brake@gmail.com> - * <http://www.vibren.com> <http://bec-systems.com> - * Changes for 2.6 kernel. - */ - - -/* - * Note: this file must be safe to include in assembly files - * - * Support for the Vibren PXA255 IDP requires rev04 or later - * IDP hardware. - */ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -#define IDP_FLASH_PHYS (PXA_CS0_PHYS) -#define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS) -#define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS) -#define IDP_IDE_PHYS (PXA_CS5_PHYS + 0x03000000) -#define IDP_ETH_PHYS (PXA_CS5_PHYS + 0x03400000) -#define IDP_COREVOLT_PHYS (PXA_CS5_PHYS + 0x03800000) -#define IDP_CPLD_PHYS (PXA_CS5_PHYS + 0x03C00000) - - -/* - * virtual memory map - */ - -#define IDP_COREVOLT_VIRT (0xf0000000) -#define IDP_COREVOLT_SIZE (1*1024*1024) - -#define IDP_CPLD_VIRT (IDP_COREVOLT_VIRT + IDP_COREVOLT_SIZE) -#define IDP_CPLD_SIZE (1*1024*1024) - -#if (IDP_CPLD_VIRT + IDP_CPLD_SIZE) > 0xfc000000 -#error Your custom IO space is getting a bit large !! -#endif - -#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_VIRT) -#define CPLD_V2P(x) ((x) - IDP_CPLD_VIRT + IDP_CPLD_PHYS) - -#ifndef __ASSEMBLY__ -# define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x))) -#else -# define __CPLD_REG(x) CPLD_P2V(x) -#endif - -/* board level registers in the CPLD: (offsets from CPLD_VIRT) */ - -#define _IDP_CPLD_REV (IDP_CPLD_PHYS + 0x00) -#define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04) -#define _IDP_CPLD_LED_CONTROL (IDP_CPLD_PHYS + 0x08) -#define _IDP_CPLD_KB_COL_HIGH (IDP_CPLD_PHYS + 0x0C) -#define _IDP_CPLD_KB_COL_LOW (IDP_CPLD_PHYS + 0x10) -#define _IDP_CPLD_PCCARD_EN (IDP_CPLD_PHYS + 0x14) -#define _IDP_CPLD_GPIOH_DIR (IDP_CPLD_PHYS + 0x18) -#define _IDP_CPLD_GPIOH_VALUE (IDP_CPLD_PHYS + 0x1C) -#define _IDP_CPLD_GPIOL_DIR (IDP_CPLD_PHYS + 0x20) -#define _IDP_CPLD_GPIOL_VALUE (IDP_CPLD_PHYS + 0x24) -#define _IDP_CPLD_PCCARD_PWR (IDP_CPLD_PHYS + 0x28) -#define _IDP_CPLD_MISC_CTRL (IDP_CPLD_PHYS + 0x2C) -#define _IDP_CPLD_LCD (IDP_CPLD_PHYS + 0x30) -#define _IDP_CPLD_FLASH_WE (IDP_CPLD_PHYS + 0x34) - -#define _IDP_CPLD_KB_ROW (IDP_CPLD_PHYS + 0x50) -#define _IDP_CPLD_PCCARD0_STATUS (IDP_CPLD_PHYS + 0x54) -#define _IDP_CPLD_PCCARD1_STATUS (IDP_CPLD_PHYS + 0x58) -#define _IDP_CPLD_MISC_STATUS (IDP_CPLD_PHYS + 0x5C) - -/* FPGA register virtual addresses */ - -#define IDP_CPLD_REV __CPLD_REG(_IDP_CPLD_REV) -#define IDP_CPLD_PERIPH_PWR __CPLD_REG(_IDP_CPLD_PERIPH_PWR) -#define IDP_CPLD_LED_CONTROL __CPLD_REG(_IDP_CPLD_LED_CONTROL) -#define IDP_CPLD_KB_COL_HIGH __CPLD_REG(_IDP_CPLD_KB_COL_HIGH) -#define IDP_CPLD_KB_COL_LOW __CPLD_REG(_IDP_CPLD_KB_COL_LOW) -#define IDP_CPLD_PCCARD_EN __CPLD_REG(_IDP_CPLD_PCCARD_EN) -#define IDP_CPLD_GPIOH_DIR __CPLD_REG(_IDP_CPLD_GPIOH_DIR) -#define IDP_CPLD_GPIOH_VALUE __CPLD_REG(_IDP_CPLD_GPIOH_VALUE) -#define IDP_CPLD_GPIOL_DIR __CPLD_REG(_IDP_CPLD_GPIOL_DIR) -#define IDP_CPLD_GPIOL_VALUE __CPLD_REG(_IDP_CPLD_GPIOL_VALUE) -#define IDP_CPLD_PCCARD_PWR __CPLD_REG(_IDP_CPLD_PCCARD_PWR) -#define IDP_CPLD_MISC_CTRL __CPLD_REG(_IDP_CPLD_MISC_CTRL) -#define IDP_CPLD_LCD __CPLD_REG(_IDP_CPLD_LCD) -#define IDP_CPLD_FLASH_WE __CPLD_REG(_IDP_CPLD_FLASH_WE) - -#define IDP_CPLD_KB_ROW __CPLD_REG(_IDP_CPLD_KB_ROW) -#define IDP_CPLD_PCCARD0_STATUS __CPLD_REG(_IDP_CPLD_PCCARD0_STATUS) -#define IDP_CPLD_PCCARD1_STATUS __CPLD_REG(_IDP_CPLD_PCCARD1_STATUS) -#define IDP_CPLD_MISC_STATUS __CPLD_REG(_IDP_CPLD_MISC_STATUS) - - -/* - * Bit masks for various registers - */ - -// IDP_CPLD_PCCARD_PWR -#define PCC0_PWR0 (1 << 0) -#define PCC0_PWR1 (1 << 1) -#define PCC0_PWR2 (1 << 2) -#define PCC0_PWR3 (1 << 3) -#define PCC1_PWR0 (1 << 4) -#define PCC1_PWR1 (1 << 5) -#define PCC1_PWR2 (1 << 6) -#define PCC1_PWR3 (1 << 7) - -// IDP_CPLD_PCCARD_EN -#define PCC0_RESET (1 << 6) -#define PCC1_RESET (1 << 7) -#define PCC0_ENABLE (1 << 0) -#define PCC1_ENABLE (1 << 1) - -// IDP_CPLD_PCCARDx_STATUS -#define _PCC_WRPROT (1 << 7) // 7-4 read as low true -#define _PCC_RESET (1 << 6) -#define _PCC_IRQ (1 << 5) -#define _PCC_INPACK (1 << 4) -#define PCC_BVD2 (1 << 3) -#define PCC_BVD1 (1 << 2) -#define PCC_VS2 (1 << 1) -#define PCC_VS1 (1 << 0) - -/* A listing of interrupts used by external hardware devices */ - -#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5) -#define IDE_IRQ PXA_GPIO_TO_IRQ(21) - -#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING - -#define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4) -#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -#define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7) -#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH - -#define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8) -#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH - -#define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19) -#define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22) - - -/* - * Macros for LED Driver - */ - -/* leds 0 = ON */ -#define IDP_HB_LED (1<<5) -#define IDP_BUSY_LED (1<<6) - -#define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED) - -/* - * macros for MTD driver - */ - -#define FLASH_WRITE_PROTECT_DISABLE() ((IDP_CPLD_FLASH_WE) &= ~(0x1)) -#define FLASH_WRITE_PROTECT_ENABLE() ((IDP_CPLD_FLASH_WE) |= (0x1)) - -/* - * macros for matrix keyboard driver - */ - -#define KEYBD_MATRIX_NUMBER_INPUTS 7 -#define KEYBD_MATRIX_NUMBER_OUTPUTS 14 - -#define KEYBD_MATRIX_INVERT_OUTPUT_LOGIC FALSE -#define KEYBD_MATRIX_INVERT_INPUT_LOGIC FALSE - -#define KEYBD_MATRIX_SETTLING_TIME_US 100 -#define KEYBD_MATRIX_KEYSTATE_DEBOUNCE_CONSTANT 2 - -#define KEYBD_MATRIX_SET_OUTPUTS(outputs) \ -{\ - IDP_CPLD_KB_COL_LOW = outputs;\ - IDP_CPLD_KB_COL_HIGH = outputs >> 7;\ -} - -#define KEYBD_MATRIX_GET_INPUTS(inputs) \ -{\ - inputs = (IDP_CPLD_KB_ROW & 0x7f);\ -} - - diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c deleted file mode 100644 index 98423a96f440..000000000000 --- a/arch/arm/mach-pxa/littleton.c +++ /dev/null @@ -1,462 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/littleton.c - * - * Support for the Marvell Littleton Development Platform. - * - * Author: Jason Chagas (largely modified code) - * Created: Nov 20, 2006 - * Copyright: (C) Copyright 2006 Marvell International Ltd. - * - * 2007-11-22 modified to align with latest kernel - * eric miao <eric.miao@marvell.com> - */ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/gpio/machine.h> -#include <linux/spi/spi.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/smc91x.h> -#include <linux/i2c.h> -#include <linux/leds.h> -#include <linux/mfd/da903x.h> -#include <linux/platform_data/max732x.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/types.h> -#include <asm/setup.h> -#include <asm/memory.h> -#include <asm/mach-types.h> -#include <asm/irq.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "pxa300.h" -#include "devices.h" -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include "littleton.h" -#include <linux/platform_data/mtd-nand-pxa3xx.h> - -#include "generic.h" - -/* Littleton MFP configurations */ -static mfp_cfg_t littleton_mfp_cfg[] __initdata = { - /* LCD */ - GPIO54_LCD_LDD_0, - GPIO55_LCD_LDD_1, - GPIO56_LCD_LDD_2, - GPIO57_LCD_LDD_3, - GPIO58_LCD_LDD_4, - GPIO59_LCD_LDD_5, - GPIO60_LCD_LDD_6, - GPIO61_LCD_LDD_7, - GPIO62_LCD_LDD_8, - GPIO63_LCD_LDD_9, - GPIO64_LCD_LDD_10, - GPIO65_LCD_LDD_11, - GPIO66_LCD_LDD_12, - GPIO67_LCD_LDD_13, - GPIO68_LCD_LDD_14, - GPIO69_LCD_LDD_15, - GPIO70_LCD_LDD_16, - GPIO71_LCD_LDD_17, - GPIO72_LCD_FCLK, - GPIO73_LCD_LCLK, - GPIO74_LCD_PCLK, - GPIO75_LCD_BIAS, - - /* SSP2 */ - GPIO25_SSP2_SCLK, - GPIO27_SSP2_TXD, - GPIO17_GPIO, /* SFRM as chip-select */ - - /* Debug Ethernet */ - GPIO90_GPIO, - - /* Keypad */ - GPIO107_KP_DKIN_0, - GPIO108_KP_DKIN_1, - GPIO115_KP_MKIN_0, - GPIO116_KP_MKIN_1, - GPIO117_KP_MKIN_2, - GPIO118_KP_MKIN_3, - GPIO119_KP_MKIN_4, - GPIO120_KP_MKIN_5, - GPIO121_KP_MKOUT_0, - GPIO122_KP_MKOUT_1, - GPIO123_KP_MKOUT_2, - GPIO124_KP_MKOUT_3, - GPIO125_KP_MKOUT_4, - - /* MMC1 */ - GPIO3_MMC1_DAT0, - GPIO4_MMC1_DAT1, - GPIO5_MMC1_DAT2, - GPIO6_MMC1_DAT3, - GPIO7_MMC1_CLK, - GPIO8_MMC1_CMD, - GPIO15_GPIO, /* card detect */ - - /* UART3 */ - GPIO107_UART3_CTS, - GPIO108_UART3_RTS, - GPIO109_UART3_TXD, - GPIO110_UART3_RXD, -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = (LITTLETON_ETH_PHYS + 0x300), - .end = (LITTLETON_ETH_PHYS + 0xfffff), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)), - .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - } -}; - -static struct smc91x_platdata littleton_smc91x_info = { - .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | - SMC91X_NOWAIT | SMC91X_USE_DMA, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &littleton_smc91x_info, - }, -}; - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { - [0] = { - /* VGA */ - .pixclock = 38250, - .xres = 480, - .yres = 640, - .bpp = 16, - .hsync_len = 8, - .left_margin = 8, - .right_margin = 24, - .vsync_len = 2, - .upper_margin = 2, - .lower_margin = 4, - .sync = 0, - }, - [1] = { - /* QVGA */ - .pixclock = 153000, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 8, - .left_margin = 8, - .right_margin = 88, - .vsync_len = 2, - .upper_margin = 2, - .lower_margin = 2, - .sync = 0, - }, -}; - -static struct pxafb_mach_info littleton_lcd_info = { - .modes = tpo_tdo24mtea1_modes, - .num_modes = 2, - .lcd_conn = LCD_COLOR_TFT_16BPP, -}; - -static void __init littleton_init_lcd(void) -{ - pxa_set_fb_info(NULL, &littleton_lcd_info); -} -#else -static inline void littleton_init_lcd(void) {}; -#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ - -#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) -static struct pxa2xx_spi_controller littleton_spi_info = { - .num_chipselect = 1, -}; - -static struct pxa2xx_spi_chip littleton_tdo24m_chip = { - .rx_threshold = 1, - .tx_threshold = 1, -}; - -static struct spi_board_info littleton_spi_devices[] __initdata = { - { - .modalias = "tdo24m", - .max_speed_hz = 1000000, - .bus_num = 2, - .chip_select = 0, - .controller_data= &littleton_tdo24m_chip, - }, -}; - -static struct gpiod_lookup_table littleton_spi_gpio_table = { - .dev_id = "spi2", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", LITTLETON_GPIO_LCD_CS, "cs", 0, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init littleton_init_spi(void) -{ - gpiod_add_lookup_table(&littleton_spi_gpio_table); - pxa2xx_set_spi_info(2, &littleton_spi_info); - spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices)); -} -#else -static inline void littleton_init_spi(void) {} -#endif - -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int littleton_matrix_key_map[] = { - /* KEY(row, col, key_code) */ - KEY(1, 3, KEY_0), KEY(0, 0, KEY_1), KEY(1, 0, KEY_2), KEY(2, 0, KEY_3), - KEY(0, 1, KEY_4), KEY(1, 1, KEY_5), KEY(2, 1, KEY_6), KEY(0, 2, KEY_7), - KEY(1, 2, KEY_8), KEY(2, 2, KEY_9), - - KEY(0, 3, KEY_KPASTERISK), /* * */ - KEY(2, 3, KEY_KPDOT), /* # */ - - KEY(5, 4, KEY_ENTER), - - KEY(5, 0, KEY_UP), - KEY(5, 1, KEY_DOWN), - KEY(5, 2, KEY_LEFT), - KEY(5, 3, KEY_RIGHT), - KEY(3, 2, KEY_HOME), - KEY(4, 1, KEY_END), - KEY(3, 3, KEY_BACK), - - KEY(4, 0, KEY_SEND), - KEY(4, 2, KEY_VOLUMEUP), - KEY(4, 3, KEY_VOLUMEDOWN), - - KEY(3, 0, KEY_F22), /* soft1 */ - KEY(3, 1, KEY_F23), /* soft2 */ -}; - -static struct matrix_keymap_data littleton_matrix_keymap_data = { - .keymap = littleton_matrix_key_map, - .keymap_size = ARRAY_SIZE(littleton_matrix_key_map), -}; - -static struct pxa27x_keypad_platform_data littleton_keypad_info = { - .matrix_key_rows = 6, - .matrix_key_cols = 5, - .matrix_keymap_data = &littleton_matrix_keymap_data, - - .enable_rotary0 = 1, - .rotary0_up_key = KEY_UP, - .rotary0_down_key = KEY_DOWN, - - .debounce_interval = 30, -}; -static void __init littleton_init_keypad(void) -{ - pxa_set_keypad_info(&littleton_keypad_info); -} -#else -static inline void littleton_init_keypad(void) {} -#endif - -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -static struct pxamci_platform_data littleton_mci_platform_data = { - .detect_delay_ms = 200, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table littleton_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - /* Card detect on MFP (gpio-pxa) GPIO 15 */ - GPIO_LOOKUP("gpio-pxa", MFP_PIN_GPIO15, - "cd", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init littleton_init_mmc(void) -{ - gpiod_add_lookup_table(&littleton_mci_gpio_table); - pxa_set_mci_info(&littleton_mci_platform_data); -} -#else -static inline void littleton_init_mmc(void) {} -#endif - -#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL) -static struct mtd_partition littleton_nand_partitions[] = { - [0] = { - .name = "Bootloader", - .offset = 0, - .size = 0x060000, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - [1] = { - .name = "Kernel", - .offset = 0x060000, - .size = 0x200000, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - [2] = { - .name = "Filesystem", - .offset = 0x0260000, - .size = 0x3000000, /* 48M - rootfs */ - }, - [3] = { - .name = "MassStorage", - .offset = 0x3260000, - .size = 0x3d40000, - }, - [4] = { - .name = "BBT", - .offset = 0x6FA0000, - .size = 0x80000, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* NOTE: we reserve some blocks at the end of the NAND flash for - * bad block management, and the max number of relocation blocks - * differs on different platforms. Please take care with it when - * defining the partition table. - */ -}; - -static struct pxa3xx_nand_platform_data littleton_nand_info = { - .parts = littleton_nand_partitions, - .nr_parts = ARRAY_SIZE(littleton_nand_partitions), -}; - -static void __init littleton_init_nand(void) -{ - pxa3xx_set_nand_info(&littleton_nand_info); -} -#else -static inline void littleton_init_nand(void) {} -#endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */ - -#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) -static struct led_info littleton_da9034_leds[] = { - [0] = { - .name = "littleton:keypad1", - .flags = DA9034_LED_RAMP, - }, - [1] = { - .name = "littleton:keypad2", - .flags = DA9034_LED_RAMP, - }, - [2] = { - .name = "littleton:vibra", - .flags = 0, - }, -}; - -static struct da9034_touch_pdata littleton_da9034_touch = { - .x_inverted = 1, - .interval_ms = 20, -}; - -static struct da903x_subdev_info littleton_da9034_subdevs[] = { - { - .name = "da903x-led", - .id = DA9034_ID_LED_1, - .platform_data = &littleton_da9034_leds[0], - }, { - .name = "da903x-led", - .id = DA9034_ID_LED_2, - .platform_data = &littleton_da9034_leds[1], - }, { - .name = "da903x-led", - .id = DA9034_ID_VIBRA, - .platform_data = &littleton_da9034_leds[2], - }, { - .name = "da903x-backlight", - .id = DA9034_ID_WLED, - }, { - .name = "da9034-touch", - .id = DA9034_ID_TOUCH, - .platform_data = &littleton_da9034_touch, - }, -}; - -static struct da903x_platform_data littleton_da9034_info = { - .num_subdevs = ARRAY_SIZE(littleton_da9034_subdevs), - .subdevs = littleton_da9034_subdevs, -}; - -static struct max732x_platform_data littleton_max7320_info = { - .gpio_base = EXT0_GPIO_BASE, -}; - -static struct i2c_board_info littleton_i2c_info[] = { - [0] = { - .type = "da9034", - .addr = 0x34, - .platform_data = &littleton_da9034_info, - .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)), - }, - [1] = { - .type = "max7320", - .addr = 0x50, - .platform_data = &littleton_max7320_info, - }, -}; - -static void __init littleton_init_i2c(void) -{ - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(littleton_i2c_info)); -} -#else -static inline void littleton_init_i2c(void) {} -#endif /* CONFIG_I2C_PXA || CONFIG_I2C_PXA_MODULE */ - -static void __init littleton_init(void) -{ - /* initialize MFP configurations */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - /* - * Note: we depend bootloader set the correct - * value to MSC register for SMC91x. - */ - platform_device_register(&smc91x_device); - - littleton_init_spi(); - littleton_init_i2c(); - littleton_init_mmc(); - littleton_init_lcd(); - littleton_init_keypad(); - littleton_init_nand(); -} - -MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)") - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = LITTLETON_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .init_machine = littleton_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/littleton.h b/arch/arm/mach-pxa/littleton.h deleted file mode 100644 index a0a8d2bf9d71..000000000000 --- a/arch/arm/mach-pxa/littleton.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_ARCH_LITTLETON_H -#define __ASM_ARCH_LITTLETON_H - -#define LITTLETON_ETH_PHYS 0x30000000 - -#define LITTLETON_GPIO_LCD_CS (17) - -#define EXT0_GPIO_BASE (PXA_NR_BUILTIN_GPIO) -#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) - -#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8) - -#endif /* __ASM_ARCH_LITTLETON_H */ diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c deleted file mode 100644 index 0e4123c5fd42..000000000000 --- a/arch/arm/mach-pxa/lpd270.c +++ /dev/null @@ -1,518 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/lpd270.c - * - * Support for the LogicPD PXA270 Card Engine. - * Derived from the mainstone code, which carries these notices: - * - * Author: Nicolas Pitre - * Created: Nov 05, 2002 - * Copyright: MontaVista Software Inc. - */ -#include <linux/gpio.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/syscore_ops.h> -#include <linux/interrupt.h> -#include <linux/sched.h> -#include <linux/bitops.h> -#include <linux/fb.h> -#include <linux/ioport.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/smc91x.h> - -#include <asm/types.h> -#include <asm/setup.h> -#include <asm/memory.h> -#include <asm/mach-types.h> -#include <asm/irq.h> -#include <linux/sizes.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/mach/flash.h> - -#include "pxa27x.h" -#include "lpd270.h" -#include "addr-map.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include "smemc.h" - -#include "generic.h" -#include "devices.h" - -static unsigned long lpd270_pin_config[] __initdata = { - /* Chip Selects */ - GPIO15_nCS_1, /* Mainboard Flash */ - GPIO78_nCS_2, /* CPLD + Ethernet */ - - /* LCD - 16bpp Active TFT */ - GPIO58_LCD_LDD_0, - GPIO59_LCD_LDD_1, - GPIO60_LCD_LDD_2, - GPIO61_LCD_LDD_3, - GPIO62_LCD_LDD_4, - GPIO63_LCD_LDD_5, - GPIO64_LCD_LDD_6, - GPIO65_LCD_LDD_7, - GPIO66_LCD_LDD_8, - GPIO67_LCD_LDD_9, - GPIO68_LCD_LDD_10, - GPIO69_LCD_LDD_11, - GPIO70_LCD_LDD_12, - GPIO71_LCD_LDD_13, - GPIO72_LCD_LDD_14, - GPIO73_LCD_LDD_15, - GPIO74_LCD_FCLK, - GPIO75_LCD_LCLK, - GPIO76_LCD_PCLK, - GPIO77_LCD_BIAS, - GPIO16_PWM0_OUT, /* Backlight */ - - /* USB Host */ - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO45_AC97_SYSCLK, - - GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, -}; - -static unsigned int lpd270_irq_enabled; - -static void lpd270_mask_irq(struct irq_data *d) -{ - int lpd270_irq = d->irq - LPD270_IRQ(0); - - __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS); - - lpd270_irq_enabled &= ~(1 << lpd270_irq); - __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); -} - -static void lpd270_unmask_irq(struct irq_data *d) -{ - int lpd270_irq = d->irq - LPD270_IRQ(0); - - lpd270_irq_enabled |= 1 << lpd270_irq; - __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); -} - -static struct irq_chip lpd270_irq_chip = { - .name = "CPLD", - .irq_ack = lpd270_mask_irq, - .irq_mask = lpd270_mask_irq, - .irq_unmask = lpd270_unmask_irq, -}; - -static void lpd270_irq_handler(struct irq_desc *desc) -{ - unsigned int irq; - unsigned long pending; - - pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; - do { - /* clear useless edge notification */ - desc->irq_data.chip->irq_ack(&desc->irq_data); - if (likely(pending)) { - irq = LPD270_IRQ(0) + __ffs(pending); - generic_handle_irq(irq); - - pending = __raw_readw(LPD270_INT_STATUS) & - lpd270_irq_enabled; - } - } while (pending); -} - -static void __init lpd270_init_irq(void) -{ - int irq; - - pxa27x_init_irq(); - - __raw_writew(0, LPD270_INT_MASK); - __raw_writew(0, LPD270_INT_STATUS); - - /* setup extra LogicPD PXA270 irqs */ - for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { - irq_set_chip_and_handler(irq, &lpd270_irq_chip, - handle_level_irq); - irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); - } - irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler); - irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING); -} - - -#ifdef CONFIG_PM -static void lpd270_irq_resume(void) -{ - __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); -} - -static struct syscore_ops lpd270_irq_syscore_ops = { - .resume = lpd270_irq_resume, -}; - -static int __init lpd270_irq_device_init(void) -{ - if (machine_is_logicpd_pxa270()) { - register_syscore_ops(&lpd270_irq_syscore_ops); - return 0; - } - return -ENODEV; -} - -device_initcall(lpd270_irq_device_init); -#endif - - -static struct resource smc91x_resources[] = { - [0] = { - .start = LPD270_ETH_PHYS, - .end = (LPD270_ETH_PHYS + 0xfffff), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = LPD270_ETHERNET_IRQ, - .end = LPD270_ETHERNET_IRQ, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -struct smc91x_platdata smc91x_platdata = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev.platform_data = &smc91x_platdata, -}; - -static struct resource lpd270_flash_resources[] = { - [0] = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_CS1_PHYS, - .end = PXA_CS1_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct mtd_partition lpd270_flash0_partitions[] = { - { - .name = "Bootloader", - .size = 0x00040000, - .offset = 0, - .mask_flags = MTD_WRITEABLE /* force read-only */ - }, { - .name = "Kernel", - .size = 0x00400000, - .offset = 0x00040000, - }, { - .name = "Filesystem", - .size = MTDPART_SIZ_FULL, - .offset = 0x00440000 - }, -}; - -static struct flash_platform_data lpd270_flash_data[2] = { - { - .name = "processor-flash", - .map_name = "cfi_probe", - .parts = lpd270_flash0_partitions, - .nr_parts = ARRAY_SIZE(lpd270_flash0_partitions), - }, { - .name = "mainboard-flash", - .map_name = "cfi_probe", - .parts = NULL, - .nr_parts = 0, - } -}; - -static struct platform_device lpd270_flash_device[2] = { - { - .name = "pxa2xx-flash", - .id = 0, - .dev = { - .platform_data = &lpd270_flash_data[0], - }, - .resource = &lpd270_flash_resources[0], - .num_resources = 1, - }, { - .name = "pxa2xx-flash", - .id = 1, - .dev = { - .platform_data = &lpd270_flash_data[1], - }, - .resource = &lpd270_flash_resources[1], - .num_resources = 1, - }, -}; - -static struct pwm_lookup lpd270_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data lpd270_backlight_data = { - .max_brightness = 1, - .dft_brightness = 1, -}; - -static struct platform_device lpd270_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa27x_device_pwm0.dev, - .platform_data = &lpd270_backlight_data, - }, -}; - -/* 5.7" TFT QVGA (LoLo display number 1) */ -static struct pxafb_mode_info sharp_lq057q3dc02_mode = { - .pixclock = 150000, - .xres = 320, - .yres = 240, - .bpp = 16, - .hsync_len = 0x14, - .left_margin = 0x28, - .right_margin = 0x0a, - .vsync_len = 0x02, - .upper_margin = 0x08, - .lower_margin = 0x14, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info sharp_lq057q3dc02 = { - .modes = &sharp_lq057q3dc02_mode, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | - LCD_ALTERNATE_MAPPING, -}; - -/* 12.1" TFT SVGA (LoLo display number 2) */ -static struct pxafb_mode_info sharp_lq121s1dg31_mode = { - .pixclock = 50000, - .xres = 800, - .yres = 600, - .bpp = 16, - .hsync_len = 0x05, - .left_margin = 0x52, - .right_margin = 0x05, - .vsync_len = 0x04, - .upper_margin = 0x14, - .lower_margin = 0x0a, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info sharp_lq121s1dg31 = { - .modes = &sharp_lq121s1dg31_mode, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | - LCD_ALTERNATE_MAPPING, -}; - -/* 3.6" TFT QVGA (LoLo display number 3) */ -static struct pxafb_mode_info sharp_lq036q1da01_mode = { - .pixclock = 150000, - .xres = 320, - .yres = 240, - .bpp = 16, - .hsync_len = 0x0e, - .left_margin = 0x04, - .right_margin = 0x0a, - .vsync_len = 0x03, - .upper_margin = 0x03, - .lower_margin = 0x03, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info sharp_lq036q1da01 = { - .modes = &sharp_lq036q1da01_mode, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | - LCD_ALTERNATE_MAPPING, -}; - -/* 6.4" TFT VGA (LoLo display number 5) */ -static struct pxafb_mode_info sharp_lq64d343_mode = { - .pixclock = 25000, - .xres = 640, - .yres = 480, - .bpp = 16, - .hsync_len = 0x31, - .left_margin = 0x89, - .right_margin = 0x19, - .vsync_len = 0x12, - .upper_margin = 0x22, - .lower_margin = 0x00, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info sharp_lq64d343 = { - .modes = &sharp_lq64d343_mode, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | - LCD_ALTERNATE_MAPPING, -}; - -/* 10.4" TFT VGA (LoLo display number 7) */ -static struct pxafb_mode_info sharp_lq10d368_mode = { - .pixclock = 25000, - .xres = 640, - .yres = 480, - .bpp = 16, - .hsync_len = 0x31, - .left_margin = 0x89, - .right_margin = 0x19, - .vsync_len = 0x12, - .upper_margin = 0x22, - .lower_margin = 0x00, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info sharp_lq10d368 = { - .modes = &sharp_lq10d368_mode, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | - LCD_ALTERNATE_MAPPING, -}; - -/* 3.5" TFT QVGA (LoLo display number 8) */ -static struct pxafb_mode_info sharp_lq035q7db02_20_mode = { - .pixclock = 150000, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 0x0e, - .left_margin = 0x0a, - .right_margin = 0x0a, - .vsync_len = 0x03, - .upper_margin = 0x05, - .lower_margin = 0x14, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info sharp_lq035q7db02_20 = { - .modes = &sharp_lq035q7db02_20_mode, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | - LCD_ALTERNATE_MAPPING, -}; - -static struct pxafb_mach_info *lpd270_lcd_to_use; - -static int __init lpd270_set_lcd(char *str) -{ - if (!strncasecmp(str, "lq057q3dc02", 11)) { - lpd270_lcd_to_use = &sharp_lq057q3dc02; - } else if (!strncasecmp(str, "lq121s1dg31", 11)) { - lpd270_lcd_to_use = &sharp_lq121s1dg31; - } else if (!strncasecmp(str, "lq036q1da01", 11)) { - lpd270_lcd_to_use = &sharp_lq036q1da01; - } else if (!strncasecmp(str, "lq64d343", 8)) { - lpd270_lcd_to_use = &sharp_lq64d343; - } else if (!strncasecmp(str, "lq10d368", 8)) { - lpd270_lcd_to_use = &sharp_lq10d368; - } else if (!strncasecmp(str, "lq035q7db02-20", 14)) { - lpd270_lcd_to_use = &sharp_lq035q7db02_20; - } else { - printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str); - } - - return 1; -} - -__setup("lcd=", lpd270_set_lcd); - -static struct platform_device *platform_devices[] __initdata = { - &smc91x_device, - &lpd270_backlight_device, - &lpd270_flash_device[0], - &lpd270_flash_device[1], -}; - -static struct pxaohci_platform_data lpd270_ohci_platform_data = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, -}; - -static void __init lpd270_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4; - lpd270_flash_data[1].width = 4; - - /* - * System bus arbiter setting: - * - Core_Park - * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 - */ - ARB_CNTRL = ARB_CORE_PARK | 0x234; - - pwm_add_table(lpd270_pwm_lookup, ARRAY_SIZE(lpd270_pwm_lookup)); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - - pxa_set_ac97_info(NULL); - - if (lpd270_lcd_to_use != NULL) - pxa_set_fb_info(NULL, lpd270_lcd_to_use); - - pxa_set_ohci_info(&lpd270_ohci_platform_data); -} - - -static struct map_desc lpd270_io_desc[] __initdata = { - { - .virtual = (unsigned long)LPD270_CPLD_VIRT, - .pfn = __phys_to_pfn(LPD270_CPLD_PHYS), - .length = LPD270_CPLD_SIZE, - .type = MT_DEVICE, - }, -}; - -static void __init lpd270_map_io(void) -{ - pxa27x_map_io(); - iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); - - /* for use I SRAM as framebuffer. */ - PSLR |= 0x00000F04; - PCFR = 0x00000066; -} - -MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") - /* Maintainer: Peter Barada */ - .atag_offset = 0x100, - .map_io = lpd270_map_io, - .nr_irqs = LPD270_NR_IRQS, - .init_irq = lpd270_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = lpd270_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/lpd270.h b/arch/arm/mach-pxa/lpd270.h deleted file mode 100644 index 4b096fb9d61f..000000000000 --- a/arch/arm/mach-pxa/lpd270.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-pxa/include/mach/lpd270.h - * - * Author: Lennert Buytenhek - * Created: Feb 10, 2006 - */ - -#ifndef __ASM_ARCH_LPD270_H -#define __ASM_ARCH_LPD270_H - -#define LPD270_CPLD_PHYS PXA_CS2_PHYS -#define LPD270_CPLD_VIRT IOMEM(0xf0000000) -#define LPD270_CPLD_SIZE 0x00100000 - -#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000) - -/* CPLD registers */ -#define LPD270_CPLD_REG(x) (LPD270_CPLD_VIRT + (x)) -#define LPD270_CONTROL LPD270_CPLD_REG(0x00) -#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04) -#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08) -#define LPD270_CPLD_REVISION LPD270_CPLD_REG(0x14) -#define LPD270_EEPROM_SPI_ITF LPD270_CPLD_REG(0x20) -#define LPD270_MODE_PINS LPD270_CPLD_REG(0x24) -#define LPD270_EGPIO LPD270_CPLD_REG(0x30) -#define LPD270_INT_MASK LPD270_CPLD_REG(0x40) -#define LPD270_INT_STATUS LPD270_CPLD_REG(0x50) - -#define LPD270_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */ -#define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ -#define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */ - -#define LPD270_IRQ(x) (IRQ_BOARD_START + (x)) -#define LPD270_USBC_IRQ LPD270_IRQ(2) -#define LPD270_ETHERNET_IRQ LPD270_IRQ(3) -#define LPD270_AC97_IRQ LPD270_IRQ(4) -#define LPD270_NR_IRQS (IRQ_BOARD_START + 5) - -#endif diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c deleted file mode 100644 index 4f0944f3b262..000000000000 --- a/arch/arm/mach-pxa/lubbock.c +++ /dev/null @@ -1,649 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/lubbock.c - * - * Support for the Intel DBPXA250 Development Platform. - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - */ -#include <linux/clkdev.h> -#include <linux/gpio.h> -#include <linux/gpio/gpio-reg.h> -#include <linux/gpio/machine.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/platform_device.h> -#include <linux/syscore_ops.h> -#include <linux/major.h> -#include <linux/fb.h> -#include <linux/interrupt.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/smc91x.h> -#include <linux/slab.h> -#include <linux/leds.h> - -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> -#include <linux/spi/pxa2xx_spi.h> - -#include <asm/setup.h> -#include <asm/memory.h> -#include <asm/mach-types.h> -#include <asm/irq.h> -#include <linux/sizes.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/mach/flash.h> - -#include <asm/hardware/sa1111.h> - -#include "pxa25x.h" -#include <linux/platform_data/asoc-pxa.h> -#include "lubbock.h" -#include "udc.h" -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include "pm.h" -#include "smemc.h" - -#include "generic.h" -#include "devices.h" - -static unsigned long lubbock_pin_config[] __initdata = { - GPIO15_nCS_1, /* CS1 - Flash */ - GPIO78_nCS_2, /* CS2 - Baseboard FGPA */ - GPIO79_nCS_3, /* CS3 - SMC ethernet */ - GPIO80_nCS_4, /* CS4 - SA1111 */ - - /* SSP data pins */ - GPIO23_SSP1_SCLK, - GPIO25_SSP1_TXD, - GPIO26_SSP1_RXD, - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* LCD - 16bpp DSTN */ - GPIOxx_LCD_DSTN_16BPP, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* PC Card */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* MMC */ - GPIO6_MMC_CLK, - GPIO8_MMC_CS0, - - /* SA1111 chip */ - GPIO11_3_6MHz, - - /* wakeup */ - GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, -}; - -#define LUB_HEXLED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x010) - -void lubbock_set_hexled(uint32_t value) -{ - LUB_HEXLED = value; -} - -static struct gpio_chip *lubbock_misc_wr_gc; - -static void lubbock_set_misc_wr(unsigned int mask, unsigned int set) -{ - unsigned long m = mask, v = set; - lubbock_misc_wr_gc->set_multiple(lubbock_misc_wr_gc, &m, &v); -} - -static int lubbock_udc_is_connected(void) -{ - return (LUB_MISC_RD & (1 << 9)) == 0; -} - -static struct pxa2xx_udc_mach_info udc_info __initdata = { - .udc_is_connected = lubbock_udc_is_connected, - // no D+ pullup; lubbock can't connect/disconnect in software -}; - -static struct resource lubbock_udc_resources[] = { - DEFINE_RES_MEM(0x40600000, 0x10000), - DEFINE_RES_IRQ(IRQ_USB), - DEFINE_RES_IRQ(LUBBOCK_USB_IRQ), - DEFINE_RES_IRQ(LUBBOCK_USB_DISC_IRQ), -}; - -/* GPIOs for SA1111 PCMCIA */ -static struct gpiod_lookup_table sa1111_pcmcia_gpio_table = { - .dev_id = "1800", - .table = { - { "sa1111", 0, "a0vpp", GPIO_ACTIVE_HIGH }, - { "sa1111", 1, "a1vpp", GPIO_ACTIVE_HIGH }, - { "sa1111", 2, "a0vcc", GPIO_ACTIVE_HIGH }, - { "sa1111", 3, "a1vcc", GPIO_ACTIVE_HIGH }, - { "lubbock", 14, "b0vcc", GPIO_ACTIVE_HIGH }, - { "lubbock", 15, "b1vcc", GPIO_ACTIVE_HIGH }, - { }, - }, -}; - -static void lubbock_init_pcmcia(void) -{ - struct clk *clk; - - gpiod_add_lookup_table(&sa1111_pcmcia_gpio_table); - - /* Add an alias for the SA1111 PCMCIA clock */ - clk = clk_get_sys("pxa2xx-pcmcia", NULL); - if (!IS_ERR(clk)) { - clkdev_create(clk, NULL, "1800"); - clk_put(clk); - } -} - -static struct resource sa1111_resources[] = { - [0] = { - .start = 0x10000000, - .end = 0x10001fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = LUBBOCK_SA1111_IRQ, - .end = LUBBOCK_SA1111_IRQ, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct sa1111_platform_data sa1111_info = { - .irq_base = LUBBOCK_SA1111_IRQ_BASE, - .disable_devs = SA1111_DEVID_SAC, -}; - -static struct platform_device sa1111_device = { - .name = "sa1111", - .id = -1, - .num_resources = ARRAY_SIZE(sa1111_resources), - .resource = sa1111_resources, - .dev = { - .platform_data = &sa1111_info, - }, -}; - -/* ADS7846 is connected through SSP ... and if your board has J5 populated, - * you can select it to replace the ucb1400 by switching the touchscreen cable - * (to J5) and poking board registers (as done below). Else it's only useful - * for the temperature sensors. - */ -static struct pxa2xx_spi_controller pxa_ssp_master_info = { - .num_chipselect = 1, -}; - -static int lubbock_ads7846_pendown_state(void) -{ - /* TS_BUSY is bit 8 in LUB_MISC_RD, but pendown is irq-only */ - return 0; -} - -static struct ads7846_platform_data ads_info = { - .model = 7846, - .vref_delay_usecs = 100, /* internal, no cap */ - .get_pendown_state = lubbock_ads7846_pendown_state, - // .x_plate_ohms = 500, /* GUESS! */ - // .y_plate_ohms = 500, /* GUESS! */ -}; - -static struct gpiod_lookup_table ads7846_cs_gpios = { - .dev_id = "ads7846", - .table = { - GPIO_LOOKUP("lubbock", 11, "cs", GPIO_ACTIVE_LOW), - {} - }, -}; - -static struct pxa2xx_spi_chip ads_hw = { - .tx_threshold = 1, - .rx_threshold = 2, -}; - -static struct spi_board_info spi_board_info[] __initdata = { { - .modalias = "ads7846", - .platform_data = &ads_info, - .controller_data = &ads_hw, - .irq = LUBBOCK_BB_IRQ, - .max_speed_hz = 120000 /* max sample rate at 3V */ - * 26 /* command + data + overhead */, - .bus_num = 1, - .chip_select = 0, -}, -}; - -static struct resource smc91x_resources[] = { - [0] = { - .name = "smc91x-regs", - .start = 0x0c000c00, - .end = 0x0c0fffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = LUBBOCK_ETH_IRQ, - .end = LUBBOCK_ETH_IRQ, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, - [2] = { - .name = "smc91x-attrib", - .start = 0x0e000000, - .end = 0x0e0fffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct smc91x_platdata lubbock_smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_IO_SHIFT_2, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = -1, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &lubbock_smc91x_info, - }, -}; - -static struct resource flash_resources[] = { - [0] = { - .start = 0x00000000, - .end = SZ_64M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 0x04000000, - .end = 0x04000000 + SZ_64M - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct mtd_partition lubbock_partitions[] = { - { - .name = "Bootloader", - .size = 0x00040000, - .offset = 0, - .mask_flags = MTD_WRITEABLE /* force read-only */ - },{ - .name = "Kernel", - .size = 0x00100000, - .offset = 0x00040000, - },{ - .name = "Filesystem", - .size = MTDPART_SIZ_FULL, - .offset = 0x00140000 - } -}; - -static struct flash_platform_data lubbock_flash_data[2] = { - { - .map_name = "cfi_probe", - .parts = lubbock_partitions, - .nr_parts = ARRAY_SIZE(lubbock_partitions), - }, { - .map_name = "cfi_probe", - .parts = NULL, - .nr_parts = 0, - } -}; - -static struct platform_device lubbock_flash_device[2] = { - { - .name = "pxa2xx-flash", - .id = 0, - .dev = { - .platform_data = &lubbock_flash_data[0], - }, - .resource = &flash_resources[0], - .num_resources = 1, - }, - { - .name = "pxa2xx-flash", - .id = 1, - .dev = { - .platform_data = &lubbock_flash_data[1], - }, - .resource = &flash_resources[1], - .num_resources = 1, - }, -}; - -static struct resource lubbock_cplds_resources[] = { - [0] = { - .start = LUBBOCK_FPGA_PHYS + 0xc0, - .end = LUBBOCK_FPGA_PHYS + 0xe0 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(0), - .end = PXA_GPIO_TO_IRQ(0), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - }, - [2] = { - .start = LUBBOCK_IRQ(0), - .end = LUBBOCK_IRQ(6), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device lubbock_cplds_device = { - .name = "pxa_cplds_irqs", - .id = -1, - .resource = &lubbock_cplds_resources[0], - .num_resources = 3, -}; - - -static struct platform_device *devices[] __initdata = { - &sa1111_device, - &smc91x_device, - &lubbock_flash_device[0], - &lubbock_flash_device[1], - &lubbock_cplds_device, -}; - -static struct pxafb_mode_info sharp_lm8v31_mode = { - .pixclock = 270000, - .xres = 640, - .yres = 480, - .bpp = 16, - .hsync_len = 1, - .left_margin = 3, - .right_margin = 3, - .vsync_len = 1, - .upper_margin = 0, - .lower_margin = 0, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info sharp_lm8v31 = { - .modes = &sharp_lm8v31_mode, - .num_modes = 1, - .cmap_inverse = 0, - .cmap_static = 0, - .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL | - LCD_AC_BIAS_FREQ(255), -}; - -#define MMC_POLL_RATE msecs_to_jiffies(1000) - -static irq_handler_t mmc_detect_int; -static void *mmc_detect_int_data; -static struct timer_list mmc_timer; - -static void lubbock_mmc_poll(struct timer_list *unused) -{ - unsigned long flags; - - /* clear any previous irq state, then ... */ - local_irq_save(flags); - LUB_IRQ_SET_CLR &= ~(1 << 0); - local_irq_restore(flags); - - /* poll until mmc/sd card is removed */ - if (LUB_IRQ_SET_CLR & (1 << 0)) - mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE); - else { - (void) mmc_detect_int(LUBBOCK_SD_IRQ, mmc_detect_int_data); - enable_irq(LUBBOCK_SD_IRQ); - } -} - -static irqreturn_t lubbock_detect_int(int irq, void *data) -{ - /* IRQ is level triggered; disable, and poll for removal */ - disable_irq(irq); - mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE); - - return mmc_detect_int(irq, data); -} - -static int lubbock_mci_init(struct device *dev, - irq_handler_t detect_int, - void *data) -{ - /* detect card insert/eject */ - mmc_detect_int = detect_int; - mmc_detect_int_data = data; - timer_setup(&mmc_timer, lubbock_mmc_poll, 0); - return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int, - 0, "lubbock-sd-detect", data); -} - -static int lubbock_mci_get_ro(struct device *dev) -{ - return (LUB_MISC_RD & (1 << 2)) != 0; -} - -static void lubbock_mci_exit(struct device *dev, void *data) -{ - free_irq(LUBBOCK_SD_IRQ, data); - del_timer_sync(&mmc_timer); -} - -static struct pxamci_platform_data lubbock_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .detect_delay_ms = 10, - .init = lubbock_mci_init, - .get_ro = lubbock_mci_get_ro, - .exit = lubbock_mci_exit, -}; - -static void lubbock_irda_transceiver_mode(struct device *dev, int mode) -{ - unsigned long flags; - - local_irq_save(flags); - if (mode & IR_SIRMODE) { - lubbock_set_misc_wr(BIT(4), 0); - } else if (mode & IR_FIRMODE) { - lubbock_set_misc_wr(BIT(4), BIT(4)); - } - pxa2xx_transceiver_mode(dev, mode); - local_irq_restore(flags); -} - -static struct pxaficp_platform_data lubbock_ficp_platform_data = { - .gpio_pwdown = -1, - .transceiver_cap = IR_SIRMODE | IR_FIRMODE, - .transceiver_mode = lubbock_irda_transceiver_mode, -}; - -static void __init lubbock_init(void) -{ - int flashboot = (LUB_CONF_SWITCHES & 1); - - pxa2xx_mfp_config(ARRAY_AND_SIZE(lubbock_pin_config)); - - lubbock_misc_wr_gc = gpio_reg_init(NULL, (void *)&LUB_MISC_WR, - -1, 16, "lubbock", 0, LUB_MISC_WR, - NULL, NULL, NULL); - if (IS_ERR(lubbock_misc_wr_gc)) { - pr_err("Lubbock: unable to register lubbock GPIOs: %ld\n", - PTR_ERR(lubbock_misc_wr_gc)); - lubbock_misc_wr_gc = NULL; - } - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - lubbock_init_pcmcia(); - - clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL); - /* lubbock has two extra IRQs */ - pxa25x_device_udc.resource = lubbock_udc_resources; - pxa25x_device_udc.num_resources = ARRAY_SIZE(lubbock_udc_resources); - pxa_set_udc_info(&udc_info); - pxa_set_fb_info(NULL, &sharp_lm8v31); - pxa_set_mci_info(&lubbock_mci_platform_data); - pxa_set_ficp_info(&lubbock_ficp_platform_data); - pxa_set_ac97_info(NULL); - - lubbock_flash_data[0].width = lubbock_flash_data[1].width = - (__raw_readl(BOOT_DEF) & 1) ? 2 : 4; - /* Compensate for the nROMBT switch which swaps the flash banks */ - printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n", - flashboot?"Flash":"ROM", flashboot); - - lubbock_flash_data[flashboot^1].name = "application-flash"; - lubbock_flash_data[flashboot].name = "boot-rom"; - (void) platform_add_devices(devices, ARRAY_SIZE(devices)); - - gpiod_add_lookup_table(&ads7846_cs_gpios); - - pxa2xx_set_spi_info(1, &pxa_ssp_master_info); - spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); -} - -static struct map_desc lubbock_io_desc[] __initdata = { - { /* CPLD */ - .virtual = LUBBOCK_FPGA_VIRT, - .pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS), - .length = 0x00100000, - .type = MT_DEVICE - } -}; - -static void __init lubbock_map_io(void) -{ - pxa25x_map_io(); - iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc)); - - PCFR |= PCFR_OPDE; -} - -/* - * Driver for the 8 discrete LEDs available for general use: - * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays - * so be sure to not monkey with them here. - */ - -#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS) -struct lubbock_led { - struct led_classdev cdev; - u8 mask; -}; - -/* - * The triggers lines up below will only be used if the - * LED triggers are compiled in. - */ -static const struct { - const char *name; - const char *trigger; -} lubbock_leds[] = { - { "lubbock:D28", "default-on", }, - { "lubbock:D27", "cpu0", }, - { "lubbock:D26", "heartbeat" }, - { "lubbock:D25", }, - { "lubbock:D24", }, - { "lubbock:D23", }, - { "lubbock:D22", }, - { "lubbock:D21", }, -}; - -static void lubbock_led_set(struct led_classdev *cdev, - enum led_brightness b) -{ - struct lubbock_led *led = container_of(cdev, - struct lubbock_led, cdev); - u32 reg = LUB_DISC_BLNK_LED; - - if (b != LED_OFF) - reg |= led->mask; - else - reg &= ~led->mask; - - LUB_DISC_BLNK_LED = reg; -} - -static enum led_brightness lubbock_led_get(struct led_classdev *cdev) -{ - struct lubbock_led *led = container_of(cdev, - struct lubbock_led, cdev); - u32 reg = LUB_DISC_BLNK_LED; - - return (reg & led->mask) ? LED_FULL : LED_OFF; -} - -static int __init lubbock_leds_init(void) -{ - int i; - - if (!machine_is_lubbock()) - return -ENODEV; - - /* All ON */ - LUB_DISC_BLNK_LED |= 0xff; - for (i = 0; i < ARRAY_SIZE(lubbock_leds); i++) { - struct lubbock_led *led; - - led = kzalloc(sizeof(*led), GFP_KERNEL); - if (!led) - break; - - led->cdev.name = lubbock_leds[i].name; - led->cdev.brightness_set = lubbock_led_set; - led->cdev.brightness_get = lubbock_led_get; - led->cdev.default_trigger = lubbock_leds[i].trigger; - led->mask = BIT(i); - - if (led_classdev_register(NULL, &led->cdev) < 0) { - kfree(led); - break; - } - } - - return 0; -} - -/* - * Since we may have triggers on any subsystem, defer registration - * until after subsystem_init. - */ -fs_initcall(lubbock_leds_init); -#endif - -MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") - /* Maintainer: MontaVista Software Inc. */ - .map_io = lubbock_map_io, - .nr_irqs = LUBBOCK_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = lubbock_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/lubbock.h b/arch/arm/mach-pxa/lubbock.h deleted file mode 100644 index 55cf91e22ae2..000000000000 --- a/arch/arm/mach-pxa/lubbock.h +++ /dev/null @@ -1,47 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - */ - -#include "irqs.h" - -#define LUBBOCK_ETH_PHYS PXA_CS3_PHYS - -#define LUBBOCK_FPGA_PHYS PXA_CS2_PHYS -#define LUBBOCK_FPGA_VIRT (0xf0000000) -#define LUB_P2V(x) ((x) - LUBBOCK_FPGA_PHYS + LUBBOCK_FPGA_VIRT) -#define LUB_V2P(x) ((x) - LUBBOCK_FPGA_VIRT + LUBBOCK_FPGA_PHYS) - -#ifndef __ASSEMBLY__ -# define __LUB_REG(x) (*((volatile unsigned long *)LUB_P2V(x))) -#else -# define __LUB_REG(x) LUB_P2V(x) -#endif - -/* FPGA register virtual addresses */ -#define LUB_WHOAMI __LUB_REG(LUBBOCK_FPGA_PHYS + 0x000) -#define LUB_DISC_BLNK_LED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x040) -#define LUB_CONF_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x050) -#define LUB_USER_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x060) -#define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080) -#define LUB_MISC_RD __LUB_REG(LUBBOCK_FPGA_PHYS + 0x090) -#define LUB_IRQ_MASK_EN __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0c0) -#define LUB_IRQ_SET_CLR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0) -#define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100) - -/* Board specific IRQs */ -#define LUBBOCK_NR_IRQS IRQ_BOARD_START - -#define LUBBOCK_IRQ(x) (LUBBOCK_NR_IRQS + (x)) -#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0) -#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1) -#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */ -#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3) -#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4) -#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5) -#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */ -#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6) - -#define LUBBOCK_SA1111_IRQ_BASE (LUBBOCK_NR_IRQS + 32) diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c deleted file mode 100644 index 0827ebca1d38..000000000000 --- a/arch/arm/mach-pxa/magician.c +++ /dev/null @@ -1,1112 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Support for HTC Magician PDA phones: - * i-mate JAM, O2 Xda mini, Orange SPV M500, Qtek s100, Qtek s110 - * and T-Mobile MDA Compact. - * - * Copyright (c) 2006-2007 Philipp Zabel - * - * Based on hx4700.c, spitz.c and others. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/mfd/htc-pasic3.h> -#include <linux/mtd/physmap.h> -#include <linux/pda_power.h> -#include <linux/platform_data/gpio-htc-egpio.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/regulator/driver.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/gpio-regulator.h> -#include <linux/regulator/machine.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/system_info.h> - -#include "pxa27x.h" -#include "addr-map.h" -#include "magician.h" -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> - -#include <linux/regulator/max1586.h> - -#include <linux/platform_data/pxa2xx_udc.h> - -#include "udc.h" -#include "pxa27x-udc.h" -#include "devices.h" -#include "generic.h" - -#include <linux/spi/spi.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/spi/ads7846.h> -#include <sound/uda1380.h> - -static unsigned long magician_pin_config[] __initdata = { - - /* SDRAM and Static Memory I/O Signals */ - GPIO20_nSDCS_2, - GPIO21_nSDCS_3, - GPIO15_nCS_1, - GPIO78_nCS_2, /* PASIC3 */ - GPIO79_nCS_3, /* EGPIO CPLD */ - GPIO80_nCS_4, - GPIO33_nCS_5, - - /* I2C UDA1380 + OV9640 */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* PWM 0 - LCD backlight */ - GPIO16_PWM0_OUT, - - /* I2S UDA1380 capture */ - GPIO28_I2S_BITCLK_OUT, - GPIO29_I2S_SDATA_IN, - GPIO31_I2S_SYNC, - GPIO113_I2S_SYSCLK, - - /* SSP 1 UDA1380 playback */ - GPIO23_SSP1_SCLK, - GPIO24_SSP1_SFRM, - GPIO25_SSP1_TXD, - - /* SSP 2 TSC2046 touchscreen */ - GPIO19_SSP2_SCLK, - MFP_CFG_OUT(GPIO14, AF0, DRIVE_HIGH), /* frame as GPIO */ - GPIO89_SSP2_TXD, - GPIO88_SSP2_RXD, - - /* MMC/SD/SDHC slot */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* QCI camera interface */ - GPIO12_CIF_DD_7, - GPIO17_CIF_DD_6, - GPIO50_CIF_DD_3, - GPIO51_CIF_DD_2, - GPIO52_CIF_DD_4, - GPIO53_CIF_MCLK, - GPIO54_CIF_PCLK, - GPIO55_CIF_DD_1, - GPIO81_CIF_DD_0, - GPIO82_CIF_DD_5, - GPIO84_CIF_FV, - GPIO85_CIF_LV, - - /* Magician specific input GPIOs */ - GPIO9_GPIO, /* unknown */ - GPIO10_GPIO, /* GSM_IRQ */ - GPIO13_GPIO, /* CPLD_IRQ */ - GPIO107_GPIO, /* DS1WM_IRQ */ - GPIO108_GPIO, /* GSM_READY */ - GPIO115_GPIO, /* nPEN_IRQ */ -}; - -/* - * IrDA - */ - -static struct pxaficp_platform_data magician_ficp_info = { - .gpio_pwdown = GPIO83_MAGICIAN_nIR_EN, - .transceiver_cap = IR_SIRMODE | IR_OFF, - .gpio_pwdown_inverted = 0, -}; - -/* - * GPIO Keys - */ - -#define INIT_KEY(_code, _gpio, _desc) \ - { \ - .code = KEY_##_code, \ - .gpio = _gpio, \ - .desc = _desc, \ - .type = EV_KEY, \ - .wakeup = 1, \ - } - -static struct gpio_keys_button magician_button_table[] = { - INIT_KEY(POWER, GPIO0_MAGICIAN_KEY_POWER, "Power button"), - INIT_KEY(ESC, GPIO37_MAGICIAN_KEY_HANGUP, "Hangup button"), - INIT_KEY(F10, GPIO38_MAGICIAN_KEY_CONTACTS, "Contacts button"), - INIT_KEY(CALENDAR, GPIO90_MAGICIAN_KEY_CALENDAR, "Calendar button"), - INIT_KEY(CAMERA, GPIO91_MAGICIAN_KEY_CAMERA, "Camera button"), - INIT_KEY(UP, GPIO93_MAGICIAN_KEY_UP, "Up button"), - INIT_KEY(DOWN, GPIO94_MAGICIAN_KEY_DOWN, "Down button"), - INIT_KEY(LEFT, GPIO95_MAGICIAN_KEY_LEFT, "Left button"), - INIT_KEY(RIGHT, GPIO96_MAGICIAN_KEY_RIGHT, "Right button"), - INIT_KEY(KPENTER, GPIO97_MAGICIAN_KEY_ENTER, "Action button"), - INIT_KEY(RECORD, GPIO98_MAGICIAN_KEY_RECORD, "Record button"), - INIT_KEY(VOLUMEUP, GPIO100_MAGICIAN_KEY_VOL_UP, "Volume up"), - INIT_KEY(VOLUMEDOWN, GPIO101_MAGICIAN_KEY_VOL_DOWN, "Volume down"), - INIT_KEY(PHONE, GPIO102_MAGICIAN_KEY_PHONE, "Phone button"), - INIT_KEY(PLAY, GPIO99_MAGICIAN_HEADPHONE_IN, "Headset button"), -}; - -static struct gpio_keys_platform_data gpio_keys_data = { - .buttons = magician_button_table, - .nbuttons = ARRAY_SIZE(magician_button_table), -}; - -static struct platform_device gpio_keys = { - .name = "gpio-keys", - .dev = { - .platform_data = &gpio_keys_data, - }, - .id = -1, -}; - -/* - * EGPIO (Xilinx CPLD) - * - * 32-bit aligned 8-bit registers - * 16 possible registers (reg windows size), only 7 used: - * 3x output, 1x irq, 3x input - */ - -static struct resource egpio_resources[] = { - [0] = { - .start = PXA_CS3_PHYS, - .end = PXA_CS3_PHYS + 0x20 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ), - .end = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct htc_egpio_chip egpio_chips[] = { - [0] = { - .reg_start = 0, - .gpio_base = MAGICIAN_EGPIO(0, 0), - .num_gpios = 24, - .direction = HTC_EGPIO_OUTPUT, - /* - * Depends on modules configuration - */ - .initial_values = 0x40, /* EGPIO_MAGICIAN_GSM_RESET */ - }, - [1] = { - .reg_start = 4, - .gpio_base = MAGICIAN_EGPIO(4, 0), - .num_gpios = 24, - .direction = HTC_EGPIO_INPUT, - }, -}; - -static struct htc_egpio_platform_data egpio_info = { - .reg_width = 8, - .bus_width = 32, - .irq_base = IRQ_BOARD_START, - .num_irqs = 4, - .ack_register = 3, - .chip = egpio_chips, - .num_chips = ARRAY_SIZE(egpio_chips), -}; - -static struct platform_device egpio = { - .name = "htc-egpio", - .id = -1, - .resource = egpio_resources, - .num_resources = ARRAY_SIZE(egpio_resources), - .dev = { - .platform_data = &egpio_info, - }, -}; - -/* - * PXAFB LCD - Toppoly TD028STEB1 or Samsung LTP280QV - */ - -static struct pxafb_mode_info toppoly_modes[] = { - { - .pixclock = 96153, - .bpp = 16, - .xres = 240, - .yres = 320, - .hsync_len = 11, - .vsync_len = 3, - .left_margin = 19, - .upper_margin = 2, - .right_margin = 10, - .lower_margin = 2, - .sync = 0, - }, -}; - -static struct pxafb_mode_info samsung_modes[] = { - { - .pixclock = 226469, - .bpp = 16, - .xres = 240, - .yres = 320, - .hsync_len = 8, - .vsync_len = 4, - .left_margin = 9, - .upper_margin = 4, - .right_margin = 9, - .lower_margin = 4, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - }, -}; - -static void toppoly_lcd_power(int on, struct fb_var_screeninfo *si) -{ - pr_debug("Toppoly LCD power: %s\n", on ? "on" : "off"); - - if (on) { - gpio_set_value(EGPIO_MAGICIAN_TOPPOLY_POWER, 1); - gpio_set_value(GPIO106_MAGICIAN_LCD_DCDC_NRESET, 1); - udelay(2000); - gpio_set_value(EGPIO_MAGICIAN_LCD_POWER, 1); - udelay(2000); - /* FIXME: enable LCDC here */ - udelay(2000); - gpio_set_value(GPIO104_MAGICIAN_LCD_VOFF_EN, 1); - udelay(2000); - gpio_set_value(GPIO105_MAGICIAN_LCD_VON_EN, 1); - } else { - msleep(15); - gpio_set_value(GPIO105_MAGICIAN_LCD_VON_EN, 0); - udelay(500); - gpio_set_value(GPIO104_MAGICIAN_LCD_VOFF_EN, 0); - udelay(1000); - gpio_set_value(GPIO106_MAGICIAN_LCD_DCDC_NRESET, 0); - gpio_set_value(EGPIO_MAGICIAN_LCD_POWER, 0); - } -} - -static void samsung_lcd_power(int on, struct fb_var_screeninfo *si) -{ - pr_debug("Samsung LCD power: %s\n", on ? "on" : "off"); - - if (on) { - if (system_rev < 3) - gpio_set_value(GPIO75_MAGICIAN_SAMSUNG_POWER, 1); - else - gpio_set_value(EGPIO_MAGICIAN_LCD_POWER, 1); - mdelay(6); - gpio_set_value(GPIO106_MAGICIAN_LCD_DCDC_NRESET, 1); - mdelay(6); /* Avdd -> Voff >5ms */ - gpio_set_value(GPIO104_MAGICIAN_LCD_VOFF_EN, 1); - mdelay(16); /* Voff -> Von >(5+10)ms */ - gpio_set_value(GPIO105_MAGICIAN_LCD_VON_EN, 1); - } else { - gpio_set_value(GPIO105_MAGICIAN_LCD_VON_EN, 0); - mdelay(16); - gpio_set_value(GPIO104_MAGICIAN_LCD_VOFF_EN, 0); - mdelay(6); - gpio_set_value(GPIO106_MAGICIAN_LCD_DCDC_NRESET, 0); - mdelay(6); - if (system_rev < 3) - gpio_set_value(GPIO75_MAGICIAN_SAMSUNG_POWER, 0); - else - gpio_set_value(EGPIO_MAGICIAN_LCD_POWER, 0); - } -} - -static struct pxafb_mach_info toppoly_info = { - .modes = toppoly_modes, - .num_modes = 1, - .fixed_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP, - .pxafb_lcd_power = toppoly_lcd_power, -}; - -static struct pxafb_mach_info samsung_info = { - .modes = samsung_modes, - .num_modes = 1, - .fixed_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | - LCD_ALTERNATE_MAPPING, - .pxafb_lcd_power = samsung_lcd_power, -}; - -/* - * Backlight - */ - -static struct pwm_lookup magician_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight", NULL, 30923, - PWM_POLARITY_NORMAL), -}; - - /* - * fixed regulator for pwm_backlight - */ - -static struct regulator_consumer_supply pwm_backlight_supply[] = { - REGULATOR_SUPPLY("power", "pwm_backlight"), -}; - - -static struct gpio magician_bl_gpios[] = { - { EGPIO_MAGICIAN_BL_POWER, GPIOF_DIR_OUT, "Backlight power" }, - { EGPIO_MAGICIAN_BL_POWER2, GPIOF_DIR_OUT, "Backlight power 2" }, -}; - -static int magician_backlight_init(struct device *dev) -{ - return gpio_request_array(ARRAY_AND_SIZE(magician_bl_gpios)); -} - -static int magician_backlight_notify(struct device *dev, int brightness) -{ - pr_debug("Brightness = %i\n", brightness); - gpio_set_value(EGPIO_MAGICIAN_BL_POWER, brightness); - if (brightness >= 200) { - gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 1); - return brightness - 72; - } else { - gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 0); - return brightness; - } -} - -static void magician_backlight_exit(struct device *dev) -{ - gpio_free_array(ARRAY_AND_SIZE(magician_bl_gpios)); -} - -/* - * LCD PWM backlight (main) - * - * MP1521 frequency should be: - * 100-400 Hz = 2 .5*10^6 - 10 *10^6 ns - */ - -static struct platform_pwm_backlight_data backlight_data = { - .max_brightness = 272, - .dft_brightness = 100, - .init = magician_backlight_init, - .notify = magician_backlight_notify, - .exit = magician_backlight_exit, -}; - -static struct platform_device backlight = { - .name = "pwm-backlight", - .id = -1, - .dev = { - .parent = &pxa27x_device_pwm0.dev, - .platform_data = &backlight_data, - }, -}; - -/* - * GPIO LEDs, Phone keys backlight, vibra - */ - -static struct gpio_led gpio_leds[] = { - { - .name = "magician::vibra", - .default_trigger = "none", - .gpio = GPIO22_MAGICIAN_VIBRA_EN, - }, - { - .name = "magician::phone_bl", - .default_trigger = "backlight", - .gpio = GPIO103_MAGICIAN_LED_KP, - }, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, -}; - -/* - * PASIC3 with DS1WM - */ - -static struct resource pasic3_resources[] = { - [0] = { - .start = PXA_CS2_PHYS, - .end = PXA_CS2_PHYS + 0x1b, - .flags = IORESOURCE_MEM, - }, - /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */ - [1] = { - .start = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ), - .end = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct pasic3_platform_data pasic3_platform_data = { - .clock_rate = 4000000, -}; - -static struct platform_device pasic3 = { - .name = "pasic3", - .id = -1, - .num_resources = ARRAY_SIZE(pasic3_resources), - .resource = pasic3_resources, - .dev = { - .platform_data = &pasic3_platform_data, - }, -}; - -/* - * PXA UDC - */ - -static void magician_udc_command(int cmd) -{ - if (cmd == PXA2XX_UDC_CMD_CONNECT) - UP2OCR |= UP2OCR_DPPUE | UP2OCR_DPPUBE; - else if (cmd == PXA2XX_UDC_CMD_DISCONNECT) - UP2OCR &= ~(UP2OCR_DPPUE | UP2OCR_DPPUBE); -} - -static struct pxa2xx_udc_mach_info magician_udc_info __initdata = { - .udc_command = magician_udc_command, - .gpio_pullup = GPIO27_MAGICIAN_USBC_PUEN, -}; - -/* - * USB device VBus detection - */ - -static struct resource gpio_vbus_resource = { - .flags = IORESOURCE_IRQ, - .start = IRQ_MAGICIAN_VBUS, - .end = IRQ_MAGICIAN_VBUS, -}; - -static struct gpiod_lookup_table gpio_vbus_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - /* - * EGPIO on register 4 index 1, the second EGPIO chip - * starts at register 4 so this will be at index 1 on that - * chip. - */ - GPIO_LOOKUP("htc-egpio-1", 1, - "vbus", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO27_MAGICIAN_USBC_PUEN, - "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device gpio_vbus = { - .name = "gpio-vbus", - .id = -1, - .num_resources = 1, - .resource = &gpio_vbus_resource, -}; - -/* - * External power - */ - -static int magician_supply_init(struct device *dev) -{ - int ret = -1; - - ret = gpio_request(EGPIO_MAGICIAN_CABLE_TYPE, "Cable is AC charger"); - if (ret) { - pr_err("Cannot request AC/USB charger GPIO (%i)\n", ret); - goto err_ac; - } - - ret = gpio_request(EGPIO_MAGICIAN_CABLE_INSERTED, "Cable inserted"); - if (ret) { - pr_err("Cannot request cable detection GPIO (%i)\n", ret); - goto err_usb; - } - - return 0; - -err_usb: - gpio_free(EGPIO_MAGICIAN_CABLE_TYPE); -err_ac: - return ret; -} - -static void magician_set_charge(int flags) -{ - if (flags & PDA_POWER_CHARGE_AC) { - pr_debug("Charging from AC\n"); - gpio_set_value(EGPIO_MAGICIAN_NICD_CHARGE, 1); - } else if (flags & PDA_POWER_CHARGE_USB) { - pr_debug("Charging from USB\n"); - gpio_set_value(EGPIO_MAGICIAN_NICD_CHARGE, 1); - } else { - pr_debug("Charging disabled\n"); - gpio_set_value(EGPIO_MAGICIAN_NICD_CHARGE, 0); - } -} - -static int magician_is_ac_online(void) -{ - return gpio_get_value(EGPIO_MAGICIAN_CABLE_INSERTED) && - gpio_get_value(EGPIO_MAGICIAN_CABLE_TYPE); /* AC=1 */ -} - -static int magician_is_usb_online(void) -{ - return gpio_get_value(EGPIO_MAGICIAN_CABLE_INSERTED) && - (!gpio_get_value(EGPIO_MAGICIAN_CABLE_TYPE)); /* USB=0 */ -} - -static void magician_supply_exit(struct device *dev) -{ - gpio_free(EGPIO_MAGICIAN_CABLE_INSERTED); - gpio_free(EGPIO_MAGICIAN_CABLE_TYPE); -} - -static char *magician_supplicants[] = { - "ds2760-battery.0", "backup-battery" -}; - -static struct pda_power_pdata power_supply_info = { - .init = magician_supply_init, - .exit = magician_supply_exit, - .is_ac_online = magician_is_ac_online, - .is_usb_online = magician_is_usb_online, - .set_charge = magician_set_charge, - .supplied_to = magician_supplicants, - .num_supplicants = ARRAY_SIZE(magician_supplicants), -}; - -static struct resource power_supply_resources[] = { - [0] = { - .name = "ac", - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | - IORESOURCE_IRQ_LOWEDGE, - .start = IRQ_MAGICIAN_VBUS, - .end = IRQ_MAGICIAN_VBUS, - }, - [1] = { - .name = "usb", - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | - IORESOURCE_IRQ_LOWEDGE, - .start = IRQ_MAGICIAN_VBUS, - .end = IRQ_MAGICIAN_VBUS, - }, -}; - -static struct platform_device power_supply = { - .name = "pda-power", - .id = -1, - .dev = { - .platform_data = &power_supply_info, - }, - .resource = power_supply_resources, - .num_resources = ARRAY_SIZE(power_supply_resources), -}; - -/* - * Battery charger - */ - -static struct regulator_consumer_supply bq24022_consumers[] = { - REGULATOR_SUPPLY("vbus_draw", NULL), - REGULATOR_SUPPLY("ac_draw", NULL), -}; - -static struct regulator_init_data bq24022_init_data = { - .constraints = { - .max_uA = 500000, - .valid_ops_mask = REGULATOR_CHANGE_CURRENT | - REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers), - .consumer_supplies = bq24022_consumers, -}; - - -static enum gpiod_flags bq24022_gpiod_gflags[] = { GPIOD_OUT_LOW }; - -static struct gpio_regulator_state bq24022_states[] = { - { .value = 100000, .gpios = (0 << 0) }, - { .value = 500000, .gpios = (1 << 0) }, -}; - -static struct gpio_regulator_config bq24022_info = { - .supply_name = "bq24022", - - .enabled_at_boot = 1, - - .gflags = bq24022_gpiod_gflags, - .ngpios = ARRAY_SIZE(bq24022_gpiod_gflags), - - .states = bq24022_states, - .nr_states = ARRAY_SIZE(bq24022_states), - - .type = REGULATOR_CURRENT, - .init_data = &bq24022_init_data, -}; - -static struct platform_device bq24022 = { - .name = "gpio-regulator", - .id = -1, - .dev = { - .platform_data = &bq24022_info, - }, -}; - -static struct gpiod_lookup_table bq24022_gpiod_table = { - .dev_id = "gpio-regulator", - .table = { - GPIO_LOOKUP("htc-egpio-0", EGPIO_MAGICIAN_BQ24022_ISET2 - MAGICIAN_EGPIO_BASE, - NULL, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO30_MAGICIAN_BQ24022_nCHARGE_EN, - "enable", GPIO_ACTIVE_LOW), - { }, - }, -}; - -/* - * fixed regulator for ads7846 - */ - -static struct regulator_consumer_supply ads7846_supply = - REGULATOR_SUPPLY("vcc", "spi2.0"); - -static struct regulator_init_data vads7846_regulator = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &ads7846_supply, -}; - -static struct fixed_voltage_config vads7846 = { - .supply_name = "vads7846", - .microvolts = 3300000, /* probably */ - .startup_delay = 0, - .init_data = &vads7846_regulator, -}; - -static struct platform_device vads7846_device = { - .name = "reg-fixed-voltage", - .id = -1, - .dev = { - .platform_data = &vads7846, - }, -}; - -/* - * Vcore regulator MAX1587A - */ - -static struct regulator_consumer_supply magician_max1587a_consumers[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data magician_max1587a_v3_info = { - .constraints = { - .name = "vcc_core range", - .min_uV = 700000, - .max_uV = 1475000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .consumer_supplies = magician_max1587a_consumers, - .num_consumer_supplies = ARRAY_SIZE(magician_max1587a_consumers), -}; - -static struct max1586_subdev_data magician_max1587a_subdevs[] = { - { - .name = "vcc_core", - .id = MAX1586_V3, - .platform_data = &magician_max1587a_v3_info, - } -}; - -static struct max1586_platform_data magician_max1587a_info = { - .subdevs = magician_max1587a_subdevs, - .num_subdevs = ARRAY_SIZE(magician_max1587a_subdevs), - /* - * NOTICE measured directly on the PCB (board_id == 0x3a), but - * if R24 is present, it will boost the voltage - * (write 1.475V, get 1.645V and smoke) - */ - .v3_gain = MAX1586_GAIN_NO_R24, -}; - -static struct i2c_board_info magician_pwr_i2c_board_info[] __initdata = { - { - I2C_BOARD_INFO("max1586", 0x14), - .platform_data = &magician_max1587a_info, - }, -}; - -/* - * MMC/SD - */ - -static int magician_mci_init(struct device *dev, - irq_handler_t detect_irq, void *data) -{ - return request_irq(IRQ_MAGICIAN_SD, detect_irq, 0, - "mmc card detect", data); -} - -static void magician_mci_exit(struct device *dev, void *data) -{ - free_irq(IRQ_MAGICIAN_SD, data); -} - -static struct pxamci_platform_data magician_mci_info = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .init = magician_mci_init, - .exit = magician_mci_exit, - .gpio_card_ro_invert = 1, -}; - -/* - * Write protect on EGPIO register 5 index 4, this is on the second HTC - * EGPIO chip which starts at register 4, so we need offset 8+4=12 on that - * particular chip. - */ -#define EGPIO_MAGICIAN_nSD_READONLY_OFFSET 12 -/* - * Power on EGPIO register 2 index 0, so this is on the first HTC EGPIO chip - * starting at register 0 so we need offset 2*8+0 = 16 on that chip. - */ -#define EGPIO_MAGICIAN_nSD_POWER_OFFSET 16 - -static struct gpiod_lookup_table magician_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("htc-egpio-1", EGPIO_MAGICIAN_nSD_READONLY_OFFSET, - "wp", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("htc-egpio-0", EGPIO_MAGICIAN_nSD_POWER_OFFSET, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* - * USB OHCI - */ - -static struct pxaohci_platform_data magician_ohci_info = { - .port_mode = PMM_PERPORT_MODE, - /* port1: CSR Bluetooth, port2: OTG with UDC */ - .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, - .power_budget = 0, - .power_on_delay = 100, -}; - -/* - * StrataFlash - */ - -static int magician_flash_init(struct platform_device *pdev) -{ - int ret = gpio_request(EGPIO_MAGICIAN_FLASH_VPP, "flash Vpp enable"); - - if (ret) { - pr_err("Cannot request flash enable GPIO (%i)\n", ret); - return ret; - } - - ret = gpio_direction_output(EGPIO_MAGICIAN_FLASH_VPP, 1); - if (ret) { - pr_err("Cannot set direction for flash enable (%i)\n", ret); - gpio_free(EGPIO_MAGICIAN_FLASH_VPP); - } - - return ret; -} - -static void magician_set_vpp(struct platform_device *pdev, int vpp) -{ - gpio_set_value(EGPIO_MAGICIAN_FLASH_VPP, vpp); -} - -static void magician_flash_exit(struct platform_device *pdev) -{ - gpio_free(EGPIO_MAGICIAN_FLASH_VPP); -} - -static struct resource strataflash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct mtd_partition magician_flash_parts[] = { - { - .name = "Bootloader", - .offset = 0x0, - .size = 0x40000, - .mask_flags = MTD_WRITEABLE, /* EXPERIMENTAL */ - }, - { - .name = "Linux Kernel", - .offset = 0x40000, - .size = MTDPART_SIZ_FULL, - }, -}; - -/* - * physmap-flash driver - */ - -static struct physmap_flash_data strataflash_data = { - .width = 4, - .init = magician_flash_init, - .set_vpp = magician_set_vpp, - .exit = magician_flash_exit, - .parts = magician_flash_parts, - .nr_parts = ARRAY_SIZE(magician_flash_parts), -}; - -static struct platform_device strataflash = { - .name = "physmap-flash", - .id = -1, - .resource = &strataflash_resource, - .num_resources = 1, - .dev = { - .platform_data = &strataflash_data, - }, -}; - -/* - * audio support - */ -static struct uda1380_platform_data uda1380_info = { - .gpio_power = EGPIO_MAGICIAN_CODEC_POWER, - .gpio_reset = EGPIO_MAGICIAN_CODEC_RESET, - .dac_clk = UDA1380_DAC_CLK_WSPLL, -}; - -static struct i2c_board_info magician_audio_i2c_board_info[] = { - { - I2C_BOARD_INFO("uda1380", 0x18), - .platform_data = &uda1380_info, - }, -}; - -static struct gpiod_lookup_table magician_audio_gpio_table = { - .dev_id = "magician-audio", - .table = { - GPIO_LOOKUP("htc-egpio-0", - EGPIO_MAGICIAN_SPK_POWER - MAGICIAN_EGPIO_BASE, - "SPK_POWER", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("htc-egpio-0", - EGPIO_MAGICIAN_EP_POWER - MAGICIAN_EGPIO_BASE, - "EP_POWER", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("htc-egpio-0", - EGPIO_MAGICIAN_MIC_POWER - MAGICIAN_EGPIO_BASE, - "MIC_POWER", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("htc-egpio-0", - EGPIO_MAGICIAN_IN_SEL0 - MAGICIAN_EGPIO_BASE, - "IN_SEL0", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("htc-egpio-0", - EGPIO_MAGICIAN_IN_SEL1 - MAGICIAN_EGPIO_BASE, - "IN_SEL1", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void magician_audio_init(void) -{ - i2c_register_board_info(0, - ARRAY_AND_SIZE(magician_audio_i2c_board_info)); - - gpiod_add_lookup_table(&magician_audio_gpio_table); - platform_device_register_simple("magician-audio", -1, NULL, 0); -} - -/* - * PXA I2C main controller - */ - -static struct i2c_pxa_platform_data i2c_info = { - /* OV9640 I2C device doesn't support fast mode */ - .fast_mode = 0, -}; - -/* - * PXA I2C power controller - */ - -static struct i2c_pxa_platform_data magician_i2c_power_info = { - .fast_mode = 1, -}; - -/* - * Touchscreen - */ - -static struct ads7846_platform_data ads7846_pdata = { - .model = 7846, - .x_plate_ohms = 317, - .y_plate_ohms = 500, - .pressure_max = 1023, /* with x plate ohms it will overflow 255 */ - .debounce_max = 3, /* first readout is always bad */ - .debounce_tol = 30, - .debounce_rep = 0, - .gpio_pendown = GPIO115_MAGICIAN_nPEN_IRQ, - .keep_vref_on = 1, - .wakeup = true, - .vref_delay_usecs = 100, - .penirq_recheck_delay_usecs = 100, -}; - -struct pxa2xx_spi_chip tsc2046_chip_info = { - .tx_threshold = 1, - .rx_threshold = 2, - .timeout = 64, -}; - -static struct pxa2xx_spi_controller magician_spi_info = { - .num_chipselect = 1, - .enable_dma = 1, -}; - -static struct gpiod_lookup_table magician_spi_gpio_table = { - .dev_id = "spi2", - .table = { - /* NOTICE must be GPIO, incompatibility with hw PXA SPI framing */ - GPIO_LOOKUP_IDX("gpio-pxa", GPIO14_MAGICIAN_TSC2046_CS, "cs", 0, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct spi_board_info ads7846_spi_board_info[] __initdata = { - { - .modalias = "ads7846", - .bus_num = 2, - .max_speed_hz = 2500000, - .platform_data = &ads7846_pdata, - .controller_data = &tsc2046_chip_info, - .irq = PXA_GPIO_TO_IRQ(GPIO115_MAGICIAN_nPEN_IRQ), - }, -}; - -/* - * Platform devices - */ - -static struct platform_device *devices[] __initdata = { - &gpio_keys, - &egpio, - &backlight, - &pasic3, - &bq24022, - &gpio_vbus, - &power_supply, - &strataflash, - &leds_gpio, - &vads7846_device, -}; - -static struct gpio magician_global_gpios[] = { - { GPIO13_MAGICIAN_CPLD_IRQ, GPIOF_IN, "CPLD_IRQ" }, - { GPIO107_MAGICIAN_DS1WM_IRQ, GPIOF_IN, "DS1WM_IRQ" }, - - /* NOTICE valid LCD init sequence */ - { GPIO106_MAGICIAN_LCD_DCDC_NRESET, GPIOF_OUT_INIT_LOW, "LCD DCDC nreset" }, - { GPIO104_MAGICIAN_LCD_VOFF_EN, GPIOF_OUT_INIT_LOW, "LCD VOFF enable" }, - { GPIO105_MAGICIAN_LCD_VON_EN, GPIOF_OUT_INIT_LOW, "LCD VON enable" }, -}; - -static void __init magician_init(void) -{ - void __iomem *cpld; - int lcd_select; - int err; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config)); - err = gpio_request_array(ARRAY_AND_SIZE(magician_global_gpios)); - if (err) - pr_err("magician: Failed to request global GPIOs: %d\n", err); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - - pwm_add_table(magician_pwm_lookup, ARRAY_SIZE(magician_pwm_lookup)); - - pxa_set_ficp_info(&magician_ficp_info); - pxa27x_set_i2c_power_info(&magician_i2c_power_info); - pxa_set_i2c_info(&i2c_info); - - i2c_register_board_info(1, - ARRAY_AND_SIZE(magician_pwr_i2c_board_info)); - - gpiod_add_lookup_table(&magician_mci_gpio_table); - pxa_set_mci_info(&magician_mci_info); - pxa_set_ohci_info(&magician_ohci_info); - pxa_set_udc_info(&magician_udc_info); - - /* Check LCD type we have */ - cpld = ioremap(PXA_CS3_PHYS, 0x1000); - if (cpld) { - u8 board_id = __raw_readb(cpld + 0x14); - - iounmap(cpld); - system_rev = board_id & 0x7; - lcd_select = board_id & 0x8; - pr_info("LCD type: %s\n", lcd_select ? "Samsung" : "Toppoly"); - if (lcd_select && (system_rev < 3)) - /* NOTICE valid LCD init sequence */ - gpio_request_one(GPIO75_MAGICIAN_SAMSUNG_POWER, - GPIOF_OUT_INIT_LOW, "Samsung LCD Power"); - pxa_set_fb_info(NULL, - lcd_select ? &samsung_info : &toppoly_info); - } else - pr_err("LCD detection: CPLD mapping failed\n"); - - gpiod_add_lookup_table(&magician_spi_gpio_table); - pxa2xx_set_spi_info(2, &magician_spi_info); - spi_register_board_info(ARRAY_AND_SIZE(ads7846_spi_board_info)); - - regulator_register_always_on(0, "power", pwm_backlight_supply, - ARRAY_SIZE(pwm_backlight_supply), 5000000); - - gpiod_add_lookup_table(&bq24022_gpiod_table); - gpiod_add_lookup_table(&gpio_vbus_gpiod_table); - platform_add_devices(ARRAY_AND_SIZE(devices)); - - magician_audio_init(); -} - -MACHINE_START(MAGICIAN, "HTC Magician") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = MAGICIAN_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_machine = magician_init, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/magician.h b/arch/arm/mach-pxa/magician.h deleted file mode 100644 index e1e4f9f6b22b..000000000000 --- a/arch/arm/mach-pxa/magician.h +++ /dev/null @@ -1,125 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIO and IRQ definitions for HTC Magician PDA phones - * - * Copyright (c) 2007 Philipp Zabel - */ - -#ifndef _MAGICIAN_H_ -#define _MAGICIAN_H_ - -#include <linux/gpio.h> -#include "irqs.h" - -/* - * PXA GPIOs - */ - -#define GPIO0_MAGICIAN_KEY_POWER 0 -#define GPIO9_MAGICIAN_UNKNOWN 9 -#define GPIO10_MAGICIAN_GSM_IRQ 10 -#define GPIO11_MAGICIAN_GSM_OUT1 11 -#define GPIO13_MAGICIAN_CPLD_IRQ 13 -#define GPIO14_MAGICIAN_TSC2046_CS 14 -#define GPIO18_MAGICIAN_UNKNOWN 18 -#define GPIO22_MAGICIAN_VIBRA_EN 22 -#define GPIO26_MAGICIAN_GSM_POWER 26 -#define GPIO27_MAGICIAN_USBC_PUEN 27 -#define GPIO30_MAGICIAN_BQ24022_nCHARGE_EN 30 -#define GPIO37_MAGICIAN_KEY_HANGUP 37 -#define GPIO38_MAGICIAN_KEY_CONTACTS 38 -#define GPIO40_MAGICIAN_GSM_OUT2 40 -#define GPIO48_MAGICIAN_UNKNOWN 48 -#define GPIO56_MAGICIAN_UNKNOWN 56 -#define GPIO57_MAGICIAN_CAM_RESET 57 -#define GPIO75_MAGICIAN_SAMSUNG_POWER 75 -#define GPIO83_MAGICIAN_nIR_EN 83 -#define GPIO86_MAGICIAN_GSM_RESET 86 -#define GPIO87_MAGICIAN_GSM_SELECT 87 -#define GPIO90_MAGICIAN_KEY_CALENDAR 90 -#define GPIO91_MAGICIAN_KEY_CAMERA 91 -#define GPIO93_MAGICIAN_KEY_UP 93 -#define GPIO94_MAGICIAN_KEY_DOWN 94 -#define GPIO95_MAGICIAN_KEY_LEFT 95 -#define GPIO96_MAGICIAN_KEY_RIGHT 96 -#define GPIO97_MAGICIAN_KEY_ENTER 97 -#define GPIO98_MAGICIAN_KEY_RECORD 98 -#define GPIO99_MAGICIAN_HEADPHONE_IN 99 -#define GPIO100_MAGICIAN_KEY_VOL_UP 100 -#define GPIO101_MAGICIAN_KEY_VOL_DOWN 101 -#define GPIO102_MAGICIAN_KEY_PHONE 102 -#define GPIO103_MAGICIAN_LED_KP 103 -#define GPIO104_MAGICIAN_LCD_VOFF_EN 104 -#define GPIO105_MAGICIAN_LCD_VON_EN 105 -#define GPIO106_MAGICIAN_LCD_DCDC_NRESET 106 -#define GPIO107_MAGICIAN_DS1WM_IRQ 107 -#define GPIO108_MAGICIAN_GSM_READY 108 -#define GPIO114_MAGICIAN_UNKNOWN 114 -#define GPIO115_MAGICIAN_nPEN_IRQ 115 -#define GPIO116_MAGICIAN_nCAM_EN 116 -#define GPIO119_MAGICIAN_UNKNOWN 119 -#define GPIO120_MAGICIAN_UNKNOWN 120 - -/* - * CPLD IRQs - */ - -#define IRQ_MAGICIAN_SD (IRQ_BOARD_START + 0) -#define IRQ_MAGICIAN_EP (IRQ_BOARD_START + 1) -#define IRQ_MAGICIAN_BT (IRQ_BOARD_START + 2) -#define IRQ_MAGICIAN_VBUS (IRQ_BOARD_START + 3) - -#define MAGICIAN_NR_IRQS (IRQ_BOARD_START + 8) - -/* - * CPLD EGPIOs - */ - -#define MAGICIAN_EGPIO_BASE PXA_NR_BUILTIN_GPIO -#define MAGICIAN_EGPIO(reg,bit) \ - (MAGICIAN_EGPIO_BASE + 8*reg + bit) - -/* output */ - -#define EGPIO_MAGICIAN_TOPPOLY_POWER MAGICIAN_EGPIO(0, 2) -#define EGPIO_MAGICIAN_LED_POWER MAGICIAN_EGPIO(0, 5) -#define EGPIO_MAGICIAN_GSM_RESET MAGICIAN_EGPIO(0, 6) -#define EGPIO_MAGICIAN_LCD_POWER MAGICIAN_EGPIO(0, 7) -#define EGPIO_MAGICIAN_SPK_POWER MAGICIAN_EGPIO(1, 0) -#define EGPIO_MAGICIAN_EP_POWER MAGICIAN_EGPIO(1, 1) -#define EGPIO_MAGICIAN_IN_SEL0 MAGICIAN_EGPIO(1, 2) -#define EGPIO_MAGICIAN_IN_SEL1 MAGICIAN_EGPIO(1, 3) -#define EGPIO_MAGICIAN_MIC_POWER MAGICIAN_EGPIO(1, 4) -#define EGPIO_MAGICIAN_CODEC_RESET MAGICIAN_EGPIO(1, 5) -#define EGPIO_MAGICIAN_CODEC_POWER MAGICIAN_EGPIO(1, 6) -#define EGPIO_MAGICIAN_BL_POWER MAGICIAN_EGPIO(1, 7) -#define EGPIO_MAGICIAN_SD_POWER MAGICIAN_EGPIO(2, 0) -#define EGPIO_MAGICIAN_CARKIT_MIC MAGICIAN_EGPIO(2, 1) -#define EGPIO_MAGICIAN_IR_RX_SHUTDOWN MAGICIAN_EGPIO(2, 2) -#define EGPIO_MAGICIAN_FLASH_VPP MAGICIAN_EGPIO(2, 3) -#define EGPIO_MAGICIAN_BL_POWER2 MAGICIAN_EGPIO(2, 4) -#define EGPIO_MAGICIAN_BQ24022_ISET2 MAGICIAN_EGPIO(2, 5) -#define EGPIO_MAGICIAN_NICD_CHARGE MAGICIAN_EGPIO(2, 6) -#define EGPIO_MAGICIAN_GSM_POWER MAGICIAN_EGPIO(2, 7) - -/* input */ - -/* USB or AC charger type */ -#define EGPIO_MAGICIAN_CABLE_TYPE MAGICIAN_EGPIO(4, 0) -/* - * Vbus is detected - * FIXME behaves like (6,3), may differ for host/device - */ -#define EGPIO_MAGICIAN_CABLE_VBUS MAGICIAN_EGPIO(4, 1) - -#define EGPIO_MAGICIAN_BOARD_ID0 MAGICIAN_EGPIO(5, 0) -#define EGPIO_MAGICIAN_BOARD_ID1 MAGICIAN_EGPIO(5, 1) -#define EGPIO_MAGICIAN_BOARD_ID2 MAGICIAN_EGPIO(5, 2) -#define EGPIO_MAGICIAN_LCD_SELECT MAGICIAN_EGPIO(5, 3) -#define EGPIO_MAGICIAN_nSD_READONLY MAGICIAN_EGPIO(5, 4) - -#define EGPIO_MAGICIAN_EP_INSERT MAGICIAN_EGPIO(6, 1) -/* FIXME behaves like (4,1), may differ for host/device */ -#define EGPIO_MAGICIAN_CABLE_INSERTED MAGICIAN_EGPIO(6, 3) - -#endif /* _MAGICIAN_H_ */ diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c deleted file mode 100644 index fd386f1c414c..000000000000 --- a/arch/arm/mach-pxa/mainstone.c +++ /dev/null @@ -1,738 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/mainstone.c - * - * Support for the Intel HCDDBBVA0 Development Platform. - * (go figure how they came up with such name...) - * - * Author: Nicolas Pitre - * Created: Nov 05, 2002 - * Copyright: MontaVista Software Inc. - */ -#include <linux/gpio.h> -#include <linux/gpio/gpio-reg.h> -#include <linux/gpio/machine.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/syscore_ops.h> -#include <linux/interrupt.h> -#include <linux/sched.h> -#include <linux/bitops.h> -#include <linux/fb.h> -#include <linux/ioport.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/smc91x.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/slab.h> -#include <linux/leds.h> - -#include <asm/types.h> -#include <asm/setup.h> -#include <asm/memory.h> -#include <asm/mach-types.h> -#include <asm/irq.h> -#include <linux/sizes.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/mach/flash.h> - -#include "pxa27x.h" -#include "mainstone.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include "addr-map.h" -#include "smemc.h" - -#include "generic.h" -#include "devices.h" - -static unsigned long mainstone_pin_config[] = { - /* Chip Select */ - GPIO15_nCS_1, - - /* LCD - 16bpp Active TFT */ - GPIOxx_LCD_TFT_16BPP, - GPIO16_PWM0_OUT, /* Backlight */ - - /* MMC */ - GPIO32_MMC_CLK, - GPIO112_MMC_CMD, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - - /* USB Host Port 1 */ - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, - - /* PC Card */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO85_nPCE_1, - GPIO54_nPCE_2, - GPIO79_PSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO45_AC97_SYSCLK, - - /* Keypad */ - GPIO93_KP_DKIN_0, - GPIO94_KP_DKIN_1, - GPIO95_KP_DKIN_2, - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, - GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - GPIO107_KP_MKOUT_4, - GPIO108_KP_MKOUT_5, - GPIO96_KP_MKOUT_6, - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* GPIO */ - GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = (MST_ETH_PHYS + 0x300), - .end = (MST_ETH_PHYS + 0xfffff), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MAINSTONE_IRQ(3), - .end = MAINSTONE_IRQ(3), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct smc91x_platdata mainstone_smc91x_info = { - .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | - SMC91X_NOWAIT | SMC91X_USE_DMA, - .pxa_u16_align4 = true, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &mainstone_smc91x_info, - }, -}; - -static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv) -{ - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; - return 0; -} - -static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv) -{ - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; -} - -static long mst_audio_suspend_mask; - -static void mst_audio_suspend(void *priv) -{ - mst_audio_suspend_mask = MST_MSCWR2; - MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; -} - -static void mst_audio_resume(void *priv) -{ - MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; -} - -static pxa2xx_audio_ops_t mst_audio_ops = { - .startup = mst_audio_startup, - .shutdown = mst_audio_shutdown, - .suspend = mst_audio_suspend, - .resume = mst_audio_resume, -}; - -static struct resource flash_resources[] = { - [0] = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_CS1_PHYS, - .end = PXA_CS1_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct mtd_partition mainstoneflash0_partitions[] = { - { - .name = "Bootloader", - .size = 0x00040000, - .offset = 0, - .mask_flags = MTD_WRITEABLE /* force read-only */ - },{ - .name = "Kernel", - .size = 0x00400000, - .offset = 0x00040000, - },{ - .name = "Filesystem", - .size = MTDPART_SIZ_FULL, - .offset = 0x00440000 - } -}; - -static struct flash_platform_data mst_flash_data[2] = { - { - .map_name = "cfi_probe", - .parts = mainstoneflash0_partitions, - .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), - }, { - .map_name = "cfi_probe", - .parts = NULL, - .nr_parts = 0, - } -}; - -static struct platform_device mst_flash_device[2] = { - { - .name = "pxa2xx-flash", - .id = 0, - .dev = { - .platform_data = &mst_flash_data[0], - }, - .resource = &flash_resources[0], - .num_resources = 1, - }, - { - .name = "pxa2xx-flash", - .id = 1, - .dev = { - .platform_data = &mst_flash_data[1], - }, - .resource = &flash_resources[1], - .num_resources = 1, - }, -}; - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pwm_lookup mainstone_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data mainstone_backlight_data = { - .max_brightness = 1023, - .dft_brightness = 1023, -}; - -static struct platform_device mainstone_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa27x_device_pwm0.dev, - .platform_data = &mainstone_backlight_data, - }, -}; - -static void __init mainstone_backlight_register(void) -{ - int ret; - - pwm_add_table(mainstone_pwm_lookup, ARRAY_SIZE(mainstone_pwm_lookup)); - - ret = platform_device_register(&mainstone_backlight_device); - if (ret) { - printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret); - pwm_remove_table(mainstone_pwm_lookup, - ARRAY_SIZE(mainstone_pwm_lookup)); - } -} -#else -#define mainstone_backlight_register() do { } while (0) -#endif - -static struct pxafb_mode_info toshiba_ltm04c380k_mode = { - .pixclock = 50000, - .xres = 640, - .yres = 480, - .bpp = 16, - .hsync_len = 1, - .left_margin = 0x9f, - .right_margin = 1, - .vsync_len = 44, - .upper_margin = 0, - .lower_margin = 0, - .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mode_info toshiba_ltm035a776c_mode = { - .pixclock = 110000, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 4, - .left_margin = 8, - .right_margin = 20, - .vsync_len = 3, - .upper_margin = 1, - .lower_margin = 10, - .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info mainstone_pxafb_info = { - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) -{ - int err; - - /* make sure SD/Memory Stick multiplexer's signals - * are routed to MMC controller - */ - MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; - - err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, 0, - "MMC card detect", data); - if (err) - printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); - - return err; -} - -static int mainstone_mci_setpower(struct device *dev, unsigned int vdd) -{ - struct pxamci_platform_data* p_d = dev->platform_data; - - if (( 1 << vdd) & p_d->ocr_mask) { - printk(KERN_DEBUG "%s: on\n", __func__); - MST_MSCWR1 |= MST_MSCWR1_MMC_ON; - MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; - } else { - printk(KERN_DEBUG "%s: off\n", __func__); - MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; - } - return 0; -} - -static void mainstone_mci_exit(struct device *dev, void *data) -{ - free_irq(MAINSTONE_MMC_IRQ, data); -} - -static struct pxamci_platform_data mainstone_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .init = mainstone_mci_init, - .setpower = mainstone_mci_setpower, - .exit = mainstone_mci_exit, -}; - -static void mainstone_irda_transceiver_mode(struct device *dev, int mode) -{ - unsigned long flags; - - local_irq_save(flags); - if (mode & IR_SIRMODE) { - MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; - } else if (mode & IR_FIRMODE) { - MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; - } - pxa2xx_transceiver_mode(dev, mode); - if (mode & IR_OFF) { - MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; - } else { - MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; - } - local_irq_restore(flags); -} - -static struct pxaficp_platform_data mainstone_ficp_platform_data = { - .gpio_pwdown = -1, - .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, - .transceiver_mode = mainstone_irda_transceiver_mode, -}; - -static struct gpio_keys_button gpio_keys_button[] = { - [0] = { - .desc = "wakeup", - .code = KEY_SUSPEND, - .type = EV_KEY, - .gpio = 1, - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data mainstone_gpio_keys = { - .buttons = gpio_keys_button, - .nbuttons = 1, -}; - -static struct platform_device mst_gpio_keys_device = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &mainstone_gpio_keys, - }, -}; - -static struct resource mst_cplds_resources[] = { - [0] = { - .start = MST_FPGA_PHYS + 0xc0, - .end = MST_FPGA_PHYS + 0xe0 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(0), - .end = PXA_GPIO_TO_IRQ(0), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - }, - [2] = { - .start = MAINSTONE_IRQ(0), - .end = MAINSTONE_IRQ(15), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mst_cplds_device = { - .name = "pxa_cplds_irqs", - .id = -1, - .resource = &mst_cplds_resources[0], - .num_resources = 3, -}; - -static struct platform_device *platform_devices[] __initdata = { - &smc91x_device, - &mst_flash_device[0], - &mst_flash_device[1], - &mst_gpio_keys_device, - &mst_cplds_device, -}; - -static struct pxaohci_platform_data mainstone_ohci_platform_data = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, -}; - -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int mainstone_matrix_keys[] = { - KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), - KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), - KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I), - KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L), - KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O), - KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R), - KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U), - KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X), - KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z), - - KEY(0, 4, KEY_DOT), /* . */ - KEY(1, 4, KEY_CLOSE), /* @ */ - KEY(4, 4, KEY_SLASH), - KEY(5, 4, KEY_BACKSLASH), - KEY(0, 5, KEY_HOME), - KEY(1, 5, KEY_LEFTSHIFT), - KEY(2, 5, KEY_SPACE), - KEY(3, 5, KEY_SPACE), - KEY(4, 5, KEY_ENTER), - KEY(5, 5, KEY_BACKSPACE), - - KEY(0, 6, KEY_UP), - KEY(1, 6, KEY_DOWN), - KEY(2, 6, KEY_LEFT), - KEY(3, 6, KEY_RIGHT), - KEY(4, 6, KEY_SELECT), -}; - -static struct matrix_keymap_data mainstone_matrix_keymap_data = { - .keymap = mainstone_matrix_keys, - .keymap_size = ARRAY_SIZE(mainstone_matrix_keys), -}; - -struct pxa27x_keypad_platform_data mainstone_keypad_info = { - .matrix_key_rows = 6, - .matrix_key_cols = 7, - .matrix_keymap_data = &mainstone_matrix_keymap_data, - - .enable_rotary0 = 1, - .rotary0_up_key = KEY_UP, - .rotary0_down_key = KEY_DOWN, - - .debounce_interval = 30, -}; - -static void __init mainstone_init_keypad(void) -{ - pxa_set_keypad_info(&mainstone_keypad_info); -} -#else -static inline void mainstone_init_keypad(void) {} -#endif - -static int mst_pcmcia0_irqs[11] = { - [0 ... 4] = -1, - [5] = MAINSTONE_S0_CD_IRQ, - [6 ... 7] = -1, - [8] = MAINSTONE_S0_STSCHG_IRQ, - [9] = -1, - [10] = MAINSTONE_S0_IRQ, -}; - -static int mst_pcmcia1_irqs[11] = { - [0 ... 4] = -1, - [5] = MAINSTONE_S1_CD_IRQ, - [6 ... 7] = -1, - [8] = MAINSTONE_S1_STSCHG_IRQ, - [9] = -1, - [10] = MAINSTONE_S1_IRQ, -}; - -static struct gpiod_lookup_table mainstone_pcmcia_gpio_table = { - .dev_id = "pxa2xx-pcmcia", - .table = { - GPIO_LOOKUP("mst-pcmcia0", 0, "a0vpp", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia0", 1, "a1vpp", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia0", 2, "a0vcc", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia0", 3, "a1vcc", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia0", 4, "areset", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia0", 5, "adetect", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("mst-pcmcia0", 6, "avs1", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("mst-pcmcia0", 7, "avs2", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("mst-pcmcia0", 8, "abvd1", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia0", 9, "abvd2", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia0", 10, "aready", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia1", 0, "b0vpp", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia1", 1, "b1vpp", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia1", 2, "b0vcc", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia1", 3, "b1vcc", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia1", 4, "breset", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia1", 5, "bdetect", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("mst-pcmcia1", 6, "bvs1", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("mst-pcmcia1", 7, "bvs2", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("mst-pcmcia1", 8, "bbvd1", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia1", 9, "bbvd2", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("mst-pcmcia1", 10, "bready", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table mainstone_wm97xx_gpio_table = { - .dev_id = "wm97xx-touch", - .table = { - GPIO_LOOKUP("gpio-pxa", 4, "touch", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init mainstone_init(void) -{ - int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ - - pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); - - /* Register board control register(s) as GPIOs */ - gpio_reg_init(NULL, (void __iomem *)&MST_PCMCIA0, -1, 11, - "mst-pcmcia0", MST_PCMCIA_INPUTS, 0, NULL, - NULL, mst_pcmcia0_irqs); - gpio_reg_init(NULL, (void __iomem *)&MST_PCMCIA1, -1, 11, - "mst-pcmcia1", MST_PCMCIA_INPUTS, 0, NULL, - NULL, mst_pcmcia1_irqs); - gpiod_add_lookup_table(&mainstone_pcmcia_gpio_table); - gpiod_add_lookup_table(&mainstone_wm97xx_gpio_table); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4; - mst_flash_data[1].width = 4; - - /* Compensate for SW7 which swaps the flash banks */ - mst_flash_data[SW7].name = "processor-flash"; - mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; - - printk(KERN_NOTICE "Mainstone configured to boot from %s\n", - mst_flash_data[0].name); - - /* system bus arbiter setting - * - Core_Park - * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 - */ - ARB_CNTRL = ARB_CORE_PARK | 0x234; - - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - - /* reading Mainstone's "Virtual Configuration Register" - might be handy to select LCD type here */ - if (0) - mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode; - else - mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; - - pxa_set_fb_info(NULL, &mainstone_pxafb_info); - mainstone_backlight_register(); - - pxa_set_mci_info(&mainstone_mci_platform_data); - pxa_set_ficp_info(&mainstone_ficp_platform_data); - pxa_set_ohci_info(&mainstone_ohci_platform_data); - pxa_set_i2c_info(NULL); - pxa_set_ac97_info(&mst_audio_ops); - - mainstone_init_keypad(); -} - - -static struct map_desc mainstone_io_desc[] __initdata = { - { /* CPLD */ - .virtual = MST_FPGA_VIRT, - .pfn = __phys_to_pfn(MST_FPGA_PHYS), - .length = 0x00100000, - .type = MT_DEVICE - } -}; - -static void __init mainstone_map_io(void) -{ - pxa27x_map_io(); - iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); - - /* for use I SRAM as framebuffer. */ - PSLR |= 0xF04; - PCFR = 0x66; -} - -/* - * Driver for the 8 discrete LEDs available for general use: - * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays - * so be sure to not monkey with them here. - */ - -#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS) -struct mainstone_led { - struct led_classdev cdev; - u8 mask; -}; - -/* - * The triggers lines up below will only be used if the - * LED triggers are compiled in. - */ -static const struct { - const char *name; - const char *trigger; -} mainstone_leds[] = { - { "mainstone:D28", "default-on", }, - { "mainstone:D27", "cpu0", }, - { "mainstone:D26", "heartbeat" }, - { "mainstone:D25", }, - { "mainstone:D24", }, - { "mainstone:D23", }, - { "mainstone:D22", }, - { "mainstone:D21", }, -}; - -static void mainstone_led_set(struct led_classdev *cdev, - enum led_brightness b) -{ - struct mainstone_led *led = container_of(cdev, - struct mainstone_led, cdev); - u32 reg = MST_LEDCTRL; - - if (b != LED_OFF) - reg |= led->mask; - else - reg &= ~led->mask; - - MST_LEDCTRL = reg; -} - -static enum led_brightness mainstone_led_get(struct led_classdev *cdev) -{ - struct mainstone_led *led = container_of(cdev, - struct mainstone_led, cdev); - u32 reg = MST_LEDCTRL; - - return (reg & led->mask) ? LED_FULL : LED_OFF; -} - -static int __init mainstone_leds_init(void) -{ - int i; - - if (!machine_is_mainstone()) - return -ENODEV; - - /* All ON */ - MST_LEDCTRL |= 0xff; - for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) { - struct mainstone_led *led; - - led = kzalloc(sizeof(*led), GFP_KERNEL); - if (!led) - break; - - led->cdev.name = mainstone_leds[i].name; - led->cdev.brightness_set = mainstone_led_set; - led->cdev.brightness_get = mainstone_led_get; - led->cdev.default_trigger = mainstone_leds[i].trigger; - led->mask = BIT(i); - - if (led_classdev_register(NULL, &led->cdev) < 0) { - kfree(led); - break; - } - } - - return 0; -} - -/* - * Since we may have triggers on any subsystem, defer registration - * until after subsystem_init. - */ -fs_initcall(mainstone_leds_init); -#endif - -MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") - /* Maintainer: MontaVista Software Inc. */ - .atag_offset = 0x100, /* BLOB boot parameter setting */ - .map_io = mainstone_map_io, - .nr_irqs = MAINSTONE_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = mainstone_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/mainstone.h b/arch/arm/mach-pxa/mainstone.h deleted file mode 100644 index f116c56cf5d9..000000000000 --- a/arch/arm/mach-pxa/mainstone.h +++ /dev/null @@ -1,140 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Author: Nicolas Pitre - * Created: Nov 14, 2002 - * Copyright: MontaVista Software Inc. - */ - -#ifndef ASM_ARCH_MAINSTONE_H -#define ASM_ARCH_MAINSTONE_H - -#include "irqs.h" - -#define MST_ETH_PHYS PXA_CS4_PHYS - -#define MST_FPGA_PHYS PXA_CS2_PHYS -#define MST_FPGA_VIRT (0xf0000000) -#define MST_P2V(x) ((x) - MST_FPGA_PHYS + MST_FPGA_VIRT) -#define MST_V2P(x) ((x) - MST_FPGA_VIRT + MST_FPGA_PHYS) - -#ifndef __ASSEMBLY__ -# define __MST_REG(x) (*((volatile unsigned long *)MST_P2V(x))) -#else -# define __MST_REG(x) MST_P2V(x) -#endif - -/* board level registers in the FPGA */ - -#define MST_LEDDAT1 __MST_REG(0x08000010) -#define MST_LEDDAT2 __MST_REG(0x08000014) -#define MST_LEDCTRL __MST_REG(0x08000040) -#define MST_GPSWR __MST_REG(0x08000060) -#define MST_MSCWR1 __MST_REG(0x08000080) -#define MST_MSCWR2 __MST_REG(0x08000084) -#define MST_MSCWR3 __MST_REG(0x08000088) -#define MST_MSCRD __MST_REG(0x08000090) -#define MST_INTMSKENA __MST_REG(0x080000c0) -#define MST_INTSETCLR __MST_REG(0x080000d0) -#define MST_PCMCIA0 __MST_REG(0x080000e0) -#define MST_PCMCIA1 __MST_REG(0x080000e4) - -#define MST_MSCWR1_CAMERA_ON (1 << 15) /* Camera interface power control */ -#define MST_MSCWR1_CAMERA_SEL (1 << 14) /* Camera interface mux control */ -#define MST_MSCWR1_LCD_CTL (1 << 13) /* General-purpose LCD control */ -#define MST_MSCWR1_MS_ON (1 << 12) /* Memory Stick power control */ -#define MST_MSCWR1_MMC_ON (1 << 11) /* MultiMediaCard* power control */ -#define MST_MSCWR1_MS_SEL (1 << 10) /* SD/MS multiplexer control */ -#define MST_MSCWR1_BB_SEL (1 << 9) /* PCMCIA/Baseband multiplexer */ -#define MST_MSCWR1_BT_ON (1 << 8) /* Bluetooth UART transceiver */ -#define MST_MSCWR1_BTDTR (1 << 7) /* Bluetooth UART DTR */ - -#define MST_MSCWR1_IRDA_MASK (3 << 5) /* IrDA transceiver mode */ -#define MST_MSCWR1_IRDA_FULL (0 << 5) /* full distance power */ -#define MST_MSCWR1_IRDA_OFF (1 << 5) /* shutdown */ -#define MST_MSCWR1_IRDA_MED (2 << 5) /* 2/3 distance power */ -#define MST_MSCWR1_IRDA_LOW (3 << 5) /* 1/3 distance power */ - -#define MST_MSCWR1_IRDA_FIR (1 << 4) /* IrDA transceiver SIR/FIR */ -#define MST_MSCWR1_GREENLED (1 << 3) /* LED D1 control */ -#define MST_MSCWR1_PDC_CTL (1 << 2) /* reserved */ -#define MST_MSCWR1_MTR_ON (1 << 1) /* Silent alert motor */ -#define MST_MSCWR1_SYSRESET (1 << 0) /* System reset */ - -#define MST_MSCWR2_USB_OTG_RST (1 << 6) /* USB On The Go reset */ -#define MST_MSCWR2_USB_OTG_SEL (1 << 5) /* USB On The Go control */ -#define MST_MSCWR2_nUSBC_SC (1 << 4) /* USB client soft connect control */ -#define MST_MSCWR2_I2S_SPKROFF (1 << 3) /* I2S CODEC amplifier control */ -#define MST_MSCWR2_AC97_SPKROFF (1 << 2) /* AC97 CODEC amplifier control */ -#define MST_MSCWR2_RADIO_PWR (1 << 1) /* Radio module power control */ -#define MST_MSCWR2_RADIO_WAKE (1 << 0) /* Radio module wake-up signal */ - -#define MST_MSCWR3_GPIO_RESET_EN (1 << 2) /* Enable GPIO Reset */ -#define MST_MSCWR3_GPIO_RESET (1 << 1) /* Initiate a GPIO Reset */ -#define MST_MSCWR3_COMMS_SW_RESET (1 << 0) /* Communications Processor Reset Control */ - -#define MST_MSCRD_nPENIRQ (1 << 9) /* ADI7873* nPENIRQ signal */ -#define MST_MSCRD_nMEMSTK_CD (1 << 8) /* Memory Stick detection signal */ -#define MST_MSCRD_nMMC_CD (1 << 7) /* SD/MMC card detection signal */ -#define MST_MSCRD_nUSIM_CD (1 << 6) /* USIM card detection signal */ -#define MST_MSCRD_USB_CBL (1 << 5) /* USB client cable status */ -#define MST_MSCRD_TS_BUSY (1 << 4) /* ADI7873 busy */ -#define MST_MSCRD_BTDSR (1 << 3) /* Bluetooth UART DSR */ -#define MST_MSCRD_BTRI (1 << 2) /* Bluetooth UART Ring Indicator */ -#define MST_MSCRD_BTDCD (1 << 1) /* Bluetooth UART DCD */ -#define MST_MSCRD_nMMC_WP (1 << 0) /* SD/MMC write-protect status */ - -#define MST_INT_S1_IRQ (1 << 15) /* PCMCIA socket 1 IRQ */ -#define MST_INT_S1_STSCHG (1 << 14) /* PCMCIA socket 1 status changed */ -#define MST_INT_S1_CD (1 << 13) /* PCMCIA socket 1 card detection */ -#define MST_INT_S0_IRQ (1 << 11) /* PCMCIA socket 0 IRQ */ -#define MST_INT_S0_STSCHG (1 << 10) /* PCMCIA socket 0 status changed */ -#define MST_INT_S0_CD (1 << 9) /* PCMCIA socket 0 card detection */ -#define MST_INT_nEXBRD_INT (1 << 7) /* Expansion board IRQ */ -#define MST_INT_MSINS (1 << 6) /* Memory Stick* detection */ -#define MST_INT_PENIRQ (1 << 5) /* ADI7873* touch-screen IRQ */ -#define MST_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */ -#define MST_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ -#define MST_INT_USBC (1 << 2) /* USB client cable detection IRQ */ -#define MST_INT_USIM (1 << 1) /* USIM card detection IRQ */ -#define MST_INT_MMC (1 << 0) /* MMC/SD card detection IRQ */ - -#define MST_PCMCIA_nIRQ (1 << 10) /* IRQ / ready signal */ -#define MST_PCMCIA_nSPKR_BVD2 (1 << 9) /* VDD sense / digital speaker */ -#define MST_PCMCIA_nSTSCHG_BVD1 (1 << 8) /* VDD sense / card status changed */ -#define MST_PCMCIA_nVS2 (1 << 7) /* VSS voltage sense */ -#define MST_PCMCIA_nVS1 (1 << 6) /* VSS voltage sense */ -#define MST_PCMCIA_nCD (1 << 5) /* Card detection signal */ -#define MST_PCMCIA_RESET (1 << 4) /* Card reset signal */ -#define MST_PCMCIA_PWR_MASK (0x000f) /* MAX1602 power-supply controls */ - -#define MST_PCMCIA_PWR_VPP_0 0x0 /* voltage VPP = 0V */ -#define MST_PCMCIA_PWR_VPP_120 0x2 /* voltage VPP = 12V*/ -#define MST_PCMCIA_PWR_VPP_VCC 0x1 /* voltage VPP = VCC */ -#define MST_PCMCIA_PWR_VCC_0 0x0 /* voltage VCC = 0V */ -#define MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */ -#define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ - -#define MST_PCMCIA_INPUTS \ - (MST_PCMCIA_nIRQ | MST_PCMCIA_nSPKR_BVD2 | MST_PCMCIA_nSTSCHG_BVD1 | \ - MST_PCMCIA_nVS2 | MST_PCMCIA_nVS1 | MST_PCMCIA_nCD) - -/* board specific IRQs */ -#define MAINSTONE_NR_IRQS IRQ_BOARD_START - -#define MAINSTONE_IRQ(x) (MAINSTONE_NR_IRQS + (x)) -#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) -#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) -#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) -#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) -#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) -#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) -#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) -#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) -#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) -#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) -#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) -#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) -#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) -#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) - -#endif diff --git a/arch/arm/mach-pxa/mfp-pxa25x.h b/arch/arm/mach-pxa/mfp-pxa25x.h index d0ebb2154503..3dc5c833e28f 100644 --- a/arch/arm/mach-pxa/mfp-pxa25x.h +++ b/arch/arm/mach-pxa/mfp-pxa25x.h @@ -158,39 +158,6 @@ #define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) #define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) -#ifdef CONFIG_CPU_PXA26x -/* GPIO */ -#define GPIO85_GPIO MFP_CFG_IN(GPIO85, AF0) -#define GPIO86_GPIO MFP_CFG_IN(GPIO86, AF1) -#define GPIO87_GPIO MFP_CFG_IN(GPIO87, AF1) -#define GPIO88_GPIO MFP_CFG_IN(GPIO88, AF1) -#define GPIO89_GPIO MFP_CFG_IN(GPIO89, AF1) - -/* SDRAM */ -#define GPIO86_nSDCS2 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH) -#define GPIO87_nSDCS3 MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH) -#define GPIO88_RDnWR MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH) - -/* USB */ -#define GPIO9_USB_RCV MFP_CFG_IN(GPIO9, AF1) -#define GPIO32_USB_VP MFP_CFG_IN(GPIO32, AF2) -#define GPIO34_USB_VM MFP_CFG_IN(GPIO34, AF2) -#define GPIO39_USB_VPO MFP_CFG_OUT(GPIO39, AF3, DRIVE_LOW) -#define GPIO56_USB_VMO MFP_CFG_OUT(GPIO56, AF1, DRIVE_LOW) -#define GPIO57_USB_nOE MFP_CFG_OUT(GPIO57, AF1, DRIVE_HIGH) - -/* ASSP */ -#define GPIO28_ASSP_BITCLK_IN MFP_CFG_IN(GPIO28, AF3) -#define GPIO28_ASSP_BITCLK_OUT MFP_CFG_OUT(GPIO28, AF3, DRIVE_LOW) -#define GPIO29_ASSP_RXD MFP_CFG_IN(GPIO29, AF3) -#define GPIO30_ASSP_TXD MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW) -#define GPIO31_ASSP_SFRM_IN MFP_CFG_IN(GPIO31, AF1) -#define GPIO31_ASSP_SFRM_OUT MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW) - -/* AC97 */ -#define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH) -#endif /* CONFIG_CPU_PXA26x */ - /* commonly used pin configurations */ #define GPIOxx_LCD_16BPP \ GPIO58_LCD_LDD_0, \ diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index 57b0782880de..b556452dfcf9 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c @@ -226,11 +226,7 @@ static void __init pxa25x_mfp_init(void) int i; /* running before pxa_gpio_probe() */ -#ifdef CONFIG_CPU_PXA26x - pxa_last_gpio = 89; -#else pxa_last_gpio = 84; -#endif for (i = 0; i <= pxa_last_gpio; i++) gpio_desc[i].valid = 1; diff --git a/arch/arm/mach-pxa/mfp-pxa930.h b/arch/arm/mach-pxa/mfp-pxa930.h deleted file mode 100644 index 0d195d3a8c61..000000000000 --- a/arch/arm/mach-pxa/mfp-pxa930.h +++ /dev/null @@ -1,495 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-pxa/include/mach/mfp-pxa930.h - * - * PXA930 specific MFP configuration definitions - * - * Copyright (C) 2007-2008 Marvell International Ltd. - */ - -#ifndef __ASM_ARCH_MFP_PXA9xx_H -#define __ASM_ARCH_MFP_PXA9xx_H - -#include "mfp-pxa3xx.h" - -/* GPIO */ -#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) -#define GPIO49_GPIO MFP_CFG(GPIO49, AF0) -#define GPIO50_GPIO MFP_CFG(GPIO50, AF0) -#define GPIO51_GPIO MFP_CFG(GPIO51, AF0) -#define GPIO52_GPIO MFP_CFG(GPIO52, AF0) -#define GPIO56_GPIO MFP_CFG(GPIO56, AF0) -#define GPIO58_GPIO MFP_CFG(GPIO58, AF0) -#define GPIO59_GPIO MFP_CFG(GPIO59, AF0) -#define GPIO60_GPIO MFP_CFG(GPIO60, AF0) -#define GPIO61_GPIO MFP_CFG(GPIO61, AF0) -#define GPIO62_GPIO MFP_CFG(GPIO62, AF0) - -#define GSIM_UCLK_GPIO_79 MFP_CFG(GSIM_UCLK, AF0) -#define GSIM_UIO_GPIO_80 MFP_CFG(GSIM_UIO, AF0) -#define GSIM_nURST_GPIO_81 MFP_CFG(GSIM_nURST, AF0) -#define GSIM_UDET_GPIO_82 MFP_CFG(GSIM_UDET, AF0) - -#define DF_IO15_GPIO_28 MFP_CFG(DF_IO15, AF0) -#define DF_IO14_GPIO_29 MFP_CFG(DF_IO14, AF0) -#define DF_IO13_GPIO_30 MFP_CFG(DF_IO13, AF0) -#define DF_IO12_GPIO_31 MFP_CFG(DF_IO12, AF0) -#define DF_IO11_GPIO_32 MFP_CFG(DF_IO11, AF0) -#define DF_IO10_GPIO_33 MFP_CFG(DF_IO10, AF0) -#define DF_IO9_GPIO_34 MFP_CFG(DF_IO9, AF0) -#define DF_IO8_GPIO_35 MFP_CFG(DF_IO8, AF0) -#define DF_IO7_GPIO_36 MFP_CFG(DF_IO7, AF0) -#define DF_IO6_GPIO_37 MFP_CFG(DF_IO6, AF0) -#define DF_IO5_GPIO_38 MFP_CFG(DF_IO5, AF0) -#define DF_IO4_GPIO_39 MFP_CFG(DF_IO4, AF0) -#define DF_IO3_GPIO_40 MFP_CFG(DF_IO3, AF0) -#define DF_IO2_GPIO_41 MFP_CFG(DF_IO2, AF0) -#define DF_IO1_GPIO_42 MFP_CFG(DF_IO1, AF0) -#define DF_IO0_GPIO_43 MFP_CFG(DF_IO0, AF0) -#define DF_nCS0_GPIO_44 MFP_CFG(DF_nCS0, AF0) -#define DF_nCS1_GPIO_45 MFP_CFG(DF_nCS1, AF0) -#define DF_nWE_GPIO_46 MFP_CFG(DF_nWE, AF0) -#define DF_nRE_nOE_GPIO_47 MFP_CFG(DF_nRE_nOE, AF0) -#define DF_CLE_nOE_GPIO_48 MFP_CFG(DF_CLE_nOE, AF0) -#define DF_nADV1_ALE_GPIO_49 MFP_CFG(DF_nADV1_ALE, AF0) -#define DF_nADV2_ALE_GPIO_50 MFP_CFG(DF_nADV2_ALE, AF0) -#define DF_INT_RnB_GPIO_51 MFP_CFG(DF_INT_RnB, AF0) -#define DF_SCLK_E_GPIO_52 MFP_CFG(DF_SCLK_E, AF0) - -#define DF_ADDR0_GPIO_53 MFP_CFG(DF_ADDR0, AF0) -#define DF_ADDR1_GPIO_54 MFP_CFG(DF_ADDR1, AF0) -#define DF_ADDR2_GPIO_55 MFP_CFG(DF_ADDR2, AF0) -#define DF_ADDR3_GPIO_56 MFP_CFG(DF_ADDR3, AF0) -#define nXCVREN_GPIO_57 MFP_CFG(nXCVREN, AF0) -#define nLUA_GPIO_58 MFP_CFG(nLUA, AF0) -#define nLLA_GPIO_59 MFP_CFG(nLLA, AF0) -#define nBE0_GPIO_60 MFP_CFG(nBE0, AF0) -#define nBE1_GPIO_61 MFP_CFG(nBE1, AF0) -#define RDY_GPIO_62 MFP_CFG(RDY, AF0) -#define PMIC_INT_GPIO83 MFP_CFG_LPM(PMIC_INT, AF0, PULL_HIGH) - -/* Chip Select */ -#define DF_nCS0_nCS2 MFP_CFG_LPM(DF_nCS0, AF3, PULL_HIGH) -#define DF_nCS1_nCS3 MFP_CFG_LPM(DF_nCS1, AF3, PULL_HIGH) - -/* AC97 */ -#define GPIO83_BAC97_SYSCLK MFP_CFG(GPIO83, AF3) -#define GPIO84_BAC97_SDATA_IN0 MFP_CFG(GPIO84, AF3) -#define GPIO85_BAC97_BITCLK MFP_CFG(GPIO85, AF3) -#define GPIO86_BAC97_nRESET MFP_CFG(GPIO86, AF3) -#define GPIO87_BAC97_SYNC MFP_CFG(GPIO87, AF3) -#define GPIO88_BAC97_SDATA_OUT MFP_CFG(GPIO88, AF3) - -/* I2C */ -#define GPIO39_CI2C_SCL MFP_CFG_LPM(GPIO39, AF3, PULL_HIGH) -#define GPIO40_CI2C_SDA MFP_CFG_LPM(GPIO40, AF3, PULL_HIGH) - -#define GPIO51_CI2C_SCL MFP_CFG_LPM(GPIO51, AF3, PULL_HIGH) -#define GPIO52_CI2C_SDA MFP_CFG_LPM(GPIO52, AF3, PULL_HIGH) - -#define GPIO63_CI2C_SCL MFP_CFG_LPM(GPIO63, AF4, PULL_HIGH) -#define GPIO64_CI2C_SDA MFP_CFG_LPM(GPIO64, AF4, PULL_HIGH) - -#define GPIO73_CI2C_SCL MFP_CFG_LPM(GPIO73, AF1, PULL_HIGH) -#define GPIO74_CI2C_SDA MFP_CFG_LPM(GPIO74, AF1, PULL_HIGH) - -#define GPIO77_CI2C_SCL MFP_CFG_LPM(GPIO77, AF2, PULL_HIGH) -#define GPIO78_CI2C_SDA MFP_CFG_LPM(GPIO78, AF2, PULL_HIGH) - -#define GPIO89_CI2C_SCL MFP_CFG_LPM(GPIO89, AF1, PULL_HIGH) -#define GPIO90_CI2C_SDA MFP_CFG_LPM(GPIO90, AF1, PULL_HIGH) - -#define GPIO95_CI2C_SCL MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH) -#define GPIO96_CI2C_SDA MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH) - -#define GPIO97_CI2C_SCL MFP_CFG_LPM(GPIO97, AF3, PULL_HIGH) -#define GPIO98_CI2C_SDA MFP_CFG_LPM(GPIO98, AF3, PULL_HIGH) - -/* QCI */ -#define GPIO63_CI_DD_9 MFP_CFG_LPM(GPIO63, AF1, PULL_LOW) -#define GPIO64_CI_DD_8 MFP_CFG_LPM(GPIO64, AF1, PULL_LOW) -#define GPIO65_CI_DD_7 MFP_CFG_LPM(GPIO65, AF1, PULL_LOW) -#define GPIO66_CI_DD_6 MFP_CFG_LPM(GPIO66, AF1, PULL_LOW) -#define GPIO67_CI_DD_5 MFP_CFG_LPM(GPIO67, AF1, PULL_LOW) -#define GPIO68_CI_DD_4 MFP_CFG_LPM(GPIO68, AF1, PULL_LOW) -#define GPIO69_CI_DD_3 MFP_CFG_LPM(GPIO69, AF1, PULL_LOW) -#define GPIO70_CI_DD_2 MFP_CFG_LPM(GPIO70, AF1, PULL_LOW) -#define GPIO71_CI_DD_1 MFP_CFG_LPM(GPIO71, AF1, PULL_LOW) -#define GPIO72_CI_DD_0 MFP_CFG_LPM(GPIO72, AF1, PULL_LOW) -#define GPIO73_CI_HSYNC MFP_CFG_LPM(GPIO73, AF1, PULL_LOW) -#define GPIO74_CI_VSYNC MFP_CFG_LPM(GPIO74, AF1, PULL_LOW) -#define GPIO75_CI_MCLK MFP_CFG_LPM(GPIO75, AF1, PULL_LOW) -#define GPIO76_CI_PCLK MFP_CFG_LPM(GPIO76, AF1, PULL_LOW) - -/* KEYPAD */ -#define GPIO4_KP_DKIN_4 MFP_CFG_LPM(GPIO4, AF3, FLOAT) -#define GPIO5_KP_DKIN_5 MFP_CFG_LPM(GPIO5, AF3, FLOAT) -#define GPIO6_KP_DKIN_6 MFP_CFG_LPM(GPIO6, AF3, FLOAT) -#define GPIO7_KP_DKIN_7 MFP_CFG_LPM(GPIO7, AF3, FLOAT) -#define GPIO8_KP_DKIN_4 MFP_CFG_LPM(GPIO8, AF3, FLOAT) -#define GPIO9_KP_DKIN_5 MFP_CFG_LPM(GPIO9, AF3, FLOAT) -#define GPIO10_KP_DKIN_6 MFP_CFG_LPM(GPIO10, AF3, FLOAT) -#define GPIO11_KP_DKIN_7 MFP_CFG_LPM(GPIO11, AF3, FLOAT) - -#define GPIO12_KP_DKIN_0 MFP_CFG_LPM(GPIO12, AF2, FLOAT) -#define GPIO13_KP_DKIN_1 MFP_CFG_LPM(GPIO13, AF2, FLOAT) -#define GPIO14_KP_DKIN_2 MFP_CFG_LPM(GPIO14, AF2, FLOAT) -#define GPIO15_KP_DKIN_3 MFP_CFG_LPM(GPIO15, AF2, FLOAT) - -#define GPIO41_KP_DKIN_0 MFP_CFG_LPM(GPIO41, AF2, FLOAT) -#define GPIO42_KP_DKIN_1 MFP_CFG_LPM(GPIO42, AF2, FLOAT) -#define GPIO43_KP_DKIN_2 MFP_CFG_LPM(GPIO43, AF2, FLOAT) -#define GPIO44_KP_DKIN_3 MFP_CFG_LPM(GPIO44, AF2, FLOAT) -#define GPIO41_KP_DKIN_4 MFP_CFG_LPM(GPIO41, AF4, FLOAT) -#define GPIO42_KP_DKIN_5 MFP_CFG_LPM(GPIO42, AF4, FLOAT) - -#define GPIO0_KP_MKIN_0 MFP_CFG_LPM(GPIO0, AF1, FLOAT) -#define GPIO2_KP_MKIN_1 MFP_CFG_LPM(GPIO2, AF1, FLOAT) -#define GPIO4_KP_MKIN_2 MFP_CFG_LPM(GPIO4, AF1, FLOAT) -#define GPIO6_KP_MKIN_3 MFP_CFG_LPM(GPIO6, AF1, FLOAT) -#define GPIO8_KP_MKIN_4 MFP_CFG_LPM(GPIO8, AF1, FLOAT) -#define GPIO10_KP_MKIN_5 MFP_CFG_LPM(GPIO10, AF1, FLOAT) -#define GPIO12_KP_MKIN_6 MFP_CFG_LPM(GPIO12, AF1, FLOAT) -#define GPIO14_KP_MKIN_7 MFP_CFG(GPIO14, AF1) -#define GPIO35_KP_MKIN_5 MFP_CFG(GPIO35, AF4) - -#define GPIO1_KP_MKOUT_0 MFP_CFG_LPM(GPIO1, AF1, DRIVE_HIGH) -#define GPIO3_KP_MKOUT_1 MFP_CFG_LPM(GPIO3, AF1, DRIVE_HIGH) -#define GPIO5_KP_MKOUT_2 MFP_CFG_LPM(GPIO5, AF1, DRIVE_HIGH) -#define GPIO7_KP_MKOUT_3 MFP_CFG_LPM(GPIO7, AF1, DRIVE_HIGH) -#define GPIO9_KP_MKOUT_4 MFP_CFG_LPM(GPIO9, AF1, DRIVE_HIGH) -#define GPIO11_KP_MKOUT_5 MFP_CFG_LPM(GPIO11, AF1, DRIVE_HIGH) -#define GPIO13_KP_MKOUT_6 MFP_CFG_LPM(GPIO13, AF1, DRIVE_HIGH) -#define GPIO15_KP_MKOUT_7 MFP_CFG_LPM(GPIO15, AF1, DRIVE_HIGH) -#define GPIO36_KP_MKOUT_5 MFP_CFG_LPM(GPIO36, AF4, DRIVE_HIGH) - -/* LCD */ -#define GPIO17_LCD_FCLK_RD MFP_CFG(GPIO17, AF1) -#define GPIO18_LCD_LCLK_A0 MFP_CFG(GPIO18, AF1) -#define GPIO19_LCD_PCLK_WR MFP_CFG(GPIO19, AF1) -#define GPIO20_LCD_BIAS MFP_CFG(GPIO20, AF1) -#define GPIO21_LCD_CS MFP_CFG(GPIO21, AF1) -#define GPIO22_LCD_CS2 MFP_CFG(GPIO22, AF2) -#define GPIO22_LCD_VSYNC MFP_CFG(GPIO22, AF1) -#define GPIO23_LCD_DD0 MFP_CFG(GPIO23, AF1) -#define GPIO24_LCD_DD1 MFP_CFG(GPIO24, AF1) -#define GPIO25_LCD_DD2 MFP_CFG(GPIO25, AF1) -#define GPIO26_LCD_DD3 MFP_CFG(GPIO26, AF1) -#define GPIO27_LCD_DD4 MFP_CFG(GPIO27, AF1) -#define GPIO28_LCD_DD5 MFP_CFG(GPIO28, AF1) -#define GPIO29_LCD_DD6 MFP_CFG(GPIO29, AF1) -#define GPIO30_LCD_DD7 MFP_CFG(GPIO30, AF1) -#define GPIO31_LCD_DD8 MFP_CFG(GPIO31, AF1) -#define GPIO32_LCD_DD9 MFP_CFG(GPIO32, AF1) -#define GPIO33_LCD_DD10 MFP_CFG(GPIO33, AF1) -#define GPIO34_LCD_DD11 MFP_CFG(GPIO34, AF1) -#define GPIO35_LCD_DD12 MFP_CFG(GPIO35, AF1) -#define GPIO36_LCD_DD13 MFP_CFG(GPIO36, AF1) -#define GPIO37_LCD_DD14 MFP_CFG(GPIO37, AF1) -#define GPIO38_LCD_DD15 MFP_CFG(GPIO38, AF1) -#define GPIO39_LCD_DD16 MFP_CFG(GPIO39, AF1) -#define GPIO40_LCD_DD17 MFP_CFG(GPIO40, AF1) -#define GPIO41_LCD_CS2 MFP_CFG(GPIO41, AF3) -#define GPIO42_LCD_VSYNC2 MFP_CFG(GPIO42, AF3) -#define GPIO44_LCD_DD7 MFP_CFG(GPIO44, AF1) - -/* Mini-LCD */ -#define GPIO17_MLCD_FCLK MFP_CFG(GPIO17, AF3) -#define GPIO18_MLCD_LCLK MFP_CFG(GPIO18, AF3) -#define GPIO19_MLCD_PCLK MFP_CFG(GPIO19, AF3) -#define GPIO20_MLCD_BIAS MFP_CFG(GPIO20, AF3) -#define GPIO23_MLCD_DD0 MFP_CFG(GPIO23, AF3) -#define GPIO24_MLCD_DD1 MFP_CFG(GPIO24, AF3) -#define GPIO25_MLCD_DD2 MFP_CFG(GPIO25, AF3) -#define GPIO26_MLCD_DD3 MFP_CFG(GPIO26, AF3) -#define GPIO27_MLCD_DD4 MFP_CFG(GPIO27, AF3) -#define GPIO28_MLCD_DD5 MFP_CFG(GPIO28, AF3) -#define GPIO29_MLCD_DD6 MFP_CFG(GPIO29, AF3) -#define GPIO30_MLCD_DD7 MFP_CFG(GPIO30, AF3) -#define GPIO31_MLCD_DD8 MFP_CFG(GPIO31, AF3) -#define GPIO32_MLCD_DD9 MFP_CFG(GPIO32, AF3) -#define GPIO33_MLCD_DD10 MFP_CFG(GPIO33, AF3) -#define GPIO34_MLCD_DD11 MFP_CFG(GPIO34, AF3) -#define GPIO35_MLCD_DD12 MFP_CFG(GPIO35, AF3) -#define GPIO36_MLCD_DD13 MFP_CFG(GPIO36, AF3) -#define GPIO37_MLCD_DD14 MFP_CFG(GPIO37, AF3) -#define GPIO38_MLCD_DD15 MFP_CFG(GPIO38, AF3) -#define GPIO44_MLCD_DD7 MFP_CFG(GPIO44, AF5) - -/* MMC1 */ -#define GPIO10_MMC1_DAT3 MFP_CFG(GPIO10, AF4) -#define GPIO11_MMC1_DAT2 MFP_CFG(GPIO11, AF4) -#define GPIO12_MMC1_DAT1 MFP_CFG(GPIO12, AF4) -#define GPIO13_MMC1_DAT0 MFP_CFG(GPIO13, AF4) -#define GPIO14_MMC1_CMD MFP_CFG(GPIO14, AF4) -#define GPIO15_MMC1_CLK MFP_CFG(GPIO15, AF4) -#define GPIO55_MMC1_CMD MFP_CFG(GPIO55, AF3) -#define GPIO56_MMC1_CLK MFP_CFG(GPIO56, AF3) -#define GPIO57_MMC1_DAT0 MFP_CFG(GPIO57, AF3) -#define GPIO58_MMC1_DAT1 MFP_CFG(GPIO58, AF3) -#define GPIO59_MMC1_DAT2 MFP_CFG(GPIO59, AF3) -#define GPIO60_MMC1_DAT3 MFP_CFG(GPIO60, AF3) - -#define DF_ADDR0_MMC1_CLK MFP_CFG(DF_ADDR0, AF2) -#define DF_ADDR1_MMC1_CMD MFP_CFG(DF_ADDR1, AF2) -#define DF_ADDR2_MMC1_DAT0 MFP_CFG(DF_ADDR2, AF2) -#define DF_ADDR3_MMC1_DAT1 MFP_CFG(DF_ADDR3, AF3) -#define nXCVREN_MMC1_DAT2 MFP_CFG(nXCVREN, AF2) - -/* MMC2 */ -#define GPIO31_MMC2_CMD MFP_CFG(GPIO31, AF7) -#define GPIO32_MMC2_CLK MFP_CFG(GPIO32, AF7) -#define GPIO33_MMC2_DAT0 MFP_CFG(GPIO33, AF7) -#define GPIO34_MMC2_DAT1 MFP_CFG(GPIO34, AF7) -#define GPIO35_MMC2_DAT2 MFP_CFG(GPIO35, AF7) -#define GPIO36_MMC2_DAT3 MFP_CFG(GPIO36, AF7) - -#define GPIO101_MMC2_DAT3 MFP_CFG(GPIO101, AF1) -#define GPIO102_MMC2_DAT2 MFP_CFG(GPIO102, AF1) -#define GPIO103_MMC2_DAT1 MFP_CFG(GPIO103, AF1) -#define GPIO104_MMC2_DAT0 MFP_CFG(GPIO104, AF1) -#define GPIO105_MMC2_CMD MFP_CFG(GPIO105, AF1) -#define GPIO106_MMC2_CLK MFP_CFG(GPIO106, AF1) - -#define DF_IO10_MMC2_DAT3 MFP_CFG(DF_IO10, AF3) -#define DF_IO11_MMC2_DAT2 MFP_CFG(DF_IO11, AF3) -#define DF_IO12_MMC2_DAT1 MFP_CFG(DF_IO12, AF3) -#define DF_IO13_MMC2_DAT0 MFP_CFG(DF_IO13, AF3) -#define DF_IO14_MMC2_CLK MFP_CFG(DF_IO14, AF3) -#define DF_IO15_MMC2_CMD MFP_CFG(DF_IO15, AF3) - -/* BSSP1 */ -#define GPIO12_BSSP1_CLK MFP_CFG(GPIO12, AF3) -#define GPIO13_BSSP1_FRM MFP_CFG(GPIO13, AF3) -#define GPIO14_BSSP1_RXD MFP_CFG(GPIO14, AF3) -#define GPIO15_BSSP1_TXD MFP_CFG(GPIO15, AF3) -#define GPIO97_BSSP1_CLK MFP_CFG(GPIO97, AF5) -#define GPIO98_BSSP1_FRM MFP_CFG(GPIO98, AF5) - -/* BSSP2 */ -#define GPIO84_BSSP2_SDATA_IN MFP_CFG(GPIO84, AF1) -#define GPIO85_BSSP2_BITCLK MFP_CFG(GPIO85, AF1) -#define GPIO86_BSSP2_SYSCLK MFP_CFG(GPIO86, AF1) -#define GPIO87_BSSP2_SYNC MFP_CFG(GPIO87, AF1) -#define GPIO88_BSSP2_DATA_OUT MFP_CFG(GPIO88, AF1) -#define GPIO86_BSSP2_SDATA_IN MFP_CFG(GPIO86, AF4) - -/* BSSP3 */ -#define GPIO79_BSSP3_CLK MFP_CFG(GPIO79, AF1) -#define GPIO80_BSSP3_FRM MFP_CFG(GPIO80, AF1) -#define GPIO81_BSSP3_TXD MFP_CFG(GPIO81, AF1) -#define GPIO82_BSSP3_RXD MFP_CFG(GPIO82, AF1) -#define GPIO83_BSSP3_SYSCLK MFP_CFG(GPIO83, AF1) - -/* BSSP4 */ -#define GPIO43_BSSP4_CLK MFP_CFG(GPIO43, AF4) -#define GPIO44_BSSP4_FRM MFP_CFG(GPIO44, AF4) -#define GPIO45_BSSP4_TXD MFP_CFG(GPIO45, AF4) -#define GPIO46_BSSP4_RXD MFP_CFG(GPIO46, AF4) - -#define GPIO51_BSSP4_CLK MFP_CFG(GPIO51, AF4) -#define GPIO52_BSSP4_FRM MFP_CFG(GPIO52, AF4) -#define GPIO53_BSSP4_TXD MFP_CFG(GPIO53, AF4) -#define GPIO54_BSSP4_RXD MFP_CFG(GPIO54, AF4) - -/* GSSP1 */ -#define GPIO79_GSSP1_CLK MFP_CFG(GPIO79, AF2) -#define GPIO80_GSSP1_FRM MFP_CFG(GPIO80, AF2) -#define GPIO81_GSSP1_TXD MFP_CFG(GPIO81, AF2) -#define GPIO82_GSSP1_RXD MFP_CFG(GPIO82, AF2) -#define GPIO83_GSSP1_SYSCLK MFP_CFG(GPIO83, AF2) - -#define GPIO93_GSSP1_CLK MFP_CFG(GPIO93, AF4) -#define GPIO94_GSSP1_FRM MFP_CFG(GPIO94, AF4) -#define GPIO95_GSSP1_TXD MFP_CFG(GPIO95, AF4) -#define GPIO96_GSSP1_RXD MFP_CFG(GPIO96, AF4) - -/* GSSP2 */ -#define GPIO47_GSSP2_CLK MFP_CFG(GPIO47, AF4) -#define GPIO48_GSSP2_FRM MFP_CFG(GPIO48, AF4) -#define GPIO49_GSSP2_RXD MFP_CFG(GPIO49, AF4) -#define GPIO50_GSSP2_TXD MFP_CFG(GPIO50, AF4) - -#define GPIO69_GSSP2_CLK MFP_CFG(GPIO69, AF4) -#define GPIO70_GSSP2_FRM MFP_CFG(GPIO70, AF4) -#define GPIO71_GSSP2_RXD MFP_CFG(GPIO71, AF4) -#define GPIO72_GSSP2_TXD MFP_CFG(GPIO72, AF4) - -#define GPIO84_GSSP2_RXD MFP_CFG(GPIO84, AF2) -#define GPIO85_GSSP2_CLK MFP_CFG(GPIO85, AF2) -#define GPIO86_GSSP2_SYSCLK MFP_CFG(GPIO86, AF2) -#define GPIO87_GSSP2_FRM MFP_CFG(GPIO87, AF2) -#define GPIO88_GSSP2_TXD MFP_CFG(GPIO88, AF2) -#define GPIO86_GSSP2_RXD MFP_CFG(GPIO86, AF5) - -#define GPIO103_GSSP2_CLK MFP_CFG(GPIO103, AF2) -#define GPIO104_GSSP2_FRM MFP_CFG(GPIO104, AF2) -#define GPIO105_GSSP2_RXD MFP_CFG(GPIO105, AF2) -#define GPIO106_GSSP2_TXD MFP_CFG(GPIO106, AF2) - -/* UART1 - FFUART */ -#define GPIO47_UART1_DSR_N MFP_CFG(GPIO47, AF1) -#define GPIO48_UART1_DTR_N MFP_CFG(GPIO48, AF1) -#define GPIO49_UART1_RI MFP_CFG(GPIO49, AF1) -#define GPIO50_UART1_DCD MFP_CFG(GPIO50, AF1) -#define GPIO51_UART1_CTS MFP_CFG(GPIO51, AF1) -#define GPIO52_UART1_RTS MFP_CFG(GPIO52, AF1) -#define GPIO53_UART1_RXD MFP_CFG(GPIO53, AF1) -#define GPIO54_UART1_TXD MFP_CFG(GPIO54, AF1) - -#define GPIO63_UART1_TXD MFP_CFG(GPIO63, AF2) -#define GPIO64_UART1_RXD MFP_CFG(GPIO64, AF2) -#define GPIO65_UART1_DSR MFP_CFG(GPIO65, AF2) -#define GPIO66_UART1_DTR MFP_CFG(GPIO66, AF2) -#define GPIO67_UART1_RI MFP_CFG(GPIO67, AF2) -#define GPIO68_UART1_DCD MFP_CFG(GPIO68, AF2) -#define GPIO69_UART1_CTS MFP_CFG(GPIO69, AF2) -#define GPIO70_UART1_RTS MFP_CFG(GPIO70, AF2) - -#define GPIO53_UART1_TXD MFP_CFG(GPIO53, AF2) -#define GPIO54_UART1_RXD MFP_CFG(GPIO54, AF2) - -/* UART2 - BTUART */ -#define GPIO91_UART2_RXD MFP_CFG(GPIO91, AF1) -#define GPIO92_UART2_TXD MFP_CFG(GPIO92, AF1) -#define GPIO93_UART2_CTS MFP_CFG(GPIO93, AF1) -#define GPIO94_UART2_RTS MFP_CFG(GPIO94, AF1) - -/* UART3 - STUART */ -#define GPIO43_UART3_RTS MFP_CFG(GPIO43, AF3) -#define GPIO44_UART3_CTS MFP_CFG(GPIO44, AF3) -#define GPIO45_UART3_RXD MFP_CFG(GPIO45, AF3) -#define GPIO46_UART3_TXD MFP_CFG(GPIO46, AF3) - -#define GPIO75_UART3_RTS MFP_CFG(GPIO75, AF5) -#define GPIO76_UART3_CTS MFP_CFG(GPIO76, AF5) -#define GPIO77_UART3_TXD MFP_CFG(GPIO77, AF5) -#define GPIO78_UART3_RXD MFP_CFG(GPIO78, AF5) - -/* DFI */ -#define DF_IO0_DF_IO0 MFP_CFG(DF_IO0, AF2) -#define DF_IO1_DF_IO1 MFP_CFG(DF_IO1, AF2) -#define DF_IO2_DF_IO2 MFP_CFG(DF_IO2, AF2) -#define DF_IO3_DF_IO3 MFP_CFG(DF_IO3, AF2) -#define DF_IO4_DF_IO4 MFP_CFG(DF_IO4, AF2) -#define DF_IO5_DF_IO5 MFP_CFG(DF_IO5, AF2) -#define DF_IO6_DF_IO6 MFP_CFG(DF_IO6, AF2) -#define DF_IO7_DF_IO7 MFP_CFG(DF_IO7, AF2) -#define DF_IO8_DF_IO8 MFP_CFG(DF_IO8, AF2) -#define DF_IO9_DF_IO9 MFP_CFG(DF_IO9, AF2) -#define DF_IO10_DF_IO10 MFP_CFG(DF_IO10, AF2) -#define DF_IO11_DF_IO11 MFP_CFG(DF_IO11, AF2) -#define DF_IO12_DF_IO12 MFP_CFG(DF_IO12, AF2) -#define DF_IO13_DF_IO13 MFP_CFG(DF_IO13, AF2) -#define DF_IO14_DF_IO14 MFP_CFG(DF_IO14, AF2) -#define DF_IO15_DF_IO15 MFP_CFG(DF_IO15, AF2) -#define DF_nADV1_ALE_DF_nADV1 MFP_CFG(DF_nADV1_ALE, AF2) -#define DF_nADV2_ALE_DF_nADV2 MFP_CFG(DF_nADV2_ALE, AF2) -#define DF_nCS0_DF_nCS0 MFP_CFG(DF_nCS0, AF2) -#define DF_nCS1_DF_nCS1 MFP_CFG(DF_nCS1, AF2) -#define DF_nRE_nOE_DF_nOE MFP_CFG(DF_nRE_nOE, AF2) -#define DF_nWE_DF_nWE MFP_CFG(DF_nWE, AF2) - -/* DFI - NAND */ -#define DF_CLE_nOE_ND_CLE MFP_CFG_LPM(DF_CLE_nOE, AF1, PULL_HIGH) -#define DF_INT_RnB_ND_INT_RnB MFP_CFG_LPM(DF_INT_RnB, AF1, PULL_LOW) -#define DF_IO0_ND_IO0 MFP_CFG_LPM(DF_IO0, AF1, PULL_LOW) -#define DF_IO1_ND_IO1 MFP_CFG_LPM(DF_IO1, AF1, PULL_LOW) -#define DF_IO2_ND_IO2 MFP_CFG_LPM(DF_IO2, AF1, PULL_LOW) -#define DF_IO3_ND_IO3 MFP_CFG_LPM(DF_IO3, AF1, PULL_LOW) -#define DF_IO4_ND_IO4 MFP_CFG_LPM(DF_IO4, AF1, PULL_LOW) -#define DF_IO5_ND_IO5 MFP_CFG_LPM(DF_IO5, AF1, PULL_LOW) -#define DF_IO6_ND_IO6 MFP_CFG_LPM(DF_IO6, AF1, PULL_LOW) -#define DF_IO7_ND_IO7 MFP_CFG_LPM(DF_IO7, AF1, PULL_LOW) -#define DF_IO8_ND_IO8 MFP_CFG_LPM(DF_IO8, AF1, PULL_LOW) -#define DF_IO9_ND_IO9 MFP_CFG_LPM(DF_IO9, AF1, PULL_LOW) -#define DF_IO10_ND_IO10 MFP_CFG_LPM(DF_IO10, AF1, PULL_LOW) -#define DF_IO11_ND_IO11 MFP_CFG_LPM(DF_IO11, AF1, PULL_LOW) -#define DF_IO12_ND_IO12 MFP_CFG_LPM(DF_IO12, AF1, PULL_LOW) -#define DF_IO13_ND_IO13 MFP_CFG_LPM(DF_IO13, AF1, PULL_LOW) -#define DF_IO14_ND_IO14 MFP_CFG_LPM(DF_IO14, AF1, PULL_LOW) -#define DF_IO15_ND_IO15 MFP_CFG_LPM(DF_IO15, AF1, PULL_LOW) -#define DF_nADV1_ALE_ND_ALE MFP_CFG_LPM(DF_nADV1_ALE, AF1, PULL_HIGH) -#define DF_nADV2_ALE_ND_ALE MFP_CFG_LPM(DF_nADV2_ALE, AF1, PULL_HIGH) -#define DF_nADV2_ALE_nCS3 MFP_CFG_LPM(DF_nADV2_ALE, AF3, PULL_HIGH) -#define DF_nCS0_ND_nCS0 MFP_CFG_LPM(DF_nCS0, AF1, PULL_HIGH) -#define DF_nCS1_ND_nCS1 MFP_CFG_LPM(DF_nCS1, AF1, PULL_HIGH) -#define DF_nRE_nOE_ND_nRE MFP_CFG_LPM(DF_nRE_nOE, AF1, PULL_HIGH) -#define DF_nWE_ND_nWE MFP_CFG_LPM(DF_nWE, AF1, PULL_HIGH) - -/* PWM */ -#define GPIO41_PWM0 MFP_CFG_LPM(GPIO41, AF1, PULL_LOW) -#define GPIO42_PWM1 MFP_CFG_LPM(GPIO42, AF1, PULL_LOW) -#define GPIO43_PWM3 MFP_CFG_LPM(GPIO43, AF1, PULL_LOW) -#define GPIO20_PWM0 MFP_CFG_LPM(GPIO20, AF2, PULL_LOW) -#define GPIO21_PWM2 MFP_CFG_LPM(GPIO21, AF3, PULL_LOW) -#define GPIO22_PWM3 MFP_CFG_LPM(GPIO22, AF3, PULL_LOW) -#define GPIO32_PWM0 MFP_CFG_LPM(GPIO32, AF4, PULL_LOW) - -/* CIR */ -#define GPIO46_CIR_OUT MFP_CFG(GPIO46, AF1) -#define GPIO77_CIR_OUT MFP_CFG(GPIO77, AF3) - -/* USB P2 */ -#define GPIO0_USB_P2_7 MFP_CFG(GPIO0, AF3) -#define GPIO15_USB_P2_7 MFP_CFG(GPIO15, AF5) -#define GPIO16_USB_P2_7 MFP_CFG(GPIO16, AF2) -#define GPIO48_USB_P2_7 MFP_CFG(GPIO48, AF7) -#define GPIO49_USB_P2_7 MFP_CFG(GPIO49, AF6) -#define DF_IO9_USB_P2_7 MFP_CFG(DF_IO9, AF3) - -#define GPIO48_USB_P2_8 MFP_CFG(GPIO48, AF2) -#define GPIO50_USB_P2_7 MFP_CFG_X(GPIO50, AF2, DS02X, FLOAT) -#define GPIO51_USB_P2_5 MFP_CFG(GPIO51, AF2) -#define GPIO47_USB_P2_4 MFP_CFG(GPIO47, AF2) -#define GPIO53_USB_P2_3 MFP_CFG(GPIO53, AF2) -#define GPIO54_USB_P2_6 MFP_CFG(GPIO54, AF2) -#define GPIO49_USB_P2_2 MFP_CFG(GPIO49, AF2) -#define GPIO52_USB_P2_1 MFP_CFG(GPIO52, AF2) - -#define GPIO63_USB_P2_8 MFP_CFG(GPIO63, AF3) -#define GPIO64_USB_P2_7 MFP_CFG(GPIO64, AF3) -#define GPIO65_USB_P2_6 MFP_CFG(GPIO65, AF3) -#define GPIO66_USG_P2_5 MFP_CFG(GPIO66, AF3) -#define GPIO67_USB_P2_4 MFP_CFG(GPIO67, AF3) -#define GPIO68_USB_P2_3 MFP_CFG(GPIO68, AF3) -#define GPIO69_USB_P2_2 MFP_CFG(GPIO69, AF3) -#define GPIO70_USB_P2_1 MFP_CFG(GPIO70, AF3) - -/* ULPI */ -#define GPIO31_USB_ULPI_D0 MFP_CFG(GPIO31, AF4) -#define GPIO30_USB_ULPI_D1 MFP_CFG(GPIO30, AF7) -#define GPIO33_USB_ULPI_D2 MFP_CFG(GPIO33, AF5) -#define GPIO34_USB_ULPI_D3 MFP_CFG(GPIO34, AF5) -#define GPIO35_USB_ULPI_D4 MFP_CFG(GPIO35, AF5) -#define GPIO36_USB_ULPI_D5 MFP_CFG(GPIO36, AF5) -#define GPIO41_USB_ULPI_D6 MFP_CFG(GPIO41, AF5) -#define GPIO42_USB_ULPI_D7 MFP_CFG(GPIO42, AF5) -#define GPIO37_USB_ULPI_DIR MFP_CFG(GPIO37, AF4) -#define GPIO38_USB_ULPI_CLK MFP_CFG(GPIO38, AF4) -#define GPIO39_USB_ULPI_STP MFP_CFG(GPIO39, AF4) -#define GPIO40_USB_ULPI_NXT MFP_CFG(GPIO40, AF4) - -#define GPIO3_CLK26MOUTDMD MFP_CFG(GPIO3, AF3) -#define GPIO40_CLK26MOUTDMD MFP_CFG(GPIO40, AF7) -#define GPIO94_CLK26MOUTDMD MFP_CFG(GPIO94, AF5) -#define GPIO104_CLK26MOUTDMD MFP_CFG(GPIO104, AF4) -#define DF_ADDR1_CLK26MOUTDMD MFP_CFG(DF_ADDR2, AF3) -#define DF_ADDR3_CLK26MOUTDMD MFP_CFG(DF_ADDR3, AF3) - -#define GPIO14_CLK26MOUT MFP_CFG(GPIO14, AF5) -#define GPIO38_CLK26MOUT MFP_CFG(GPIO38, AF7) -#define GPIO92_CLK26MOUT MFP_CFG(GPIO92, AF5) -#define GPIO105_CLK26MOUT MFP_CFG(GPIO105, AF4) - -#define GPIO2_CLK13MOUTDMD MFP_CFG(GPIO2, AF3) -#define GPIO39_CLK13MOUTDMD MFP_CFG(GPIO39, AF7) -#define GPIO50_CLK13MOUTDMD MFP_CFG(GPIO50, AF3) -#define GPIO93_CLK13MOUTDMD MFP_CFG(GPIO93, AF5) -#define GPIO103_CLK13MOUTDMD MFP_CFG(GPIO103, AF4) -#define DF_ADDR2_CLK13MOUTDMD MFP_CFG(DF_ADDR2, AF3) - -/* 1 wire */ -#define GPIO95_OW_DQ_IN MFP_CFG(GPIO95, AF5) - -#endif /* __ASM_ARCH_MFP_PXA9xx_H */ diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c deleted file mode 100644 index d08f962ffb04..000000000000 --- a/arch/arm/mach-pxa/mioa701.c +++ /dev/null @@ -1,784 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Handles the Mitac Mio A701 Board - * - * Copyright (C) 2008 Robert Jarzmik - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/syscore_ops.h> -#include <linux/input.h> -#include <linux/delay.h> -#include <linux/gpio_keys.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/rtc.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/pda_power.h> -#include <linux/power_supply.h> -#include <linux/wm97xx.h> -#include <linux/mtd/physmap.h> -#include <linux/reboot.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/max1586.h> -#include <linux/slab.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa27x.h" -#include "regs-rtc.h" -#include <linux/platform_data/keypad-pxa27x.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include "udc.h" -#include "pxa27x-udc.h" -#include <linux/platform_data/media/camera-pxa.h> -#include <linux/platform_data/asoc-pxa.h> -#include "smemc.h" - -#include "mioa701.h" - -#include "generic.h" -#include "devices.h" - -static unsigned long mioa701_pin_config[] = { - /* Mio global */ - MIO_CFG_OUT(GPIO9_CHARGE_EN, AF0, DRIVE_LOW), - MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW), - MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH), - MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH), - MIO_CFG_IN(GPIO80_MAYBE_CHARGE_VDROP, AF0), - - /* Backlight PWM 0 */ - GPIO16_PWM0_OUT, - - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - MIO_CFG_IN(GPIO78_SDIO_RO, AF0), - MIO_CFG_IN(GPIO15_SDIO_INSERT, AF0), - MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW), - - /* USB */ - MIO_CFG_IN(GPIO13_nUSB_DETECT, AF0), - MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW), - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* QCI */ - GPIO12_CIF_DD_7, - GPIO17_CIF_DD_6, - GPIO50_CIF_DD_3, - GPIO51_CIF_DD_2, - GPIO52_CIF_DD_4, - GPIO53_CIF_MCLK, - GPIO54_CIF_PCLK, - GPIO55_CIF_DD_1, - GPIO81_CIF_DD_0, - GPIO82_CIF_DD_5, - GPIO84_CIF_FV, - GPIO85_CIF_LV, - MIO_CFG_OUT(GPIO56_MT9M111_nOE, AF0, DRIVE_LOW), - - /* Bluetooth */ - MIO_CFG_IN(GPIO14_BT_nACTIVITY, AF0), - GPIO44_BTUART_CTS, - GPIO42_BTUART_RXD, - GPIO45_BTUART_RTS, - GPIO43_BTUART_TXD, - MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW), - MIO_CFG_OUT(GPIO77_BT_UNKNOWN1, AF0, DRIVE_HIGH), - MIO_CFG_OUT(GPIO86_BT_MAYBE_nRESET, AF0, DRIVE_HIGH), - - /* GPS */ - MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW), - MIO_CFG_OUT(GPIO26_GPS_ON, AF0, DRIVE_LOW), - MIO_CFG_OUT(GPIO27_GPS_RESET, AF0, DRIVE_LOW), - MIO_CFG_OUT(GPIO106_GPS_UNKNOWN2, AF0, DRIVE_LOW), - MIO_CFG_OUT(GPIO107_GPS_UNKNOWN3, AF0, DRIVE_LOW), - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, - - /* GSM */ - MIO_CFG_OUT(GPIO24_GSM_MOD_RESET_CMD, AF0, DRIVE_LOW), - MIO_CFG_OUT(GPIO88_GSM_nMOD_ON_CMD, AF0, DRIVE_HIGH), - MIO_CFG_OUT(GPIO90_GSM_nMOD_OFF_CMD, AF0, DRIVE_HIGH), - MIO_CFG_OUT(GPIO114_GSM_nMOD_DTE_UART_STATE, AF0, DRIVE_HIGH), - MIO_CFG_IN(GPIO25_GSM_MOD_ON_STATE, AF0), - MIO_CFG_IN(GPIO113_GSM_EVENT, AF0) | WAKEUP_ON_EDGE_BOTH, - GPIO34_FFUART_RXD, - GPIO35_FFUART_CTS, - GPIO36_FFUART_DCD, - GPIO37_FFUART_DSR, - GPIO39_FFUART_TXD, - GPIO40_FFUART_DTR, - GPIO41_FFUART_RTS, - - /* Sound */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO89_AC97_SYSCLK, - MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0), - - /* Leds */ - MIO_CFG_OUT(GPIO10_LED_nCharging, AF0, DRIVE_HIGH), - MIO_CFG_OUT(GPIO97_LED_nBlue, AF0, DRIVE_HIGH), - MIO_CFG_OUT(GPIO98_LED_nOrange, AF0, DRIVE_HIGH), - MIO_CFG_OUT(GPIO82_LED_nVibra, AF0, DRIVE_HIGH), - MIO_CFG_OUT(GPIO115_LED_nKeyboard, AF0, DRIVE_HIGH), - - /* Keyboard */ - MIO_CFG_IN(GPIO0_KEY_POWER, AF0) | WAKEUP_ON_EDGE_BOTH, - MIO_CFG_IN(GPIO93_KEY_VOLUME_UP, AF0), - MIO_CFG_IN(GPIO94_KEY_VOLUME_DOWN, AF0), - GPIO100_KP_MKIN_0, - GPIO101_KP_MKIN_1, - GPIO102_KP_MKIN_2, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* Unknown */ - MFP_CFG_IN(GPIO20, AF0), - MFP_CFG_IN(GPIO21, AF0), - MFP_CFG_IN(GPIO33, AF0), - MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH), - MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH), - MFP_CFG_IN(GPIO96, AF0), - MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH), -}; - -static struct pwm_lookup mioa701_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight", NULL, 4000 * 1024, - PWM_POLARITY_NORMAL), -}; - -/* LCD Screen and Backlight */ -static struct platform_pwm_backlight_data mioa701_backlight_data = { - .max_brightness = 100, - .dft_brightness = 50, -}; - -/* - * LTM0305A776C LCD panel timings - * - * see: - * - the LTM0305A776C datasheet, - * - and the PXA27x Programmers' manual - */ -static struct pxafb_mode_info mioa701_ltm0305a776c = { - .pixclock = 220000, /* CLK=4.545 MHz */ - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 4, - .vsync_len = 2, - .left_margin = 6, - .right_margin = 4, - .upper_margin = 5, - .lower_margin = 3, -}; - -static void mioa701_lcd_power(int on, struct fb_var_screeninfo *si) -{ - gpio_set_value(GPIO87_LCD_POWER, on); -} - -static struct pxafb_mach_info mioa701_pxafb_info = { - .modes = &mioa701_ltm0305a776c, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, - .pxafb_lcd_power = mioa701_lcd_power, -}; - -/* - * Keyboard configuration - */ -static const unsigned int mioa701_matrix_keys[] = { - KEY(0, 0, KEY_UP), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_MEDIA), - KEY(1, 0, KEY_DOWN), - KEY(1, 1, KEY_ENTER), - KEY(1, 2, KEY_CONNECT), /* GPS key */ - KEY(2, 0, KEY_LEFT), - KEY(2, 1, KEY_PHONE), /* Phone Green key */ - KEY(2, 2, KEY_CAMERA) /* Camera key */ -}; - -static struct matrix_keymap_data mioa701_matrix_keymap_data = { - .keymap = mioa701_matrix_keys, - .keymap_size = ARRAY_SIZE(mioa701_matrix_keys), -}; - -static struct pxa27x_keypad_platform_data mioa701_keypad_info = { - .matrix_key_rows = 3, - .matrix_key_cols = 3, - .matrix_keymap_data = &mioa701_matrix_keymap_data, -}; - -/* - * GPIO Key Configuration - */ -#define MIO_KEY(key, _gpio, _desc, _wakeup) \ - { .code = (key), .gpio = (_gpio), .active_low = 0, \ - .desc = (_desc), .type = EV_KEY, .wakeup = (_wakeup) } -static struct gpio_keys_button mioa701_button_table[] = { - MIO_KEY(KEY_EXIT, GPIO0_KEY_POWER, "Power button", 1), - MIO_KEY(KEY_VOLUMEUP, GPIO93_KEY_VOLUME_UP, "Volume up", 0), - MIO_KEY(KEY_VOLUMEDOWN, GPIO94_KEY_VOLUME_DOWN, "Volume down", 0), - MIO_KEY(KEY_HP, GPIO12_HPJACK_INSERT, "HP jack detect", 0) -}; - -static struct gpio_keys_platform_data mioa701_gpio_keys_data = { - .buttons = mioa701_button_table, - .nbuttons = ARRAY_SIZE(mioa701_button_table), -}; - -/* - * Leds and vibrator - */ -#define ONE_LED(_gpio, _name) \ -{ .gpio = (_gpio), .name = (_name), .active_low = true } -static struct gpio_led gpio_leds[] = { - ONE_LED(GPIO10_LED_nCharging, "mioa701:charging"), - ONE_LED(GPIO97_LED_nBlue, "mioa701:blue"), - ONE_LED(GPIO98_LED_nOrange, "mioa701:orange"), - ONE_LED(GPIO82_LED_nVibra, "mioa701:vibra"), - ONE_LED(GPIO115_LED_nKeyboard, "mioa701:keyboard") -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -/* - * GSM Sagem XS200 chip - * - * GSM handling was purged from kernel. For history, this is the way to go : - * - init : GPIO24_GSM_MOD_RESET_CMD = 0, GPIO114_GSM_nMOD_DTE_UART_STATE = 1 - * GPIO88_GSM_nMOD_ON_CMD = 1, GPIO90_GSM_nMOD_OFF_CMD = 1 - * - reset : GPIO24_GSM_MOD_RESET_CMD = 1, msleep(100), - * GPIO24_GSM_MOD_RESET_CMD = 0 - * - turn on : GPIO88_GSM_nMOD_ON_CMD = 0, msleep(1000), - * GPIO88_GSM_nMOD_ON_CMD = 1 - * - turn off : GPIO90_GSM_nMOD_OFF_CMD = 0, msleep(1000), - * GPIO90_GSM_nMOD_OFF_CMD = 1 - */ -static int is_gsm_on(void) -{ - int is_on; - - is_on = !!gpio_get_value(GPIO25_GSM_MOD_ON_STATE); - return is_on; -} - -irqreturn_t gsm_on_irq(int irq, void *p) -{ - printk(KERN_DEBUG "Mioa701: GSM status changed to %s\n", - is_gsm_on() ? "on" : "off"); - return IRQ_HANDLED; -} - -static struct gpio gsm_gpios[] = { - { GPIO25_GSM_MOD_ON_STATE, GPIOF_IN, "GSM state" }, - { GPIO113_GSM_EVENT, GPIOF_IN, "GSM event" }, -}; - -static int __init gsm_init(void) -{ - int rc; - - rc = gpio_request_array(ARRAY_AND_SIZE(gsm_gpios)); - if (rc) - goto err_gpio; - rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, - "GSM XS200 Power Irq", NULL); - if (rc) - goto err_irq; - - gpio_set_wake(GPIO113_GSM_EVENT, 1); - return 0; - -err_irq: - printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n"); - gpio_free_array(ARRAY_AND_SIZE(gsm_gpios)); -err_gpio: - printk(KERN_ERR "Mioa701: gsm not available\n"); - return rc; -} - -static void gsm_exit(void) -{ - free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL); - gpio_free_array(ARRAY_AND_SIZE(gsm_gpios)); -} - -/* - * Bluetooth BRF6150 chip - * - * BT handling was purged from kernel. For history, this is the way to go : - * - turn on : GPIO83_BT_ON = 1 - * - turn off : GPIO83_BT_ON = 0 - */ - -/* - * GPS Sirf Star III chip - * - * GPS handling was purged from kernel. For history, this is the way to go : - * - init : GPIO23_GPS_UNKNOWN1 = 1, GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0 - * GPIO106_GPS_UNKNOWN2 = 0, GPIO107_GPS_UNKNOWN3 = 0 - * - turn on : GPIO27_GPS_RESET = 1, GPIO26_GPS_ON = 1 - * - turn off : GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0 - */ - -/* - * USB UDC - */ -static int is_usb_connected(void) -{ - return !gpio_get_value(GPIO13_nUSB_DETECT); -} - -static struct pxa2xx_udc_mach_info mioa701_udc_info = { - .udc_is_connected = is_usb_connected, - .gpio_pullup = GPIO22_USB_ENABLE, -}; - -static struct gpiod_lookup_table gpio_vbus_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO13_nUSB_DETECT, - "vbus", GPIO_ACTIVE_LOW), - { }, - }, -}; - -/* - * SDIO/MMC Card controller - */ -/** - * The card detect interrupt isn't debounced so we delay it by 250ms - * to give the card a chance to fully insert/eject. - */ -static struct pxamci_platform_data mioa701_mci_info = { - .detect_delay_ms = 250, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table mioa701_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - /* Card detect on GPIO 15 */ - GPIO_LOOKUP("gpio-pxa", GPIO15_SDIO_INSERT, - "cd", GPIO_ACTIVE_LOW), - /* Write protect on GPIO 78 */ - GPIO_LOOKUP("gpio-pxa", GPIO78_SDIO_RO, - "wp", GPIO_ACTIVE_LOW), - /* Power on GPIO 91 */ - GPIO_LOOKUP("gpio-pxa", GPIO91_SDIO_EN, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* FlashRAM */ -static struct resource docg3_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_8K - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device docg3 = { - .name = "docg3", - .id = -1, - .resource = &docg3_resource, - .num_resources = 1, - .dev = { - .platform_data = NULL, - }, -}; - -/* - * Suspend/Resume bootstrap management - * - * MIO A701 reboot sequence is highly ROM dependent. From the one dissassembled, - * this sequence is as follows : - * - disables interrupts - * - initialize SDRAM (self refresh RAM into active RAM) - * - initialize GPIOs (depends on value at 0xa020b020) - * - initialize coprossessors - * - if edge detect on PWR_SCL(GPIO3), then proceed to cold start - * - or if value at 0xa020b000 not equal to 0x0f0f0f0f, proceed to cold start - * - else do a resume, ie. jump to addr 0xa0100000 - */ -#define RESUME_ENABLE_ADDR 0xa020b000 -#define RESUME_ENABLE_VAL 0x0f0f0f0f -#define RESUME_BT_ADDR 0xa020b020 -#define RESUME_UNKNOWN_ADDR 0xa020b024 -#define RESUME_VECTOR_ADDR 0xa0100000 -#define BOOTSTRAP_WORDS mioa701_bootstrap_lg/4 - -static u32 *save_buffer; - -static void install_bootstrap(void) -{ - int i; - u32 *rom_bootstrap = phys_to_virt(RESUME_VECTOR_ADDR); - u32 *src = &mioa701_bootstrap; - - for (i = 0; i < BOOTSTRAP_WORDS; i++) - rom_bootstrap[i] = src[i]; -} - - -static int mioa701_sys_suspend(void) -{ - int i = 0, is_bt_on; - u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR); - u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR); - u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR); - u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); - - /* Devices prepare suspend */ - is_bt_on = !!gpio_get_value(GPIO83_BT_ON); - pxa2xx_mfp_set_lpm(GPIO83_BT_ON, - is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW); - - for (i = 0; i < BOOTSTRAP_WORDS; i++) - save_buffer[i] = mem_resume_vector[i]; - save_buffer[i++] = *mem_resume_enabler; - save_buffer[i++] = *mem_resume_bt; - save_buffer[i++] = *mem_resume_unknown; - - *mem_resume_enabler = RESUME_ENABLE_VAL; - *mem_resume_bt = is_bt_on; - - install_bootstrap(); - return 0; -} - -static void mioa701_sys_resume(void) -{ - int i = 0; - u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR); - u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR); - u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR); - u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); - - for (i = 0; i < BOOTSTRAP_WORDS; i++) - mem_resume_vector[i] = save_buffer[i]; - *mem_resume_enabler = save_buffer[i++]; - *mem_resume_bt = save_buffer[i++]; - *mem_resume_unknown = save_buffer[i++]; -} - -static struct syscore_ops mioa701_syscore_ops = { - .suspend = mioa701_sys_suspend, - .resume = mioa701_sys_resume, -}; - -static int __init bootstrap_init(void) -{ - int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3); - - register_syscore_ops(&mioa701_syscore_ops); - - save_buffer = kmalloc(save_size, GFP_KERNEL); - if (!save_buffer) - return -ENOMEM; - printk(KERN_INFO "MioA701: allocated %d bytes for bootstrap\n", - save_size); - return 0; -} - -static void bootstrap_exit(void) -{ - kfree(save_buffer); - unregister_syscore_ops(&mioa701_syscore_ops); - - printk(KERN_CRIT "Unregistering mioa701 suspend will hang next" - "resume !!!\n"); -} - -/* - * Power Supply - */ -static char *supplicants[] = { - "mioa701_battery" -}; - -static int is_ac_connected(void) -{ - return gpio_get_value(GPIO96_AC_DETECT); -} - -static void mioa701_set_charge(int flags) -{ - gpio_set_value(GPIO9_CHARGE_EN, (flags == PDA_POWER_CHARGE_USB)); -} - -static struct pda_power_pdata power_pdata = { - .is_ac_online = is_ac_connected, - .is_usb_online = is_usb_connected, - .set_charge = mioa701_set_charge, - .supplied_to = supplicants, - .num_supplicants = ARRAY_SIZE(supplicants), -}; - -static struct resource power_resources[] = { - [0] = { - .name = "ac", - .start = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT), - .end = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | - IORESOURCE_IRQ_LOWEDGE, - }, - [1] = { - .name = "usb", - .start = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT), - .end = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | - IORESOURCE_IRQ_LOWEDGE, - }, -}; - -static struct platform_device power_dev = { - .name = "pda-power", - .id = -1, - .resource = power_resources, - .num_resources = ARRAY_SIZE(power_resources), - .dev = { - .platform_data = &power_pdata, - }, -}; - -static struct wm97xx_batt_pdata mioa701_battery_data = { - .batt_aux = WM97XX_AUX_ID1, - .temp_aux = -1, - .min_voltage = 0xc00, - .max_voltage = 0xfc0, - .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION, - .batt_div = 1, - .batt_mult = 1, - .batt_name = "mioa701_battery", -}; - -static struct wm97xx_pdata mioa701_wm97xx_pdata = { - .batt_pdata = &mioa701_battery_data, -}; - -/* - * Voltage regulation - */ -static struct regulator_consumer_supply max1586_consumers[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data max1586_v3_info = { - .constraints = { - .name = "vcc_core range", - .min_uV = 1000000, - .max_uV = 1705000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = ARRAY_SIZE(max1586_consumers), - .consumer_supplies = max1586_consumers, -}; - -static struct max1586_subdev_data max1586_subdevs[] = { - { .name = "vcc_core", .id = MAX1586_V3, - .platform_data = &max1586_v3_info }, -}; - -static struct max1586_platform_data max1586_info = { - .subdevs = max1586_subdevs, - .num_subdevs = ARRAY_SIZE(max1586_subdevs), - .v3_gain = MAX1586_GAIN_NO_R24, /* 700..1475 mV */ -}; - -/* - * Camera interface - */ -struct pxacamera_platform_data mioa701_pxacamera_platform_data = { - .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, - .mclk_10khz = 5000, - .sensor_i2c_adapter_id = 0, - .sensor_i2c_address = 0x5d, -}; - -static struct i2c_board_info __initdata mioa701_pi2c_devices[] = { - { - I2C_BOARD_INFO("max1586", 0x14), - .platform_data = &max1586_info, - }, -}; - -/* Board I2C devices. */ -static struct i2c_board_info mioa701_i2c_devices[] = { - { - I2C_BOARD_INFO("mt9m111", 0x5d), - }, -}; - -struct i2c_pxa_platform_data i2c_pdata = { - .fast_mode = 1, -}; - -static pxa2xx_audio_ops_t mioa701_ac97_info = { - .reset_gpio = 95, - .codec_pdata = { &mioa701_wm97xx_pdata, }, -}; - -/* - * Mio global - */ - -/* Devices */ -#define MIO_PARENT_DEV(var, strname, tparent, pdata) \ -static struct platform_device var = { \ - .name = strname, \ - .id = -1, \ - .dev = { \ - .platform_data = pdata, \ - .parent = tparent, \ - }, \ -}; -#define MIO_SIMPLE_DEV(var, strname, pdata) \ - MIO_PARENT_DEV(var, strname, NULL, pdata) - -MIO_SIMPLE_DEV(mioa701_gpio_keys, "gpio-keys", &mioa701_gpio_keys_data) -MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight", &pxa27x_device_pwm0.dev, - &mioa701_backlight_data); -MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info) -MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL) -MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) -MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) -MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", NULL); - -static struct platform_device *devices[] __initdata = { - &mioa701_gpio_keys, - &mioa701_backlight, - &mioa701_led, - &pxa2xx_pcm, - &mioa701_sound, - &power_dev, - &docg3, - &gpio_vbus, - &mioa701_board, -}; - -static void mioa701_machine_exit(void); - -static void mioa701_poweroff(void) -{ - mioa701_machine_exit(); - pxa_restart(REBOOT_SOFT, NULL); -} - -static void mioa701_restart(enum reboot_mode c, const char *cmd) -{ - mioa701_machine_exit(); - pxa_restart(REBOOT_SOFT, cmd); -} - -static struct gpio global_gpios[] = { - { GPIO9_CHARGE_EN, GPIOF_OUT_INIT_HIGH, "Charger enable" }, - { GPIO18_POWEROFF, GPIOF_OUT_INIT_LOW, "Power Off" }, - { GPIO87_LCD_POWER, GPIOF_OUT_INIT_LOW, "LCD Power" }, - { GPIO56_MT9M111_nOE, GPIOF_OUT_INIT_LOW, "Camera nOE" }, -}; - -static struct regulator_consumer_supply fixed_5v0_consumers[] = { - REGULATOR_SUPPLY("power", "pwm-backlight"), -}; - -static void __init mioa701_machine_init(void) -{ - int rc; - - PSLR = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */ - PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE; - RTTR = 32768 - 1; /* Reset crazy WinCE value */ - UP2OCR = UP2OCR_HXOE; - - /* - * Set up the flash memory : DiskOnChip G3 on first static memory bank - */ - __raw_writel(0x7ff02dd8, MSC0); - __raw_writel(0x0001c391, MCMEM0); - __raw_writel(0x0001c391, MCATT0); - __raw_writel(0x0001c391, MCIO0); - - - pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - rc = gpio_request_array(ARRAY_AND_SIZE(global_gpios)); - if (rc) - pr_err("MioA701: Failed to request GPIOs: %d", rc); - bootstrap_init(); - pxa_set_fb_info(NULL, &mioa701_pxafb_info); - gpiod_add_lookup_table(&mioa701_mci_gpio_table); - pxa_set_mci_info(&mioa701_mci_info); - pxa_set_keypad_info(&mioa701_keypad_info); - pxa_set_udc_info(&mioa701_udc_info); - pxa_set_ac97_info(&mioa701_ac97_info); - pm_power_off = mioa701_poweroff; - pwm_add_table(mioa701_pwm_lookup, ARRAY_SIZE(mioa701_pwm_lookup)); - gpiod_add_lookup_table(&gpio_vbus_gpiod_table); - platform_add_devices(devices, ARRAY_SIZE(devices)); - gsm_init(); - - i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices)); - i2c_register_board_info(1, ARRAY_AND_SIZE(mioa701_pi2c_devices)); - pxa_set_i2c_info(&i2c_pdata); - pxa27x_set_i2c_power_info(NULL); - pxa_set_camera_info(&mioa701_pxacamera_platform_data); - - regulator_register_always_on(0, "fixed-5.0V", fixed_5v0_consumers, - ARRAY_SIZE(fixed_5v0_consumers), - 5000000); - regulator_has_full_constraints(); -} - -static void mioa701_machine_exit(void) -{ - bootstrap_exit(); - gsm_exit(); -} - -MACHINE_START(MIOA701, "MIO A701") - .atag_offset = 0x100, - .map_io = &pxa27x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = &pxa27x_init_irq, - .handle_irq = &pxa27x_handle_irq, - .init_machine = mioa701_machine_init, - .init_time = pxa_timer_init, - .restart = mioa701_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/mioa701.h b/arch/arm/mach-pxa/mioa701.h deleted file mode 100644 index d94295c67460..000000000000 --- a/arch/arm/mach-pxa/mioa701.h +++ /dev/null @@ -1,76 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _MIOA701_H_ -#define _MIOA701_H_ - -#define MIO_CFG_IN(pin, af) \ - ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\ - (MFP_PIN(pin) | MFP_##af | MFP_DIR_IN)) - -#define MIO_CFG_OUT(pin, af, state) \ - ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\ - (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state)) - -/* Global GPIOs */ -#define GPIO9_CHARGE_EN 9 -#define GPIO18_POWEROFF 18 -#define GPIO87_LCD_POWER 87 -#define GPIO96_AC_DETECT 96 -#define GPIO80_MAYBE_CHARGE_VDROP 80 /* Drop of 88mV */ - -/* USB */ -#define GPIO13_nUSB_DETECT 13 -#define GPIO22_USB_ENABLE 22 - -/* SDIO bits */ -#define GPIO78_SDIO_RO 78 -#define GPIO15_SDIO_INSERT 15 -#define GPIO91_SDIO_EN 91 - -/* Bluetooth */ -#define GPIO14_BT_nACTIVITY 14 -#define GPIO83_BT_ON 83 -#define GPIO77_BT_UNKNOWN1 77 -#define GPIO86_BT_MAYBE_nRESET 86 - -/* GPS */ -#define GPIO23_GPS_UNKNOWN1 23 -#define GPIO26_GPS_ON 26 -#define GPIO27_GPS_RESET 27 -#define GPIO106_GPS_UNKNOWN2 106 -#define GPIO107_GPS_UNKNOWN3 107 - -/* GSM */ -#define GPIO24_GSM_MOD_RESET_CMD 24 -#define GPIO88_GSM_nMOD_ON_CMD 88 -#define GPIO90_GSM_nMOD_OFF_CMD 90 -#define GPIO114_GSM_nMOD_DTE_UART_STATE 114 -#define GPIO25_GSM_MOD_ON_STATE 25 -#define GPIO113_GSM_EVENT 113 - -/* SOUND */ -#define GPIO12_HPJACK_INSERT 12 - -/* LEDS */ -#define GPIO10_LED_nCharging 10 -#define GPIO97_LED_nBlue 97 -#define GPIO98_LED_nOrange 98 -#define GPIO82_LED_nVibra 82 -#define GPIO115_LED_nKeyboard 115 - -/* Keyboard */ -#define GPIO0_KEY_POWER 0 -#define GPIO93_KEY_VOLUME_UP 93 -#define GPIO94_KEY_VOLUME_DOWN 94 - -/* Camera */ -#define GPIO56_MT9M111_nOE 56 - -extern struct input_dev *mioa701_evdev; -extern void mioa701_gpio_lpm_set(unsigned long mfp_pin); - -/* Assembler externals mioa701_bootresume.S */ -extern u32 mioa701_bootstrap; -extern u32 mioa701_jumpaddr; -extern u32 mioa701_bootstrap_lg; - -#endif /* _MIOA701_H */ diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S deleted file mode 100644 index 4ad2fa27fc41..000000000000 --- a/arch/arm/mach-pxa/mioa701_bootresume.S +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* Bootloader to resume MIO A701 - * - * 2007-1-12 Robert Jarzmik -*/ - -#include <linux/linkage.h> -#include <asm/assembler.h> - -/* - * Note: Yes, part of the following code is located into the .data section. - * This is to allow jumpaddr to be accessed with a relative load - * while we can't rely on any MMU translation. We could have put - * sleep_save_sp in the .text section as well, but some setups might - * insist on it to be truly read-only. - */ - .data - .align 2 -ENTRY(mioa701_bootstrap) -0: - b 1f -ENTRY(mioa701_jumpaddr) - .word 0x40f00008 @ PSPR in no-MMU mode -1: - mov r0, #0xa0000000 @ Don't suppose memory access works - orr r0, r0, #0x00200000 @ even if it's supposed to - orr r0, r0, #0x0000b000 - mov r1, #0 - str r1, [r0] @ Early disable resume for next boot - ldr r0, mioa701_jumpaddr @ (Murphy's Law) - ldr r0, [r0] - ret r0 -2: - -ENTRY(mioa701_bootstrap_lg) - .data - .align 2 - .word 2b-0b diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c deleted file mode 100644 index 8ef8ac4ab4ac..000000000000 --- a/arch/arm/mach-pxa/mp900.c +++ /dev/null @@ -1,101 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/mp900.c - * - * Support for the NEC MobilePro900/C platform - * - * Based on mach-pxa/gumstix.c - * - * 2007, 2008 Kristoffer Ericson <kristoffer.ericson@gmail.com> - * 2007, 2008 Michael Petchkovsky <mkpetch@internode.on.net> - */ - -#include <linux/init.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/types.h> -#include <linux/usb/isp116x.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa25x.h" -#include "generic.h" - -static void isp116x_pfm_delay(struct device *dev, int delay) -{ - - /* 400MHz PXA2 = 2.5ns / instruction */ - - int cyc = delay / 10; - - /* 4 Instructions = 4 x 2.5ns = 10ns */ - __asm__ volatile ("0:\n" - "subs %0, %1, #1\n" - "bge 0b\n" - :"=r" (cyc) - :"0"(cyc) - ); -} - -static struct isp116x_platform_data isp116x_pfm_data = { - .remote_wakeup_enable = 1, - .delay = isp116x_pfm_delay, -}; - -static struct resource isp116x_pfm_resources[] = { - [0] = { - .start = 0x0d000000, - .end = 0x0d000000 + 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 0x0d000000 + 4, - .end = 0x0d000000 + 5, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = 61, - .end = 61, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mp900c_dummy_device = { - .name = "mp900c_dummy", - .id = -1, -}; - -static struct platform_device mp900c_usb = { - .name = "isp116x-hcd", - .num_resources = ARRAY_SIZE(isp116x_pfm_resources), - .resource = isp116x_pfm_resources, - .dev.platform_data = &isp116x_pfm_data, -}; - -static struct platform_device *devices[] __initdata = { - &mp900c_dummy_device, - &mp900c_usb, -}; - -static void __init mp900c_init(void) -{ - printk(KERN_INFO "MobilePro 900/C machine init\n"); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */ -MACHINE_START(NEC_MP900, "MobilePro900/C") - .atag_offset = 0x220100, - .init_time = pxa_timer_init, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_machine = mp900c_init, - .restart = pxa_restart, -MACHINE_END - diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c deleted file mode 100644 index 35546b59c88e..000000000000 --- a/arch/arm/mach-pxa/mxm8x10.c +++ /dev/null @@ -1,477 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/mxm8x10.c - * - * Support for the Embedian MXM-8x10 Computer on Module - * - * Copyright (C) 2006 Marvell International Ltd. - * Copyright (C) 2009 Embedian Inc. - * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd. - * - * 2007-09-04: eric miao <eric.y.miao@gmail.com> - * rewrite to align with latest kernel - * - * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za> - * Hennie van der Merwe <hvdmerwe@tmtservices.co.za> - * rework for upstream merge - */ - -#include <linux/serial_8250.h> -#include <linux/dm9000.h> -#include <linux/gpio/machine.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <linux/platform_data/mtd-nand-pxa3xx.h> - -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/asoc-pxa.h> -#include "pxa320.h" - -#include "mxm8x10.h" - -#include "devices.h" -#include "generic.h" - -/* GPIO pin definition - -External device stuff - Leave unconfigured for now... ---------------------- -GPIO0 - DREQ (External DMA Request) -GPIO3 - nGCS2 (External Chip Select) Where is nGCS0; nGCS1; nGCS4; nGCS5 ? -GPIO4 - nGCS3 -GPIO15 - EXT_GPIO1 -GPIO16 - EXT_GPIO2 -GPIO17 - EXT_GPIO3 -GPIO24 - EXT_GPIO4 -GPIO25 - EXT_GPIO5 -GPIO26 - EXT_GPIO6 -GPIO27 - EXT_GPIO7 -GPIO28 - EXT_GPIO8 -GPIO29 - EXT_GPIO9 -GPIO30 - EXT_GPIO10 -GPIO31 - EXT_GPIO11 -GPIO57 - EXT_GPIO12 -GPIO74 - EXT_IRQ1 -GPIO75 - EXT_IRQ2 -GPIO76 - EXT_IRQ3 -GPIO77 - EXT_IRQ4 -GPIO78 - EXT_IRQ5 -GPIO79 - EXT_IRQ6 -GPIO80 - EXT_IRQ7 -GPIO81 - EXT_IRQ8 -GPIO87 - VCCIO_PWREN (External Device PWREN) - -Dallas 1-Wire - Leave unconfigured for now... -------------- -GPIO0_2 - DS - 1Wire - -Ethernet --------- -GPIO1 - DM9000 PWR -GPIO9 - DM9K_nIRQ -GPIO36 - DM9K_RESET - -Keypad - Leave unconfigured by for now... ------- -GPIO1_2 - KP_DKIN0 -GPIO5_2 - KP_MKOUT7 -GPIO82 - KP_DKIN1 -GPIO85 - KP_DKIN2 -GPIO86 - KP_DKIN3 -GPIO113 - KP_MKIN0 -GPIO114 - KP_MKIN1 -GPIO115 - KP_MKIN2 -GPIO116 - KP_MKIN3 -GPIO117 - KP_MKIN4 -GPIO118 - KP_MKIN5 -GPIO119 - KP_MKIN6 -GPIO120 - KP_MKIN7 -GPIO121 - KP_MKOUT0 -GPIO122 - KP_MKOUT1 -GPIO122 - KP_MKOUT2 -GPIO123 - KP_MKOUT3 -GPIO124 - KP_MKOUT4 -GPIO125 - KP_MKOUT5 -GPIO127 - KP_MKOUT6 - -Data Bus - Leave unconfigured for now... --------- -GPIO2 - nWait (Data Bus) - -USB Device ----------- -GPIO4_2 - USBD_PULLUP -GPIO10 - UTM_CLK (USB Device UTM Clk) -GPIO49 - USB 2.0 Device UTM_DATA0 -GPIO50 - USB 2.0 Device UTM_DATA1 -GPIO51 - USB 2.0 Device UTM_DATA2 -GPIO52 - USB 2.0 Device UTM_DATA3 -GPIO53 - USB 2.0 Device UTM_DATA4 -GPIO54 - USB 2.0 Device UTM_DATA5 -GPIO55 - USB 2.0 Device UTM_DATA6 -GPIO56 - USB 2.0 Device UTM_DATA7 -GPIO58 - UTM_RXVALID (USB 2.0 Device) -GPIO59 - UTM_RXACTIVE (USB 2.0 Device) -GPIO60 - UTM_RXERROR -GPIO61 - UTM_OPMODE0 -GPIO62 - UTM_OPMODE1 -GPIO71 - USBD_INT (USB Device?) -GPIO73 - UTM_TXREADY (USB 2.0 Device) -GPIO83 - UTM_TXVALID (USB 2.0 Device) -GPIO98 - UTM_RESET (USB 2.0 device) -GPIO99 - UTM_XCVR_SELECT -GPIO100 - UTM_TERM_SELECT -GPIO101 - UTM_SUSPENDM_X -GPIO102 - UTM_LINESTATE0 -GPIO103 - UTM_LINESTATE1 - -Card-Bus Interface - Leave unconfigured for now... ------------------- -GPIO5 - nPIOR (I/O space output enable) -GPIO6 - nPIOW (I/O space write enable) -GPIO7 - nIOS16 (Input from I/O space telling size of data bus) -GPIO8 - nPWAIT (Input for inserting wait states) - -LCD ---- -GPIO6_2 - LDD0 -GPIO7_2 - LDD1 -GPIO8_2 - LDD2 -GPIO9_2 - LDD3 -GPIO11_2 - LDD5 -GPIO12_2 - LDD6 -GPIO13_2 - LDD7 -GPIO14_2 - VSYNC -GPIO15_2 - HSYNC -GPIO16_2 - VCLK -GPIO17_2 - HCLK -GPIO18_2 - VDEN -GPIO63 - LDD8 (CPU LCD) -GPIO64 - LDD9 (CPU LCD) -GPIO65 - LDD10 (CPU LCD) -GPIO66 - LDD11 (CPU LCD) -GPIO67 - LDD12 (CPU LCD) -GPIO68 - LDD13 (CPU LCD) -GPIO69 - LDD14 (CPU LCD) -GPIO70 - LDD15 (CPU LCD) -GPIO88 - VCCLCD_PWREN (LCD Panel PWREN) -GPIO97 - BACKLIGHT_EN -GPIO104 - LCD_PWREN - -PWM - Leave unconfigured for now... ---- -GPIO11 - PWM0 -GPIO12 - PWM1 -GPIO13 - PWM2 -GPIO14 - PWM3 - -SD-CARD -------- -GPIO18 - SDDATA0 -GPIO19 - SDDATA1 -GPIO20 - SDDATA2 -GPIO21 - SDDATA3 -GPIO22 - SDCLK -GPIO23 - SDCMD -GPIO72 - SD_WP -GPIO84 - SD_nIRQ_CD (SD-Card) - -I2C ---- -GPIO32 - I2CSCL -GPIO33 - I2CSDA - -AC97 ----- -GPIO35 - AC97_SDATA_IN -GPIO37 - AC97_SDATA_OUT -GPIO38 - AC97_SYNC -GPIO39 - AC97_BITCLK -GPIO40 - AC97_nRESET - -UART1 ------ -GPIO41 - UART_RXD1 -GPIO42 - UART_TXD1 -GPIO43 - UART_CTS1 -GPIO44 - UART_DCD1 -GPIO45 - UART_DSR1 -GPIO46 - UART_nRI1 -GPIO47 - UART_DTR1 -GPIO48 - UART_RTS1 - -UART2 ------ -GPIO109 - RTS2 -GPIO110 - RXD2 -GPIO111 - TXD2 -GPIO112 - nCTS2 - -UART3 ------ -GPIO105 - nCTS3 -GPIO106 - nRTS3 -GPIO107 - TXD3 -GPIO108 - RXD3 - -SSP3 - Leave unconfigured for now... ----- -GPIO89 - SSP3_CLK -GPIO90 - SSP3_SFRM -GPIO91 - SSP3_TXD -GPIO92 - SSP3_RXD - -SSP4 -GPIO93 - SSP4_CLK -GPIO94 - SSP4_SFRM -GPIO95 - SSP4_TXD -GPIO96 - SSP4_RXD -*/ - -static mfp_cfg_t mfp_cfg[] __initdata = { - /* USB */ - GPIO10_UTM_CLK, - GPIO49_U2D_PHYDATA_0, - GPIO50_U2D_PHYDATA_1, - GPIO51_U2D_PHYDATA_2, - GPIO52_U2D_PHYDATA_3, - GPIO53_U2D_PHYDATA_4, - GPIO54_U2D_PHYDATA_5, - GPIO55_U2D_PHYDATA_6, - GPIO56_U2D_PHYDATA_7, - GPIO58_UTM_RXVALID, - GPIO59_UTM_RXACTIVE, - GPIO60_U2D_RXERROR, - GPIO61_U2D_OPMODE0, - GPIO62_U2D_OPMODE1, - GPIO71_GPIO, /* USBD_INT */ - GPIO73_UTM_TXREADY, - GPIO83_U2D_TXVALID, - GPIO98_U2D_RESET, - GPIO99_U2D_XCVR_SEL, - GPIO100_U2D_TERM_SEL, - GPIO101_U2D_SUSPEND, - GPIO102_UTM_LINESTATE_0, - GPIO103_UTM_LINESTATE_1, - GPIO4_2_GPIO | MFP_PULL_HIGH, /* UTM_PULLUP */ - - /* DM9000 */ - GPIO1_GPIO, - GPIO9_GPIO, - GPIO36_GPIO, - - /* AC97 */ - GPIO35_AC97_SDATA_IN_0, - GPIO37_AC97_SDATA_OUT, - GPIO38_AC97_SYNC, - GPIO39_AC97_BITCLK, - GPIO40_AC97_nACRESET, - - /* UARTS */ - GPIO41_UART1_RXD, - GPIO42_UART1_TXD, - GPIO43_UART1_CTS, - GPIO44_UART1_DCD, - GPIO45_UART1_DSR, - GPIO46_UART1_RI, - GPIO47_UART1_DTR, - GPIO48_UART1_RTS, - - GPIO109_UART2_RTS, - GPIO110_UART2_RXD, - GPIO111_UART2_TXD, - GPIO112_UART2_CTS, - - GPIO105_UART3_CTS, - GPIO106_UART3_RTS, - GPIO107_UART3_TXD, - GPIO108_UART3_RXD, - - GPIO78_GPIO, - GPIO79_GPIO, - GPIO80_GPIO, - GPIO81_GPIO, - - /* I2C */ - GPIO32_I2C_SCL, - GPIO33_I2C_SDA, - - /* MMC */ - GPIO18_MMC1_DAT0, - GPIO19_MMC1_DAT1, - GPIO20_MMC1_DAT2, - GPIO21_MMC1_DAT3, - GPIO22_MMC1_CLK, - GPIO23_MMC1_CMD, - GPIO72_GPIO | MFP_PULL_HIGH, /* Card Detect */ - GPIO84_GPIO | MFP_PULL_LOW, /* Write Protect */ - - /* IRQ */ - GPIO74_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ1 */ - GPIO75_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ2 */ - GPIO76_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ3 */ - GPIO77_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ4 */ - GPIO78_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ5 */ - GPIO79_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ6 */ - GPIO80_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ7 */ - GPIO81_GPIO | MFP_LPM_EDGE_RISE /* EXT_IRQ8 */ -}; - -/* MMC/MCI Support */ -#if defined(CONFIG_MMC) -static struct pxamci_platform_data mxm_8x10_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .detect_delay_ms = 10, -}; - -static struct gpiod_lookup_table mxm_8x10_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - /* Card detect on GPIO 72 */ - GPIO_LOOKUP("gpio-pxa", MXM_8X10_SD_nCD, - "cd", GPIO_ACTIVE_LOW), - /* Write protect on GPIO 84 */ - GPIO_LOOKUP("gpio-pxa", MXM_8X10_SD_WP, - "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -void __init mxm_8x10_mmc_init(void) -{ - gpiod_add_lookup_table(&mxm_8x10_mci_gpio_table); - pxa_set_mci_info(&mxm_8x10_mci_platform_data); -} -#endif - -/* USB Open Host Controller Interface */ -static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = { - .port_mode = PMM_NPS_MODE, - .flags = ENABLE_PORT_ALL -}; - -void __init mxm_8x10_usb_host_init(void) -{ - pxa_set_ohci_info(&mxm_8x10_ohci_platform_data); -} - -void __init mxm_8x10_ac97_init(void) -{ - pxa_set_ac97_info(NULL); -} - -/* NAND flash Support */ -#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL) -#define NAND_BLOCK_SIZE SZ_128K -#define NB(x) (NAND_BLOCK_SIZE * (x)) -static struct mtd_partition mxm_8x10_nand_partitions[] = { - [0] = { - .name = "boot", - .size = NB(0x002), - .offset = NB(0x000), - .mask_flags = MTD_WRITEABLE - }, - [1] = { - .name = "kernel", - .size = NB(0x010), - .offset = NB(0x002), - .mask_flags = MTD_WRITEABLE - }, - [2] = { - .name = "root", - .size = NB(0x36c), - .offset = NB(0x012) - }, - [3] = { - .name = "bbt", - .size = NB(0x082), - .offset = NB(0x37e), - .mask_flags = MTD_WRITEABLE - } -}; - -static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = { - .keep_config = 1, - .parts = mxm_8x10_nand_partitions, - .nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions) -}; - -static void __init mxm_8x10_nand_init(void) -{ - pxa3xx_set_nand_info(&mxm_8x10_nand_info); -} -#else -static inline void mxm_8x10_nand_init(void) {} -#endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */ - -/* Ethernet support: Davicom DM9000 */ -static struct resource dm9k_resources[] = { - [0] = { - .start = MXM_8X10_ETH_PHYS + 0x300, - .end = MXM_8X10_ETH_PHYS + 0x300, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = MXM_8X10_ETH_PHYS + 0x308, - .end = MXM_8X10_ETH_PHYS + 0x308, - .flags = IORESOURCE_MEM - }, - [2] = { - .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)), - .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE - } -}; - -static struct dm9000_plat_data dm9k_plat_data = { - .flags = DM9000_PLATF_16BITONLY -}; - -static struct platform_device dm9k_device = { - .name = "dm9000", - .id = 0, - .num_resources = ARRAY_SIZE(dm9k_resources), - .resource = dm9k_resources, - .dev = { - .platform_data = &dm9k_plat_data - } -}; - -static void __init mxm_8x10_ethernet_init(void) -{ - platform_device_register(&dm9k_device); -} - -/* PXA UARTs */ -static void __init mxm_8x10_uarts_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); -} - -/* I2C and Real Time Clock */ -static struct i2c_board_info __initdata mxm_8x10_i2c_devices[] = { - { - I2C_BOARD_INFO("ds1337", 0x68) - } -}; - -static void __init mxm_8x10_i2c_init(void) -{ - i2c_register_board_info(0, mxm_8x10_i2c_devices, - ARRAY_SIZE(mxm_8x10_i2c_devices)); - pxa_set_i2c_info(NULL); -} - -void __init mxm_8x10_barebones_init(void) -{ - pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg)); - - mxm_8x10_uarts_init(); - mxm_8x10_nand_init(); - mxm_8x10_i2c_init(); - mxm_8x10_ethernet_init(); -} diff --git a/arch/arm/mach-pxa/mxm8x10.h b/arch/arm/mach-pxa/mxm8x10.h deleted file mode 100644 index dcd32321c995..000000000000 --- a/arch/arm/mach-pxa/mxm8x10.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __MACH_MXM_8X10_H -#define __MACH_MXM_8X10_H - -#define MXM_8X10_ETH_PHYS 0x13000000 - -#if defined(CONFIG_MMC) - -#define MXM_8X10_SD_nCD (72) -#define MXM_8X10_SD_WP (84) - -extern void mxm_8x10_mmc_init(void); -#else -static inline void mxm_8x10_mmc_init(void) {} -#endif - -extern void mxm_8x10_usb_host_init(void); -extern void mxm_8x10_ac97_init(void); - -extern void mxm_8x10_barebones_init(void); - -#endif /* __MACH_MXM_8X10_H */ diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c deleted file mode 100644 index 1a8d25eecac3..000000000000 --- a/arch/arm/mach-pxa/palm27x.c +++ /dev/null @@ -1,473 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Common code for Palm LD, T5, TX, Z72 - * - * Copyright (C) 2010-2011 Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/pda_power.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio/machine.h> -#include <linux/gpio.h> -#include <linux/wm97xx.h> -#include <linux/power_supply.h> -#include <linux/regulator/max1586.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa27x.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/irda-pxaficp.h> -#include "udc.h" -#include <linux/platform_data/asoc-palm27x.h> -#include "palm27x.h" - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * SD/MMC card controller - ******************************************************************************/ -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -static struct pxamci_platform_data palm27x_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .detect_delay_ms = 200, -}; - -void __init palm27x_mmc_init(struct gpiod_lookup_table *gtable) -{ - if (gtable) - gpiod_add_lookup_table(gtable); - pxa_set_mci_info(&palm27x_mci_platform_data); -} -#endif - -/****************************************************************************** - * Power management - standby - ******************************************************************************/ -#if defined(CONFIG_SUSPEND) -void __init palm27x_pm_init(unsigned long str_base) -{ - static const unsigned long resume[] = { - 0xe3a00101, /* mov r0, #0x40000000 */ - 0xe380060f, /* orr r0, r0, #0x00f00000 */ - 0xe590f008, /* ldr pc, [r0, #0x08] */ - }; - - /* - * Copy the bootloader. - * NOTE: PalmZ72 uses a different wakeup method! - */ - memcpy(phys_to_virt(str_base), resume, sizeof(resume)); -} -#endif - -/****************************************************************************** - * Framebuffer - ******************************************************************************/ -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -struct pxafb_mode_info palm_320x480_lcd_mode = { - .pixclock = 57692, - .xres = 320, - .yres = 480, - .bpp = 16, - - .left_margin = 32, - .right_margin = 1, - .upper_margin = 7, - .lower_margin = 1, - - .hsync_len = 4, - .vsync_len = 1, -}; - -struct pxafb_mode_info palm_320x320_lcd_mode = { - .pixclock = 115384, - .xres = 320, - .yres = 320, - .bpp = 16, - - .left_margin = 27, - .right_margin = 7, - .upper_margin = 7, - .lower_margin = 8, - - .hsync_len = 6, - .vsync_len = 1, -}; - -struct pxafb_mode_info palm_320x320_new_lcd_mode = { - .pixclock = 86538, - .xres = 320, - .yres = 320, - .bpp = 16, - - .left_margin = 20, - .right_margin = 8, - .upper_margin = 8, - .lower_margin = 5, - - .hsync_len = 4, - .vsync_len = 1, -}; - -static struct pxafb_mach_info palm27x_lcd_screen = { - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -static int palm27x_lcd_power; -static void palm27x_lcd_ctl(int on, struct fb_var_screeninfo *info) -{ - gpio_set_value(palm27x_lcd_power, on); -} - -void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode) -{ - palm27x_lcd_screen.modes = mode; - - if (gpio_is_valid(power)) { - if (!gpio_request(power, "LCD power")) { - pr_err("Palm27x: failed to claim lcd power gpio!\n"); - return; - } - if (!gpio_direction_output(power, 1)) { - pr_err("Palm27x: lcd power configuration failed!\n"); - return; - } - palm27x_lcd_power = power; - palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl; - } - - pxa_set_fb_info(NULL, &palm27x_lcd_screen); -} -#endif - -/****************************************************************************** - * USB Gadget - ******************************************************************************/ -#if defined(CONFIG_USB_PXA27X) || \ - defined(CONFIG_USB_PXA27X_MODULE) - -/* The actual GPIO offsets get filled in in the palm27x_udc_init() call */ -static struct gpiod_lookup_table palm27x_udc_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", 0, - "vbus", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", 0, - "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device palm27x_gpio_vbus = { - .name = "gpio-vbus", - .id = -1, -}; - -void __init palm27x_udc_init(int vbus, int pullup, int vbus_inverted) -{ - palm27x_udc_gpiod_table.table[0].chip_hwnum = vbus; - palm27x_udc_gpiod_table.table[1].chip_hwnum = pullup; - if (vbus_inverted) - palm27x_udc_gpiod_table.table[0].flags = GPIO_ACTIVE_LOW; - - gpiod_add_lookup_table(&palm27x_udc_gpiod_table); - platform_device_register(&palm27x_gpio_vbus); -} -#endif - -/****************************************************************************** - * IrDA - ******************************************************************************/ -#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE) -static struct pxaficp_platform_data palm27x_ficp_platform_data = { - .transceiver_cap = IR_SIRMODE | IR_OFF, -}; - -void __init palm27x_irda_init(int pwdn) -{ - palm27x_ficp_platform_data.gpio_pwdown = pwdn; - pxa_set_ficp_info(&palm27x_ficp_platform_data); -} -#endif - -/****************************************************************************** - * WM97xx audio, battery - ******************************************************************************/ -#if defined(CONFIG_TOUCHSCREEN_WM97XX) || \ - defined(CONFIG_TOUCHSCREEN_WM97XX_MODULE) -static struct wm97xx_batt_pdata palm27x_batt_pdata = { - .batt_aux = WM97XX_AUX_ID3, - .temp_aux = WM97XX_AUX_ID2, - .batt_mult = 1000, - .batt_div = 414, - .temp_mult = 1, - .temp_div = 1, - .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, - .batt_name = "main-batt", -}; - -static struct wm97xx_pdata palm27x_wm97xx_pdata = { - .batt_pdata = &palm27x_batt_pdata, -}; - -static pxa2xx_audio_ops_t palm27x_ac97_pdata = { - .codec_pdata = { &palm27x_wm97xx_pdata, }, -}; - -static struct palm27x_asoc_info palm27x_asoc_pdata = { - .jack_gpio = -1, -}; - -static struct platform_device palm27x_asoc = { - .name = "palm27x-asoc", - .id = -1, - .dev = { - .platform_data = &palm27x_asoc_pdata, - }, -}; - -void __init palm27x_ac97_init(int minv, int maxv, int jack, int reset) -{ - palm27x_ac97_pdata.reset_gpio = reset; - palm27x_asoc_pdata.jack_gpio = jack; - - if (minv < 0 || maxv < 0) { - palm27x_ac97_pdata.codec_pdata[0] = NULL; - pxa_set_ac97_info(&palm27x_ac97_pdata); - } else { - palm27x_batt_pdata.min_voltage = minv, - palm27x_batt_pdata.max_voltage = maxv, - - pxa_set_ac97_info(&palm27x_ac97_pdata); - platform_device_register(&palm27x_asoc); - } -} -#endif - -/****************************************************************************** - * Backlight - ******************************************************************************/ -#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) -static struct pwm_lookup palm27x_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 3500 * 1024, - PWM_POLARITY_NORMAL), -}; - -static int palm_bl_power; -static int palm_lcd_power; - -static int palm27x_backlight_init(struct device *dev) -{ - int ret; - - ret = gpio_request(palm_bl_power, "BL POWER"); - if (ret) - goto err; - ret = gpio_direction_output(palm_bl_power, 0); - if (ret) - goto err2; - - if (gpio_is_valid(palm_lcd_power)) { - ret = gpio_request(palm_lcd_power, "LCD POWER"); - if (ret) - goto err2; - ret = gpio_direction_output(palm_lcd_power, 0); - if (ret) - goto err3; - } - - return 0; -err3: - gpio_free(palm_lcd_power); -err2: - gpio_free(palm_bl_power); -err: - return ret; -} - -static int palm27x_backlight_notify(struct device *dev, int brightness) -{ - gpio_set_value(palm_bl_power, brightness); - if (gpio_is_valid(palm_lcd_power)) - gpio_set_value(palm_lcd_power, brightness); - return brightness; -} - -static void palm27x_backlight_exit(struct device *dev) -{ - gpio_free(palm_bl_power); - if (gpio_is_valid(palm_lcd_power)) - gpio_free(palm_lcd_power); -} - -static struct platform_pwm_backlight_data palm27x_backlight_data = { - .max_brightness = 0xfe, - .dft_brightness = 0x7e, - .init = palm27x_backlight_init, - .notify = palm27x_backlight_notify, - .exit = palm27x_backlight_exit, -}; - -static struct platform_device palm27x_backlight = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa27x_device_pwm0.dev, - .platform_data = &palm27x_backlight_data, - }, -}; - -void __init palm27x_pwm_init(int bl, int lcd) -{ - palm_bl_power = bl; - palm_lcd_power = lcd; - pwm_add_table(palm27x_pwm_lookup, ARRAY_SIZE(palm27x_pwm_lookup)); - platform_device_register(&palm27x_backlight); -} -#endif - -/****************************************************************************** - * Power supply - ******************************************************************************/ -#if defined(CONFIG_PDA_POWER) || defined(CONFIG_PDA_POWER_MODULE) -static int palm_ac_state; -static int palm_usb_state; - -static int palm27x_power_supply_init(struct device *dev) -{ - int ret; - - ret = gpio_request(palm_ac_state, "AC state"); - if (ret) - goto err1; - ret = gpio_direction_input(palm_ac_state); - if (ret) - goto err2; - - if (gpio_is_valid(palm_usb_state)) { - ret = gpio_request(palm_usb_state, "USB state"); - if (ret) - goto err2; - ret = gpio_direction_input(palm_usb_state); - if (ret) - goto err3; - } - - return 0; -err3: - gpio_free(palm_usb_state); -err2: - gpio_free(palm_ac_state); -err1: - return ret; -} - -static void palm27x_power_supply_exit(struct device *dev) -{ - gpio_free(palm_usb_state); - gpio_free(palm_ac_state); -} - -static int palm27x_is_ac_online(void) -{ - return gpio_get_value(palm_ac_state); -} - -static int palm27x_is_usb_online(void) -{ - return !gpio_get_value(palm_usb_state); -} -static char *palm27x_supplicants[] = { - "main-battery", -}; - -static struct pda_power_pdata palm27x_ps_info = { - .init = palm27x_power_supply_init, - .exit = palm27x_power_supply_exit, - .is_ac_online = palm27x_is_ac_online, - .is_usb_online = palm27x_is_usb_online, - .supplied_to = palm27x_supplicants, - .num_supplicants = ARRAY_SIZE(palm27x_supplicants), -}; - -static struct platform_device palm27x_power_supply = { - .name = "pda-power", - .id = -1, - .dev = { - .platform_data = &palm27x_ps_info, - }, -}; - -void __init palm27x_power_init(int ac, int usb) -{ - palm_ac_state = ac; - palm_usb_state = usb; - platform_device_register(&palm27x_power_supply); -} -#endif - -/****************************************************************************** - * Core power regulator - ******************************************************************************/ -#if defined(CONFIG_REGULATOR_MAX1586) || \ - defined(CONFIG_REGULATOR_MAX1586_MODULE) -static struct regulator_consumer_supply palm27x_max1587a_consumers[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data palm27x_max1587a_v3_info = { - .constraints = { - .name = "vcc_core range", - .min_uV = 900000, - .max_uV = 1705000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .consumer_supplies = palm27x_max1587a_consumers, - .num_consumer_supplies = ARRAY_SIZE(palm27x_max1587a_consumers), -}; - -static struct max1586_subdev_data palm27x_max1587a_subdevs[] = { - { - .name = "vcc_core", - .id = MAX1586_V3, - .platform_data = &palm27x_max1587a_v3_info, - } -}; - -static struct max1586_platform_data palm27x_max1587a_info = { - .subdevs = palm27x_max1587a_subdevs, - .num_subdevs = ARRAY_SIZE(palm27x_max1587a_subdevs), - .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */ -}; - -static struct i2c_board_info __initdata palm27x_pi2c_board_info[] = { - { - I2C_BOARD_INFO("max1586", 0x14), - .platform_data = &palm27x_max1587a_info, - }, -}; - -static struct i2c_pxa_platform_data palm27x_i2c_power_info = { - .use_pio = 1, -}; - -void __init palm27x_pmic_init(void) -{ - i2c_register_board_info(1, ARRAY_AND_SIZE(palm27x_pi2c_board_info)); - pxa27x_set_i2c_power_info(&palm27x_i2c_power_info); -} -#endif diff --git a/arch/arm/mach-pxa/palm27x.h b/arch/arm/mach-pxa/palm27x.h deleted file mode 100644 index bd3075bbb3aa..000000000000 --- a/arch/arm/mach-pxa/palm27x.h +++ /dev/null @@ -1,77 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Common functions for Palm LD, T5, TX, Z72 - * - * Copyright (C) 2010 - * Marek Vasut <marek.vasut@gmail.com> - */ -#ifndef __INCLUDE_MACH_PALM27X__ -#define __INCLUDE_MACH_PALM27X__ - -#include <linux/gpio/machine.h> - -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -extern void __init palm27x_mmc_init(struct gpiod_lookup_table *gtable); -#else -static inline void palm27x_mmc_init(struct gpiod_lookup_table *gtable) -{} -#endif - -#if defined(CONFIG_SUSPEND) -extern void __init palm27x_pm_init(unsigned long str_base); -#else -static inline void palm27x_pm_init(unsigned long str_base) {} -#endif - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -extern struct pxafb_mode_info palm_320x480_lcd_mode; -extern struct pxafb_mode_info palm_320x320_lcd_mode; -extern struct pxafb_mode_info palm_320x320_new_lcd_mode; -extern void __init palm27x_lcd_init(int power, - struct pxafb_mode_info *mode); -#else -#define palm27x_lcd_init(power, mode) do {} while (0) -#endif - -#if defined(CONFIG_USB_PXA27X) || \ - defined(CONFIG_USB_PXA27X_MODULE) -extern void __init palm27x_udc_init(int vbus, int pullup, - int vbus_inverted); -#else -static inline void palm27x_udc_init(int vbus, int pullup, int vbus_inverted) {} -#endif - -#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE) -extern void __init palm27x_irda_init(int pwdn); -#else -static inline void palm27x_irda_init(int pwdn) {} -#endif - -#if defined(CONFIG_TOUCHSCREEN_WM97XX) || \ - defined(CONFIG_TOUCHSCREEN_WM97XX_MODULE) -extern void __init palm27x_ac97_init(int minv, int maxv, int jack, - int reset); -#else -static inline void palm27x_ac97_init(int minv, int maxv, int jack, int reset) {} -#endif - -#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) -extern void __init palm27x_pwm_init(int bl, int lcd); -#else -static inline void palm27x_pwm_init(int bl, int lcd) {} -#endif - -#if defined(CONFIG_PDA_POWER) || defined(CONFIG_PDA_POWER_MODULE) -extern void __init palm27x_power_init(int ac, int usb); -#else -static inline void palm27x_power_init(int ac, int usb) {} -#endif - -#if defined(CONFIG_REGULATOR_MAX1586) || \ - defined(CONFIG_REGULATOR_MAX1586_MODULE) -extern void __init palm27x_pmic_init(void); -#else -static inline void palm27x_pmic_init(void) {} -#endif - -#endif /* __INCLUDE_MACH_PALM27X__ */ diff --git a/arch/arm/mach-pxa/palmld-pcmcia.c b/arch/arm/mach-pxa/palmld-pcmcia.c deleted file mode 100644 index 720294a50864..000000000000 --- a/arch/arm/mach-pxa/palmld-pcmcia.c +++ /dev/null @@ -1,111 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmld.c - * - * Driver for Palm LifeDrive PCMCIA - * - * Copyright (C) 2006 Alex Osborne <ato@meshy.org> - * Copyright (C) 2007-2011 Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> - -#include <asm/mach-types.h> -#include <pcmcia/soc_common.h> - -#include "palmld.h" - -static struct gpio palmld_pcmcia_gpios[] = { - { GPIO_NR_PALMLD_PCMCIA_POWER, GPIOF_INIT_LOW, "PCMCIA Power" }, - { GPIO_NR_PALMLD_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmld_pcmcia_gpios, - ARRAY_SIZE(palmld_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMLD_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmld_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmld_pcmcia_gpios, ARRAY_SIZE(palmld_pcmcia_gpios)); -} - -static void palmld_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int palmld_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(GPIO_NR_PALMLD_PCMCIA_POWER, 1); - gpio_set_value(GPIO_NR_PALMLD_PCMCIA_RESET, - !!(state->flags & SS_RESET)); - - return 0; -} - -static struct pcmcia_low_level palmld_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 1, - .nr = 1, - - .hw_init = palmld_pcmcia_hw_init, - .hw_shutdown = palmld_pcmcia_hw_shutdown, - - .socket_state = palmld_pcmcia_socket_state, - .configure_socket = palmld_pcmcia_configure_socket, -}; - -static struct platform_device *palmld_pcmcia_device; - -static int __init palmld_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmld()) - return -ENODEV; - - palmld_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmld_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmld_pcmcia_device, &palmld_pcmcia_ops, - sizeof(palmld_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmld_pcmcia_device); - - if (ret) - platform_device_put(palmld_pcmcia_device); - - return ret; -} - -static void __exit palmld_pcmcia_exit(void) -{ - platform_device_unregister(palmld_pcmcia_device); -} - -module_init(palmld_pcmcia_init); -module_exit(palmld_pcmcia_exit); - -MODULE_AUTHOR("Alex Osborne <ato@meshy.org>," - " Marek Vasut <marek.vasut@gmail.com>"); -MODULE_DESCRIPTION("PCMCIA support for Palm LifeDrive"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c deleted file mode 100644 index 32308c63884e..000000000000 --- a/arch/arm/mach-pxa/palmld.c +++ /dev/null @@ -1,392 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hardware definitions for Palm LifeDrive - * - * Author: Marek Vasut <marek.vasut@gmail.com> - * - * Based on work of: - * Alex Osborne <ato@meshy.org> - * - * (find more info at www.hackndev.com) - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/pda_power.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio.h> -#include <linux/wm97xx.h> -#include <linux/power_supply.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa27x.h" -#include "palmld.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include <linux/platform_data/asoc-palm27x.h> -#include "palm27x.h" - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long palmld_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO14_GPIO, /* SD detect */ - GPIO114_GPIO, /* SD power */ - GPIO116_GPIO, /* SD r/o switch */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO89_AC97_SYSCLK, - GPIO95_AC97_nRESET, - - /* IrDA */ - GPIO108_GPIO, /* ir disable */ - GPIO46_FICP_RXD, - GPIO47_FICP_TXD, - - /* MATRIX KEYPAD */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* PWM */ - GPIO16_PWM0_OUT, - - /* GPIO KEYS */ - GPIO10_GPIO, /* hotsync button */ - GPIO12_GPIO, /* power switch */ - GPIO15_GPIO, /* lock switch */ - - /* LEDs */ - GPIO52_GPIO, /* green led */ - GPIO94_GPIO, /* orange led */ - - /* PCMCIA */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO85_nPCE_1, - GPIO54_nPCE_2, - GPIO79_PSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - GPIO36_GPIO, /* wifi power */ - GPIO38_GPIO, /* wifi ready */ - GPIO81_GPIO, /* wifi reset */ - - /* FFUART */ - GPIO34_FFUART_RXD, - GPIO39_FFUART_TXD, - - /* HDD */ - GPIO98_GPIO, /* HDD reset */ - GPIO115_GPIO, /* HDD power */ - - /* MISC */ - GPIO13_GPIO, /* earphone detect */ -}; - -/****************************************************************************** - * NOR Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct mtd_partition palmld_partitions[] = { - { - .name = "Flash", - .offset = 0x00000000, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - } -}; - -static struct physmap_flash_data palmld_flash_data[] = { - { - .width = 2, /* bankwidth in bytes */ - .parts = palmld_partitions, - .nr_parts = ARRAY_SIZE(palmld_partitions) - } -}; - -static struct resource palmld_flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_4M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device palmld_flash = { - .name = "physmap-flash", - .id = 0, - .resource = &palmld_flash_resource, - .num_resources = 1, - .dev = { - .platform_data = palmld_flash_data, - }, -}; - -static void __init palmld_nor_init(void) -{ - platform_device_register(&palmld_flash); -} -#else -static inline void palmld_nor_init(void) {} -#endif - -/****************************************************************************** - * GPIO keyboard - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int palmld_matrix_keys[] = { - KEY(0, 1, KEY_F2), - KEY(0, 2, KEY_UP), - - KEY(1, 0, KEY_F3), - KEY(1, 1, KEY_F4), - KEY(1, 2, KEY_RIGHT), - - KEY(2, 0, KEY_F1), - KEY(2, 1, KEY_F5), - KEY(2, 2, KEY_DOWN), - - KEY(3, 0, KEY_F6), - KEY(3, 1, KEY_ENTER), - KEY(3, 2, KEY_LEFT), -}; - -static struct matrix_keymap_data palmld_matrix_keymap_data = { - .keymap = palmld_matrix_keys, - .keymap_size = ARRAY_SIZE(palmld_matrix_keys), -}; - -static struct pxa27x_keypad_platform_data palmld_keypad_platform_data = { - .matrix_key_rows = 4, - .matrix_key_cols = 3, - .matrix_keymap_data = &palmld_matrix_keymap_data, - - .debounce_interval = 30, -}; - -static void __init palmld_kpc_init(void) -{ - pxa_set_keypad_info(&palmld_keypad_platform_data); -} -#else -static inline void palmld_kpc_init(void) {} -#endif - -/****************************************************************************** - * GPIO keys - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) -static struct gpio_keys_button palmld_pxa_buttons[] = { - {KEY_F8, GPIO_NR_PALMLD_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, - {KEY_F9, GPIO_NR_PALMLD_LOCK_SWITCH, 0, "Lock Switch" }, - {KEY_POWER, GPIO_NR_PALMLD_POWER_SWITCH, 0, "Power Switch" }, -}; - -static struct gpio_keys_platform_data palmld_pxa_keys_data = { - .buttons = palmld_pxa_buttons, - .nbuttons = ARRAY_SIZE(palmld_pxa_buttons), -}; - -static struct platform_device palmld_pxa_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &palmld_pxa_keys_data, - }, -}; - -static void __init palmld_keys_init(void) -{ - platform_device_register(&palmld_pxa_keys); -} -#else -static inline void palmld_keys_init(void) {} -#endif - -/****************************************************************************** - * LEDs - ******************************************************************************/ -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -struct gpio_led gpio_leds[] = { -{ - .name = "palmld:green:led", - .default_trigger = "none", - .gpio = GPIO_NR_PALMLD_LED_GREEN, -}, { - .name = "palmld:amber:led", - .default_trigger = "none", - .gpio = GPIO_NR_PALMLD_LED_AMBER, -}, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device palmld_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - } -}; - -static void __init palmld_leds_init(void) -{ - platform_device_register(&palmld_leds); -} -#else -static inline void palmld_leds_init(void) {} -#endif - -/****************************************************************************** - * HDD - ******************************************************************************/ -#if defined(CONFIG_PATA_PALMLD) || defined(CONFIG_PATA_PALMLD_MODULE) -static struct resource palmld_ide_resources[] = { - DEFINE_RES_MEM(PALMLD_IDE_PHYS, 0x1000), -}; - -static struct platform_device palmld_ide_device = { - .name = "pata_palmld", - .id = -1, - .resource = palmld_ide_resources, - .num_resources = ARRAY_SIZE(palmld_ide_resources), -}; - -static struct gpiod_lookup_table palmld_ide_gpio_table = { - .dev_id = "pata_palmld", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_IDE_PWEN, - "power", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_IDE_RESET, - "reset", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init palmld_ide_init(void) -{ - gpiod_add_lookup_table(&palmld_ide_gpio_table); - platform_device_register(&palmld_ide_device); -} -#else -static inline void palmld_ide_init(void) {} -#endif - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static struct map_desc palmld_io_desc[] __initdata = { -{ - .virtual = PALMLD_IDE_VIRT, - .pfn = __phys_to_pfn(PALMLD_IDE_PHYS), - .length = PALMLD_IDE_SIZE, - .type = MT_DEVICE -}, -{ - .virtual = PALMLD_USB_VIRT, - .pfn = __phys_to_pfn(PALMLD_USB_PHYS), - .length = PALMLD_USB_SIZE, - .type = MT_DEVICE -}, -}; - -static void __init palmld_map_io(void) -{ - pxa27x_map_io(); - iotable_init(palmld_io_desc, ARRAY_SIZE(palmld_io_desc)); -} - -static struct gpiod_lookup_table palmld_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_SD_READONLY, - "wp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_SD_POWER, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table palmld_wm97xx_touch_gpio_table = { - .dev_id = "wm97xx-touch", - .table = { - GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init palmld_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - palm27x_mmc_init(&palmld_mci_gpio_table); - gpiod_add_lookup_table(&palmld_wm97xx_touch_gpio_table); - palm27x_pm_init(PALMLD_STR_BASE); - palm27x_lcd_init(-1, &palm_320x480_lcd_mode); - palm27x_irda_init(GPIO_NR_PALMLD_IR_DISABLE); - palm27x_ac97_init(PALMLD_BAT_MIN_VOLTAGE, PALMLD_BAT_MAX_VOLTAGE, - GPIO_NR_PALMLD_EARPHONE_DETECT, 95); - palm27x_pwm_init(GPIO_NR_PALMLD_BL_POWER, GPIO_NR_PALMLD_LCD_POWER); - palm27x_power_init(GPIO_NR_PALMLD_POWER_DETECT, - GPIO_NR_PALMLD_USB_DETECT_N); - palm27x_pmic_init(); - palmld_kpc_init(); - palmld_keys_init(); - palmld_nor_init(); - palmld_leds_init(); - palmld_ide_init(); -} - -MACHINE_START(PALMLD, "Palm LifeDrive") - .atag_offset = 0x100, - .map_io = palmld_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = palmld_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/palmld.h b/arch/arm/mach-pxa/palmld.h deleted file mode 100644 index 99a6d8b3a1e3..000000000000 --- a/arch/arm/mach-pxa/palmld.h +++ /dev/null @@ -1,107 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Palm LifeDrive Handheld Computer - * - * Authors: Alex Osborne <ato@meshy.org> - * Marek Vasut <marek.vasut@gmail.com> - */ - -#ifndef _INCLUDE_PALMLD_H_ -#define _INCLUDE_PALMLD_H_ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMLD_GPIO_RESET 1 -#define GPIO_NR_PALMLD_POWER_DETECT 4 -#define GPIO_NR_PALMLD_HOTSYNC_BUTTON_N 10 -#define GPIO_NR_PALMLD_POWER_SWITCH 12 -#define GPIO_NR_PALMLD_EARPHONE_DETECT 13 -#define GPIO_NR_PALMLD_LOCK_SWITCH 15 - -/* SD/MMC */ -#define GPIO_NR_PALMLD_SD_DETECT_N 14 -#define GPIO_NR_PALMLD_SD_POWER 114 -#define GPIO_NR_PALMLD_SD_READONLY 116 - -/* TOUCHSCREEN */ -#define GPIO_NR_PALMLD_WM9712_IRQ 27 - -/* IRDA */ -#define GPIO_NR_PALMLD_IR_DISABLE 108 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMLD_BL_POWER 19 -#define GPIO_NR_PALMLD_LCD_POWER 96 - -/* LCD BORDER */ -#define GPIO_NR_PALMLD_BORDER_SWITCH 21 -#define GPIO_NR_PALMLD_BORDER_SELECT 22 - -/* BLUETOOTH */ -#define GPIO_NR_PALMLD_BT_POWER 17 -#define GPIO_NR_PALMLD_BT_RESET 83 - -/* PCMCIA (WiFi) */ -#define GPIO_NR_PALMLD_PCMCIA_READY 38 -#define GPIO_NR_PALMLD_PCMCIA_POWER 36 -#define GPIO_NR_PALMLD_PCMCIA_RESET 81 - -/* LEDs */ -#define GPIO_NR_PALMLD_LED_GREEN 52 -#define GPIO_NR_PALMLD_LED_AMBER 94 - -/* IDE */ -#define GPIO_NR_PALMLD_IDE_RESET 98 -#define GPIO_NR_PALMLD_IDE_PWEN 115 - -/* USB */ -#define GPIO_NR_PALMLD_USB_DETECT_N 3 -#define GPIO_NR_PALMLD_USB_READY 86 -#define GPIO_NR_PALMLD_USB_RESET 88 -#define GPIO_NR_PALMLD_USB_INT 106 -#define GPIO_NR_PALMLD_USB_POWER 118 -/* 20, 53 and 86 are usb related too */ - -/* INTERRUPTS */ -#define IRQ_GPIO_PALMLD_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET) -#define IRQ_GPIO_PALMLD_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N) -#define IRQ_GPIO_PALMLD_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ) -#define IRQ_GPIO_PALMLD_IDE_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ) - - -/** HERE ARE INIT VALUES **/ - -/* IO mappings */ -#define PALMLD_USB_PHYS PXA_CS2_PHYS -#define PALMLD_USB_VIRT 0xf0000000 -#define PALMLD_USB_SIZE 0x00100000 - -#define PALMLD_IDE_PHYS 0x20000000 -#define PALMLD_IDE_VIRT 0xf1000000 -#define PALMLD_IDE_SIZE 0x00100000 - -#define PALMLD_PHYS_IO_START 0x40000000 -#define PALMLD_STR_BASE 0xa0200000 - -/* BATTERY */ -#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ -#define PALMLD_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ -#define PALMLD_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMLD_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMLD_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMLD_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMLD_MAX_LIFE_MINS 240 /* on-life in minutes */ - -#define PALMLD_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMLD_MAX_INTENSITY 0xFE -#define PALMLD_DEFAULT_INTENSITY 0x7E -#define PALMLD_LIMIT_MASK 0x7F -#define PALMLD_PRESCALER 0x3F -#define PALMLD_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c deleted file mode 100644 index 463b62ec1b01..000000000000 --- a/arch/arm/mach-pxa/palmt5.c +++ /dev/null @@ -1,234 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hardware definitions for Palm Tungsten|T5 - * - * Author: Marek Vasut <marek.vasut@gmail.com> - * - * Based on work of: - * Ales Snuparek <snuparek@atlas.cz> - * Justin Kendrick <twilightsentry@gmail.com> - * RichardT5 <richard_t5@users.sourceforge.net> - * - * (find more info at www.hackndev.com) - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/memblock.h> -#include <linux/pda_power.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio.h> -#include <linux/wm97xx.h> -#include <linux/power_supply.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa27x.h" -#include <linux/platform_data/asoc-pxa.h> -#include "palmt5.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include "udc.h" -#include <linux/platform_data/asoc-palm27x.h> -#include "palm27x.h" - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long palmt5_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO14_GPIO, /* SD detect */ - GPIO114_GPIO, /* SD power */ - GPIO115_GPIO, /* SD r/o switch */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO89_AC97_SYSCLK, - GPIO95_AC97_nRESET, - - /* IrDA */ - GPIO40_GPIO, /* ir disable */ - GPIO46_FICP_RXD, - GPIO47_FICP_TXD, - - /* USB */ - GPIO15_GPIO, /* usb detect */ - GPIO93_GPIO, /* usb power */ - - /* MATRIX KEYPAD */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* PWM */ - GPIO16_PWM0_OUT, - - /* FFUART */ - GPIO34_FFUART_RXD, - GPIO39_FFUART_TXD, - - /* MISC */ - GPIO10_GPIO, /* hotsync button */ - GPIO90_GPIO, /* power detect */ - GPIO107_GPIO, /* earphone detect */ -}; - -/****************************************************************************** - * GPIO keyboard - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int palmt5_matrix_keys[] = { - KEY(0, 0, KEY_POWER), - KEY(0, 1, KEY_F1), - KEY(0, 2, KEY_ENTER), - - KEY(1, 0, KEY_F2), - KEY(1, 1, KEY_F3), - KEY(1, 2, KEY_F4), - - KEY(2, 0, KEY_UP), - KEY(2, 2, KEY_DOWN), - - KEY(3, 0, KEY_RIGHT), - KEY(3, 2, KEY_LEFT), -}; - -static struct matrix_keymap_data palmt5_matrix_keymap_data = { - .keymap = palmt5_matrix_keys, - .keymap_size = ARRAY_SIZE(palmt5_matrix_keys), -}; - -static struct pxa27x_keypad_platform_data palmt5_keypad_platform_data = { - .matrix_key_rows = 4, - .matrix_key_cols = 3, - .matrix_keymap_data = &palmt5_matrix_keymap_data, - - .debounce_interval = 30, -}; - -static void __init palmt5_kpc_init(void) -{ - pxa_set_keypad_info(&palmt5_keypad_platform_data); -} -#else -static inline void palmt5_kpc_init(void) {} -#endif - -/****************************************************************************** - * GPIO keys - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) -static struct gpio_keys_button palmt5_pxa_buttons[] = { - {KEY_F8, GPIO_NR_PALMT5_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, -}; - -static struct gpio_keys_platform_data palmt5_pxa_keys_data = { - .buttons = palmt5_pxa_buttons, - .nbuttons = ARRAY_SIZE(palmt5_pxa_buttons), -}; - -static struct platform_device palmt5_pxa_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &palmt5_pxa_keys_data, - }, -}; - -static void __init palmt5_keys_init(void) -{ - platform_device_register(&palmt5_pxa_keys); -} -#else -static inline void palmt5_keys_init(void) {} -#endif - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static void __init palmt5_reserve(void) -{ - memblock_reserve(0xa0200000, 0x1000); -} - -static struct gpiod_lookup_table palmt5_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMT5_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMT5_SD_READONLY, - "wp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMT5_SD_POWER, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table palmt5_wm97xx_touch_gpio_table = { - .dev_id = "wm97xx-touch", - .table = { - GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init palmt5_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - palm27x_mmc_init(&palmt5_mci_gpio_table); - gpiod_add_lookup_table(&palmt5_wm97xx_touch_gpio_table); - palm27x_pm_init(PALMT5_STR_BASE); - palm27x_lcd_init(-1, &palm_320x480_lcd_mode); - palm27x_udc_init(GPIO_NR_PALMT5_USB_DETECT_N, - GPIO_NR_PALMT5_USB_PULLUP, 1); - palm27x_irda_init(GPIO_NR_PALMT5_IR_DISABLE); - palm27x_ac97_init(PALMT5_BAT_MIN_VOLTAGE, PALMT5_BAT_MAX_VOLTAGE, - GPIO_NR_PALMT5_EARPHONE_DETECT, 95); - palm27x_pwm_init(GPIO_NR_PALMT5_BL_POWER, GPIO_NR_PALMT5_LCD_POWER); - palm27x_power_init(GPIO_NR_PALMT5_POWER_DETECT, -1); - palm27x_pmic_init(); - palmt5_kpc_init(); - palmt5_keys_init(); -} - -MACHINE_START(PALMT5, "Palm Tungsten|T5") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .reserve = palmt5_reserve, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = palmt5_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/palmt5.h b/arch/arm/mach-pxa/palmt5.h deleted file mode 100644 index cf84aedca717..000000000000 --- a/arch/arm/mach-pxa/palmt5.h +++ /dev/null @@ -1,82 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Palm Tungsten|T5 Handheld Computer - * - * Authors: Ales Snuparek <snuparek@atlas.cz> - * Marek Vasut <marek.vasut@gmail.com> - * Justin Kendrick <twilightsentry@gmail.com> - * RichardT5 <richard_t5@users.sourceforge.net> - */ - -#ifndef _INCLUDE_PALMT5_H_ -#define _INCLUDE_PALMT5_H_ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMT5_GPIO_RESET 1 - -#define GPIO_NR_PALMT5_POWER_DETECT 90 -#define GPIO_NR_PALMT5_HOTSYNC_BUTTON_N 10 -#define GPIO_NR_PALMT5_EARPHONE_DETECT 107 - -/* SD/MMC */ -#define GPIO_NR_PALMT5_SD_DETECT_N 14 -#define GPIO_NR_PALMT5_SD_POWER 114 -#define GPIO_NR_PALMT5_SD_READONLY 115 - -/* TOUCHSCREEN */ -#define GPIO_NR_PALMT5_WM9712_IRQ 27 - -/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ -#define GPIO_NR_PALMT5_IR_DISABLE 40 - -/* USB */ -#define GPIO_NR_PALMT5_USB_DETECT_N 15 -#define GPIO_NR_PALMT5_USB_PULLUP 93 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMT5_BL_POWER 84 -#define GPIO_NR_PALMT5_LCD_POWER 96 - -/* BLUETOOTH */ -#define GPIO_NR_PALMT5_BT_POWER 17 -#define GPIO_NR_PALMT5_BT_RESET 83 - -/* INTERRUPTS */ -#define IRQ_GPIO_PALMT5_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N) -#define IRQ_GPIO_PALMT5_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ) -#define IRQ_GPIO_PALMT5_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT) -#define IRQ_GPIO_PALMT5_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET) - -/** HERE ARE INIT VALUES **/ - -/* Various addresses */ -#define PALMT5_PHYS_RAM_START 0xa0000000 -#define PALMT5_PHYS_IO_START 0x40000000 -#define PALMT5_STR_BASE 0xa0200000 - -/* TOUCHSCREEN */ -#define AC97_LINK_FRAME 21 - -/* BATTERY */ -#define PALMT5_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ -#define PALMT5_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ -#define PALMT5_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMT5_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMT5_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMT5_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMT5_MAX_LIFE_MINS 360 /* on-life in minutes */ - -#define PALMT5_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMT5_MAX_INTENSITY 0xFE -#define PALMT5_DEFAULT_INTENSITY 0x7E -#define PALMT5_LIMIT_MASK 0x7F -#define PALMT5_PRESCALER 0x3F -#define PALMT5_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/palmtc-pcmcia.c b/arch/arm/mach-pxa/palmtc-pcmcia.c deleted file mode 100644 index 8e3f382343fe..000000000000 --- a/arch/arm/mach-pxa/palmtc-pcmcia.c +++ /dev/null @@ -1,162 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmtc.c - * - * Driver for Palm Tungsten|C PCMCIA - * - * Copyright (C) 2008 Alex Osborne <ato@meshy.org> - * Copyright (C) 2009-2011 Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <linux/delay.h> - -#include <asm/mach-types.h> -#include "palmtc.h" -#include <pcmcia/soc_common.h> - -static struct gpio palmtc_pcmcia_gpios[] = { - { GPIO_NR_PALMTC_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, - { GPIO_NR_PALMTC_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, - { GPIO_NR_PALMTC_PCMCIA_POWER3, GPIOF_INIT_LOW, "PCMCIA Power 3" }, - { GPIO_NR_PALMTC_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, - { GPIO_NR_PALMTC_PCMCIA_PWRREADY, GPIOF_IN, "PCMCIA Power Ready" }, -}; - -static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmtc_pcmcia_gpios, - ARRAY_SIZE(palmtc_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTC_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmtc_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmtc_pcmcia_gpios, ARRAY_SIZE(palmtc_pcmcia_gpios)); -} - -static void palmtc_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int palmtc_wifi_powerdown(void) -{ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 0); - mdelay(40); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 0); - return 0; -} - -static int palmtc_wifi_powerup(void) -{ - int timeout = 50; - - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 1); - mdelay(50); - - /* Power up the card, 1.8V first, after a while 3.3V */ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 1); - mdelay(100); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 1); - - /* Wait till the card is ready */ - while (!gpio_get_value(GPIO_NR_PALMTC_PCMCIA_PWRREADY) && - timeout) { - mdelay(1); - timeout--; - } - - /* Power down the WiFi in case of error */ - if (!timeout) { - palmtc_wifi_powerdown(); - return 1; - } - - /* Reset the card */ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); - mdelay(20); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 0); - mdelay(25); - - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 0); - - return 0; -} - -static int palmtc_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - int ret = 1; - - if (state->Vcc == 0) - ret = palmtc_wifi_powerdown(); - else if (state->Vcc == 33) - ret = palmtc_wifi_powerup(); - - return ret; -} - -static struct pcmcia_low_level palmtc_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = palmtc_pcmcia_hw_init, - .hw_shutdown = palmtc_pcmcia_hw_shutdown, - - .socket_state = palmtc_pcmcia_socket_state, - .configure_socket = palmtc_pcmcia_configure_socket, -}; - -static struct platform_device *palmtc_pcmcia_device; - -static int __init palmtc_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmtc()) - return -ENODEV; - - palmtc_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmtc_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmtc_pcmcia_device, &palmtc_pcmcia_ops, - sizeof(palmtc_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmtc_pcmcia_device); - - if (ret) - platform_device_put(palmtc_pcmcia_device); - - return ret; -} - -static void __exit palmtc_pcmcia_exit(void) -{ - platform_device_unregister(palmtc_pcmcia_device); -} - -module_init(palmtc_pcmcia_init); -module_exit(palmtc_pcmcia_exit); - -MODULE_AUTHOR("Alex Osborne <ato@meshy.org>," - " Marek Vasut <marek.vasut@gmail.com>"); -MODULE_DESCRIPTION("PCMCIA support for Palm Tungsten|C"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c deleted file mode 100644 index 3054ffa397ad..000000000000 --- a/arch/arm/mach-pxa/palmtc.c +++ /dev/null @@ -1,539 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/palmtc.c - * - * Support for the Palm Tungsten|C - * - * Author: Marek Vasut <marek.vasut@gmail.com> - * - * Based on work of: - * Petr Blaha <p3t3@centrum.cz> - * Chetan S. Kumar <shivakumar.chetan@gmail.com> - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/input.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio/machine.h> -#include <linux/input/matrix_keypad.h> -#include <linux/ucb1400.h> -#include <linux/power_supply.h> -#include <linux/gpio_keys.h> -#include <linux/mtd/physmap.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa25x.h" -#include <linux/platform_data/asoc-pxa.h> -#include "palmtc.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/irda-pxaficp.h> -#include "udc.h" - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long palmtc_pin_config[] __initdata = { - /* MMC */ - GPIO6_MMC_CLK, - GPIO8_MMC_CS0, - GPIO12_GPIO, /* detect */ - GPIO32_GPIO, /* power */ - GPIO54_GPIO, /* r/o switch */ - - /* PCMCIA */ - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO49_nPWE, - GPIO48_nPOE, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO57_nIOIS16, - GPIO56_nPWAIT, - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* IrDA */ - GPIO45_GPIO, /* ir disable */ - GPIO46_FICP_RXD, - GPIO47_FICP_TXD, - - /* PWM */ - GPIO17_PWM1_OUT, - - /* USB */ - GPIO4_GPIO, /* detect */ - GPIO36_GPIO, /* pullup */ - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* MATRIX KEYPAD */ - GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 0 */ - GPIO9_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 1 */ - GPIO10_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 2 */ - GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 3 */ - GPIO18_GPIO | MFP_LPM_DRIVE_LOW, /* out 0 */ - GPIO19_GPIO | MFP_LPM_DRIVE_LOW, /* out 1 */ - GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* out 2 */ - GPIO21_GPIO | MFP_LPM_DRIVE_LOW, /* out 3 */ - GPIO22_GPIO | MFP_LPM_DRIVE_LOW, /* out 4 */ - GPIO23_GPIO | MFP_LPM_DRIVE_LOW, /* out 5 */ - GPIO24_GPIO | MFP_LPM_DRIVE_LOW, /* out 6 */ - GPIO25_GPIO | MFP_LPM_DRIVE_LOW, /* out 7 */ - GPIO26_GPIO | MFP_LPM_DRIVE_LOW, /* out 8 */ - GPIO27_GPIO | MFP_LPM_DRIVE_LOW, /* out 9 */ - GPIO79_GPIO | MFP_LPM_DRIVE_LOW, /* out 10 */ - GPIO80_GPIO | MFP_LPM_DRIVE_LOW, /* out 11 */ - - /* PXA GPIO KEYS */ - GPIO7_GPIO | WAKEUP_ON_EDGE_BOTH, /* hotsync button on cradle */ - - /* MISC */ - GPIO1_RST, /* reset */ - GPIO2_GPIO, /* earphone detect */ - GPIO16_GPIO, /* backlight switch */ -}; - -/****************************************************************************** - * SD/MMC card controller - ******************************************************************************/ -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -static struct pxamci_platform_data palmtc_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .detect_delay_ms = 200, -}; - -static struct gpiod_lookup_table palmtc_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_SD_READONLY, - "wp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_SD_POWER, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init palmtc_mmc_init(void) -{ - gpiod_add_lookup_table(&palmtc_mci_gpio_table); - pxa_set_mci_info(&palmtc_mci_platform_data); -} -#else -static inline void palmtc_mmc_init(void) {} -#endif - -/****************************************************************************** - * GPIO keys - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) -static struct gpio_keys_button palmtc_pxa_buttons[] = { - {KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1}, -}; - -static struct gpio_keys_platform_data palmtc_pxa_keys_data = { - .buttons = palmtc_pxa_buttons, - .nbuttons = ARRAY_SIZE(palmtc_pxa_buttons), -}; - -static struct platform_device palmtc_pxa_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &palmtc_pxa_keys_data, - }, -}; - -static void __init palmtc_keys_init(void) -{ - platform_device_register(&palmtc_pxa_keys); -} -#else -static inline void palmtc_keys_init(void) {} -#endif - -/****************************************************************************** - * Backlight - ******************************************************************************/ -#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) - -static struct gpiod_lookup_table palmtc_pwm_bl_gpio_table = { - .dev_id = "pwm-backlight.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_BL_POWER, - "enable", GPIO_ACTIVE_HIGH), - }, -}; - -static struct pwm_lookup palmtc_pwm_lookup[] = { - PWM_LOOKUP("pxa25x-pwm.1", 0, "pwm-backlight.0", NULL, PALMTC_PERIOD_NS, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data palmtc_backlight_data = { - .max_brightness = PALMTC_MAX_INTENSITY, - .dft_brightness = PALMTC_MAX_INTENSITY, -}; - -static struct platform_device palmtc_backlight = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa25x_device_pwm1.dev, - .platform_data = &palmtc_backlight_data, - }, -}; - -static void __init palmtc_pwm_init(void) -{ - gpiod_add_lookup_table(&palmtc_pwm_bl_gpio_table); - pwm_add_table(palmtc_pwm_lookup, ARRAY_SIZE(palmtc_pwm_lookup)); - platform_device_register(&palmtc_backlight); -} -#else -static inline void palmtc_pwm_init(void) {} -#endif - -/****************************************************************************** - * IrDA - ******************************************************************************/ -#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE) -static struct pxaficp_platform_data palmtc_ficp_platform_data = { - .gpio_pwdown = GPIO_NR_PALMTC_IR_DISABLE, - .transceiver_cap = IR_SIRMODE | IR_OFF, -}; - -static void __init palmtc_irda_init(void) -{ - pxa_set_ficp_info(&palmtc_ficp_platform_data); -} -#else -static inline void palmtc_irda_init(void) {} -#endif - -/****************************************************************************** - * Keyboard - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE) -static const uint32_t palmtc_matrix_keys[] = { - KEY(0, 0, KEY_F1), - KEY(0, 1, KEY_X), - KEY(0, 2, KEY_POWER), - KEY(0, 3, KEY_TAB), - KEY(0, 4, KEY_A), - KEY(0, 5, KEY_Q), - KEY(0, 6, KEY_LEFTSHIFT), - KEY(0, 7, KEY_Z), - KEY(0, 8, KEY_S), - KEY(0, 9, KEY_W), - KEY(0, 10, KEY_E), - KEY(0, 11, KEY_UP), - - KEY(1, 0, KEY_F2), - KEY(1, 1, KEY_DOWN), - KEY(1, 3, KEY_D), - KEY(1, 4, KEY_C), - KEY(1, 5, KEY_F), - KEY(1, 6, KEY_R), - KEY(1, 7, KEY_SPACE), - KEY(1, 8, KEY_V), - KEY(1, 9, KEY_G), - KEY(1, 10, KEY_T), - KEY(1, 11, KEY_LEFT), - - KEY(2, 0, KEY_F3), - KEY(2, 1, KEY_LEFTCTRL), - KEY(2, 3, KEY_H), - KEY(2, 4, KEY_Y), - KEY(2, 5, KEY_N), - KEY(2, 6, KEY_J), - KEY(2, 7, KEY_U), - KEY(2, 8, KEY_M), - KEY(2, 9, KEY_K), - KEY(2, 10, KEY_I), - KEY(2, 11, KEY_RIGHT), - - KEY(3, 0, KEY_F4), - KEY(3, 1, KEY_ENTER), - KEY(3, 3, KEY_DOT), - KEY(3, 4, KEY_L), - KEY(3, 5, KEY_O), - KEY(3, 6, KEY_LEFTALT), - KEY(3, 7, KEY_ENTER), - KEY(3, 8, KEY_BACKSPACE), - KEY(3, 9, KEY_P), - KEY(3, 10, KEY_B), - KEY(3, 11, KEY_FN), -}; - -const struct matrix_keymap_data palmtc_keymap_data = { - .keymap = palmtc_matrix_keys, - .keymap_size = ARRAY_SIZE(palmtc_matrix_keys), -}; - -static const unsigned int palmtc_keypad_row_gpios[] = { - 0, 9, 10, 11 -}; - -static const unsigned int palmtc_keypad_col_gpios[] = { - 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80 -}; - -static struct matrix_keypad_platform_data palmtc_keypad_platform_data = { - .keymap_data = &palmtc_keymap_data, - .row_gpios = palmtc_keypad_row_gpios, - .num_row_gpios = ARRAY_SIZE(palmtc_keypad_row_gpios), - .col_gpios = palmtc_keypad_col_gpios, - .num_col_gpios = ARRAY_SIZE(palmtc_keypad_col_gpios), - .active_low = 1, - - .debounce_ms = 20, - .col_scan_delay_us = 5, -}; - -static struct platform_device palmtc_keyboard = { - .name = "matrix-keypad", - .id = -1, - .dev = { - .platform_data = &palmtc_keypad_platform_data, - }, -}; -static void __init palmtc_mkp_init(void) -{ - platform_device_register(&palmtc_keyboard); -} -#else -static inline void palmtc_mkp_init(void) {} -#endif - -/****************************************************************************** - * UDC - ******************************************************************************/ -#if defined(CONFIG_USB_PXA25X)||defined(CONFIG_USB_PXA25X_MODULE) -static struct gpiod_lookup_table palmtc_udc_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_USB_DETECT_N, - "vbus", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_USB_POWER, - "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device palmtc_gpio_vbus = { - .name = "gpio-vbus", - .id = -1, -}; - -static void __init palmtc_udc_init(void) -{ - gpiod_add_lookup_table(&palmtc_udc_gpiod_table); - platform_device_register(&palmtc_gpio_vbus); -}; -#else -static inline void palmtc_udc_init(void) {} -#endif - -/****************************************************************************** - * Touchscreen / Battery / GPIO-extender - ******************************************************************************/ -#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ - defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) -static struct platform_device palmtc_ucb1400_device = { - .name = "ucb1400_core", - .id = -1, -}; - -static void __init palmtc_ts_init(void) -{ - pxa_set_ac97_info(NULL); - platform_device_register(&palmtc_ucb1400_device); -} -#else -static inline void palmtc_ts_init(void) {} -#endif - -/****************************************************************************** - * LEDs - ******************************************************************************/ -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -struct gpio_led palmtc_gpio_leds[] = { -{ - .name = "palmtc:green:user", - .default_trigger = "none", - .gpio = GPIO_NR_PALMTC_LED_POWER, - .active_low = 1, -}, { - .name = "palmtc:vibra:vibra", - .default_trigger = "none", - .gpio = GPIO_NR_PALMTC_VIBRA_POWER, - .active_low = 1, -} - -}; - -static struct gpio_led_platform_data palmtc_gpio_led_info = { - .leds = palmtc_gpio_leds, - .num_leds = ARRAY_SIZE(palmtc_gpio_leds), -}; - -static struct platform_device palmtc_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &palmtc_gpio_led_info, - } -}; - -static void __init palmtc_leds_init(void) -{ - platform_device_register(&palmtc_leds); -} -#else -static inline void palmtc_leds_init(void) {} -#endif - -/****************************************************************************** - * NOR Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct resource palmtc_flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_16M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct mtd_partition palmtc_flash_parts[] = { - { - .name = "U-Boot Bootloader", - .offset = 0x0, - .size = 0x40000, - }, - { - .name = "Linux Kernel", - .offset = 0x40000, - .size = 0x2c0000, - }, - { - .name = "Filesystem", - .offset = 0x300000, - .size = 0xcc0000, - }, - { - .name = "U-Boot Environment", - .offset = 0xfc0000, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data palmtc_flash_data = { - .width = 4, - .parts = palmtc_flash_parts, - .nr_parts = ARRAY_SIZE(palmtc_flash_parts), -}; - -static struct platform_device palmtc_flash = { - .name = "physmap-flash", - .id = -1, - .resource = &palmtc_flash_resource, - .num_resources = 1, - .dev = { - .platform_data = &palmtc_flash_data, - }, -}; - -static void __init palmtc_nor_init(void) -{ - platform_device_register(&palmtc_flash); -} -#else -static inline void palmtc_nor_init(void) {} -#endif - -/****************************************************************************** - * Framebuffer - ******************************************************************************/ -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pxafb_mode_info palmtc_lcd_modes[] = { - { - .pixclock = 115384, - .xres = 320, - .yres = 320, - .bpp = 16, - - .left_margin = 27, - .right_margin = 7, - .upper_margin = 7, - .lower_margin = 8, - - .hsync_len = 6, - .vsync_len = 1, - }, -}; - -static struct pxafb_mach_info palmtc_lcd_screen = { - .modes = palmtc_lcd_modes, - .num_modes = ARRAY_SIZE(palmtc_lcd_modes), - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -static void __init palmtc_lcd_init(void) -{ - pxa_set_fb_info(NULL, &palmtc_lcd_screen); -} -#else -static inline void palmtc_lcd_init(void) {} -#endif - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static void __init palmtc_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - pxa_set_hwuart_info(NULL); - - palmtc_mmc_init(); - palmtc_keys_init(); - palmtc_pwm_init(); - palmtc_irda_init(); - palmtc_mkp_init(); - palmtc_udc_init(); - palmtc_ts_init(); - palmtc_nor_init(); - palmtc_lcd_init(); - palmtc_leds_init(); -}; - -MACHINE_START(PALMTC, "Palm Tungsten|C") - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = palmtc_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/palmtc.h b/arch/arm/mach-pxa/palmtc.h deleted file mode 100644 index 9257a02c46e5..000000000000 --- a/arch/arm/mach-pxa/palmtc.h +++ /dev/null @@ -1,84 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/include/asm-arm/arch-pxa/palmtc-gpio.h - * - * GPIOs and interrupts for Palm Tungsten|C Handheld Computer - * - * Authors: Alex Osborne <bobofdoom@gmail.com> - * Marek Vasut <marek.vasut@gmail.com> - * Holger Bocklet <bitz.email@gmx.net> - */ - -#ifndef _INCLUDE_PALMTC_H_ -#define _INCLUDE_PALMTC_H_ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMTC_EARPHONE_DETECT 2 -#define GPIO_NR_PALMTC_CRADLE_DETECT 5 -#define GPIO_NR_PALMTC_HOTSYNC_BUTTON 7 - -/* SD/MMC */ -#define GPIO_NR_PALMTC_SD_DETECT_N 12 -#define GPIO_NR_PALMTC_SD_POWER 32 -#define GPIO_NR_PALMTC_SD_READONLY 54 - -/* WLAN */ -#define GPIO_NR_PALMTC_PCMCIA_READY 13 -#define GPIO_NR_PALMTC_PCMCIA_PWRREADY 14 -#define GPIO_NR_PALMTC_PCMCIA_POWER1 15 -#define GPIO_NR_PALMTC_PCMCIA_POWER2 33 -#define GPIO_NR_PALMTC_PCMCIA_POWER3 55 -#define GPIO_NR_PALMTC_PCMCIA_RESET 78 - -/* UDC */ -#define GPIO_NR_PALMTC_USB_DETECT_N 4 -#define GPIO_NR_PALMTC_USB_POWER 36 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMTC_BL_POWER 16 -#define GPIO_NR_PALMTC_LCD_POWER 44 -#define GPIO_NR_PALMTC_LCD_BLANK 38 - -/* UART */ -#define GPIO_NR_PALMTC_RS232_POWER 37 - -/* IRDA */ -#define GPIO_NR_PALMTC_IR_DISABLE 45 - -/* IRQs */ -#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N) -#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY) - -/* UCB1400 GPIOs */ -#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) -#define GPIO_NR_PALMTC_HEADPHONE_DETECT (0x80 | 0x01) -#define GPIO_NR_PALMTC_SPEAKER_ENABLE (0x80 | 0x03) -#define GPIO_NR_PALMTC_VIBRA_POWER (0x80 | 0x05) -#define GPIO_NR_PALMTC_LED_POWER (0x80 | 0x07) - -/** HERE ARE INIT VALUES **/ -#define PALMTC_UCB1400_GPIO_OFFSET 0x80 - -/* BATTERY */ -#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ -#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ -#define PALMTC_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMTC_MAX_LIFE_MINS 240 /* on-life in minutes */ - -#define PALMTC_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMTC_MAX_INTENSITY 0xFE -#define PALMTC_DEFAULT_INTENSITY 0x7E -#define PALMTC_LIMIT_MASK 0x7F -#define PALMTC_PRESCALER 0x3F -#define PALMTC_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c deleted file mode 100644 index fedac670a8af..000000000000 --- a/arch/arm/mach-pxa/palmte2.c +++ /dev/null @@ -1,383 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hardware definitions for Palm Tungsten|E2 - * - * Author: - * Carlos Eduardo Medaglia Dyonisio <cadu@nerdfeliz.com> - * - * Rewrite for mainline: - * Marek Vasut <marek.vasut@gmail.com> - * - * (find more info at www.hackndev.com) - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio_keys.h> -#include <linux/gpio/machine.h> -#include <linux/input.h> -#include <linux/pda_power.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio.h> -#include <linux/wm97xx.h> -#include <linux/power_supply.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa25x.h" -#include <linux/platform_data/asoc-pxa.h> -#include "palmte2.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/irda-pxaficp.h> -#include "udc.h" -#include <linux/platform_data/asoc-palm27x.h> - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long palmte2_pin_config[] __initdata = { - /* MMC */ - GPIO6_MMC_CLK, - GPIO8_MMC_CS0, - GPIO10_GPIO, /* SD detect */ - GPIO55_GPIO, /* SD power */ - GPIO51_GPIO, /* SD r/o switch */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* PWM */ - GPIO16_PWM0_OUT, - - /* USB */ - GPIO15_GPIO, /* usb detect */ - GPIO53_GPIO, /* usb power */ - - /* IrDA */ - GPIO48_GPIO, /* ir disable */ - GPIO46_FICP_RXD, - GPIO47_FICP_TXD, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* GPIO KEYS */ - GPIO5_GPIO, /* notes */ - GPIO7_GPIO, /* tasks */ - GPIO11_GPIO, /* calendar */ - GPIO13_GPIO, /* contacts */ - GPIO14_GPIO, /* center */ - GPIO19_GPIO, /* left */ - GPIO20_GPIO, /* right */ - GPIO21_GPIO, /* down */ - GPIO22_GPIO, /* up */ - - /* MISC */ - GPIO1_RST, /* reset */ - GPIO4_GPIO, /* Hotsync button */ - GPIO9_GPIO, /* power detect */ - GPIO15_GPIO, /* earphone detect */ - GPIO37_GPIO, /* LCD power */ - GPIO56_GPIO, /* Backlight power */ -}; - -/****************************************************************************** - * SD/MMC card controller - ******************************************************************************/ -static struct pxamci_platform_data palmte2_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table palmte2_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_SD_READONLY, - "wp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_SD_POWER, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) -/****************************************************************************** - * GPIO keys - ******************************************************************************/ -static struct gpio_keys_button palmte2_pxa_buttons[] = { - {KEY_F1, GPIO_NR_PALMTE2_KEY_CONTACTS, 1, "Contacts" }, - {KEY_F2, GPIO_NR_PALMTE2_KEY_CALENDAR, 1, "Calendar" }, - {KEY_F3, GPIO_NR_PALMTE2_KEY_TASKS, 1, "Tasks" }, - {KEY_F4, GPIO_NR_PALMTE2_KEY_NOTES, 1, "Notes" }, - {KEY_ENTER, GPIO_NR_PALMTE2_KEY_CENTER, 1, "Center" }, - {KEY_LEFT, GPIO_NR_PALMTE2_KEY_LEFT, 1, "Left" }, - {KEY_RIGHT, GPIO_NR_PALMTE2_KEY_RIGHT, 1, "Right" }, - {KEY_DOWN, GPIO_NR_PALMTE2_KEY_DOWN, 1, "Down" }, - {KEY_UP, GPIO_NR_PALMTE2_KEY_UP, 1, "Up" }, -}; - -static struct gpio_keys_platform_data palmte2_pxa_keys_data = { - .buttons = palmte2_pxa_buttons, - .nbuttons = ARRAY_SIZE(palmte2_pxa_buttons), -}; - -static struct platform_device palmte2_pxa_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &palmte2_pxa_keys_data, - }, -}; -#endif - -/****************************************************************************** - * Backlight - ******************************************************************************/ -static struct pwm_lookup palmte2_pwm_lookup[] = { - PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL, - PALMTE2_PERIOD_NS, PWM_POLARITY_NORMAL), -}; - -static struct gpio palmte_bl_gpios[] = { - { GPIO_NR_PALMTE2_BL_POWER, GPIOF_INIT_LOW, "Backlight power" }, - { GPIO_NR_PALMTE2_LCD_POWER, GPIOF_INIT_LOW, "LCD power" }, -}; - -static int palmte2_backlight_init(struct device *dev) -{ - return gpio_request_array(ARRAY_AND_SIZE(palmte_bl_gpios)); -} - -static int palmte2_backlight_notify(struct device *dev, int brightness) -{ - gpio_set_value(GPIO_NR_PALMTE2_BL_POWER, brightness); - gpio_set_value(GPIO_NR_PALMTE2_LCD_POWER, brightness); - return brightness; -} - -static void palmte2_backlight_exit(struct device *dev) -{ - gpio_free_array(ARRAY_AND_SIZE(palmte_bl_gpios)); -} - -static struct platform_pwm_backlight_data palmte2_backlight_data = { - .max_brightness = PALMTE2_MAX_INTENSITY, - .dft_brightness = PALMTE2_MAX_INTENSITY, - .init = palmte2_backlight_init, - .notify = palmte2_backlight_notify, - .exit = palmte2_backlight_exit, -}; - -static struct platform_device palmte2_backlight = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa25x_device_pwm0.dev, - .platform_data = &palmte2_backlight_data, - }, -}; - -/****************************************************************************** - * IrDA - ******************************************************************************/ -static struct pxaficp_platform_data palmte2_ficp_platform_data = { - .gpio_pwdown = GPIO_NR_PALMTE2_IR_DISABLE, - .transceiver_cap = IR_SIRMODE | IR_OFF, -}; - -/****************************************************************************** - * UDC - ******************************************************************************/ -static struct gpiod_lookup_table palmte2_udc_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_USB_DETECT_N, - "vbus", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_USB_PULLUP, - "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device palmte2_gpio_vbus = { - .name = "gpio-vbus", - .id = -1, -}; - -/****************************************************************************** - * Power supply - ******************************************************************************/ -static int power_supply_init(struct device *dev) -{ - int ret; - - ret = gpio_request(GPIO_NR_PALMTE2_POWER_DETECT, "CABLE_STATE_AC"); - if (ret) - goto err1; - ret = gpio_direction_input(GPIO_NR_PALMTE2_POWER_DETECT); - if (ret) - goto err2; - - return 0; - -err2: - gpio_free(GPIO_NR_PALMTE2_POWER_DETECT); -err1: - return ret; -} - -static int palmte2_is_ac_online(void) -{ - return gpio_get_value(GPIO_NR_PALMTE2_POWER_DETECT); -} - -static void power_supply_exit(struct device *dev) -{ - gpio_free(GPIO_NR_PALMTE2_POWER_DETECT); -} - -static char *palmte2_supplicants[] = { - "main-battery", -}; - -static struct pda_power_pdata power_supply_info = { - .init = power_supply_init, - .is_ac_online = palmte2_is_ac_online, - .exit = power_supply_exit, - .supplied_to = palmte2_supplicants, - .num_supplicants = ARRAY_SIZE(palmte2_supplicants), -}; - -static struct platform_device power_supply = { - .name = "pda-power", - .id = -1, - .dev = { - .platform_data = &power_supply_info, - }, -}; - -/****************************************************************************** - * WM97xx audio, battery - ******************************************************************************/ -static struct wm97xx_batt_pdata palmte2_batt_pdata = { - .batt_aux = WM97XX_AUX_ID3, - .temp_aux = WM97XX_AUX_ID2, - .max_voltage = PALMTE2_BAT_MAX_VOLTAGE, - .min_voltage = PALMTE2_BAT_MIN_VOLTAGE, - .batt_mult = 1000, - .batt_div = 414, - .temp_mult = 1, - .temp_div = 1, - .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, - .batt_name = "main-batt", -}; - -static struct wm97xx_pdata palmte2_wm97xx_pdata = { - .batt_pdata = &palmte2_batt_pdata, -}; - -static pxa2xx_audio_ops_t palmte2_ac97_pdata = { - .codec_pdata = { &palmte2_wm97xx_pdata, }, -}; - -static struct palm27x_asoc_info palmte2_asoc_pdata = { - .jack_gpio = GPIO_NR_PALMTE2_EARPHONE_DETECT, -}; - -static struct platform_device palmte2_asoc = { - .name = "palm27x-asoc", - .id = -1, - .dev = { - .platform_data = &palmte2_asoc_pdata, - }, -}; - -/****************************************************************************** - * Framebuffer - ******************************************************************************/ -static struct pxafb_mode_info palmte2_lcd_modes[] = { -{ - .pixclock = 77757, - .xres = 320, - .yres = 320, - .bpp = 16, - - .left_margin = 28, - .right_margin = 7, - .upper_margin = 7, - .lower_margin = 5, - - .hsync_len = 4, - .vsync_len = 1, -}, -}; - -static struct pxafb_mach_info palmte2_lcd_screen = { - .modes = palmte2_lcd_modes, - .num_modes = ARRAY_SIZE(palmte2_lcd_modes), - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static struct platform_device *devices[] __initdata = { -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) - &palmte2_pxa_keys, -#endif - &palmte2_backlight, - &power_supply, - &palmte2_asoc, - &palmte2_gpio_vbus, -}; - -/* setup udc GPIOs initial state */ -static void __init palmte2_udc_init(void) -{ - if (!gpio_request(GPIO_NR_PALMTE2_USB_PULLUP, "UDC Vbus")) { - gpio_direction_output(GPIO_NR_PALMTE2_USB_PULLUP, 1); - gpio_free(GPIO_NR_PALMTE2_USB_PULLUP); - } -} - -static void __init palmte2_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(palmte2_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - pxa_set_fb_info(NULL, &palmte2_lcd_screen); - gpiod_add_lookup_table(&palmte2_mci_gpio_table); - pxa_set_mci_info(&palmte2_mci_platform_data); - palmte2_udc_init(); - pxa_set_ac97_info(&palmte2_ac97_pdata); - pxa_set_ficp_info(&palmte2_ficp_platform_data); - - pwm_add_table(palmte2_pwm_lookup, ARRAY_SIZE(palmte2_pwm_lookup)); - gpiod_add_lookup_table(&palmte2_udc_gpiod_table); - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -MACHINE_START(PALMTE2, "Palm Tungsten|E2") - .atag_offset = 0x100, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = palmte2_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/palmte2.h b/arch/arm/mach-pxa/palmte2.h deleted file mode 100644 index 2589400c1a2f..000000000000 --- a/arch/arm/mach-pxa/palmte2.h +++ /dev/null @@ -1,64 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Palm Tungsten|E2 Handheld Computer - * - * Author: - * Carlos Eduardo Medaglia Dyonisio <cadu@nerdfeliz.com> - */ - -#ifndef _INCLUDE_PALMTE2_H_ -#define _INCLUDE_PALMTE2_H_ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMTE2_POWER_DETECT 9 -#define GPIO_NR_PALMTE2_HOTSYNC_BUTTON_N 4 -#define GPIO_NR_PALMTE2_EARPHONE_DETECT 15 - -/* SD/MMC */ -#define GPIO_NR_PALMTE2_SD_DETECT_N 10 -#define GPIO_NR_PALMTE2_SD_POWER 55 -#define GPIO_NR_PALMTE2_SD_READONLY 51 - -/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ -#define GPIO_NR_PALMTE2_IR_DISABLE 48 - -/* USB */ -#define GPIO_NR_PALMTE2_USB_DETECT_N 35 -#define GPIO_NR_PALMTE2_USB_PULLUP 53 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMTE2_BL_POWER 56 -#define GPIO_NR_PALMTE2_LCD_POWER 37 - -/* KEYS */ -#define GPIO_NR_PALMTE2_KEY_NOTES 5 -#define GPIO_NR_PALMTE2_KEY_TASKS 7 -#define GPIO_NR_PALMTE2_KEY_CALENDAR 11 -#define GPIO_NR_PALMTE2_KEY_CONTACTS 13 -#define GPIO_NR_PALMTE2_KEY_CENTER 14 -#define GPIO_NR_PALMTE2_KEY_LEFT 19 -#define GPIO_NR_PALMTE2_KEY_RIGHT 20 -#define GPIO_NR_PALMTE2_KEY_DOWN 21 -#define GPIO_NR_PALMTE2_KEY_UP 22 - -/** HERE ARE INIT VALUES **/ - -/* BACKLIGHT */ -#define PALMTE2_MAX_INTENSITY 0xFE -#define PALMTE2_DEFAULT_INTENSITY 0x7E -#define PALMTE2_LIMIT_MASK 0x7F -#define PALMTE2_PRESCALER 0x3F -#define PALMTE2_PERIOD_NS 3500 - -/* BATTERY */ -#define PALMTE2_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ -#define PALMTE2_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ -#define PALMTE2_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMTE2_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMTE2_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMTE2_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMTE2_MAX_LIFE_MINS 360 /* on-life in minutes */ - -#endif diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c deleted file mode 100644 index 238a31f32cba..000000000000 --- a/arch/arm/mach-pxa/palmtreo.c +++ /dev/null @@ -1,548 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hardware definitions for Palm Treo smartphones - * - * currently supported: - * Palm Treo 680 (GSM) - * Palm Centro 685 (GSM) - * - * Author: Tomas Cech <sleep_walker@suse.cz> - * - * (find more info at www.hackndev.com) - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/memblock.h> -#include <linux/pda_power.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio.h> -#include <linux/power_supply.h> -#include <linux/w1-gpio.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa27x.h" -#include "pxa27x-udc.h" -#include <linux/platform_data/asoc-pxa.h> -#include "palmtreo.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include "udc.h" -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include "pxa2xx-regs.h" -#include <linux/platform_data/asoc-palm27x.h> -#include <linux/platform_data/media/camera-pxa.h> -#include "palm27x.h" - -#include <sound/pxa2xx-lib.h> - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long treo_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO113_GPIO, /* SD detect */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO89_AC97_SYSCLK, - GPIO95_AC97_nRESET, - - /* IrDA */ - GPIO46_FICP_RXD, - GPIO47_FICP_TXD, - - /* PWM */ - GPIO16_PWM0_OUT, - - /* USB */ - GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, /* usb detect */ - - /* MATRIX KEYPAD */ - GPIO101_KP_MKIN_1, - GPIO102_KP_MKIN_2, - GPIO97_KP_MKIN_3, - GPIO98_KP_MKIN_4, - GPIO91_KP_MKIN_6, - GPIO13_KP_MKIN_7, - GPIO103_KP_MKOUT_0 | MFP_LPM_DRIVE_HIGH, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - GPIO107_KP_MKOUT_4, - GPIO108_KP_MKOUT_5, - GPIO96_KP_MKOUT_6, - GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, /* Hotsync button */ - - /* Quick Capture Interface */ - GPIO84_CIF_FV, - GPIO85_CIF_LV, - GPIO53_CIF_MCLK, - GPIO54_CIF_PCLK, - GPIO81_CIF_DD_0, - GPIO55_CIF_DD_1, - GPIO51_CIF_DD_2, - GPIO50_CIF_DD_3, - GPIO52_CIF_DD_4, - GPIO48_CIF_DD_5, - GPIO17_CIF_DD_6, - GPIO12_CIF_DD_7, - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* GSM */ - GPIO14_GPIO | WAKEUP_ON_EDGE_BOTH, /* GSM host wake up */ - GPIO34_FFUART_RXD, - GPIO35_FFUART_CTS, - GPIO39_FFUART_TXD, - GPIO41_FFUART_RTS, - - /* MISC. */ - GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* external power detect */ - GPIO15_GPIO | WAKEUP_ON_EDGE_BOTH, /* silent switch */ - GPIO116_GPIO, /* headphone detect */ - GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* bluetooth host wake up */ -}; - -#ifdef CONFIG_MACH_TREO680 -static unsigned long treo680_pin_config[] __initdata = { - GPIO33_GPIO, /* SD read only */ - - /* MATRIX KEYPAD - different wake up source */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO99_KP_MKIN_5, - - /* LCD... L_BIAS alt fn not configured on Treo680; is GPIO instead */ - GPIOxx_LCD_16BPP, - GPIO74_LCD_FCLK, - GPIO75_LCD_LCLK, - GPIO76_LCD_PCLK, -}; -#endif /* CONFIG_MACH_TREO680 */ - -#ifdef CONFIG_MACH_CENTRO -static unsigned long centro685_pin_config[] __initdata = { - /* Bluetooth attached to BT UART*/ - MFP_CFG_OUT(GPIO80, AF0, DRIVE_LOW), /* power: LOW = off */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* MATRIX KEYPAD - different wake up source */ - GPIO100_KP_MKIN_0, - GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, -}; -#endif /* CONFIG_MACH_CENTRO */ - -/****************************************************************************** - * GPIO keyboard - ******************************************************************************/ -#if IS_ENABLED(CONFIG_KEYBOARD_PXA27x) -static const unsigned int treo680_matrix_keys[] = { - KEY(0, 0, KEY_F8), /* Red/Off/Power */ - KEY(0, 1, KEY_LEFT), - KEY(0, 2, KEY_LEFTCTRL), /* Alternate */ - KEY(0, 3, KEY_L), - KEY(0, 4, KEY_A), - KEY(0, 5, KEY_Q), - KEY(0, 6, KEY_P), - - KEY(1, 0, KEY_RIGHTCTRL), /* Menu */ - KEY(1, 1, KEY_RIGHT), - KEY(1, 2, KEY_LEFTSHIFT), /* Left shift */ - KEY(1, 3, KEY_Z), - KEY(1, 4, KEY_S), - KEY(1, 5, KEY_W), - - KEY(2, 0, KEY_F1), /* Phone */ - KEY(2, 1, KEY_UP), - KEY(2, 2, KEY_0), - KEY(2, 3, KEY_X), - KEY(2, 4, KEY_D), - KEY(2, 5, KEY_E), - - KEY(3, 0, KEY_F10), /* Calendar */ - KEY(3, 1, KEY_DOWN), - KEY(3, 2, KEY_SPACE), - KEY(3, 3, KEY_C), - KEY(3, 4, KEY_F), - KEY(3, 5, KEY_R), - - KEY(4, 0, KEY_F12), /* Mail */ - KEY(4, 1, KEY_KPENTER), - KEY(4, 2, KEY_RIGHTALT), /* Alt */ - KEY(4, 3, KEY_V), - KEY(4, 4, KEY_G), - KEY(4, 5, KEY_T), - - KEY(5, 0, KEY_F9), /* Home */ - KEY(5, 1, KEY_PAGEUP), /* Side up */ - KEY(5, 2, KEY_DOT), - KEY(5, 3, KEY_B), - KEY(5, 4, KEY_H), - KEY(5, 5, KEY_Y), - - KEY(6, 0, KEY_TAB), /* Side Activate */ - KEY(6, 1, KEY_PAGEDOWN), /* Side down */ - KEY(6, 2, KEY_ENTER), - KEY(6, 3, KEY_N), - KEY(6, 4, KEY_J), - KEY(6, 5, KEY_U), - - KEY(7, 0, KEY_F6), /* Green/Call */ - KEY(7, 1, KEY_O), - KEY(7, 2, KEY_BACKSPACE), - KEY(7, 3, KEY_M), - KEY(7, 4, KEY_K), - KEY(7, 5, KEY_I), -}; - -static const unsigned int centro_matrix_keys[] = { - KEY(0, 0, KEY_F9), /* Home */ - KEY(0, 1, KEY_LEFT), - KEY(0, 2, KEY_LEFTCTRL), /* Alternate */ - KEY(0, 3, KEY_L), - KEY(0, 4, KEY_A), - KEY(0, 5, KEY_Q), - KEY(0, 6, KEY_P), - - KEY(1, 0, KEY_RIGHTCTRL), /* Menu */ - KEY(1, 1, KEY_RIGHT), - KEY(1, 2, KEY_LEFTSHIFT), /* Left shift */ - KEY(1, 3, KEY_Z), - KEY(1, 4, KEY_S), - KEY(1, 5, KEY_W), - - KEY(2, 0, KEY_F1), /* Phone */ - KEY(2, 1, KEY_UP), - KEY(2, 2, KEY_0), - KEY(2, 3, KEY_X), - KEY(2, 4, KEY_D), - KEY(2, 5, KEY_E), - - KEY(3, 0, KEY_F10), /* Calendar */ - KEY(3, 1, KEY_DOWN), - KEY(3, 2, KEY_SPACE), - KEY(3, 3, KEY_C), - KEY(3, 4, KEY_F), - KEY(3, 5, KEY_R), - - KEY(4, 0, KEY_F12), /* Mail */ - KEY(4, 1, KEY_KPENTER), - KEY(4, 2, KEY_RIGHTALT), /* Alt */ - KEY(4, 3, KEY_V), - KEY(4, 4, KEY_G), - KEY(4, 5, KEY_T), - - KEY(5, 0, KEY_F8), /* Red/Off/Power */ - KEY(5, 1, KEY_PAGEUP), /* Side up */ - KEY(5, 2, KEY_DOT), - KEY(5, 3, KEY_B), - KEY(5, 4, KEY_H), - KEY(5, 5, KEY_Y), - - KEY(6, 0, KEY_TAB), /* Side Activate */ - KEY(6, 1, KEY_PAGEDOWN), /* Side down */ - KEY(6, 2, KEY_ENTER), - KEY(6, 3, KEY_N), - KEY(6, 4, KEY_J), - KEY(6, 5, KEY_U), - - KEY(7, 0, KEY_F6), /* Green/Call */ - KEY(7, 1, KEY_O), - KEY(7, 2, KEY_BACKSPACE), - KEY(7, 3, KEY_M), - KEY(7, 4, KEY_K), - KEY(7, 5, KEY_I), -}; - -static struct matrix_keymap_data treo680_matrix_keymap_data = { - .keymap = treo680_matrix_keys, - .keymap_size = ARRAY_SIZE(treo680_matrix_keys), -}; - -static struct matrix_keymap_data centro_matrix_keymap_data = { - .keymap = centro_matrix_keys, - .keymap_size = ARRAY_SIZE(centro_matrix_keys), -}; - -static struct pxa27x_keypad_platform_data treo680_keypad_pdata = { - .matrix_key_rows = 8, - .matrix_key_cols = 7, - .matrix_keymap_data = &treo680_matrix_keymap_data, - .direct_key_map = { KEY_CONNECT }, - .direct_key_num = 1, - - .debounce_interval = 30, -}; - -static void __init palmtreo_kpc_init(void) -{ - static struct pxa27x_keypad_platform_data *data = &treo680_keypad_pdata; - - if (machine_is_centro()) - data->matrix_keymap_data = ¢ro_matrix_keymap_data; - - pxa_set_keypad_info(&treo680_keypad_pdata); -} -#else -static inline void palmtreo_kpc_init(void) {} -#endif - -/****************************************************************************** - * USB host - ******************************************************************************/ -#if IS_ENABLED(CONFIG_USB_OHCI_HCD) -static struct pxaohci_platform_data treo680_ohci_info = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT1 | ENABLE_PORT3, - .power_budget = 0, -}; - -static void __init palmtreo_uhc_init(void) -{ - if (machine_is_treo680()) - pxa_set_ohci_info(&treo680_ohci_info); -} -#else -static inline void palmtreo_uhc_init(void) {} -#endif - -/****************************************************************************** - * Vibra and LEDs - ******************************************************************************/ -static struct gpio_led treo680_gpio_leds[] = { - { - .name = "treo680:vibra:vibra", - .default_trigger = "none", - .gpio = GPIO_NR_TREO680_VIBRATE_EN, - }, - { - .name = "treo680:green:led", - .default_trigger = "mmc0", - .gpio = GPIO_NR_TREO_GREEN_LED, - }, - { - .name = "treo680:white:keybbl", - .default_trigger = "none", - .gpio = GPIO_NR_TREO680_KEYB_BL, - }, -}; - -static struct gpio_led_platform_data treo680_gpio_led_info = { - .leds = treo680_gpio_leds, - .num_leds = ARRAY_SIZE(treo680_gpio_leds), -}; - -static struct gpio_led centro_gpio_leds[] = { - { - .name = "centro:vibra:vibra", - .default_trigger = "none", - .gpio = GPIO_NR_CENTRO_VIBRATE_EN, - }, - { - .name = "centro:green:led", - .default_trigger = "mmc0", - .gpio = GPIO_NR_TREO_GREEN_LED, - }, - { - .name = "centro:white:keybbl", - .default_trigger = "none", - .active_low = 1, - .gpio = GPIO_NR_CENTRO_KEYB_BL, - }, -}; - -static struct gpio_led_platform_data centro_gpio_led_info = { - .leds = centro_gpio_leds, - .num_leds = ARRAY_SIZE(centro_gpio_leds), -}; - -static struct platform_device palmtreo_leds = { - .name = "leds-gpio", - .id = -1, -}; - -static void __init palmtreo_leds_init(void) -{ - if (machine_is_centro()) - palmtreo_leds.dev.platform_data = ¢ro_gpio_led_info; - else if (machine_is_treo680()) - palmtreo_leds.dev.platform_data = &treo680_gpio_led_info; - - platform_device_register(&palmtreo_leds); -} - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static void __init treo_reserve(void) -{ - memblock_reserve(0xa0000000, 0x1000); - memblock_reserve(0xa2000000, 0x1000); -} - -static void __init palmphone_common_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(treo_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - palm27x_pm_init(TREO_STR_BASE); - palm27x_lcd_init(GPIO_NR_TREO_BL_POWER, &palm_320x320_new_lcd_mode); - palm27x_udc_init(GPIO_NR_TREO_USB_DETECT, GPIO_NR_TREO_USB_PULLUP, 1); - palm27x_irda_init(GPIO_NR_TREO_IR_EN); - palm27x_ac97_init(-1, -1, -1, 95); - palm27x_pwm_init(GPIO_NR_TREO_BL_POWER, -1); - palm27x_power_init(GPIO_NR_TREO_POWER_DETECT, -1); - palm27x_pmic_init(); - palmtreo_kpc_init(); - palmtreo_uhc_init(); - palmtreo_leds_init(); -} - -#ifdef CONFIG_MACH_TREO680 -void __init treo680_gpio_init(void) -{ - unsigned int gpio; - - /* drive all three lcd gpios high initially */ - const unsigned long lcd_flags = GPIOF_INIT_HIGH | GPIOF_DIR_OUT; - - /* - * LCD GPIO initialization... - */ - - /* - * This is likely the power to the lcd. Toggling it low/high appears to - * turn the lcd off/on. Can be toggled after lcd is initialized without - * any apparent adverse effects to the lcd operation. Note that this - * gpio line is used by the lcd controller as the L_BIAS signal, but - * treo680 configures it as gpio. - */ - gpio = GPIO_NR_TREO680_LCD_POWER; - if (gpio_request_one(gpio, lcd_flags, "LCD power") < 0) - goto fail; - - /* - * These two are called "enables", for lack of a better understanding. - * If either of these are toggled after the lcd is initialized, the - * image becomes degraded. N.B. The IPL shipped with the treo - * configures GPIO_NR_TREO680_LCD_EN_N as output and drives it high. If - * the IPL is ever reprogrammed, this initialization may be need to be - * revisited. - */ - gpio = GPIO_NR_TREO680_LCD_EN; - if (gpio_request_one(gpio, lcd_flags, "LCD enable") < 0) - goto fail; - gpio = GPIO_NR_TREO680_LCD_EN_N; - if (gpio_request_one(gpio, lcd_flags, "LCD enable_n") < 0) - goto fail; - - /* driving this low turns LCD on */ - gpio_set_value(GPIO_NR_TREO680_LCD_EN_N, 0); - - return; - fail: - pr_err("gpio %d initialization failed\n", gpio); - gpio_free(GPIO_NR_TREO680_LCD_POWER); - gpio_free(GPIO_NR_TREO680_LCD_EN); - gpio_free(GPIO_NR_TREO680_LCD_EN_N); -} - -static struct gpiod_lookup_table treo680_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_TREO_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_TREO680_SD_READONLY, - "wp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_TREO680_SD_POWER, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init treo680_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); - palmphone_common_init(); - treo680_gpio_init(); - palm27x_mmc_init(&treo680_mci_gpio_table); -} -#endif - -#ifdef CONFIG_MACH_CENTRO - -static struct gpiod_lookup_table centro685_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_TREO_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_CENTRO_SD_POWER, - "power", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init centro_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); - palmphone_common_init(); - palm27x_mmc_init(¢ro685_mci_gpio_table); -} -#endif - -#ifdef CONFIG_MACH_TREO680 -MACHINE_START(TREO680, "Palm Treo 680") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .reserve = treo_reserve, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = treo680_init, - .restart = pxa_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_CENTRO -MACHINE_START(CENTRO, "Palm Centro 685") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .reserve = treo_reserve, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = centro_init, - .restart = pxa_restart, -MACHINE_END -#endif diff --git a/arch/arm/mach-pxa/palmtreo.h b/arch/arm/mach-pxa/palmtreo.h deleted file mode 100644 index 5715cd505424..000000000000 --- a/arch/arm/mach-pxa/palmtreo.h +++ /dev/null @@ -1,64 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Palm Treo smartphones - * - * currently supported: - * Palm Treo 680 (GSM) - * Palm Centro 685 (GSM) - * - * Author: Tomas Cech <sleep_walker@suse.cz> - * - * find more info at www.hackndev.com - */ - -#ifndef _INCLUDE_TREO_H_ -#define _INCLUDE_TREO_H_ - -/* GPIOs */ -#define GPIO_NR_TREO_POWER_DETECT 0 -#define GPIO_NR_TREO_AMP_EN 27 -#define GPIO_NR_TREO_GREEN_LED 20 -#define GPIO_NR_TREO_RED_LED 79 -#define GPIO_NR_TREO_SD_DETECT_N 113 -#define GPIO_NR_TREO_EP_DETECT_N 116 -#define GPIO_NR_TREO_USB_DETECT 1 -#define GPIO_NR_TREO_USB_PULLUP 114 -#define GPIO_NR_TREO_GSM_POWER 40 -#define GPIO_NR_TREO_GSM_RESET 87 -#define GPIO_NR_TREO_GSM_WAKE 57 -#define GPIO_NR_TREO_GSM_HOST_WAKE 14 -#define GPIO_NR_TREO_GSM_TRIGGER 10 -#define GPIO_NR_TREO_IR_EN 115 -#define GPIO_NR_TREO_IR_TXD 47 -#define GPIO_NR_TREO_BL_POWER 38 -#define GPIO_NR_TREO_LCD_POWER 25 - -/* Treo680 specific GPIOs */ -#define GPIO_NR_TREO680_SD_READONLY 33 -#define GPIO_NR_TREO680_SD_POWER 42 -#define GPIO_NR_TREO680_VIBRATE_EN 44 -#define GPIO_NR_TREO680_KEYB_BL 24 -#define GPIO_NR_TREO680_BT_EN 43 -#define GPIO_NR_TREO680_LCD_POWER 77 -#define GPIO_NR_TREO680_LCD_EN 86 -#define GPIO_NR_TREO680_LCD_EN_N 25 - -/* Centro685 specific GPIOs */ -#define GPIO_NR_CENTRO_SD_POWER 21 -#define GPIO_NR_CENTRO_VIBRATE_EN 22 -#define GPIO_NR_CENTRO_KEYB_BL 33 -#define GPIO_NR_CENTRO_BT_EN 80 - -/* Various addresses */ -#define TREO_PHYS_RAM_START 0xa0000000 -#define TREO_PHYS_IO_START 0x40000000 -#define TREO_STR_BASE 0xa2000000 - -/* BACKLIGHT */ -#define TREO_MAX_INTENSITY 254 -#define TREO_DEFAULT_INTENSITY 160 -#define TREO_LIMIT_MASK 0x7F -#define TREO_PRESCALER 63 -#define TREO_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/palmtx-pcmcia.c b/arch/arm/mach-pxa/palmtx-pcmcia.c deleted file mode 100644 index 8c2aaad93043..000000000000 --- a/arch/arm/mach-pxa/palmtx-pcmcia.c +++ /dev/null @@ -1,111 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmtx.c - * - * Driver for Palm T|X PCMCIA - * - * Copyright (C) 2007-2011 Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> - -#include <asm/mach-types.h> -#include "palmtx.h" -#include <pcmcia/soc_common.h> - -static struct gpio palmtx_pcmcia_gpios[] = { - { GPIO_NR_PALMTX_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, - { GPIO_NR_PALMTX_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, - { GPIO_NR_PALMTX_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmtx_pcmcia_gpios, - ARRAY_SIZE(palmtx_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTX_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmtx_pcmcia_gpios, ARRAY_SIZE(palmtx_pcmcia_gpios)); -} - -static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -palmtx_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER1, 1); - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER2, 1); - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_RESET, - !!(state->flags & SS_RESET)); - - return 0; -} - -static struct pcmcia_low_level palmtx_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = palmtx_pcmcia_hw_init, - .hw_shutdown = palmtx_pcmcia_hw_shutdown, - - .socket_state = palmtx_pcmcia_socket_state, - .configure_socket = palmtx_pcmcia_configure_socket, -}; - -static struct platform_device *palmtx_pcmcia_device; - -static int __init palmtx_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmtx()) - return -ENODEV; - - palmtx_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmtx_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmtx_pcmcia_device, &palmtx_pcmcia_ops, - sizeof(palmtx_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmtx_pcmcia_device); - - if (ret) - platform_device_put(palmtx_pcmcia_device); - - return ret; -} - -static void __exit palmtx_pcmcia_exit(void) -{ - platform_device_unregister(palmtx_pcmcia_device); -} - -module_init(palmtx_pcmcia_init); -module_exit(palmtx_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>"); -MODULE_DESCRIPTION("PCMCIA support for Palm T|X"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c deleted file mode 100644 index c0d0762540ab..000000000000 --- a/arch/arm/mach-pxa/palmtx.c +++ /dev/null @@ -1,390 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hardware definitions for PalmTX - * - * Author: Marek Vasut <marek.vasut@gmail.com> - * - * Based on work of: - * Alex Osborne <ato@meshy.org> - * Cristiano P. <cristianop@users.sourceforge.net> - * Jan Herman <2hp@seznam.cz> - * Michal Hrusecky - * - * (find more info at www.hackndev.com) - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/pda_power.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio.h> -#include <linux/wm97xx.h> -#include <linux/power_supply.h> -#include <linux/mtd/platnand.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/physmap.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa27x.h" -#include <linux/platform_data/asoc-pxa.h> -#include "palmtx.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include "udc.h" -#include <linux/platform_data/asoc-palm27x.h> -#include "palm27x.h" - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long palmtx_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO14_GPIO, /* SD detect */ - GPIO114_GPIO, /* SD power */ - GPIO115_GPIO, /* SD r/o switch */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO89_AC97_SYSCLK, - GPIO95_AC97_nRESET, - - /* IrDA */ - GPIO40_GPIO, /* ir disable */ - GPIO46_FICP_RXD, - GPIO47_FICP_TXD, - - /* PWM */ - GPIO16_PWM0_OUT, - - /* USB */ - GPIO13_GPIO, /* usb detect */ - GPIO93_GPIO, /* usb power */ - - /* PCMCIA */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO85_nPCE_1, - GPIO54_nPCE_2, - GPIO79_PSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - GPIO94_GPIO, /* wifi power 1 */ - GPIO108_GPIO, /* wifi power 2 */ - GPIO116_GPIO, /* wifi ready */ - - /* MATRIX KEYPAD */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* FFUART */ - GPIO34_FFUART_RXD, - GPIO39_FFUART_TXD, - - /* NAND */ - GPIO15_nCS_1, - GPIO18_RDY, - - /* MISC. */ - GPIO10_GPIO, /* hotsync button */ - GPIO12_GPIO, /* power detect */ - GPIO107_GPIO, /* earphone detect */ -}; - -/****************************************************************************** - * NOR Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct mtd_partition palmtx_partitions[] = { - { - .name = "Flash", - .offset = 0x00000000, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0 - } -}; - -static struct physmap_flash_data palmtx_flash_data[] = { - { - .width = 2, /* bankwidth in bytes */ - .parts = palmtx_partitions, - .nr_parts = ARRAY_SIZE(palmtx_partitions) - } -}; - -static struct resource palmtx_flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_8M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device palmtx_flash = { - .name = "physmap-flash", - .id = 0, - .resource = &palmtx_flash_resource, - .num_resources = 1, - .dev = { - .platform_data = palmtx_flash_data, - }, -}; - -static void __init palmtx_nor_init(void) -{ - platform_device_register(&palmtx_flash); -} -#else -static inline void palmtx_nor_init(void) {} -#endif - -/****************************************************************************** - * GPIO keyboard - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int palmtx_matrix_keys[] = { - KEY(0, 0, KEY_POWER), - KEY(0, 1, KEY_F1), - KEY(0, 2, KEY_ENTER), - - KEY(1, 0, KEY_F2), - KEY(1, 1, KEY_F3), - KEY(1, 2, KEY_F4), - - KEY(2, 0, KEY_UP), - KEY(2, 2, KEY_DOWN), - - KEY(3, 0, KEY_RIGHT), - KEY(3, 2, KEY_LEFT), -}; - -static struct matrix_keymap_data palmtx_matrix_keymap_data = { - .keymap = palmtx_matrix_keys, - .keymap_size = ARRAY_SIZE(palmtx_matrix_keys), -}; - -static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = { - .matrix_key_rows = 4, - .matrix_key_cols = 3, - .matrix_keymap_data = &palmtx_matrix_keymap_data, - - .debounce_interval = 30, -}; - -static void __init palmtx_kpc_init(void) -{ - pxa_set_keypad_info(&palmtx_keypad_platform_data); -} -#else -static inline void palmtx_kpc_init(void) {} -#endif - -/****************************************************************************** - * GPIO keys - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) -static struct gpio_keys_button palmtx_pxa_buttons[] = { - {KEY_F8, GPIO_NR_PALMTX_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, -}; - -static struct gpio_keys_platform_data palmtx_pxa_keys_data = { - .buttons = palmtx_pxa_buttons, - .nbuttons = ARRAY_SIZE(palmtx_pxa_buttons), -}; - -static struct platform_device palmtx_pxa_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &palmtx_pxa_keys_data, - }, -}; - -static void __init palmtx_keys_init(void) -{ - platform_device_register(&palmtx_pxa_keys); -} -#else -static inline void palmtx_keys_init(void) {} -#endif - -/****************************************************************************** - * NAND Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_NAND_PLATFORM) || \ - defined(CONFIG_MTD_NAND_PLATFORM_MODULE) -static void palmtx_nand_cmd_ctl(struct nand_chip *this, int cmd, - unsigned int ctrl) -{ - char __iomem *nandaddr = this->legacy.IO_ADDR_W; - - if (cmd == NAND_CMD_NONE) - return; - - if (ctrl & NAND_CLE) - writeb(cmd, PALMTX_NAND_CLE_VIRT); - else if (ctrl & NAND_ALE) - writeb(cmd, PALMTX_NAND_ALE_VIRT); - else - writeb(cmd, nandaddr); -} - -static struct mtd_partition palmtx_partition_info[] = { - [0] = { - .name = "palmtx-0", - .offset = 0, - .size = MTDPART_SIZ_FULL - }, -}; - -struct platform_nand_data palmtx_nand_platdata = { - .chip = { - .nr_chips = 1, - .chip_offset = 0, - .nr_partitions = ARRAY_SIZE(palmtx_partition_info), - .partitions = palmtx_partition_info, - .chip_delay = 20, - }, - .ctrl = { - .cmd_ctrl = palmtx_nand_cmd_ctl, - }, -}; - -static struct resource palmtx_nand_resource[] = { - [0] = { - .start = PXA_CS1_PHYS, - .end = PXA_CS1_PHYS + SZ_1M - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device palmtx_nand = { - .name = "gen_nand", - .num_resources = ARRAY_SIZE(palmtx_nand_resource), - .resource = palmtx_nand_resource, - .id = -1, - .dev = { - .platform_data = &palmtx_nand_platdata, - } -}; - -static void __init palmtx_nand_init(void) -{ - platform_device_register(&palmtx_nand); -} -#else -static inline void palmtx_nand_init(void) {} -#endif - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static struct map_desc palmtx_io_desc[] __initdata = { -{ - .virtual = (unsigned long)PALMTX_PCMCIA_VIRT, - .pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS), - .length = PALMTX_PCMCIA_SIZE, - .type = MT_DEVICE, -}, { - .virtual = (unsigned long)PALMTX_NAND_ALE_VIRT, - .pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS), - .length = SZ_1M, - .type = MT_DEVICE, -}, { - .virtual = (unsigned long)PALMTX_NAND_CLE_VIRT, - .pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS), - .length = SZ_1M, - .type = MT_DEVICE, -} -}; - -static void __init palmtx_map_io(void) -{ - pxa27x_map_io(); - iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc)); -} - -static struct gpiod_lookup_table palmtx_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTX_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTX_SD_READONLY, - "wp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTX_SD_POWER, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table palmtx_wm97xx_touch_gpio_table = { - .dev_id = "wm97xx-touch", - .table = { - GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init palmtx_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - palm27x_mmc_init(&palmtx_mci_gpio_table); - gpiod_add_lookup_table(&palmtx_wm97xx_touch_gpio_table); - palm27x_pm_init(PALMTX_STR_BASE); - palm27x_lcd_init(-1, &palm_320x480_lcd_mode); - palm27x_udc_init(GPIO_NR_PALMTX_USB_DETECT_N, - GPIO_NR_PALMTX_USB_PULLUP, 1); - palm27x_irda_init(GPIO_NR_PALMTX_IR_DISABLE); - palm27x_ac97_init(PALMTX_BAT_MIN_VOLTAGE, PALMTX_BAT_MAX_VOLTAGE, - GPIO_NR_PALMTX_EARPHONE_DETECT, 95); - palm27x_pwm_init(GPIO_NR_PALMTX_BL_POWER, GPIO_NR_PALMTX_LCD_POWER); - palm27x_power_init(GPIO_NR_PALMTX_POWER_DETECT, -1); - palm27x_pmic_init(); - palmtx_kpc_init(); - palmtx_keys_init(); - palmtx_nor_init(); - palmtx_nand_init(); -} - -MACHINE_START(PALMTX, "Palm T|X") - .atag_offset = 0x100, - .map_io = palmtx_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = palmtx_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/palmtx.h b/arch/arm/mach-pxa/palmtx.h deleted file mode 100644 index ec88abf0fc6c..000000000000 --- a/arch/arm/mach-pxa/palmtx.h +++ /dev/null @@ -1,110 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Palm T|X Handheld Computer - * - * Based on palmld-gpio.h by Alex Osborne - * - * Authors: Marek Vasut <marek.vasut@gmail.com> - * Cristiano P. <cristianop@users.sourceforge.net> - * Jan Herman <2hp@seznam.cz> - */ - -#ifndef _INCLUDE_PALMTX_H_ -#define _INCLUDE_PALMTX_H_ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMTX_GPIO_RESET 1 - -#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */ -#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10 -#define GPIO_NR_PALMTX_EARPHONE_DETECT 107 - -/* SD/MMC */ -#define GPIO_NR_PALMTX_SD_DETECT_N 14 -#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */ -#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */ - -/* TOUCHSCREEN */ -#define GPIO_NR_PALMTX_WM9712_IRQ 27 - -/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ -#define GPIO_NR_PALMTX_IR_DISABLE 40 - -/* USB */ -#define GPIO_NR_PALMTX_USB_DETECT_N 13 -#define GPIO_NR_PALMTX_USB_PULLUP 93 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMTX_BL_POWER 84 -#define GPIO_NR_PALMTX_LCD_POWER 96 - -/* LCD BORDER */ -#define GPIO_NR_PALMTX_BORDER_SWITCH 98 -#define GPIO_NR_PALMTX_BORDER_SELECT 22 - -/* BLUETOOTH */ -#define GPIO_NR_PALMTX_BT_POWER 17 -#define GPIO_NR_PALMTX_BT_RESET 83 - -/* PCMCIA (WiFi) */ -#define GPIO_NR_PALMTX_PCMCIA_POWER1 94 -#define GPIO_NR_PALMTX_PCMCIA_POWER2 108 -#define GPIO_NR_PALMTX_PCMCIA_RESET 79 -#define GPIO_NR_PALMTX_PCMCIA_READY 116 - -/* NAND Flash ... this GPIO may be incorrect! */ -#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 - -/* INTERRUPTS */ -#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N) -#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ) -#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT) -#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET) - -/** HERE ARE INIT VALUES **/ - -/* Various addresses */ -#define PALMTX_PCMCIA_PHYS 0x28000000 -#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000) -#define PALMTX_PCMCIA_SIZE 0x100000 - -#define PALMTX_PHYS_RAM_START 0xa0000000 -#define PALMTX_PHYS_IO_START 0x40000000 - -#define PALMTX_STR_BASE 0xa0200000 - -#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ -#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ - -#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) -#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) -#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000) -#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000) - -/* TOUCHSCREEN */ -#define AC97_LINK_FRAME 21 - - -/* BATTERY */ -#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ -#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ -#define PALMTX_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */ - -#define PALMTX_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMTX_MAX_INTENSITY 0xFE -#define PALMTX_DEFAULT_INTENSITY 0x7E -#define PALMTX_LIMIT_MASK 0x7F -#define PALMTX_PRESCALER 0x3F -#define PALMTX_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c deleted file mode 100644 index 66e8fe6f1661..000000000000 --- a/arch/arm/mach-pxa/palmz72.c +++ /dev/null @@ -1,319 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hardware definitions for Palm Zire72 - * - * Authors: - * Vladimir "Farcaller" Pouzanov <farcaller@gmail.com> - * Sergey Lapin <slapin@ossfans.org> - * Alex Osborne <bobofdoom@gmail.com> - * Jan Herman <2hp@seznam.cz> - * - * Rewrite for mainline: - * Marek Vasut <marek.vasut@gmail.com> - * - * (find more info at www.hackndev.com) - */ - -#include <linux/platform_device.h> -#include <linux/syscore_ops.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/pda_power.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio.h> -#include <linux/wm97xx.h> -#include <linux/power_supply.h> -#include <linux/platform_data/i2c-gpio.h> -#include <linux/gpio/machine.h> - -#include <asm/mach-types.h> -#include <asm/suspend.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa27x.h" -#include <linux/platform_data/asoc-pxa.h> -#include "palmz72.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include "udc.h" -#include <linux/platform_data/asoc-palm27x.h> -#include "palm27x.h" - -#include "pm.h" -#include <linux/platform_data/media/camera-pxa.h> - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long palmz72_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO14_GPIO, /* SD detect */ - GPIO115_GPIO, /* SD RO */ - GPIO98_GPIO, /* SD power */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO89_AC97_SYSCLK, - GPIO113_AC97_nRESET, - - /* IrDA */ - GPIO49_GPIO, /* ir disable */ - GPIO46_FICP_RXD, - GPIO47_FICP_TXD, - - /* PWM */ - GPIO16_PWM0_OUT, - - /* USB */ - GPIO15_GPIO, /* usb detect */ - GPIO95_GPIO, /* usb pullup */ - - /* Matrix keypad */ - GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, - GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - GPIO20_GPIO, /* bl power */ - GPIO21_GPIO, /* LCD border switch */ - GPIO22_GPIO, /* LCD border color */ - GPIO96_GPIO, /* lcd power */ - - /* PXA Camera */ - GPIO81_CIF_DD_0, - GPIO48_CIF_DD_5, - GPIO50_CIF_DD_3, - GPIO51_CIF_DD_2, - GPIO52_CIF_DD_4, - GPIO53_CIF_MCLK, - GPIO54_CIF_PCLK, - GPIO55_CIF_DD_1, - GPIO84_CIF_FV, - GPIO85_CIF_LV, - GPIO93_CIF_DD_6, - GPIO108_CIF_DD_7, - - GPIO56_GPIO, /* OV9640 Powerdown */ - GPIO57_GPIO, /* OV9640 Reset */ - GPIO91_GPIO, /* OV9640 Power */ - - /* I2C */ - GPIO117_GPIO, /* I2C_SCL */ - GPIO118_GPIO, /* I2C_SDA */ - - /* Misc. */ - GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */ - GPIO88_GPIO, /* green led */ - GPIO27_GPIO, /* WM9712 IRQ */ -}; - -/****************************************************************************** - * GPIO keyboard - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int palmz72_matrix_keys[] = { - KEY(0, 0, KEY_POWER), - KEY(0, 1, KEY_F1), - KEY(0, 2, KEY_ENTER), - - KEY(1, 0, KEY_F2), - KEY(1, 1, KEY_F3), - KEY(1, 2, KEY_F4), - - KEY(2, 0, KEY_UP), - KEY(2, 2, KEY_DOWN), - - KEY(3, 0, KEY_RIGHT), - KEY(3, 2, KEY_LEFT), -}; - -static struct matrix_keymap_data almz72_matrix_keymap_data = { - .keymap = palmz72_matrix_keys, - .keymap_size = ARRAY_SIZE(palmz72_matrix_keys), -}; - -static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = { - .matrix_key_rows = 4, - .matrix_key_cols = 3, - .matrix_keymap_data = &almz72_matrix_keymap_data, - - .debounce_interval = 30, -}; - -static void __init palmz72_kpc_init(void) -{ - pxa_set_keypad_info(&palmz72_keypad_platform_data); -} -#else -static inline void palmz72_kpc_init(void) {} -#endif - -/****************************************************************************** - * LEDs - ******************************************************************************/ -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -static struct gpio_led gpio_leds[] = { - { - .name = "palmz72:green:led", - .default_trigger = "none", - .gpio = GPIO_NR_PALMZ72_LED_GREEN, - }, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device palmz72_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - } -}; - -static void __init palmz72_leds_init(void) -{ - platform_device_register(&palmz72_leds); -} -#else -static inline void palmz72_leds_init(void) {} -#endif - -#ifdef CONFIG_PM - -/* We have some black magic here - * PalmOS ROM on recover expects special struct physical address - * to be transferred via PSPR. Using this struct PalmOS restores - * its state after sleep. As for Linux, we need to setup it the - * same way. More than that, PalmOS ROM changes some values in memory. - * For now only one location is found, which needs special treatment. - * Thanks to Alex Osborne, Andrzej Zaborowski, and lots of other people - * for reading backtraces for me :) - */ - -#define PALMZ72_SAVE_DWORD ((unsigned long *)0xc0000050) - -static struct palmz72_resume_info palmz72_resume_info = { - .magic0 = 0xb4e6, - .magic1 = 1, - - /* reset state, MMU off etc */ - .arm_control = 0, - .aux_control = 0, - .ttb = 0, - .domain_access = 0, - .process_id = 0, -}; - -static unsigned long store_ptr; - -/* syscore_ops for Palm Zire 72 PM */ - -static int palmz72_pm_suspend(void) -{ - /* setup the resume_info struct for the original bootloader */ - palmz72_resume_info.resume_addr = (u32) cpu_resume; - - /* Storing memory touched by ROM */ - store_ptr = *PALMZ72_SAVE_DWORD; - - /* Setting PSPR to a proper value */ - PSPR = __pa_symbol(&palmz72_resume_info); - - return 0; -} - -static void palmz72_pm_resume(void) -{ - *PALMZ72_SAVE_DWORD = store_ptr; -} - -static struct syscore_ops palmz72_pm_syscore_ops = { - .suspend = palmz72_pm_suspend, - .resume = palmz72_pm_resume, -}; - -static int __init palmz72_pm_init(void) -{ - if (machine_is_palmz72()) { - register_syscore_ops(&palmz72_pm_syscore_ops); - return 0; - } - return -ENODEV; -} - -device_initcall(palmz72_pm_init); -#endif - -static struct gpiod_lookup_table palmz72_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMZ72_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMZ72_SD_RO, - "wp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMZ72_SD_POWER_N, - "power", GPIO_ACTIVE_LOW), - { }, - }, -}; - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static void __init palmz72_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config)); - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - palm27x_mmc_init(&palmz72_mci_gpio_table); - palm27x_lcd_init(-1, &palm_320x320_lcd_mode); - palm27x_udc_init(GPIO_NR_PALMZ72_USB_DETECT_N, - GPIO_NR_PALMZ72_USB_PULLUP, 0); - palm27x_irda_init(GPIO_NR_PALMZ72_IR_DISABLE); - palm27x_ac97_init(PALMZ72_BAT_MIN_VOLTAGE, PALMZ72_BAT_MAX_VOLTAGE, - -1, 113); - palm27x_pwm_init(-1, -1); - palm27x_power_init(-1, -1); - palm27x_pmic_init(); - palmz72_kpc_init(); - palmz72_leds_init(); -} - -MACHINE_START(PALMZ72, "Palm Zire72") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = palmz72_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/palmz72.h b/arch/arm/mach-pxa/palmz72.h deleted file mode 100644 index 40f3f9987983..000000000000 --- a/arch/arm/mach-pxa/palmz72.h +++ /dev/null @@ -1,80 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Palm Zire72 Handheld Computer - * - * Authors: Alex Osborne <bobofdoom@gmail.com> - * Jan Herman <2hp@seznam.cz> - * Sergey Lapin <slapin@ossfans.org> - */ - -#ifndef _INCLUDE_PALMZ72_H_ -#define _INCLUDE_PALMZ72_H_ - -/* Power and control */ -#define GPIO_NR_PALMZ72_GPIO_RESET 1 -#define GPIO_NR_PALMZ72_POWER_DETECT 0 - -/* SD/MMC */ -#define GPIO_NR_PALMZ72_SD_DETECT_N 14 -#define GPIO_NR_PALMZ72_SD_POWER_N 98 -#define GPIO_NR_PALMZ72_SD_RO 115 - -/* Touchscreen */ -#define GPIO_NR_PALMZ72_WM9712_IRQ 27 - -/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ -#define GPIO_NR_PALMZ72_IR_DISABLE 49 - -/* USB */ -#define GPIO_NR_PALMZ72_USB_DETECT_N 15 -#define GPIO_NR_PALMZ72_USB_PULLUP 95 - -/* LCD/Backlight */ -#define GPIO_NR_PALMZ72_BL_POWER 20 -#define GPIO_NR_PALMZ72_LCD_POWER 96 - -/* LED */ -#define GPIO_NR_PALMZ72_LED_GREEN 88 - -/* Bluetooth */ -#define GPIO_NR_PALMZ72_BT_POWER 17 -#define GPIO_NR_PALMZ72_BT_RESET 83 - -/* Camera */ -#define GPIO_NR_PALMZ72_CAM_PWDN 56 -#define GPIO_NR_PALMZ72_CAM_RESET 57 -#define GPIO_NR_PALMZ72_CAM_POWER 91 - -/** Initial values **/ - -/* Battery */ -#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ -#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ -#define PALMZ72_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMZ72_MAX_LIFE_MINS 360 /* on-life in minutes */ - -/* Backlight */ -#define PALMZ72_MAX_INTENSITY 0xFE -#define PALMZ72_DEFAULT_INTENSITY 0x7E -#define PALMZ72_LIMIT_MASK 0x7F -#define PALMZ72_PRESCALER 0x3F -#define PALMZ72_PERIOD_NS 3500 - -#ifdef CONFIG_PM -struct palmz72_resume_info { - u32 magic0; /* 0x0 */ - u32 magic1; /* 0x4 */ - u32 resume_addr; /* 0x8 */ - u32 pad[11]; /* 0xc..0x37 */ - u32 arm_control; /* 0x38 */ - u32 aux_control; /* 0x3c */ - u32 ttb; /* 0x40 */ - u32 domain_access; /* 0x44 */ - u32 process_id; /* 0x48 */ -}; -#endif -#endif - diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c deleted file mode 100644 index 7ff6f0d655c8..000000000000 --- a/arch/arm/mach-pxa/pcm027.c +++ /dev/null @@ -1,266 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/pcm027.c - * Support for the Phytec phyCORE-PXA270 CPU card (aka PCM-027). - * - * Refer - * http://www.phytec.com/products/sbc/ARM-XScale/phyCORE-XScale-PXA270.html - * for additional hardware info - * - * Author: Juergen Kilb - * Created: April 05, 2005 - * Copyright: Phytec Messtechnik GmbH - * e-Mail: armlinux@phytec.de - * - * based on Intel Mainstone Board - * - * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de) - */ - -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/mtd/physmap.h> -#include <linux/spi/spi.h> -#include <linux/spi/max7301.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/leds.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "pxa27x.h" -#include "pcm027.h" -#include "generic.h" - -/* - * ABSTRACT: - * - * The PXA270 processor comes with a bunch of hardware on its silicon. - * Not all of this hardware can be used at the same time and not all - * is routed to module's connectors. Also it depends on the baseboard, what - * kind of hardware can be used in which way. - * -> So this file supports the main devices on the CPU card only! - * Refer pcm990-baseboard.c how to extend this features to get a full - * blown system with many common interfaces. - * - * The PCM-027 supports the following interfaces through its connectors and - * will be used in pcm990-baseboard.c: - * - * - LCD support - * - MMC support - * - IDE/CF card - * - FFUART - * - BTUART - * - IRUART - * - AC97 - * - SSP - * - SSP3 - * - * Claimed GPIOs: - * GPIO0 -> IRQ input from RTC - * GPIO2 -> SYS_ENA*) - * GPIO3 -> PWR_SCL - * GPIO4 -> PWR_SDA - * GPIO5 -> PowerCap0*) - * GPIO6 -> PowerCap1*) - * GPIO7 -> PowerCap2*) - * GPIO8 -> PowerCap3*) - * GPIO15 -> /CS1 - * GPIO20 -> /CS2 - * GPIO21 -> /CS3 - * GPIO33 -> /CS5 network controller select - * GPIO52 -> IRQ from network controller - * GPIO78 -> /CS2 - * GPIO80 -> /CS4 - * GPIO90 -> LED0 - * GPIO91 -> LED1 - * GPIO114 -> IRQ from CAN controller - * GPIO117 -> SCL - * GPIO118 -> SDA - * - * *) CPU internal use only - */ - -static unsigned long pcm027_pin_config[] __initdata = { - /* Chip Selects */ - GPIO20_nSDCS_2, - GPIO21_nSDCS_3, - GPIO15_nCS_1, - GPIO78_nCS_2, - GPIO80_nCS_4, - GPIO33_nCS_5, /* Ethernet */ - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* GPIO */ - GPIO52_GPIO, /* IRQ from network controller */ -#ifdef CONFIG_LEDS_GPIO - GPIO90_GPIO, /* PCM027_LED_CPU */ - GPIO91_GPIO, /* PCM027_LED_HEART_BEAT */ -#endif - GPIO114_GPIO, /* IRQ from CAN controller */ -}; - -/* - * SMC91x network controller specific stuff - */ -static struct resource smc91x_resources[] = { - [0] = { - .start = PCM027_ETH_PHYS + 0x300, - .end = PCM027_ETH_PHYS + PCM027_ETH_SIZE, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PCM027_ETH_IRQ, - .end = PCM027_ETH_IRQ, - /* note: smc91x's driver doesn't use the trigger bits yet */ - .flags = IORESOURCE_IRQ | PCM027_ETH_IRQ_EDGE, - } -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -/* - * SPI host and devices - */ -static struct pxa2xx_spi_controller pxa_ssp_master_info = { - .num_chipselect = 1, -}; - -static struct max7301_platform_data max7301_info = { - .base = -1, -}; - -/* bus_num must match id in pxa2xx_set_spi_info() call */ -static struct spi_board_info spi_board_info[] __initdata = { - { - .modalias = "max7301", - .platform_data = &max7301_info, - .max_speed_hz = 13000000, - .bus_num = 1, - .chip_select = 0, - .mode = SPI_MODE_0, - }, -}; - -/* - * NOR flash - */ -static struct physmap_flash_data pcm027_flash_data = { - .width = 4, -}; - -static struct resource pcm027_flash_resource = { - .start = PCM027_FLASH_PHYS, - .end = PCM027_FLASH_PHYS + PCM027_FLASH_SIZE - 1 , - .flags = IORESOURCE_MEM, -}; - -static struct platform_device pcm027_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &pcm027_flash_data, - }, - .resource = &pcm027_flash_resource, - .num_resources = 1, -}; - -#ifdef CONFIG_LEDS_GPIO - -static struct gpio_led pcm027_led[] = { - { - .name = "led0:red", /* FIXME */ - .gpio = PCM027_LED_CPU - }, - { - .name = "led1:green", /* FIXME */ - .gpio = PCM027_LED_HEARD_BEAT - }, -}; - -static struct gpio_led_platform_data pcm027_led_data = { - .num_leds = ARRAY_SIZE(pcm027_led), - .leds = pcm027_led -}; - -static struct platform_device pcm027_led_dev = { - .name = "leds-gpio", - .id = 0, - .dev = { - .platform_data = &pcm027_led_data, - }, -}; - -#endif /* CONFIG_LEDS_GPIO */ - -/* - * declare the available device resources on this board - */ -static struct platform_device *devices[] __initdata = { - &smc91x_device, - &pcm027_flash, -#ifdef CONFIG_LEDS_GPIO - &pcm027_led_dev -#endif -}; - -/* - * pcm027_init - breath some life into the board - */ -static void __init pcm027_init(void) -{ - /* system bus arbiter setting - * - Core_Park - * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 - */ - ARB_CNTRL = ARB_CORE_PARK | 0x234; - - pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - platform_add_devices(devices, ARRAY_SIZE(devices)); - - /* at last call the baseboard to initialize itself */ -#ifdef CONFIG_MACH_PCM990_BASEBOARD - pcm990_baseboard_init(); -#endif - - pxa2xx_set_spi_info(1, &pxa_ssp_master_info); - spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); -} - -static void __init pcm027_map_io(void) -{ - pxa27x_map_io(); - - /* initialize sleep mode regs (wake-up sources, etc) */ - PGSR0 = 0x01308000; - PGSR1 = 0x00CF0002; - PGSR2 = 0x0E294000; - PGSR3 = 0x0000C000; - PWER = 0x40000000 | PWER_GPIO0 | PWER_GPIO1; - PRER = 0x00000000; - PFER = 0x00000003; -} - -MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") - /* Maintainer: Pengutronix */ - .atag_offset = 0x100, - .map_io = pcm027_map_io, - .nr_irqs = PCM027_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = pcm027_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/pcm027.h b/arch/arm/mach-pxa/pcm027.h deleted file mode 100644 index 58ade4ad6ba3..000000000000 --- a/arch/arm/mach-pxa/pcm027.h +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-pxa/include/mach/pcm027.h - * - * (c) 2003 Phytec Messtechnik GmbH <armlinux@phytec.de> - * (c) 2007 Juergen Beisert <j.beisert@pengutronix.de> - */ - -/* - * Definitions of CPU card resources only - */ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/* phyCORE-PXA270 (PCM027) Interrupts */ -#define PCM027_IRQ(x) (IRQ_BOARD_START + (x)) -#define PCM027_BTDET_IRQ PCM027_IRQ(0) -#define PCM027_FF_RI_IRQ PCM027_IRQ(1) -#define PCM027_MMCDET_IRQ PCM027_IRQ(2) -#define PCM027_PM_5V_IRQ PCM027_IRQ(3) - -#define PCM027_NR_IRQS (IRQ_BOARD_START + 32) - -/* I2C RTC */ -#define PCM027_RTC_IRQ_GPIO 0 -#define PCM027_RTC_IRQ PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO) -#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING -#define ADR_PCM027_RTC 0x51 /* I2C address */ - -/* I2C EEPROM */ -#define ADR_PCM027_EEPROM 0x54 /* I2C address */ - -/* Ethernet chip (SMSC91C111) */ -#define PCM027_ETH_IRQ_GPIO 52 -#define PCM027_ETH_IRQ PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO) -#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define PCM027_ETH_PHYS PXA_CS5_PHYS -#define PCM027_ETH_SIZE (1*1024*1024) - -/* CAN controller SJA1000 (unsupported yet) */ -#define PCM027_CAN_IRQ_GPIO 114 -#define PCM027_CAN_IRQ PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO) -#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING -#define PCM027_CAN_PHYS 0x22000000 -#define PCM027_CAN_SIZE 0x100 - -/* SPI GPIO expander (unsupported yet) */ -#define PCM027_EGPIO_IRQ_GPIO 27 -#define PCM027_EGPIO_IRQ PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO) -#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING -#define PCM027_EGPIO_CS 24 -/* - * TODO: Switch this pin from dedicated usage to GPIO if - * more than the MAX7301 device is connected to this SPI bus - */ -#define PCM027_EGPIO_CS_MODE GPIO24_SFRM_MD - -/* Flash memory */ -#define PCM027_FLASH_PHYS 0x00000000 -#define PCM027_FLASH_SIZE 0x02000000 - -/* onboard LEDs connected to GPIO */ -#define PCM027_LED_CPU 90 -#define PCM027_LED_HEARD_BEAT 91 - -/* - * This CPU module needs a baseboard to work. After basic initializing - * its own devices, it calls baseboard's init function. - * TODO: Add your own basebaord init function and call it from - * inside pcm027_init(). This example here is for the developmen board. - * Refer pcm990-baseboard.c - */ -extern void pcm990_baseboard_init(void); diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c deleted file mode 100644 index 33a9d2eeca1c..000000000000 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ /dev/null @@ -1,408 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * arch/arm/mach-pxa/pcm990-baseboard.c - * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990). - * - * Refer - * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html - * for additional hardware info - * - * Author: Juergen Kilb - * Created: April 05, 2005 - * Copyright: Phytec Messtechnik GmbH - * e-Mail: armlinux@phytec.de - * - * based on Intel Mainstone Board - * - * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de) - */ -#include <linux/gpio.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> - -#include <asm/mach/map.h> -#include "pxa27x.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include "pcm990_baseboard.h" -#include <linux/platform_data/video-pxafb.h> - -#include "devices.h" -#include "generic.h" - -static unsigned long pcm990_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO112_MMC_CMD, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - /* USB */ - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, - /* PWM0 */ - GPIO16_PWM0_OUT, - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, -}; - -static void __iomem *pcm990_cpld_base; - -static u8 pcm990_cpld_readb(unsigned int reg) -{ - return readb(pcm990_cpld_base + reg); -} - -static void pcm990_cpld_writeb(u8 value, unsigned int reg) -{ - writeb(value, pcm990_cpld_base + reg); -} - -/* - * pcm990_lcd_power - control power supply to the LCD - * @on: 0 = switch off, 1 = switch on - * - * Called by the pxafb driver - */ -#ifndef CONFIG_PCM990_DISPLAY_NONE -static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var) -{ - if (on) { - /* enable LCD-Latches - * power on LCD - */ - pcm990_cpld_writeb(PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON, - PCM990_CTRL_REG3); - } else { - /* disable LCD-Latches - * power off LCD - */ - pcm990_cpld_writeb(0, PCM990_CTRL_REG3); - } -} -#endif - -#if defined(CONFIG_PCM990_DISPLAY_SHARP) -static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = { - .pixclock = 28000, - .xres = 640, - .yres = 480, - .bpp = 16, - .hsync_len = 20, - .left_margin = 103, - .right_margin = 47, - .vsync_len = 6, - .upper_margin = 28, - .lower_margin = 5, - .sync = 0, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info pcm990_fbinfo __initdata = { - .modes = &fb_info_sharp_lq084v1dg21, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, - .pxafb_lcd_power = pcm990_lcd_power, -}; -#elif defined(CONFIG_PCM990_DISPLAY_NEC) -struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = { - .pixclock = 39720, - .xres = 640, - .yres = 480, - .bpp = 16, - .hsync_len = 32, - .left_margin = 16, - .right_margin = 48, - .vsync_len = 2, - .upper_margin = 12, - .lower_margin = 17, - .sync = 0, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info pcm990_fbinfo __initdata = { - .modes = &fb_info_nec_nl6448bc20_18d, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, - .pxafb_lcd_power = pcm990_lcd_power, -}; -#endif - -static struct pwm_lookup pcm990_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data pcm990_backlight_data = { - .max_brightness = 1023, - .dft_brightness = 1023, -}; - -static struct platform_device pcm990_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa27x_device_pwm0.dev, - .platform_data = &pcm990_backlight_data, - }, -}; - -/* - * The PCM-990 development baseboard uses PCM-027's hardware in the - * following way: - * - * - LCD support is in use - * - GPIO16 is output for back light on/off with PWM - * - GPIO58 ... GPIO73 are outputs for display data - * - GPIO74 is output output for LCDFCLK - * - GPIO75 is output for LCDLCLK - * - GPIO76 is output for LCDPCLK - * - GPIO77 is output for LCDBIAS - * - MMC support is in use - * - GPIO32 is output for MMCCLK - * - GPIO92 is MMDAT0 - * - GPIO109 is MMDAT1 - * - GPIO110 is MMCS0 - * - GPIO111 is MMCS1 - * - GPIO112 is MMCMD - * - IDE/CF card is in use - * - GPIO48 is output /POE - * - GPIO49 is output /PWE - * - GPIO50 is output /PIOR - * - GPIO51 is output /PIOW - * - GPIO54 is output /PCE2 - * - GPIO55 is output /PREG - * - GPIO56 is input /PWAIT - * - GPIO57 is output /PIOS16 - * - GPIO79 is output PSKTSEL - * - GPIO85 is output /PCE1 - * - FFUART is in use - * - GPIO34 is input FFRXD - * - GPIO35 is input FFCTS - * - GPIO36 is input FFDCD - * - GPIO37 is input FFDSR - * - GPIO38 is input FFRI - * - GPIO39 is output FFTXD - * - GPIO40 is output FFDTR - * - GPIO41 is output FFRTS - * - BTUART is in use - * - GPIO42 is input BTRXD - * - GPIO43 is output BTTXD - * - GPIO44 is input BTCTS - * - GPIO45 is output BTRTS - * - IRUART is in use - * - GPIO46 is input STDRXD - * - GPIO47 is output STDTXD - * - AC97 is in use*) - * - GPIO28 is input AC97CLK - * - GPIO29 is input AC97DatIn - * - GPIO30 is output AC97DatO - * - GPIO31 is output AC97SYNC - * - GPIO113 is output AC97_RESET - * - SSP is in use - * - GPIO23 is output SSPSCLK - * - GPIO24 is output chip select to Max7301 - * - GPIO25 is output SSPTXD - * - GPIO26 is input SSPRXD - * - GPIO27 is input for Max7301 IRQ - * - GPIO53 is input SSPSYSCLK - * - SSP3 is in use - * - GPIO81 is output SSPTXD3 - * - GPIO82 is input SSPRXD3 - * - GPIO83 is output SSPSFRM - * - GPIO84 is output SSPCLK3 - * - * Otherwise claimed GPIOs: - * GPIO1 -> IRQ from user switch - * GPIO9 -> IRQ from power management - * GPIO10 -> IRQ from WML9712 AC97 controller - * GPIO11 -> IRQ from IDE controller - * GPIO12 -> IRQ from CF controller - * GPIO13 -> IRQ from CF controller - * GPIO14 -> GPIO free - * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path) - * GPIO19 -> GPIO free - * GPIO20 -> /SDCS2 - * GPIO21 -> /CS3 PC card socket select - * GPIO33 -> /CS5 network controller select - * GPIO78 -> /CS2 (16 bit wide data path) - * GPIO80 -> /CS4 (16 bit wide data path) - * GPIO86 -> GPIO free - * GPIO87 -> GPIO free - * GPIO90 -> LED0 on CPU module - * GPIO91 -> LED1 on CPI module - * GPIO117 -> SCL - * GPIO118 -> SDA - */ - -static unsigned long pcm990_irq_enabled; - -static void pcm990_mask_ack_irq(struct irq_data *d) -{ - int pcm990_irq = (d->irq - PCM027_IRQ(0)); - - pcm990_irq_enabled &= ~(1 << pcm990_irq); - - pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA); -} - -static void pcm990_unmask_irq(struct irq_data *d) -{ - int pcm990_irq = (d->irq - PCM027_IRQ(0)); - u8 val; - - /* the irq can be acknowledged only if deasserted, so it's done here */ - - pcm990_irq_enabled |= (1 << pcm990_irq); - - val = pcm990_cpld_readb(PCM990_CTRL_INTSETCLR); - val |= 1 << pcm990_irq; - pcm990_cpld_writeb(val, PCM990_CTRL_INTSETCLR); - - pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA); -} - -static struct irq_chip pcm990_irq_chip = { - .irq_mask_ack = pcm990_mask_ack_irq, - .irq_unmask = pcm990_unmask_irq, -}; - -static void pcm990_irq_handler(struct irq_desc *desc) -{ - unsigned int irq; - unsigned long pending; - - pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR); - pending &= pcm990_irq_enabled; - - do { - /* clear our parent IRQ */ - desc->irq_data.chip->irq_ack(&desc->irq_data); - if (likely(pending)) { - irq = PCM027_IRQ(0) + __ffs(pending); - generic_handle_irq(irq); - } - pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR); - pending &= pcm990_irq_enabled; - } while (pending); -} - -static void __init pcm990_init_irq(void) -{ - int irq; - - /* setup extra PCM990 irqs */ - for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { - irq_set_chip_and_handler(irq, &pcm990_irq_chip, - handle_level_irq); - irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); - } - - /* disable all Interrupts */ - pcm990_cpld_writeb(0x0, PCM990_CTRL_INTMSKENA); - pcm990_cpld_writeb(0xff, PCM990_CTRL_INTSETCLR); - - irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); - irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); -} - -static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int, - void *data) -{ - int err; - - err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, 0, - "MMC card detect", data); - if (err) - printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC " - "card detect IRQ\n"); - - return err; -} - -static int pcm990_mci_setpower(struct device *dev, unsigned int vdd) -{ - struct pxamci_platform_data *p_d = dev->platform_data; - u8 val; - - val = pcm990_cpld_readb(PCM990_CTRL_REG5); - - if ((1 << vdd) & p_d->ocr_mask) - val |= PCM990_CTRL_MMC2PWR; - else - val &= ~PCM990_CTRL_MMC2PWR; - - pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5); - return 0; -} - -static void pcm990_mci_exit(struct device *dev, void *data) -{ - free_irq(PCM027_MMCDET_IRQ, data); -} - -#define MSECS_PER_JIFFY (1000/HZ) - -static struct pxamci_platform_data pcm990_mci_platform_data = { - .detect_delay_ms = 250, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .init = pcm990_mci_init, - .setpower = pcm990_mci_setpower, - .exit = pcm990_mci_exit, -}; - -static struct pxaohci_platform_data pcm990_ohci_platform_data = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW, - .power_on_delay = 10, -}; - -/* - * system init for baseboard usage. Will be called by pcm027 init. - * - * Add platform devices present on this baseboard and init - * them from CPU side as far as required to use them later on - */ -void __init pcm990_baseboard_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config)); - - pcm990_cpld_base = ioremap(PCM990_CTRL_PHYS, PCM990_CTRL_SIZE); - if (!pcm990_cpld_base) { - pr_err("pcm990: failed to ioremap cpld\n"); - return; - } - - /* register CPLD's IRQ controller */ - pcm990_init_irq(); - -#ifndef CONFIG_PCM990_DISPLAY_NONE - pxa_set_fb_info(NULL, &pcm990_fbinfo); -#endif - pwm_add_table(pcm990_pwm_lookup, ARRAY_SIZE(pcm990_pwm_lookup)); - platform_device_register(&pcm990_backlight_device); - - /* MMC */ - pxa_set_mci_info(&pcm990_mci_platform_data); - - /* USB host */ - pxa_set_ohci_info(&pcm990_ohci_platform_data); - - pxa_set_i2c_info(NULL); - pxa_set_ac97_info(NULL); - - printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n"); -} diff --git a/arch/arm/mach-pxa/pcm990_baseboard.h b/arch/arm/mach-pxa/pcm990_baseboard.h deleted file mode 100644 index 18cf71decb03..000000000000 --- a/arch/arm/mach-pxa/pcm990_baseboard.h +++ /dev/null @@ -1,199 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-pxa/include/mach/pcm990_baseboard.h - * - * (c) 2003 Phytec Messtechnik GmbH <armlinux@phytec.de> - * (c) 2007 Juergen Beisert <j.beisert@pengutronix.de> - */ - -#include "pcm027.h" -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/* - * definitions relevant only when the PCM-990 - * development base board is in use - */ - -/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ -#define PCM990_CTRL_INT_IRQ_GPIO 9 -#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO) -#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ -#define PCM990_CTRL_SIZE (1*1024*1024) - -#define PCM990_CTRL_PWR_IRQ_GPIO 14 -#define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO) -#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -/* visible CPLD (U7) registers */ -#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ -#define PCM990_CTRL_SYSRES 0x0001 /* System RESET REGISTER */ -#define PCM990_CTRL_RESOUT 0x0002 /* RESETOUT Enable REGISTER */ -#define PCM990_CTRL_RESGPIO 0x0004 /* RESETGPIO Enable REGISTER */ - -#define PCM990_CTRL_REG1 0x0002 /* Power REGISTER */ -#define PCM990_CTRL_5VOFF 0x0001 /* Disable 5V Regulators */ -#define PCM990_CTRL_CANPWR 0x0004 /* Enable CANPWR ADUM */ -#define PCM990_CTRL_PM_5V 0x0008 /* Read 5V OK */ - -#define PCM990_CTRL_REG2 0x0004 /* LED REGISTER */ -#define PCM990_CTRL_LEDPWR 0x0001 /* POWER LED enable */ -#define PCM990_CTRL_LEDBAS 0x0002 /* BASIS LED enable */ -#define PCM990_CTRL_LEDUSR 0x0004 /* USER LED enable */ - -#define PCM990_CTRL_REG3 0x0006 /* LCD CTRL REGISTER 3 */ -#define PCM990_CTRL_LCDPWR 0x0001 /* RW LCD Power on */ -#define PCM990_CTRL_LCDON 0x0002 /* RW LCD Latch on */ -#define PCM990_CTRL_LCDPOS1 0x0004 /* RW POS 1 */ -#define PCM990_CTRL_LCDPOS2 0x0008 /* RW POS 2 */ - -#define PCM990_CTRL_REG4 0x0008 /* MMC1 CTRL REGISTER 4 */ -#define PCM990_CTRL_MMC1PWR 0x0001 /* RW MMC1 Power on */ - -#define PCM990_CTRL_REG5 0x000A /* MMC2 CTRL REGISTER 5 */ -#define PCM990_CTRL_MMC2PWR 0x0001 /* RW MMC2 Power on */ -#define PCM990_CTRL_MMC2LED 0x0002 /* RW MMC2 LED */ -#define PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */ -#define PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */ - -#define PCM990_CTRL_INTSETCLR 0x000C /* Interrupt Clear REGISTER */ -#define PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */ -#define PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */ -#define PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */ -#define PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */ - -#define PCM990_CTRL_INTMSKENA 0x000E /* Interrupt Enable REGISTER */ -#define PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */ -#define PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */ -#define PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */ -#define PCM990_CTRL_ENAINT3 0x0008 /* Enable Int PM_5V off */ - -#define PCM990_CTRL_REG8 0x0014 /* Uart REGISTER */ -#define PCM990_CTRL_FFSD 0x0001 /* BT Uart Enable */ -#define PCM990_CTRL_BTSD 0x0002 /* FF Uart Enable */ -#define PCM990_CTRL_FFRI 0x0004 /* FF Uart RI detect */ -#define PCM990_CTRL_BTRX 0x0008 /* BT Uart Rx detect */ - -#define PCM990_CTRL_REG9 0x0010 /* AC97 Flash REGISTER */ -#define PCM990_CTRL_FLWP 0x0001 /* pC Flash Write Protect */ -#define PCM990_CTRL_FLDIS 0x0002 /* pC Flash Disable */ -#define PCM990_CTRL_AC97ENA 0x0004 /* Enable AC97 Expansion */ - -#define PCM990_CTRL_REG10 0x0012 /* GPS-REGISTER */ -#define PCM990_CTRL_GPSPWR 0x0004 /* GPS-Modul Power on */ -#define PCM990_CTRL_GPSENA 0x0008 /* GPS-Modul Enable */ - -#define PCM990_CTRL_REG11 0x0014 /* Accu REGISTER */ -#define PCM990_CTRL_ACENA 0x0001 /* Charge Enable */ -#define PCM990_CTRL_ACSEL 0x0002 /* Charge Akku -> DC Enable */ -#define PCM990_CTRL_ACPRES 0x0004 /* DC Present */ -#define PCM990_CTRL_ACALARM 0x0008 /* Error Akku */ - -/* - * IDE - */ -#define PCM990_IDE_IRQ_GPIO 13 -#define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO) -#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ -#define PCM990_IDE_PLD_BASE 0xee000000 -#define PCM990_IDE_PLD_SIZE (1*1024*1024) - -/* visible CPLD (U6) registers */ -#define PCM990_IDE_PLD_REG0 0x1000 /* OFFSET IDE REGISTER 0 */ -#define PCM990_IDE_PM5V 0x0004 /* R System VCC_5V */ -#define PCM990_IDE_STBY 0x0008 /* R System StandBy */ - -#define PCM990_IDE_PLD_REG1 0x1002 /* OFFSET IDE REGISTER 1 */ -#define PCM990_IDE_IDEMODE 0x0001 /* R TrueIDE Mode */ -#define PCM990_IDE_DMAENA 0x0004 /* RW DMA Enable */ -#define PCM990_IDE_DMA1_0 0x0008 /* RW 1=DREQ1 0=DREQ0 */ - -#define PCM990_IDE_PLD_REG2 0x1004 /* OFFSET IDE REGISTER 2 */ -#define PCM990_IDE_RESENA 0x0001 /* RW IDE Reset Bit enable */ -#define PCM990_IDE_RES 0x0002 /* RW IDE Reset Bit */ -#define PCM990_IDE_RDY 0x0008 /* RDY */ - -#define PCM990_IDE_PLD_REG3 0x1006 /* OFFSET IDE REGISTER 3 */ -#define PCM990_IDE_IDEOE 0x0001 /* RW Latch on Databus */ -#define PCM990_IDE_IDEON 0x0002 /* RW Latch on Control Address */ -#define PCM990_IDE_IDEIN 0x0004 /* RW Latch on Interrupt usw. */ - -#define PCM990_IDE_PLD_REG4 0x1008 /* OFFSET IDE REGISTER 4 */ -#define PCM990_IDE_PWRENA 0x0001 /* RW IDE Power enable */ -#define PCM990_IDE_5V 0x0002 /* R IDE Power 5V */ -#define PCM990_IDE_PWG 0x0008 /* R IDE Power is on */ - -#define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE) -#define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS) - -/* - * Compact Flash - */ -#define PCM990_CF_IRQ_GPIO 11 -#define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO) -#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -#define PCM990_CF_CD_GPIO 12 -#define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO) -#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING - -#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ - -/* visible CPLD (U6) registers */ -#define PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */ -#define PCM990_CF_REG0_LED 0x0001 /* RW LED on */ -#define PCM990_CF_REG0_BLK 0x0002 /* RW LED flash when access */ -#define PCM990_CF_REG0_PM5V 0x0004 /* R System VCC_5V enable */ -#define PCM990_CF_REG0_STBY 0x0008 /* R System StandBy */ - -#define PCM990_CF_PLD_REG1 0x1002 /* OFFSET CF REGISTER 1 */ -#define PCM990_CF_REG1_IDEMODE 0x0001 /* RW CF card run as TrueIDE */ -#define PCM990_CF_REG1_CF0 0x0002 /* RW CF card at ADDR 0x28000000 */ - -#define PCM990_CF_PLD_REG2 0x1004 /* OFFSET CF REGISTER 2 */ -#define PCM990_CF_REG2_RES 0x0002 /* RW CF RESET BIT */ -#define PCM990_CF_REG2_RDYENA 0x0004 /* RW Enable CF_RDY */ -#define PCM990_CF_REG2_RDY 0x0008 /* R CF_RDY auf PWAIT */ - -#define PCM990_CF_PLD_REG3 0x1006 /* OFFSET CF REGISTER 3 */ -#define PCM990_CF_REG3_CFOE 0x0001 /* RW Latch on Databus */ -#define PCM990_CF_REG3_CFON 0x0002 /* RW Latch on Control Address */ -#define PCM990_CF_REG3_CFIN 0x0004 /* RW Latch on Interrupt usw. */ -#define PCM990_CF_REG3_CFCD 0x0008 /* RW Latch on CD1/2 VS1/2 usw */ - -#define PCM990_CF_PLD_REG4 0x1008 /* OFFSET CF REGISTER 4 */ -#define PCM990_CF_REG4_PWRENA 0x0001 /* RW CF Power on (CD1/2 = "00") */ -#define PCM990_CF_REG4_5_3V 0x0002 /* RW 1 = 5V CF_VCC 0 = 3 V CF_VCC */ -#define PCM990_CF_REG4_3B 0x0004 /* RW 3.0V Backup from VCC (5_3V=0) */ -#define PCM990_CF_REG4_PWG 0x0008 /* R CF-Power is on */ - -#define PCM990_CF_PLD_REG5 0x100A /* OFFSET CF REGISTER 5 */ -#define PCM990_CF_REG5_BVD1 0x0001 /* R CF /BVD1 */ -#define PCM990_CF_REG5_BVD2 0x0002 /* R CF /BVD2 */ -#define PCM990_CF_REG5_VS1 0x0004 /* R CF /VS1 */ -#define PCM990_CF_REG5_VS2 0x0008 /* R CF /VS2 */ - -#define PCM990_CF_PLD_REG6 0x100C /* OFFSET CF REGISTER 6 */ -#define PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */ -#define PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */ - -/* - * Wolfson AC97 Touch - */ -#define PCM990_AC97_IRQ_GPIO 10 -#define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO) -#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -/* - * MMC phyCORE - */ -#define PCM990_MMC0_IRQ_GPIO 9 -#define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO) -#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING - -/* - * USB phyCore - */ -#define PCM990_USB_OVERCURRENT (88 | GPIO_ALT_FN_1_IN) -#define PCM990_USB_PWR_EN (89 | GPIO_ALT_FN_2_OUT) diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index f2237f471750..c63e854921ea 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -51,8 +51,6 @@ int pxa_pm_enter(suspend_state_t state) /* if invalid, display message and wait for a hardware reset */ if (checksum != sleep_save_checksum) { - lubbock_set_hexled(0xbadbadc5); - while (1) pxa_cpu_pm_fns->enter(state); } diff --git a/arch/arm/mach-pxa/pm.h b/arch/arm/mach-pxa/pm.h index 00ea3529e30e..a16fa140883c 100644 --- a/arch/arm/mach-pxa/pm.h +++ b/arch/arm/mach-pxa/pm.h @@ -27,13 +27,3 @@ extern void pxa_pm_finish(void); extern const char pm_enter_standby_start[], pm_enter_standby_end[]; extern int pxa3xx_finish_suspend(unsigned long); - -/* NOTE: this is for PM debugging on Lubbock, it's really a big - * ugly, but let's keep the crap minimum here, instead of direct - * accessing the LUBBOCK CPLD registers in arch/arm/mach-pxa/pm.c - */ -#ifdef CONFIG_ARCH_LUBBOCK -extern void lubbock_set_hexled(uint32_t value); -#else -#define lubbock_set_hexled(x) -#endif diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c deleted file mode 100644 index 7772a39430ed..000000000000 --- a/arch/arm/mach-pxa/poodle.c +++ /dev/null @@ -1,484 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/poodle.c - * - * Support for the SHARP Poodle Board. - * - * Based on: - * linux/arch/arm/mach-pxa/lubbock.c Author: Nicolas Pitre - * - * Change Log - * 12-Dec-2002 Sharp Corporation for Poodle - * John Lenz <lenz@cs.wisc.edu> updates to 2.6 - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/export.h> -#include <linux/platform_device.h> -#include <linux/fb.h> -#include <linux/pm.h> -#include <linux/delay.h> -#include <linux/mtd/physmap.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/regulator/machine.h> -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/mtd/sharpsl.h> -#include <linux/memblock.h> - -#include <asm/mach-types.h> -#include <asm/irq.h> -#include <asm/setup.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "pxa25x.h" -#include "udc.h" -#include "poodle.h" - -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/asoc-poodle.h> - -#include <asm/hardware/scoop.h> -#include <asm/hardware/locomo.h> -#include <asm/mach/sharpsl_param.h> - -#include "generic.h" -#include "devices.h" - -static unsigned long poodle_pin_config[] __initdata = { - /* I/O */ - GPIO79_nCS_3, - GPIO80_nCS_4, - GPIO18_RDY, - - /* Clock */ - GPIO12_32KHz, - - /* SSP1 */ - GPIO23_SSP1_SCLK, - GPIO25_SSP1_TXD, - GPIO26_SSP1_RXD, - GPIO24_GPIO, /* POODLE_GPIO_TP_CS - SFRM as chip select */ - - /* I2S */ - GPIO28_I2S_BITCLK_OUT, - GPIO29_I2S_SDATA_IN, - GPIO30_I2S_SDATA_OUT, - GPIO31_I2S_SYNC, - GPIO32_I2S_SYSCLK, - - /* Infra-Red */ - GPIO47_FICP_TXD, - GPIO46_FICP_RXD, - - /* FFUART */ - GPIO40_FFUART_DTR, - GPIO41_FFUART_RTS, - GPIO39_FFUART_TXD, - GPIO37_FFUART_DSR, - GPIO34_FFUART_RXD, - GPIO35_FFUART_CTS, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* PC Card */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* MMC */ - GPIO6_MMC_CLK, - GPIO8_MMC_CS0, - - /* GPIO */ - GPIO9_GPIO, /* POODLE_GPIO_nSD_DETECT */ - GPIO7_GPIO, /* POODLE_GPIO_nSD_WP */ - GPIO3_GPIO, /* POODLE_GPIO_SD_PWR */ - GPIO33_GPIO, /* POODLE_GPIO_SD_PWR1 */ - - GPIO20_GPIO, /* POODLE_GPIO_USB_PULLUP */ - GPIO22_GPIO, /* POODLE_GPIO_IR_ON */ -}; - -static struct resource poodle_scoop_resources[] = { - [0] = { - .start = 0x10800000, - .end = 0x10800fff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct scoop_config poodle_scoop_setup = { - .io_dir = POODLE_SCOOP_IO_DIR, - .io_out = POODLE_SCOOP_IO_OUT, - .gpio_base = POODLE_SCOOP_GPIO_BASE, -}; - -struct platform_device poodle_scoop_device = { - .name = "sharp-scoop", - .id = -1, - .dev = { - .platform_data = &poodle_scoop_setup, - }, - .num_resources = ARRAY_SIZE(poodle_scoop_resources), - .resource = poodle_scoop_resources, -}; - -static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = { -{ - .dev = &poodle_scoop_device.dev, - .irq = POODLE_IRQ_GPIO_CF_IRQ, - .cd_irq = POODLE_IRQ_GPIO_CF_CD, - .cd_irq_str = "PCMCIA0 CD", -}, -}; - -static struct scoop_pcmcia_config poodle_pcmcia_config = { - .devs = &poodle_pcmcia_scoop[0], - .num_devs = 1, -}; - -EXPORT_SYMBOL(poodle_scoop_device); - -/* LoCoMo device */ -static struct resource locomo_resources[] = { - [0] = { - .start = 0x10000000, - .end = 0x10001fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(10), - .end = PXA_GPIO_TO_IRQ(10), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct locomo_platform_data locomo_info = { - .irq_base = IRQ_BOARD_START, -}; - -static struct platform_device poodle_locomo_device = { - .name = "locomo", - .id = 0, - .num_resources = ARRAY_SIZE(locomo_resources), - .resource = locomo_resources, - .dev = { - .platform_data = &locomo_info, - }, -}; - -static struct poodle_audio_platform_data poodle_audio_pdata = { - .locomo_dev = &poodle_locomo_device.dev, - - .gpio_amp_on = POODLE_LOCOMO_GPIO_AMP_ON, - .gpio_mute_l = POODLE_LOCOMO_GPIO_MUTE_L, - .gpio_mute_r = POODLE_LOCOMO_GPIO_MUTE_R, - .gpio_232vcc_on = POODLE_LOCOMO_GPIO_232VCC_ON, - .gpio_jk_b = POODLE_LOCOMO_GPIO_JK_B, -}; - -static struct platform_device poodle_audio_device = { - .name = "poodle-audio", - .id = -1, - .dev.platform_data = &poodle_audio_pdata, -}; - -#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) -static struct pxa2xx_spi_controller poodle_spi_info = { - .num_chipselect = 1, -}; - -static struct gpiod_lookup_table poodle_spi_gpio_table = { - .dev_id = "pxa2xx-spi.1", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", POODLE_GPIO_TP_CS, "cs", 0, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct ads7846_platform_data poodle_ads7846_info = { - .model = 7846, - .vref_delay_usecs = 100, - .x_plate_ohms = 419, - .y_plate_ohms = 486, - .gpio_pendown = POODLE_GPIO_TP_INT, -}; - -static struct spi_board_info poodle_spi_devices[] = { - { - .modalias = "ads7846", - .max_speed_hz = 10000, - .bus_num = 1, - .platform_data = &poodle_ads7846_info, - .irq = PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT), - }, -}; - -static void __init poodle_init_spi(void) -{ - gpiod_add_lookup_table(&poodle_spi_gpio_table); - pxa2xx_set_spi_info(1, &poodle_spi_info); - spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices)); -} -#else -static inline void poodle_init_spi(void) {} -#endif - -/* - * MMC/SD Device - * - * The card detect interrupt isn't debounced so we delay it by 250ms - * to give the card a chance to fully insert/eject. - */ -static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int, void *data) -{ - int err; - - err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR"); - if (err) - goto err_free_2; - - err = gpio_request(POODLE_GPIO_SD_PWR1, "SD_PWR1"); - if (err) - goto err_free_3; - - gpio_direction_output(POODLE_GPIO_SD_PWR, 0); - gpio_direction_output(POODLE_GPIO_SD_PWR1, 0); - - return 0; - -err_free_3: - gpio_free(POODLE_GPIO_SD_PWR); -err_free_2: - return err; -} - -static int poodle_mci_setpower(struct device *dev, unsigned int vdd) -{ - struct pxamci_platform_data* p_d = dev->platform_data; - - if ((1 << vdd) & p_d->ocr_mask) { - gpio_set_value(POODLE_GPIO_SD_PWR, 1); - mdelay(2); - gpio_set_value(POODLE_GPIO_SD_PWR1, 1); - } else { - gpio_set_value(POODLE_GPIO_SD_PWR1, 0); - gpio_set_value(POODLE_GPIO_SD_PWR, 0); - } - - return 0; -} - -static void poodle_mci_exit(struct device *dev, void *data) -{ - gpio_free(POODLE_GPIO_SD_PWR1); - gpio_free(POODLE_GPIO_SD_PWR); -} - -static struct pxamci_platform_data poodle_mci_platform_data = { - .detect_delay_ms = 250, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .init = poodle_mci_init, - .setpower = poodle_mci_setpower, - .exit = poodle_mci_exit, -}; - -static struct gpiod_lookup_table poodle_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", POODLE_GPIO_nSD_DETECT, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", POODLE_GPIO_nSD_WP, - "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -/* - * Irda - */ -static struct pxaficp_platform_data poodle_ficp_platform_data = { - .gpio_pwdown = POODLE_GPIO_IR_ON, - .transceiver_cap = IR_SIRMODE | IR_OFF, -}; - - -/* - * USB Device Controller - */ -static struct pxa2xx_udc_mach_info udc_info __initdata = { - /* no connect GPIO; poodle can't tell connection status */ - .gpio_pullup = POODLE_GPIO_USB_PULLUP, -}; - - -/* PXAFB device */ -static struct pxafb_mode_info poodle_fb_mode = { - .pixclock = 144700, - .xres = 320, - .yres = 240, - .bpp = 16, - .hsync_len = 7, - .left_margin = 11, - .right_margin = 30, - .vsync_len = 2, - .upper_margin = 2, - .lower_margin = 0, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info poodle_fb_info = { - .modes = &poodle_fb_mode, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP, -}; - -static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; - -static struct nand_bbt_descr sharpsl_bbt = { - .options = 0, - .offs = 4, - .len = 2, - .pattern = scan_ff_pattern -}; - -static const char * const probes[] = { - "cmdlinepart", - "ofpart", - "sharpslpart", - NULL, -}; - -static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = { - .badblock_pattern = &sharpsl_bbt, - .part_parsers = probes, -}; - -static struct resource sharpsl_nand_resources[] = { - { - .start = 0x0C000000, - .end = 0x0C000FFF, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device sharpsl_nand_device = { - .name = "sharpsl-nand", - .id = -1, - .resource = sharpsl_nand_resources, - .num_resources = ARRAY_SIZE(sharpsl_nand_resources), - .dev.platform_data = &sharpsl_nand_platform_data, -}; - -static struct mtd_partition sharpsl_rom_parts[] = { - { - .name ="Boot PROM Filesystem", - .offset = 0x00120000, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data sharpsl_rom_data = { - .width = 2, - .nr_parts = ARRAY_SIZE(sharpsl_rom_parts), - .parts = sharpsl_rom_parts, -}; - -static struct resource sharpsl_rom_resources[] = { - { - .start = 0x00000000, - .end = 0x007fffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device sharpsl_rom_device = { - .name = "physmap-flash", - .id = -1, - .resource = sharpsl_rom_resources, - .num_resources = ARRAY_SIZE(sharpsl_rom_resources), - .dev.platform_data = &sharpsl_rom_data, -}; - -static struct platform_device *devices[] __initdata = { - &poodle_locomo_device, - &poodle_scoop_device, - &poodle_audio_device, - &sharpsl_nand_device, - &sharpsl_rom_device, -}; - -static struct i2c_board_info __initdata poodle_i2c_devices[] = { - { I2C_BOARD_INFO("wm8731", 0x1b) }, -}; - -static void poodle_poweroff(void) -{ - pxa_restart(REBOOT_HARD, NULL); -} - -static void __init poodle_init(void) -{ - int ret = 0; - - pm_power_off = poodle_poweroff; - - PCFR |= PCFR_OPDE; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - platform_scoop_config = &poodle_pcmcia_config; - - ret = platform_add_devices(devices, ARRAY_SIZE(devices)); - if (ret) - pr_warn("poodle: Unable to register LoCoMo device\n"); - - pxa_set_fb_info(&poodle_locomo_device.dev, &poodle_fb_info); - pxa_set_udc_info(&udc_info); - gpiod_add_lookup_table(&poodle_mci_gpio_table); - pxa_set_mci_info(&poodle_mci_platform_data); - pxa_set_ficp_info(&poodle_ficp_platform_data); - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(poodle_i2c_devices)); - poodle_init_spi(); - regulator_has_full_constraints(); -} - -static void __init fixup_poodle(struct tag *tags, char **cmdline) -{ - sharpsl_save_param(); - memblock_add(0xa0000000, SZ_32M); -} - -MACHINE_START(POODLE, "SHARP Poodle") - .fixup = fixup_poodle, - .map_io = pxa25x_map_io, - .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */ - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = poodle_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/poodle.h b/arch/arm/mach-pxa/poodle.h deleted file mode 100644 index 00798b44f204..000000000000 --- a/arch/arm/mach-pxa/poodle.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/poodle.h - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Based on: - * arch/arm/mach-sa1100/include/mach/collie.h - * - * ChangeLog: - * 04-06-2001 Lineo Japan, Inc. - * 04-16-2001 SHARP Corporation - * Update to 2.6 John Lenz - */ -#ifndef __ASM_ARCH_POODLE_H -#define __ASM_ARCH_POODLE_H 1 - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/* - * GPIOs - */ -/* PXA GPIOs */ -#define POODLE_GPIO_ON_KEY (0) -#define POODLE_GPIO_AC_IN (1) -#define POODLE_GPIO_CO 16 -#define POODLE_GPIO_TP_INT (5) -#define POODLE_GPIO_TP_CS (24) -#define POODLE_GPIO_WAKEUP (11) /* change battery */ -#define POODLE_GPIO_GA_INT (10) -#define POODLE_GPIO_IR_ON (22) -#define POODLE_GPIO_HP_IN (4) -#define POODLE_GPIO_CF_IRQ (17) -#define POODLE_GPIO_CF_CD (14) -#define POODLE_GPIO_CF_STSCHG (14) -#define POODLE_GPIO_SD_PWR (33) -#define POODLE_GPIO_SD_PWR1 (3) -#define POODLE_GPIO_nSD_CLK (6) -#define POODLE_GPIO_nSD_WP (7) -#define POODLE_GPIO_nSD_INT (8) -#define POODLE_GPIO_nSD_DETECT (9) -#define POODLE_GPIO_MAIN_BAT_LOW (13) -#define POODLE_GPIO_BAT_COVER (13) -#define POODLE_GPIO_USB_PULLUP (20) -#define POODLE_GPIO_ADC_TEMP_ON (21) -#define POODLE_GPIO_BYPASS_ON (36) -#define POODLE_GPIO_CHRG_ON (38) -#define POODLE_GPIO_CHRG_FULL (16) -#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ - -/* PXA GPIOs */ -#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0) -#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1) -#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4) -#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16) -#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5) -#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11) -#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10) -#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17) -#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14) -#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8) -#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9) -#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13) - -/* SCOOP GPIOs */ -#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 -#define POODLE_SCOOP_CP401 SCOOP_GPCR_PA13 -#define POODLE_SCOOP_VPEN SCOOP_GPCR_PA18 -#define POODLE_SCOOP_L_PCLK SCOOP_GPCR_PA20 -#define POODLE_SCOOP_L_LCLK SCOOP_GPCR_PA21 -#define POODLE_SCOOP_HS_OUT SCOOP_GPCR_PA22 - -#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) -#define POODLE_SCOOP_IO_OUT ( 0 ) - -#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) -#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) -#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) -#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) -#define POODLE_GPIO_L_PCLK (POODLE_SCOOP_GPIO_BASE + 9) -#define POODLE_GPIO_L_LCLK (POODLE_SCOOP_GPIO_BASE + 10) -#define POODLE_GPIO_HS_OUT (POODLE_SCOOP_GPIO_BASE + 11) - -#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8) -#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10) -#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11) -#define POODLE_LOCOMO_GPIO_232VCC_ON LOCOMO_GPIO(12) -#define POODLE_LOCOMO_GPIO_JK_B LOCOMO_GPIO(13) - -#define POODLE_NR_IRQS (IRQ_BOARD_START + 4) /* 4 for LoCoMo */ - -#endif /* __ASM_ARCH_POODLE_H */ diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 6b34d7c169ea..1b83be181bab 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -145,13 +145,6 @@ void __init pxa25x_init_irq(void) pxa_init_irq(32, pxa25x_set_wake); } -#ifdef CONFIG_CPU_PXA26x -void __init pxa26x_init_irq(void) -{ - pxa_init_irq(32, pxa25x_set_wake); -} -#endif - static int __init __init pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent) { diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index eea507fd5095..4135ba2877c4 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -85,18 +85,6 @@ EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset); */ static unsigned int pwrmode = PWRMODE_SLEEP; -int pxa27x_set_pwrmode(unsigned int mode) -{ - switch (mode) { - case PWRMODE_SLEEP: - case PWRMODE_DEEPSLEEP: - pwrmode = mode; - return 0; - } - - return -EINVAL; -} - /* * List of global PXA peripheral registers to preserve. * More ones like CP and general purpose register values are preserved @@ -109,7 +97,7 @@ enum { SLEEP_SAVE_COUNT }; -void pxa27x_cpu_pm_save(unsigned long *sleep_save) +static void pxa27x_cpu_pm_save(unsigned long *sleep_save) { sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR); SAVE(PCFR); @@ -117,7 +105,7 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save) SAVE(PSTR); } -void pxa27x_cpu_pm_restore(unsigned long *sleep_save) +static void pxa27x_cpu_pm_restore(unsigned long *sleep_save) { __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR); RESTORE(PCFR); @@ -127,7 +115,7 @@ void pxa27x_cpu_pm_restore(unsigned long *sleep_save) RESTORE(PSTR); } -void pxa27x_cpu_pm_enter(suspend_state_t state) +static void pxa27x_cpu_pm_enter(suspend_state_t state) { extern void pxa_cpu_standby(void); #ifndef CONFIG_IWMMXT diff --git a/arch/arm/mach-pxa/pxa27x.h b/arch/arm/mach-pxa/pxa27x.h index ede96f3f7214..c9d9948ae7d1 100644 --- a/arch/arm/mach-pxa/pxa27x.h +++ b/arch/arm/mach-pxa/pxa27x.h @@ -20,7 +20,4 @@ #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ -extern int pxa27x_set_pwrmode(unsigned int mode); -extern void pxa27x_cpu_pm_enter(suspend_state_t state); - #endif /* __MACH_PXA27x_H */ diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c index 4aafd692c1e8..35c23a5d73a3 100644 --- a/arch/arm/mach-pxa/pxa2xx.c +++ b/arch/arm/mach-pxa/pxa2xx.c @@ -18,7 +18,6 @@ #include "reset.h" #include "smemc.h" #include <linux/soc/pxa/smemc.h> -#include <linux/platform_data/irda-pxaficp.h> void pxa2xx_clear_reset_status(unsigned int mask) { @@ -26,34 +25,6 @@ void pxa2xx_clear_reset_status(unsigned int mask) RCSR = mask; } -static unsigned long pxa2xx_mfp_fir[] = { - GPIO46_FICP_RXD, - GPIO47_FICP_TXD, -}; - -static unsigned long pxa2xx_mfp_sir[] = { - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, -}; - -static unsigned long pxa2xx_mfp_off[] = { - GPIO46_GPIO | MFP_LPM_DRIVE_LOW, - GPIO47_GPIO | MFP_LPM_DRIVE_LOW, -}; - -void pxa2xx_transceiver_mode(struct device *dev, int mode) -{ - if (mode & IR_OFF) { - pxa2xx_mfp_config(pxa2xx_mfp_off, ARRAY_SIZE(pxa2xx_mfp_off)); - } else if (mode & IR_SIRMODE) { - pxa2xx_mfp_config(pxa2xx_mfp_sir, ARRAY_SIZE(pxa2xx_mfp_sir)); - } else if (mode & IR_FIRMODE) { - pxa2xx_mfp_config(pxa2xx_mfp_fir, ARRAY_SIZE(pxa2xx_mfp_fir)); - } else - BUG(); -} -EXPORT_SYMBOL_GPL(pxa2xx_transceiver_mode); - #define MDCNFG_DRAC2(mdcnfg) (((mdcnfg) >> 21) & 0x3) #define MDCNFG_DRAC0(mdcnfg) (((mdcnfg) >> 5) & 0x3) diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c deleted file mode 100644 index c29a7f0fa1b0..000000000000 --- a/arch/arm/mach-pxa/pxa3xx-ulpi.c +++ /dev/null @@ -1,385 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/pxa3xx-ulpi.c - * - * code specific to pxa3xx aka Monahans - * - * Copyright (C) 2010 CompuLab Ltd. - * - * 2010-13-07: Igor Grinberg <grinberg@compulab.co.il> - * initial version: pxa310 USB Host mode support - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/clk.h> -#include <linux/usb.h> -#include <linux/usb/otg.h> -#include <linux/soc/pxa/cpu.h> - -#include "regs-u2d.h" -#include <linux/platform_data/usb-pxa3xx-ulpi.h> - -struct pxa3xx_u2d_ulpi { - struct clk *clk; - void __iomem *mmio_base; - - struct usb_phy *otg; - unsigned int ulpi_mode; -}; - -static struct pxa3xx_u2d_ulpi *u2d; - -static inline u32 u2d_readl(u32 reg) -{ - return __raw_readl(u2d->mmio_base + reg); -} - -static inline void u2d_writel(u32 reg, u32 val) -{ - __raw_writel(val, u2d->mmio_base + reg); -} - -#if defined(CONFIG_PXA310_ULPI) -enum u2d_ulpi_phy_mode { - SYNCH = 0, - CARKIT = (1 << 0), - SER_3PIN = (1 << 1), - SER_6PIN = (1 << 2), - LOWPOWER = (1 << 3), -}; - -static inline enum u2d_ulpi_phy_mode pxa310_ulpi_get_phymode(void) -{ - return (u2d_readl(U2DOTGUSR) >> 28) & 0xF; -} - -static int pxa310_ulpi_poll(void) -{ - int timeout = 50000; - - while (timeout--) { - if (!(u2d_readl(U2DOTGUCR) & U2DOTGUCR_RUN)) - return 0; - - cpu_relax(); - } - - pr_warn("%s: ULPI access timed out!\n", __func__); - - return -ETIMEDOUT; -} - -static int pxa310_ulpi_read(struct usb_phy *otg, u32 reg) -{ - int err; - - if (pxa310_ulpi_get_phymode() != SYNCH) { - pr_warn("%s: PHY is not in SYNCH mode!\n", __func__); - return -EBUSY; - } - - u2d_writel(U2DOTGUCR, U2DOTGUCR_RUN | U2DOTGUCR_RNW | (reg << 16)); - msleep(5); - - err = pxa310_ulpi_poll(); - if (err) - return err; - - return u2d_readl(U2DOTGUCR) & U2DOTGUCR_RDATA; -} - -static int pxa310_ulpi_write(struct usb_phy *otg, u32 val, u32 reg) -{ - if (pxa310_ulpi_get_phymode() != SYNCH) { - pr_warn("%s: PHY is not in SYNCH mode!\n", __func__); - return -EBUSY; - } - - u2d_writel(U2DOTGUCR, U2DOTGUCR_RUN | (reg << 16) | (val << 8)); - msleep(5); - - return pxa310_ulpi_poll(); -} - -struct usb_phy_io_ops pxa310_ulpi_access_ops = { - .read = pxa310_ulpi_read, - .write = pxa310_ulpi_write, -}; - -static void pxa310_otg_transceiver_rtsm(void) -{ - u32 u2dotgcr; - - /* put PHY to sync mode */ - u2dotgcr = u2d_readl(U2DOTGCR); - u2dotgcr |= U2DOTGCR_RTSM | U2DOTGCR_UTMID; - u2d_writel(U2DOTGCR, u2dotgcr); - msleep(10); - - /* setup OTG sync mode */ - u2dotgcr = u2d_readl(U2DOTGCR); - u2dotgcr |= U2DOTGCR_ULAF; - u2dotgcr &= ~(U2DOTGCR_SMAF | U2DOTGCR_CKAF); - u2d_writel(U2DOTGCR, u2dotgcr); -} - -static int pxa310_start_otg_host_transcvr(struct usb_bus *host) -{ - int err; - - pxa310_otg_transceiver_rtsm(); - - err = usb_phy_init(u2d->otg); - if (err) { - pr_err("OTG transceiver init failed"); - return err; - } - - err = otg_set_vbus(u2d->otg->otg, 1); - if (err) { - pr_err("OTG transceiver VBUS set failed"); - return err; - } - - err = otg_set_host(u2d->otg->otg, host); - if (err) - pr_err("OTG transceiver Host mode set failed"); - - return err; -} - -static int pxa310_start_otg_hc(struct usb_bus *host) -{ - u32 u2dotgcr; - int err; - - /* disable USB device controller */ - u2d_writel(U2DCR, u2d_readl(U2DCR) & ~U2DCR_UDE); - u2d_writel(U2DOTGCR, u2d_readl(U2DOTGCR) | U2DOTGCR_UTMID); - u2d_writel(U2DOTGICR, u2d_readl(U2DOTGICR) & ~0x37F7F); - - err = pxa310_start_otg_host_transcvr(host); - if (err) - return err; - - /* set xceiver mode */ - if (u2d->ulpi_mode & ULPI_IC_6PIN_SERIAL) - u2d_writel(U2DP3CR, u2d_readl(U2DP3CR) & ~U2DP3CR_P2SS); - else if (u2d->ulpi_mode & ULPI_IC_3PIN_SERIAL) - u2d_writel(U2DP3CR, u2d_readl(U2DP3CR) | U2DP3CR_P2SS); - - /* start OTG host controller */ - u2dotgcr = u2d_readl(U2DOTGCR) | U2DOTGCR_SMAF; - u2d_writel(U2DOTGCR, u2dotgcr & ~(U2DOTGCR_ULAF | U2DOTGCR_CKAF)); - - return 0; -} - -static void pxa310_stop_otg_hc(void) -{ - pxa310_otg_transceiver_rtsm(); - - otg_set_host(u2d->otg->otg, NULL); - otg_set_vbus(u2d->otg->otg, 0); - usb_phy_shutdown(u2d->otg); -} - -static void pxa310_u2d_setup_otg_hc(void) -{ - u32 u2dotgcr; - - u2dotgcr = u2d_readl(U2DOTGCR); - u2dotgcr |= U2DOTGCR_ULAF | U2DOTGCR_UTMID; - u2dotgcr &= ~(U2DOTGCR_SMAF | U2DOTGCR_CKAF); - u2d_writel(U2DOTGCR, u2dotgcr); - msleep(5); - u2d_writel(U2DOTGCR, u2dotgcr | U2DOTGCR_ULE); - msleep(5); - u2d_writel(U2DOTGICR, u2d_readl(U2DOTGICR) & ~0x37F7F); -} - -static int pxa310_otg_init(struct pxa3xx_u2d_platform_data *pdata) -{ - unsigned int ulpi_mode = ULPI_OTG_DRVVBUS; - - if (pdata) { - if (pdata->ulpi_mode & ULPI_SER_6PIN) - ulpi_mode |= ULPI_IC_6PIN_SERIAL; - else if (pdata->ulpi_mode & ULPI_SER_3PIN) - ulpi_mode |= ULPI_IC_3PIN_SERIAL; - } - - u2d->ulpi_mode = ulpi_mode; - - u2d->otg = otg_ulpi_create(&pxa310_ulpi_access_ops, ulpi_mode); - if (!u2d->otg) - return -ENOMEM; - - u2d->otg->io_priv = u2d->mmio_base; - - return 0; -} - -static void pxa310_otg_exit(void) -{ - kfree(u2d->otg); -} -#else -static inline void pxa310_u2d_setup_otg_hc(void) {} -static inline int pxa310_start_otg_hc(struct usb_bus *host) -{ - return 0; -} -static inline void pxa310_stop_otg_hc(void) {} -static inline int pxa310_otg_init(struct pxa3xx_u2d_platform_data *pdata) -{ - return 0; -} -static inline void pxa310_otg_exit(void) {} -#endif /* CONFIG_PXA310_ULPI */ - -int pxa3xx_u2d_start_hc(struct usb_bus *host) -{ - int err = 0; - - /* In case the PXA3xx ULPI isn't used, do nothing. */ - if (!u2d) - return 0; - - clk_prepare_enable(u2d->clk); - - if (cpu_is_pxa310()) { - pxa310_u2d_setup_otg_hc(); - err = pxa310_start_otg_hc(host); - } - - return err; -} -EXPORT_SYMBOL_GPL(pxa3xx_u2d_start_hc); - -void pxa3xx_u2d_stop_hc(struct usb_bus *host) -{ - /* In case the PXA3xx ULPI isn't used, do nothing. */ - if (!u2d) - return; - - if (cpu_is_pxa310()) - pxa310_stop_otg_hc(); - - clk_disable_unprepare(u2d->clk); -} -EXPORT_SYMBOL_GPL(pxa3xx_u2d_stop_hc); - -static int pxa3xx_u2d_probe(struct platform_device *pdev) -{ - struct pxa3xx_u2d_platform_data *pdata = pdev->dev.platform_data; - struct resource *r; - int err; - - u2d = kzalloc(sizeof(*u2d), GFP_KERNEL); - if (!u2d) - return -ENOMEM; - - u2d->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(u2d->clk)) { - dev_err(&pdev->dev, "failed to get u2d clock\n"); - err = PTR_ERR(u2d->clk); - goto err_free_mem; - } - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r) { - dev_err(&pdev->dev, "no IO memory resource defined\n"); - err = -ENODEV; - goto err_put_clk; - } - - r = request_mem_region(r->start, resource_size(r), pdev->name); - if (!r) { - dev_err(&pdev->dev, "failed to request memory resource\n"); - err = -EBUSY; - goto err_put_clk; - } - - u2d->mmio_base = ioremap(r->start, resource_size(r)); - if (!u2d->mmio_base) { - dev_err(&pdev->dev, "ioremap() failed\n"); - err = -ENODEV; - goto err_free_res; - } - - if (pdata->init) { - err = pdata->init(&pdev->dev); - if (err) - goto err_free_io; - } - - /* Only PXA310 U2D has OTG functionality */ - if (cpu_is_pxa310()) { - err = pxa310_otg_init(pdata); - if (err) - goto err_free_plat; - } - - platform_set_drvdata(pdev, u2d); - - return 0; - -err_free_plat: - if (pdata->exit) - pdata->exit(&pdev->dev); -err_free_io: - iounmap(u2d->mmio_base); -err_free_res: - release_mem_region(r->start, resource_size(r)); -err_put_clk: - clk_put(u2d->clk); -err_free_mem: - kfree(u2d); - return err; -} - -static int pxa3xx_u2d_remove(struct platform_device *pdev) -{ - struct pxa3xx_u2d_platform_data *pdata = pdev->dev.platform_data; - struct resource *r; - - if (cpu_is_pxa310()) { - pxa310_stop_otg_hc(); - pxa310_otg_exit(); - } - - if (pdata->exit) - pdata->exit(&pdev->dev); - - platform_set_drvdata(pdev, NULL); - iounmap(u2d->mmio_base); - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(r->start, resource_size(r)); - - clk_put(u2d->clk); - - kfree(u2d); - - return 0; -} - -static struct platform_driver pxa3xx_u2d_ulpi_driver = { - .driver = { - .name = "pxa3xx-u2d", - }, - .probe = pxa3xx_u2d_probe, - .remove = pxa3xx_u2d_remove, -}; -module_platform_driver(pxa3xx_u2d_ulpi_driver); - -MODULE_DESCRIPTION("PXA3xx U2D ULPI driver"); -MODULE_AUTHOR("Igor Grinberg"); -MODULE_LICENSE("GPL v2"); diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index b26f00fc75d5..1d1e5713464d 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -363,13 +363,6 @@ static void __init __pxa3xx_init_irq(void) pxa_init_ext_wakeup_irq(pxa3xx_set_wake); } -void __init pxa3xx_init_irq(void) -{ - __pxa3xx_init_irq(); - pxa_init_irq(56, pxa3xx_set_wake); -} - -#ifdef CONFIG_OF static int __init __init pxa3xx_dt_init_irq(struct device_node *node, struct device_node *parent) { @@ -380,7 +373,6 @@ pxa3xx_dt_init_irq(struct device_node *node, struct device_node *parent) return 0; } IRQCHIP_DECLARE(pxa3xx_intc, "marvell,pxa-intc", pxa3xx_dt_init_irq); -#endif /* CONFIG_OF */ static struct map_desc pxa3xx_io_desc[] __initdata = { { /* Mem Ctl */ @@ -403,73 +395,6 @@ void __init pxa3xx_map_io(void) pxa3xx_get_clk_frequency_khz(1); } -/* - * device registration specific to PXA3xx. - */ - -void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info) -{ - pxa_register_device(&pxa3xx_device_i2c_power, info); -} - -static struct pxa_gpio_platform_data pxa3xx_gpio_pdata = { - .irq_base = PXA_GPIO_TO_IRQ(0), -}; - -static struct platform_device *devices[] __initdata = { - &pxa27x_device_udc, - &pxa_device_pmu, - &pxa_device_i2s, - &pxa_device_asoc_ssp1, - &pxa_device_asoc_ssp2, - &pxa_device_asoc_ssp3, - &pxa_device_asoc_ssp4, - &pxa_device_asoc_platform, - &pxa_device_rtc, - &pxa3xx_device_ssp1, - &pxa3xx_device_ssp2, - &pxa3xx_device_ssp3, - &pxa3xx_device_ssp4, - &pxa27x_device_pwm0, - &pxa27x_device_pwm1, -}; - -static const struct dma_slave_map pxa3xx_slave_map[] = { - /* PXA25x, PXA27x and PXA3xx common entries */ - { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) }, - { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) }, - { "pxa2xx-ac97", "pcm_pcm_aux_mono_out", - PDMA_FILTER_PARAM(LOWEST, 10) }, - { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) }, - { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) }, - { "pxa-ssp-dai.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) }, - { "pxa-ssp-dai.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) }, - { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) }, - { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) }, - { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) }, - { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) }, - { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) }, - { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) }, - { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 66) }, - { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 67) }, - - /* PXA3xx specific map */ - { "pxa-ssp-dai.3", "rx", PDMA_FILTER_PARAM(LOWEST, 2) }, - { "pxa-ssp-dai.3", "tx", PDMA_FILTER_PARAM(LOWEST, 3) }, - { "pxa2xx-mci.1", "rx", PDMA_FILTER_PARAM(LOWEST, 93) }, - { "pxa2xx-mci.1", "tx", PDMA_FILTER_PARAM(LOWEST, 94) }, - { "pxa3xx-nand", "data", PDMA_FILTER_PARAM(LOWEST, 97) }, - { "pxa2xx-mci.2", "rx", PDMA_FILTER_PARAM(LOWEST, 100) }, - { "pxa2xx-mci.2", "tx", PDMA_FILTER_PARAM(LOWEST, 101) }, -}; - -static struct mmp_dma_platdata pxa3xx_dma_pdata = { - .dma_channels = 32, - .nb_requestors = 100, - .slave_map = pxa3xx_slave_map, - .slave_map_cnt = ARRAY_SIZE(pxa3xx_slave_map), -}; - static int __init pxa3xx_init(void) { int ret = 0; @@ -501,20 +426,6 @@ static int __init pxa3xx_init(void) register_syscore_ops(&pxa_irq_syscore_ops); register_syscore_ops(&pxa3xx_mfp_syscore_ops); - - if (of_have_populated_dt()) - return 0; - - pxa2xx_set_dmac_info(&pxa3xx_dma_pdata); - ret = platform_add_devices(devices, ARRAY_SIZE(devices)); - if (ret) - return ret; - if (cpu_is_pxa300() || cpu_is_pxa310() || cpu_is_pxa320()) { - platform_device_add_data(&pxa3xx_device_gpio, - &pxa3xx_gpio_pdata, - sizeof(pxa3xx_gpio_pdata)); - ret = platform_device_register(&pxa3xx_device_gpio); - } } return ret; diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c deleted file mode 100644 index b9021a40cbd1..000000000000 --- a/arch/arm/mach-pxa/pxa930.c +++ /dev/null @@ -1,217 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/pxa930.c - * - * Code specific to PXA930 - * - * Copyright (C) 2007-2008 Marvell Internation Ltd. - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/dma-mapping.h> -#include <linux/irq.h> -#include <linux/gpio-pxa.h> -#include <linux/platform_device.h> -#include <linux/soc/pxa/cpu.h> - -#include "pxa930.h" - -#include "devices.h" - -static struct mfp_addr_map pxa930_mfp_addr_map[] __initdata = { - - MFP_ADDR(GPIO0, 0x02e0), - MFP_ADDR(GPIO1, 0x02dc), - MFP_ADDR(GPIO2, 0x02e8), - MFP_ADDR(GPIO3, 0x02d8), - MFP_ADDR(GPIO4, 0x02e4), - MFP_ADDR(GPIO5, 0x02ec), - MFP_ADDR(GPIO6, 0x02f8), - MFP_ADDR(GPIO7, 0x02fc), - MFP_ADDR(GPIO8, 0x0300), - MFP_ADDR(GPIO9, 0x02d4), - MFP_ADDR(GPIO10, 0x02f4), - MFP_ADDR(GPIO11, 0x02f0), - MFP_ADDR(GPIO12, 0x0304), - MFP_ADDR(GPIO13, 0x0310), - MFP_ADDR(GPIO14, 0x0308), - MFP_ADDR(GPIO15, 0x030c), - MFP_ADDR(GPIO16, 0x04e8), - MFP_ADDR(GPIO17, 0x04f4), - MFP_ADDR(GPIO18, 0x04f8), - MFP_ADDR(GPIO19, 0x04fc), - MFP_ADDR(GPIO20, 0x0518), - MFP_ADDR(GPIO21, 0x051c), - MFP_ADDR(GPIO22, 0x04ec), - MFP_ADDR(GPIO23, 0x0500), - MFP_ADDR(GPIO24, 0x04f0), - MFP_ADDR(GPIO25, 0x0504), - MFP_ADDR(GPIO26, 0x0510), - MFP_ADDR(GPIO27, 0x0514), - MFP_ADDR(GPIO28, 0x0520), - MFP_ADDR(GPIO29, 0x0600), - MFP_ADDR(GPIO30, 0x0618), - MFP_ADDR(GPIO31, 0x0610), - MFP_ADDR(GPIO32, 0x060c), - MFP_ADDR(GPIO33, 0x061c), - MFP_ADDR(GPIO34, 0x0620), - MFP_ADDR(GPIO35, 0x0628), - MFP_ADDR(GPIO36, 0x062c), - MFP_ADDR(GPIO37, 0x0630), - MFP_ADDR(GPIO38, 0x0634), - MFP_ADDR(GPIO39, 0x0638), - MFP_ADDR(GPIO40, 0x063c), - MFP_ADDR(GPIO41, 0x0614), - MFP_ADDR(GPIO42, 0x0624), - MFP_ADDR(GPIO43, 0x0608), - MFP_ADDR(GPIO44, 0x0604), - MFP_ADDR(GPIO45, 0x050c), - MFP_ADDR(GPIO46, 0x0508), - MFP_ADDR(GPIO47, 0x02bc), - MFP_ADDR(GPIO48, 0x02b4), - MFP_ADDR(GPIO49, 0x02b8), - MFP_ADDR(GPIO50, 0x02c8), - MFP_ADDR(GPIO51, 0x02c0), - MFP_ADDR(GPIO52, 0x02c4), - MFP_ADDR(GPIO53, 0x02d0), - MFP_ADDR(GPIO54, 0x02cc), - MFP_ADDR(GPIO55, 0x029c), - MFP_ADDR(GPIO56, 0x02a0), - MFP_ADDR(GPIO57, 0x0294), - MFP_ADDR(GPIO58, 0x0298), - MFP_ADDR(GPIO59, 0x02a4), - MFP_ADDR(GPIO60, 0x02a8), - MFP_ADDR(GPIO61, 0x02b0), - MFP_ADDR(GPIO62, 0x02ac), - MFP_ADDR(GPIO63, 0x0640), - MFP_ADDR(GPIO64, 0x065c), - MFP_ADDR(GPIO65, 0x0648), - MFP_ADDR(GPIO66, 0x0644), - MFP_ADDR(GPIO67, 0x0674), - MFP_ADDR(GPIO68, 0x0658), - MFP_ADDR(GPIO69, 0x0654), - MFP_ADDR(GPIO70, 0x0660), - MFP_ADDR(GPIO71, 0x0668), - MFP_ADDR(GPIO72, 0x0664), - MFP_ADDR(GPIO73, 0x0650), - MFP_ADDR(GPIO74, 0x066c), - MFP_ADDR(GPIO75, 0x064c), - MFP_ADDR(GPIO76, 0x0670), - MFP_ADDR(GPIO77, 0x0678), - MFP_ADDR(GPIO78, 0x067c), - MFP_ADDR(GPIO79, 0x0694), - MFP_ADDR(GPIO80, 0x069c), - MFP_ADDR(GPIO81, 0x06a0), - MFP_ADDR(GPIO82, 0x06a4), - MFP_ADDR(GPIO83, 0x0698), - MFP_ADDR(GPIO84, 0x06bc), - MFP_ADDR(GPIO85, 0x06b4), - MFP_ADDR(GPIO86, 0x06b0), - MFP_ADDR(GPIO87, 0x06c0), - MFP_ADDR(GPIO88, 0x06c4), - MFP_ADDR(GPIO89, 0x06ac), - MFP_ADDR(GPIO90, 0x0680), - MFP_ADDR(GPIO91, 0x0684), - MFP_ADDR(GPIO92, 0x0688), - MFP_ADDR(GPIO93, 0x0690), - MFP_ADDR(GPIO94, 0x068c), - MFP_ADDR(GPIO95, 0x06a8), - MFP_ADDR(GPIO96, 0x06b8), - MFP_ADDR(GPIO97, 0x0410), - MFP_ADDR(GPIO98, 0x0418), - MFP_ADDR(GPIO99, 0x041c), - MFP_ADDR(GPIO100, 0x0414), - MFP_ADDR(GPIO101, 0x0408), - MFP_ADDR(GPIO102, 0x0324), - MFP_ADDR(GPIO103, 0x040c), - MFP_ADDR(GPIO104, 0x0400), - MFP_ADDR(GPIO105, 0x0328), - MFP_ADDR(GPIO106, 0x0404), - - MFP_ADDR(nXCVREN, 0x0204), - MFP_ADDR(DF_CLE_nOE, 0x020c), - MFP_ADDR(DF_nADV1_ALE, 0x0218), - MFP_ADDR(DF_SCLK_E, 0x0214), - MFP_ADDR(DF_SCLK_S, 0x0210), - MFP_ADDR(nBE0, 0x021c), - MFP_ADDR(nBE1, 0x0220), - MFP_ADDR(DF_nADV2_ALE, 0x0224), - MFP_ADDR(DF_INT_RnB, 0x0228), - MFP_ADDR(DF_nCS0, 0x022c), - MFP_ADDR(DF_nCS1, 0x0230), - MFP_ADDR(nLUA, 0x0254), - MFP_ADDR(nLLA, 0x0258), - MFP_ADDR(DF_nWE, 0x0234), - MFP_ADDR(DF_nRE_nOE, 0x0238), - MFP_ADDR(DF_ADDR0, 0x024c), - MFP_ADDR(DF_ADDR1, 0x0250), - MFP_ADDR(DF_ADDR2, 0x025c), - MFP_ADDR(DF_ADDR3, 0x0260), - MFP_ADDR(DF_IO0, 0x023c), - MFP_ADDR(DF_IO1, 0x0240), - MFP_ADDR(DF_IO2, 0x0244), - MFP_ADDR(DF_IO3, 0x0248), - MFP_ADDR(DF_IO4, 0x0264), - MFP_ADDR(DF_IO5, 0x0268), - MFP_ADDR(DF_IO6, 0x026c), - MFP_ADDR(DF_IO7, 0x0270), - MFP_ADDR(DF_IO8, 0x0274), - MFP_ADDR(DF_IO9, 0x0278), - MFP_ADDR(DF_IO10, 0x027c), - MFP_ADDR(DF_IO11, 0x0280), - MFP_ADDR(DF_IO12, 0x0284), - MFP_ADDR(DF_IO13, 0x0288), - MFP_ADDR(DF_IO14, 0x028c), - MFP_ADDR(DF_IO15, 0x0290), - - MFP_ADDR(GSIM_UIO, 0x0314), - MFP_ADDR(GSIM_UCLK, 0x0318), - MFP_ADDR(GSIM_UDET, 0x031c), - MFP_ADDR(GSIM_nURST, 0x0320), - - MFP_ADDR(PMIC_INT, 0x06c8), - - MFP_ADDR(RDY, 0x0200), - - MFP_ADDR_END, -}; - -static struct mfp_addr_map pxa935_mfp_addr_map[] __initdata = { - MFP_ADDR(GPIO159, 0x0524), - MFP_ADDR(GPIO163, 0x0534), - MFP_ADDR(GPIO167, 0x0544), - MFP_ADDR(GPIO168, 0x0548), - MFP_ADDR(GPIO169, 0x054c), - MFP_ADDR(GPIO170, 0x0550), - MFP_ADDR(GPIO171, 0x0554), - MFP_ADDR(GPIO172, 0x0558), - MFP_ADDR(GPIO173, 0x055c), - - MFP_ADDR_END, -}; - -static struct pxa_gpio_platform_data pxa93x_gpio_pdata = { - .irq_base = PXA_GPIO_TO_IRQ(0), -}; - -static int __init pxa930_init(void) -{ - int ret = 0; - - if (cpu_is_pxa93x()) { - mfp_init_base(io_p2v(MFPR_BASE)); - mfp_init_addr(pxa930_mfp_addr_map); - platform_device_add_data(&pxa93x_device_gpio, - &pxa93x_gpio_pdata, - sizeof(pxa93x_gpio_pdata)); - ret = platform_device_register(&pxa93x_device_gpio); - } - - if (cpu_is_pxa935()) - mfp_init_addr(pxa935_mfp_addr_map); - - return 0; -} - -core_initcall(pxa930_init); diff --git a/arch/arm/mach-pxa/pxa930.h b/arch/arm/mach-pxa/pxa930.h deleted file mode 100644 index bbf25c044641..000000000000 --- a/arch/arm/mach-pxa/pxa930.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __MACH_PXA930_H -#define __MACH_PXA930_H - -#include "pxa3xx.h" -#include "mfp-pxa930.h" - -#endif /* __MACH_PXA930_H */ diff --git a/arch/arm/mach-pxa/pxa_cplds_irqs.c b/arch/arm/mach-pxa/pxa_cplds_irqs.c deleted file mode 100644 index eda5a47d7fbb..000000000000 --- a/arch/arm/mach-pxa/pxa_cplds_irqs.c +++ /dev/null @@ -1,200 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Intel Reference Systems cplds - * - * Copyright (C) 2014 Robert Jarzmik - * - * Cplds motherboard driver, supporting lubbock and mainstone SoC board. - */ - -#include <linux/bitops.h> -#include <linux/gpio.h> -#include <linux/gpio/consumer.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/irqdomain.h> -#include <linux/mfd/core.h> -#include <linux/module.h> -#include <linux/of_platform.h> - -#define FPGA_IRQ_MASK_EN 0x0 -#define FPGA_IRQ_SET_CLR 0x10 - -#define CPLDS_NB_IRQ 32 - -struct cplds { - void __iomem *base; - int irq; - unsigned int irq_mask; - struct gpio_desc *gpio0; - struct irq_domain *irqdomain; -}; - -static irqreturn_t cplds_irq_handler(int in_irq, void *d) -{ - struct cplds *fpga = d; - unsigned long pending; - unsigned int bit; - - do { - pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask; - for_each_set_bit(bit, &pending, CPLDS_NB_IRQ) - generic_handle_domain_irq(fpga->irqdomain, bit); - } while (pending); - - return IRQ_HANDLED; -} - -static void cplds_irq_mask(struct irq_data *d) -{ - struct cplds *fpga = irq_data_get_irq_chip_data(d); - unsigned int cplds_irq = irqd_to_hwirq(d); - unsigned int bit = BIT(cplds_irq); - - fpga->irq_mask &= ~bit; - writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); -} - -static void cplds_irq_unmask(struct irq_data *d) -{ - struct cplds *fpga = irq_data_get_irq_chip_data(d); - unsigned int cplds_irq = irqd_to_hwirq(d); - unsigned int set, bit = BIT(cplds_irq); - - set = readl(fpga->base + FPGA_IRQ_SET_CLR); - writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR); - - fpga->irq_mask |= bit; - writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); -} - -static struct irq_chip cplds_irq_chip = { - .name = "pxa_cplds", - .irq_ack = cplds_irq_mask, - .irq_mask = cplds_irq_mask, - .irq_unmask = cplds_irq_unmask, - .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE, -}; - -static int cplds_irq_domain_map(struct irq_domain *d, unsigned int irq, - irq_hw_number_t hwirq) -{ - struct cplds *fpga = d->host_data; - - irq_set_chip_and_handler(irq, &cplds_irq_chip, handle_level_irq); - irq_set_chip_data(irq, fpga); - - return 0; -} - -static const struct irq_domain_ops cplds_irq_domain_ops = { - .xlate = irq_domain_xlate_twocell, - .map = cplds_irq_domain_map, -}; - -static int cplds_resume(struct platform_device *pdev) -{ - struct cplds *fpga = platform_get_drvdata(pdev); - - writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); - - return 0; -} - -static int cplds_probe(struct platform_device *pdev) -{ - struct resource *res; - struct cplds *fpga; - int ret; - int base_irq; - unsigned long irqflags = 0; - - fpga = devm_kzalloc(&pdev->dev, sizeof(*fpga), GFP_KERNEL); - if (!fpga) - return -ENOMEM; - - fpga->irq = platform_get_irq(pdev, 0); - if (fpga->irq <= 0) - return fpga->irq; - - base_irq = platform_get_irq(pdev, 1); - if (base_irq < 0) { - base_irq = 0; - } else { - ret = devm_irq_alloc_descs(&pdev->dev, base_irq, base_irq, CPLDS_NB_IRQ, 0); - if (ret < 0) - return ret; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - fpga->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(fpga->base)) - return PTR_ERR(fpga->base); - - platform_set_drvdata(pdev, fpga); - - writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); - writel(0, fpga->base + FPGA_IRQ_SET_CLR); - - irqflags = irq_get_trigger_type(fpga->irq); - ret = devm_request_irq(&pdev->dev, fpga->irq, cplds_irq_handler, - irqflags, dev_name(&pdev->dev), fpga); - if (ret == -ENOSYS) - return -EPROBE_DEFER; - - if (ret) { - dev_err(&pdev->dev, "couldn't request main irq%d: %d\n", - fpga->irq, ret); - return ret; - } - - irq_set_irq_wake(fpga->irq, 1); - if (base_irq) - fpga->irqdomain = irq_domain_add_legacy(pdev->dev.of_node, - CPLDS_NB_IRQ, - base_irq, 0, - &cplds_irq_domain_ops, - fpga); - else - fpga->irqdomain = irq_domain_add_linear(pdev->dev.of_node, - CPLDS_NB_IRQ, - &cplds_irq_domain_ops, - fpga); - if (!fpga->irqdomain) - return -ENODEV; - - return 0; -} - -static int cplds_remove(struct platform_device *pdev) -{ - struct cplds *fpga = platform_get_drvdata(pdev); - - irq_set_chip_and_handler(fpga->irq, NULL, NULL); - - return 0; -} - -static const struct of_device_id cplds_id_table[] = { - { .compatible = "intel,lubbock-cplds-irqs", }, - { .compatible = "intel,mainstone-cplds-irqs", }, - { } -}; -MODULE_DEVICE_TABLE(of, cplds_id_table); - -static struct platform_driver cplds_driver = { - .driver = { - .name = "pxa_cplds_irqs", - .of_match_table = of_match_ptr(cplds_id_table), - }, - .probe = cplds_probe, - .remove = cplds_remove, - .resume = cplds_resume, -}; - -module_platform_driver(cplds_driver); - -MODULE_DESCRIPTION("PXA Cplds interrupts driver"); -MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/regs-u2d.h b/arch/arm/mach-pxa/regs-u2d.h deleted file mode 100644 index ab517ba62c9a..000000000000 --- a/arch/arm/mach-pxa/regs-u2d.h +++ /dev/null @@ -1,199 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_ARCH_PXA3xx_U2D_H -#define __ASM_ARCH_PXA3xx_U2D_H - -/* - * USB2 device controller registers and bits definitions - */ -#define U2DCR (0x0000) /* U2D Control Register */ -#define U2DCR_NDC (1 << 31) /* NAK During Config */ -#define U2DCR_HSTC (0x7 << 28) /* High Speed Timeout Calibration */ -#define U2DCR_SPEOREN (1 << 27) /* Short Packet EOR INTR generation Enable */ -#define U2DCR_FSTC (0x7 << 24) /* Full Speed Timeout Calibration */ -#define U2DCR_UCLKOVR (1 << 22) /* UTM Clock Override */ -#define U2DCR_ABP (1 << 21) /* Application Bus Power */ -#define U2DCR_ADD (1 << 20) /* Application Device Disconnect */ -#define U2DCR_CC (1 << 19) /* Configuration Change */ -#define U2DCR_HS (1 << 18) /* High Speed USB Detection */ -#define U2DCR_SMAC (1 << 17) /* Switch Endpoint Memory to Active Configuration */ -#define U2DCR_DWRE (1 << 16) /* Device Remote Wake-up Feature */ -#define U2DCR_ACN (0xf << 12) /* Active U2D Configuration Number */ -#define U2DCR_AIN (0xf << 8) /* Active U2D Interface Number */ -#define U2DCR_AAISN (0xf << 4) /* Active U2D Alternate Interface Setting Number */ -#define U2DCR_EMCE (1 << 3) /* Endpoint Memory Configuration Error */ -#define U2DCR_UDR (1 << 2) /* U2D Resume */ -#define U2DCR_UDA (1 << 1) /* U2D Active */ -#define U2DCR_UDE (1 << 0) /* U2D Enable */ - -#define U2DICR (0x0004) /* U2D Interrupt Control Register */ -#define U2DISR (0x000C) /* U2D Interrupt Status Register */ -#define U2DINT_CC (1 << 31) /* Interrupt - Configuration Change */ -#define U2DINT_SOF (1 << 30) /* Interrupt - SOF */ -#define U2DINT_USOF (1 << 29) /* Interrupt - micro SOF */ -#define U2DINT_RU (1 << 28) /* Interrupt - Resume */ -#define U2DINT_SU (1 << 27) /* Interrupt - Suspend */ -#define U2DINT_RS (1 << 26) /* Interrupt - Reset */ -#define U2DINT_DPE (1 << 25) /* Interrupt - Data Packet Error */ -#define U2DINT_FIFOERR (0x4) /* Interrupt - endpoint FIFO error */ -#define U2DINT_PACKETCMP (0x2) /* Interrupt - endpoint packet complete */ -#define U2DINT_SPACKETCMP (0x1) /* Interrupt - endpoint short packet complete */ - -#define U2DFNR (0x0014) /* U2D Frame Number Register */ - -#define U2DINT(n, intr) (((intr) & 0x07) << (((n) & 0x07) * 3)) -#define U2DICR2 (0x0008) /* U2D Interrupt Control Register 2 */ -#define U2DISR2 (0x0010) /* U2D Interrupt Status Register 2 */ - -#define U2DOTGCR (0x0020) /* U2D OTG Control Register */ -#define U2DOTGCR_OTGEN (1 << 31) /* On-The-Go Enable */ -#define U2DOTGCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation Protocal Port Support */ -#define U2DOTGCR_AHNP (1 << 29) /* A-device Host Negotiation Protocal Support */ -#define U2DOTGCR_BHNP (1 << 28) /* B-device Host Negotiation Protocal Enable */ - -#ifdef CONFIG_CPU_PXA930 -#define U2DOTGCR_LPA (1 << 15) /* ULPI low power mode active */ -#define U2DOTGCR_IESI (1 << 13) /* OTG interrupt Enable */ -#define U2DOTGCR_ISSI (1 << 12) /* OTG interrupt status */ -#endif - -#define U2DOTGCR_CKAF (1 << 5) /* Carkit Mode Alternate Function Select */ -#define U2DOTGCR_UTMID (1 << 4) /* UTMI Interface Disable */ -#define U2DOTGCR_ULAF (1 << 3) /* ULPI Mode Alternate Function Select */ -#define U2DOTGCR_SMAF (1 << 2) /* Serial Mode Alternate Function Select */ -#define U2DOTGCR_RTSM (1 << 1) /* Return to Synchronous Mode (ULPI Mode) */ -#define U2DOTGCR_ULE (1 << 0) /* ULPI Wrapper Enable */ - -#define U2DOTGICR (0x0024) /* U2D OTG Interrupt Control Register */ -#define U2DOTGISR (0x0028) /* U2D OTG Interrupt Status Register */ - -#define U2DOTGINT_SF (1 << 17) /* OTG Set Feature Command Received */ -#define U2DOTGINT_SI (1 << 16) /* OTG Interrupt */ -#define U2DOTGINT_RLS1 (1 << 14) /* RXCMD Linestate[1] Change Interrupt Rise */ -#define U2DOTGINT_RLS0 (1 << 13) /* RXCMD Linestate[0] Change Interrupt Rise */ -#define U2DOTGINT_RID (1 << 12) /* RXCMD OTG ID Change Interrupt Rise */ -#define U2DOTGINT_RSE (1 << 11) /* RXCMD OTG Session End Interrupt Rise */ -#define U2DOTGINT_RSV (1 << 10) /* RXCMD OTG Session Valid Interrupt Rise */ -#define U2DOTGINT_RVV (1 << 9) /* RXCMD OTG Vbus Valid Interrupt Rise */ -#define U2DOTGINT_RCK (1 << 8) /* RXCMD Carkit Interrupt Rise */ -#define U2DOTGINT_FLS1 (1 << 6) /* RXCMD Linestate[1] Change Interrupt Fall */ -#define U2DOTGINT_FLS0 (1 << 5) /* RXCMD Linestate[0] Change Interrupt Fall */ -#define U2DOTGINT_FID (1 << 4) /* RXCMD OTG ID Change Interrupt Fall */ -#define U2DOTGINT_FSE (1 << 3) /* RXCMD OTG Session End Interrupt Fall */ -#define U2DOTGINT_FSV (1 << 2) /* RXCMD OTG Session Valid Interrupt Fall */ -#define U2DOTGINT_FVV (1 << 1) /* RXCMD OTG Vbus Valid Interrupt Fall */ -#define U2DOTGINT_FCK (1 << 0) /* RXCMD Carkit Interrupt Fall */ - -#define U2DOTGUSR (0x002C) /* U2D OTG ULPI Status Register */ -#define U2DOTGUSR_LPA (1 << 31) /* ULPI Low Power Mode Active */ -#define U2DOTGUSR_S6A (1 << 30) /* ULPI Serial Mode (6-pin) Active */ -#define U2DOTGUSR_S3A (1 << 29) /* ULPI Serial Mode (3-pin) Active */ -#define U2DOTGUSR_CKA (1 << 28) /* ULPI Car Kit Mode Active */ -#define U2DOTGUSR_LS1 (1 << 6) /* RXCMD Linestate 1 Status */ -#define U2DOTGUSR_LS0 (1 << 5) /* RXCMD Linestate 0 Status */ -#define U2DOTGUSR_ID (1 << 4) /* OTG IDGnd Status */ -#define U2DOTGUSR_SE (1 << 3) /* OTG Session End Status */ -#define U2DOTGUSR_SV (1 << 2) /* OTG Session Valid Status */ -#define U2DOTGUSR_VV (1 << 1) /* OTG Vbus Valid Status */ -#define U2DOTGUSR_CK (1 << 0) /* Carkit Interrupt Status */ - -#define U2DOTGUCR (0x0030) /* U2D OTG ULPI Control Register */ -#define U2DOTGUCR_RUN (1 << 25) /* RUN */ -#define U2DOTGUCR_RNW (1 << 24) /* Read or Write operation */ -#define U2DOTGUCR_ADDR (0x3f << 16) /* Address of the ULPI PHY register */ -#define U2DOTGUCR_WDATA (0xff << 8) /* The data for a WRITE command */ -#define U2DOTGUCR_RDATA (0xff << 0) /* The data for a READ command */ - -#define U2DP3CR (0x0034) /* U2D Port 3 Control Register */ -#define U2DP3CR_P2SS (0x3 << 8) /* Host Port 2 Serial Mode Select */ -#define U2DP3CR_P3SS (0x7 << 4) /* Host Port 3 Serial Mode Select */ -#define U2DP3CR_VPVMBEN (0x1 << 2) /* Host Port 3 Vp/Vm Block Enable */ -#define U2DP3CR_CFG (0x3 << 0) /* Host Port 3 Configuration */ - -#define U2DCSR0 (0x0100) /* U2D Control/Status Register - Endpoint 0 */ -#define U2DCSR0_IPA (1 << 8) /* IN Packet Adjusted */ -#define U2DCSR0_SA (1 << 7) /* SETUP Active */ -#define U2DCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ -#define U2DCSR0_FST (1 << 5) /* Force Stall */ -#define U2DCSR0_SST (1 << 4) /* Send Stall */ -#define U2DCSR0_DME (1 << 3) /* DMA Enable */ -#define U2DCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ -#define U2DCSR0_IPR (1 << 1) /* IN Packet Ready */ -#define U2DCSR0_OPC (1 << 0) /* OUT Packet Complete */ - -#define U2DCSR(x) (0x0100 + ((x) << 2)) /* U2D Control/Status Register - Endpoint x */ -#define U2DCSR_BF (1 << 10) /* Buffer Full, for OUT eps */ -#define U2DCSR_BE (1 << 10) /* Buffer Empty, for IN eps */ -#define U2DCSR_DPE (1 << 9) /* Data Packet Error, for ISO eps only */ -#define U2DCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ -#define U2DCSR_SP (1 << 7) /* Short Packet Control/Status, for OUT eps only, readonly */ -#define U2DCSR_BNE (1 << 6) /* Buffer Not Empty, for OUT eps */ -#define U2DCSR_BNF (1 << 6) /* Buffer Not Full, for IN eps */ -#define U2DCSR_FST (1 << 5) /* Force STALL, write 1 set */ -#define U2DCSR_SST (1 << 4) /* Sent STALL, write 1 clear */ -#define U2DCSR_DME (1 << 3) /* DMA Enable */ -#define U2DCSR_TRN (1 << 2) /* Tx/Rx NAK, write 1 clear */ -#define U2DCSR_PC (1 << 1) /* Packet Complete, write 1 clear */ -#define U2DCSR_FS (1 << 0) /* FIFO needs Service */ - -#define U2DBCR0 (0x0200) /* U2D Byte Count Register - Endpoint 0 */ -#define U2DBCR(x) (0x0200 + ((x) << 2)) /* U2D Byte Count Register - Endpoint x */ - -#define U2DDR0 (0x0300) /* U2D Data Register - Endpoint 0 */ - -#define U2DEPCR(x) (0x0400 + ((x) << 2)) /* U2D Configuration Register - Endpoint x */ -#define U2DEPCR_EE (1 << 0) /* Endpoint Enable */ -#define U2DEPCR_BS_MASK (0x3FE) /* Buffer Size, BS*8=FIFO size, max 8184B = 8KB */ - -#define U2DSCA (0x0500) /* U2D Setup Command Address */ -#define U2DSCA_VALUE (0x0120) - -#define U2DEN0 (0x0504) /* U2D Endpoint Information Register - Endpoint 0 */ -#define U2DEN(x) (0x0504 + ((x) << 2)) /* U2D Endpoint Information Register - Endpoint x */ - -/* U2DMA registers */ -#define U2DMACSR0 (0x1000) /* U2DMA Control/Status Register - Channel 0 */ -#define U2DMACSR(x) (0x1000 + ((x) << 2)) /* U2DMA Control/Status Register - Channel x */ -#define U2DMACSR_RUN (1 << 31) /* Run Bit (read / write) */ -#define U2DMACSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ -#define U2DMACSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ -#define U2DMACSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ -#define U2DMACSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ -#define U2DMACSR_RASIRQEN (1 << 23) /* Request After Cnannel Stopped Interrupt Enable */ -#define U2DMACSR_MASKRUN (1 << 22) /* Mask Run */ -#define U2DMACSR_SCEMC (3 << 18) /* System Bus Split Completion Error Message Class */ -#define U2DMACSR_SCEMI (0x1f << 13) /* System Bus Split Completion Error Message Index */ -#define U2DMACSR_BUSERRTYPE (7 << 10) /* PX Bus Error Type */ -#define U2DMACSR_EORINTR (1 << 9) /* End Of Receive */ -#define U2DMACSR_REQPEND (1 << 8) /* Request Pending */ -#define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */ -#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */ -#define U2DMACSR_ENDINTR (1 << 2) /* End Interrupt (read / write 1 clear) */ -#define U2DMACSR_STARTINTR (1 << 1) /* Start Interrupt (read / write 1 clear) */ -#define U2DMACSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write 1 clear) */ - -#define U2DMACR (0x1080) /* U2DMA Control Register */ -#define U2DMAINT (0x10F0) /* U2DMA Interrupt Register */ - -#define U2DMABR0 (0x1100) /* U2DMA Branch Register - Channel 0 */ -#define U2DMABR(x) (0x1100 + (x) << 2) /* U2DMA Branch Register - Channel x */ - -#define U2DMADADR0 (0x1200) /* U2DMA Descriptor Address Register - Channel 0 */ -#define U2DMADADR(x) (0x1200 + (x) * 0x10) /* U2DMA Descriptor Address Register - Channel x */ - -#define U2DMADADR_STOP (1U << 0) - -#define U2DMASADR0 (0x1204) /* U2DMA Source Address Register - Channel 0 */ -#define U2DMASADR(x) (0x1204 + (x) * 0x10) /* U2DMA Source Address Register - Channel x */ -#define U2DMATADR0 (0x1208) /* U2DMA Target Address Register - Channel 0 */ -#define U2DMATADR(x) (0x1208 + (x) * 0x10) /* U2DMA Target Address Register - Channel x */ - -#define U2DMACMDR0 (0x120C) /* U2DMA Command Address Register - Channel 0 */ -#define U2DMACMDR(x) (0x120C + (x) * 0x10) /* U2DMA Command Address Register - Channel x */ - -#define U2DMACMDR_XFRDIS (1 << 31) /* Transfer Direction */ -#define U2DMACMDR_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ -#define U2DMACMDR_ENDIRQEN (1 << 21) /* End Interrupt Enable */ -#define U2DMACMDR_PACKCOMP (1 << 13) /* Packet Complete */ -#define U2DMACMDR_LEN (0x07ff) /* length mask (max = 2K - 1) */ - -#endif /* __ASM_ARCH_PXA3xx_U2D_H */ diff --git a/arch/arm/mach-pxa/regs-uart.h b/arch/arm/mach-pxa/regs-uart.h deleted file mode 100644 index 490e9ca16297..000000000000 --- a/arch/arm/mach-pxa/regs-uart.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_ARCH_REGS_UART_H -#define __ASM_ARCH_REGS_UART_H - -#include "pxa-regs.h" - -/* - * UARTs - */ - -/* Full Function UART (FFUART) */ -#define FFUART FFRBR -#define FFRBR __REG(0x40100000) /* Receive Buffer Register (read only) */ -#define FFTHR __REG(0x40100000) /* Transmit Holding Register (write only) */ -#define FFIER __REG(0x40100004) /* Interrupt Enable Register (read/write) */ -#define FFIIR __REG(0x40100008) /* Interrupt ID Register (read only) */ -#define FFFCR __REG(0x40100008) /* FIFO Control Register (write only) */ -#define FFLCR __REG(0x4010000C) /* Line Control Register (read/write) */ -#define FFMCR __REG(0x40100010) /* Modem Control Register (read/write) */ -#define FFLSR __REG(0x40100014) /* Line Status Register (read only) */ -#define FFMSR __REG(0x40100018) /* Modem Status Register (read only) */ -#define FFSPR __REG(0x4010001C) /* Scratch Pad Register (read/write) */ -#define FFISR __REG(0x40100020) /* Infrared Selection Register (read/write) */ -#define FFDLL __REG(0x40100000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define FFDLH __REG(0x40100004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -/* Bluetooth UART (BTUART) */ -#define BTUART BTRBR -#define BTRBR __REG(0x40200000) /* Receive Buffer Register (read only) */ -#define BTTHR __REG(0x40200000) /* Transmit Holding Register (write only) */ -#define BTIER __REG(0x40200004) /* Interrupt Enable Register (read/write) */ -#define BTIIR __REG(0x40200008) /* Interrupt ID Register (read only) */ -#define BTFCR __REG(0x40200008) /* FIFO Control Register (write only) */ -#define BTLCR __REG(0x4020000C) /* Line Control Register (read/write) */ -#define BTMCR __REG(0x40200010) /* Modem Control Register (read/write) */ -#define BTLSR __REG(0x40200014) /* Line Status Register (read only) */ -#define BTMSR __REG(0x40200018) /* Modem Status Register (read only) */ -#define BTSPR __REG(0x4020001C) /* Scratch Pad Register (read/write) */ -#define BTISR __REG(0x40200020) /* Infrared Selection Register (read/write) */ -#define BTDLL __REG(0x40200000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define BTDLH __REG(0x40200004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -/* Standard UART (STUART) */ -#define STUART STRBR -#define STRBR __REG(0x40700000) /* Receive Buffer Register (read only) */ -#define STTHR __REG(0x40700000) /* Transmit Holding Register (write only) */ -#define STIER __REG(0x40700004) /* Interrupt Enable Register (read/write) */ -#define STIIR __REG(0x40700008) /* Interrupt ID Register (read only) */ -#define STFCR __REG(0x40700008) /* FIFO Control Register (write only) */ -#define STLCR __REG(0x4070000C) /* Line Control Register (read/write) */ -#define STMCR __REG(0x40700010) /* Modem Control Register (read/write) */ -#define STLSR __REG(0x40700014) /* Line Status Register (read only) */ -#define STMSR __REG(0x40700018) /* Reserved */ -#define STSPR __REG(0x4070001C) /* Scratch Pad Register (read/write) */ -#define STISR __REG(0x40700020) /* Infrared Selection Register (read/write) */ -#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -/* Hardware UART (HWUART) */ -#define HWUART HWRBR -#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */ -#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */ -#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */ -#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */ -#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */ -#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */ -#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */ -#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */ -#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */ -#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */ -#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */ -#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */ -#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */ -#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */ -#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -#define IER_DMAE (1 << 7) /* DMA Requests Enable */ -#define IER_UUE (1 << 6) /* UART Unit Enable */ -#define IER_NRZE (1 << 5) /* NRZ coding Enable */ -#define IER_RTIOE (1 << 4) /* Receiver Time Out Interrupt Enable */ -#define IER_MIE (1 << 3) /* Modem Interrupt Enable */ -#define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */ -#define IER_TIE (1 << 1) /* Transmit Data request Interrupt Enable */ -#define IER_RAVIE (1 << 0) /* Receiver Data Available Interrupt Enable */ - -#define IIR_FIFOES1 (1 << 7) /* FIFO Mode Enable Status */ -#define IIR_FIFOES0 (1 << 6) /* FIFO Mode Enable Status */ -#define IIR_TOD (1 << 3) /* Time Out Detected */ -#define IIR_IID2 (1 << 2) /* Interrupt Source Encoded */ -#define IIR_IID1 (1 << 1) /* Interrupt Source Encoded */ -#define IIR_IP (1 << 0) /* Interrupt Pending (active low) */ - -#define FCR_ITL2 (1 << 7) /* Interrupt Trigger Level */ -#define FCR_ITL1 (1 << 6) /* Interrupt Trigger Level */ -#define FCR_RESETTF (1 << 2) /* Reset Transmitter FIFO */ -#define FCR_RESETRF (1 << 1) /* Reset Receiver FIFO */ -#define FCR_TRFIFOE (1 << 0) /* Transmit and Receive FIFO Enable */ -#define FCR_ITL_1 (0) -#define FCR_ITL_8 (FCR_ITL1) -#define FCR_ITL_16 (FCR_ITL2) -#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1) - -#define LCR_DLAB (1 << 7) /* Divisor Latch Access Bit */ -#define LCR_SB (1 << 6) /* Set Break */ -#define LCR_STKYP (1 << 5) /* Sticky Parity */ -#define LCR_EPS (1 << 4) /* Even Parity Select */ -#define LCR_PEN (1 << 3) /* Parity Enable */ -#define LCR_STB (1 << 2) /* Stop Bit */ -#define LCR_WLS1 (1 << 1) /* Word Length Select */ -#define LCR_WLS0 (1 << 0) /* Word Length Select */ - -#define LSR_FIFOE (1 << 7) /* FIFO Error Status */ -#define LSR_TEMT (1 << 6) /* Transmitter Empty */ -#define LSR_TDRQ (1 << 5) /* Transmit Data Request */ -#define LSR_BI (1 << 4) /* Break Interrupt */ -#define LSR_FE (1 << 3) /* Framing Error */ -#define LSR_PE (1 << 2) /* Parity Error */ -#define LSR_OE (1 << 1) /* Overrun Error */ -#define LSR_DR (1 << 0) /* Data Ready */ - -#define MCR_LOOP (1 << 4) -#define MCR_OUT2 (1 << 3) /* force MSR_DCD in loopback mode */ -#define MCR_OUT1 (1 << 2) /* force MSR_RI in loopback mode */ -#define MCR_RTS (1 << 1) /* Request to Send */ -#define MCR_DTR (1 << 0) /* Data Terminal Ready */ - -#define MSR_DCD (1 << 7) /* Data Carrier Detect */ -#define MSR_RI (1 << 6) /* Ring Indicator */ -#define MSR_DSR (1 << 5) /* Data Set Ready */ -#define MSR_CTS (1 << 4) /* Clear To Send */ -#define MSR_DDCD (1 << 3) /* Delta Data Carrier Detect */ -#define MSR_TERI (1 << 2) /* Trailing Edge Ring Indicator */ -#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */ -#define MSR_DCTS (1 << 0) /* Delta Clear To Send */ - -/* - * IrSR (Infrared Selection Register) - */ -#define STISR_RXPL (1 << 4) /* Receive Data Polarity */ -#define STISR_TXPL (1 << 3) /* Transmit Data Polarity */ -#define STISR_XMODE (1 << 2) /* Transmit Pulse Width Select */ -#define STISR_RCVEIR (1 << 1) /* Receiver SIR Enable */ -#define STISR_XMITIR (1 << 0) /* Transmitter SIR Enable */ - -#endif /* __ASM_ARCH_REGS_UART_H */ diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c deleted file mode 100644 index 3275b679792b..000000000000 --- a/arch/arm/mach-pxa/saar.c +++ /dev/null @@ -1,604 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/saar.c - * - * Support for the Marvell PXA930 Handheld Platform (aka SAAR) - * - * Copyright (C) 2007-2008 Marvell International Ltd. - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/smc91x.h> -#include <linux/mfd/da903x.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/onenand.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> - -#include "pxa930.h" -#include <linux/platform_data/video-pxafb.h> - -#include "devices.h" -#include "generic.h" - -#define GPIO_LCD_RESET (16) - -/* SAAR MFP configurations */ -static mfp_cfg_t saar_mfp_cfg[] __initdata = { - /* LCD */ - GPIO23_LCD_DD0, - GPIO24_LCD_DD1, - GPIO25_LCD_DD2, - GPIO26_LCD_DD3, - GPIO27_LCD_DD4, - GPIO28_LCD_DD5, - GPIO29_LCD_DD6, - GPIO44_LCD_DD7, - GPIO21_LCD_CS, - GPIO22_LCD_VSYNC, - GPIO17_LCD_FCLK_RD, - GPIO18_LCD_LCLK_A0, - GPIO19_LCD_PCLK_WR, - GPIO16_GPIO, /* LCD reset */ - - /* Ethernet */ - DF_nCS1_nCS3, - GPIO97_GPIO, - - /* DFI */ - DF_INT_RnB_ND_INT_RnB, - DF_nRE_nOE_ND_nRE, - DF_nWE_ND_nWE, - DF_CLE_nOE_ND_CLE, - DF_nADV1_ALE_ND_ALE, - DF_nADV2_ALE_nCS3, - DF_nCS0_ND_nCS0, - DF_IO0_ND_IO0, - DF_IO1_ND_IO1, - DF_IO2_ND_IO2, - DF_IO3_ND_IO3, - DF_IO4_ND_IO4, - DF_IO5_ND_IO5, - DF_IO6_ND_IO6, - DF_IO7_ND_IO7, - DF_IO8_ND_IO8, - DF_IO9_ND_IO9, - DF_IO10_ND_IO10, - DF_IO11_ND_IO11, - DF_IO12_ND_IO12, - DF_IO13_ND_IO13, - DF_IO14_ND_IO14, - DF_IO15_ND_IO15, -}; - -#define SAAR_ETH_PHYS (0x14000000) - -static struct resource smc91x_resources[] = { - [0] = { - .start = (SAAR_ETH_PHYS + 0x300), - .end = (SAAR_ETH_PHYS + 0xfffff), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)), - .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct smc91x_platdata saar_smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &saar_smc91x_info, - }, -}; - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static uint16_t lcd_power_on[] = { - /* single frame */ - SMART_CMD_NOOP, - SMART_CMD(0x00), - SMART_DELAY(0), - - SMART_CMD_NOOP, - SMART_CMD(0x00), - SMART_DELAY(0), - - SMART_CMD_NOOP, - SMART_CMD(0x00), - SMART_DELAY(0), - - SMART_CMD_NOOP, - SMART_CMD(0x00), - SMART_DELAY(10), - - /* calibration control */ - SMART_CMD(0x00), - SMART_CMD(0xA4), - SMART_DAT(0x80), - SMART_DAT(0x01), - SMART_DELAY(150), - - /*Power-On Init sequence*/ - SMART_CMD(0x00), /* output ctrl */ - SMART_CMD(0x01), - SMART_DAT(0x01), - SMART_DAT(0x00), - SMART_CMD(0x00), /* wave ctrl */ - SMART_CMD(0x02), - SMART_DAT(0x07), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x03), /* entry mode */ - SMART_DAT(0xD0), - SMART_DAT(0x30), - SMART_CMD(0x00), - SMART_CMD(0x08), /* display ctrl 2 */ - SMART_DAT(0x08), - SMART_DAT(0x08), - SMART_CMD(0x00), - SMART_CMD(0x09), /* display ctrl 3 */ - SMART_DAT(0x04), - SMART_DAT(0x2F), - SMART_CMD(0x00), - SMART_CMD(0x0A), /* display ctrl 4 */ - SMART_DAT(0x00), - SMART_DAT(0x08), - SMART_CMD(0x00), - SMART_CMD(0x0D), /* Frame Marker position */ - SMART_DAT(0x00), - SMART_DAT(0x08), - SMART_CMD(0x00), - SMART_CMD(0x60), /* Driver output control */ - SMART_DAT(0x27), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x61), /* Base image display control */ - SMART_DAT(0x00), - SMART_DAT(0x01), - SMART_CMD(0x00), - SMART_CMD(0x30), /* Y settings 30h-3Dh */ - SMART_DAT(0x07), - SMART_DAT(0x07), - SMART_CMD(0x00), - SMART_CMD(0x31), - SMART_DAT(0x00), - SMART_DAT(0x07), - SMART_CMD(0x00), - SMART_CMD(0x32), /* Timing(3), ASW HOLD=0.5CLK */ - SMART_DAT(0x04), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x33), /* Timing(4), CKV ST=0CLK, CKV ED=1CLK */ - SMART_DAT(0x03), - SMART_DAT(0x03), - SMART_CMD(0x00), - SMART_CMD(0x34), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x35), - SMART_DAT(0x02), - SMART_DAT(0x05), - SMART_CMD(0x00), - SMART_CMD(0x36), - SMART_DAT(0x1F), - SMART_DAT(0x1F), - SMART_CMD(0x00), - SMART_CMD(0x37), - SMART_DAT(0x07), - SMART_DAT(0x07), - SMART_CMD(0x00), - SMART_CMD(0x38), - SMART_DAT(0x00), - SMART_DAT(0x07), - SMART_CMD(0x00), - SMART_CMD(0x39), - SMART_DAT(0x04), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x3A), - SMART_DAT(0x03), - SMART_DAT(0x03), - SMART_CMD(0x00), - SMART_CMD(0x3B), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x3C), - SMART_DAT(0x02), - SMART_DAT(0x05), - SMART_CMD(0x00), - SMART_CMD(0x3D), - SMART_DAT(0x1F), - SMART_DAT(0x1F), - SMART_CMD(0x00), /* Display control 1 */ - SMART_CMD(0x07), - SMART_DAT(0x00), - SMART_DAT(0x01), - SMART_CMD(0x00), /* Power control 5 */ - SMART_CMD(0x17), - SMART_DAT(0x00), - SMART_DAT(0x01), - SMART_CMD(0x00), /* Power control 1 */ - SMART_CMD(0x10), - SMART_DAT(0x10), - SMART_DAT(0xB0), - SMART_CMD(0x00), /* Power control 2 */ - SMART_CMD(0x11), - SMART_DAT(0x01), - SMART_DAT(0x30), - SMART_CMD(0x00), /* Power control 3 */ - SMART_CMD(0x12), - SMART_DAT(0x01), - SMART_DAT(0x9E), - SMART_CMD(0x00), /* Power control 4 */ - SMART_CMD(0x13), - SMART_DAT(0x17), - SMART_DAT(0x00), - SMART_CMD(0x00), /* Power control 3 */ - SMART_CMD(0x12), - SMART_DAT(0x01), - SMART_DAT(0xBE), - SMART_DELAY(100), - - /* display mode : 240*320 */ - SMART_CMD(0x00), /* RAM address set(H) 0*/ - SMART_CMD(0x20), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), /* RAM address set(V) 4*/ - SMART_CMD(0x21), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), /* Start of Window RAM address set(H) 8*/ - SMART_CMD(0x50), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), /* End of Window RAM address set(H) 12*/ - SMART_CMD(0x51), - SMART_DAT(0x00), - SMART_DAT(0xEF), - SMART_CMD(0x00), /* Start of Window RAM address set(V) 16*/ - SMART_CMD(0x52), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), /* End of Window RAM address set(V) 20*/ - SMART_CMD(0x53), - SMART_DAT(0x01), - SMART_DAT(0x3F), - SMART_CMD(0x00), /* Panel interface control 1 */ - SMART_CMD(0x90), - SMART_DAT(0x00), - SMART_DAT(0x1A), - SMART_CMD(0x00), /* Panel interface control 2 */ - SMART_CMD(0x92), - SMART_DAT(0x04), - SMART_DAT(0x00), - SMART_CMD(0x00), /* Panel interface control 3 */ - SMART_CMD(0x93), - SMART_DAT(0x00), - SMART_DAT(0x05), - SMART_DELAY(20), -}; - -static uint16_t lcd_panel_on[] = { - SMART_CMD(0x00), - SMART_CMD(0x07), - SMART_DAT(0x00), - SMART_DAT(0x21), - SMART_DELAY(1), - - SMART_CMD(0x00), - SMART_CMD(0x07), - SMART_DAT(0x00), - SMART_DAT(0x61), - SMART_DELAY(100), - - SMART_CMD(0x00), - SMART_CMD(0x07), - SMART_DAT(0x01), - SMART_DAT(0x73), - SMART_DELAY(1), -}; - -static uint16_t lcd_panel_off[] = { - SMART_CMD(0x00), - SMART_CMD(0x07), - SMART_DAT(0x00), - SMART_DAT(0x72), - SMART_DELAY(40), - - SMART_CMD(0x00), - SMART_CMD(0x07), - SMART_DAT(0x00), - SMART_DAT(0x01), - SMART_DELAY(1), - - SMART_CMD(0x00), - SMART_CMD(0x07), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_DELAY(1), -}; - -static uint16_t lcd_power_off[] = { - SMART_CMD(0x00), - SMART_CMD(0x10), - SMART_DAT(0x00), - SMART_DAT(0x80), - - SMART_CMD(0x00), - SMART_CMD(0x11), - SMART_DAT(0x01), - SMART_DAT(0x60), - - SMART_CMD(0x00), - SMART_CMD(0x12), - SMART_DAT(0x01), - SMART_DAT(0xAE), - SMART_DELAY(40), - - SMART_CMD(0x00), - SMART_CMD(0x10), - SMART_DAT(0x00), - SMART_DAT(0x00), -}; - -static uint16_t update_framedata[] = { - /* set display ram: 240*320 */ - SMART_CMD(0x00), /* RAM address set(H) 0*/ - SMART_CMD(0x20), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), /* RAM address set(V) 4*/ - SMART_CMD(0x21), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), /* Start of Window RAM address set(H) 8 */ - SMART_CMD(0x50), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), /* End of Window RAM address set(H) 12 */ - SMART_CMD(0x51), - SMART_DAT(0x00), - SMART_DAT(0xEF), - SMART_CMD(0x00), /* Start of Window RAM address set(V) 16 */ - SMART_CMD(0x52), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), /* End of Window RAM address set(V) 20 */ - SMART_CMD(0x53), - SMART_DAT(0x01), - SMART_DAT(0x3F), - - /* wait for vsync cmd before transferring frame data */ - SMART_CMD_WAIT_FOR_VSYNC, - - /* write ram */ - SMART_CMD(0x00), - SMART_CMD(0x22), - - /* write frame data */ - SMART_CMD_WRITE_FRAME, -}; - -static void ltm022a97a_lcd_power(int on, struct fb_var_screeninfo *var) -{ - static int pin_requested = 0; - struct fb_info *info = container_of(var, struct fb_info, var); - int err; - - if (!pin_requested) { - err = gpio_request(GPIO_LCD_RESET, "lcd reset"); - if (err) { - pr_err("failed to request gpio for LCD reset\n"); - return; - } - - gpio_direction_output(GPIO_LCD_RESET, 0); - pin_requested = 1; - } - - if (on) { - gpio_set_value(GPIO_LCD_RESET, 0); msleep(100); - gpio_set_value(GPIO_LCD_RESET, 1); msleep(10); - - pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_on)); - pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_on)); - } else { - pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_off)); - pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_off)); - } - - err = pxafb_smart_flush(info); - if (err) - pr_err("%s: timed out\n", __func__); -} - -static void ltm022a97a_update(struct fb_info *info) -{ - pxafb_smart_queue(info, ARRAY_AND_SIZE(update_framedata)); - pxafb_smart_flush(info); -} - -static struct pxafb_mode_info toshiba_ltm022a97a_modes[] = { - [0] = { - .xres = 240, - .yres = 320, - .bpp = 16, - .a0csrd_set_hld = 30, - .a0cswr_set_hld = 30, - .wr_pulse_width = 30, - .rd_pulse_width = 30, - .op_hold_time = 30, - .cmd_inh_time = 60, - - /* L_LCLK_A0 and L_LCLK_RD active low */ - .sync = FB_SYNC_HOR_HIGH_ACT | - FB_SYNC_VERT_HIGH_ACT, - }, -}; - -static struct pxafb_mach_info saar_lcd_info = { - .modes = toshiba_ltm022a97a_modes, - .num_modes = 1, - .lcd_conn = LCD_SMART_PANEL_8BPP | LCD_PCLK_EDGE_FALL, - .pxafb_lcd_power = ltm022a97a_lcd_power, - .smart_update = ltm022a97a_update, -}; - -static void __init saar_init_lcd(void) -{ - pxa_set_fb_info(NULL, &saar_lcd_info); -} -#else -static inline void saar_init_lcd(void) {} -#endif - -#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) -static struct da9034_backlight_pdata saar_da9034_backlight = { - .output_current = 4, /* 4mA */ -}; - -static struct da903x_subdev_info saar_da9034_subdevs[] = { - [0] = { - .name = "da903x-backlight", - .id = DA9034_ID_WLED, - .platform_data = &saar_da9034_backlight, - }, -}; - -static struct da903x_platform_data saar_da9034_info = { - .num_subdevs = ARRAY_SIZE(saar_da9034_subdevs), - .subdevs = saar_da9034_subdevs, -}; - -static struct i2c_board_info saar_i2c_info[] = { - [0] = { - .type = "da9034", - .addr = 0x34, - .platform_data = &saar_da9034_info, - .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), - }, -}; - -static void __init saar_init_i2c(void) -{ - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(saar_i2c_info)); -} -#else -static inline void saar_init_i2c(void) {} -#endif - -#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE) -static struct mtd_partition saar_onenand_partitions[] = { - { - .name = "bootloader", - .offset = 0, - .size = SZ_1M, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "reserved", - .offset = MTDPART_OFS_APPEND, - .size = SZ_8M, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = (SZ_2M + SZ_1M), - .mask_flags = 0, - }, { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, - .size = SZ_32M + SZ_16M, - .mask_flags = 0, - } -}; - -static struct onenand_platform_data saar_onenand_info = { - .parts = saar_onenand_partitions, - .nr_parts = ARRAY_SIZE(saar_onenand_partitions), -}; - -#define SMC_CS0_PHYS_BASE (0x10000000) - -static struct resource saar_resource_onenand[] = { - [0] = { - .start = SMC_CS0_PHYS_BASE, - .end = SMC_CS0_PHYS_BASE + SZ_1M, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device saar_device_onenand = { - .name = "onenand-flash", - .id = -1, - .dev = { - .platform_data = &saar_onenand_info, - }, - .resource = saar_resource_onenand, - .num_resources = ARRAY_SIZE(saar_resource_onenand), -}; - -static void __init saar_init_onenand(void) -{ - platform_device_register(&saar_device_onenand); -} -#else -static void __init saar_init_onenand(void) {} -#endif - -static void __init saar_init(void) -{ - /* initialize MFP configurations */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - platform_device_register(&smc91x_device); - saar_init_onenand(); - - saar_init_i2c(); - saar_init_lcd(); -} - -MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") - /* Maintainer: Eric Miao <eric.miao@marvell.com> */ - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .init_machine = saar_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index a829baf8d922..929cc51ed7c2 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -170,10 +170,6 @@ extern int max1111_read_channel(int); */ int sharpsl_pm_pxa_read_max1111(int channel) { - /* Ugly, better move this function into another module */ - if (machine_is_tosa()) - return 0; - /* max1111 accepts channels from 0-3, however, * it is encoded from 0-7 here in the code. */ diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 9964729cd428..26f0ebc4d136 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -40,7 +40,6 @@ #include "pxa27x.h" #include "pxa27x-udc.h" #include "reset.h" -#include <linux/platform_data/irda-pxaficp.h> #include <linux/platform_data/mmc-pxamci.h> #include <linux/platform_data/usb-ohci-pxa27x.h> #include <linux/platform_data/video-pxafb.h> @@ -688,27 +687,6 @@ static inline void spitz_uhc_init(void) {} #endif /****************************************************************************** - * IrDA - ******************************************************************************/ -#if defined(CONFIG_PXA_FICP) || defined(CONFIG_PXA_FICP_MODULE) -static struct pxaficp_platform_data spitz_ficp_platform_data = { - .transceiver_cap = IR_SIRMODE | IR_OFF, -}; - -static void __init spitz_irda_init(void) -{ - if (machine_is_akita()) - spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON; - else - spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON; - - pxa_set_ficp_info(&spitz_ficp_platform_data); -} -#else -static inline void spitz_irda_init(void) {} -#endif - -/****************************************************************************** * Framebuffer ******************************************************************************/ #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) @@ -1042,7 +1020,6 @@ static void __init spitz_init(void) spitz_leds_init(); spitz_mmc_init(); spitz_pcmcia_init(); - spitz_irda_init(); spitz_uhc_init(); spitz_lcd_init(); spitz_nor_init(); diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c deleted file mode 100644 index a15eb3b9484d..000000000000 --- a/arch/arm/mach-pxa/tavorevb.c +++ /dev/null @@ -1,506 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/tavorevb.c - * - * Support for the Marvell PXA930 Evaluation Board - * - * Copyright (C) 2007-2008 Marvell International Ltd. - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/gpio.h> -#include <linux/smc91x.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa930.h" -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/keypad-pxa27x.h> - -#include "devices.h" -#include "generic.h" - -/* Tavor EVB MFP configurations */ -static mfp_cfg_t tavorevb_mfp_cfg[] __initdata = { - /* Ethernet */ - DF_nCS1_nCS3, - GPIO47_GPIO, - - /* LCD */ - GPIO23_LCD_DD0, - GPIO24_LCD_DD1, - GPIO25_LCD_DD2, - GPIO26_LCD_DD3, - GPIO27_LCD_DD4, - GPIO28_LCD_DD5, - GPIO29_LCD_DD6, - GPIO44_LCD_DD7, - GPIO21_LCD_CS, - GPIO22_LCD_CS2, - - GPIO17_LCD_FCLK_RD, - GPIO18_LCD_LCLK_A0, - GPIO19_LCD_PCLK_WR, - - /* LCD Backlight */ - GPIO43_PWM3, /* primary backlight */ - GPIO32_PWM0, /* secondary backlight */ - - /* Keypad */ - GPIO0_KP_MKIN_0, - GPIO2_KP_MKIN_1, - GPIO4_KP_MKIN_2, - GPIO6_KP_MKIN_3, - GPIO8_KP_MKIN_4, - GPIO10_KP_MKIN_5, - GPIO12_KP_MKIN_6, - GPIO1_KP_MKOUT_0, - GPIO3_KP_MKOUT_1, - GPIO5_KP_MKOUT_2, - GPIO7_KP_MKOUT_3, - GPIO9_KP_MKOUT_4, - GPIO11_KP_MKOUT_5, - GPIO13_KP_MKOUT_6, - - GPIO14_KP_DKIN_2, - GPIO15_KP_DKIN_3, -}; - -#define TAVOREVB_ETH_PHYS (0x14000000) - -static struct resource smc91x_resources[] = { - [0] = { - .start = (TAVOREVB_ETH_PHYS + 0x300), - .end = (TAVOREVB_ETH_PHYS + 0xfffff), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)), - .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct smc91x_platdata tavorevb_smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &tavorevb_smc91x_info, - }, -}; - -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int tavorevb_matrix_key_map[] = { - /* KEY(row, col, key_code) */ - KEY(0, 4, KEY_A), KEY(0, 5, KEY_B), KEY(0, 6, KEY_C), - KEY(1, 4, KEY_E), KEY(1, 5, KEY_F), KEY(1, 6, KEY_G), - KEY(2, 4, KEY_I), KEY(2, 5, KEY_J), KEY(2, 6, KEY_K), - KEY(3, 4, KEY_M), KEY(3, 5, KEY_N), KEY(3, 6, KEY_O), - KEY(4, 5, KEY_R), KEY(4, 6, KEY_S), - KEY(5, 4, KEY_U), KEY(5, 4, KEY_V), KEY(5, 6, KEY_W), - - KEY(6, 4, KEY_Y), KEY(6, 5, KEY_Z), - - KEY(0, 3, KEY_0), KEY(2, 0, KEY_1), KEY(2, 1, KEY_2), KEY(2, 2, KEY_3), - KEY(2, 3, KEY_4), KEY(1, 0, KEY_5), KEY(1, 1, KEY_6), KEY(1, 2, KEY_7), - KEY(1, 3, KEY_8), KEY(0, 2, KEY_9), - - KEY(6, 6, KEY_SPACE), - KEY(0, 0, KEY_KPASTERISK), /* * */ - KEY(0, 1, KEY_KPDOT), /* # */ - - KEY(4, 1, KEY_UP), - KEY(4, 3, KEY_DOWN), - KEY(4, 0, KEY_LEFT), - KEY(4, 2, KEY_RIGHT), - KEY(6, 0, KEY_HOME), - KEY(3, 2, KEY_END), - KEY(6, 1, KEY_DELETE), - KEY(5, 2, KEY_BACK), - KEY(6, 3, KEY_CAPSLOCK), /* KEY_LEFTSHIFT), */ - - KEY(4, 4, KEY_ENTER), /* scroll push */ - KEY(6, 2, KEY_ENTER), /* keypad action */ - - KEY(3, 1, KEY_SEND), - KEY(5, 3, KEY_RECORD), - KEY(5, 0, KEY_VOLUMEUP), - KEY(5, 1, KEY_VOLUMEDOWN), - - KEY(3, 0, KEY_F22), /* soft1 */ - KEY(3, 3, KEY_F23), /* soft2 */ -}; - -static struct matrix_keymap_data tavorevb_matrix_keymap_data = { - .keymap = tavorevb_matrix_key_map, - .keymap_size = ARRAY_SIZE(tavorevb_matrix_key_map), -}; - -static struct pxa27x_keypad_platform_data tavorevb_keypad_info = { - .matrix_key_rows = 7, - .matrix_key_cols = 7, - .matrix_keymap_data = &tavorevb_matrix_keymap_data, - .debounce_interval = 30, -}; - -static void __init tavorevb_init_keypad(void) -{ - pxa_set_keypad_info(&tavorevb_keypad_info); -} -#else -static inline void tavorevb_init_keypad(void) {} -#endif /* CONFIG_KEYBOARD_PXA27x || CONFIG_KEYBOARD_PXA27x_MODULE */ - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pwm_lookup tavorevb_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.0", 1, "pwm-backlight.0", NULL, 100000, - PWM_POLARITY_NORMAL), - PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.1", NULL, 100000, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data tavorevb_backlight_data[] = { - [0] = { - /* primary backlight */ - .max_brightness = 100, - .dft_brightness = 100, - }, - [1] = { - /* secondary backlight */ - .max_brightness = 100, - .dft_brightness = 100, - }, -}; - -static struct platform_device tavorevb_backlight_devices[] = { - [0] = { - .name = "pwm-backlight", - .id = 0, - .dev = { - .platform_data = &tavorevb_backlight_data[0], - }, - }, - [1] = { - .name = "pwm-backlight", - .id = 1, - .dev = { - .platform_data = &tavorevb_backlight_data[1], - }, - }, -}; - -static uint16_t panel_init[] = { - /* DSTB OUT */ - SMART_CMD(0x00), - SMART_CMD_NOOP, - SMART_DELAY(1), - - SMART_CMD(0x00), - SMART_CMD_NOOP, - SMART_DELAY(1), - - SMART_CMD(0x00), - SMART_CMD_NOOP, - SMART_DELAY(1), - - /* STB OUT */ - SMART_CMD(0x00), - SMART_CMD(0x1D), - SMART_DAT(0x00), - SMART_DAT(0x05), - SMART_DELAY(1), - - /* P-ON Init sequence */ - SMART_CMD(0x00), /* OSC ON */ - SMART_CMD(0x00), - SMART_DAT(0x00), - SMART_DAT(0x01), - SMART_CMD(0x00), - SMART_CMD(0x01), /* SOURCE DRIVER SHIFT DIRECTION and display RAM setting */ - SMART_DAT(0x01), - SMART_DAT(0x27), - SMART_CMD(0x00), - SMART_CMD(0x02), /* LINE INV */ - SMART_DAT(0x02), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x03), /* IF mode(1) */ - SMART_DAT(0x01), /* 8bit smart mode(8-8),high speed write mode */ - SMART_DAT(0x30), - SMART_CMD(0x07), - SMART_CMD(0x00), /* RAM Write Mode */ - SMART_DAT(0x00), - SMART_DAT(0x03), - SMART_CMD(0x00), - - /* DISPLAY Setting, 262K, fixed(NO scroll), no split screen */ - SMART_CMD(0x07), - SMART_DAT(0x40), /* 16/18/19 BPP */ - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x08), /* BP, FP Seting, BP=2H, FP=3H */ - SMART_DAT(0x03), - SMART_DAT(0x02), - SMART_CMD(0x00), - SMART_CMD(0x0C), /* IF mode(2), using internal clock & MPU */ - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x0D), /* Frame setting, 1Min. Frequence, 16CLK */ - SMART_DAT(0x00), - SMART_DAT(0x10), - SMART_CMD(0x00), - SMART_CMD(0x12), /* Timing(1),ASW W=4CLK, ASW ST=1CLK */ - SMART_DAT(0x03), - SMART_DAT(0x02), - SMART_CMD(0x00), - SMART_CMD(0x13), /* Timing(2),OEV ST=0.5CLK, OEV ED=1CLK */ - SMART_DAT(0x01), - SMART_DAT(0x02), - SMART_CMD(0x00), - SMART_CMD(0x14), /* Timing(3), ASW HOLD=0.5CLK */ - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x15), /* Timing(4), CKV ST=0CLK, CKV ED=1CLK */ - SMART_DAT(0x20), - SMART_DAT(0x00), - SMART_CMD(0x00), - SMART_CMD(0x1C), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x03), - SMART_CMD(0x00), - SMART_DAT(0x04), - SMART_DAT(0x03), - SMART_CMD(0x03), - SMART_CMD(0x01), - SMART_DAT(0x03), - SMART_DAT(0x04), - SMART_CMD(0x03), - SMART_CMD(0x02), - SMART_DAT(0x04), - SMART_DAT(0x03), - SMART_CMD(0x03), - SMART_CMD(0x03), - SMART_DAT(0x03), - SMART_DAT(0x03), - SMART_CMD(0x03), - SMART_CMD(0x04), - SMART_DAT(0x01), - SMART_DAT(0x01), - SMART_CMD(0x03), - SMART_CMD(0x05), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x04), - SMART_CMD(0x02), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x04), - SMART_CMD(0x03), - SMART_DAT(0x01), - SMART_DAT(0x3F), - SMART_DELAY(0), - - /* DISP RAM setting: 240*320 */ - SMART_CMD(0x04), /* HADDR, START 0 */ - SMART_CMD(0x06), - SMART_DAT(0x00), - SMART_DAT(0x00), /* x1,3 */ - SMART_CMD(0x04), /* HADDR, END 4 */ - SMART_CMD(0x07), - SMART_DAT(0x00), - SMART_DAT(0xEF), /* x2, 7 */ - SMART_CMD(0x04), /* VADDR, START 8 */ - SMART_CMD(0x08), - SMART_DAT(0x00), /* y1, 10 */ - SMART_DAT(0x00), /* y1, 11 */ - SMART_CMD(0x04), /* VADDR, END 12 */ - SMART_CMD(0x09), - SMART_DAT(0x01), /* y2, 14 */ - SMART_DAT(0x3F), /* y2, 15 */ - SMART_CMD(0x02), /* RAM ADDR SETTING 16 */ - SMART_CMD(0x00), - SMART_DAT(0x00), - SMART_DAT(0x00), /* x1, 19 */ - SMART_CMD(0x02), /* RAM ADDR SETTING 20 */ - SMART_CMD(0x01), - SMART_DAT(0x00), /* y1, 22 */ - SMART_DAT(0x00), /* y1, 23 */ -}; - -static uint16_t panel_on[] = { - /* Power-IC ON */ - SMART_CMD(0x01), - SMART_CMD(0x02), - SMART_DAT(0x07), - SMART_DAT(0x7D), - SMART_CMD(0x01), - SMART_CMD(0x03), - SMART_DAT(0x00), - SMART_DAT(0x05), - SMART_CMD(0x01), - SMART_CMD(0x04), - SMART_DAT(0x00), - SMART_DAT(0x00), - SMART_CMD(0x01), - SMART_CMD(0x05), - SMART_DAT(0x00), - SMART_DAT(0x15), - SMART_CMD(0x01), - SMART_CMD(0x00), - SMART_DAT(0xC0), - SMART_DAT(0x10), - SMART_DELAY(30), - - /* DISP ON */ - SMART_CMD(0x01), - SMART_CMD(0x01), - SMART_DAT(0x00), - SMART_DAT(0x01), - SMART_CMD(0x01), - SMART_CMD(0x00), - SMART_DAT(0xFF), - SMART_DAT(0xFE), - SMART_DELAY(150), -}; - -static uint16_t panel_off[] = { - SMART_CMD(0x00), - SMART_CMD(0x1E), - SMART_DAT(0x00), - SMART_DAT(0x0A), - SMART_CMD(0x01), - SMART_CMD(0x00), - SMART_DAT(0xFF), - SMART_DAT(0xEE), - SMART_CMD(0x01), - SMART_CMD(0x00), - SMART_DAT(0xF8), - SMART_DAT(0x12), - SMART_CMD(0x01), - SMART_CMD(0x00), - SMART_DAT(0xE8), - SMART_DAT(0x11), - SMART_CMD(0x01), - SMART_CMD(0x00), - SMART_DAT(0xC0), - SMART_DAT(0x11), - SMART_CMD(0x01), - SMART_CMD(0x00), - SMART_DAT(0x40), - SMART_DAT(0x11), - SMART_CMD(0x01), - SMART_CMD(0x00), - SMART_DAT(0x00), - SMART_DAT(0x10), -}; - -static uint16_t update_framedata[] = { - /* write ram */ - SMART_CMD(0x02), - SMART_CMD(0x02), - - /* write frame data */ - SMART_CMD_WRITE_FRAME, -}; - -static void ltm020d550_lcd_power(int on, struct fb_var_screeninfo *var) -{ - struct fb_info *info = container_of(var, struct fb_info, var); - - if (on) { - pxafb_smart_queue(info, ARRAY_AND_SIZE(panel_init)); - pxafb_smart_queue(info, ARRAY_AND_SIZE(panel_on)); - } else { - pxafb_smart_queue(info, ARRAY_AND_SIZE(panel_off)); - } - - if (pxafb_smart_flush(info)) - pr_err("%s: timed out\n", __func__); -} - -static void ltm020d550_update(struct fb_info *info) -{ - pxafb_smart_queue(info, ARRAY_AND_SIZE(update_framedata)); - pxafb_smart_flush(info); -} - -static struct pxafb_mode_info toshiba_ltm020d550_modes[] = { - [0] = { - .xres = 240, - .yres = 320, - .bpp = 16, - .a0csrd_set_hld = 30, - .a0cswr_set_hld = 30, - .wr_pulse_width = 30, - .rd_pulse_width = 170, - .op_hold_time = 30, - .cmd_inh_time = 60, - - /* L_LCLK_A0 and L_LCLK_RD active low */ - .sync = FB_SYNC_HOR_HIGH_ACT | - FB_SYNC_VERT_HIGH_ACT, - }, -}; - -static struct pxafb_mach_info tavorevb_lcd_info = { - .modes = toshiba_ltm020d550_modes, - .num_modes = 1, - .lcd_conn = LCD_SMART_PANEL_8BPP | LCD_PCLK_EDGE_FALL, - .pxafb_lcd_power = ltm020d550_lcd_power, - .smart_update = ltm020d550_update, -}; - -static void __init tavorevb_init_lcd(void) -{ - pwm_add_table(tavorevb_pwm_lookup, ARRAY_SIZE(tavorevb_pwm_lookup)); - platform_device_register(&tavorevb_backlight_devices[0]); - platform_device_register(&tavorevb_backlight_devices[1]); - pxa_set_fb_info(NULL, &tavorevb_lcd_info); -} -#else -static inline void tavorevb_init_lcd(void) {} -#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ - -static void __init tavorevb_init(void) -{ - /* initialize MFP configurations */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(tavorevb_mfp_cfg)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - platform_device_register(&smc91x_device); - - tavorevb_init_lcd(); - tavorevb_init_keypad(); -} - -MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") - /* Maintainer: Eric Miao <eric.miao@marvell.com> */ - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .init_machine = tavorevb_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c deleted file mode 100644 index c9541632b8b1..000000000000 --- a/arch/arm/mach-pxa/tosa-bt.c +++ /dev/null @@ -1,134 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Bluetooth built-in chip control - * - * Copyright (c) 2008 Dmitry Baryshkov - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/rfkill.h> - -#include "tosa_bt.h" - -static void tosa_bt_on(struct tosa_bt_data *data) -{ - gpio_set_value(data->gpio_reset, 0); - gpio_set_value(data->gpio_pwr, 1); - gpio_set_value(data->gpio_reset, 1); - mdelay(20); - gpio_set_value(data->gpio_reset, 0); -} - -static void tosa_bt_off(struct tosa_bt_data *data) -{ - gpio_set_value(data->gpio_reset, 1); - mdelay(10); - gpio_set_value(data->gpio_pwr, 0); - gpio_set_value(data->gpio_reset, 0); -} - -static int tosa_bt_set_block(void *data, bool blocked) -{ - pr_info("BT_RADIO going: %s\n", blocked ? "off" : "on"); - - if (!blocked) { - pr_info("TOSA_BT: going ON\n"); - tosa_bt_on(data); - } else { - pr_info("TOSA_BT: going OFF\n"); - tosa_bt_off(data); - } - - return 0; -} - -static const struct rfkill_ops tosa_bt_rfkill_ops = { - .set_block = tosa_bt_set_block, -}; - -static int tosa_bt_probe(struct platform_device *dev) -{ - int rc; - struct rfkill *rfk; - - struct tosa_bt_data *data = dev->dev.platform_data; - - rc = gpio_request(data->gpio_reset, "Bluetooth reset"); - if (rc) - goto err_reset; - rc = gpio_direction_output(data->gpio_reset, 0); - if (rc) - goto err_reset_dir; - rc = gpio_request(data->gpio_pwr, "Bluetooth power"); - if (rc) - goto err_pwr; - rc = gpio_direction_output(data->gpio_pwr, 0); - if (rc) - goto err_pwr_dir; - - rfk = rfkill_alloc("tosa-bt", &dev->dev, RFKILL_TYPE_BLUETOOTH, - &tosa_bt_rfkill_ops, data); - if (!rfk) { - rc = -ENOMEM; - goto err_rfk_alloc; - } - - rc = rfkill_register(rfk); - if (rc) - goto err_rfkill; - - platform_set_drvdata(dev, rfk); - - return 0; - -err_rfkill: - rfkill_destroy(rfk); -err_rfk_alloc: - tosa_bt_off(data); -err_pwr_dir: - gpio_free(data->gpio_pwr); -err_pwr: -err_reset_dir: - gpio_free(data->gpio_reset); -err_reset: - return rc; -} - -static int tosa_bt_remove(struct platform_device *dev) -{ - struct tosa_bt_data *data = dev->dev.platform_data; - struct rfkill *rfk = platform_get_drvdata(dev); - - platform_set_drvdata(dev, NULL); - - if (rfk) { - rfkill_unregister(rfk); - rfkill_destroy(rfk); - } - rfk = NULL; - - tosa_bt_off(data); - - gpio_free(data->gpio_pwr); - gpio_free(data->gpio_reset); - - return 0; -} - -static struct platform_driver tosa_bt_driver = { - .probe = tosa_bt_probe, - .remove = tosa_bt_remove, - - .driver = { - .name = "tosa-bt", - }, -}; -module_platform_driver(tosa_bt_driver); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Dmitry Baryshkov"); -MODULE_DESCRIPTION("Bluetooth built-in chip control"); diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c deleted file mode 100644 index d41641d6cfcd..000000000000 --- a/arch/arm/mach-pxa/tosa.c +++ /dev/null @@ -1,946 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Support for Sharp SL-C6000x PDAs - * Model: (Tosa) - * - * Copyright (c) 2005 Dirk Opfer - * - * Based on code written by Sharp/Lineo for 2.4 kernels - */ - -#include <linux/clkdev.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/major.h> -#include <linux/fs.h> -#include <linux/interrupt.h> -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/mmc/host.h> -#include <linux/mfd/tc6393xb.h> -#include <linux/mfd/tmio.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/pm.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/power/gpio-charger.h> -#include <linux/spi/spi.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/input/matrix_keypad.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/reboot.h> -#include <linux/memblock.h> - -#include <asm/setup.h> -#include <asm/mach-types.h> - -#include "pxa25x.h" -#include "reset.h" -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/mmc-pxamci.h> -#include "udc.h" -#include "tosa_bt.h" -#include <linux/platform_data/asoc-pxa.h> -#include "smemc.h" - -#include <asm/mach/arch.h> -#include "tosa.h" - -#include <asm/hardware/scoop.h> -#include <asm/mach/sharpsl_param.h> - -#include "generic.h" -#include "devices.h" - -static unsigned long tosa_pin_config[] = { - GPIO78_nCS_2, /* Scoop */ - GPIO80_nCS_4, /* tg6393xb */ - GPIO33_nCS_5, /* Scoop */ - - // GPIO76 CARD_VCC_ON1 - - GPIO19_GPIO, /* Reset out */ - GPIO1_RST | WAKEUP_ON_EDGE_FALL, - - GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* WAKE_UP */ - GPIO2_GPIO | WAKEUP_ON_EDGE_BOTH, /* AC_IN */ - GPIO3_GPIO | WAKEUP_ON_EDGE_FALL, /* RECORD */ - GPIO4_GPIO | WAKEUP_ON_EDGE_FALL, /* SYNC */ - GPIO20_GPIO, /* EAR_IN */ - GPIO22_GPIO, /* On */ - - GPIO5_GPIO, /* USB_IN */ - GPIO32_GPIO, /* Pen IRQ */ - - GPIO7_GPIO, /* Jacket Detect */ - GPIO14_GPIO, /* BAT0_CRG */ - GPIO12_GPIO, /* BAT1_CRG */ - GPIO17_GPIO, /* BAT0_LOW */ - GPIO84_GPIO, /* BAT1_LOW */ - GPIO38_GPIO, /* BAT_LOCK */ - - GPIO11_3_6MHz, - GPIO15_GPIO, /* TC6393XB IRQ */ - GPIO18_RDY, - GPIO27_GPIO, /* LCD Sync */ - - /* MMC */ - GPIO6_MMC_CLK, - GPIO8_MMC_CS0, - GPIO9_GPIO, /* Detect */ - GPIO10_GPIO, /* nSD_INT */ - - /* CF */ - GPIO13_GPIO, /* CD_IRQ */ - GPIO21_GPIO, /* Main Slot IRQ */ - GPIO36_GPIO, /* Jacket Slot IRQ */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* AC97 */ - GPIO31_AC97_SYNC, - GPIO30_AC97_SDATA_OUT, - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - // GPIO79 nAUD_IRQ - - /* FFUART */ - GPIO34_FFUART_RXD, - GPIO35_FFUART_CTS, - GPIO37_FFUART_DSR, - GPIO39_FFUART_TXD, - GPIO40_FFUART_DTR, - GPIO41_FFUART_RTS, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* Keybd */ - GPIO58_GPIO | MFP_LPM_DRIVE_LOW, /* Column 0 */ - GPIO59_GPIO | MFP_LPM_DRIVE_LOW, /* Column 1 */ - GPIO60_GPIO | MFP_LPM_DRIVE_LOW, /* Column 2 */ - GPIO61_GPIO | MFP_LPM_DRIVE_LOW, /* Column 3 */ - GPIO62_GPIO | MFP_LPM_DRIVE_LOW, /* Column 4 */ - GPIO63_GPIO | MFP_LPM_DRIVE_LOW, /* Column 5 */ - GPIO64_GPIO | MFP_LPM_DRIVE_LOW, /* Column 6 */ - GPIO65_GPIO | MFP_LPM_DRIVE_LOW, /* Column 7 */ - GPIO66_GPIO | MFP_LPM_DRIVE_LOW, /* Column 8 */ - GPIO67_GPIO | MFP_LPM_DRIVE_LOW, /* Column 9 */ - GPIO68_GPIO | MFP_LPM_DRIVE_LOW, /* Column 10 */ - GPIO69_GPIO | MFP_LPM_DRIVE_LOW, /* Row 0 */ - GPIO70_GPIO | MFP_LPM_DRIVE_LOW, /* Row 1 */ - GPIO71_GPIO | MFP_LPM_DRIVE_LOW, /* Row 2 */ - GPIO72_GPIO | MFP_LPM_DRIVE_LOW, /* Row 3 */ - GPIO73_GPIO | MFP_LPM_DRIVE_LOW, /* Row 4 */ - GPIO74_GPIO | MFP_LPM_DRIVE_LOW, /* Row 5 */ - GPIO75_GPIO | MFP_LPM_DRIVE_LOW, /* Row 6 */ - - /* SPI */ - GPIO81_SSP2_CLK_OUT, - GPIO82_SSP2_FRM_OUT, - GPIO83_SSP2_TXD, - - /* IrDA is managed in other way */ - GPIO46_GPIO, - GPIO47_GPIO, -}; - -/* - * SCOOP Device - */ -static struct resource tosa_scoop_resources[] = { - [0] = { - .start = TOSA_CF_PHYS, - .end = TOSA_CF_PHYS + 0xfff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct scoop_config tosa_scoop_setup = { - .io_dir = TOSA_SCOOP_IO_DIR, - .gpio_base = TOSA_SCOOP_GPIO_BASE, -}; - -static struct platform_device tosascoop_device = { - .name = "sharp-scoop", - .id = 0, - .dev = { - .platform_data = &tosa_scoop_setup, - }, - .num_resources = ARRAY_SIZE(tosa_scoop_resources), - .resource = tosa_scoop_resources, -}; - - -/* - * SCOOP Device Jacket - */ -static struct resource tosa_scoop_jc_resources[] = { - [0] = { - .start = TOSA_SCOOP_PHYS + 0x40, - .end = TOSA_SCOOP_PHYS + 0xfff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct scoop_config tosa_scoop_jc_setup = { - .io_dir = TOSA_SCOOP_JC_IO_DIR, - .gpio_base = TOSA_SCOOP_JC_GPIO_BASE, -}; - -static struct platform_device tosascoop_jc_device = { - .name = "sharp-scoop", - .id = 1, - .dev = { - .platform_data = &tosa_scoop_jc_setup, - .parent = &tosascoop_device.dev, - }, - .num_resources = ARRAY_SIZE(tosa_scoop_jc_resources), - .resource = tosa_scoop_jc_resources, -}; - -/* - * PCMCIA - */ -static struct scoop_pcmcia_dev tosa_pcmcia_scoop[] = { -{ - .dev = &tosascoop_device.dev, - .irq = TOSA_IRQ_GPIO_CF_IRQ, - .cd_irq = TOSA_IRQ_GPIO_CF_CD, - .cd_irq_str = "PCMCIA0 CD", -},{ - .dev = &tosascoop_jc_device.dev, - .irq = TOSA_IRQ_GPIO_JC_CF_IRQ, - .cd_irq = -1, -}, -}; - -static struct scoop_pcmcia_config tosa_pcmcia_config = { - .devs = &tosa_pcmcia_scoop[0], - .num_devs = 2, -}; - -/* - * USB Device Controller - */ -static struct gpiod_lookup_table tosa_udc_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_USB_IN, - "vbus", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_USB_PULLUP, - "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device tosa_gpio_vbus = { - .name = "gpio-vbus", - .id = -1, -}; - -/* - * MMC/SD Device - */ -static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void *data) -{ - int err; - - err = gpio_request(TOSA_GPIO_nSD_INT, "SD Int"); - if (err) { - printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n"); - goto err_gpio_int; - } - err = gpio_direction_input(TOSA_GPIO_nSD_INT); - if (err) - goto err_gpio_int_dir; - - return 0; - -err_gpio_int_dir: - gpio_free(TOSA_GPIO_nSD_INT); -err_gpio_int: - return err; -} - -static void tosa_mci_exit(struct device *dev, void *data) -{ - gpio_free(TOSA_GPIO_nSD_INT); -} - -static struct pxamci_platform_data tosa_mci_platform_data = { - .detect_delay_ms = 250, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .init = tosa_mci_init, - .exit = tosa_mci_exit, -}; - -static struct gpiod_lookup_table tosa_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_nSD_DETECT, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("sharp-scoop.0", TOSA_GPIO_SD_WP - TOSA_SCOOP_GPIO_BASE, - "wp", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("sharp-scoop.0", TOSA_GPIO_PWR_ON - TOSA_SCOOP_GPIO_BASE, - "power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* - * Irda - */ -static void tosa_irda_transceiver_mode(struct device *dev, int mode) -{ - if (mode & IR_OFF) { - gpio_set_value(TOSA_GPIO_IR_POWERDWN, 0); - pxa2xx_transceiver_mode(dev, mode); - gpio_direction_output(TOSA_GPIO_IRDA_TX, 0); - } else { - pxa2xx_transceiver_mode(dev, mode); - gpio_set_value(TOSA_GPIO_IR_POWERDWN, 1); - } -} - -static int tosa_irda_startup(struct device *dev) -{ - int ret; - - ret = gpio_request(TOSA_GPIO_IRDA_TX, "IrDA TX"); - if (ret) - goto err_tx; - ret = gpio_direction_output(TOSA_GPIO_IRDA_TX, 0); - if (ret) - goto err_tx_dir; - - ret = gpio_request(TOSA_GPIO_IR_POWERDWN, "IrDA powerdown"); - if (ret) - goto err_pwr; - - ret = gpio_direction_output(TOSA_GPIO_IR_POWERDWN, 0); - if (ret) - goto err_pwr_dir; - - tosa_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF); - - return 0; - -err_pwr_dir: - gpio_free(TOSA_GPIO_IR_POWERDWN); -err_pwr: -err_tx_dir: - gpio_free(TOSA_GPIO_IRDA_TX); -err_tx: - return ret; -} - -static void tosa_irda_shutdown(struct device *dev) -{ - tosa_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF); - gpio_free(TOSA_GPIO_IR_POWERDWN); - gpio_free(TOSA_GPIO_IRDA_TX); -} - -static struct pxaficp_platform_data tosa_ficp_platform_data = { - .gpio_pwdown = -1, - .transceiver_cap = IR_SIRMODE | IR_OFF, - .transceiver_mode = tosa_irda_transceiver_mode, - .startup = tosa_irda_startup, - .shutdown = tosa_irda_shutdown, -}; - -/* - * Tosa AC IN - */ -static struct gpiod_lookup_table tosa_power_gpiod_table = { - .dev_id = "gpio-charger", - .table = { - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_AC_IN, - NULL, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static char *tosa_ac_supplied_to[] = { - "main-battery", - "backup-battery", - "jacket-battery", -}; - -static struct gpio_charger_platform_data tosa_power_data = { - .name = "charger", - .type = POWER_SUPPLY_TYPE_MAINS, - .supplied_to = tosa_ac_supplied_to, - .num_supplicants = ARRAY_SIZE(tosa_ac_supplied_to), -}; - -static struct resource tosa_power_resource[] = { - { - .name = "ac", - .start = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN), - .end = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN), - .flags = IORESOURCE_IRQ | - IORESOURCE_IRQ_HIGHEDGE | - IORESOURCE_IRQ_LOWEDGE, - }, -}; - -static struct platform_device tosa_power_device = { - .name = "gpio-charger", - .id = -1, - .dev.platform_data = &tosa_power_data, - .resource = tosa_power_resource, - .num_resources = ARRAY_SIZE(tosa_power_resource), -}; - -/* - * Tosa Keyboard - */ -static const uint32_t tosakbd_keymap[] = { - KEY(0, 1, KEY_W), - KEY(0, 5, KEY_K), - KEY(0, 6, KEY_BACKSPACE), - KEY(0, 7, KEY_P), - KEY(1, 0, KEY_Q), - KEY(1, 1, KEY_E), - KEY(1, 2, KEY_T), - KEY(1, 3, KEY_Y), - KEY(1, 5, KEY_O), - KEY(1, 6, KEY_I), - KEY(1, 7, KEY_COMMA), - KEY(2, 0, KEY_A), - KEY(2, 1, KEY_D), - KEY(2, 2, KEY_G), - KEY(2, 3, KEY_U), - KEY(2, 5, KEY_L), - KEY(2, 6, KEY_ENTER), - KEY(2, 7, KEY_DOT), - KEY(3, 0, KEY_Z), - KEY(3, 1, KEY_C), - KEY(3, 2, KEY_V), - KEY(3, 3, KEY_J), - KEY(3, 4, TOSA_KEY_ADDRESSBOOK), - KEY(3, 5, TOSA_KEY_CANCEL), - KEY(3, 6, TOSA_KEY_CENTER), - KEY(3, 7, TOSA_KEY_OK), - KEY(3, 8, KEY_LEFTSHIFT), - KEY(4, 0, KEY_S), - KEY(4, 1, KEY_R), - KEY(4, 2, KEY_B), - KEY(4, 3, KEY_N), - KEY(4, 4, TOSA_KEY_CALENDAR), - KEY(4, 5, TOSA_KEY_HOMEPAGE), - KEY(4, 6, KEY_LEFTCTRL), - KEY(4, 7, TOSA_KEY_LIGHT), - KEY(4, 9, KEY_RIGHTSHIFT), - KEY(5, 0, KEY_TAB), - KEY(5, 1, KEY_SLASH), - KEY(5, 2, KEY_H), - KEY(5, 3, KEY_M), - KEY(5, 4, TOSA_KEY_MENU), - KEY(5, 6, KEY_UP), - KEY(5, 10, TOSA_KEY_FN), - KEY(6, 0, KEY_X), - KEY(6, 1, KEY_F), - KEY(6, 2, KEY_SPACE), - KEY(6, 3, KEY_APOSTROPHE), - KEY(6, 4, TOSA_KEY_MAIL), - KEY(6, 5, KEY_LEFT), - KEY(6, 6, KEY_DOWN), - KEY(6, 7, KEY_RIGHT), -}; - -static struct matrix_keymap_data tosakbd_keymap_data = { - .keymap = tosakbd_keymap, - .keymap_size = ARRAY_SIZE(tosakbd_keymap), -}; - -static const int tosakbd_col_gpios[] = - { 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68 }; -static const int tosakbd_row_gpios[] = - { 69, 70, 71, 72, 73, 74, 75 }; - -static struct matrix_keypad_platform_data tosakbd_pdata = { - .keymap_data = &tosakbd_keymap_data, - .row_gpios = tosakbd_row_gpios, - .col_gpios = tosakbd_col_gpios, - .num_row_gpios = ARRAY_SIZE(tosakbd_row_gpios), - .num_col_gpios = ARRAY_SIZE(tosakbd_col_gpios), - .col_scan_delay_us = 10, - .debounce_ms = 10, - .wakeup = 1, -}; - -static struct platform_device tosakbd_device = { - .name = "matrix-keypad", - .id = -1, - .dev = { - .platform_data = &tosakbd_pdata, - }, -}; - -static struct gpio_keys_button tosa_gpio_keys[] = { - /* - * Two following keys are directly tied to "ON" button of tosa. Why? - * The first one can be used as a wakeup source, the second can't; - * also the first one is OR of ac_powered and on_button. - */ - { - .type = EV_PWR, - .code = KEY_RESERVED, - .gpio = TOSA_GPIO_POWERON, - .desc = "Poweron", - .wakeup = 1, - .active_low = 1, - }, - { - .type = EV_PWR, - .code = KEY_SUSPEND, - .gpio = TOSA_GPIO_ON_KEY, - .desc = "On key", - /* - * can't be used as wakeup - * .wakeup = 1, - */ - .active_low = 1, - }, - { - .type = EV_KEY, - .code = TOSA_KEY_RECORD, - .gpio = TOSA_GPIO_RECORD_BTN, - .desc = "Record Button", - .wakeup = 1, - .active_low = 1, - }, - { - .type = EV_KEY, - .code = TOSA_KEY_SYNC, - .gpio = TOSA_GPIO_SYNC, - .desc = "Sync Button", - .wakeup = 1, - .active_low = 1, - }, - { - .type = EV_SW, - .code = SW_HEADPHONE_INSERT, - .gpio = TOSA_GPIO_EAR_IN, - .desc = "HeadPhone insert", - .active_low = 1, - .debounce_interval = 300, - }, -}; - -static struct gpio_keys_platform_data tosa_gpio_keys_platform_data = { - .buttons = tosa_gpio_keys, - .nbuttons = ARRAY_SIZE(tosa_gpio_keys), -}; - -static struct platform_device tosa_gpio_keys_device = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &tosa_gpio_keys_platform_data, - }, -}; - -/* - * Tosa LEDs - */ -static struct gpio_led tosa_gpio_leds[] = { - { - .name = "tosa:amber:charge", - .default_trigger = "main-battery-charging", - .gpio = TOSA_GPIO_CHRG_ERR_LED, - }, - { - .name = "tosa:green:mail", - .default_trigger = "nand-disk", - .gpio = TOSA_GPIO_NOTE_LED, - }, - { - .name = "tosa:dual:wlan", - .default_trigger = "none", - .gpio = TOSA_GPIO_WLAN_LED, - }, - { - .name = "tosa:blue:bluetooth", - .default_trigger = "tosa-bt", - .gpio = TOSA_GPIO_BT_LED, - }, -}; - -static struct gpio_led_platform_data tosa_gpio_leds_platform_data = { - .leds = tosa_gpio_leds, - .num_leds = ARRAY_SIZE(tosa_gpio_leds), -}; - -static struct platform_device tosaled_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &tosa_gpio_leds_platform_data, - }, -}; - -/* - * Toshiba Mobile IO Controller - */ -static struct resource tc6393xb_resources[] = { - [0] = { - .start = TOSA_LCDC_PHYS, - .end = TOSA_LCDC_PHYS + 0x3ffffff, - .flags = IORESOURCE_MEM, - }, - - [1] = { - .start = TOSA_IRQ_GPIO_TC6393XB_INT, - .end = TOSA_IRQ_GPIO_TC6393XB_INT, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct gpiod_lookup_table tosa_battery_gpio_table = { - .dev_id = "wm97xx-battery", - .table = { - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_BAT0_CRG, - "main battery full", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_BAT1_CRG, - "jacket battery full", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_BAT0_LOW, - "main battery low", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_BAT1_LOW, - "jacket battery low", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_JACKET_DETECT, - "jacket detect", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static int tosa_tc6393xb_enable(struct platform_device *dev) -{ - int rc; - - rc = gpio_request(TOSA_GPIO_TC6393XB_REST_IN, "tc6393xb #pclr"); - if (rc) - goto err_req_pclr; - rc = gpio_request(TOSA_GPIO_TC6393XB_SUSPEND, "tc6393xb #suspend"); - if (rc) - goto err_req_suspend; - rc = gpio_request(TOSA_GPIO_TC6393XB_L3V_ON, "tc6393xb l3v"); - if (rc) - goto err_req_l3v; - rc = gpio_direction_output(TOSA_GPIO_TC6393XB_L3V_ON, 0); - if (rc) - goto err_dir_l3v; - rc = gpio_direction_output(TOSA_GPIO_TC6393XB_SUSPEND, 0); - if (rc) - goto err_dir_suspend; - rc = gpio_direction_output(TOSA_GPIO_TC6393XB_REST_IN, 0); - if (rc) - goto err_dir_pclr; - - mdelay(1); - - gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 1); - - mdelay(10); - - gpio_set_value(TOSA_GPIO_TC6393XB_REST_IN, 1); - gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 1); - - return 0; -err_dir_pclr: -err_dir_suspend: -err_dir_l3v: - gpio_free(TOSA_GPIO_TC6393XB_L3V_ON); -err_req_l3v: - gpio_free(TOSA_GPIO_TC6393XB_SUSPEND); -err_req_suspend: - gpio_free(TOSA_GPIO_TC6393XB_REST_IN); -err_req_pclr: - return rc; -} - -static void tosa_tc6393xb_disable(struct platform_device *dev) -{ - gpio_free(TOSA_GPIO_TC6393XB_L3V_ON); - gpio_free(TOSA_GPIO_TC6393XB_SUSPEND); - gpio_free(TOSA_GPIO_TC6393XB_REST_IN); -} - -static int tosa_tc6393xb_resume(struct platform_device *dev) -{ - gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 1); - mdelay(10); - gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 1); - mdelay(10); - - return 0; -} - -static int tosa_tc6393xb_suspend(struct platform_device *dev) -{ - gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 0); - gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 0); - return 0; -} - -static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; - -static struct nand_bbt_descr tosa_tc6393xb_nand_bbt = { - .options = 0, - .offs = 4, - .len = 2, - .pattern = scan_ff_pattern -}; - -static const char * const probes[] = { - "cmdlinepart", - "ofpart", - "sharpslpart", - NULL, -}; - -static struct tmio_nand_data tosa_tc6393xb_nand_config = { - .badblock_pattern = &tosa_tc6393xb_nand_bbt, - .part_parsers = probes, -}; - -#ifdef CONFIG_MFD_TC6393XB -static struct fb_videomode tosa_tc6393xb_lcd_mode[] = { - { - .xres = 480, - .yres = 640, - .pixclock = 0x002cdf00,/* PLL divisor */ - .left_margin = 0x004c, - .right_margin = 0x005b, - .upper_margin = 0x0001, - .lower_margin = 0x000d, - .hsync_len = 0x0002, - .vsync_len = 0x0001, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - },{ - .xres = 240, - .yres = 320, - .pixclock = 0x00e7f203,/* PLL divisor */ - .left_margin = 0x0024, - .right_margin = 0x002f, - .upper_margin = 0x0001, - .lower_margin = 0x000d, - .hsync_len = 0x0002, - .vsync_len = 0x0001, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - } -}; - -static struct tmio_fb_data tosa_tc6393xb_fb_config = { - .lcd_set_power = tc6393xb_lcd_set_power, - .lcd_mode = tc6393xb_lcd_mode, - .num_modes = ARRAY_SIZE(tosa_tc6393xb_lcd_mode), - .modes = &tosa_tc6393xb_lcd_mode[0], - .height = 82, - .width = 60, -}; -#endif - -static struct tc6393xb_platform_data tosa_tc6393xb_data = { - .scr_pll2cr = 0x0cc1, - .scr_gper = 0x3300, - - .irq_base = IRQ_BOARD_START, - - .enable = tosa_tc6393xb_enable, - .disable = tosa_tc6393xb_disable, - .suspend = tosa_tc6393xb_suspend, - .resume = tosa_tc6393xb_resume, - - .nand_data = &tosa_tc6393xb_nand_config, -#ifdef CONFIG_MFD_TC6393XB - .fb_data = &tosa_tc6393xb_fb_config, -#endif - - .resume_restore = 1, -}; - - -static struct platform_device tc6393xb_device = { - .name = "tc6393xb", - .id = -1, - .dev = { - .platform_data = &tosa_tc6393xb_data, - }, - .num_resources = ARRAY_SIZE(tc6393xb_resources), - .resource = tc6393xb_resources, -}; - -static struct tosa_bt_data tosa_bt_data = { - .gpio_pwr = TOSA_GPIO_BT_PWR_EN, - .gpio_reset = TOSA_GPIO_BT_RESET, -}; - -static struct platform_device tosa_bt_device = { - .name = "tosa-bt", - .id = -1, - .dev.platform_data = &tosa_bt_data, -}; - -static struct pxa2xx_spi_controller pxa_ssp_master_info = { - .num_chipselect = 1, -}; - -static struct spi_board_info spi_board_info[] __initdata = { - { - .modalias = "tosa-lcd", - // .platform_data - .max_speed_hz = 28750, - .bus_num = 2, - .chip_select = 0, - .mode = SPI_MODE_0, - }, -}; - -static struct mtd_partition sharpsl_rom_parts[] = { - { - .name ="Boot PROM Filesystem", - .offset = 0x00160000, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data sharpsl_rom_data = { - .width = 2, - .nr_parts = ARRAY_SIZE(sharpsl_rom_parts), - .parts = sharpsl_rom_parts, -}; - -static struct resource sharpsl_rom_resources[] = { - { - .start = 0x00000000, - .end = 0x007fffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device sharpsl_rom_device = { - .name = "physmap-flash", - .id = -1, - .resource = sharpsl_rom_resources, - .num_resources = ARRAY_SIZE(sharpsl_rom_resources), - .dev.platform_data = &sharpsl_rom_data, -}; - -static struct platform_device wm9712_device = { - .name = "wm9712-codec", - .id = -1, -}; - -static struct platform_device tosa_audio_device = { - .name = "tosa-audio", - .id = -1, -}; - -static struct platform_device *devices[] __initdata = { - &tosascoop_device, - &tosascoop_jc_device, - &tc6393xb_device, - &tosa_power_device, - &tosakbd_device, - &tosa_gpio_keys_device, - &tosaled_device, - &tosa_bt_device, - &sharpsl_rom_device, - &wm9712_device, - &tosa_gpio_vbus, - &tosa_audio_device, -}; - -static void tosa_poweroff(void) -{ - pxa_restart(REBOOT_GPIO, NULL); -} - -static void tosa_restart(enum reboot_mode mode, const char *cmd) -{ - uint32_t msc0 = __raw_readl(MSC0); - - /* Bootloader magic for a reboot */ - if((msc0 & 0xffff0000) == 0x7ff00000) - __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0); - - tosa_poweroff(); -} - -static void __init tosa_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - gpio_set_wake(MFP_PIN_GPIO1, 1); - /* We can't pass to gpio-keys since it will drop the Reset altfunc */ - - init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0); - - pm_power_off = tosa_poweroff; - - PCFR |= PCFR_OPDE; - - /* enable batt_fault */ - PMCR = 0x01; - - gpiod_add_lookup_table(&tosa_battery_gpio_table); - - gpiod_add_lookup_table(&tosa_mci_gpio_table); - pxa_set_mci_info(&tosa_mci_platform_data); - pxa_set_ficp_info(&tosa_ficp_platform_data); - pxa_set_i2c_info(NULL); - pxa_set_ac97_info(NULL); - platform_scoop_config = &tosa_pcmcia_config; - - pxa2xx_set_spi_info(2, &pxa_ssp_master_info); - spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); - - clk_add_alias("CLK_CK3P6MI", tc6393xb_device.name, "GPIO11_CLK", NULL); - - gpiod_add_lookup_table(&tosa_udc_gpiod_table); - gpiod_add_lookup_table(&tosa_power_gpiod_table); - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static void __init fixup_tosa(struct tag *tags, char **cmdline) -{ - sharpsl_save_param(); - memblock_add(0xa0000000, SZ_64M); -} - -MACHINE_START(TOSA, "SHARP Tosa") - .fixup = fixup_tosa, - .map_io = pxa25x_map_io, - .nr_irqs = TOSA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_machine = tosa_init, - .init_time = pxa_timer_init, - .restart = tosa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/tosa.h b/arch/arm/mach-pxa/tosa.h deleted file mode 100644 index 3b3efa0a0e22..000000000000 --- a/arch/arm/mach-pxa/tosa.h +++ /dev/null @@ -1,165 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Hardware specific definitions for Sharp SL-C6000x series of PDAs - * - * Copyright (c) 2005 Dirk Opfer - * - * Based on Sharp's 2.4 kernel patches - */ -#ifndef _ASM_ARCH_TOSA_H_ -#define _ASM_ARCH_TOSA_H_ 1 - -#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ - -/* TOSA Chip selects */ -#define TOSA_LCDC_PHYS PXA_CS4_PHYS -/* Internel Scoop */ -#define TOSA_CF_PHYS (PXA_CS2_PHYS + 0x00800000) -/* Jacket Scoop */ -#define TOSA_SCOOP_PHYS (PXA_CS5_PHYS + 0x00800000) - -#define TOSA_NR_IRQS (IRQ_BOARD_START + TC6393XB_NR_IRQS) -/* - * SCOOP2 internal GPIOs - */ -#define TOSA_SCOOP_GPIO_BASE PXA_NR_BUILTIN_GPIO -#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 -#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1) -#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) -#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3) -#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4) -#define TOSA_SCOOP_AUD_PWR_ON SCOOP_GPCR_PA16 -#define TOSA_GPIO_BT_RESET (TOSA_SCOOP_GPIO_BASE + 6) -#define TOSA_GPIO_BT_PWR_EN (TOSA_SCOOP_GPIO_BASE + 7) -#define TOSA_SCOOP_AC_IN_OL SCOOP_GPCR_PA19 - -/* GPIO Direction 1 : output mode / 0:input mode */ -#define TOSA_SCOOP_IO_DIR (TOSA_SCOOP_PXA_VCORE1 | \ - TOSA_SCOOP_AUD_PWR_ON) - -/* - * SCOOP2 jacket GPIOs - */ -#define TOSA_SCOOP_JC_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12) -#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) -#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) -#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) -#define TOSA_GPIO_USB_PULLUP (TOSA_SCOOP_JC_GPIO_BASE + 3) -#define TOSA_GPIO_TC6393XB_SUSPEND (TOSA_SCOOP_JC_GPIO_BASE + 4) -#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5) -#define TOSA_SCOOP_JC_WLAN_DETECT SCOOP_GPCR_PA17 -#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7) -#define TOSA_SCOOP_JC_CARD_LIMIT_SEL SCOOP_GPCR_PA19 - -/* GPIO Direction 1 : output mode / 0:input mode */ -#define TOSA_SCOOP_JC_IO_DIR (TOSA_SCOOP_JC_CARD_LIMIT_SEL) - -/* - * PXA GPIOs - */ -#define TOSA_GPIO_POWERON (0) -#define TOSA_GPIO_RESET (1) -#define TOSA_GPIO_AC_IN (2) -#define TOSA_GPIO_RECORD_BTN (3) -#define TOSA_GPIO_SYNC (4) /* Cradle SYNC Button */ -#define TOSA_GPIO_USB_IN (5) -#define TOSA_GPIO_JACKET_DETECT (7) -#define TOSA_GPIO_nSD_DETECT (9) -#define TOSA_GPIO_nSD_INT (10) -#define TOSA_GPIO_TC6393XB_CLK (11) -#define TOSA_GPIO_BAT1_CRG (12) -#define TOSA_GPIO_CF_CD (13) -#define TOSA_GPIO_BAT0_CRG (14) -#define TOSA_GPIO_TC6393XB_INT (15) -#define TOSA_GPIO_BAT0_LOW (17) -#define TOSA_GPIO_TC6393XB_RDY (18) -#define TOSA_GPIO_ON_RESET (19) -#define TOSA_GPIO_EAR_IN (20) -#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */ -#define TOSA_GPIO_ON_KEY (22) -#define TOSA_GPIO_VGA_LINE (27) -#define TOSA_GPIO_TP_INT (32) /* Touch Panel pen down interrupt */ -#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */ -#define TOSA_GPIO_BAT_LOCKED (38) /* Battery locked */ -#define TOSA_GPIO_IRDA_TX (47) -#define TOSA_GPIO_TG_SPI_SCLK (81) -#define TOSA_GPIO_TG_SPI_CS (82) -#define TOSA_GPIO_TG_SPI_MOSI (83) -#define TOSA_GPIO_BAT1_LOW (84) - -#define TOSA_GPIO_HP_IN GPIO_EAR_IN - -#define TOSA_GPIO_MAIN_BAT_LOW GPIO_BAT0_LOW - -#define TOSA_KEY_STROBE_NUM (11) -#define TOSA_KEY_SENSE_NUM (7) - -#define TOSA_GPIO_HIGH_STROBE_BIT (0xfc000000) -#define TOSA_GPIO_LOW_STROBE_BIT (0x0000001f) -#define TOSA_GPIO_ALL_SENSE_BIT (0x00000fe0) -#define TOSA_GPIO_ALL_SENSE_RSHIFT (5) -#define TOSA_GPIO_STROBE_BIT(a) GPIO_bit(58+(a)) -#define TOSA_GPIO_SENSE_BIT(a) GPIO_bit(69+(a)) -#define TOSA_GAFR_HIGH_STROBE_BIT (0xfff00000) -#define TOSA_GAFR_LOW_STROBE_BIT (0x000003ff) -#define TOSA_GAFR_ALL_SENSE_BIT (0x00fffc00) -#define TOSA_GPIO_KEY_SENSE(a) (69+(a)) -#define TOSA_GPIO_KEY_STROBE(a) (58+(a)) - -/* - * Interrupts - */ -#define TOSA_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP) -#define TOSA_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN) -#define TOSA_IRQ_GPIO_RECORD_BTN PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN) -#define TOSA_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC) -#define TOSA_IRQ_GPIO_USB_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN) -#define TOSA_IRQ_GPIO_JACKET_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT) -#define TOSA_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT) -#define TOSA_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT) -#define TOSA_IRQ_GPIO_BAT1_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG) -#define TOSA_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD) -#define TOSA_IRQ_GPIO_BAT0_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG) -#define TOSA_IRQ_GPIO_TC6393XB_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT) -#define TOSA_IRQ_GPIO_BAT0_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW) -#define TOSA_IRQ_GPIO_EAR_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN) -#define TOSA_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ) -#define TOSA_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY) -#define TOSA_IRQ_GPIO_VGA_LINE PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE) -#define TOSA_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT) -#define TOSA_IRQ_GPIO_JC_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ) -#define TOSA_IRQ_GPIO_BAT_LOCKED PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED) -#define TOSA_IRQ_GPIO_BAT1_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW) -#define TOSA_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(69+(a)) - -#define TOSA_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW) - -#define TOSA_KEY_SYNC KEY_102ND /* ??? */ - -#ifndef CONFIG_TOSA_USE_EXT_KEYCODES -#define TOSA_KEY_RECORD KEY_YEN -#define TOSA_KEY_ADDRESSBOOK KEY_KATAKANA -#define TOSA_KEY_CANCEL KEY_ESC -#define TOSA_KEY_CENTER KEY_HIRAGANA -#define TOSA_KEY_OK KEY_HENKAN -#define TOSA_KEY_CALENDAR KEY_KATAKANAHIRAGANA -#define TOSA_KEY_HOMEPAGE KEY_HANGEUL -#define TOSA_KEY_LIGHT KEY_MUHENKAN -#define TOSA_KEY_MENU KEY_HANJA -#define TOSA_KEY_FN KEY_RIGHTALT -#define TOSA_KEY_MAIL KEY_ZENKAKUHANKAKU -#else -#define TOSA_KEY_RECORD KEY_RECORD -#define TOSA_KEY_ADDRESSBOOK KEY_ADDRESSBOOK -#define TOSA_KEY_CANCEL KEY_CANCEL -#define TOSA_KEY_CENTER KEY_SELECT /* ??? */ -#define TOSA_KEY_OK KEY_OK -#define TOSA_KEY_CALENDAR KEY_CALENDAR -#define TOSA_KEY_HOMEPAGE KEY_HOMEPAGE -#define TOSA_KEY_LIGHT KEY_KBDILLUMTOGGLE -#define TOSA_KEY_MENU KEY_MENU -#define TOSA_KEY_FN KEY_FN -#define TOSA_KEY_MAIL KEY_MAIL -#endif - -#endif /* _ASM_ARCH_TOSA_H_ */ diff --git a/arch/arm/mach-pxa/tosa_bt.h b/arch/arm/mach-pxa/tosa_bt.h deleted file mode 100644 index 56acd5dabec4..000000000000 --- a/arch/arm/mach-pxa/tosa_bt.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Tosa bluetooth built-in chip control. - * - * Later it may be shared with some other platforms. - * - * Copyright (c) 2008 Dmitry Baryshkov - */ -#ifndef TOSA_BT_H -#define TOSA_BT_H - -struct tosa_bt_data { - int gpio_pwr; - int gpio_reset; -}; - -#endif - diff --git a/arch/arm/mach-pxa/trizeps4-pcmcia.c b/arch/arm/mach-pxa/trizeps4-pcmcia.c deleted file mode 100644 index 25e363770565..000000000000 --- a/arch/arm/mach-pxa/trizeps4-pcmcia.c +++ /dev/null @@ -1,200 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_trizeps4.c - * - * TRIZEPS PCMCIA specific routines. - * - * Author: Jürgen Schindele - * Created: 20 02, 2006 - * Copyright: Jürgen Schindele - */ - -#include <linux/module.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> - -#include <asm/mach-types.h> -#include <asm/irq.h> - -#include "pxa2xx-regs.h" -#include "trizeps4.h" - -#include <pcmcia/soc_common.h> - -extern void board_pcmcia_power(int power); - -static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - /* we dont have voltage/card/ready detection - * so we dont need interrupts for it - */ - switch (skt->nr) { - case 0: - skt->stat[SOC_STAT_CD].gpio = GPIO_PCD; - skt->stat[SOC_STAT_CD].name = "cs0_cd"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_PRDY; - skt->stat[SOC_STAT_RDY].name = "cs0_rdy"; - break; - default: - break; - } - /* release the reset of this card */ - pr_debug("%s: sock %d irq %d\n", __func__, skt->nr, skt->socket.pci_irq); - - return 0; -} - -static unsigned long trizeps_pcmcia_status[2]; - -static void trizeps_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - unsigned short status = 0, change; - status = CFSR_readw(); - change = (status ^ trizeps_pcmcia_status[skt->nr]) & - ConXS_CFSR_BVD_MASK; - if (change) { - trizeps_pcmcia_status[skt->nr] = status; - if (status & ConXS_CFSR_BVD1) { - /* enable_irq empty */ - } else { - /* disable_irq empty */ - } - } - - switch (skt->nr) { - case 0: - /* just fill in fix states */ - state->bvd1 = (status & ConXS_CFSR_BVD1) ? 1 : 0; - state->bvd2 = (status & ConXS_CFSR_BVD2) ? 1 : 0; - state->vs_3v = (status & ConXS_CFSR_VS1) ? 0 : 1; - state->vs_Xv = (status & ConXS_CFSR_VS2) ? 0 : 1; - break; - -#ifndef CONFIG_MACH_TRIZEPS_CONXS - /* on ConXS we only have one slot. Second is inactive */ - case 1: - state->detect = 0; - state->ready = 0; - state->bvd1 = 0; - state->bvd2 = 0; - state->vs_3v = 0; - state->vs_Xv = 0; - break; - -#endif - } -} - -static int trizeps_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - int ret = 0; - unsigned short power = 0; - - /* we do nothing here just check a bit */ - switch (state->Vcc) { - case 0: power &= 0xfc; break; - case 33: power |= ConXS_BCR_S0_VCC_3V3; break; - case 50: - pr_err("%s(): Vcc 5V not supported in socket\n", __func__); - break; - default: - pr_err("%s(): bad Vcc %u\n", __func__, state->Vcc); - ret = -1; - } - - switch (state->Vpp) { - case 0: power &= 0xf3; break; - case 33: power |= ConXS_BCR_S0_VPP_3V3; break; - case 120: - pr_err("%s(): Vpp 12V not supported in socket\n", __func__); - break; - default: - if (state->Vpp != state->Vcc) { - pr_err("%s(): bad Vpp %u\n", __func__, state->Vpp); - ret = -1; - } - } - - switch (skt->nr) { - case 0: /* we only have 3.3V */ - board_pcmcia_power(power); - break; - -#ifndef CONFIG_MACH_TRIZEPS_CONXS - /* on ConXS we only have one slot. Second is inactive */ - case 1: -#endif - default: - break; - } - - return ret; -} - -static void trizeps_pcmcia_socket_init(struct soc_pcmcia_socket *skt) -{ - /* default is on */ - board_pcmcia_power(0x9); -} - -static void trizeps_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) -{ - board_pcmcia_power(0x0); -} - -static struct pcmcia_low_level trizeps_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = trizeps_pcmcia_hw_init, - .socket_state = trizeps_pcmcia_socket_state, - .configure_socket = trizeps_pcmcia_configure_socket, - .socket_init = trizeps_pcmcia_socket_init, - .socket_suspend = trizeps_pcmcia_socket_suspend, -#ifdef CONFIG_MACH_TRIZEPS_CONXS - .nr = 1, -#else - .nr = 2, -#endif - .first = 0, -}; - -static struct platform_device *trizeps_pcmcia_device; - -static int __init trizeps_pcmcia_init(void) -{ - int ret; - - if (!machine_is_trizeps4() && !machine_is_trizeps4wl()) - return -ENODEV; - - trizeps_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!trizeps_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(trizeps_pcmcia_device, - &trizeps_pcmcia_ops, sizeof(trizeps_pcmcia_ops)); - - if (ret == 0) - ret = platform_device_add(trizeps_pcmcia_device); - - if (ret) - platform_device_put(trizeps_pcmcia_device); - - return ret; -} - -static void __exit trizeps_pcmcia_exit(void) -{ - platform_device_unregister(trizeps_pcmcia_device); -} - -fs_initcall(trizeps_pcmcia_init); -module_exit(trizeps_pcmcia_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Juergen Schindele"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c deleted file mode 100644 index 716cce885379..000000000000 --- a/arch/arm/mach-pxa/trizeps4.c +++ /dev/null @@ -1,575 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/trizeps4.c - * - * Support for the Keith und Koep Trizeps4 Module Platform. - * - * Author: Jürgen Schindele - * Created: 20 02, 2006 - * Copyright: Jürgen Schindele - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <linux/leds.h> -#include <linux/export.h> -#include <linux/sched.h> -#include <linux/bitops.h> -#include <linux/fb.h> -#include <linux/ioport.h> -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/dm9000.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/partitions.h> -#include <linux/regulator/machine.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/types.h> -#include <asm/setup.h> -#include <asm/memory.h> -#include <asm/mach-types.h> -#include <asm/irq.h> -#include <linux/sizes.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/mach/flash.h> - -#include "pxa27x.h" -#include "trizeps4.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/irda-pxaficp.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include "smemc.h" - -#include "generic.h" -#include "devices.h" - -/* comment out the following line if you want to use the - * Standard UART from PXA for serial / irda transmission - * and acivate it if you have status leds connected */ -#define STATUS_LEDS_ON_STUART_PINS 1 - -/***************************************************************************** - * MultiFunctionPins of CPU - *****************************************************************************/ -static unsigned long trizeps4_pin_config[] __initdata = { - /* Chip Selects */ - GPIO15_nCS_1, /* DiskOnChip CS */ - GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */ - GPIO94_GPIO, /* DOC lock */ - - GPIO78_nCS_2, /* DM9000 CS */ - GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */ - - GPIO79_nCS_3, /* Logic CS */ - GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* LCD - 16bpp Active TFT */ - GPIOxx_LCD_TFT_16BPP, - - /* UART */ - GPIO9_FFUART_CTS, - GPIO10_FFUART_DCD, - GPIO16_FFUART_TXD, - GPIO33_FFUART_DSR, - GPIO38_FFUART_RI, - GPIO82_FFUART_DTR, - GPIO83_FFUART_RTS, - GPIO96_FFUART_RXD, - - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, -#ifdef STATUS_LEDS_ON_STUART_PINS - GPIO46_GPIO, - GPIO47_GPIO, -#else - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, -#endif - /* PCMCIA */ - GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */ - GPIO13_GPIO, /* TRIZEPS4_READY_NINT */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO54_nPCE_2, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - GPIO102_nPCE_1, - GPIO104_PSKTSEL, - - /* MultiMediaCard */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */ - - /* USB OHCI */ - GPIO88_USBH1_PWR, /* USBHPWR1 */ - GPIO89_USBH1_PEN, /* USBHPEN1 */ - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, -}; - -static unsigned long trizeps4wl_pin_config[] __initdata = { - /* SSP 2 */ - GPIO14_SSP2_SFRM, - GPIO19_SSP2_SCLK, - GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */ - GPIO86_SSP2_RXD, - GPIO87_SSP2_TXD, -}; - -/**************************************************************************** - * ONBOARD FLASH - ****************************************************************************/ -static struct mtd_partition trizeps4_partitions[] = { - { - .name = "Bootloader", - .offset = 0x00000000, - .size = 0x00040000, - .mask_flags = MTD_WRITEABLE /* force read-only */ - }, { - .name = "Backup", - .offset = 0x00040000, - .size = 0x00040000, - }, { - .name = "Image", - .offset = 0x00080000, - .size = 0x01080000, - }, { - .name = "IPSM", - .offset = 0x01100000, - .size = 0x00e00000, - }, { - .name = "Registry", - .offset = 0x01f00000, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct physmap_flash_data trizeps4_flash_data[] = { - { - .width = 4, /* bankwidth in bytes */ - .parts = trizeps4_partitions, - .nr_parts = ARRAY_SIZE(trizeps4_partitions) - } -}; - -static struct resource flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_32M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = trizeps4_flash_data, - }, - .resource = &flash_resource, - .num_resources = 1, -}; - -/**************************************************************************** - * DAVICOM DM9000 Ethernet - ****************************************************************************/ -static struct resource dm9000_resources[] = { - [0] = { - .start = TRIZEPS4_ETH_PHYS+0x300, - .end = TRIZEPS4_ETH_PHYS+0x400-1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = TRIZEPS4_ETH_PHYS+0x8300, - .end = TRIZEPS4_ETH_PHYS+0x8400-1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = TRIZEPS4_ETH_IRQ, - .end = TRIZEPS4_ETH_IRQ, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -static struct dm9000_plat_data tri_dm9000_platdata = { - .flags = DM9000_PLATF_32BITONLY, -}; - -static struct platform_device dm9000_device = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(dm9000_resources), - .resource = dm9000_resources, - .dev = { - .platform_data = &tri_dm9000_platdata, - } -}; - -/**************************************************************************** - * LED's on GPIO pins of PXA - ****************************************************************************/ -static struct gpio_led trizeps4_led[] = { -#ifdef STATUS_LEDS_ON_STUART_PINS - { - .name = "led0:orange:heartbeat", /* */ - .default_trigger = "heartbeat", - .gpio = GPIO_HEARTBEAT_LED, - .active_low = 1, - }, - { - .name = "led1:yellow:cpubusy", /* */ - .default_trigger = "cpu-busy", - .gpio = GPIO_SYS_BUSY_LED, - .active_low = 1, - }, -#endif -}; - -static struct gpio_led_platform_data trizeps4_led_data = { - .leds = trizeps4_led, - .num_leds = ARRAY_SIZE(trizeps4_led), -}; - -static struct platform_device leds_devices = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &trizeps4_led_data, - }, -}; - -static struct platform_device *trizeps4_devices[] __initdata = { - &flash_device, - &dm9000_device, - &leds_devices, -}; - -static struct platform_device *trizeps4wl_devices[] __initdata = { - &flash_device, - &leds_devices, -}; - -static short trizeps_conxs_bcr; - -/* PCCARD power switching supports only 3,3V */ -void board_pcmcia_power(int power) -{ - if (power) { - /* switch power on, put in reset and enable buffers */ - trizeps_conxs_bcr |= power; - trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; - trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN; - BCR_writew(trizeps_conxs_bcr); - /* wait a little */ - udelay(2000); - /* take reset away */ - trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET; - BCR_writew(trizeps_conxs_bcr); - udelay(2000); - } else { - /* put in reset */ - trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; - BCR_writew(trizeps_conxs_bcr); - udelay(1000); - /* switch power off */ - trizeps_conxs_bcr &= ~0xf; - BCR_writew(trizeps_conxs_bcr); - } - pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff", - trizeps_conxs_bcr); -} -EXPORT_SYMBOL(board_pcmcia_power); - -/* backlight power switching for LCD panel */ -static void board_backlight_power(int on) -{ - if (on) - trizeps_conxs_bcr |= ConXS_BCR_L_DISP; - else - trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; - - pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", - trizeps_conxs_bcr); - BCR_writew(trizeps_conxs_bcr); -} - -/* a I2C based RTC is known on CONXS board */ -static struct i2c_board_info trizeps4_i2c_devices[] __initdata = { - { I2C_BOARD_INFO("rtc-pcf8593", 0x51) } -}; - -/**************************************************************************** - * MMC card slot external to module - ****************************************************************************/ -static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, - void *data) -{ - int err; - - err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, - IRQF_TRIGGER_RISING, "MMC card detect", data); - if (err) { - printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request" - "MMC card detect IRQ\n"); - return -1; - } - return 0; -} - -static void trizeps4_mci_exit(struct device *dev, void *data) -{ - free_irq(TRIZEPS4_MMC_IRQ, data); -} - -static struct pxamci_platform_data trizeps4_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .detect_delay_ms= 10, - .init = trizeps4_mci_init, - .exit = trizeps4_mci_exit, - .get_ro = NULL, /* write-protection not supported */ - .setpower = NULL, /* power-switching not supported */ -}; - -/**************************************************************************** - * IRDA mode switching on stuart - ****************************************************************************/ -#ifndef STATUS_LEDS_ON_STUART_PINS -static short trizeps_conxs_ircr; - -static int trizeps4_irda_startup(struct device *dev) -{ - trizeps_conxs_ircr &= ~ConXS_IRCR_SD; - IRCR_writew(trizeps_conxs_ircr); - return 0; -} - -static void trizeps4_irda_shutdown(struct device *dev) -{ - trizeps_conxs_ircr |= ConXS_IRCR_SD; - IRCR_writew(trizeps_conxs_ircr); -} - -static void trizeps4_irda_transceiver_mode(struct device *dev, int mode) -{ - unsigned long flags; - - local_irq_save(flags); - /* Switch mode */ - if (mode & IR_SIRMODE) - trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */ - else if (mode & IR_FIRMODE) - trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */ - - /* Switch power */ - if (mode & IR_OFF) - trizeps_conxs_ircr |= ConXS_IRCR_SD; - else - trizeps_conxs_ircr &= ~ConXS_IRCR_SD; - - IRCR_writew(trizeps_conxs_ircr); - local_irq_restore(flags); - - pxa2xx_transceiver_mode(dev, mode); -} - -static struct pxaficp_platform_data trizeps4_ficp_platform_data = { - .gpio_pwdown = -1, - .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, - .transceiver_mode = trizeps4_irda_transceiver_mode, - .startup = trizeps4_irda_startup, - .shutdown = trizeps4_irda_shutdown, -}; -#endif - -/**************************************************************************** - * OHCI USB port - ****************************************************************************/ -static struct pxaohci_platform_data trizeps4_ohci_platform_data = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, -}; - -static struct map_desc trizeps4_io_desc[] __initdata = { - { /* ConXS CFSR */ - .virtual = TRIZEPS4_CFSR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - }, - { /* ConXS BCR */ - .virtual = TRIZEPS4_BOCR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - }, - { /* ConXS IRCR */ - .virtual = TRIZEPS4_IRCR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - }, - { /* ConXS DCR */ - .virtual = TRIZEPS4_DICR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - }, - { /* ConXS UPSR */ - .virtual = TRIZEPS4_UPSR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - } -}; - -static struct pxafb_mode_info sharp_lcd_mode = { - .pixclock = 78000, - .xres = 640, - .yres = 480, - .bpp = 8, - .hsync_len = 4, - .left_margin = 4, - .right_margin = 4, - .vsync_len = 2, - .upper_margin = 0, - .lower_margin = 0, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info sharp_lcd = { - .modes = &sharp_lcd_mode, - .num_modes = 1, - .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL, - .cmap_inverse = 0, - .cmap_static = 0, - .pxafb_backlight_power = board_backlight_power, -}; - -static struct pxafb_mode_info toshiba_lcd_mode = { - .pixclock = 39720, - .xres = 640, - .yres = 480, - .bpp = 8, - .hsync_len = 63, - .left_margin = 12, - .right_margin = 12, - .vsync_len = 4, - .upper_margin = 32, - .lower_margin = 10, - .sync = 0, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info toshiba_lcd = { - .modes = &toshiba_lcd_mode, - .num_modes = 1, - .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL), - .cmap_inverse = 0, - .cmap_static = 0, - .pxafb_backlight_power = board_backlight_power, -}; - -static void __init trizeps4_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config)); - if (machine_is_trizeps4wl()) { - pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config)); - platform_add_devices(trizeps4wl_devices, - ARRAY_SIZE(trizeps4wl_devices)); - } else { - platform_add_devices(trizeps4_devices, - ARRAY_SIZE(trizeps4_devices)); - } - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - if (0) /* dont know how to determine LCD */ - pxa_set_fb_info(NULL, &sharp_lcd); - else - pxa_set_fb_info(NULL, &toshiba_lcd); - - pxa_set_mci_info(&trizeps4_mci_platform_data); -#ifndef STATUS_LEDS_ON_STUART_PINS - pxa_set_ficp_info(&trizeps4_ficp_platform_data); -#endif - pxa_set_ohci_info(&trizeps4_ohci_platform_data); - pxa_set_ac97_info(NULL); - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, trizeps4_i2c_devices, - ARRAY_SIZE(trizeps4_i2c_devices)); - - /* this is the reset value */ - trizeps_conxs_bcr = 0x00A0; - - BCR_writew(trizeps_conxs_bcr); - board_backlight_power(1); - - regulator_has_full_constraints(); -} - -static void __init trizeps4_map_io(void) -{ - pxa27x_map_io(); - iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); - - if ((__raw_readl(MSC0) & 0x8) && (__raw_readl(BOOT_DEF) & 0x1)) { - /* if flash is 16 bit wide its a Trizeps4 WL */ - __machine_arch_type = MACH_TYPE_TRIZEPS4WL; - trizeps4_flash_data[0].width = 2; - } else { - /* if flash is 32 bit wide its a Trizeps4 */ - __machine_arch_type = MACH_TYPE_TRIZEPS4; - trizeps4_flash_data[0].width = 4; - } -} - -MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") - /* MAINTAINER("Jürgen Schindele") */ - .atag_offset = 0x100, - .init_machine = trizeps4_init, - .map_io = trizeps4_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END - -MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") - /* MAINTAINER("Jürgen Schindele") */ - .atag_offset = 0x100, - .init_machine = trizeps4_init, - .map_io = trizeps4_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/trizeps4.h b/arch/arm/mach-pxa/trizeps4.h deleted file mode 100644 index b6c19d155ef9..000000000000 --- a/arch/arm/mach-pxa/trizeps4.h +++ /dev/null @@ -1,166 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/************************************************************************ - * Include file for TRIZEPS4 SoM and ConXS eval-board - * Copyright (c) Jürgen Schindele - * 2006 - ************************************************************************/ - -/* - * Includes/Defines - */ -#ifndef _TRIPEPS4_H_ -#define _TRIPEPS4_H_ - -#include "addr-map.h" -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/* physical memory regions */ -#define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ -#define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */ -#define TRIZEPS4_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ -#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ -#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ - - /* Logic on ConXS-board CSFR register*/ -#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) - /* Logic on ConXS-board BOCR register*/ -#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) - /* Logic on ConXS-board IRCR register*/ -#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) - /* Logic on ConXS-board UPSR register*/ -#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) - /* Logic on ConXS-board DICR register*/ -#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) - -/* virtual memory regions */ -#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ - -#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */ -#define TRIZEPS4_CFSR_VIRT 0xF0100000 -#define TRIZEPS4_BOCR_VIRT 0xF0200000 -#define TRIZEPS4_DICR_VIRT 0xF0300000 -#define TRIZEPS4_IRCR_VIRT 0xF0400000 -#define TRIZEPS4_UPSR_VIRT 0xF0500000 - -/* size of flash */ -#define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ - -/* Ethernet Controller Davicom DM9000 */ -#define GPIO_DM9000 101 -#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000) - -/* UCB1400 audio / TS-controller */ -#define GPIO_UCB1400 1 -#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400) - -/* PCMCIA socket Compact Flash */ -#define GPIO_PCD 11 /* PCMCIA Card Detect */ -#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD) -#define GPIO_PRDY 13 /* READY / nINT */ -#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY) - -/* MMC socket */ -#define GPIO_MMC_DET 12 -#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET) - -/* DOC NAND chip */ -#define GPIO_DOC_LOCK 94 -#define GPIO_DOC_IRQ 93 -#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ) - -/* SPI interface */ -#define GPIO_SPI 53 -#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI) - -/* LEDS using tx2 / rx2 */ -#define GPIO_SYS_BUSY_LED 46 -#define GPIO_HEARTBEAT_LED 47 - -/* Off-module PIC on ConXS board */ -#define GPIO_PIC 0 -#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC) - -#ifdef CONFIG_MACH_TRIZEPS_CONXS -/* for CONXS base board define these registers */ -#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) -#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) - -#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) -#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) - -#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) -#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) - -#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) -#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) - -#ifndef __ASSEMBLY__ -static inline unsigned short CFSR_readw(void) -{ - /* [Compact Flash Status Register] is read only */ - return *((unsigned short *)CFSR_P2V(0x0C000000)); -} -static inline void BCR_writew(unsigned short value) -{ - /* [Board Control Regsiter] is write only */ - *((unsigned short *)BCR_P2V(0x0E000000)) = value; -} -static inline void DCR_writew(unsigned short value) -{ - /* [Display Control Register] is write only */ - *((unsigned short *)DCR_P2V(0x0E000000)) = value; -} -static inline void IRCR_writew(unsigned short value) -{ - /* [InfraRed data Control Register] is write only */ - *((unsigned short *)IRCR_P2V(0x0E000000)) = value; -} -#else -#define ConXS_CFSR CFSR_P2V(0x0C000000) -#define ConXS_BCR BCR_P2V(0x0E000000) -#define ConXS_DCR DCR_P2V(0x0F800000) -#define ConXS_IRCR IRCR_P2V(0x0F800000) -#endif -#else -/* for whatever baseboard define function registers */ -static inline unsigned short CFSR_readw(void) -{ - return 0; -} -static inline void BCR_writew(unsigned short value) -{ - ; -} -static inline void DCR_writew(unsigned short value) -{ - ; -} -static inline void IRCR_writew(unsigned short value) -{ - ; -} -#endif /* CONFIG_MACH_TRIZEPS_CONXS */ - -#define ConXS_CFSR_BVD_MASK 0x0003 -#define ConXS_CFSR_BVD1 (1 << 0) -#define ConXS_CFSR_BVD2 (1 << 1) -#define ConXS_CFSR_VS_MASK 0x000C -#define ConXS_CFSR_VS1 (1 << 2) -#define ConXS_CFSR_VS2 (1 << 3) -#define ConXS_CFSR_VS_5V (0x3 << 2) -#define ConXS_CFSR_VS_3V3 0x0 - -#define ConXS_BCR_S0_POW_EN0 (1 << 0) -#define ConXS_BCR_S0_POW_EN1 (1 << 1) -#define ConXS_BCR_L_DISP (1 << 4) -#define ConXS_BCR_CF_BUF_EN (1 << 5) -#define ConXS_BCR_CF_RESET (1 << 7) -#define ConXS_BCR_S0_VCC_3V3 0x1 -#define ConXS_BCR_S0_VCC_5V0 0x2 -#define ConXS_BCR_S0_VPP_12V 0x4 -#define ConXS_BCR_S0_VPP_3V3 0x8 - -#define ConXS_IRCR_MODE (1 << 0) -#define ConXS_IRCR_SD (1 << 1) - -#endif /* _TRIPEPS4_H_ */ diff --git a/arch/arm/mach-pxa/viper-pcmcia.c b/arch/arm/mach-pxa/viper-pcmcia.c deleted file mode 100644 index 26599dcc49b3..000000000000 --- a/arch/arm/mach-pxa/viper-pcmcia.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Viper/Zeus PCMCIA support - * Copyright 2004 Arcom Control Systems - * - * Maintained by Marc Zyngier <maz@misterjones.org> - * - * Based on: - * iPAQ h2200 PCMCIA support - * Copyright 2004 Koen Kooi <koen@vestingbar.nl> - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#include <linux/module.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> - -#include <pcmcia/ss.h> -#include <pcmcia/soc_common.h> - -#include <asm/irq.h> - -#include "viper-pcmcia.h" - -static struct platform_device *arcom_pcmcia_dev; - -static inline struct arcom_pcmcia_pdata *viper_get_pdata(void) -{ - return arcom_pcmcia_dev->dev.platform_data; -} - -static int viper_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - unsigned long flags; - - skt->stat[SOC_STAT_CD].gpio = pdata->cd_gpio; - skt->stat[SOC_STAT_CD].name = "PCMCIA_CD"; - skt->stat[SOC_STAT_RDY].gpio = pdata->rdy_gpio; - skt->stat[SOC_STAT_RDY].name = "CF ready"; - - if (gpio_request(pdata->pwr_gpio, "CF power")) - goto err_request_pwr; - - local_irq_save(flags); - - if (gpio_direction_output(pdata->pwr_gpio, 0)) { - local_irq_restore(flags); - goto err_dir; - } - - local_irq_restore(flags); - - return 0; - -err_dir: - gpio_free(pdata->pwr_gpio); -err_request_pwr: - dev_err(&arcom_pcmcia_dev->dev, "Failed to setup PCMCIA GPIOs\n"); - return -1; -} - -/* - * Release all resources. - */ -static void viper_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - - gpio_free(pdata->pwr_gpio); -} - -static void viper_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; /* Can only apply 3.3V */ - state->vs_Xv = 0; -} - -static int viper_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - - /* Silently ignore Vpp, output enable, speaker enable. */ - pdata->reset(state->flags & SS_RESET); - - /* Apply socket voltage */ - switch (state->Vcc) { - case 0: - gpio_set_value(pdata->pwr_gpio, 0); - break; - case 33: - gpio_set_value(pdata->pwr_gpio, 1); - break; - default: - dev_err(&arcom_pcmcia_dev->dev, "Unsupported Vcc:%d\n", state->Vcc); - return -1; - } - - return 0; -} - -static struct pcmcia_low_level viper_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = viper_pcmcia_hw_init, - .hw_shutdown = viper_pcmcia_hw_shutdown, - .socket_state = viper_pcmcia_socket_state, - .configure_socket = viper_pcmcia_configure_socket, - .nr = 1, -}; - -static struct platform_device *viper_pcmcia_device; - -static int viper_pcmcia_probe(struct platform_device *pdev) -{ - int ret; - - /* I can't imagine more than one device, but you never know... */ - if (arcom_pcmcia_dev) - return -EEXIST; - - if (!pdev->dev.platform_data) - return -EINVAL; - - viper_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!viper_pcmcia_device) - return -ENOMEM; - - arcom_pcmcia_dev = pdev; - - viper_pcmcia_device->dev.parent = &pdev->dev; - - ret = platform_device_add_data(viper_pcmcia_device, - &viper_pcmcia_ops, - sizeof(viper_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(viper_pcmcia_device); - - if (ret) { - platform_device_put(viper_pcmcia_device); - arcom_pcmcia_dev = NULL; - } - - return ret; -} - -static int viper_pcmcia_remove(struct platform_device *pdev) -{ - platform_device_unregister(viper_pcmcia_device); - arcom_pcmcia_dev = NULL; - return 0; -} - -static struct platform_device_id viper_pcmcia_id_table[] = { - { .name = "viper-pcmcia", }, - { .name = "zeus-pcmcia", }, - { }, -}; - -static struct platform_driver viper_pcmcia_driver = { - .probe = viper_pcmcia_probe, - .remove = viper_pcmcia_remove, - .driver = { - .name = "arcom-pcmcia", - }, - .id_table = viper_pcmcia_id_table, -}; - -module_platform_driver(viper_pcmcia_driver); - -MODULE_DEVICE_TABLE(platform, viper_pcmcia_id_table); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/viper-pcmcia.h b/arch/arm/mach-pxa/viper-pcmcia.h deleted file mode 100644 index a23b58aff9e1..000000000000 --- a/arch/arm/mach-pxa/viper-pcmcia.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ARCOM_PCMCIA_H -#define __ARCOM_PCMCIA_H - -struct arcom_pcmcia_pdata { - int cd_gpio; - int rdy_gpio; - int pwr_gpio; - void (*reset)(int state); -}; - -#endif diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c deleted file mode 100644 index 5b43351ee840..000000000000 --- a/arch/arm/mach-pxa/viper.c +++ /dev/null @@ -1,1034 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/viper.c - * - * Support for the Arcom VIPER SBC. - * - * Author: Ian Campbell - * Created: Feb 03, 2003 - * Copyright: Arcom Control Systems - * - * Maintained by Marc Zyngier <maz@misterjones.org> - * <marc.zyngier@altran.com> - * - * Based on lubbock.c: - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - */ - -#include <linux/types.h> -#include <linux/memory.h> -#include <linux/cpu.h> -#include <linux/cpufreq.h> -#include <linux/delay.h> -#include <linux/fs.h> -#include <linux/init.h> -#include <linux/slab.h> -#include <linux/interrupt.h> -#include <linux/major.h> -#include <linux/module.h> -#include <linux/pm.h> -#include <linux/sched.h> -#include <linux/gpio.h> -#include <linux/jiffies.h> -#include <linux/platform_data/i2c-gpio.h> -#include <linux/gpio/machine.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/serial_8250.h> -#include <linux/smc91x.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/usb/isp116x.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/syscore_ops.h> - -#include "pxa25x.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/video-pxafb.h> -#include "regs-uart.h" -#include "viper-pcmcia.h" -#include "viper.h" - -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <asm/irq.h> -#include <linux/sizes.h> -#include <asm/system_info.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "generic.h" -#include "devices.h" - -static unsigned int icr; - -static void viper_icr_set_bit(unsigned int bit) -{ - icr |= bit; - VIPER_ICR = icr; -} - -static void viper_icr_clear_bit(unsigned int bit) -{ - icr &= ~bit; - VIPER_ICR = icr; -} - -/* This function is used from the pcmcia module to reset the CF */ -static void viper_cf_reset(int state) -{ - if (state) - viper_icr_set_bit(VIPER_ICR_CF_RST); - else - viper_icr_clear_bit(VIPER_ICR_CF_RST); -} - -static struct arcom_pcmcia_pdata viper_pcmcia_info = { - .cd_gpio = VIPER_CF_CD_GPIO, - .rdy_gpio = VIPER_CF_RDY_GPIO, - .pwr_gpio = VIPER_CF_POWER_GPIO, - .reset = viper_cf_reset, -}; - -static struct platform_device viper_pcmcia_device = { - .name = "viper-pcmcia", - .id = -1, - .dev = { - .platform_data = &viper_pcmcia_info, - }, -}; - -/* - * The CPLD version register was not present on VIPER boards prior to - * v2i1. On v1 boards where the version register is not present we - * will just read back the previous value from the databus. - * - * Therefore we do two reads. The first time we write 0 to the - * (read-only) register before reading and the second time we write - * 0xff first. If the two reads do not match or they read back as 0xff - * or 0x00 then we have version 1 hardware. - */ -static u8 viper_hw_version(void) -{ - u8 v1, v2; - unsigned long flags; - - local_irq_save(flags); - - VIPER_VERSION = 0; - v1 = VIPER_VERSION; - VIPER_VERSION = 0xff; - v2 = VIPER_VERSION; - - v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; - - local_irq_restore(flags); - return v1; -} - -/* CPU system core operations. */ -static int viper_cpu_suspend(void) -{ - viper_icr_set_bit(VIPER_ICR_R_DIS); - return 0; -} - -static void viper_cpu_resume(void) -{ - viper_icr_clear_bit(VIPER_ICR_R_DIS); -} - -static struct syscore_ops viper_cpu_syscore_ops = { - .suspend = viper_cpu_suspend, - .resume = viper_cpu_resume, -}; - -static unsigned int current_voltage_divisor; - -/* - * If force is not true then step from existing to new divisor. If - * force is true then jump straight to the new divisor. Stepping is - * used because if the jump in voltage is too large, the VCC can dip - * too low and the regulator cuts out. - * - * force can be used to initialize the divisor to a know state by - * setting the value for the current clock speed, since we are already - * running at that speed we know the voltage should be pretty close so - * the jump won't be too large - */ -static void viper_set_core_cpu_voltage(unsigned long khz, int force) -{ - int i = 0; - unsigned int divisor = 0; - const char *v; - - if (khz < 200000) { - v = "1.0"; divisor = 0xfff; - } else if (khz < 300000) { - v = "1.1"; divisor = 0xde5; - } else { - v = "1.3"; divisor = 0x325; - } - - pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n", - v, (int)khz / 1000, (int)khz % 1000); - -#define STEP 0x100 - do { - int step; - - if (force) - step = divisor; - else if (current_voltage_divisor < divisor - STEP) - step = current_voltage_divisor + STEP; - else if (current_voltage_divisor > divisor + STEP) - step = current_voltage_divisor - STEP; - else - step = divisor; - force = 0; - - gpio_set_value(VIPER_PSU_CLK_GPIO, 0); - gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); - - for (i = 1 << 11 ; i > 0 ; i >>= 1) { - udelay(1); - - gpio_set_value(VIPER_PSU_DATA_GPIO, step & i); - udelay(1); - - gpio_set_value(VIPER_PSU_CLK_GPIO, 1); - udelay(1); - - gpio_set_value(VIPER_PSU_CLK_GPIO, 0); - } - udelay(1); - - gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1); - udelay(1); - - gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); - - current_voltage_divisor = step; - } while (current_voltage_divisor != divisor); -} - -/* Interrupt handling */ -static unsigned long viper_irq_enabled_mask; -static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; -static const int viper_isa_irq_map[] = { - 0, /* ISA irq #0, invalid */ - 0, /* ISA irq #1, invalid */ - 0, /* ISA irq #2, invalid */ - 1 << 0, /* ISA irq #3 */ - 1 << 1, /* ISA irq #4 */ - 1 << 2, /* ISA irq #5 */ - 1 << 3, /* ISA irq #6 */ - 1 << 4, /* ISA irq #7 */ - 0, /* ISA irq #8, invalid */ - 1 << 8, /* ISA irq #9 */ - 1 << 5, /* ISA irq #10 */ - 1 << 6, /* ISA irq #11 */ - 1 << 7, /* ISA irq #12 */ - 0, /* ISA irq #13, invalid */ - 1 << 9, /* ISA irq #14 */ - 1 << 10, /* ISA irq #15 */ -}; - -static inline int viper_irq_to_bitmask(unsigned int irq) -{ - return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)]; -} - -static inline int viper_bit_to_irq(int bit) -{ - return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); -} - -static void viper_ack_irq(struct irq_data *d) -{ - int viper_irq = viper_irq_to_bitmask(d->irq); - - if (viper_irq & 0xff) - VIPER_LO_IRQ_STATUS = viper_irq; - else - VIPER_HI_IRQ_STATUS = (viper_irq >> 8); -} - -static void viper_mask_irq(struct irq_data *d) -{ - viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq)); -} - -static void viper_unmask_irq(struct irq_data *d) -{ - viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq); -} - -static inline unsigned long viper_irq_pending(void) -{ - return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) & - viper_irq_enabled_mask; -} - -static void viper_irq_handler(struct irq_desc *desc) -{ - unsigned int irq; - unsigned long pending; - - pending = viper_irq_pending(); - do { - /* we're in a chained irq handler, - * so ack the interrupt by hand */ - desc->irq_data.chip->irq_ack(&desc->irq_data); - - if (likely(pending)) { - irq = viper_bit_to_irq(__ffs(pending)); - generic_handle_irq(irq); - } - pending = viper_irq_pending(); - } while (pending); -} - -static struct irq_chip viper_irq_chip = { - .name = "ISA", - .irq_ack = viper_ack_irq, - .irq_mask = viper_mask_irq, - .irq_unmask = viper_unmask_irq -}; - -static void __init viper_init_irq(void) -{ - int level; - int isa_irq; - - pxa25x_init_irq(); - - /* setup ISA IRQs */ - for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { - isa_irq = viper_bit_to_irq(level); - irq_set_chip_and_handler(isa_irq, &viper_irq_chip, - handle_edge_irq); - irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE); - } - - irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), - viper_irq_handler); - irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); -} - -/* Flat Panel */ -static struct pxafb_mode_info fb_mode_info[] = { - { - .pixclock = 157500, - - .xres = 320, - .yres = 240, - - .bpp = 16, - - .hsync_len = 63, - .left_margin = 7, - .right_margin = 13, - - .vsync_len = 20, - .upper_margin = 0, - .lower_margin = 0, - - .sync = 0, - }, -}; - -static struct pxafb_mach_info fb_info = { - .modes = fb_mode_info, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -static struct pwm_lookup viper_pwm_lookup[] = { - PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000, - PWM_POLARITY_NORMAL), -}; - -static int viper_backlight_init(struct device *dev) -{ - int ret; - - /* GPIO9 and 10 control FB backlight. Initialise to off */ - ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight"); - if (ret) - goto err_request_bckl; - - ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD"); - if (ret) - goto err_request_lcd; - - ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0); - if (ret) - goto err_dir; - - ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0); - if (ret) - goto err_dir; - - return 0; - -err_dir: - gpio_free(VIPER_LCD_EN_GPIO); -err_request_lcd: - gpio_free(VIPER_BCKLIGHT_EN_GPIO); -err_request_bckl: - dev_err(dev, "Failed to setup LCD GPIOs\n"); - - return ret; -} - -static int viper_backlight_notify(struct device *dev, int brightness) -{ - gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness); - gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness); - - return brightness; -} - -static void viper_backlight_exit(struct device *dev) -{ - gpio_free(VIPER_LCD_EN_GPIO); - gpio_free(VIPER_BCKLIGHT_EN_GPIO); -} - -static struct platform_pwm_backlight_data viper_backlight_data = { - .max_brightness = 100, - .dft_brightness = 100, - .init = viper_backlight_init, - .notify = viper_backlight_notify, - .exit = viper_backlight_exit, -}; - -static struct platform_device viper_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa25x_device_pwm0.dev, - .platform_data = &viper_backlight_data, - }, -}; - -/* Ethernet */ -static struct resource smc91x_resources[] = { - [0] = { - .name = "smc91x-regs", - .start = VIPER_ETH_PHYS + 0x300, - .end = VIPER_ETH_PHYS + 0x30f, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), - .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, - [2] = { - .name = "smc91x-data32", - .start = VIPER_ETH_DATA_PHYS, - .end = VIPER_ETH_DATA_PHYS + 3, - .flags = IORESOURCE_MEM, - }, -}; - -static struct smc91x_platdata viper_smc91x_info = { - .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, - .leda = RPC_LED_100_10, - .ledb = RPC_LED_TX_RX, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = -1, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &viper_smc91x_info, - }, -}; - -/* i2c */ -static struct gpiod_lookup_table viper_i2c_gpiod_table = { - .dev_id = "i2c-gpio.1", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SDA_GPIO, - NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), - GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SCL_GPIO, - NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), - }, -}; - -static struct i2c_gpio_platform_data i2c_bus_data = { - .udelay = 10, - .timeout = HZ, -}; - -static struct platform_device i2c_bus_device = { - .name = "i2c-gpio", - .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */ - .dev = { - .platform_data = &i2c_bus_data, - } -}; - -static struct i2c_board_info __initdata viper_i2c_devices[] = { - { - I2C_BOARD_INFO("ds1338", 0x68), - }, -}; - -/* - * Serial configuration: - * You can either have the standard PXA ports driven by the PXA driver, - * or all the ports (PXA + 16850) driven by the 8250 driver. - * Choose your poison. - */ - -static struct resource viper_serial_resources[] = { -#ifndef CONFIG_SERIAL_PXA - { - .start = 0x40100000, - .end = 0x4010001f, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x40200000, - .end = 0x4020001f, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x40700000, - .end = 0x4070001f, - .flags = IORESOURCE_MEM, - }, - { - .start = VIPER_UARTA_PHYS, - .end = VIPER_UARTA_PHYS + 0xf, - .flags = IORESOURCE_MEM, - }, - { - .start = VIPER_UARTB_PHYS, - .end = VIPER_UARTB_PHYS + 0xf, - .flags = IORESOURCE_MEM, - }, -#else - { - 0, - }, -#endif -}; - -static struct plat_serial8250_port serial_platform_data[] = { -#ifndef CONFIG_SERIAL_PXA - /* Internal UARTs */ - { - .membase = (void *)&FFUART, - .mapbase = __PREG(FFUART), - .irq = IRQ_FFUART, - .uartclk = 921600 * 16, - .regshift = 2, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - { - .membase = (void *)&BTUART, - .mapbase = __PREG(BTUART), - .irq = IRQ_BTUART, - .uartclk = 921600 * 16, - .regshift = 2, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - { - .membase = (void *)&STUART, - .mapbase = __PREG(STUART), - .irq = IRQ_STUART, - .uartclk = 921600 * 16, - .regshift = 2, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - /* External UARTs */ - { - .mapbase = VIPER_UARTA_PHYS, - .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO), - .irqflags = IRQF_TRIGGER_RISING, - .uartclk = 1843200, - .regshift = 1, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | - UPF_SKIP_TEST, - }, - { - .mapbase = VIPER_UARTB_PHYS, - .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO), - .irqflags = IRQF_TRIGGER_RISING, - .uartclk = 1843200, - .regshift = 1, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | - UPF_SKIP_TEST, - }, -#endif - { }, -}; - -static struct platform_device serial_device = { - .name = "serial8250", - .id = 0, - .dev = { - .platform_data = serial_platform_data, - }, - .num_resources = ARRAY_SIZE(viper_serial_resources), - .resource = viper_serial_resources, -}; - -/* USB */ -static void isp116x_delay(struct device *dev, int delay) -{ - ndelay(delay); -} - -static struct resource isp116x_resources[] = { - [0] = { /* DATA */ - .start = VIPER_USB_PHYS + 0, - .end = VIPER_USB_PHYS + 1, - .flags = IORESOURCE_MEM, - }, - [1] = { /* ADDR */ - .start = VIPER_USB_PHYS + 2, - .end = VIPER_USB_PHYS + 3, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), - .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */ -static struct isp116x_platform_data isp116x_platform_data = { - /* Enable internal resistors on downstream ports */ - .sel15Kres = 1, - /* On-chip overcurrent protection */ - .oc_enable = 1, - /* INT output polarity */ - .int_act_high = 1, - /* INT edge or level triggered */ - .int_edge_triggered = 0, - - /* WAKEUP pin connected - NOT SUPPORTED */ - /* .remote_wakeup_connected = 0, */ - /* Wakeup by devices on usb bus enabled */ - .remote_wakeup_enable = 0, - .delay = isp116x_delay, -}; - -static struct platform_device isp116x_device = { - .name = "isp116x-hcd", - .id = -1, - .num_resources = ARRAY_SIZE(isp116x_resources), - .resource = isp116x_resources, - .dev = { - .platform_data = &isp116x_platform_data, - }, - -}; - -/* MTD */ -static struct resource mtd_resources[] = { - [0] = { /* RedBoot config + filesystem flash */ - .start = VIPER_FLASH_PHYS, - .end = VIPER_FLASH_PHYS + SZ_32M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { /* Boot flash */ - .start = VIPER_BOOT_PHYS, - .end = VIPER_BOOT_PHYS + SZ_1M - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { /* - * SRAM size is actually 256KB, 8bits, with a sparse mapping - * (each byte is on a 16bit boundary). - */ - .start = _VIPER_SRAM_BASE, - .end = _VIPER_SRAM_BASE + SZ_512K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct mtd_partition viper_boot_flash_partition = { - .name = "RedBoot", - .size = SZ_1M, - .offset = 0, - .mask_flags = MTD_WRITEABLE, /* force R/O */ -}; - -static struct physmap_flash_data viper_flash_data[] = { - [0] = { - .width = 2, - .parts = NULL, - .nr_parts = 0, - }, - [1] = { - .width = 2, - .parts = &viper_boot_flash_partition, - .nr_parts = 1, - }, -}; - -static struct platform_device viper_mtd_devices[] = { - [0] = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &viper_flash_data[0], - }, - .resource = &mtd_resources[0], - .num_resources = 1, - }, - [1] = { - .name = "physmap-flash", - .id = 1, - .dev = { - .platform_data = &viper_flash_data[1], - }, - .resource = &mtd_resources[1], - .num_resources = 1, - }, -}; - -static struct platform_device *viper_devs[] __initdata = { - &smc91x_device, - &i2c_bus_device, - &serial_device, - &isp116x_device, - &viper_mtd_devices[0], - &viper_mtd_devices[1], - &viper_backlight_device, - &viper_pcmcia_device, -}; - -static mfp_cfg_t viper_pin_config[] __initdata = { - /* Chip selects */ - GPIO15_nCS_1, - GPIO78_nCS_2, - GPIO79_nCS_3, - GPIO80_nCS_4, - GPIO33_nCS_5, - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* FP Backlight */ - GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */ - GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */ - GPIO16_PWM0_OUT, - - /* Ethernet PHY Ready */ - GPIO18_RDY, - - /* Serial shutdown */ - GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */ - - /* Compact-Flash / PC104 */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */ - GPIO32_GPIO, /* VIPER_CF_CD_GPIO */ - GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */ - - /* Integrated UPS control */ - GPIO20_GPIO, /* VIPER_UPS_GPIO */ - - /* Vcc regulator control */ - GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */ - GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */ - GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */ - - /* i2c busses */ - GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */ - GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */ - GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */ - GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */ - - /* PC/104 Interrupt */ - GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */ -}; - -static unsigned long viper_tpm; - -static int __init viper_tpm_setup(char *str) -{ - return kstrtoul(str, 10, &viper_tpm) >= 0; -} - -__setup("tpm=", viper_tpm_setup); - -struct gpiod_lookup_table viper_tpm_i2c_gpiod_table = { - .dev_id = "i2c-gpio.2", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SDA_GPIO, - NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), - GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SCL_GPIO, - NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), - }, -}; - -static void __init viper_tpm_init(void) -{ - struct platform_device *tpm_device; - struct i2c_gpio_platform_data i2c_tpm_data = { - .udelay = 10, - .timeout = HZ, - }; - char *errstr; - - /* Allocate TPM i2c bus if requested */ - if (!viper_tpm) - return; - - gpiod_add_lookup_table(&viper_tpm_i2c_gpiod_table); - tpm_device = platform_device_alloc("i2c-gpio", 2); - if (tpm_device) { - if (!platform_device_add_data(tpm_device, - &i2c_tpm_data, - sizeof(i2c_tpm_data))) { - if (platform_device_add(tpm_device)) { - errstr = "register TPM i2c bus"; - goto error_free_tpm; - } - } else { - errstr = "allocate TPM i2c bus data"; - goto error_free_tpm; - } - } else { - errstr = "allocate TPM i2c device"; - goto error_tpm; - } - - return; - -error_free_tpm: - kfree(tpm_device); -error_tpm: - pr_err("viper: Couldn't %s, giving up\n", errstr); -} - -static void __init viper_init_vcore_gpios(void) -{ - if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data")) - goto err_request_data; - - if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock")) - goto err_request_clk; - - if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs")) - goto err_request_cs; - - if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) || - gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) || - gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0)) - goto err_dir; - - /* c/should assume redboot set the correct level ??? */ - viper_set_core_cpu_voltage(pxa25x_get_clk_frequency_khz(0), 1); - - return; - -err_dir: - gpio_free(VIPER_PSU_nCS_LD_GPIO); -err_request_cs: - gpio_free(VIPER_PSU_CLK_GPIO); -err_request_clk: - gpio_free(VIPER_PSU_DATA_GPIO); -err_request_data: - pr_err("viper: Failed to setup vcore control GPIOs\n"); -} - -static void __init viper_init_serial_gpio(void) -{ - if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown")) - goto err_request; - - if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0)) - goto err_dir; - - return; - -err_dir: - gpio_free(VIPER_UART_SHDN_GPIO); -err_request: - pr_err("viper: Failed to setup UART shutdown GPIO\n"); -} - -#ifdef CONFIG_CPU_FREQ -static int viper_cpufreq_notifier(struct notifier_block *nb, - unsigned long val, void *data) -{ - struct cpufreq_freqs *freq = data; - - /* TODO: Adjust timings??? */ - - switch (val) { - case CPUFREQ_PRECHANGE: - if (freq->old < freq->new) { - /* we are getting faster so raise the voltage - * before we change freq */ - viper_set_core_cpu_voltage(freq->new, 0); - } - break; - case CPUFREQ_POSTCHANGE: - if (freq->old > freq->new) { - /* we are slowing down so drop the power - * after we change freq */ - viper_set_core_cpu_voltage(freq->new, 0); - } - break; - default: - /* ignore */ - break; - } - - return 0; -} - -static struct notifier_block viper_cpufreq_notifier_block = { - .notifier_call = viper_cpufreq_notifier -}; - -static void __init viper_init_cpufreq(void) -{ - if (cpufreq_register_notifier(&viper_cpufreq_notifier_block, - CPUFREQ_TRANSITION_NOTIFIER)) - pr_err("viper: Failed to setup cpufreq notifier\n"); -} -#else -static inline void viper_init_cpufreq(void) {} -#endif - -static void viper_power_off(void) -{ - pr_notice("Shutting off UPS\n"); - gpio_set_value(VIPER_UPS_GPIO, 1); - /* Spin to death... */ - while (1); -} - -static void __init viper_init(void) -{ - u8 version; - - pm_power_off = viper_power_off; - - pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - /* Wake-up serial console */ - viper_init_serial_gpio(); - - pxa_set_fb_info(NULL, &fb_info); - - /* v1 hardware cannot use the datacs line */ - version = viper_hw_version(); - if (version == 0) - smc91x_device.num_resources--; - - pxa_set_i2c_info(NULL); - gpiod_add_lookup_table(&viper_i2c_gpiod_table); - pwm_add_table(viper_pwm_lookup, ARRAY_SIZE(viper_pwm_lookup)); - platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs)); - - viper_init_vcore_gpios(); - viper_init_cpufreq(); - - register_syscore_ops(&viper_cpu_syscore_ops); - - if (version) { - pr_info("viper: hardware v%di%d detected. " - "CPLD revision %d.\n", - VIPER_BOARD_VERSION(version), - VIPER_BOARD_ISSUE(version), - VIPER_CPLD_REVISION(version)); - system_rev = (VIPER_BOARD_VERSION(version) << 8) | - (VIPER_BOARD_ISSUE(version) << 4) | - VIPER_CPLD_REVISION(version); - } else { - pr_info("viper: No version register.\n"); - } - - i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices)); - - viper_tpm_init(); - pxa_set_ac97_info(NULL); -} - -static struct map_desc viper_io_desc[] __initdata = { - { - .virtual = VIPER_CPLD_BASE, - .pfn = __phys_to_pfn(VIPER_CPLD_PHYS), - .length = 0x00300000, - .type = MT_DEVICE, - }, - { - .virtual = VIPER_PC104IO_BASE, - .pfn = __phys_to_pfn(0x30000000), - .length = 0x00800000, - .type = MT_DEVICE, - }, - { - /* - * ISA I/O space mapping: - * - ports 0x0000-0x0fff are PC/104 - * - ports 0x10000-0x10fff are PCMCIA slot 1 - * - ports 0x11000-0x11fff are PC/104 - */ - .virtual = PCI_IO_VIRT_BASE, - .pfn = __phys_to_pfn(0x30000000), - .length = 0x1000, - .type = MT_DEVICE, - }, -}; - -static void __init viper_map_io(void) -{ - pxa25x_map_io(); - - iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc)); - - PCFR |= PCFR_OPDE; -} - -MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") - /* Maintainer: Marc Zyngier <maz@misterjones.org> */ - .atag_offset = 0x100, - .map_io = viper_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = viper_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = viper_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/viper.h b/arch/arm/mach-pxa/viper.h deleted file mode 100644 index 5a8b132229dc..000000000000 --- a/arch/arm/mach-pxa/viper.h +++ /dev/null @@ -1,91 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-pxa/include/mach/viper.h - * - * Author: Ian Campbell - * Created: Feb 03, 2003 - * Copyright: Arcom Control Systems. - * - * Maintained by Marc Zyngier <maz@misterjones.org> - * <marc.zyngier@altran.com> - * - * Created based on lubbock.h: - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - */ - -#ifndef ARCH_VIPER_H -#define ARCH_VIPER_H - -#define VIPER_BOOT_PHYS PXA_CS0_PHYS -#define VIPER_FLASH_PHYS PXA_CS1_PHYS -#define VIPER_ETH_PHYS PXA_CS2_PHYS -#define VIPER_USB_PHYS PXA_CS3_PHYS -#define VIPER_ETH_DATA_PHYS PXA_CS4_PHYS -#define VIPER_CPLD_PHYS PXA_CS5_PHYS - -#define VIPER_CPLD_BASE (0xf0000000) -#define VIPER_PC104IO_BASE (0xf1000000) -#define VIPER_USB_BASE (0xf1800000) - -#define VIPER_ETH_GPIO (0) -#define VIPER_CPLD_GPIO (1) -#define VIPER_USB_GPIO (2) -#define VIPER_UARTA_GPIO (4) -#define VIPER_UARTB_GPIO (3) -#define VIPER_CF_CD_GPIO (32) -#define VIPER_CF_RDY_GPIO (8) -#define VIPER_BCKLIGHT_EN_GPIO (9) -#define VIPER_LCD_EN_GPIO (10) -#define VIPER_PSU_DATA_GPIO (6) -#define VIPER_PSU_CLK_GPIO (11) -#define VIPER_UART_SHDN_GPIO (12) -#define VIPER_BRIGHTNESS_GPIO (16) -#define VIPER_PSU_nCS_LD_GPIO (19) -#define VIPER_UPS_GPIO (20) -#define VIPER_CF_POWER_GPIO (82) -#define VIPER_TPM_I2C_SDA_GPIO (26) -#define VIPER_TPM_I2C_SCL_GPIO (27) -#define VIPER_RTC_I2C_SDA_GPIO (83) -#define VIPER_RTC_I2C_SCL_GPIO (84) - -#define VIPER_CPLD_P2V(x) ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE) -#define VIPER_CPLD_V2P(x) ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS) - -#ifndef __ASSEMBLY__ -# define __VIPER_CPLD_REG(x) (*((volatile u16 *)VIPER_CPLD_P2V(x))) -#endif - -/* board level registers in the CPLD: (offsets from CPLD_BASE) ... */ - -/* ... Physical addresses */ -#define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000) -#define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002) -#define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004) -#define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006) -#define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010) -#define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000) -#define _VIPER_SRAM_BASE (VIPER_CPLD_PHYS + 0x800000) - -/* ... Virtual addresses */ -#define VIPER_LO_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS) -#define VIPER_HI_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS) -#define VIPER_VERSION __VIPER_CPLD_REG(_VIPER_VERSION_PHYS) -#define VIPER_ICR __VIPER_CPLD_REG(_VIPER_ICR_PHYS) - -/* Decode VIPER_VERSION register */ -#define VIPER_CPLD_REVISION(x) (((x) >> 5) & 0x7) -#define VIPER_BOARD_VERSION(x) (((x) >> 3) & 0x3) -#define VIPER_BOARD_ISSUE(x) (((x) >> 0) & 0x7) - -/* Interrupt and Configuration Register (VIPER_ICR) */ -/* This is a write only register. Only CF_RST is used under Linux */ - -#define VIPER_ICR_RETRIG (1 << 0) -#define VIPER_ICR_AUTO_CLR (1 << 1) -#define VIPER_ICR_R_DIS (1 << 2) -#define VIPER_ICR_CF_RST (1 << 3) - -#endif - diff --git a/arch/arm/mach-pxa/vpac270-pcmcia.c b/arch/arm/mach-pxa/vpac270-pcmcia.c deleted file mode 100644 index 9fd990c8a5fb..000000000000 --- a/arch/arm/mach-pxa/vpac270-pcmcia.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_vpac270.c - * - * Driver for Voipac PXA270 PCMCIA and CF sockets - * - * Copyright (C) 2010-2011 Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/gpio.h> -#include <linux/module.h> -#include <linux/platform_device.h> - -#include <asm/mach-types.h> - -#include "vpac270.h" - -#include <pcmcia/soc_common.h> - -static struct gpio vpac270_pcmcia_gpios[] = { - { GPIO107_VPAC270_PCMCIA_PPEN, GPIOF_INIT_LOW, "PCMCIA PPEN" }, - { GPIO11_VPAC270_PCMCIA_RESET, GPIOF_INIT_LOW, "PCMCIA Reset" }, -}; - -static struct gpio vpac270_cf_gpios[] = { - { GPIO16_VPAC270_CF_RESET, GPIOF_INIT_LOW, "CF Reset" }, -}; - -static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - if (skt->nr == 0) { - ret = gpio_request_array(vpac270_pcmcia_gpios, - ARRAY_SIZE(vpac270_pcmcia_gpios)); - - skt->stat[SOC_STAT_CD].gpio = GPIO84_VPAC270_PCMCIA_CD; - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO35_VPAC270_PCMCIA_RDY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - } else { - ret = gpio_request_array(vpac270_cf_gpios, - ARRAY_SIZE(vpac270_cf_gpios)); - - skt->stat[SOC_STAT_CD].gpio = GPIO17_VPAC270_CF_CD; - skt->stat[SOC_STAT_CD].name = "CF CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO12_VPAC270_CF_RDY; - skt->stat[SOC_STAT_RDY].name = "CF Ready"; - } - - return ret; -} - -static void vpac270_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - if (skt->nr == 0) - gpio_free_array(vpac270_pcmcia_gpios, - ARRAY_SIZE(vpac270_pcmcia_gpios)); - else - gpio_free_array(vpac270_cf_gpios, - ARRAY_SIZE(vpac270_cf_gpios)); -} - -static void vpac270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -vpac270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - if (skt->nr == 0) { - gpio_set_value(GPIO11_VPAC270_PCMCIA_RESET, - (state->flags & SS_RESET)); - gpio_set_value(GPIO107_VPAC270_PCMCIA_PPEN, - !(state->Vcc == 33 || state->Vcc == 50)); - } else { - gpio_set_value(GPIO16_VPAC270_CF_RESET, - (state->flags & SS_RESET)); - } - - return 0; -} - -static struct pcmcia_low_level vpac270_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 2, - - .hw_init = vpac270_pcmcia_hw_init, - .hw_shutdown = vpac270_pcmcia_hw_shutdown, - - .socket_state = vpac270_pcmcia_socket_state, - .configure_socket = vpac270_pcmcia_configure_socket, -}; - -static struct platform_device *vpac270_pcmcia_device; - -static int __init vpac270_pcmcia_init(void) -{ - int ret; - - if (!machine_is_vpac270()) - return -ENODEV; - - vpac270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!vpac270_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(vpac270_pcmcia_device, - &vpac270_pcmcia_ops, sizeof(vpac270_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(vpac270_pcmcia_device); - - if (ret) - platform_device_put(vpac270_pcmcia_device); - - return ret; -} - -static void __exit vpac270_pcmcia_exit(void) -{ - platform_device_unregister(vpac270_pcmcia_device); -} - -module_init(vpac270_pcmcia_init); -module_exit(vpac270_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>"); -MODULE_DESCRIPTION("PCMCIA support for Voipac PXA270"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c deleted file mode 100644 index 8f74bafcf1f9..000000000000 --- a/arch/arm/mach-pxa/vpac270.c +++ /dev/null @@ -1,736 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Hardware definitions for Voipac PXA270 - * - * Copyright (C) 2010 - * Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/onenand.h> -#include <linux/dm9000.h> -#include <linux/ucb1400.h> -#include <linux/ata_platform.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/max1586.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa27x.h" -#include <linux/platform_data/asoc-pxa.h> -#include "vpac270.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include "pxa27x-udc.h" -#include "udc.h" -#include <linux/platform_data/ata-pxa.h> - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long vpac270_pin_config[] __initdata = { - /* MMC */ - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - GPIO53_GPIO, /* SD detect */ - GPIO52_GPIO, /* SD r/o switch */ - - /* GPIO KEYS */ - GPIO1_GPIO, /* USER BTN */ - - /* LEDs */ - GPIO15_GPIO, /* orange led */ - - /* FFUART */ - GPIO34_FFUART_RXD, - GPIO39_FFUART_TXD, - GPIO27_FFUART_RTS, - GPIO100_FFUART_CTS, - GPIO33_FFUART_DSR, - GPIO40_FFUART_DTR, - GPIO10_FFUART_DCD, - GPIO38_FFUART_RI, - - /* LCD */ - GPIO58_LCD_LDD_0, - GPIO59_LCD_LDD_1, - GPIO60_LCD_LDD_2, - GPIO61_LCD_LDD_3, - GPIO62_LCD_LDD_4, - GPIO63_LCD_LDD_5, - GPIO64_LCD_LDD_6, - GPIO65_LCD_LDD_7, - GPIO66_LCD_LDD_8, - GPIO67_LCD_LDD_9, - GPIO68_LCD_LDD_10, - GPIO69_LCD_LDD_11, - GPIO70_LCD_LDD_12, - GPIO71_LCD_LDD_13, - GPIO72_LCD_LDD_14, - GPIO73_LCD_LDD_15, - GPIO86_LCD_LDD_16, - GPIO87_LCD_LDD_17, - GPIO74_LCD_FCLK, - GPIO75_LCD_LCLK, - GPIO76_LCD_PCLK, - GPIO77_LCD_BIAS, - - /* PCMCIA */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO85_nPCE_1, - GPIO54_nPCE_2, - GPIO55_nPREG, - GPIO57_nIOIS16, - GPIO56_nPWAIT, - GPIO104_PSKTSEL, - GPIO84_GPIO, /* PCMCIA CD */ - GPIO35_GPIO, /* PCMCIA RDY */ - GPIO107_GPIO, /* PCMCIA PPEN */ - GPIO11_GPIO, /* PCMCIA RESET */ - GPIO17_GPIO, /* CF CD */ - GPIO12_GPIO, /* CF RDY */ - GPIO16_GPIO, /* CF RESET */ - - /* UHC */ - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, - GPIO119_USBH2_PWR, - GPIO120_USBH2_PEN, - - /* UDC */ - GPIO41_GPIO, - - /* Ethernet */ - GPIO114_GPIO, /* IRQ */ - - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - GPIO95_AC97_nRESET, - GPIO98_AC97_SYSCLK, - GPIO113_GPIO, /* TS IRQ */ - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* IDE */ - GPIO36_GPIO, /* IDE IRQ */ - GPIO80_DREQ_1, -}; - -/****************************************************************************** - * NOR Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct mtd_partition vpac270_nor_partitions[] = { - { - .name = "Flash", - .offset = 0x00000000, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct physmap_flash_data vpac270_flash_data[] = { - { - .width = 2, /* bankwidth in bytes */ - .parts = vpac270_nor_partitions, - .nr_parts = ARRAY_SIZE(vpac270_nor_partitions) - } -}; - -static struct resource vpac270_flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device vpac270_flash = { - .name = "physmap-flash", - .id = 0, - .resource = &vpac270_flash_resource, - .num_resources = 1, - .dev = { - .platform_data = vpac270_flash_data, - }, -}; -static void __init vpac270_nor_init(void) -{ - platform_device_register(&vpac270_flash); -} -#else -static inline void vpac270_nor_init(void) {} -#endif - -/****************************************************************************** - * OneNAND Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE) -static struct mtd_partition vpac270_onenand_partitions[] = { - { - .name = "Flash", - .offset = 0x00000000, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct onenand_platform_data vpac270_onenand_info = { - .parts = vpac270_onenand_partitions, - .nr_parts = ARRAY_SIZE(vpac270_onenand_partitions), -}; - -static struct resource vpac270_onenand_resources[] = { - [0] = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_1M, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device vpac270_onenand = { - .name = "onenand-flash", - .id = -1, - .resource = vpac270_onenand_resources, - .num_resources = ARRAY_SIZE(vpac270_onenand_resources), - .dev = { - .platform_data = &vpac270_onenand_info, - }, -}; - -static void __init vpac270_onenand_init(void) -{ - platform_device_register(&vpac270_onenand); -} -#else -static void __init vpac270_onenand_init(void) {} -#endif - -/****************************************************************************** - * SD/MMC card controller - ******************************************************************************/ -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -static struct pxamci_platform_data vpac270_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .detect_delay_ms = 200, -}; - -static struct gpiod_lookup_table vpac270_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO53_VPAC270_SD_DETECT_N, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", GPIO52_VPAC270_SD_READONLY, - "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init vpac270_mmc_init(void) -{ - gpiod_add_lookup_table(&vpac270_mci_gpio_table); - pxa_set_mci_info(&vpac270_mci_platform_data); -} -#else -static inline void vpac270_mmc_init(void) {} -#endif - -/****************************************************************************** - * GPIO keys - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) -static struct gpio_keys_button vpac270_pxa_buttons[] = { - {KEY_POWER, GPIO1_VPAC270_USER_BTN, 0, "USER BTN"}, -}; - -static struct gpio_keys_platform_data vpac270_pxa_keys_data = { - .buttons = vpac270_pxa_buttons, - .nbuttons = ARRAY_SIZE(vpac270_pxa_buttons), -}; - -static struct platform_device vpac270_pxa_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &vpac270_pxa_keys_data, - }, -}; - -static void __init vpac270_keys_init(void) -{ - platform_device_register(&vpac270_pxa_keys); -} -#else -static inline void vpac270_keys_init(void) {} -#endif - -/****************************************************************************** - * LED - ******************************************************************************/ -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -struct gpio_led vpac270_gpio_leds[] = { -{ - .name = "vpac270:orange:user", - .default_trigger = "none", - .gpio = GPIO15_VPAC270_LED_ORANGE, - .active_low = 1, -} -}; - -static struct gpio_led_platform_data vpac270_gpio_led_info = { - .leds = vpac270_gpio_leds, - .num_leds = ARRAY_SIZE(vpac270_gpio_leds), -}; - -static struct platform_device vpac270_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &vpac270_gpio_led_info, - } -}; - -static void __init vpac270_leds_init(void) -{ - platform_device_register(&vpac270_leds); -} -#else -static inline void vpac270_leds_init(void) {} -#endif - -/****************************************************************************** - * USB Host - ******************************************************************************/ -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static int vpac270_ohci_init(struct device *dev) -{ - UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; - return 0; -} - -static struct pxaohci_platform_data vpac270_ohci_info = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT1 | ENABLE_PORT2 | - POWER_CONTROL_LOW | POWER_SENSE_LOW, - .init = vpac270_ohci_init, -}; - -static void __init vpac270_uhc_init(void) -{ - pxa_set_ohci_info(&vpac270_ohci_info); -} -#else -static inline void vpac270_uhc_init(void) {} -#endif - -/****************************************************************************** - * USB Gadget - ******************************************************************************/ -#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE) -static struct gpiod_lookup_table vpac270_gpio_vbus_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO41_VPAC270_UDC_DETECT, - "vbus", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device vpac270_gpio_vbus = { - .name = "gpio-vbus", - .id = -1, -}; - -static void vpac270_udc_command(int cmd) -{ - if (cmd == PXA2XX_UDC_CMD_CONNECT) - UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE; - else if (cmd == PXA2XX_UDC_CMD_DISCONNECT) - UP2OCR = UP2OCR_HXOE; -} - -static struct pxa2xx_udc_mach_info vpac270_udc_info __initdata = { - .udc_command = vpac270_udc_command, - .gpio_pullup = -1, -}; - -static void __init vpac270_udc_init(void) -{ - pxa_set_udc_info(&vpac270_udc_info); - gpiod_add_lookup_table(&vpac270_gpio_vbus_gpiod_table); - platform_device_register(&vpac270_gpio_vbus); -} -#else -static inline void vpac270_udc_init(void) {} -#endif - -/****************************************************************************** - * Ethernet - ******************************************************************************/ -#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) -static struct resource vpac270_dm9000_resources[] = { - [0] = { - .start = PXA_CS2_PHYS + 0x300, - .end = PXA_CS2_PHYS + 0x303, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_CS2_PHYS + 0x304, - .end = PXA_CS2_PHYS + 0x343, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ), - .end = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -static struct dm9000_plat_data vpac270_dm9000_platdata = { - .flags = DM9000_PLATF_32BITONLY, -}; - -static struct platform_device vpac270_dm9000_device = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(vpac270_dm9000_resources), - .resource = vpac270_dm9000_resources, - .dev = { - .platform_data = &vpac270_dm9000_platdata, - } -}; - -static void __init vpac270_eth_init(void) -{ - platform_device_register(&vpac270_dm9000_device); -} -#else -static inline void vpac270_eth_init(void) {} -#endif - -/****************************************************************************** - * Audio and Touchscreen - ******************************************************************************/ -#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ - defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) -static pxa2xx_audio_ops_t vpac270_ac97_pdata = { - .reset_gpio = 95, -}; - -static struct ucb1400_pdata vpac270_ucb1400_pdata = { - .irq = PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ), -}; - -static struct platform_device vpac270_ucb1400_device = { - .name = "ucb1400_core", - .id = -1, - .dev = { - .platform_data = &vpac270_ucb1400_pdata, - }, -}; - -static void __init vpac270_ts_init(void) -{ - pxa_set_ac97_info(&vpac270_ac97_pdata); - platform_device_register(&vpac270_ucb1400_device); -} -#else -static inline void vpac270_ts_init(void) {} -#endif - -/****************************************************************************** - * RTC - ******************************************************************************/ -#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE) -static struct i2c_board_info __initdata vpac270_i2c_devs[] = { - { - I2C_BOARD_INFO("ds1339", 0x68), - }, -}; - -static void __init vpac270_rtc_init(void) -{ - i2c_register_board_info(0, ARRAY_AND_SIZE(vpac270_i2c_devs)); -} -#else -static inline void vpac270_rtc_init(void) {} -#endif - -/****************************************************************************** - * Framebuffer - ******************************************************************************/ -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pxafb_mode_info vpac270_lcd_modes[] = { -{ - .pixclock = 57692, - .xres = 640, - .yres = 480, - .bpp = 32, - .depth = 18, - - .left_margin = 144, - .right_margin = 32, - .upper_margin = 13, - .lower_margin = 30, - - .hsync_len = 32, - .vsync_len = 2, - - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}, { /* CRT 640x480 */ - .pixclock = 35000, - .xres = 640, - .yres = 480, - .bpp = 16, - .depth = 16, - - .left_margin = 96, - .right_margin = 48, - .upper_margin = 33, - .lower_margin = 10, - - .hsync_len = 48, - .vsync_len = 1, - - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}, { /* CRT 800x600 H=30kHz V=48HZ */ - .pixclock = 25000, - .xres = 800, - .yres = 600, - .bpp = 16, - .depth = 16, - - .left_margin = 50, - .right_margin = 1, - .upper_margin = 21, - .lower_margin = 12, - - .hsync_len = 8, - .vsync_len = 1, - - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -}, { /* CRT 1024x768 H=40kHz V=50Hz */ - .pixclock = 15000, - .xres = 1024, - .yres = 768, - .bpp = 16, - .depth = 16, - - .left_margin = 220, - .right_margin = 8, - .upper_margin = 33, - .lower_margin = 2, - - .hsync_len = 48, - .vsync_len = 1, - - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, -} -}; - -static struct pxafb_mach_info vpac270_lcd_screen = { - .modes = vpac270_lcd_modes, - .num_modes = ARRAY_SIZE(vpac270_lcd_modes), - .lcd_conn = LCD_COLOR_TFT_18BPP, -}; - -static void vpac270_lcd_power(int on, struct fb_var_screeninfo *info) -{ - gpio_set_value(GPIO81_VPAC270_BKL_ON, on); -} - -static void __init vpac270_lcd_init(void) -{ - int ret; - - ret = gpio_request(GPIO81_VPAC270_BKL_ON, "BKL-ON"); - if (ret) { - pr_err("Requesting BKL-ON GPIO failed!\n"); - goto err; - } - - ret = gpio_direction_output(GPIO81_VPAC270_BKL_ON, 1); - if (ret) { - pr_err("Setting BKL-ON GPIO direction failed!\n"); - goto err2; - } - - vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power; - pxa_set_fb_info(NULL, &vpac270_lcd_screen); - return; - -err2: - gpio_free(GPIO81_VPAC270_BKL_ON); -err: - return; -} -#else -static inline void vpac270_lcd_init(void) {} -#endif - -/****************************************************************************** - * PATA IDE - ******************************************************************************/ -#if defined(CONFIG_PATA_PXA) || defined(CONFIG_PATA_PXA_MODULE) -static struct pata_pxa_pdata vpac270_pata_pdata = { - .reg_shift = 1, - .dma_dreq = 1, - .irq_flags = IRQF_TRIGGER_RISING, -}; - -static struct resource vpac270_ide_resources[] = { - [0] = { /* I/O Base address */ - .start = PXA_CS3_PHYS + 0x120, - .end = PXA_CS3_PHYS + 0x13f, - .flags = IORESOURCE_MEM - }, - [1] = { /* CTL Base address */ - .start = PXA_CS3_PHYS + 0x15c, - .end = PXA_CS3_PHYS + 0x15f, - .flags = IORESOURCE_MEM - }, - [2] = { /* DMA Base address */ - .start = PXA_CS3_PHYS + 0x20, - .end = PXA_CS3_PHYS + 0x2f, - .flags = IORESOURCE_DMA - }, - [3] = { /* IDE IRQ pin */ - .start = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ), - .end = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ), - .flags = IORESOURCE_IRQ - } -}; - -static struct platform_device vpac270_ide_device = { - .name = "pata_pxa", - .num_resources = ARRAY_SIZE(vpac270_ide_resources), - .resource = vpac270_ide_resources, - .dev = { - .platform_data = &vpac270_pata_pdata, - .coherent_dma_mask = 0xffffffff, - } -}; - -static void __init vpac270_ide_init(void) -{ - platform_device_register(&vpac270_ide_device); -} -#else -static inline void vpac270_ide_init(void) {} -#endif - -/****************************************************************************** - * Core power regulator - ******************************************************************************/ -#if defined(CONFIG_REGULATOR_MAX1586) || \ - defined(CONFIG_REGULATOR_MAX1586_MODULE) -static struct regulator_consumer_supply vpac270_max1587a_consumers[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data vpac270_max1587a_v3_info = { - .constraints = { - .name = "vcc_core range", - .min_uV = 900000, - .max_uV = 1705000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .consumer_supplies = vpac270_max1587a_consumers, - .num_consumer_supplies = ARRAY_SIZE(vpac270_max1587a_consumers), -}; - -static struct max1586_subdev_data vpac270_max1587a_subdevs[] = { - { - .name = "vcc_core", - .id = MAX1586_V3, - .platform_data = &vpac270_max1587a_v3_info, - } -}; - -static struct max1586_platform_data vpac270_max1587a_info = { - .subdevs = vpac270_max1587a_subdevs, - .num_subdevs = ARRAY_SIZE(vpac270_max1587a_subdevs), - .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */ -}; - -static struct i2c_board_info __initdata vpac270_pi2c_board_info[] = { - { - I2C_BOARD_INFO("max1586", 0x14), - .platform_data = &vpac270_max1587a_info, - }, -}; - -static void __init vpac270_pmic_init(void) -{ - i2c_register_board_info(1, ARRAY_AND_SIZE(vpac270_pi2c_board_info)); -} -#else -static inline void vpac270_pmic_init(void) {} -#endif - - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static void __init vpac270_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(vpac270_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - pxa_set_i2c_info(NULL); - pxa27x_set_i2c_power_info(NULL); - - vpac270_pmic_init(); - vpac270_lcd_init(); - vpac270_mmc_init(); - vpac270_nor_init(); - vpac270_onenand_init(); - vpac270_leds_init(); - vpac270_keys_init(); - vpac270_uhc_init(); - vpac270_udc_init(); - vpac270_eth_init(); - vpac270_ts_init(); - vpac270_rtc_init(); - vpac270_ide_init(); - - regulator_has_full_constraints(); -} - -MACHINE_START(VPAC270, "Voipac PXA270") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = vpac270_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/vpac270.h b/arch/arm/mach-pxa/vpac270.h deleted file mode 100644 index 0cd094d8c553..000000000000 --- a/arch/arm/mach-pxa/vpac270.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Voipac PXA270 - * - * Copyright (C) 2010 - * Marek Vasut <marek.vasut@gmail.com> - */ - -#ifndef _INCLUDE_VPAC270_H_ -#define _INCLUDE_VPAC270_H_ - -#define GPIO1_VPAC270_USER_BTN 1 - -#define GPIO15_VPAC270_LED_ORANGE 15 - -#define GPIO81_VPAC270_BKL_ON 81 -#define GPIO83_VPAC270_NL_ON 83 - -#define GPIO52_VPAC270_SD_READONLY 52 -#define GPIO53_VPAC270_SD_DETECT_N 53 - -#define GPIO84_VPAC270_PCMCIA_CD 84 -#define GPIO35_VPAC270_PCMCIA_RDY 35 -#define GPIO107_VPAC270_PCMCIA_PPEN 107 -#define GPIO11_VPAC270_PCMCIA_RESET 11 -#define GPIO17_VPAC270_CF_CD 17 -#define GPIO12_VPAC270_CF_RDY 12 -#define GPIO16_VPAC270_CF_RESET 16 - -#define GPIO41_VPAC270_UDC_DETECT 41 - -#define GPIO114_VPAC270_ETH_IRQ 114 - -#define GPIO36_VPAC270_IDE_IRQ 36 - -#define GPIO113_VPAC270_TS_IRQ 113 - -#endif diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c deleted file mode 100644 index 6bb02b65fb82..000000000000 --- a/arch/arm/mach-pxa/xcep.c +++ /dev/null @@ -1,190 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* linux/arch/arm/mach-pxa/xcep.c - * - * Support for the Iskratel Electronics XCEP platform as used in - * the Libera instruments from Instrumentation Technologies. - * - * Author: Ales Bardorfer <ales@i-tech.si> - * Contributions by: Abbott, MG (Michael) <michael.abbott@diamond.ac.uk> - * Contributions by: Matej Kenda <matej.kenda@i-tech.si> - * Created: June 2006 - * Copyright: (C) 2006-2009 Instrumentation Technologies - */ - -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/smc91x.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> -#include <asm/mach/map.h> - -#include "pxa25x.h" -#include "addr-map.h" -#include "smemc.h" - -#include "generic.h" -#include "devices.h" - -#define XCEP_ETH_PHYS (PXA_CS3_PHYS + 0x00000300) -#define XCEP_ETH_PHYS_END (PXA_CS3_PHYS + 0x000fffff) -#define XCEP_ETH_ATTR (PXA_CS3_PHYS + 0x02000000) -#define XCEP_ETH_ATTR_END (PXA_CS3_PHYS + 0x020fffff) -#define XCEP_ETH_IRQ IRQ_GPIO0 - -/* XCEP CPLD base */ -#define XCEP_CPLD_BASE 0xf0000000 - - -/* Flash partitions. */ - -static struct mtd_partition xcep_partitions[] = { - { - .name = "Bootloader", - .size = 0x00040000, - .offset = 0, - .mask_flags = MTD_WRITEABLE - }, { - .name = "Bootloader ENV", - .size = 0x00040000, - .offset = 0x00040000, - .mask_flags = MTD_WRITEABLE - }, { - .name = "Kernel", - .size = 0x00100000, - .offset = 0x00080000, - }, { - .name = "Rescue fs", - .size = 0x00280000, - .offset = 0x00180000, - }, { - .name = "Filesystem", - .size = MTDPART_SIZ_FULL, - .offset = 0x00400000 - } -}; - -static struct physmap_flash_data xcep_flash_data[] = { - { - .width = 4, /* bankwidth in bytes */ - .parts = xcep_partitions, - .nr_parts = ARRAY_SIZE(xcep_partitions) - } -}; - -static struct resource flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_32M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = xcep_flash_data, - }, - .resource = &flash_resource, - .num_resources = 1, -}; - - - -/* SMC LAN91C111 network controller. */ - -static struct resource smc91x_resources[] = { - [0] = { - .name = "smc91x-regs", - .start = XCEP_ETH_PHYS, - .end = XCEP_ETH_PHYS_END, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = XCEP_ETH_IRQ, - .end = XCEP_ETH_IRQ, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .name = "smc91x-attrib", - .start = XCEP_ETH_ATTR, - .end = XCEP_ETH_ATTR_END, - .flags = IORESOURCE_MEM, - }, -}; - -static struct smc91x_platdata xcep_smc91x_info = { - .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | - SMC91X_NOWAIT | SMC91X_USE_DMA, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = -1, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &xcep_smc91x_info, - }, -}; - - -static struct platform_device *devices[] __initdata = { - &flash_device, - &smc91x_device, -}; - - -/* We have to state that there are HWMON devices on the I2C bus on XCEP. - * Drivers for HWMON verify capabilities of the adapter when loading and - * refuse to attach if the adapter doesn't support HWMON class of devices. */ -static struct i2c_pxa_platform_data xcep_i2c_platform_data = { - .class = I2C_CLASS_HWMON -}; - - -static mfp_cfg_t xcep_pin_config[] __initdata = { - GPIO79_nCS_3, /* SMC 91C111 chip select. */ - GPIO80_nCS_4, /* CPLD chip select. */ - /* SSP communication to MSP430 */ - GPIO23_SSP1_SCLK, - GPIO24_SSP1_SFRM, - GPIO25_SSP1_TXD, - GPIO26_SSP1_RXD, - GPIO27_SSP1_EXTCLK -}; - -static void __init xcep_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - pxa_set_hwuart_info(NULL); - - /* See Intel XScale Developer's Guide for details */ - /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */ - __raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1); - /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */ - __raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2); - - platform_add_devices(ARRAY_AND_SIZE(devices)); - pxa_set_i2c_info(&xcep_i2c_platform_data); -} - -MACHINE_START(XCEP, "Iskratel XCEP") - .atag_offset = 0x100, - .init_machine = xcep_init, - .map_io = pxa25x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa25x_init_irq, - .handle_irq = pxa25x_handle_irq, - .init_time = pxa_timer_init, - .restart = pxa_restart, -MACHINE_END - diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c deleted file mode 100644 index c4d4162a7e6e..000000000000 --- a/arch/arm/mach-pxa/z2.c +++ /dev/null @@ -1,781 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/z2.c - * - * Support for the Zipit Z2 Handheld device. - * - * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com> - * - * Based on research and code by: Ken McGuire - * Based on mainstone.c as modified for the Zipit Z2. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/z2_battery.h> -#include <linux/dma-mapping.h> -#include <linux/spi/spi.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/spi/libertas_spi.h> -#include <linux/power_supply.h> -#include <linux/mtd/physmap.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/gpio_keys.h> -#include <linux/delay.h> -#include <linux/regulator/machine.h> -#include <linux/platform_data/i2c-pxa.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "pxa27x.h" -#include "mfp-pxa27x.h" -#include "z2.h" -#include <linux/platform_data/video-pxafb.h> -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include "pm.h" - -#include "generic.h" -#include "devices.h" - -/****************************************************************************** - * Pin configuration - ******************************************************************************/ -static unsigned long z2_pin_config[] = { - - /* LCD - 16bpp Active TFT */ - GPIO58_LCD_LDD_0, - GPIO59_LCD_LDD_1, - GPIO60_LCD_LDD_2, - GPIO61_LCD_LDD_3, - GPIO62_LCD_LDD_4, - GPIO63_LCD_LDD_5, - GPIO64_LCD_LDD_6, - GPIO65_LCD_LDD_7, - GPIO66_LCD_LDD_8, - GPIO67_LCD_LDD_9, - GPIO68_LCD_LDD_10, - GPIO69_LCD_LDD_11, - GPIO70_LCD_LDD_12, - GPIO71_LCD_LDD_13, - GPIO72_LCD_LDD_14, - GPIO73_LCD_LDD_15, - GPIO74_LCD_FCLK, - GPIO75_LCD_LCLK, - GPIO76_LCD_PCLK, - GPIO77_LCD_BIAS, - GPIO19_GPIO, /* LCD reset */ - GPIO88_GPIO, /* LCD chipselect */ - - /* PWM */ - GPIO115_PWM1_OUT, /* Keypad Backlight */ - GPIO11_PWM2_OUT, /* LCD Backlight */ - - /* MMC */ - GPIO32_MMC_CLK, - GPIO112_MMC_CMD, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO96_GPIO, /* SD detect */ - - /* STUART */ - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, - - /* Keypad */ - GPIO100_KP_MKIN_0, - GPIO101_KP_MKIN_1, - GPIO102_KP_MKIN_2, - GPIO34_KP_MKIN_3, - GPIO38_KP_MKIN_4, - GPIO16_KP_MKIN_5, - GPIO17_KP_MKIN_6, - GPIO103_KP_MKOUT_0, - GPIO104_KP_MKOUT_1, - GPIO105_KP_MKOUT_2, - GPIO106_KP_MKOUT_3, - GPIO107_KP_MKOUT_4, - GPIO108_KP_MKOUT_5, - GPIO35_KP_MKOUT_6, - GPIO41_KP_MKOUT_7, - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, - - /* SSP1 */ - GPIO23_SSP1_SCLK, /* SSP1_SCK */ - GPIO25_SSP1_TXD, /* SSP1_TXD */ - GPIO26_SSP1_RXD, /* SSP1_RXD */ - - /* SSP2 */ - GPIO22_SSP2_SCLK, /* SSP2_SCK */ - GPIO13_SSP2_TXD, /* SSP2_TXD */ - GPIO40_SSP2_RXD, /* SSP2_RXD */ - - /* LEDs */ - GPIO10_GPIO, /* WiFi LED */ - GPIO83_GPIO, /* Charging LED */ - GPIO85_GPIO, /* Charged LED */ - - /* I2S */ - GPIO28_I2S_BITCLK_OUT, - GPIO29_I2S_SDATA_IN, - GPIO30_I2S_SDATA_OUT, - GPIO31_I2S_SYNC, - GPIO113_I2S_SYSCLK, - - /* MISC */ - GPIO0_GPIO, /* AC power detect */ - GPIO1_GPIO, /* Power button */ - GPIO37_GPIO, /* Headphone detect */ - GPIO98_GPIO, /* Lid switch */ - GPIO14_GPIO, /* WiFi Power */ - GPIO24_GPIO, /* WiFi CS */ - GPIO36_GPIO, /* WiFi IRQ */ - GPIO88_GPIO, /* LCD CS */ -}; - -/****************************************************************************** - * NOR Flash - ******************************************************************************/ -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct resource z2_flash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_8M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct mtd_partition z2_flash_parts[] = { - { - .name = "U-Boot Bootloader", - .offset = 0x0, - .size = 0x40000, - }, { - .name = "U-Boot Environment", - .offset = 0x40000, - .size = 0x20000, - }, { - .name = "Flash", - .offset = 0x60000, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data z2_flash_data = { - .width = 2, - .parts = z2_flash_parts, - .nr_parts = ARRAY_SIZE(z2_flash_parts), -}; - -static struct platform_device z2_flash = { - .name = "physmap-flash", - .id = -1, - .resource = &z2_flash_resource, - .num_resources = 1, - .dev = { - .platform_data = &z2_flash_data, - }, -}; - -static void __init z2_nor_init(void) -{ - platform_device_register(&z2_flash); -} -#else -static inline void z2_nor_init(void) {} -#endif - -/****************************************************************************** - * Backlight - ******************************************************************************/ -#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) -static struct pwm_lookup z2_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight.0", NULL, 1260320, - PWM_POLARITY_NORMAL), - PWM_LOOKUP("pxa27x-pwm.0", 1, "pwm-backlight.1", NULL, 1260320, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data z2_backlight_data[] = { - [0] = { - /* Keypad Backlight */ - .max_brightness = 1023, - .dft_brightness = 0, - }, - [1] = { - /* LCD Backlight */ - .max_brightness = 1023, - .dft_brightness = 512, - }, -}; - -static struct platform_device z2_backlight_devices[2] = { - { - .name = "pwm-backlight", - .id = 0, - .dev = { - .platform_data = &z2_backlight_data[1], - }, - }, - { - .name = "pwm-backlight", - .id = 1, - .dev = { - .platform_data = &z2_backlight_data[0], - }, - }, -}; -static void __init z2_pwm_init(void) -{ - pwm_add_table(z2_pwm_lookup, ARRAY_SIZE(z2_pwm_lookup)); - platform_device_register(&z2_backlight_devices[0]); - platform_device_register(&z2_backlight_devices[1]); -} -#else -static inline void z2_pwm_init(void) {} -#endif - -/****************************************************************************** - * Framebuffer - ******************************************************************************/ -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pxafb_mode_info z2_lcd_modes[] = { -{ - .pixclock = 192000, - .xres = 240, - .yres = 320, - .bpp = 16, - - .left_margin = 4, - .right_margin = 8, - .upper_margin = 4, - .lower_margin = 8, - - .hsync_len = 4, - .vsync_len = 4, -}, -}; - -static struct pxafb_mach_info z2_lcd_screen = { - .modes = z2_lcd_modes, - .num_modes = ARRAY_SIZE(z2_lcd_modes), - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_BIAS_ACTIVE_LOW | - LCD_ALTERNATE_MAPPING, -}; - -static void __init z2_lcd_init(void) -{ - pxa_set_fb_info(NULL, &z2_lcd_screen); -} -#else -static inline void z2_lcd_init(void) {} -#endif - -/****************************************************************************** - * SD/MMC card controller - ******************************************************************************/ -#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) -static struct pxamci_platform_data z2_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .detect_delay_ms = 200, -}; - -static struct gpiod_lookup_table z2_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO96_ZIPITZ2_SD_DETECT, - "cd", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init z2_mmc_init(void) -{ - gpiod_add_lookup_table(&z2_mci_gpio_table); - pxa_set_mci_info(&z2_mci_platform_data); -} -#else -static inline void z2_mmc_init(void) {} -#endif - -/****************************************************************************** - * LEDs - ******************************************************************************/ -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -struct gpio_led z2_gpio_leds[] = { -{ - .name = "z2:green:wifi", - .default_trigger = "none", - .gpio = GPIO10_ZIPITZ2_LED_WIFI, - .active_low = 1, -}, { - .name = "z2:green:charged", - .default_trigger = "mmc0", - .gpio = GPIO85_ZIPITZ2_LED_CHARGED, - .active_low = 1, -}, { - .name = "z2:amber:charging", - .default_trigger = "Z2-charging-or-full", - .gpio = GPIO83_ZIPITZ2_LED_CHARGING, - .active_low = 1, -}, -}; - -static struct gpio_led_platform_data z2_gpio_led_info = { - .leds = z2_gpio_leds, - .num_leds = ARRAY_SIZE(z2_gpio_leds), -}; - -static struct platform_device z2_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &z2_gpio_led_info, - } -}; - -static void __init z2_leds_init(void) -{ - platform_device_register(&z2_leds); -} -#else -static inline void z2_leds_init(void) {} -#endif - -/****************************************************************************** - * GPIO keyboard - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int z2_matrix_keys[] = { - KEY(0, 0, KEY_OPTION), - KEY(1, 0, KEY_UP), - KEY(2, 0, KEY_DOWN), - KEY(3, 0, KEY_LEFT), - KEY(4, 0, KEY_RIGHT), - KEY(5, 0, KEY_END), - KEY(6, 0, KEY_KPPLUS), - - KEY(0, 1, KEY_HOME), - KEY(1, 1, KEY_Q), - KEY(2, 1, KEY_I), - KEY(3, 1, KEY_G), - KEY(4, 1, KEY_X), - KEY(5, 1, KEY_ENTER), - KEY(6, 1, KEY_KPMINUS), - - KEY(0, 2, KEY_PAGEUP), - KEY(1, 2, KEY_W), - KEY(2, 2, KEY_O), - KEY(3, 2, KEY_H), - KEY(4, 2, KEY_C), - KEY(5, 2, KEY_LEFTALT), - - KEY(0, 3, KEY_PAGEDOWN), - KEY(1, 3, KEY_E), - KEY(2, 3, KEY_P), - KEY(3, 3, KEY_J), - KEY(4, 3, KEY_V), - KEY(5, 3, KEY_LEFTSHIFT), - - KEY(0, 4, KEY_ESC), - KEY(1, 4, KEY_R), - KEY(2, 4, KEY_A), - KEY(3, 4, KEY_K), - KEY(4, 4, KEY_B), - KEY(5, 4, KEY_LEFTCTRL), - - KEY(0, 5, KEY_TAB), - KEY(1, 5, KEY_T), - KEY(2, 5, KEY_S), - KEY(3, 5, KEY_L), - KEY(4, 5, KEY_N), - KEY(5, 5, KEY_SPACE), - - KEY(0, 6, KEY_STOPCD), - KEY(1, 6, KEY_Y), - KEY(2, 6, KEY_D), - KEY(3, 6, KEY_BACKSPACE), - KEY(4, 6, KEY_M), - KEY(5, 6, KEY_COMMA), - - KEY(0, 7, KEY_PLAYCD), - KEY(1, 7, KEY_U), - KEY(2, 7, KEY_F), - KEY(3, 7, KEY_Z), - KEY(4, 7, KEY_SEMICOLON), - KEY(5, 7, KEY_DOT), -}; - -static struct matrix_keymap_data z2_matrix_keymap_data = { - .keymap = z2_matrix_keys, - .keymap_size = ARRAY_SIZE(z2_matrix_keys), -}; - -static struct pxa27x_keypad_platform_data z2_keypad_platform_data = { - .matrix_key_rows = 7, - .matrix_key_cols = 8, - .matrix_keymap_data = &z2_matrix_keymap_data, - - .debounce_interval = 30, -}; - -static void __init z2_mkp_init(void) -{ - pxa_set_keypad_info(&z2_keypad_platform_data); -} -#else -static inline void z2_mkp_init(void) {} -#endif - -/****************************************************************************** - * GPIO keys - ******************************************************************************/ -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) -static struct gpio_keys_button z2_pxa_buttons[] = { - { - .code = KEY_POWER, - .gpio = GPIO1_ZIPITZ2_POWER_BUTTON, - .active_low = 0, - .desc = "Power Button", - .wakeup = 1, - .type = EV_KEY, - }, - { - .code = SW_LID, - .gpio = GPIO98_ZIPITZ2_LID_BUTTON, - .active_low = 1, - .desc = "Lid Switch", - .wakeup = 0, - .type = EV_SW, - }, -}; - -static struct gpio_keys_platform_data z2_pxa_keys_data = { - .buttons = z2_pxa_buttons, - .nbuttons = ARRAY_SIZE(z2_pxa_buttons), -}; - -static struct platform_device z2_pxa_keys = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &z2_pxa_keys_data, - }, -}; - -static void __init z2_keys_init(void) -{ - platform_device_register(&z2_pxa_keys); -} -#else -static inline void z2_keys_init(void) {} -#endif - -/****************************************************************************** - * Battery - ******************************************************************************/ -#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) -static struct z2_battery_info batt_chip_info = { - .batt_I2C_bus = 0, - .batt_I2C_addr = 0x55, - .batt_I2C_reg = 2, - .min_voltage = 3475000, - .max_voltage = 4190000, - .batt_div = 59, - .batt_mult = 1000000, - .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION, - .batt_name = "Z2", -}; - -static struct gpiod_lookup_table z2_battery_gpio_table = { - .dev_id = "aer915", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO0_ZIPITZ2_AC_DETECT, - NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct i2c_board_info __initdata z2_i2c_board_info[] = { - { - I2C_BOARD_INFO("aer915", 0x55), - .dev_name = "aer915", - .platform_data = &batt_chip_info, - }, { - I2C_BOARD_INFO("wm8750", 0x1b), - }, - -}; - -static void __init z2_i2c_init(void) -{ - pxa_set_i2c_info(NULL); - gpiod_add_lookup_table(&z2_battery_gpio_table); - i2c_register_board_info(0, ARRAY_AND_SIZE(z2_i2c_board_info)); -} -#else -static inline void z2_i2c_init(void) {} -#endif - -/****************************************************************************** - * SSP Devices - WiFi and LCD control - ******************************************************************************/ -#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) -/* WiFi */ -static int z2_lbs_spi_setup(struct spi_device *spi) -{ - int ret = 0; - - ret = gpio_request(GPIO14_ZIPITZ2_WIFI_POWER, "WiFi Power"); - if (ret) - goto err; - - ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_POWER, 1); - if (ret) - goto err2; - - /* Wait until card is powered on */ - mdelay(180); - - spi->bits_per_word = 16; - spi->mode = SPI_MODE_2, - - spi_setup(spi); - - return 0; - -err2: - gpio_free(GPIO14_ZIPITZ2_WIFI_POWER); -err: - return ret; -}; - -static int z2_lbs_spi_teardown(struct spi_device *spi) -{ - gpio_set_value(GPIO14_ZIPITZ2_WIFI_POWER, 0); - gpio_free(GPIO14_ZIPITZ2_WIFI_POWER); - - return 0; -}; - -static struct pxa2xx_spi_chip z2_lbs_chip_info = { - .rx_threshold = 8, - .tx_threshold = 8, - .timeout = 1000, -}; - -static struct libertas_spi_platform_data z2_lbs_pdata = { - .use_dummy_writes = 1, - .setup = z2_lbs_spi_setup, - .teardown = z2_lbs_spi_teardown, -}; - -/* LCD */ -static struct pxa2xx_spi_chip lms283_chip_info = { - .rx_threshold = 1, - .tx_threshold = 1, - .timeout = 64, -}; - -static struct gpiod_lookup_table lms283_gpio_table = { - .dev_id = "spi2.0", /* SPI bus 2 chip select 0 */ - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO19_ZIPITZ2_LCD_RESET, - "reset", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct spi_board_info spi_board_info[] __initdata = { -{ - .modalias = "libertas_spi", - .platform_data = &z2_lbs_pdata, - .controller_data = &z2_lbs_chip_info, - .irq = PXA_GPIO_TO_IRQ(GPIO36_ZIPITZ2_WIFI_IRQ), - .max_speed_hz = 13000000, - .bus_num = 1, - .chip_select = 0, -}, -{ - .modalias = "lms283gf05", - .controller_data = &lms283_chip_info, - .max_speed_hz = 400000, - .bus_num = 2, - .chip_select = 0, -}, -}; - -static struct pxa2xx_spi_controller pxa_ssp1_master_info = { - .num_chipselect = 1, - .enable_dma = 1, -}; - -static struct pxa2xx_spi_controller pxa_ssp2_master_info = { - .num_chipselect = 1, -}; - -static struct gpiod_lookup_table pxa_ssp1_gpio_table = { - .dev_id = "spi1", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", GPIO24_ZIPITZ2_WIFI_CS, "cs", 0, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct gpiod_lookup_table pxa_ssp2_gpio_table = { - .dev_id = "spi2", - .table = { - GPIO_LOOKUP_IDX("gpio-pxa", GPIO88_ZIPITZ2_LCD_CS, "cs", 0, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init z2_spi_init(void) -{ - gpiod_add_lookup_table(&pxa_ssp1_gpio_table); - gpiod_add_lookup_table(&pxa_ssp2_gpio_table); - pxa2xx_set_spi_info(1, &pxa_ssp1_master_info); - pxa2xx_set_spi_info(2, &pxa_ssp2_master_info); - gpiod_add_lookup_table(&lms283_gpio_table); - spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); -} -#else -static inline void z2_spi_init(void) {} -#endif - -static struct gpiod_lookup_table z2_audio_gpio_table = { - .dev_id = "soc-audio", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO37_ZIPITZ2_HEADSET_DETECT, - "hsdet-gpio", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/****************************************************************************** - * Core power regulator - ******************************************************************************/ -#if defined(CONFIG_REGULATOR_TPS65023) || \ - defined(CONFIG_REGULATOR_TPS65023_MODULE) -static struct regulator_consumer_supply z2_tps65021_consumers[] = { - REGULATOR_SUPPLY("vcc_core", NULL), -}; - -static struct regulator_init_data z2_tps65021_info[] = { - { - .constraints = { - .name = "vcc_core range", - .min_uV = 800000, - .max_uV = 1600000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .consumer_supplies = z2_tps65021_consumers, - .num_consumer_supplies = ARRAY_SIZE(z2_tps65021_consumers), - }, { - .constraints = { - .name = "DCDC2", - .min_uV = 3300000, - .max_uV = 3300000, - .always_on = 1, - }, - }, { - .constraints = { - .name = "DCDC3", - .min_uV = 1800000, - .max_uV = 1800000, - .always_on = 1, - }, - }, { - .constraints = { - .name = "LDO1", - .min_uV = 1000000, - .max_uV = 3150000, - .always_on = 1, - }, - }, { - .constraints = { - .name = "LDO2", - .min_uV = 1050000, - .max_uV = 3300000, - .always_on = 1, - }, - } -}; - -static struct i2c_board_info __initdata z2_pi2c_board_info[] = { - { - I2C_BOARD_INFO("tps65021", 0x48), - .platform_data = &z2_tps65021_info, - }, -}; - -static void __init z2_pmic_init(void) -{ - pxa27x_set_i2c_power_info(NULL); - i2c_register_board_info(1, ARRAY_AND_SIZE(z2_pi2c_board_info)); -} -#else -static inline void z2_pmic_init(void) {} -#endif - -#ifdef CONFIG_PM -static void z2_power_off(void) -{ - /* We're using deep sleep as poweroff, so clear PSPR to ensure that - * bootloader will jump to its entry point in resume handler - */ - PSPR = 0x0; - local_irq_disable(); - pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP); - pxa27x_cpu_pm_enter(PM_SUSPEND_MEM); -} -#else -#define z2_power_off NULL -#endif - -/****************************************************************************** - * Machine init - ******************************************************************************/ -static void __init z2_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(z2_pin_config)); - - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - z2_lcd_init(); - z2_mmc_init(); - z2_mkp_init(); - z2_i2c_init(); - z2_spi_init(); - z2_nor_init(); - z2_pwm_init(); - z2_leds_init(); - z2_keys_init(); - z2_pmic_init(); - - gpiod_add_lookup_table(&z2_audio_gpio_table); - - pm_power_off = z2_power_off; -} - -MACHINE_START(ZIPIT2, "Zipit Z2") - .atag_offset = 0x100, - .map_io = pxa27x_map_io, - .nr_irqs = PXA_NR_IRQS, - .init_irq = pxa27x_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = z2_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/z2.h b/arch/arm/mach-pxa/z2.h deleted file mode 100644 index a78b2e28b1db..000000000000 --- a/arch/arm/mach-pxa/z2.h +++ /dev/null @@ -1,37 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-pxa/include/mach/z2.h - * - * Author: Ken McGuire - * Created: Feb 6, 2009 - */ - -#ifndef ASM_ARCH_ZIPIT2_H -#define ASM_ARCH_ZIPIT2_H - -/* LEDs */ -#define GPIO10_ZIPITZ2_LED_WIFI 10 -#define GPIO85_ZIPITZ2_LED_CHARGED 85 -#define GPIO83_ZIPITZ2_LED_CHARGING 83 - -/* SD/MMC */ -#define GPIO96_ZIPITZ2_SD_DETECT 96 - -/* GPIO Buttons */ -#define GPIO1_ZIPITZ2_POWER_BUTTON 1 -#define GPIO98_ZIPITZ2_LID_BUTTON 98 - -/* Libertas GSPI8686 WiFi */ -#define GPIO14_ZIPITZ2_WIFI_POWER 14 -#define GPIO24_ZIPITZ2_WIFI_CS 24 -#define GPIO36_ZIPITZ2_WIFI_IRQ 36 - -/* LCD */ -#define GPIO19_ZIPITZ2_LCD_RESET 19 -#define GPIO88_ZIPITZ2_LCD_CS 88 - -/* MISC GPIOs */ -#define GPIO0_ZIPITZ2_AC_DETECT 0 -#define GPIO37_ZIPITZ2_HEADSET_DETECT 37 - -#endif diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c deleted file mode 100644 index ff0d8bb9f557..000000000000 --- a/arch/arm/mach-pxa/zeus.c +++ /dev/null @@ -1,974 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Support for the Arcom ZEUS. - * - * Copyright (C) 2006 Arcom Control Systems Ltd. - * - * Loosely based on Arcom's 2.6.16.28. - * Maintained by Marc Zyngier <maz@misterjones.org> - */ - -#include <linux/cpufreq.h> -#include <linux/interrupt.h> -#include <linux/leds.h> -#include <linux/irq.h> -#include <linux/pm.h> -#include <linux/property.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/serial_8250.h> -#include <linux/dm9000.h> -#include <linux/mmc/host.h> -#include <linux/spi/spi.h> -#include <linux/spi/pxa2xx_spi.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/platform_data/pca953x.h> -#include <linux/apm-emulation.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> - -#include <asm/mach-types.h> -#include <asm/suspend.h> -#include <asm/system_info.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "pxa27x.h" -#include "devices.h" -#include "regs-uart.h" -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/mmc-pxamci.h> -#include "pxa27x-udc.h" -#include "udc.h" -#include <linux/platform_data/video-pxafb.h> -#include "pm.h" -#include <linux/platform_data/asoc-pxa.h> -#include "viper-pcmcia.h" -#include "zeus.h" -#include "smemc.h" - -#include "generic.h" - -/* - * Interrupt handling - */ - -static unsigned long zeus_irq_enabled_mask; -static const int zeus_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, }; -static const int zeus_isa_irq_map[] = { - 0, /* ISA irq #0, invalid */ - 0, /* ISA irq #1, invalid */ - 0, /* ISA irq #2, invalid */ - 1 << 0, /* ISA irq #3 */ - 1 << 1, /* ISA irq #4 */ - 1 << 2, /* ISA irq #5 */ - 1 << 3, /* ISA irq #6 */ - 1 << 4, /* ISA irq #7 */ - 0, /* ISA irq #8, invalid */ - 0, /* ISA irq #9, invalid */ - 1 << 5, /* ISA irq #10 */ - 1 << 6, /* ISA irq #11 */ - 1 << 7, /* ISA irq #12 */ -}; - -static inline int zeus_irq_to_bitmask(unsigned int irq) -{ - return zeus_isa_irq_map[irq - PXA_ISA_IRQ(0)]; -} - -static inline int zeus_bit_to_irq(int bit) -{ - return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0); -} - -static void zeus_ack_irq(struct irq_data *d) -{ - __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ); -} - -static void zeus_mask_irq(struct irq_data *d) -{ - zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq)); -} - -static void zeus_unmask_irq(struct irq_data *d) -{ - zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq); -} - -static inline unsigned long zeus_irq_pending(void) -{ - return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask; -} - -static void zeus_irq_handler(struct irq_desc *desc) -{ - unsigned int irq; - unsigned long pending; - - pending = zeus_irq_pending(); - do { - /* we're in a chained irq handler, - * so ack the interrupt by hand */ - desc->irq_data.chip->irq_ack(&desc->irq_data); - - if (likely(pending)) { - irq = zeus_bit_to_irq(__ffs(pending)); - generic_handle_irq(irq); - } - pending = zeus_irq_pending(); - } while (pending); -} - -static struct irq_chip zeus_irq_chip = { - .name = "ISA", - .irq_ack = zeus_ack_irq, - .irq_mask = zeus_mask_irq, - .irq_unmask = zeus_unmask_irq, -}; - -static void __init zeus_init_irq(void) -{ - int level; - int isa_irq; - - pxa27x_init_irq(); - - /* Peripheral IRQs. It would be nice to move those inside driver - configuration, but it is not supported at the moment. */ - irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING); - irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING); - irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING); - irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO), - IRQ_TYPE_EDGE_FALLING); - irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING); - - /* Setup ISA IRQs */ - for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) { - isa_irq = zeus_bit_to_irq(level); - irq_set_chip_and_handler(isa_irq, &zeus_irq_chip, - handle_edge_irq); - irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE); - } - - irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING); - irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler); -} - - -/* - * Platform devices - */ - -/* Flash */ -static struct resource zeus_mtd_resources[] = { - [0] = { /* NOR Flash (up to 64MB) */ - .start = ZEUS_FLASH_PHYS, - .end = ZEUS_FLASH_PHYS + SZ_64M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { /* SRAM */ - .start = ZEUS_SRAM_PHYS, - .end = ZEUS_SRAM_PHYS + SZ_512K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct physmap_flash_data zeus_flash_data[] = { - [0] = { - .width = 2, - .parts = NULL, - .nr_parts = 0, - }, -}; - -static struct platform_device zeus_mtd_devices[] = { - [0] = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &zeus_flash_data[0], - }, - .resource = &zeus_mtd_resources[0], - .num_resources = 1, - }, -}; - -/* Serial */ -static struct resource zeus_serial_resources[] = { - { - .start = 0x10000000, - .end = 0x1000000f, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x10800000, - .end = 0x1080000f, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x11000000, - .end = 0x1100000f, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x40100000, - .end = 0x4010001f, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x40200000, - .end = 0x4020001f, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x40700000, - .end = 0x4070001f, - .flags = IORESOURCE_MEM, - }, -}; - -static struct plat_serial8250_port serial_platform_data[] = { - /* External UARTs */ - /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */ - { /* COM1 */ - .mapbase = 0x10000000, - .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO), - .irqflags = IRQF_TRIGGER_RISING, - .uartclk = 14745600, - .regshift = 1, - .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - { /* COM2 */ - .mapbase = 0x10800000, - .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO), - .irqflags = IRQF_TRIGGER_RISING, - .uartclk = 14745600, - .regshift = 1, - .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - { /* COM3 */ - .mapbase = 0x11000000, - .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO), - .irqflags = IRQF_TRIGGER_RISING, - .uartclk = 14745600, - .regshift = 1, - .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - { /* COM4 */ - .mapbase = 0x11800000, - .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO), - .irqflags = IRQF_TRIGGER_RISING, - .uartclk = 14745600, - .regshift = 1, - .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - /* Internal UARTs */ - { /* FFUART */ - .membase = (void *)&FFUART, - .mapbase = __PREG(FFUART), - .irq = IRQ_FFUART, - .uartclk = 921600 * 16, - .regshift = 2, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - { /* BTUART */ - .membase = (void *)&BTUART, - .mapbase = __PREG(BTUART), - .irq = IRQ_BTUART, - .uartclk = 921600 * 16, - .regshift = 2, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - { /* STUART */ - .membase = (void *)&STUART, - .mapbase = __PREG(STUART), - .irq = IRQ_STUART, - .uartclk = 921600 * 16, - .regshift = 2, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - }, - { }, -}; - -static struct platform_device zeus_serial_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = serial_platform_data, - }, - .num_resources = ARRAY_SIZE(zeus_serial_resources), - .resource = zeus_serial_resources, -}; - -/* Ethernet */ -static struct resource zeus_dm9k0_resource[] = { - [0] = { - .start = ZEUS_ETH0_PHYS, - .end = ZEUS_ETH0_PHYS + 1, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = ZEUS_ETH0_PHYS + 2, - .end = ZEUS_ETH0_PHYS + 3, - .flags = IORESOURCE_MEM - }, - [2] = { - .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO), - .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - }, -}; - -static struct resource zeus_dm9k1_resource[] = { - [0] = { - .start = ZEUS_ETH1_PHYS, - .end = ZEUS_ETH1_PHYS + 1, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = ZEUS_ETH1_PHYS + 2, - .end = ZEUS_ETH1_PHYS + 3, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO), - .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, - }, -}; - -static struct dm9000_plat_data zeus_dm9k_platdata = { - .flags = DM9000_PLATF_16BITONLY, -}; - -static struct platform_device zeus_dm9k0_device = { - .name = "dm9000", - .id = 0, - .num_resources = ARRAY_SIZE(zeus_dm9k0_resource), - .resource = zeus_dm9k0_resource, - .dev = { - .platform_data = &zeus_dm9k_platdata, - } -}; - -static struct platform_device zeus_dm9k1_device = { - .name = "dm9000", - .id = 1, - .num_resources = ARRAY_SIZE(zeus_dm9k1_resource), - .resource = zeus_dm9k1_resource, - .dev = { - .platform_data = &zeus_dm9k_platdata, - } -}; - -/* External SRAM */ -static struct resource zeus_sram_resource = { - .start = ZEUS_SRAM_PHYS, - .end = ZEUS_SRAM_PHYS + ZEUS_SRAM_SIZE * 2 - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device zeus_sram_device = { - .name = "pxa2xx-8bit-sram", - .id = 0, - .num_resources = 1, - .resource = &zeus_sram_resource, -}; - -/* SPI interface on SSP3 */ -static struct pxa2xx_spi_controller pxa2xx_spi_ssp3_master_info = { - .num_chipselect = 1, - .enable_dma = 1, -}; - -/* CAN bus on SPI */ -static struct regulator_consumer_supply can_regulator_consumer = - REGULATOR_SUPPLY("vdd", "spi3.0"); - -static struct regulator_init_data can_regulator_init_data = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .consumer_supplies = &can_regulator_consumer, - .num_consumer_supplies = 1, -}; - -static struct fixed_voltage_config can_regulator_pdata = { - .supply_name = "CAN_SHDN", - .microvolts = 3300000, - .init_data = &can_regulator_init_data, -}; - -static struct platform_device can_regulator_device = { - .name = "reg-fixed-voltage", - .id = 0, - .dev = { - .platform_data = &can_regulator_pdata, - }, -}; - -static struct gpiod_lookup_table can_regulator_gpiod_table = { - .dev_id = "reg-fixed-voltage.0", - .table = { - GPIO_LOOKUP("gpio-pxa", ZEUS_CAN_SHDN_GPIO, - NULL, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static const struct property_entry mcp251x_properties[] = { - PROPERTY_ENTRY_U32("clock-frequency", 16000000), - {} -}; - -static const struct software_node mcp251x_node = { - .properties = mcp251x_properties, -}; - -static struct spi_board_info zeus_spi_board_info[] = { - [0] = { - .modalias = "mcp2515", - .swnode = &mcp251x_node, - .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO), - .max_speed_hz = 1*1000*1000, - .bus_num = 3, - .mode = SPI_MODE_0, - .chip_select = 0, - }, -}; - -/* Leds */ -static struct gpio_led zeus_leds[] = { - [0] = { - .name = "zeus:yellow:1", - .default_trigger = "heartbeat", - .gpio = ZEUS_EXT0_GPIO(3), - .active_low = 1, - }, - [1] = { - .name = "zeus:yellow:2", - .default_trigger = "default-on", - .gpio = ZEUS_EXT0_GPIO(4), - .active_low = 1, - }, - [2] = { - .name = "zeus:yellow:3", - .default_trigger = "default-on", - .gpio = ZEUS_EXT0_GPIO(5), - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data zeus_leds_info = { - .leds = zeus_leds, - .num_leds = ARRAY_SIZE(zeus_leds), -}; - -static struct platform_device zeus_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &zeus_leds_info, - }, -}; - -static void zeus_cf_reset(int state) -{ - u16 cpld_state = __raw_readw(ZEUS_CPLD_CONTROL); - - if (state) - cpld_state |= ZEUS_CPLD_CONTROL_CF_RST; - else - cpld_state &= ~ZEUS_CPLD_CONTROL_CF_RST; - - __raw_writew(cpld_state, ZEUS_CPLD_CONTROL); -} - -static struct arcom_pcmcia_pdata zeus_pcmcia_info = { - .cd_gpio = ZEUS_CF_CD_GPIO, - .rdy_gpio = ZEUS_CF_RDY_GPIO, - .pwr_gpio = ZEUS_CF_PWEN_GPIO, - .reset = zeus_cf_reset, -}; - -static struct platform_device zeus_pcmcia_device = { - .name = "zeus-pcmcia", - .id = -1, - .dev = { - .platform_data = &zeus_pcmcia_info, - }, -}; - -static struct resource zeus_max6369_resource = { - .start = ZEUS_CPLD_EXTWDOG_PHYS, - .end = ZEUS_CPLD_EXTWDOG_PHYS, - .flags = IORESOURCE_MEM, -}; - -struct platform_device zeus_max6369_device = { - .name = "max6369_wdt", - .id = -1, - .resource = &zeus_max6369_resource, - .num_resources = 1, -}; - -/* AC'97 */ -static pxa2xx_audio_ops_t zeus_ac97_info = { - .reset_gpio = 95, -}; - - -/* - * USB host - */ - -static struct regulator_consumer_supply zeus_ohci_regulator_supplies[] = { - REGULATOR_SUPPLY("vbus2", "pxa27x-ohci"), -}; - -static struct regulator_init_data zeus_ohci_regulator_data = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(zeus_ohci_regulator_supplies), - .consumer_supplies = zeus_ohci_regulator_supplies, -}; - -static struct fixed_voltage_config zeus_ohci_regulator_config = { - .supply_name = "vbus2", - .microvolts = 5000000, /* 5.0V */ - .startup_delay = 0, - .init_data = &zeus_ohci_regulator_data, -}; - -static struct platform_device zeus_ohci_regulator_device = { - .name = "reg-fixed-voltage", - .id = 1, - .dev = { - .platform_data = &zeus_ohci_regulator_config, - }, -}; - -static struct gpiod_lookup_table zeus_ohci_regulator_gpiod_table = { - .dev_id = "reg-fixed-voltage.0", - .table = { - GPIO_LOOKUP("gpio-pxa", ZEUS_USB2_PWREN_GPIO, - NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct pxaohci_platform_data zeus_ohci_platform_data = { - .port_mode = PMM_NPS_MODE, - /* Clear Power Control Polarity Low and set Power Sense - * Polarity Low. Supply power to USB ports. */ - .flags = ENABLE_PORT_ALL | POWER_SENSE_LOW, -}; - -static void __init zeus_register_ohci(void) -{ - /* Port 2 is shared between host and client interface. */ - UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE; - - pxa_set_ohci_info(&zeus_ohci_platform_data); -} - -/* - * Flat Panel - */ - -static void zeus_lcd_power(int on, struct fb_var_screeninfo *si) -{ - gpio_set_value(ZEUS_LCD_EN_GPIO, on); -} - -static void zeus_backlight_power(int on) -{ - gpio_set_value(ZEUS_BKLEN_GPIO, on); -} - -static int zeus_setup_fb_gpios(void) -{ - int err; - - if ((err = gpio_request(ZEUS_LCD_EN_GPIO, "LCD_EN"))) - goto out_err; - - if ((err = gpio_direction_output(ZEUS_LCD_EN_GPIO, 0))) - goto out_err_lcd; - - if ((err = gpio_request(ZEUS_BKLEN_GPIO, "BKLEN"))) - goto out_err_lcd; - - if ((err = gpio_direction_output(ZEUS_BKLEN_GPIO, 0))) - goto out_err_bkl; - - return 0; - -out_err_bkl: - gpio_free(ZEUS_BKLEN_GPIO); -out_err_lcd: - gpio_free(ZEUS_LCD_EN_GPIO); -out_err: - return err; -} - -static struct pxafb_mode_info zeus_fb_mode_info[] = { - { - .pixclock = 39722, - - .xres = 640, - .yres = 480, - - .bpp = 16, - - .hsync_len = 63, - .left_margin = 16, - .right_margin = 81, - - .vsync_len = 2, - .upper_margin = 12, - .lower_margin = 31, - - .sync = 0, - }, -}; - -static struct pxafb_mach_info zeus_fb_info = { - .modes = zeus_fb_mode_info, - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, - .pxafb_lcd_power = zeus_lcd_power, - .pxafb_backlight_power = zeus_backlight_power, -}; - -/* - * MMC/SD Device - * - * The card detect interrupt isn't debounced so we delay it by 250ms - * to give the card a chance to fully insert/eject. - */ - -static struct pxamci_platform_data zeus_mci_platform_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .detect_delay_ms = 250, - .gpio_card_ro_invert = 1, -}; - -static struct gpiod_lookup_table zeus_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("gpio-pxa", ZEUS_MMC_CD_GPIO, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", ZEUS_MMC_WP_GPIO, - "wp", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* - * USB Device Controller - */ -static void zeus_udc_command(int cmd) -{ - switch (cmd) { - case PXA2XX_UDC_CMD_DISCONNECT: - pr_info("zeus: disconnecting USB client\n"); - UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE; - break; - - case PXA2XX_UDC_CMD_CONNECT: - pr_info("zeus: connecting USB client\n"); - UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE; - break; - } -} - -static struct pxa2xx_udc_mach_info zeus_udc_info = { - .udc_command = zeus_udc_command, -}; - -static struct platform_device *zeus_devices[] __initdata = { - &zeus_serial_device, - &zeus_mtd_devices[0], - &zeus_dm9k0_device, - &zeus_dm9k1_device, - &zeus_sram_device, - &zeus_leds_device, - &zeus_pcmcia_device, - &zeus_max6369_device, - &can_regulator_device, - &zeus_ohci_regulator_device, -}; - -#ifdef CONFIG_PM -static void zeus_power_off(void) -{ - local_irq_disable(); - cpu_suspend(PWRMODE_DEEPSLEEP, pxa27x_finish_suspend); -} -#else -#define zeus_power_off NULL -#endif - -#ifdef CONFIG_APM_EMULATION -static void zeus_get_power_status(struct apm_power_info *info) -{ - /* Power supply is always present */ - info->ac_line_status = APM_AC_ONLINE; - info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; - info->battery_flag = APM_BATTERY_FLAG_NOT_PRESENT; -} - -static inline void zeus_setup_apm(void) -{ - apm_get_power_status = zeus_get_power_status; -} -#else -static inline void zeus_setup_apm(void) -{ -} -#endif - -static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio, - unsigned ngpio, void *context) -{ - int i; - u8 pcb_info = 0; - - for (i = 0; i < 8; i++) { - int pcb_bit = gpio + i + 8; - - if (gpio_request(pcb_bit, "pcb info")) { - dev_err(&client->dev, "Can't request pcb info %d\n", i); - continue; - } - - if (gpio_direction_input(pcb_bit)) { - dev_err(&client->dev, "Can't read pcb info %d\n", i); - gpio_free(pcb_bit); - continue; - } - - pcb_info |= !!gpio_get_value(pcb_bit) << i; - - gpio_free(pcb_bit); - } - - dev_info(&client->dev, "Zeus PCB version %d issue %d\n", - pcb_info >> 4, pcb_info & 0xf); - - return 0; -} - -static struct pca953x_platform_data zeus_pca953x_pdata[] = { - [0] = { .gpio_base = ZEUS_EXT0_GPIO_BASE, }, - [1] = { - .gpio_base = ZEUS_EXT1_GPIO_BASE, - .setup = zeus_get_pcb_info, - }, - [2] = { .gpio_base = ZEUS_USER_GPIO_BASE, }, -}; - -static struct i2c_board_info __initdata zeus_i2c_devices[] = { - { - I2C_BOARD_INFO("pca9535", 0x21), - .platform_data = &zeus_pca953x_pdata[0], - }, - { - I2C_BOARD_INFO("pca9535", 0x22), - .platform_data = &zeus_pca953x_pdata[1], - }, - { - I2C_BOARD_INFO("pca9535", 0x20), - .platform_data = &zeus_pca953x_pdata[2], - .irq = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO), - }, - { I2C_BOARD_INFO("lm75a", 0x48) }, - { I2C_BOARD_INFO("24c01", 0x50) }, - { I2C_BOARD_INFO("isl1208", 0x6f) }, -}; - -static mfp_cfg_t zeus_pin_config[] __initdata = { - /* AC97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - GPIO15_nCS_1, - GPIO78_nCS_2, - GPIO80_nCS_4, - GPIO33_nCS_5, - - GPIO22_GPIO, - GPIO32_MMC_CLK, - GPIO92_MMC_DAT_0, - GPIO109_MMC_DAT_1, - GPIO110_MMC_DAT_2, - GPIO111_MMC_DAT_3, - GPIO112_MMC_CMD, - - GPIO88_USBH1_PWR, - GPIO89_USBH1_PEN, - GPIO119_USBH2_PWR, - GPIO120_USBH2_PEN, - - GPIO86_LCD_LDD_16, - GPIO87_LCD_LDD_17, - - GPIO102_GPIO, - GPIO104_CIF_DD_2, - GPIO105_CIF_DD_1, - - GPIO81_SSP3_TXD, - GPIO82_SSP3_RXD, - GPIO83_SSP3_SFRM, - GPIO84_SSP3_SCLK, - - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO85_nPCE_1, - GPIO54_nPCE_2, - GPIO79_PSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - GPIO36_GPIO, /* CF CD */ - GPIO97_GPIO, /* CF PWREN */ - GPIO99_GPIO, /* CF RDY */ -}; - -/* - * DM9k MSCx settings: SRAM, 16 bits - * 17 cycles delay first access - * 5 cycles delay next access - * 13 cycles recovery time - * faster device - */ -#define DM9K_MSC_VALUE 0xe4c9 - -static void __init zeus_init(void) -{ - u16 dm9000_msc = DM9K_MSC_VALUE; - u32 msc0, msc1; - - system_rev = __raw_readw(ZEUS_CPLD_VERSION); - pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); - - /* Fix timings for dm9000s (CS1/CS2)*/ - msc0 = (__raw_readl(MSC0) & 0x0000ffff) | (dm9000_msc << 16); - msc1 = (__raw_readl(MSC1) & 0xffff0000) | dm9000_msc; - __raw_writel(msc0, MSC0); - __raw_writel(msc1, MSC1); - - pm_power_off = zeus_power_off; - zeus_setup_apm(); - - pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config)); - - gpiod_add_lookup_table(&can_regulator_gpiod_table); - gpiod_add_lookup_table(&zeus_ohci_regulator_gpiod_table); - platform_add_devices(zeus_devices, ARRAY_SIZE(zeus_devices)); - - zeus_register_ohci(); - - if (zeus_setup_fb_gpios()) - pr_err("Failed to setup fb gpios\n"); - else - pxa_set_fb_info(NULL, &zeus_fb_info); - - gpiod_add_lookup_table(&zeus_mci_gpio_table); - pxa_set_mci_info(&zeus_mci_platform_data); - pxa_set_udc_info(&zeus_udc_info); - pxa_set_ac97_info(&zeus_ac97_info); - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices)); - pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info); - spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info)); - - regulator_has_full_constraints(); -} - -static struct map_desc zeus_io_desc[] __initdata = { - { - .virtual = (unsigned long)ZEUS_CPLD_VERSION, - .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS), - .length = 0x1000, - .type = MT_DEVICE, - }, - { - .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ, - .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS), - .length = 0x1000, - .type = MT_DEVICE, - }, - { - .virtual = (unsigned long)ZEUS_CPLD_CONTROL, - .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS), - .length = 0x1000, - .type = MT_DEVICE, - }, - { - .virtual = (unsigned long)ZEUS_PC104IO, - .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), - .length = 0x00800000, - .type = MT_DEVICE, - }, - { - /* - * ISA I/O space mapping: - * - ports 0x0000-0x0fff are PC/104 - * - ports 0x10000-0x10fff are PCMCIA slot 1 - * - ports 0x11000-0x11fff are PC/104 - */ - .virtual = PCI_IO_VIRT_BASE, - .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), - .length = 0x1000, - .type = MT_DEVICE, - }, -}; - -static void __init zeus_map_io(void) -{ - pxa27x_map_io(); - - iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc)); - - /* Clear PSPR to ensure a full restart on wake-up. */ - PMCR = PSPR = 0; - - /* enable internal 32.768Khz oscillator (ignore OSCC_OOK) */ - writel(readl(OSCC) | OSCC_OON, OSCC); - - /* Some clock cycles later (from OSCC_ON), programme PCFR (OPDE...). - * float chip selects and PCMCIA */ - PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP; -} - -MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") - /* Maintainer: Marc Zyngier <maz@misterjones.org> */ - .atag_offset = 0x100, - .map_io = zeus_map_io, - .nr_irqs = ZEUS_NR_IRQS, - .init_irq = zeus_init_irq, - .handle_irq = pxa27x_handle_irq, - .init_time = pxa_timer_init, - .init_machine = zeus_init, - .restart = pxa_restart, -MACHINE_END - diff --git a/arch/arm/mach-pxa/zeus.h b/arch/arm/mach-pxa/zeus.h deleted file mode 100644 index 8fa6b2923f63..000000000000 --- a/arch/arm/mach-pxa/zeus.h +++ /dev/null @@ -1,82 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-pxa/include/mach/zeus.h - * - * Author: David Vrabel - * Created: Sept 28, 2005 - * Copyright: Arcom Control Systems Ltd. - * - * Maintained by: Marc Zyngier <maz@misterjones.org> - */ - -#ifndef _MACH_ZEUS_H -#define _MACH_ZEUS_H - -#define ZEUS_NR_IRQS (IRQ_BOARD_START + 48) - -/* Physical addresses */ -#define ZEUS_FLASH_PHYS PXA_CS0_PHYS -#define ZEUS_ETH0_PHYS PXA_CS1_PHYS -#define ZEUS_ETH1_PHYS PXA_CS2_PHYS -#define ZEUS_CPLD_PHYS (PXA_CS4_PHYS+0x2000000) -#define ZEUS_SRAM_PHYS PXA_CS5_PHYS -#define ZEUS_PC104IO_PHYS (0x30000000) - -#define ZEUS_CPLD_VERSION_PHYS (ZEUS_CPLD_PHYS + 0x00000000) -#define ZEUS_CPLD_ISA_IRQ_PHYS (ZEUS_CPLD_PHYS + 0x00800000) -#define ZEUS_CPLD_CONTROL_PHYS (ZEUS_CPLD_PHYS + 0x01000000) -#define ZEUS_CPLD_EXTWDOG_PHYS (ZEUS_CPLD_PHYS + 0x01800000) - -/* GPIOs */ -#define ZEUS_AC97_GPIO 0 -#define ZEUS_WAKEUP_GPIO 1 -#define ZEUS_UARTA_GPIO 9 -#define ZEUS_UARTB_GPIO 10 -#define ZEUS_UARTC_GPIO 12 -#define ZEUS_UARTD_GPIO 11 -#define ZEUS_ETH0_GPIO 14 -#define ZEUS_ISA_GPIO 17 -#define ZEUS_BKLEN_GPIO 19 -#define ZEUS_USB2_PWREN_GPIO 22 -#define ZEUS_PTT_GPIO 27 -#define ZEUS_CF_CD_GPIO 35 -#define ZEUS_MMC_WP_GPIO 52 -#define ZEUS_MMC_CD_GPIO 53 -#define ZEUS_EXTGPIO_GPIO 91 -#define ZEUS_CF_PWEN_GPIO 97 -#define ZEUS_CF_RDY_GPIO 99 -#define ZEUS_LCD_EN_GPIO 101 -#define ZEUS_ETH1_GPIO 113 -#define ZEUS_CAN_GPIO 116 - -#define ZEUS_EXT0_GPIO_BASE 128 -#define ZEUS_EXT1_GPIO_BASE 160 -#define ZEUS_USER_GPIO_BASE 192 - -#define ZEUS_EXT0_GPIO(x) (ZEUS_EXT0_GPIO_BASE + (x)) -#define ZEUS_EXT1_GPIO(x) (ZEUS_EXT1_GPIO_BASE + (x)) -#define ZEUS_USER_GPIO(x) (ZEUS_USER_GPIO_BASE + (x)) - -#define ZEUS_CAN_SHDN_GPIO ZEUS_EXT1_GPIO(2) - -/* - * CPLD registers: - * Only 4 registers, but spread over a 32MB address space. - * Be gentle, and remap that over 32kB... - */ - -#define ZEUS_CPLD IOMEM(0xf0000000) -#define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) -#define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) -#define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) - -/* CPLD register bits */ -#define ZEUS_CPLD_CONTROL_CF_RST 0x01 - -#define ZEUS_PC104IO IOMEM(0xf1000000) - -#define ZEUS_SRAM_SIZE (256 * 1024) - -#endif - - diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c deleted file mode 100644 index 8ed75ac29b1a..000000000000 --- a/arch/arm/mach-pxa/zylonite.c +++ /dev/null @@ -1,495 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/zylonite.c - * - * Support for the PXA3xx Development Platform (aka Zylonite) - * - * Copyright (C) 2006 Marvell International Ltd. - * - * 2007-09-04: eric miao <eric.miao@marvell.com> - * rewrite to align with latest kernel - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/leds.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/gpio/machine.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/smc91x.h> -#include <linux/soc/pxa/cpu.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "pxa3xx.h" -#include <linux/platform_data/asoc-pxa.h> -#include <linux/platform_data/video-pxafb.h> -#include "zylonite.h" -#include <linux/platform_data/mmc-pxamci.h> -#include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include <linux/platform_data/mtd-nand-pxa3xx.h> -#include "mfp.h" - -#include "devices.h" -#include "generic.h" - -int gpio_eth_irq; -int gpio_debug_led1; -int gpio_debug_led2; - -int wm9713_irq; - -int lcd_id; -int lcd_orientation; - -static struct resource smc91x_resources[] = { - [0] = { - .start = ZYLONITE_ETH_PHYS + 0x300, - .end = ZYLONITE_ETH_PHYS + 0xfffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = -1, /* for run-time assignment */ - .end = -1, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct smc91x_platdata zylonite_smc91x_info = { - .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | - SMC91X_NOWAIT | SMC91X_USE_DMA, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &zylonite_smc91x_info, - }, -}; - -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -static struct gpio_led zylonite_debug_leds[] = { - [0] = { - .name = "zylonite:yellow:1", - .default_trigger = "heartbeat", - }, - [1] = { - .name = "zylonite:yellow:2", - .default_trigger = "default-on", - }, -}; - -static struct gpio_led_platform_data zylonite_debug_leds_info = { - .leds = zylonite_debug_leds, - .num_leds = ARRAY_SIZE(zylonite_debug_leds), -}; - -static struct platform_device zylonite_device_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &zylonite_debug_leds_info, - } -}; - -static void __init zylonite_init_leds(void) -{ - zylonite_debug_leds[0].gpio = gpio_debug_led1; - zylonite_debug_leds[1].gpio = gpio_debug_led2; - - platform_device_register(&zylonite_device_leds); -} -#else -static inline void zylonite_init_leds(void) {} -#endif - -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -static struct pwm_lookup zylonite_pwm_lookup[] = { - PWM_LOOKUP("pxa27x-pwm.1", 1, "pwm-backlight.0", NULL, 10000, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data zylonite_backlight_data = { - .max_brightness = 100, - .dft_brightness = 100, -}; - -static struct platform_device zylonite_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &pxa27x_device_pwm1.dev, - .platform_data = &zylonite_backlight_data, - }, -}; - -static struct pxafb_mode_info toshiba_ltm035a776c_mode = { - .pixclock = 110000, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 4, - .left_margin = 6, - .right_margin = 4, - .vsync_len = 2, - .upper_margin = 2, - .lower_margin = 3, - .sync = FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mode_info toshiba_ltm04c380k_mode = { - .pixclock = 50000, - .xres = 640, - .yres = 480, - .bpp = 16, - .hsync_len = 1, - .left_margin = 0x9f, - .right_margin = 1, - .vsync_len = 44, - .upper_margin = 0, - .lower_margin = 0, - .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, -}; - -static struct pxafb_mach_info zylonite_toshiba_lcd_info = { - .num_modes = 1, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -static struct pxafb_mode_info sharp_ls037_modes[] = { - [0] = { - .pixclock = 158000, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 4, - .left_margin = 39, - .right_margin = 39, - .vsync_len = 1, - .upper_margin = 2, - .lower_margin = 3, - .sync = 0, - }, - [1] = { - .pixclock = 39700, - .xres = 480, - .yres = 640, - .bpp = 16, - .hsync_len = 8, - .left_margin = 81, - .right_margin = 81, - .vsync_len = 1, - .upper_margin = 2, - .lower_margin = 7, - .sync = 0, - }, -}; - -static struct pxafb_mach_info zylonite_sharp_lcd_info = { - .modes = sharp_ls037_modes, - .num_modes = 2, - .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, -}; - -static void __init zylonite_init_lcd(void) -{ - pwm_add_table(zylonite_pwm_lookup, ARRAY_SIZE(zylonite_pwm_lookup)); - platform_device_register(&zylonite_backlight_device); - - if (lcd_id & 0x20) { - pxa_set_fb_info(NULL, &zylonite_sharp_lcd_info); - return; - } - - /* legacy LCD panels, it would be handy here if LCD panel type can - * be decided at run-time - */ - if (1) - zylonite_toshiba_lcd_info.modes = &toshiba_ltm035a776c_mode; - else - zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode; - - pxa_set_fb_info(NULL, &zylonite_toshiba_lcd_info); -} -#else -static inline void zylonite_init_lcd(void) {} -#endif - -#if defined(CONFIG_MMC) -static struct pxamci_platform_data zylonite_mci_platform_data = { - .detect_delay_ms= 200, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, -}; - -#define PCA9539A_MCI_CD 0 -#define PCA9539A_MCI1_CD 1 -#define PCA9539A_MCI_WP 2 -#define PCA9539A_MCI1_WP 3 -#define PCA9539A_MCI3_CD 30 -#define PCA9539A_MCI3_WP 31 - -static struct gpiod_lookup_table zylonite_mci_gpio_table = { - .dev_id = "pxa2xx-mci.0", - .table = { - GPIO_LOOKUP("i2c-pca9539-a", PCA9539A_MCI_CD, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("i2c-pca9539-a", PCA9539A_MCI_WP, - "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct pxamci_platform_data zylonite_mci2_platform_data = { - .detect_delay_ms= 200, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table zylonite_mci2_gpio_table = { - .dev_id = "pxa2xx-mci.1", - .table = { - GPIO_LOOKUP("i2c-pca9539-a", PCA9539A_MCI1_CD, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("i2c-pca9539-a", PCA9539A_MCI1_WP, - "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct pxamci_platform_data zylonite_mci3_platform_data = { - .detect_delay_ms= 200, - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table zylonite_mci3_gpio_table = { - .dev_id = "pxa2xx-mci.2", - .table = { - GPIO_LOOKUP("i2c-pca9539-a", PCA9539A_MCI3_CD, - "cd", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("i2c-pca9539-a", PCA9539A_MCI3_WP, - "wp", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init zylonite_init_mmc(void) -{ - gpiod_add_lookup_table(&zylonite_mci_gpio_table); - pxa_set_mci_info(&zylonite_mci_platform_data); - gpiod_add_lookup_table(&zylonite_mci2_gpio_table); - pxa3xx_set_mci2_info(&zylonite_mci2_platform_data); - if (cpu_is_pxa310()) { - gpiod_add_lookup_table(&zylonite_mci3_gpio_table); - pxa3xx_set_mci3_info(&zylonite_mci3_platform_data); - } -} -#else -static inline void zylonite_init_mmc(void) {} -#endif - -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) -static const unsigned int zylonite_matrix_key_map[] = { - /* KEY(row, col, key_code) */ - KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_C), KEY(0, 5, KEY_D), - KEY(1, 0, KEY_E), KEY(1, 1, KEY_F), KEY(1, 2, KEY_G), KEY(1, 5, KEY_H), - KEY(2, 0, KEY_I), KEY(2, 1, KEY_J), KEY(2, 2, KEY_K), KEY(2, 5, KEY_L), - KEY(3, 0, KEY_M), KEY(3, 1, KEY_N), KEY(3, 2, KEY_O), KEY(3, 5, KEY_P), - KEY(5, 0, KEY_Q), KEY(5, 1, KEY_R), KEY(5, 2, KEY_S), KEY(5, 5, KEY_T), - KEY(6, 0, KEY_U), KEY(6, 1, KEY_V), KEY(6, 2, KEY_W), KEY(6, 5, KEY_X), - KEY(7, 1, KEY_Y), KEY(7, 2, KEY_Z), - - KEY(4, 4, KEY_0), KEY(1, 3, KEY_1), KEY(4, 1, KEY_2), KEY(1, 4, KEY_3), - KEY(2, 3, KEY_4), KEY(4, 2, KEY_5), KEY(2, 4, KEY_6), KEY(3, 3, KEY_7), - KEY(4, 3, KEY_8), KEY(3, 4, KEY_9), - - KEY(4, 5, KEY_SPACE), - KEY(5, 3, KEY_KPASTERISK), /* * */ - KEY(5, 4, KEY_KPDOT), /* #" */ - - KEY(0, 7, KEY_UP), - KEY(1, 7, KEY_DOWN), - KEY(2, 7, KEY_LEFT), - KEY(3, 7, KEY_RIGHT), - KEY(2, 6, KEY_HOME), - KEY(3, 6, KEY_END), - KEY(6, 4, KEY_DELETE), - KEY(6, 6, KEY_BACK), - KEY(6, 3, KEY_CAPSLOCK), /* KEY_LEFTSHIFT), */ - - KEY(4, 6, KEY_ENTER), /* scroll push */ - KEY(5, 7, KEY_ENTER), /* keypad action */ - - KEY(0, 4, KEY_EMAIL), - KEY(5, 6, KEY_SEND), - KEY(4, 0, KEY_CALENDAR), - KEY(7, 6, KEY_RECORD), - KEY(6, 7, KEY_VOLUMEUP), - KEY(7, 7, KEY_VOLUMEDOWN), - - KEY(0, 6, KEY_F22), /* soft1 */ - KEY(1, 6, KEY_F23), /* soft2 */ - KEY(0, 3, KEY_AUX), /* contact */ -}; - -static struct matrix_keymap_data zylonite_matrix_keymap_data = { - .keymap = zylonite_matrix_key_map, - .keymap_size = ARRAY_SIZE(zylonite_matrix_key_map), -}; - -static struct pxa27x_keypad_platform_data zylonite_keypad_info = { - .matrix_key_rows = 8, - .matrix_key_cols = 8, - .matrix_keymap_data = &zylonite_matrix_keymap_data, - - .enable_rotary0 = 1, - .rotary0_up_key = KEY_UP, - .rotary0_down_key = KEY_DOWN, - - .debounce_interval = 30, -}; - -static void __init zylonite_init_keypad(void) -{ - pxa_set_keypad_info(&zylonite_keypad_info); -} -#else -static inline void zylonite_init_keypad(void) {} -#endif - -#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL) -static struct mtd_partition zylonite_nand_partitions[] = { - [0] = { - .name = "Bootloader", - .offset = 0, - .size = 0x060000, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - [1] = { - .name = "Kernel", - .offset = 0x060000, - .size = 0x200000, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - [2] = { - .name = "Filesystem", - .offset = 0x0260000, - .size = 0x3000000, /* 48M - rootfs */ - }, - [3] = { - .name = "MassStorage", - .offset = 0x3260000, - .size = 0x3d40000, - }, - [4] = { - .name = "BBT", - .offset = 0x6FA0000, - .size = 0x80000, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - /* NOTE: we reserve some blocks at the end of the NAND flash for - * bad block management, and the max number of relocation blocks - * differs on different platforms. Please take care with it when - * defining the partition table. - */ -}; - -static struct pxa3xx_nand_platform_data zylonite_nand_info = { - .parts = zylonite_nand_partitions, - .nr_parts = ARRAY_SIZE(zylonite_nand_partitions), -}; - -static void __init zylonite_init_nand(void) -{ - pxa3xx_set_nand_info(&zylonite_nand_info); -} -#else -static inline void zylonite_init_nand(void) {} -#endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */ - -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static struct pxaohci_platform_data zylonite_ohci_info = { - .port_mode = PMM_PERPORT_MODE, - .flags = ENABLE_PORT1 | ENABLE_PORT2 | - POWER_CONTROL_LOW | POWER_SENSE_LOW, -}; - -static void __init zylonite_init_ohci(void) -{ - pxa_set_ohci_info(&zylonite_ohci_info); -} -#else -static inline void zylonite_init_ohci(void) {} -#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */ - -static struct gpiod_lookup_table zylonite_wm97xx_touch_gpio15_table = { - .dev_id = "wm97xx-touch.0", - .table = { - GPIO_LOOKUP("gpio-pxa", mfp_to_gpio(MFP_PIN_GPIO15), - "touch", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct gpiod_lookup_table zylonite_wm97xx_touch_gpio26_table = { - .dev_id = "wm97xx-touch.0", - .table = { - GPIO_LOOKUP("gpio-pxa", mfp_to_gpio(MFP_PIN_GPIO26), - "touch", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static void __init zylonite_init_wm97xx_touch(void) -{ - if (!IS_ENABLED(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE)) - return; - - if (cpu_is_pxa320()) - gpiod_add_lookup_table(&zylonite_wm97xx_touch_gpio15_table); - else - gpiod_add_lookup_table(&zylonite_wm97xx_touch_gpio26_table); -} - -static void __init zylonite_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_btuart_info(NULL); - pxa_set_stuart_info(NULL); - - /* board-processor specific initialization */ - zylonite_pxa300_init(); - zylonite_pxa320_init(); - - /* - * Note: We depend that the bootloader set - * the correct value to MSC register for SMC91x. - */ - smc91x_resources[1].start = PXA_GPIO_TO_IRQ(gpio_eth_irq); - smc91x_resources[1].end = PXA_GPIO_TO_IRQ(gpio_eth_irq); - platform_device_register(&smc91x_device); - - pxa_set_ac97_info(NULL); - zylonite_init_lcd(); - zylonite_init_mmc(); - zylonite_init_keypad(); - zylonite_init_nand(); - zylonite_init_leds(); - zylonite_init_ohci(); - zylonite_init_wm97xx_touch(); -} - -MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = ZYLONITE_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .init_time = pxa_timer_init, - .init_machine = zylonite_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/zylonite.h b/arch/arm/mach-pxa/zylonite.h deleted file mode 100644 index afe3efcb8e04..000000000000 --- a/arch/arm/mach-pxa/zylonite.h +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_ARCH_ZYLONITE_H -#define __ASM_ARCH_ZYLONITE_H - -#include <linux/soc/pxa/cpu.h> - -#define ZYLONITE_ETH_PHYS 0x14000000 - -#define EXT_GPIO(x) (128 + (x)) - -#define ZYLONITE_NR_IRQS (IRQ_BOARD_START + 32) - -/* the following variables are processor specific and initialized - * by the corresponding zylonite_pxa3xx_init() - */ -extern int gpio_eth_irq; -extern int gpio_debug_led1; -extern int gpio_debug_led2; - -extern int wm9713_irq; - -extern int lcd_id; -extern int lcd_orientation; - -#ifdef CONFIG_MACH_ZYLONITE300 -extern void zylonite_pxa300_init(void); -#else -static inline void zylonite_pxa300_init(void) -{ - if (cpu_is_pxa300() || cpu_is_pxa310()) - panic("%s: PXA300/PXA310 not supported\n", __func__); -} -#endif - -#ifdef CONFIG_MACH_ZYLONITE320 -extern void zylonite_pxa320_init(void); -#else -static inline void zylonite_pxa320_init(void) -{ - if (cpu_is_pxa320()) - panic("%s: PXA320 not supported\n", __func__); -} -#endif - -#endif /* __ASM_ARCH_ZYLONITE_H */ diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c deleted file mode 100644 index 50a8a3547dbc..000000000000 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ /dev/null @@ -1,281 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/zylonite_pxa300.c - * - * PXA300/PXA310 specific support code for the - * PXA3xx Development Platform (aka Zylonite) - * - * Copyright (C) 2007 Marvell Internation Ltd. - * 2007-08-21: eric miao <eric.miao@marvell.com> - * initial version - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/i2c.h> -#include <linux/platform_data/i2c-pxa.h> -#include <linux/platform_data/pca953x.h> -#include <linux/gpio.h> -#include <linux/soc/pxa/cpu.h> - -#include "pxa300.h" -#include "devices.h" -#include "zylonite.h" - -#include "generic.h" - -/* PXA300/PXA310 common configurations */ -static mfp_cfg_t common_mfp_cfg[] __initdata = { - /* LCD */ - GPIO54_LCD_LDD_0, - GPIO55_LCD_LDD_1, - GPIO56_LCD_LDD_2, - GPIO57_LCD_LDD_3, - GPIO58_LCD_LDD_4, - GPIO59_LCD_LDD_5, - GPIO60_LCD_LDD_6, - GPIO61_LCD_LDD_7, - GPIO62_LCD_LDD_8, - GPIO63_LCD_LDD_9, - GPIO64_LCD_LDD_10, - GPIO65_LCD_LDD_11, - GPIO66_LCD_LDD_12, - GPIO67_LCD_LDD_13, - GPIO68_LCD_LDD_14, - GPIO69_LCD_LDD_15, - GPIO70_LCD_LDD_16, - GPIO71_LCD_LDD_17, - GPIO72_LCD_FCLK, - GPIO73_LCD_LCLK, - GPIO74_LCD_PCLK, - GPIO75_LCD_BIAS, - GPIO76_LCD_VSYNC, - GPIO127_LCD_CS_N, - GPIO20_PWM3_OUT, /* backlight */ - - /* BTUART */ - GPIO111_UART2_RTS, - GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, - GPIO113_UART2_TXD, - GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, - - /* STUART */ - GPIO109_UART3_TXD, - GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, - - /* AC97 */ - GPIO23_AC97_nACRESET, - GPIO24_AC97_SYSCLK, - GPIO29_AC97_BITCLK, - GPIO25_AC97_SDATA_IN_0, - GPIO27_AC97_SDATA_OUT, - GPIO28_AC97_SYNC, - GPIO17_GPIO, /* SDATA_IN_1 but unused - configure to GPIO */ - - /* SSP3 */ - GPIO91_SSP3_SCLK, - GPIO92_SSP3_FRM, - GPIO93_SSP3_TXD, - GPIO94_SSP3_RXD, - - /* WM9713 IRQ */ - GPIO26_GPIO, - - /* Keypad */ - GPIO107_KP_DKIN_0 | MFP_LPM_EDGE_BOTH, - GPIO108_KP_DKIN_1 | MFP_LPM_EDGE_BOTH, - GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, - GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, - GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, - GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, - GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, - GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, - GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, - GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, - GPIO121_KP_MKOUT_0, - GPIO122_KP_MKOUT_1, - GPIO123_KP_MKOUT_2, - GPIO124_KP_MKOUT_3, - GPIO125_KP_MKOUT_4, - GPIO4_2_KP_MKOUT_5, - GPIO5_2_KP_MKOUT_6, - GPIO6_2_KP_MKOUT_7, - - /* MMC1 */ - GPIO3_MMC1_DAT0, - GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, - GPIO5_MMC1_DAT2, - GPIO6_MMC1_DAT3, - GPIO7_MMC1_CLK, - GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ - GPIO15_GPIO, /* CMD1 default as GPIO for slot 0 */ - - /* MMC2 */ - GPIO9_MMC2_DAT0, - GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, - GPIO11_MMC2_DAT2, - GPIO12_MMC2_DAT3, - GPIO13_MMC2_CLK, - GPIO14_MMC2_CMD, - - /* USB Host */ - GPIO0_2_USBH_PEN, - GPIO1_2_USBH_PWR, - - /* Standard I2C */ - GPIO21_I2C_SCL, - GPIO22_I2C_SDA, - - /* GPIO */ - GPIO18_GPIO | MFP_PULL_HIGH, /* GPIO Expander #0 INT_N */ - GPIO19_GPIO | MFP_PULL_HIGH, /* GPIO Expander #1 INT_N */ -}; - -static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { - /* FFUART */ - GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, - GPIO31_UART1_TXD, - GPIO32_UART1_CTS, - GPIO37_UART1_RTS, - GPIO33_UART1_DCD, - GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, - GPIO35_UART1_RI, - GPIO36_UART1_DTR, - - /* Ethernet */ - GPIO2_nCS3, - GPIO99_GPIO, -}; - -static mfp_cfg_t pxa310_mfp_cfg[] __initdata = { - /* FFUART */ - GPIO99_UART1_RXD | MFP_LPM_EDGE_FALL, - GPIO100_UART1_TXD, - GPIO101_UART1_CTS, - GPIO106_UART1_RTS, - - /* Ethernet */ - GPIO2_nCS3, - GPIO102_GPIO, - - /* MMC3 */ - GPIO7_2_MMC3_DAT0, - GPIO8_2_MMC3_DAT1 | MFP_LPM_EDGE_BOTH, - GPIO9_2_MMC3_DAT2, - GPIO10_2_MMC3_DAT3, - GPIO103_MMC3_CLK, - GPIO105_MMC3_CMD, -}; - -#define NUM_LCD_DETECT_PINS 7 - -static int lcd_detect_pins[] __initdata = { - MFP_PIN_GPIO71, /* LCD_LDD_17 - ORIENT */ - MFP_PIN_GPIO70, /* LCD_LDD_16 - LCDID[5] */ - MFP_PIN_GPIO75, /* LCD_BIAS - LCDID[4] */ - MFP_PIN_GPIO73, /* LCD_LCLK - LCDID[3] */ - MFP_PIN_GPIO72, /* LCD_FCLK - LCDID[2] */ - MFP_PIN_GPIO127,/* LCD_CS_N - LCDID[1] */ - MFP_PIN_GPIO76, /* LCD_VSYNC - LCDID[0] */ -}; - -static void __init zylonite_detect_lcd_panel(void) -{ - unsigned long mfpr_save[NUM_LCD_DETECT_PINS]; - int i, gpio, id = 0; - - /* save the original MFP settings of these pins and configure - * them as GPIO Input, DS01X, Pull Neither, Edge Clear - */ - for (i = 0; i < NUM_LCD_DETECT_PINS; i++) { - mfpr_save[i] = pxa3xx_mfp_read(lcd_detect_pins[i]); - pxa3xx_mfp_write(lcd_detect_pins[i], 0x8440); - } - - for (i = 0; i < NUM_LCD_DETECT_PINS; i++) { - id = id << 1; - gpio = mfp_to_gpio(lcd_detect_pins[i]); - gpio_request(gpio, "LCD_ID_PINS"); - gpio_direction_input(gpio); - - if (gpio_get_value(gpio)) - id = id | 0x1; - gpio_free(gpio); - } - - /* lcd id, flush out bit 1 */ - lcd_id = id & 0x3d; - - /* lcd orientation, portrait or landscape */ - lcd_orientation = (id >> 6) & 0x1; - - /* restore the original MFP settings */ - for (i = 0; i < NUM_LCD_DETECT_PINS; i++) - pxa3xx_mfp_write(lcd_detect_pins[i], mfpr_save[i]); -} - -#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) -static struct pca953x_platform_data gpio_exp[] = { - [0] = { - .gpio_base = 128, - }, - [1] = { - .gpio_base = 144, - }, -}; - -static struct i2c_board_info zylonite_i2c_board_info[] = { - { - .type = "pca9539", - .dev_name = "pca9539-a", - .addr = 0x74, - .platform_data = &gpio_exp[0], - .irq = PXA_GPIO_TO_IRQ(18), - }, { - .type = "pca9539", - .dev_name = "pca9539-b", - .addr = 0x75, - .platform_data = &gpio_exp[1], - .irq = PXA_GPIO_TO_IRQ(19), - }, -}; - -static void __init zylonite_init_i2c(void) -{ - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(zylonite_i2c_board_info)); -} -#else -static inline void zylonite_init_i2c(void) {} -#endif - -void __init zylonite_pxa300_init(void) -{ - if (cpu_is_pxa300() || cpu_is_pxa310()) { - /* initialize MFP */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(common_mfp_cfg)); - - /* detect LCD panel */ - zylonite_detect_lcd_panel(); - - /* WM9713 IRQ */ - wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26); - - zylonite_init_i2c(); - } - - if (cpu_is_pxa300()) { - pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa300_mfp_cfg)); - gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO99); - } - - if (cpu_is_pxa310()) { - pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); - gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); - } - - /* GPIOs for Debug LEDs */ - gpio_debug_led1 = EXT_GPIO(25); - gpio_debug_led2 = EXT_GPIO(26); -} diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c deleted file mode 100644 index 67cab4f1194b..000000000000 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ /dev/null @@ -1,213 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/zylonite_pxa320.c - * - * PXA320 specific support code for the - * PXA3xx Development Platform (aka Zylonite) - * - * Copyright (C) 2007 Marvell Internation Ltd. - * 2007-08-21: eric miao <eric.miao@marvell.com> - * initial version - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/soc/pxa/cpu.h> - -#include "pxa320.h" -#include "zylonite.h" - -#include "generic.h" - -static mfp_cfg_t mfp_cfg[] __initdata = { - /* LCD */ - GPIO6_2_LCD_LDD_0, - GPIO7_2_LCD_LDD_1, - GPIO8_2_LCD_LDD_2, - GPIO9_2_LCD_LDD_3, - GPIO10_2_LCD_LDD_4, - GPIO11_2_LCD_LDD_5, - GPIO12_2_LCD_LDD_6, - GPIO13_2_LCD_LDD_7, - GPIO63_LCD_LDD_8, - GPIO64_LCD_LDD_9, - GPIO65_LCD_LDD_10, - GPIO66_LCD_LDD_11, - GPIO67_LCD_LDD_12, - GPIO68_LCD_LDD_13, - GPIO69_LCD_LDD_14, - GPIO70_LCD_LDD_15, - GPIO71_LCD_LDD_16, - GPIO72_LCD_LDD_17, - GPIO73_LCD_CS_N, - GPIO74_LCD_VSYNC, - GPIO14_2_LCD_FCLK, - GPIO15_2_LCD_LCLK, - GPIO16_2_LCD_PCLK, - GPIO17_2_LCD_BIAS, - GPIO14_PWM3_OUT, /* backlight */ - - /* FFUART */ - GPIO41_UART1_RXD | MFP_LPM_EDGE_FALL, - GPIO42_UART1_TXD, - GPIO43_UART1_CTS, - GPIO44_UART1_DCD, - GPIO45_UART1_DSR | MFP_LPM_EDGE_FALL, - GPIO46_UART1_RI, - GPIO47_UART1_DTR, - GPIO48_UART1_RTS, - - /* AC97 */ - GPIO34_AC97_SYSCLK, - GPIO35_AC97_SDATA_IN_0, - GPIO37_AC97_SDATA_OUT, - GPIO38_AC97_SYNC, - GPIO39_AC97_BITCLK, - GPIO40_AC97_nACRESET, - GPIO36_GPIO, /* SDATA_IN_1 but unused - configure to GPIO */ - - /* SSP3 */ - GPIO89_SSP3_SCLK, - GPIO90_SSP3_FRM, - GPIO91_SSP3_TXD, - GPIO92_SSP3_RXD, - - /* WM9713 IRQ */ - GPIO15_GPIO, - - /* I2C */ - GPIO32_I2C_SCL, - GPIO33_I2C_SDA, - - /* Keypad */ - GPIO105_KP_DKIN_0 | MFP_LPM_EDGE_BOTH, - GPIO106_KP_DKIN_1 | MFP_LPM_EDGE_BOTH, - GPIO113_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, - GPIO114_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, - GPIO115_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, - GPIO116_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, - GPIO117_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, - GPIO118_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, - GPIO119_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, - GPIO120_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, - GPIO121_KP_MKOUT_0, - GPIO122_KP_MKOUT_1, - GPIO123_KP_MKOUT_2, - GPIO124_KP_MKOUT_3, - GPIO125_KP_MKOUT_4, - GPIO126_KP_MKOUT_5, - GPIO127_KP_MKOUT_6, - GPIO5_2_KP_MKOUT_7, - - /* Ethernet */ - GPIO4_nCS3, - GPIO90_GPIO, - - /* MMC1 */ - GPIO18_MMC1_DAT0, - GPIO19_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, - GPIO20_MMC1_DAT2, - GPIO21_MMC1_DAT3, - GPIO22_MMC1_CLK, - GPIO23_MMC1_CMD,/* CMD0 for slot 0 */ - GPIO31_GPIO, /* CMD1 default as GPIO for slot 0 */ - - /* MMC2 */ - GPIO24_MMC2_DAT0, - GPIO25_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, - GPIO26_MMC2_DAT2, - GPIO27_MMC2_DAT3, - GPIO28_MMC2_CLK, - GPIO29_MMC2_CMD, - - /* USB Host */ - GPIO2_2_USBH_PEN, - GPIO3_2_USBH_PWR, - - /* Debug LEDs */ - GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH, - GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH, -}; - -#define NUM_LCD_DETECT_PINS 7 - -static int lcd_detect_pins[] __initdata = { - MFP_PIN_GPIO72, /* LCD_LDD_17 - ORIENT */ - MFP_PIN_GPIO71, /* LCD_LDD_16 - LCDID[5] */ - MFP_PIN_GPIO17_2, /* LCD_BIAS - LCDID[4] */ - MFP_PIN_GPIO15_2, /* LCD_LCLK - LCDID[3] */ - MFP_PIN_GPIO14_2, /* LCD_FCLK - LCDID[2] */ - MFP_PIN_GPIO73, /* LCD_CS_N - LCDID[1] */ - MFP_PIN_GPIO74, /* LCD_VSYNC - LCDID[0] */ - /* - * set the MFP_PIN_GPIO 14/15/17 to alternate function other than - * GPIO to avoid input level confliction with 14_2, 15_2, 17_2 - */ - MFP_PIN_GPIO14, - MFP_PIN_GPIO15, - MFP_PIN_GPIO17, -}; - -static int lcd_detect_mfpr[] __initdata = { - /* AF0, DS 1X, Pull Neither, Edge Clear */ - 0x8440, 0x8440, 0x8440, 0x8440, 0x8440, 0x8440, 0x8440, - 0xc442, /* Backlight, Pull-Up, AF2 */ - 0x8445, /* AF5 */ - 0x8445, /* AF5 */ -}; - -static void __init zylonite_detect_lcd_panel(void) -{ - unsigned long mfpr_save[ARRAY_SIZE(lcd_detect_pins)]; - int i, gpio, id = 0; - - /* save the original MFP settings of these pins and configure them - * as GPIO Input, DS01X, Pull Neither, Edge Clear - */ - for (i = 0; i < ARRAY_SIZE(lcd_detect_pins); i++) { - mfpr_save[i] = pxa3xx_mfp_read(lcd_detect_pins[i]); - pxa3xx_mfp_write(lcd_detect_pins[i], lcd_detect_mfpr[i]); - } - - for (i = 0; i < NUM_LCD_DETECT_PINS; i++) { - id = id << 1; - gpio = mfp_to_gpio(lcd_detect_pins[i]); - gpio_request(gpio, "LCD_ID_PINS"); - gpio_direction_input(gpio); - - if (gpio_get_value(gpio)) - id = id | 0x1; - gpio_free(gpio); - } - - /* lcd id, flush out bit 1 */ - lcd_id = id & 0x3d; - - /* lcd orientation, portrait or landscape */ - lcd_orientation = (id >> 6) & 0x1; - - /* restore the original MFP settings */ - for (i = 0; i < ARRAY_SIZE(lcd_detect_pins); i++) - pxa3xx_mfp_write(lcd_detect_pins[i], mfpr_save[i]); -} - -void __init zylonite_pxa320_init(void) -{ - if (cpu_is_pxa320()) { - /* initialize MFP */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg)); - - /* detect LCD panel */ - zylonite_detect_lcd_panel(); - - /* GPIO pin assignment */ - gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO9); - gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2); - gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2); - - /* WM9713 IRQ */ - wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO15); - } -} diff --git a/arch/arm/mach-s3c/Kconfig b/arch/arm/mach-s3c/Kconfig index a64143574546..b3656109f1f7 100644 --- a/arch/arm/mach-s3c/Kconfig +++ b/arch/arm/mach-s3c/Kconfig @@ -2,13 +2,10 @@ # # Copyright 2009 Simtec Electronics -source "arch/arm/mach-s3c/Kconfig.s3c24xx" source "arch/arm/mach-s3c/Kconfig.s3c64xx" config PLAT_SAMSUNG - bool - depends on PLAT_S3C24XX || ARCH_S3C64XX - default y + def_bool ARCH_S3C64XX select GENERIC_IRQ_CHIP select NO_IOPORT_MAP select SOC_SAMSUNG @@ -16,9 +13,8 @@ config PLAT_SAMSUNG Base platform code for all Samsung SoC based systems config SAMSUNG_PM - bool - depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX) - default y + def_bool ARCH_S3C64XX + depends on PM help Base platform power management code for samsung code @@ -67,16 +63,6 @@ config S3C_GPIO_TRACK Internal configuration option to enable the s3c specific gpio chip tracking if the platform requires it. -# ADC driver - -config S3C_ADC - bool "ADC common driver support" - depends on !ARCH_MULTIPLATFORM - help - Core support for the ADC block found in the Samsung SoC systems - for drivers such as the touchscreen and hwmon to use to share - this resource. - # device definitions to compile in config S3C_DEV_HSMMC @@ -99,46 +85,11 @@ config S3C_DEV_HSMMC3 help Compile in platform device definitions for HSMMC channel 3 -config S3C_DEV_HWMON - bool - help - Compile in platform device definitions for HWMON - config S3C_DEV_I2C1 bool help Compile in platform device definitions for I2C channel 1 -config S3C_DEV_I2C2 - bool - help - Compile in platform device definitions for I2C channel 2 - -config S3C_DEV_I2C3 - bool - help - Compile in platform device definition for I2C controller 3 - -config S3C_DEV_I2C4 - bool - help - Compile in platform device definition for I2C controller 4 - -config S3C_DEV_I2C5 - bool - help - Compile in platform device definition for I2C controller 5 - -config S3C_DEV_I2C6 - bool - help - Compile in platform device definition for I2C controller 6 - -config S3C_DEV_I2C7 - bool - help - Compile in platform device definition for I2C controller 7 - config S3C_DEV_FB bool help @@ -154,48 +105,12 @@ config S3C_DEV_USB_HSOTG help Compile in platform device definition for USB high-speed OtG -config S3C_DEV_WDT - bool - default y if ARCH_S3C24XX - help - Compile in platform device definition for Watchdog Timer - -config S3C_DEV_NAND - bool - help - Compile in platform device definition for NAND controller - -config S3C_DEV_ONENAND - bool - help - Compile in platform device definition for OneNAND controller - -config S3C_DEV_RTC - bool - help - Compile in platform device definition for RTC - -config SAMSUNG_DEV_ADC - bool - help - Compile in platform device definition for ADC controller - -config SAMSUNG_DEV_IDE - bool - help - Compile in platform device definitions for IDE - config S3C64XX_DEV_SPI0 bool help Compile in platform device definitions for S3C64XX's type SPI controller 0 -config SAMSUNG_DEV_TS - bool - help - Common in platform device definitions for touchscreen device - config SAMSUNG_DEV_KEYPAD bool help @@ -203,7 +118,6 @@ config SAMSUNG_DEV_KEYPAD config SAMSUNG_DEV_PWM bool - default y if ARCH_S3C24XX help Compile in platform device definition for PWM Timer diff --git a/arch/arm/mach-s3c/Kconfig.s3c24xx b/arch/arm/mach-s3c/Kconfig.s3c24xx deleted file mode 100644 index 7287e173f30e..000000000000 --- a/arch/arm/mach-s3c/Kconfig.s3c24xx +++ /dev/null @@ -1,604 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Copyright (c) 2012 Samsung Electronics Co., Ltd. -# http://www.samsung.com/ -# -# Copyright 2007 Simtec Electronics -menuconfig ARCH_S3C24XX - bool "Samsung S3C24XX SoCs (deprecated, see help)" - depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 - depends on CPU_LITTLE_ENDIAN - depends on ATAGS && UNUSED_BOARD_FILES - select CLKSRC_SAMSUNG_PWM - select GPIO_SAMSUNG - select GPIOLIB - select S3C2410_WATCHDOG - select SAMSUNG_ATAGS - select WATCHDOG - help - Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 - and S3C2450 SoCs based systems, such as the Simtec Electronics BAST - (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the - Samsung SMDK2410 development board (and derivatives). - - The platform is deprecated and scheduled for removal. Please reach to - the maintainers of the platform and linux-samsung-soc@vger.kernel.org if - you still use it. - Without such feedback, the platform will be removed after 2022. - -if ARCH_S3C24XX - -config PLAT_S3C24XX - def_bool y - select GPIOLIB - select NO_IOPORT_MAP - select S3C_DEV_NAND - select COMMON_CLK - help - Base platform code for any Samsung S3C24XX device - -menu "Samsung S3C24XX SoCs Support" - -comment "S3C24XX SoCs" - -config CPU_S3C2410 - bool "Samsung S3C2410" - depends on ARCH_MULTI_V4T - default y - select CPU_ARM920T - select S3C2410_COMMON_CLK - select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ - select S3C2410_PM if PM - help - Support for S3C2410 and S3C2410A family from the S3C24XX line - of Samsung Mobile CPUs. - -config CPU_S3C2412 - bool "Samsung S3C2412" - depends on ARCH_MULTI_V5 - select CPU_ARM926T - select S3C2412_COMMON_CLK - select S3C2412_PM if PM_SLEEP - help - Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line - -config CPU_S3C2416 - bool "Samsung S3C2416/S3C2450" - depends on ARCH_MULTI_V5 - select CPU_ARM926T - select S3C2416_PM if PM_SLEEP - select S3C2443_COMMON_CLK - help - Support for the S3C2416 SoC from the S3C24XX line - -config CPU_S3C2440 - bool "Samsung S3C2440" - depends on ARCH_MULTI_V4T - select CPU_ARM920T - select S3C2410_COMMON_CLK - select S3C2410_PM if PM_SLEEP - help - Support for S3C2440 Samsung Mobile CPU based systems. - -config CPU_S3C2442 - bool "Samsung S3C2442" - depends on ARCH_MULTI_V4T - select CPU_ARM920T - select S3C2410_COMMON_CLK - select S3C2410_PM if PM_SLEEP - help - Support for S3C2442 Samsung Mobile CPU based systems. - -config CPU_S3C244X - def_bool y - depends on CPU_S3C2440 || CPU_S3C2442 - -config CPU_S3C2443 - bool "Samsung S3C2443" - depends on ARCH_MULTI_V4T - select CPU_ARM920T - select S3C2443_COMMON_CLK - help - Support for the S3C2443 SoC from the S3C24XX line - -# common code - -config S3C24XX_SMDK - bool - help - Common machine code for SMDK2410 and SMDK2440 - -config S3C24XX_SIMTEC_AUDIO - bool - depends on (ARCH_BAST || MACH_VR1000 || MACH_OSIRIS || MACH_ANUBIS) - default y - help - Add audio devices for common Simtec S3C24XX boards - -config S3C24XX_SIMTEC_PM - bool - help - Common power management code for systems that are - compatible with the Simtec style of power management - -config S3C24XX_SIMTEC_USB - bool - help - USB management code for common Simtec S3C24XX boards - -config S3C24XX_SETUP_TS - bool - help - Compile in platform device definition for Samsung TouchScreen. - -config S3C2410_PM - bool - help - Power Management code common to S3C2410 and better - -config S3C24XX_PLL - bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" - depends on ARM_S3C24XX_CPUFREQ - help - Compile in support for changing the PLL frequency from the - S3C24XX series CPUfreq driver. The PLL takes time to settle - after a frequency change, so by default it is not enabled. - - This also means that the PLL tables for the selected CPU(s) will - be built which may increase the size of the kernel image. - -# cpu frequency items common between s3c2410 and s3c2440/s3c2442 - -config S3C2410_IOTIMING - bool - depends on ARM_S3C24XX_CPUFREQ - help - Internal node to select io timing code that is common to the s3c2410 - and s3c2440/s3c2442 cpu frequency support. - -# cpu frequency support common to s3c2412, s3c2413 and s3c2442 - -config S3C2412_IOTIMING - bool - depends on ARM_S3C24XX_CPUFREQ && (CPU_S3C2412 || CPU_S3C2443) - help - Intel node to select io timing code that is common to the s3c2412 - and the s3c2443. - -# cpu-specific sections - -if CPU_S3C2410 - -config S3C2410_PLL - bool - depends on ARM_S3C2410_CPUFREQ && S3C24XX_PLL - default y - help - Select the PLL table for the S3C2410 - -config S3C24XX_SIMTEC_NOR - bool - help - Internal node to specify machine has simtec NOR mapping - -config MACH_BAST_IDE - bool - select HAVE_PATA_PLATFORM - help - Internal node for machines with an BAST style IDE - interface - -comment "S3C2410 Boards" - -# -# The "S3C2410 Boards" list is ordered alphabetically by option text. -# (without ARCH_ or MACH_) -# - -config MACH_AML_M5900 - bool "AML M5900 Series" - select S3C24XX_SIMTEC_PM if PM - select S3C_DEV_USB_HOST - help - Say Y here if you are using the American Microsystems M5900 Series - <http://www.amltd.com> - -config ARCH_BAST - bool "Simtec Electronics BAST (EB2410ITX)" - select MACH_BAST_IDE - select S3C2410_COMMON_DCLK - select S3C2410_IOTIMING if ARM_S3C2410_CPUFREQ - select S3C24XX_SIMTEC_NOR - select S3C24XX_SIMTEC_PM if PM - select S3C24XX_SIMTEC_USB - select S3C_DEV_HWMON - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Simtec Electronics EB2410ITX - development board (also known as BAST) - -config BAST_PC104_IRQ - bool "BAST PC104 IRQ support" - depends on ARCH_BAST - default y - help - Say Y here to enable the PC104 IRQ routing on the - Simtec BAST (EB2410ITX) - -config ARCH_H1940 - bool "IPAQ H1940" - select PM_H1940 if PM - select S3C24XX_SETUP_TS - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the HP IPAQ H1940 - -config H1940BT - tristate "Control the state of H1940 bluetooth chip" - depends on ARCH_H1940 - depends on RFKILL - help - This is a simple driver that is able to control - the state of built in bluetooth chip on h1940. - -config MACH_N30 - bool "Acer N30 family" - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you want suppt for the Acer N30, Acer N35, - Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs. - -config MACH_OTOM - bool "NexVision OTOM Board" - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Nex Vision OTOM board - -config MACH_QT2410 - bool "QT2410" - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Armzone QT2410 - -config ARCH_SMDK2410 - bool "SMDK2410/A9M2410" - select S3C24XX_SMDK - select S3C_DEV_USB_HOST - help - Say Y here if you are using the SMDK2410 or the derived module A9M2410 - <http://www.fsforth.de> - -config MACH_TCT_HAMMER - bool "TCT Hammer Board" - select S3C_DEV_USB_HOST - help - Say Y here if you are using the TinCanTools Hammer Board - <https://www.tincantools.com> - -config MACH_VR1000 - bool "Thorcom VR1000" - select MACH_BAST_IDE - select S3C2410_COMMON_DCLK - select S3C24XX_SIMTEC_NOR - select S3C24XX_SIMTEC_PM if PM - select S3C24XX_SIMTEC_USB - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Thorcom VR1000 board. - -endif # CPU_S3C2410 - -config S3C2412_PM_SLEEP - bool - help - Internal config node to apply sleep for S3C2412 power management. - Can be selected by another SoCs such as S3C2416 with similar - sleep procedure. - -if CPU_S3C2412 - -config CPU_S3C2412_ONLY - bool - depends on !CPU_S3C2410 && !CPU_S3C2416 && !CPU_S3C2440 && \ - !CPU_S3C2442 && !CPU_S3C2443 - default y - -config S3C2412_PM - bool - select S3C2412_PM_SLEEP - select SAMSUNG_WAKEMASK - help - Internal config node to apply S3C2412 power management - -comment "S3C2412 Boards" - -# -# The "S3C2412 Boards" list is ordered alphabetically by option text. -# (without ARCH_ or MACH_) -# - -config MACH_JIVE - bool "Logitech Jive" - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Logitech Jive. - -config MACH_JIVE_SHOW_BOOTLOADER - bool "Allow access to bootloader partitions in MTD" - depends on MACH_JIVE - -config MACH_S3C2413 - bool - help - Internal node for S3C2413 version of SMDK2413, so that - machine_is_s3c2413() will work when MACH_SMDK2413 is - selected - -config MACH_SMDK2412 - bool "SMDK2412" - select MACH_SMDK2413 - help - Say Y here if you are using an SMDK2412 - - Note, this shares support with SMDK2413, so will automatically - select MACH_SMDK2413. - -config MACH_SMDK2413 - bool "SMDK2413" - select MACH_S3C2413 - select S3C24XX_SMDK - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using an SMDK2413 - -config MACH_VSTMS - bool "VMSTMS" - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using an VSTMS board - -endif # CPU_S3C2412 - -if CPU_S3C2416 - -config S3C2416_PM - bool - select S3C2412_PM_SLEEP - select SAMSUNG_WAKEMASK - help - Internal config node to apply S3C2416 power management - -config S3C2416_SETUP_SDHCI - bool - select S3C2416_SETUP_SDHCI_GPIO - help - Internal helper functions for S3C2416 based SDHCI systems - -config S3C2416_SETUP_SDHCI_GPIO - bool - help - Common setup code for SDHCI gpio. - -comment "S3C2416 Boards" - -config MACH_SMDK2416 - bool "SMDK2416" - select S3C2416_SETUP_SDHCI - select S3C24XX_SMDK - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using an SMDK2416 - -config MACH_S3C2416_DT - bool "Samsung S3C2416 machine using devicetree" - select TIMER_OF - select USE_OF - select PINCTRL - select PINCTRL_S3C24XX - help - Machine support for Samsung S3C2416 machines with device tree enabled. - Select this if a fdt blob is available for the S3C2416 SoC based board. - Note: This is under development and not all peripherals can be supported - with this machine file. - -endif # CPU_S3C2416 - -if CPU_S3C2440 || CPU_S3C2442 - -config S3C2440_XTAL_12000000 - bool - help - Indicate that the build needs to support 12MHz system - crystal. - -config S3C2440_XTAL_16934400 - bool - help - Indicate that the build needs to support 16.9344MHz system - crystal. - -config S3C2440_PLL_12000000 - bool - depends on ARM_S3C2440_CPUFREQ && S3C2440_XTAL_12000000 - default y if S3C24XX_PLL - help - PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals. - -config S3C2440_PLL_16934400 - bool - depends on ARM_S3C2440_CPUFREQ && S3C2440_XTAL_16934400 - default y if S3C24XX_PLL - help - PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals. -endif # CPU_S3C2440 || CPU_S3C2442 - -if CPU_S3C2440 - -comment "S3C2440 Boards" - -# -# The "S3C2440 Boards" list is ordered alphabetically by option text. -# (without ARCH_ or MACH_) -# - -config MACH_ANUBIS - bool "Simtec Electronics ANUBIS" - select HAVE_PATA_PLATFORM - select S3C2410_COMMON_DCLK - select S3C2440_XTAL_12000000 - select S3C24XX_SIMTEC_PM if PM - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Simtec Electronics ANUBIS - development system - -config MACH_AT2440EVB - bool "Avantech AT2440EVB development board" - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the AT2440EVB development board - -config MACH_MINI2440 - bool "MINI2440 development board" - select LEDS_CLASS - select LEDS_TRIGGERS - select LEDS_TRIGGER_BACKLIGHT - select NEW_LEDS - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here to select support for the MINI2440. Is a 10cm x 10cm board - available via various sources. It can come with a 3.5" or 7" touch LCD. - -config MACH_NEXCODER_2440 - bool "NexVision NEXCODER 2440 Light Board" - select S3C2440_XTAL_12000000 - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board - -config MACH_OSIRIS - bool "Simtec IM2440D20 (OSIRIS) module" - select S3C2410_COMMON_DCLK - select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ - select S3C2440_XTAL_12000000 - select S3C24XX_SIMTEC_PM if PM - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Simtec IM2440D20 module, also - known as the Osiris. - -config MACH_OSIRIS_DVS - tristate "Simtec IM2440D20 (OSIRIS) Dynamic Voltage Scaling driver" - depends on MACH_OSIRIS - depends on TPS65010 - help - Say Y/M here if you want to have dynamic voltage scaling support - on the Simtec IM2440D20 (OSIRIS) module via the TPS65011. - - The DVS driver alters the voltage supplied to the ARM core - depending on the frequency it is running at. The driver itself - does not do any of the frequency alteration, which is left up - to the cpufreq driver. - -config MACH_RX3715 - bool "HP iPAQ rx3715" - select PM_H1940 if PM - select S3C2440_XTAL_16934400 - select S3C_DEV_NAND - help - Say Y here if you are using the HP iPAQ rx3715. - -config ARCH_S3C2440 - bool "SMDK2440" - select S3C2440_XTAL_16934400 - select S3C24XX_SMDK - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - help - Say Y here if you are using the SMDK2440. - -config SMDK2440_CPU2440 - bool "SMDK2440 with S3C2440 CPU module" - default y if ARCH_S3C2440 - select S3C2440_XTAL_16934400 - -endif # CPU_S3C2440 - -if CPU_S3C2442 - -comment "S3C2442 Boards" - -# -# The "S3C2442 Boards" list is ordered alphabetically by option text. -# (without ARCH_ or MACH_) -# - -config MACH_NEO1973_GTA02 - bool "Openmoko GTA02 / Freerunner phone" - select I2C - select MFD_PCF50633 - select PCF50633_GPIO - select POWER_SUPPLY - select S3C_DEV_USB_HOST - help - Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone - -config MACH_RX1950 - bool "HP iPAQ rx1950" - select I2C - select PM_H1940 if PM - select S3C2410_COMMON_DCLK - select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ - select S3C2440_XTAL_16934400 - select S3C_DEV_NAND - help - Say Y here if you're using HP iPAQ rx1950 - -endif # CPU_S3C2442 - -if CPU_S3C2443 || CPU_S3C2416 - -config S3C2443_SETUP_SPI - bool - help - Common setup code for SPI GPIO configurations - -endif # CPU_S3C2443 || CPU_S3C2416 - -if CPU_S3C2443 - -comment "S3C2443 Boards" - -config MACH_SMDK2443 - bool "SMDK2443" - select S3C24XX_SMDK - select S3C_DEV_HSMMC1 - help - Say Y here if you are using an SMDK2443 - -endif # CPU_S3C2443 - -config PM_H1940 - bool - help - Internal node for H1940 and related PM - -endmenu # "Samsung S3C24XX SoCs Support" - -endif # ARCH_S3C24XX diff --git a/arch/arm/mach-s3c/Kconfig.s3c64xx b/arch/arm/mach-s3c/Kconfig.s3c64xx index 0c1b91c3ac5f..01a7a8eec6e8 100644 --- a/arch/arm/mach-s3c/Kconfig.s3c64xx +++ b/arch/arm/mach-s3c/Kconfig.s3c64xx @@ -15,7 +15,6 @@ menuconfig ARCH_S3C64XX select HAVE_TCM select PLAT_SAMSUNG select PM_GENERIC_DOMAINS if PM - select S3C_DEV_NAND if ATAGS select S3C_GPIO_TRACK if ATAGS select S3C2410_WATCHDOG select SAMSUNG_ATAGS if ATAGS @@ -54,17 +53,6 @@ config S3C64XX_SETUP_SDHCI Internal configuration for default SDHCI setup for S3C6400 and S3C6410 SoCs. -config S3C64XX_DEV_ONENAND1 - bool - help - Compile in platform device definition for OneNAND1 controller - -config SAMSUNG_DEV_BACKLIGHT - bool - depends on SAMSUNG_DEV_PWM - help - Compile in platform device definition LCD backlight with PWM Timer - # platform specific device setup config S3C64XX_SETUP_I2C0 @@ -113,201 +101,6 @@ config S3C64XX_SETUP_USB_PHY # S36400 Macchine support -config MACH_SMDK6400 - bool "SMDK6400" - depends on ATAGS && UNUSED_BOARD_FILES - select CPU_S3C6400 - select S3C64XX_SETUP_SDHCI - select S3C_DEV_HSMMC1 - help - Machine support for the Samsung SMDK6400 - -# S3C6410 machine support - -config MACH_ANW6410 - bool "A&W6410" - depends on ATAGS && UNUSED_BOARD_FILES - select CPU_S3C6410 - select S3C64XX_SETUP_FB_24BPP - select S3C_DEV_FB - help - Machine support for the A&W6410 - -config MACH_MINI6410 - bool "MINI6410" - depends on ATAGS && UNUSED_BOARD_FILES - select CPU_S3C6410 - select S3C64XX_SETUP_FB_24BPP - select S3C64XX_SETUP_SDHCI - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_TS - help - Machine support for the FriendlyARM MINI6410 - -config MACH_REAL6410 - bool "REAL6410" - depends on ATAGS && UNUSED_BOARD_FILES - select CPU_S3C6410 - select S3C64XX_SETUP_FB_24BPP - select S3C64XX_SETUP_SDHCI - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_TS - help - Machine support for the CoreWind REAL6410 - -config MACH_SMDK6410 - bool "SMDK6410" - depends on ATAGS && UNUSED_BOARD_FILES - select CPU_S3C6410 - select S3C64XX_SETUP_FB_24BPP - select S3C64XX_SETUP_I2C1 - select S3C64XX_SETUP_IDE - select S3C64XX_SETUP_KEYPAD - select S3C64XX_SETUP_SDHCI - select S3C64XX_SETUP_USB_PHY - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_I2C1 - select S3C_DEV_RTC - select S3C_DEV_USB_HOST - select S3C_DEV_USB_HSOTG - select S3C_DEV_WDT - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_IDE - select SAMSUNG_DEV_KEYPAD - select SAMSUNG_DEV_PWM - select SAMSUNG_DEV_TS - help - Machine support for the Samsung SMDK6410 - -# At least some of the SMDK6410s were shipped with the card detect -# for the MMC/SD slots connected to the same input. This means that -# either the boards need to be altered to have channel0 to an alternate -# configuration or that only one slot can be used. - -choice - prompt "SMDK6410 MMC/SD slot setup" - depends on MACH_SMDK6410 - -config SMDK6410_SD_CH0 - bool "Use channel 0 only" - depends on MACH_SMDK6410 - help - Select CON7 (channel 0) as the MMC/SD slot, as - at least some SMDK6410 boards come with the - resistors fitted so that the card detects for - channels 0 and 1 are the same. - -config SMDK6410_SD_CH1 - bool "Use channel 1 only" - depends on MACH_SMDK6410 - help - Select CON6 (channel 1) as the MMC/SD slot, as - at least some SMDK6410 boards come with the - resistors fitted so that the card detects for - channels 0 and 1 are the same. - -endchoice - -config SMDK6410_WM1190_EV1 - bool "Support Wolfson Microelectronics 1190-EV1 PMIC card" - depends on MACH_SMDK6410 - depends on I2C=y - select MFD_WM8350_I2C - select REGULATOR - select REGULATOR_WM8350 - help - The Wolfson Microelectronics 1190-EV1 is a WM835x based PMIC - and audio daughtercard for the Samsung SMDK6410 reference - platform. Enabling this option will build support for this - module into the kernel. The presence of the module will be - detected at runtime so the resulting kernel can be used - with or without the 1190-EV1 fitted. - -config SMDK6410_WM1192_EV1 - bool "Support Wolfson Microelectronics 1192-EV1 PMIC card" - depends on MACH_SMDK6410 - depends on I2C=y - select MFD_WM831X - select MFD_WM831X_I2C - select REGULATOR - select REGULATOR_WM831X - help - The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC - daughtercard for the Samsung SMDK6410 reference platform. - Enabling this option will build support for this module into - the kernel. The presence of the daughtercard will be - detected at runtime so the resulting kernel can be used - with or without the 1192-EV1 fitted. - -config MACH_NCP - bool "NCP" - depends on ATAGS && UNUSED_BOARD_FILES - select CPU_S3C6410 - select S3C64XX_SETUP_I2C1 - select S3C_DEV_HSMMC1 - select S3C_DEV_I2C1 - help - Machine support for the Samsung NCP - -config MACH_HMT - bool "Airgoo HMT" - depends on ATAGS && UNUSED_BOARD_FILES - select CPU_S3C6410 - select S3C64XX_SETUP_FB_24BPP - select S3C_DEV_FB - select S3C_DEV_NAND - select S3C_DEV_USB_HOST - select SAMSUNG_DEV_PWM - help - Machine support for the Airgoo HMT - -config MACH_SMARTQ - bool - select CPU_S3C6410 - select S3C64XX_SETUP_FB_24BPP - select S3C64XX_SETUP_SDHCI - select S3C64XX_SETUP_USB_PHY - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_HWMON - select S3C_DEV_RTC - select S3C_DEV_USB_HOST - select S3C_DEV_USB_HSOTG - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_PWM - select SAMSUNG_DEV_TS - help - Shared machine support for SmartQ 5/7 - -config MACH_SMARTQ5 - bool "SmartQ 5" - depends on ATAGS && UNUSED_BOARD_FILES - select MACH_SMARTQ - help - Machine support for the SmartQ 5 - -config MACH_SMARTQ7 - bool "SmartQ 7" - depends on ATAGS && UNUSED_BOARD_FILES - select MACH_SMARTQ - help - Machine support for the SmartQ 7 - config MACH_WLF_CRAGG_6410 bool "Wolfson Cragganmore 6410" depends on ATAGS @@ -327,11 +120,8 @@ config MACH_WLF_CRAGG_6410 select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 select S3C_DEV_I2C1 - select S3C_DEV_RTC select S3C_DEV_USB_HOST select S3C_DEV_USB_HSOTG - select S3C_DEV_WDT - select SAMSUNG_DEV_ADC select SAMSUNG_DEV_KEYPAD select SAMSUNG_DEV_PWM help diff --git a/arch/arm/mach-s3c/Makefile b/arch/arm/mach-s3c/Makefile index 7c7d3318fd61..988c49672715 100644 --- a/arch/arm/mach-s3c/Makefile +++ b/arch/arm/mach-s3c/Makefile @@ -2,26 +2,15 @@ # # Copyright 2009 Simtec Electronics -ifdef CONFIG_ARCH_S3C24XX -include $(src)/Makefile.s3c24xx -endif - -ifdef CONFIG_ARCH_S3C64XX include $(src)/Makefile.s3c64xx -endif # Objects we always build independent of SoC choice obj-y += init.o cpu.o -# ADC - -obj-$(CONFIG_S3C_ADC) += adc.o - # devices obj-$(CONFIG_SAMSUNG_ATAGS) += platformdata.o - obj-$(CONFIG_SAMSUNG_ATAGS) += devs.o obj-$(CONFIG_SAMSUNG_ATAGS) += dev-uart.o @@ -31,5 +20,4 @@ obj-$(CONFIG_GPIO_SAMSUNG) += gpio-samsung.o obj-$(CONFIG_SAMSUNG_PM) += pm.o pm-common.o obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o - obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o diff --git a/arch/arm/mach-s3c/Makefile.s3c24xx b/arch/arm/mach-s3c/Makefile.s3c24xx deleted file mode 100644 index 3483ab3a2b81..000000000000 --- a/arch/arm/mach-s3c/Makefile.s3c24xx +++ /dev/null @@ -1,102 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Copyright (c) 2012 Samsung Electronics Co., Ltd. -# http://www.samsung.com/ -# -# Copyright 2007 Simtec Electronics - -# core - -obj-y += s3c24xx.o -obj-y += irq-s3c24xx.o -obj-$(CONFIG_SPI_S3C24XX_FIQ) += irq-s3c24xx-fiq.o -obj-$(CONFIG_SPI_S3C24XX_FIQ) += irq-s3c24xx-fiq-exports.o - -obj-$(CONFIG_CPU_S3C2410) += s3c2410.o -obj-$(CONFIG_S3C2410_PLL) += pll-s3c2410.o -obj-$(CONFIG_S3C2410_PM) += pm-s3c2410.o sleep-s3c2410.o - -obj-$(CONFIG_CPU_S3C2412) += s3c2412.o -obj-$(CONFIG_S3C2412_PM) += pm-s3c2412.o -obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep-s3c2412.o - -obj-$(CONFIG_CPU_S3C2416) += s3c2416.o -obj-$(CONFIG_S3C2416_PM) += pm-s3c2416.o - -obj-$(CONFIG_CPU_S3C2440) += s3c2440.o -obj-$(CONFIG_CPU_S3C2442) += s3c2442.o -obj-$(CONFIG_CPU_S3C244X) += s3c244x.o -obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o -obj-$(CONFIG_S3C2440_PLL_16934400) += pll-s3c2440-16934400.o - -obj-$(CONFIG_CPU_S3C2443) += s3c2443.o - -# PM - -obj-$(CONFIG_PM) += pm-s3c24xx.o -obj-$(CONFIG_PM_SLEEP) += irq-pm-s3c24xx.o sleep-s3c24xx.o - -# common code - -obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += cpufreq-utils-s3c24xx.o - -obj-$(CONFIG_S3C2410_IOTIMING) += iotiming-s3c2410.o -obj-$(CONFIG_S3C2412_IOTIMING) += iotiming-s3c2412.o - -# -# machine support -# following is ordered alphabetically by option text. -# - -obj-$(CONFIG_MACH_AML_M5900) += mach-amlm5900.o -obj-$(CONFIG_ARCH_BAST) += mach-bast.o -obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o -obj-$(CONFIG_ARCH_H1940) += mach-h1940.o -obj-$(CONFIG_H1940BT) += h1940-bluetooth.o -obj-$(CONFIG_PM_H1940) += pm-h1940.o -obj-$(CONFIG_MACH_N30) += mach-n30.o -obj-$(CONFIG_MACH_OTOM) += mach-otom.o -obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o -obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o -obj-$(CONFIG_MACH_TCT_HAMMER) += mach-tct_hammer.o -obj-$(CONFIG_MACH_VR1000) += mach-vr1000.o - -obj-$(CONFIG_MACH_JIVE) += mach-jive.o -obj-$(CONFIG_MACH_SMDK2413) += mach-smdk2413.o -obj-$(CONFIG_MACH_VSTMS) += mach-vstms.o - -obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o -obj-$(CONFIG_MACH_S3C2416_DT) += mach-s3c2416-dt.o - -obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o -obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o -obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o -obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o -obj-$(CONFIG_MACH_OSIRIS) += mach-osiris.o -obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o -obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o - -obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o -obj-$(CONFIG_MACH_RX1950) += mach-rx1950.o - -obj-$(CONFIG_MACH_SMDK2443) += mach-smdk2443.o - -# common bits of machine support - -obj-$(CONFIG_S3C24XX_SMDK) += common-smdk-s3c24xx.o -obj-$(CONFIG_S3C24XX_SIMTEC_AUDIO) += simtec-audio.o -obj-$(CONFIG_S3C24XX_SIMTEC_NOR) += simtec-nor.o -obj-$(CONFIG_S3C24XX_SIMTEC_PM) += simtec-pm.o -obj-$(CONFIG_S3C24XX_SIMTEC_USB) += simtec-usb.o - -# machine additions - -obj-$(CONFIG_MACH_BAST_IDE) += bast-ide.o -obj-$(CONFIG_MACH_OSIRIS_DVS) += mach-osiris-dvs.o - -# device setup - -obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio-s3c24xx.o -obj-$(CONFIG_S3C2443_SETUP_SPI) += setup-spi-s3c24xx.o -obj-$(CONFIG_ARCH_S3C24XX) += setup-i2c-s3c24xx.o -obj-$(CONFIG_S3C24XX_SETUP_TS) += setup-ts-s3c24xx.o diff --git a/arch/arm/mach-s3c/Makefile.s3c64xx b/arch/arm/mach-s3c/Makefile.s3c64xx index 21e919bf2cd1..61287ad2ea42 100644 --- a/arch/arm/mach-s3c/Makefile.s3c64xx +++ b/arch/arm/mach-s3c/Makefile.s3c64xx @@ -16,7 +16,6 @@ obj-$(CONFIG_PM_SLEEP) += irq-pm-s3c64xx.o # Core obj-y += s3c64xx.o -obj-$(CONFIG_CPU_S3C6400) += s3c6400.o obj-$(CONFIG_CPU_S3C6410) += s3c6410.o # DMA support @@ -33,26 +32,12 @@ obj-y += dev-audio-s3c64xx.o obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp-s3c64xx.o obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0-s3c64xx.o obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1-s3c64xx.o -obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide-s3c64xx.o obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad-s3c64xx.o obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio-s3c64xx.o obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi-s3c64xx.o obj-$(CONFIG_S3C64XX_SETUP_USB_PHY) += setup-usb-phy-s3c64xx.o -obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight-s3c64xx.o - # Machine support - -obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o -obj-$(CONFIG_MACH_HMT) += mach-hmt.o -obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o -obj-$(CONFIG_MACH_NCP) += mach-ncp.o -obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o -obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o -obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o -obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o -obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o -obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o endif diff --git a/arch/arm/mach-s3c/adc-core.h b/arch/arm/mach-s3c/adc-core.h deleted file mode 100644 index 039f6862b6a7..000000000000 --- a/arch/arm/mach-s3c/adc-core.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Samsung ADC Controller core functions - */ - -#ifndef __ASM_PLAT_ADC_CORE_H -#define __ASM_PLAT_ADC_CORE_H __FILE__ - -/* These functions are only for use with the core support code, such as - * the cpu specific initialisation code - */ - -/* re-define device name depending on support. */ -static inline void s3c_adc_setname(char *name) -{ -#if defined(CONFIG_SAMSUNG_DEV_ADC) || defined(CONFIG_PLAT_S3C24XX) - s3c_device_adc.name = name; -#endif -} - -#endif /* __ASM_PLAT_ADC_CORE_H */ diff --git a/arch/arm/mach-s3c/adc.c b/arch/arm/mach-s3c/adc.c deleted file mode 100644 index 0232520d3c13..000000000000 --- a/arch/arm/mach-s3c/adc.c +++ /dev/null @@ -1,510 +0,0 @@ -// SPDX-License-Identifier: GPL-1.0+ -// -// Copyright (c) 2008 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> -// -// Samsung ADC device core - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/mod_devicetable.h> -#include <linux/platform_device.h> -#include <linux/sched.h> -#include <linux/list.h> -#include <linux/slab.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/regulator/consumer.h> - -#include "regs-adc.h" -#include <linux/soc/samsung/s3c-adc.h> - -/* This driver is designed to control the usage of the ADC block between - * the touchscreen and any other drivers that may need to use it, such as - * the hwmon driver. - * - * Priority will be given to the touchscreen driver, but as this itself is - * rate limited it should not starve other requests which are processed in - * order that they are received. - * - * Each user registers to get a client block which uniquely identifies it - * and stores information such as the necessary functions to callback when - * action is required. - */ - -enum s3c_cpu_type { - TYPE_ADCV1, /* S3C24XX */ - TYPE_ADCV11, /* S3C2443 */ - TYPE_ADCV12, /* S3C2416, S3C2450 */ - TYPE_ADCV2, /* S3C64XX */ - TYPE_ADCV3, /* S5PV210, S5PC110, Exynos4210 */ -}; - -struct s3c_adc_client { - struct platform_device *pdev; - struct list_head pend; - wait_queue_head_t *wait; - - unsigned int nr_samples; - int result; - unsigned char is_ts; - unsigned char channel; - - void (*select_cb)(struct s3c_adc_client *c, unsigned selected); - void (*convert_cb)(struct s3c_adc_client *c, - unsigned val1, unsigned val2, - unsigned *samples_left); -}; - -struct adc_device { - struct platform_device *pdev; - struct platform_device *owner; - struct clk *clk; - struct s3c_adc_client *cur; - struct s3c_adc_client *ts_pend; - void __iomem *regs; - spinlock_t lock; - - unsigned int prescale; - - int irq; - struct regulator *vdd; -}; - -static struct adc_device *adc_dev; - -static LIST_HEAD(adc_pending); /* protected by adc_device.lock */ - -#define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) - -static inline void s3c_adc_convert(struct adc_device *adc) -{ - unsigned con = readl(adc->regs + S3C2410_ADCCON); - - con |= S3C2410_ADCCON_ENABLE_START; - writel(con, adc->regs + S3C2410_ADCCON); -} - -static inline void s3c_adc_select(struct adc_device *adc, - struct s3c_adc_client *client) -{ - unsigned con = readl(adc->regs + S3C2410_ADCCON); - enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; - - client->select_cb(client, 1); - - if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV2) - con &= ~S3C2410_ADCCON_MUXMASK; - con &= ~S3C2410_ADCCON_STDBM; - con &= ~S3C2410_ADCCON_STARTMASK; - - if (!client->is_ts) { - if (cpu == TYPE_ADCV3) - writel(client->channel & 0xf, adc->regs + S5P_ADCMUX); - else if (cpu == TYPE_ADCV11 || cpu == TYPE_ADCV12) - writel(client->channel & 0xf, - adc->regs + S3C2443_ADCMUX); - else - con |= S3C2410_ADCCON_SELMUX(client->channel); - } - - writel(con, adc->regs + S3C2410_ADCCON); -} - -static void s3c_adc_dbgshow(struct adc_device *adc) -{ - adc_dbg(adc, "CON=%08x, TSC=%08x, DLY=%08x\n", - readl(adc->regs + S3C2410_ADCCON), - readl(adc->regs + S3C2410_ADCTSC), - readl(adc->regs + S3C2410_ADCDLY)); -} - -static void s3c_adc_try(struct adc_device *adc) -{ - struct s3c_adc_client *next = adc->ts_pend; - - if (!next && !list_empty(&adc_pending)) { - next = list_first_entry(&adc_pending, - struct s3c_adc_client, pend); - list_del(&next->pend); - } else - adc->ts_pend = NULL; - - if (next) { - adc_dbg(adc, "new client is %p\n", next); - adc->cur = next; - s3c_adc_select(adc, next); - s3c_adc_convert(adc); - s3c_adc_dbgshow(adc); - } -} - -int s3c_adc_start(struct s3c_adc_client *client, - unsigned int channel, unsigned int nr_samples) -{ - struct adc_device *adc = adc_dev; - unsigned long flags; - - if (!adc) { - printk(KERN_ERR "%s: failed to find adc\n", __func__); - return -EINVAL; - } - - spin_lock_irqsave(&adc->lock, flags); - - if (client->is_ts && adc->ts_pend) { - spin_unlock_irqrestore(&adc->lock, flags); - return -EAGAIN; - } - - client->channel = channel; - client->nr_samples = nr_samples; - - if (client->is_ts) - adc->ts_pend = client; - else - list_add_tail(&client->pend, &adc_pending); - - if (!adc->cur) - s3c_adc_try(adc); - - spin_unlock_irqrestore(&adc->lock, flags); - - return 0; -} -EXPORT_SYMBOL_GPL(s3c_adc_start); - -static void s3c_convert_done(struct s3c_adc_client *client, - unsigned v, unsigned u, unsigned *left) -{ - client->result = v; - wake_up(client->wait); -} - -int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch) -{ - DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake); - int ret; - - client->convert_cb = s3c_convert_done; - client->wait = &wake; - client->result = -1; - - ret = s3c_adc_start(client, ch, 1); - if (ret < 0) - goto err; - - ret = wait_event_timeout(wake, client->result >= 0, HZ / 2); - if (client->result < 0) { - ret = -ETIMEDOUT; - goto err; - } - - client->convert_cb = NULL; - return client->result; - -err: - return ret; -} -EXPORT_SYMBOL_GPL(s3c_adc_read); - -static void s3c_adc_default_select(struct s3c_adc_client *client, - unsigned select) -{ -} - -struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev, - void (*select)(struct s3c_adc_client *client, - unsigned int selected), - void (*conv)(struct s3c_adc_client *client, - unsigned d0, unsigned d1, - unsigned *samples_left), - unsigned int is_ts) -{ - struct s3c_adc_client *client; - - WARN_ON(!pdev); - - if (!select) - select = s3c_adc_default_select; - - if (!pdev) - return ERR_PTR(-EINVAL); - - client = kzalloc(sizeof(*client), GFP_KERNEL); - if (!client) - return ERR_PTR(-ENOMEM); - - client->pdev = pdev; - client->is_ts = is_ts; - client->select_cb = select; - client->convert_cb = conv; - - return client; -} -EXPORT_SYMBOL_GPL(s3c_adc_register); - -void s3c_adc_release(struct s3c_adc_client *client) -{ - unsigned long flags; - - spin_lock_irqsave(&adc_dev->lock, flags); - - /* We should really check that nothing is in progress. */ - if (adc_dev->cur == client) - adc_dev->cur = NULL; - if (adc_dev->ts_pend == client) - adc_dev->ts_pend = NULL; - else { - struct list_head *p, *n; - struct s3c_adc_client *tmp; - - list_for_each_safe(p, n, &adc_pending) { - tmp = list_entry(p, struct s3c_adc_client, pend); - if (tmp == client) - list_del(&tmp->pend); - } - } - - if (adc_dev->cur == NULL) - s3c_adc_try(adc_dev); - - spin_unlock_irqrestore(&adc_dev->lock, flags); - kfree(client); -} -EXPORT_SYMBOL_GPL(s3c_adc_release); - -static irqreturn_t s3c_adc_irq(int irq, void *pw) -{ - struct adc_device *adc = pw; - struct s3c_adc_client *client = adc->cur; - enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; - unsigned data0, data1; - - if (!client) { - dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__); - goto exit; - } - - data0 = readl(adc->regs + S3C2410_ADCDAT0); - data1 = readl(adc->regs + S3C2410_ADCDAT1); - adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1); - - client->nr_samples--; - - if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV11) { - data0 &= 0x3ff; - data1 &= 0x3ff; - } else { - /* S3C2416/S3C64XX/S5P ADC resolution is 12-bit */ - data0 &= 0xfff; - data1 &= 0xfff; - } - - if (client->convert_cb) - (client->convert_cb)(client, data0, data1, &client->nr_samples); - - if (client->nr_samples > 0) { - /* fire another conversion for this */ - - client->select_cb(client, 1); - s3c_adc_convert(adc); - } else { - spin_lock(&adc->lock); - (client->select_cb)(client, 0); - adc->cur = NULL; - - s3c_adc_try(adc); - spin_unlock(&adc->lock); - } - -exit: - if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) { - /* Clear ADC interrupt */ - writel(0, adc->regs + S3C64XX_ADCCLRINT); - } - return IRQ_HANDLED; -} - -static int s3c_adc_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct adc_device *adc; - enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data; - int ret; - unsigned tmp; - - adc = devm_kzalloc(dev, sizeof(*adc), GFP_KERNEL); - if (!adc) - return -ENOMEM; - - spin_lock_init(&adc->lock); - - adc->pdev = pdev; - adc->prescale = S3C2410_ADCCON_PRSCVL(49); - - adc->vdd = devm_regulator_get(dev, "vdd"); - if (IS_ERR(adc->vdd)) { - dev_err(dev, "operating without regulator \"vdd\" .\n"); - return PTR_ERR(adc->vdd); - } - - adc->irq = platform_get_irq(pdev, 1); - if (adc->irq <= 0) - return -ENOENT; - - ret = devm_request_irq(dev, adc->irq, s3c_adc_irq, 0, dev_name(dev), - adc); - if (ret < 0) { - dev_err(dev, "failed to attach adc irq\n"); - return ret; - } - - adc->clk = devm_clk_get(dev, "adc"); - if (IS_ERR(adc->clk)) { - dev_err(dev, "failed to get adc clock\n"); - return PTR_ERR(adc->clk); - } - - adc->regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(adc->regs)) - return PTR_ERR(adc->regs); - - ret = regulator_enable(adc->vdd); - if (ret) - return ret; - - clk_prepare_enable(adc->clk); - - tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; - - /* Enable 12-bit ADC resolution */ - if (cpu == TYPE_ADCV12) - tmp |= S3C2416_ADCCON_RESSEL; - if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) - tmp |= S3C64XX_ADCCON_RESSEL; - - writel(tmp, adc->regs + S3C2410_ADCCON); - - dev_info(dev, "attached adc driver\n"); - - platform_set_drvdata(pdev, adc); - adc_dev = adc; - - return 0; -} - -static int s3c_adc_remove(struct platform_device *pdev) -{ - struct adc_device *adc = platform_get_drvdata(pdev); - - clk_disable_unprepare(adc->clk); - regulator_disable(adc->vdd); - - return 0; -} - -#ifdef CONFIG_PM -static int s3c_adc_suspend(struct device *dev) -{ - struct adc_device *adc = dev_get_drvdata(dev); - unsigned long flags; - u32 con; - - spin_lock_irqsave(&adc->lock, flags); - - con = readl(adc->regs + S3C2410_ADCCON); - con |= S3C2410_ADCCON_STDBM; - writel(con, adc->regs + S3C2410_ADCCON); - - disable_irq(adc->irq); - spin_unlock_irqrestore(&adc->lock, flags); - clk_disable(adc->clk); - regulator_disable(adc->vdd); - - return 0; -} - -static int s3c_adc_resume(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - struct adc_device *adc = platform_get_drvdata(pdev); - enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data; - int ret; - unsigned long tmp; - - ret = regulator_enable(adc->vdd); - if (ret) - return ret; - clk_enable(adc->clk); - enable_irq(adc->irq); - - tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; - - /* Enable 12-bit ADC resolution */ - if (cpu == TYPE_ADCV12) - tmp |= S3C2416_ADCCON_RESSEL; - if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) - tmp |= S3C64XX_ADCCON_RESSEL; - - writel(tmp, adc->regs + S3C2410_ADCCON); - - return 0; -} - -#else -#define s3c_adc_suspend NULL -#define s3c_adc_resume NULL -#endif - -static const struct platform_device_id s3c_adc_driver_ids[] = { - { - .name = "s3c24xx-adc", - .driver_data = TYPE_ADCV1, - }, { - .name = "s3c2443-adc", - .driver_data = TYPE_ADCV11, - }, { - .name = "s3c2416-adc", - .driver_data = TYPE_ADCV12, - }, { - .name = "s3c64xx-adc", - .driver_data = TYPE_ADCV2, - }, { - .name = "samsung-adc-v3", - .driver_data = TYPE_ADCV3, - }, - { } -}; -MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids); - -static const struct dev_pm_ops adc_pm_ops = { - .suspend = s3c_adc_suspend, - .resume = s3c_adc_resume, -}; - -static struct platform_driver s3c_adc_driver = { - .id_table = s3c_adc_driver_ids, - .driver = { - .name = "s3c-adc", - .pm = &adc_pm_ops, - }, - .probe = s3c_adc_probe, - .remove = s3c_adc_remove, -}; - -static int __init adc_init(void) -{ - int ret; - - ret = platform_driver_register(&s3c_adc_driver); - if (ret) - printk(KERN_ERR "%s: failed to add adc driver\n", __func__); - - return ret; -} - -module_init(adc_init); diff --git a/arch/arm/mach-s3c/anubis.h b/arch/arm/mach-s3c/anubis.h deleted file mode 100644 index 13847292e6c7..000000000000 --- a/arch/arm/mach-s3c/anubis.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks <ben@simtec.co.uk> - * - * ANUBIS - CPLD control constants - * ANUBIS - IRQ Number definitions - * ANUBIS - Memory map definitions - */ - -#ifndef __MACH_S3C24XX_ANUBIS_H -#define __MACH_S3C24XX_ANUBIS_H __FILE__ - -/* CTRL2 - NAND WP control, IDE Reset assert/check */ - -#define ANUBIS_CTRL1_NANDSEL (0x3) - -/* IDREG - revision */ - -#define ANUBIS_IDREG_REVMASK (0x7) - -/* irq */ - -#define ANUBIS_IRQ_IDE0 IRQ_EINT2 -#define ANUBIS_IRQ_IDE1 IRQ_EINT3 -#define ANUBIS_IRQ_ASIX IRQ_EINT1 - -/* map */ - -/* start peripherals off after the S3C2410 */ - -#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000)) - -#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) -#define ANUBIS_PA_CTRL1 ANUBIS_PA_CPLD - -#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) -#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3 << 23)) - -#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) -#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) -#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000) -#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000) - -#endif /* __MACH_S3C24XX_ANUBIS_H */ diff --git a/arch/arm/mach-s3c/ata-core-s3c64xx.h b/arch/arm/mach-s3c/ata-core-s3c64xx.h deleted file mode 100644 index 4863ad9d3a42..000000000000 --- a/arch/arm/mach-s3c/ata-core-s3c64xx.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Samsung CF-ATA Controller core functions - */ - -#ifndef __ASM_PLAT_ATA_CORE_S3C64XX_H -#define __ASM_PLAT_ATA_CORE_S3C64XX_H __FILE__ - -/* These functions are only for use with the core support code, such as - * the cpu specific initialisation code -*/ - -/* re-define device name depending on support. */ -static inline void s3c_cfcon_setname(char *name) -{ -#ifdef CONFIG_SAMSUNG_DEV_IDE - s3c_device_cfcon.name = name; -#endif -} - -#endif /* __ASM_PLAT_ATA_CORE_S3C64XX_H */ diff --git a/arch/arm/mach-s3c/backlight-s3c64xx.h b/arch/arm/mach-s3c/backlight-s3c64xx.h deleted file mode 100644 index 2a2b35821d58..000000000000 --- a/arch/arm/mach-s3c/backlight-s3c64xx.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - */ - -#ifndef __ASM_PLAT_BACKLIGHT_S3C64XX_H -#define __ASM_PLAT_BACKLIGHT_S3C64XX_H __FILE__ - -/* samsung_bl_gpio_info - GPIO info for PWM Backlight control - * @no: GPIO number for PWM timer out - * @func: Special function of GPIO line for PWM timer - */ -struct samsung_bl_gpio_info { - int no; - int func; -}; - -extern void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info, - struct platform_pwm_backlight_data *bl_data); - -#endif /* __ASM_PLAT_BACKLIGHT_S3C64XX_H */ diff --git a/arch/arm/mach-s3c/bast-ide.c b/arch/arm/mach-s3c/bast-ide.c deleted file mode 100644 index 67f0adc1fec0..000000000000 --- a/arch/arm/mach-s3c/bast-ide.c +++ /dev/null @@ -1,82 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2007 Simtec Electronics -// http://www.simtec.co.uk/products/EB2410ITX/ -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/interrupt.h> - -#include <linux/platform_device.h> -#include <linux/ata_platform.h> - -#include <asm/mach-types.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "map.h" -#include "irqs.h" - -#include "bast.h" - -/* IDE ports */ - -static struct pata_platform_info bast_ide_platdata = { - .ioport_shift = 5, -}; - -static struct resource bast_ide0_resource[] = { - [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRI, 8 * 0x20), - [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20), - [2] = DEFINE_RES_IRQ(BAST_IRQ_IDE0), -}; - -static struct platform_device bast_device_ide0 = { - .name = "pata_platform", - .id = 0, - .num_resources = ARRAY_SIZE(bast_ide0_resource), - .resource = bast_ide0_resource, - .dev = { - .platform_data = &bast_ide_platdata, - .coherent_dma_mask = ~0, - } - -}; - -static struct resource bast_ide1_resource[] = { - [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESEC, 8 * 0x20), - [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20), - [2] = DEFINE_RES_IRQ(BAST_IRQ_IDE1), -}; - -static struct platform_device bast_device_ide1 = { - .name = "pata_platform", - .id = 1, - .num_resources = ARRAY_SIZE(bast_ide1_resource), - .resource = bast_ide1_resource, - .dev = { - .platform_data = &bast_ide_platdata, - .coherent_dma_mask = ~0, - } -}; - -static struct platform_device *bast_ide_devices[] __initdata = { - &bast_device_ide0, - &bast_device_ide1, -}; - -static __init int bast_ide_init(void) -{ - if (machine_is_bast() || machine_is_vr1000()) - return platform_add_devices(bast_ide_devices, - ARRAY_SIZE(bast_ide_devices)); - - return 0; -} - -fs_initcall(bast_ide_init); diff --git a/arch/arm/mach-s3c/bast-irq.c b/arch/arm/mach-s3c/bast-irq.c deleted file mode 100644 index cfc2ddc65513..000000000000 --- a/arch/arm/mach-s3c/bast-irq.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright 2003-2005 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://www.simtec.co.uk/products/EB2410ITX/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/ioport.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/mach/irq.h> - -#include "regs-irq.h" -#include "irqs.h" - -#include "bast.h" - -#define irqdbf(x...) -#define irqdbf2(x...) - -/* handle PC104 ISA interrupts from the system CPLD */ - -/* table of ISA irq nos to the relevant mask... zero means - * the irq is not implemented -*/ -static const unsigned char bast_pc104_irqmasks[] = { - 0, /* 0 */ - 0, /* 1 */ - 0, /* 2 */ - 1, /* 3 */ - 0, /* 4 */ - 2, /* 5 */ - 0, /* 6 */ - 4, /* 7 */ - 0, /* 8 */ - 0, /* 9 */ - 8, /* 10 */ - 0, /* 11 */ - 0, /* 12 */ - 0, /* 13 */ - 0, /* 14 */ - 0, /* 15 */ -}; - -static const unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 }; - -static void -bast_pc104_mask(struct irq_data *data) -{ - unsigned long temp; - - temp = __raw_readb(BAST_VA_PC104_IRQMASK); - temp &= ~bast_pc104_irqmasks[data->irq]; - __raw_writeb(temp, BAST_VA_PC104_IRQMASK); -} - -static void -bast_pc104_maskack(struct irq_data *data) -{ - struct irq_desc *desc = irq_to_desc(BAST_IRQ_ISA); - - bast_pc104_mask(data); - desc->irq_data.chip->irq_ack(&desc->irq_data); -} - -static void -bast_pc104_unmask(struct irq_data *data) -{ - unsigned long temp; - - temp = __raw_readb(BAST_VA_PC104_IRQMASK); - temp |= bast_pc104_irqmasks[data->irq]; - __raw_writeb(temp, BAST_VA_PC104_IRQMASK); -} - -static struct irq_chip bast_pc104_chip = { - .irq_mask = bast_pc104_mask, - .irq_unmask = bast_pc104_unmask, - .irq_ack = bast_pc104_maskack -}; - -static void bast_irq_pc104_demux(struct irq_desc *desc) -{ - unsigned int stat; - unsigned int irqno; - int i; - - stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf; - - if (unlikely(stat == 0)) { - /* ack if we get an irq with nothing (ie, startup) */ - desc->irq_data.chip->irq_ack(&desc->irq_data); - } else { - /* handle the IRQ */ - - for (i = 0; stat != 0; i++, stat >>= 1) { - if (stat & 1) { - irqno = bast_pc104_irqs[i]; - generic_handle_irq(irqno); - } - } - } -} - -static __init int bast_irq_init(void) -{ - unsigned int i; - - if (machine_is_bast()) { - printk(KERN_INFO "BAST PC104 IRQ routing, Copyright 2005 Simtec Electronics\n"); - - /* zap all the IRQs */ - - __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); - - irq_set_chained_handler(BAST_IRQ_ISA, bast_irq_pc104_demux); - - /* register our IRQs */ - - for (i = 0; i < 4; i++) { - unsigned int irqno = bast_pc104_irqs[i]; - - irq_set_chip_and_handler(irqno, &bast_pc104_chip, - handle_level_irq); - irq_clear_status_flags(irqno, IRQ_NOREQUEST); - } - } - - return 0; -} - -arch_initcall(bast_irq_init); diff --git a/arch/arm/mach-s3c/bast.h b/arch/arm/mach-s3c/bast.h deleted file mode 100644 index a7726f93f5eb..000000000000 --- a/arch/arm/mach-s3c/bast.h +++ /dev/null @@ -1,194 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003-2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * BAST - CPLD control constants - * BAST - IRQ Number definitions - * BAST - Memory map definitions - */ - -#ifndef __MACH_S3C24XX_BAST_H -#define __MACH_S3C24XX_BAST_H __FILE__ - -/* CTRL1 - Audio LR routing */ - -#define BAST_CPLD_CTRL1_LRCOFF (0x00) -#define BAST_CPLD_CTRL1_LRCADC (0x01) -#define BAST_CPLD_CTRL1_LRCDAC (0x02) -#define BAST_CPLD_CTRL1_LRCARM (0x03) -#define BAST_CPLD_CTRL1_LRMASK (0x03) - -/* CTRL2 - NAND WP control, IDE Reset assert/check */ - -#define BAST_CPLD_CTRL2_WNAND (0x04) -#define BAST_CPLD_CTLR2_IDERST (0x08) - -/* CTRL3 - rom write control, CPLD identity */ - -#define BAST_CPLD_CTRL3_IDMASK (0x0e) -#define BAST_CPLD_CTRL3_ROMWEN (0x01) - -/* CTRL4 - 8bit LCD interface control/status */ - -#define BAST_CPLD_CTRL4_LLAT (0x01) -#define BAST_CPLD_CTRL4_LCDRW (0x02) -#define BAST_CPLD_CTRL4_LCDCMD (0x04) -#define BAST_CPLD_CTRL4_LCDE2 (0x01) - -/* CTRL5 - DMA routing */ - -#define BAST_CPLD_DMA0_PRIIDE (0) -#define BAST_CPLD_DMA0_SECIDE (1) -#define BAST_CPLD_DMA0_ISA15 (2) -#define BAST_CPLD_DMA0_ISA36 (3) - -#define BAST_CPLD_DMA1_PRIIDE (0 << 2) -#define BAST_CPLD_DMA1_SECIDE (1 << 2) -#define BAST_CPLD_DMA1_ISA15 (2 << 2) -#define BAST_CPLD_DMA1_ISA36 (3 << 2) - -/* irq numbers to onboard peripherals */ - -#define BAST_IRQ_USBOC IRQ_EINT18 -#define BAST_IRQ_IDE0 IRQ_EINT16 -#define BAST_IRQ_IDE1 IRQ_EINT17 -#define BAST_IRQ_PCSERIAL1 IRQ_EINT15 -#define BAST_IRQ_PCSERIAL2 IRQ_EINT14 -#define BAST_IRQ_PCPARALLEL IRQ_EINT13 -#define BAST_IRQ_ASIX IRQ_EINT11 -#define BAST_IRQ_DM9000 IRQ_EINT10 -#define BAST_IRQ_ISA IRQ_EINT9 -#define BAST_IRQ_SMALERT IRQ_EINT8 - -/* map */ - -/* - * ok, we've used up to 0x13000000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. We also have the board's CPLD to find register space - * for. - */ - -#define BAST_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define BAST_VA_CTRL1 BAST_IOADDR(0x00000000) -#define BAST_PA_CTRL1 (S3C2410_CS5 | 0x7800000) - -#define BAST_VA_CTRL2 BAST_IOADDR(0x00100000) -#define BAST_PA_CTRL2 (S3C2410_CS1 | 0x6000000) - -#define BAST_VA_CTRL3 BAST_IOADDR(0x00200000) -#define BAST_PA_CTRL3 (S3C2410_CS1 | 0x6800000) - -#define BAST_VA_CTRL4 BAST_IOADDR(0x00300000) -#define BAST_PA_CTRL4 (S3C2410_CS1 | 0x7000000) - -/* next, we have the PC104 ISA interrupt registers */ - -#define BAST_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) -#define BAST_VA_PC104_IRQREQ BAST_IOADDR(0x00400000) - -#define BAST_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) -#define BAST_VA_PC104_IRQRAW BAST_IOADDR(0x00500000) - -#define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) -#define BAST_VA_PC104_IRQMASK BAST_IOADDR(0x00600000) - -#define BAST_PA_LCD_RCMD1 (0x8800000) -#define BAST_VA_LCD_RCMD1 BAST_IOADDR(0x00700000) - -#define BAST_PA_LCD_WCMD1 (0x8000000) -#define BAST_VA_LCD_WCMD1 BAST_IOADDR(0x00800000) - -#define BAST_PA_LCD_RDATA1 (0x9800000) -#define BAST_VA_LCD_RDATA1 BAST_IOADDR(0x00900000) - -#define BAST_PA_LCD_WDATA1 (0x9000000) -#define BAST_VA_LCD_WDATA1 BAST_IOADDR(0x00A00000) - -#define BAST_PA_LCD_RCMD2 (0xA800000) -#define BAST_VA_LCD_RCMD2 BAST_IOADDR(0x00B00000) - -#define BAST_PA_LCD_WCMD2 (0xA000000) -#define BAST_VA_LCD_WCMD2 BAST_IOADDR(0x00C00000) - -#define BAST_PA_LCD_RDATA2 (0xB800000) -#define BAST_VA_LCD_RDATA2 BAST_IOADDR(0x00D00000) - -#define BAST_PA_LCD_WDATA2 (0xB000000) -#define BAST_VA_LCD_WDATA2 BAST_IOADDR(0x00E00000) - - -/* - * 0xE0000000 contains the IO space that is split by speed and - * whether the access is for 8 or 16bit IO... this ensures that - * the correct access is made - * - * 0x10000000 of space, partitioned as so: - * - * 0x00000000 to 0x04000000 8bit, slow - * 0x04000000 to 0x08000000 16bit, slow - * 0x08000000 to 0x0C000000 16bit, net - * 0x0C000000 to 0x10000000 16bit, fast - * - * each of these spaces has the following in: - * - * 0x00000000 to 0x01000000 16MB ISA IO space - * 0x01000000 to 0x02000000 16MB ISA memory space - * 0x02000000 to 0x02100000 1MB IDE primary channel - * 0x02100000 to 0x02200000 1MB IDE primary channel aux - * 0x02200000 to 0x02400000 1MB IDE secondary channel - * 0x02300000 to 0x02400000 1MB IDE secondary channel aux - * 0x02400000 to 0x02500000 1MB ASIX ethernet controller - * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controller - * 0x02600000 to 0x02700000 1MB PC SuperIO controller - * - * the phyiscal layout of the zones are: - * nGCS2 - 8bit, slow - * nGCS3 - 16bit, slow - * nGCS4 - 16bit, net - * nGCS5 - 16bit, fast - */ - -#define BAST_VA_MULTISPACE (0xE0000000) - -#define BAST_VA_ISAIO (BAST_VA_MULTISPACE + 0x00000000) -#define BAST_VA_ISAMEM (BAST_VA_MULTISPACE + 0x01000000) -#define BAST_VA_IDEPRI (BAST_VA_MULTISPACE + 0x02000000) -#define BAST_VA_IDEPRIAUX (BAST_VA_MULTISPACE + 0x02100000) -#define BAST_VA_IDESEC (BAST_VA_MULTISPACE + 0x02200000) -#define BAST_VA_IDESECAUX (BAST_VA_MULTISPACE + 0x02300000) -#define BAST_VA_ASIXNET (BAST_VA_MULTISPACE + 0x02400000) -#define BAST_VA_DM9000 (BAST_VA_MULTISPACE + 0x02500000) -#define BAST_VA_SUPERIO (BAST_VA_MULTISPACE + 0x02600000) - -#define BAST_VAM_CS2 (0x00000000) -#define BAST_VAM_CS3 (0x04000000) -#define BAST_VAM_CS4 (0x08000000) -#define BAST_VAM_CS5 (0x0C000000) - -/* physical offset addresses for the peripherals */ - -#define BAST_PA_ISAIO (0x00000000) -#define BAST_PA_ASIXNET (0x01000000) -#define BAST_PA_SUPERIO (0x01800000) -#define BAST_PA_IDEPRI (0x02000000) -#define BAST_PA_IDEPRIAUX (0x02800000) -#define BAST_PA_IDESEC (0x03000000) -#define BAST_PA_IDESECAUX (0x03800000) -#define BAST_PA_ISAMEM (0x04000000) -#define BAST_PA_DM9000 (0x05000000) - -/* some configurations for the peripherals */ - -#define BAST_PCSIO (BAST_VA_SUPERIO + BAST_VAM_CS2) - -#define BAST_ASIXNET_CS BAST_VAM_CS5 -#define BAST_DM9000_CS BAST_VAM_CS4 - -#define BAST_IDE_CS S3C2410_CS5 - -#endif /* __MACH_S3C24XX_BAST_H */ diff --git a/arch/arm/mach-s3c/common-smdk-s3c24xx.c b/arch/arm/mach-s3c/common-smdk-s3c24xx.c deleted file mode 100644 index 6d124bbd384c..000000000000 --- a/arch/arm/mach-s3c/common-smdk-s3c24xx.c +++ /dev/null @@ -1,228 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Common code for SMDK2410 and SMDK2440 boards -// -// http://www.fluff.org/ben/smdk2440/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/device.h> -#include <linux/platform_device.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/mach-types.h> -#include <asm/irq.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include <linux/platform_data/leds-s3c24xx.h> -#include <linux/platform_data/mtd-nand-s3c2410.h> - -#include "gpio-cfg.h" -#include "devs.h" -#include "pm.h" - -#include "common-smdk-s3c24xx.h" - -/* LED devices */ - -static struct gpiod_lookup_table smdk_led4_gpio_table = { - .dev_id = "s3c24xx_led.0", - .table = { - GPIO_LOOKUP("GPF", 4, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct gpiod_lookup_table smdk_led5_gpio_table = { - .dev_id = "s3c24xx_led.1", - .table = { - GPIO_LOOKUP("GPF", 5, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct gpiod_lookup_table smdk_led6_gpio_table = { - .dev_id = "s3c24xx_led.2", - .table = { - GPIO_LOOKUP("GPF", 6, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct gpiod_lookup_table smdk_led7_gpio_table = { - .dev_id = "s3c24xx_led.3", - .table = { - GPIO_LOOKUP("GPF", 7, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct s3c24xx_led_platdata smdk_pdata_led4 = { - .name = "led4", - .def_trigger = "timer", -}; - -static struct s3c24xx_led_platdata smdk_pdata_led5 = { - .name = "led5", - .def_trigger = "nand-disk", -}; - -static struct s3c24xx_led_platdata smdk_pdata_led6 = { - .name = "led6", -}; - -static struct s3c24xx_led_platdata smdk_pdata_led7 = { - .name = "led7", -}; - -static struct platform_device smdk_led4 = { - .name = "s3c24xx_led", - .id = 0, - .dev = { - .platform_data = &smdk_pdata_led4, - }, -}; - -static struct platform_device smdk_led5 = { - .name = "s3c24xx_led", - .id = 1, - .dev = { - .platform_data = &smdk_pdata_led5, - }, -}; - -static struct platform_device smdk_led6 = { - .name = "s3c24xx_led", - .id = 2, - .dev = { - .platform_data = &smdk_pdata_led6, - }, -}; - -static struct platform_device smdk_led7 = { - .name = "s3c24xx_led", - .id = 3, - .dev = { - .platform_data = &smdk_pdata_led7, - }, -}; - -/* NAND parititon from 2.4.18-swl5 */ - -static struct mtd_partition smdk_default_nand_part[] = { - [0] = { - .name = "Boot Agent", - .size = SZ_16K, - .offset = 0, - }, - [1] = { - .name = "S3C2410 flash partition 1", - .offset = 0, - .size = SZ_2M, - }, - [2] = { - .name = "S3C2410 flash partition 2", - .offset = SZ_4M, - .size = SZ_4M, - }, - [3] = { - .name = "S3C2410 flash partition 3", - .offset = SZ_8M, - .size = SZ_2M, - }, - [4] = { - .name = "S3C2410 flash partition 4", - .offset = SZ_1M * 10, - .size = SZ_4M, - }, - [5] = { - .name = "S3C2410 flash partition 5", - .offset = SZ_1M * 14, - .size = SZ_1M * 10, - }, - [6] = { - .name = "S3C2410 flash partition 6", - .offset = SZ_1M * 24, - .size = SZ_1M * 24, - }, - [7] = { - .name = "S3C2410 flash partition 7", - .offset = SZ_1M * 48, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct s3c2410_nand_set smdk_nand_sets[] = { - [0] = { - .name = "NAND", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(smdk_default_nand_part), - .partitions = smdk_default_nand_part, - }, -}; - -/* choose a set of timings which should suit most 512Mbit - * chips and beyond. -*/ - -static struct s3c2410_platform_nand smdk_nand_info = { - .tacls = 20, - .twrph0 = 60, - .twrph1 = 20, - .nr_sets = ARRAY_SIZE(smdk_nand_sets), - .sets = smdk_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -/* devices we initialise */ - -static struct platform_device __initdata *smdk_devs[] = { - &s3c_device_nand, - &smdk_led4, - &smdk_led5, - &smdk_led6, - &smdk_led7, -}; - -void __init smdk_machine_init(void) -{ - if (machine_is_smdk2443()) - smdk_nand_info.twrph0 = 50; - - s3c_nand_set_platdata(&smdk_nand_info); - - /* Disable pull-up on the LED lines */ - s3c_gpio_setpull(S3C2410_GPF(4), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPF(5), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPF(6), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPF(7), S3C_GPIO_PULL_NONE); - - /* Add lookups for the lines */ - gpiod_add_lookup_table(&smdk_led4_gpio_table); - gpiod_add_lookup_table(&smdk_led5_gpio_table); - gpiod_add_lookup_table(&smdk_led6_gpio_table); - gpiod_add_lookup_table(&smdk_led7_gpio_table); - - platform_add_devices(smdk_devs, ARRAY_SIZE(smdk_devs)); - - s3c_pm_init(); -} diff --git a/arch/arm/mach-s3c/common-smdk-s3c24xx.h b/arch/arm/mach-s3c/common-smdk-s3c24xx.h deleted file mode 100644 index c0352b06e435..000000000000 --- a/arch/arm/mach-s3c/common-smdk-s3c24xx.h +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Common code for SMDK2410 and SMDK2440 boards - * - * http://www.fluff.org/ben/smdk2440/ - */ - -extern void smdk_machine_init(void); diff --git a/arch/arm/mach-s3c/cpu.h b/arch/arm/mach-s3c/cpu.h index 20ff98d05c53..d0adc9b40e25 100644 --- a/arch/arm/mach-s3c/cpu.h +++ b/arch/arm/mach-s3c/cpu.h @@ -16,15 +16,6 @@ extern unsigned long samsung_cpu_id; -#define S3C2410_CPU_ID 0x32410000 -#define S3C2410_CPU_MASK 0xFFFFFFFF - -#define S3C24XX_CPU_ID 0x32400000 -#define S3C24XX_CPU_MASK 0xFFF00000 - -#define S3C2412_CPU_ID 0x32412000 -#define S3C2412_CPU_MASK 0xFFFFF000 - #define S3C6400_CPU_ID 0x36400000 #define S3C6410_CPU_ID 0x36410000 #define S3C64XX_CPU_MASK 0xFFFFF000 @@ -38,29 +29,9 @@ static inline int is_samsung_##name(void) \ return ((samsung_cpu_id & mask) == (id & mask)); \ } -IS_SAMSUNG_CPU(s3c2410, S3C2410_CPU_ID, S3C2410_CPU_MASK) -IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) -IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK) IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) -#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ - defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ - defined(CONFIG_CPU_S3C2442) || defined(CONFIG_CPU_S3C244X) || \ - defined(CONFIG_CPU_S3C2443) -# define soc_is_s3c24xx() is_samsung_s3c24xx() -# define soc_is_s3c2410() is_samsung_s3c2410() -#else -# define soc_is_s3c24xx() 0 -# define soc_is_s3c2410() 0 -#endif - -#if defined(CONFIG_CPU_S3C2412) -# define soc_is_s3c2412() is_samsung_s3c2412() -#else -# define soc_is_s3c2412() 0 -#endif - #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) # define soc_is_s3c6400() is_samsung_s3c6400() # define soc_is_s3c6410() is_samsung_s3c6410() @@ -71,12 +42,6 @@ IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) # define soc_is_s3c64xx() 0 #endif -#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } - -#ifndef KHZ -#define KHZ (1000) -#endif - #ifndef MHZ #define MHZ (1000*1000) #endif @@ -96,7 +61,6 @@ struct cpu_table { unsigned long idmask; void (*map_io)(void); void (*init_uarts)(struct s3c2410_uartcfg *cfg, int no); - void (*init_clocks)(int xtal); int (*init)(void); const char *name; }; @@ -105,24 +69,13 @@ extern void s3c_init_cpu(unsigned long idcode, struct cpu_table *cpus, unsigned int cputab_size); /* core initialisation functions */ - -extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); - extern void s3c64xx_init_cpu(void); extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); - -extern void s3c24xx_init_clocks(int xtal); - extern void s3c24xx_init_uartdevs(char *name, struct s3c24xx_uart_resources *res, struct s3c2410_uartcfg *cfg, int no); -extern struct syscore_ops s3c2410_pm_syscore_ops; -extern struct syscore_ops s3c2412_pm_syscore_ops; -extern struct syscore_ops s3c2416_pm_syscore_ops; -extern struct syscore_ops s3c244x_pm_syscore_ops; - extern struct bus_type s3c6410_subsys; #endif diff --git a/arch/arm/mach-s3c/cpufreq-utils-s3c24xx.c b/arch/arm/mach-s3c/cpufreq-utils-s3c24xx.c deleted file mode 100644 index c1784d8facdf..000000000000 --- a/arch/arm/mach-s3c/cpufreq-utils-s3c24xx.c +++ /dev/null @@ -1,94 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2009 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// -// S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442 - -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/cpufreq.h> -#include <linux/io.h> -#include <linux/clk.h> - -#include "map.h" -#include "regs-clock.h" - -#include <linux/soc/samsung/s3c-cpufreq-core.h> - -#include "regs-mem-s3c24xx.h" - -/** - * s3c2410_cpufreq_setrefresh - set SDRAM refresh value - * @cfg: The frequency configuration - * - * Set the SDRAM refresh value appropriately for the configured - * frequency. - */ -void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) -{ - struct s3c_cpufreq_board *board = cfg->board; - unsigned long refresh; - unsigned long refval; - - /* Reduce both the refresh time (in ns) and the frequency (in MHz) - * down to ensure that we do not overflow 32 bit numbers. - * - * This should work for HCLK up to 133MHz and refresh period up - * to 30usec. - */ - - refresh = (cfg->freq.hclk / 100) * (board->refresh / 10); - refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */ - refresh = (1 << 11) + 1 - refresh; - - s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh); - - refval = __raw_readl(S3C2410_REFRESH); - refval &= ~((1 << 12) - 1); - refval |= refresh; - __raw_writel(refval, S3C2410_REFRESH); -} - -/** - * s3c2410_set_fvco - set the PLL value - * @cfg: The frequency configuration - */ -void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg) -{ - if (!IS_ERR(cfg->mpll)) - clk_set_rate(cfg->mpll, cfg->pll.frequency); -} - -#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) -u32 s3c2440_read_camdivn(void) -{ - return __raw_readl(S3C2440_CAMDIVN); -} - -void s3c2440_write_camdivn(u32 camdiv) -{ - __raw_writel(camdiv, S3C2440_CAMDIVN); -} -#endif - -u32 s3c24xx_read_clkdivn(void) -{ - return __raw_readl(S3C2410_CLKDIVN); -} - -void s3c24xx_write_clkdivn(u32 clkdiv) -{ - __raw_writel(clkdiv, S3C2410_CLKDIVN); -} - -u32 s3c24xx_read_mpllcon(void) -{ - return __raw_readl(S3C2410_MPLLCON); -} - -void s3c24xx_write_locktime(u32 locktime) -{ - return __raw_writel(locktime, S3C2410_LOCKTIME); -} diff --git a/arch/arm/mach-s3c/dev-audio-s3c64xx.c b/arch/arm/mach-s3c/dev-audio-s3c64xx.c index 909e82c148ba..7ce119dc3a72 100644 --- a/arch/arm/mach-s3c/dev-audio-s3c64xx.c +++ b/arch/arm/mach-s3c/dev-audio-s3c64xx.c @@ -83,130 +83,3 @@ struct platform_device s3c64xx_device_iis1 = { }, }; EXPORT_SYMBOL(s3c64xx_device_iis1); - -static struct resource s3c64xx_iisv4_resource[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_IISV4, SZ_256), -}; - -static struct s3c_audio_pdata i2sv4_pdata = { - .cfg_gpio = s3c64xx_i2s_cfg_gpio, - .type = { - .quirks = QUIRK_PRI_6CHAN, - }, -}; - -struct platform_device s3c64xx_device_iisv4 = { - .name = "samsung-i2s", - .id = 2, - .num_resources = ARRAY_SIZE(s3c64xx_iisv4_resource), - .resource = s3c64xx_iisv4_resource, - .dev = { - .platform_data = &i2sv4_pdata, - }, -}; -EXPORT_SYMBOL(s3c64xx_device_iisv4); - - -/* PCM Controller platform_devices */ - -static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) -{ - unsigned int base; - - switch (pdev->id) { - case 0: - base = S3C64XX_GPD(0); - break; - case 1: - base = S3C64XX_GPE(0); - break; - default: - printk(KERN_DEBUG "Invalid PCM Controller number: %d\n", - pdev->id); - return -EINVAL; - } - - s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); - return 0; -} - -static struct resource s3c64xx_pcm0_resource[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM0, SZ_256), -}; - -static struct s3c_audio_pdata s3c_pcm0_pdata = { - .cfg_gpio = s3c64xx_pcm_cfg_gpio, -}; - -struct platform_device s3c64xx_device_pcm0 = { - .name = "samsung-pcm", - .id = 0, - .num_resources = ARRAY_SIZE(s3c64xx_pcm0_resource), - .resource = s3c64xx_pcm0_resource, - .dev = { - .platform_data = &s3c_pcm0_pdata, - }, -}; -EXPORT_SYMBOL(s3c64xx_device_pcm0); - -static struct resource s3c64xx_pcm1_resource[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM1, SZ_256), -}; - -static struct s3c_audio_pdata s3c_pcm1_pdata = { - .cfg_gpio = s3c64xx_pcm_cfg_gpio, -}; - -struct platform_device s3c64xx_device_pcm1 = { - .name = "samsung-pcm", - .id = 1, - .num_resources = ARRAY_SIZE(s3c64xx_pcm1_resource), - .resource = s3c64xx_pcm1_resource, - .dev = { - .platform_data = &s3c_pcm1_pdata, - }, -}; -EXPORT_SYMBOL(s3c64xx_device_pcm1); - -/* AC97 Controller platform devices */ - -static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) -{ - return s3c_gpio_cfgpin_range(S3C64XX_GPD(0), 5, S3C_GPIO_SFN(4)); -} - -static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) -{ - return s3c_gpio_cfgpin_range(S3C64XX_GPE(0), 5, S3C_GPIO_SFN(4)); -} - -static struct resource s3c64xx_ac97_resource[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_AC97, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_AC97), -}; - -static struct s3c_audio_pdata s3c_ac97_pdata = { -}; - -static u64 s3c64xx_ac97_dmamask = DMA_BIT_MASK(32); - -struct platform_device s3c64xx_device_ac97 = { - .name = "samsung-ac97", - .id = -1, - .num_resources = ARRAY_SIZE(s3c64xx_ac97_resource), - .resource = s3c64xx_ac97_resource, - .dev = { - .platform_data = &s3c_ac97_pdata, - .dma_mask = &s3c64xx_ac97_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; -EXPORT_SYMBOL(s3c64xx_device_ac97); - -void __init s3c64xx_ac97_setup_gpio(int num) -{ - if (num == S3C64XX_AC97_GPD) - s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpd; - else - s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpe; -} diff --git a/arch/arm/mach-s3c/dev-backlight-s3c64xx.c b/arch/arm/mach-s3c/dev-backlight-s3c64xx.c deleted file mode 100644 index 65488b61e50c..000000000000 --- a/arch/arm/mach-s3c/dev-backlight-s3c64xx.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2011 Samsung Electronics Co., Ltd. -// http://www.samsung.com -// -// Common infrastructure for PWM Backlight for Samsung boards - -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/slab.h> -#include <linux/io.h> -#include <linux/pwm_backlight.h> - -#include "devs.h" -#include "gpio-cfg.h" - -#include "backlight-s3c64xx.h" - -struct samsung_bl_drvdata { - struct platform_pwm_backlight_data plat_data; - struct samsung_bl_gpio_info *gpio_info; -}; - -static int samsung_bl_init(struct device *dev) -{ - int ret = 0; - struct platform_pwm_backlight_data *pdata = dev->platform_data; - struct samsung_bl_drvdata *drvdata = container_of(pdata, - struct samsung_bl_drvdata, plat_data); - struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info; - - ret = gpio_request(bl_gpio_info->no, "Backlight"); - if (ret) { - printk(KERN_ERR "failed to request GPIO for LCD Backlight\n"); - return ret; - } - - /* Configure GPIO pin with specific GPIO function for PWM timer */ - s3c_gpio_cfgpin(bl_gpio_info->no, bl_gpio_info->func); - - return 0; -} - -static void samsung_bl_exit(struct device *dev) -{ - struct platform_pwm_backlight_data *pdata = dev->platform_data; - struct samsung_bl_drvdata *drvdata = container_of(pdata, - struct samsung_bl_drvdata, plat_data); - struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info; - - s3c_gpio_cfgpin(bl_gpio_info->no, S3C_GPIO_OUTPUT); - gpio_free(bl_gpio_info->no); -} - -/* Initialize few important fields of platform_pwm_backlight_data - * structure with default values. These fields can be overridden by - * board-specific values sent from machine file. - * For ease of operation, these fields are initialized with values - * used by most samsung boards. - * Users has the option of sending info about other parameters - * for their specific boards - */ - -static struct samsung_bl_drvdata samsung_dfl_bl_data __initdata = { - .plat_data = { - .max_brightness = 255, - .dft_brightness = 255, - .init = samsung_bl_init, - .exit = samsung_bl_exit, - }, -}; - -static struct platform_device samsung_dfl_bl_device __initdata = { - .name = "pwm-backlight", -}; - -/* samsung_bl_set - Set board specific data (if any) provided by user for - * PWM Backlight control and register specific PWM and backlight device. - * @gpio_info: structure containing GPIO info for PWM timer - * @bl_data: structure containing Backlight control data - */ -void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info, - struct platform_pwm_backlight_data *bl_data) -{ - int ret = 0; - struct platform_device *samsung_bl_device; - struct samsung_bl_drvdata *samsung_bl_drvdata; - struct platform_pwm_backlight_data *samsung_bl_data; - - samsung_bl_device = kmemdup(&samsung_dfl_bl_device, - sizeof(struct platform_device), GFP_KERNEL); - if (!samsung_bl_device) - return; - - samsung_bl_drvdata = kmemdup(&samsung_dfl_bl_data, - sizeof(samsung_dfl_bl_data), GFP_KERNEL); - if (!samsung_bl_drvdata) - goto err_data; - - samsung_bl_device->dev.platform_data = &samsung_bl_drvdata->plat_data; - samsung_bl_drvdata->gpio_info = gpio_info; - samsung_bl_data = &samsung_bl_drvdata->plat_data; - - /* Copy board specific data provided by user */ - samsung_bl_device->dev.parent = &samsung_device_pwm.dev; - - if (bl_data->max_brightness) - samsung_bl_data->max_brightness = bl_data->max_brightness; - if (bl_data->dft_brightness) - samsung_bl_data->dft_brightness = bl_data->dft_brightness; - if (bl_data->lth_brightness) - samsung_bl_data->lth_brightness = bl_data->lth_brightness; - if (bl_data->init) - samsung_bl_data->init = bl_data->init; - if (bl_data->notify) - samsung_bl_data->notify = bl_data->notify; - if (bl_data->notify_after) - samsung_bl_data->notify_after = bl_data->notify_after; - if (bl_data->exit) - samsung_bl_data->exit = bl_data->exit; - if (bl_data->check_fb) - samsung_bl_data->check_fb = bl_data->check_fb; - - /* Register the Backlight dev */ - ret = platform_device_register(samsung_bl_device); - if (ret) { - printk(KERN_ERR "failed to register backlight device: %d\n", ret); - goto err_plat_reg2; - } - - return; - -err_plat_reg2: - kfree(samsung_bl_data); -err_data: - kfree(samsung_bl_device); -} diff --git a/arch/arm/mach-s3c/devs.c b/arch/arm/mach-s3c/devs.c index 9ac07c023adf..8c26d592d2a3 100644 --- a/arch/arm/mach-s3c/devs.c +++ b/arch/arm/mach-s3c/devs.c @@ -21,17 +21,10 @@ #include <linux/dma-mapping.h> #include <linux/fb.h> #include <linux/gfp.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/onenand.h> -#include <linux/mtd/partitions.h> #include <linux/mmc/host.h> #include <linux/ioport.h> #include <linux/sizes.h> -#include <linux/platform_data/s3c-hsudc.h> #include <linux/platform_data/s3c-hsotg.h> -#include <linux/platform_data/dma-s3c24xx.h> - -#include <linux/platform_data/media/s5p_hdmi.h> #include <asm/irq.h> #include <asm/mach/arch.h> @@ -43,104 +36,19 @@ #include "gpio-samsung.h" #include "gpio-cfg.h" -#ifdef CONFIG_PLAT_S3C24XX -#include "regs-s3c2443-clock.h" -#endif /* CONFIG_PLAT_S3C24XX */ - #include "cpu.h" #include "devs.h" -#include <linux/soc/samsung/s3c-adc.h> -#include <linux/platform_data/ata-samsung_cf.h> #include "fb.h" -#include <linux/platform_data/fb-s3c2410.h> -#include <linux/platform_data/hwmon-s3c.h> #include <linux/platform_data/i2c-s3c2410.h> #include "keypad.h" -#include <linux/platform_data/mmc-s3cmci.h> -#include <linux/platform_data/mtd-nand-s3c2410.h> #include "pwm-core.h" #include "sdhci.h" -#include <linux/platform_data/touchscreen-s3c2410.h> -#include <linux/platform_data/usb-s3c2410_udc.h> -#include <linux/platform_data/usb-ohci-s3c2410.h> #include "usb-phy.h" #include <linux/platform_data/asoc-s3c.h> #include <linux/platform_data/spi-s3c64xx.h> #define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) })) -/* AC97 */ -#ifdef CONFIG_CPU_S3C2440 -static struct resource s3c_ac97_resource[] = { - [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), - [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), -}; - -struct platform_device s3c_device_ac97 = { - .name = "samsung-ac97", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_ac97_resource), - .resource = s3c_ac97_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_CPU_S3C2440 */ - -/* ADC */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_adc_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), - [1] = DEFINE_RES_IRQ(IRQ_TC), - [2] = DEFINE_RES_IRQ(IRQ_ADC), -}; - -struct platform_device s3c_device_adc = { - .name = "s3c24xx-adc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_adc_resource), - .resource = s3c_adc_resource, -}; -#endif /* CONFIG_PLAT_S3C24XX */ - -#if defined(CONFIG_SAMSUNG_DEV_ADC) -static struct resource s3c_adc_resource[] = { - [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_ADC), - [2] = DEFINE_RES_IRQ(IRQ_TC), -}; - -struct platform_device s3c_device_adc = { - .name = "exynos-adc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_adc_resource), - .resource = s3c_adc_resource, -}; -#endif /* CONFIG_SAMSUNG_DEV_ADC */ - -/* Camif Controller */ - -#ifdef CONFIG_CPU_S3C2440 -static struct resource s3c_camif_resource[] = { - [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), - [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C), - [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P), -}; - -struct platform_device s3c_device_camif = { - .name = "s3c2440-camif", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_camif_resource), - .resource = s3c_camif_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_CPU_S3C2440 */ - /* FB */ #ifdef CONFIG_S3C_DEV_FB @@ -169,22 +77,6 @@ void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) } #endif /* CONFIG_S3C_DEV_FB */ -/* HWMON */ - -#ifdef CONFIG_S3C_DEV_HWMON -struct platform_device s3c_device_hwmon = { - .name = "s3c-hwmon", - .id = -1, - .dev.parent = &s3c_device_adc.dev, -}; - -void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) -{ - s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), - &s3c_device_hwmon); -} -#endif /* CONFIG_S3C_DEV_HWMON */ - /* HSMMC */ #ifdef CONFIG_S3C_DEV_HSMMC @@ -374,220 +266,6 @@ void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) } #endif /* CONFIG_S3C_DEV_I2C1 */ -#ifdef CONFIG_S3C_DEV_I2C2 -static struct resource s3c_i2c2_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC2), -}; - -struct platform_device s3c_device_i2c2 = { - .name = "s3c2410-i2c", - .id = 2, - .num_resources = ARRAY_SIZE(s3c_i2c2_resource), - .resource = s3c_i2c2_resource, -}; - -void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 2; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c2); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c2_cfg_gpio; -} -#endif /* CONFIG_S3C_DEV_I2C2 */ - -#ifdef CONFIG_S3C_DEV_I2C3 -static struct resource s3c_i2c3_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC3), -}; - -struct platform_device s3c_device_i2c3 = { - .name = "s3c2440-i2c", - .id = 3, - .num_resources = ARRAY_SIZE(s3c_i2c3_resource), - .resource = s3c_i2c3_resource, -}; - -void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 3; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c3); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c3_cfg_gpio; -} -#endif /*CONFIG_S3C_DEV_I2C3 */ - -#ifdef CONFIG_S3C_DEV_I2C4 -static struct resource s3c_i2c4_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC4), -}; - -struct platform_device s3c_device_i2c4 = { - .name = "s3c2440-i2c", - .id = 4, - .num_resources = ARRAY_SIZE(s3c_i2c4_resource), - .resource = s3c_i2c4_resource, -}; - -void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 4; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c4); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c4_cfg_gpio; -} -#endif /*CONFIG_S3C_DEV_I2C4 */ - -#ifdef CONFIG_S3C_DEV_I2C5 -static struct resource s3c_i2c5_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC5), -}; - -struct platform_device s3c_device_i2c5 = { - .name = "s3c2440-i2c", - .id = 5, - .num_resources = ARRAY_SIZE(s3c_i2c5_resource), - .resource = s3c_i2c5_resource, -}; - -void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 5; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c5); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c5_cfg_gpio; -} -#endif /*CONFIG_S3C_DEV_I2C5 */ - -#ifdef CONFIG_S3C_DEV_I2C6 -static struct resource s3c_i2c6_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC6), -}; - -struct platform_device s3c_device_i2c6 = { - .name = "s3c2440-i2c", - .id = 6, - .num_resources = ARRAY_SIZE(s3c_i2c6_resource), - .resource = s3c_i2c6_resource, -}; - -void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 6; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c6); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c6_cfg_gpio; -} -#endif /* CONFIG_S3C_DEV_I2C6 */ - -#ifdef CONFIG_S3C_DEV_I2C7 -static struct resource s3c_i2c7_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC7), -}; - -struct platform_device s3c_device_i2c7 = { - .name = "s3c2440-i2c", - .id = 7, - .num_resources = ARRAY_SIZE(s3c_i2c7_resource), - .resource = s3c_i2c7_resource, -}; - -void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 7; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c7); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c7_cfg_gpio; -} -#endif /* CONFIG_S3C_DEV_I2C7 */ - -/* I2S */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_iis_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), -}; - -struct platform_device s3c_device_iis = { - .name = "s3c24xx-iis", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_iis_resource), - .resource = s3c_iis_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_PLAT_S3C24XX */ - -/* IDE CFCON */ - -#ifdef CONFIG_SAMSUNG_DEV_IDE -static struct resource s3c_cfcon_resource[] = { - [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), - [1] = DEFINE_RES_IRQ(IRQ_CFCON), -}; - -struct platform_device s3c_device_cfcon = { - .id = 0, - .num_resources = ARRAY_SIZE(s3c_cfcon_resource), - .resource = s3c_cfcon_resource, -}; - -void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) -{ - s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), - &s3c_device_cfcon); -} -#endif /* CONFIG_SAMSUNG_DEV_IDE */ - /* KEYPAD */ #ifdef CONFIG_SAMSUNG_DEV_KEYPAD @@ -614,175 +292,6 @@ void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) } #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */ -/* LCD Controller */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_lcd_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), - [1] = DEFINE_RES_IRQ(IRQ_LCD), -}; - -struct platform_device s3c_device_lcd = { - .name = "s3c2410-lcd", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_lcd_resource), - .resource = s3c_lcd_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) -{ - struct s3c2410fb_mach_info *npd; - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); - if (npd) { - npd->displays = kmemdup(pd->displays, - sizeof(struct s3c2410fb_display) * npd->num_displays, - GFP_KERNEL); - if (!npd->displays) - printk(KERN_ERR "no memory for LCD display data\n"); - } else { - printk(KERN_ERR "no memory for LCD platform data\n"); - } -} -#endif /* CONFIG_PLAT_S3C24XX */ - -/* NAND */ - -#ifdef CONFIG_S3C_DEV_NAND -static struct resource s3c_nand_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), -}; - -struct platform_device s3c_device_nand = { - .name = "s3c2410-nand", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_nand_resource), - .resource = s3c_nand_resource, -}; - -/* - * s3c_nand_copy_set() - copy nand set data - * @set: The new structure, directly copied from the old. - * - * Copy all the fields from the NAND set field from what is probably __initdata - * to new kernel memory. The code returns 0 if the copy happened correctly or - * an error code for the calling function to display. - * - * Note, we currently do not try and look to see if we've already copied the - * data in a previous set. - */ -static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) -{ - void *ptr; - int size; - - size = sizeof(struct mtd_partition) * set->nr_partitions; - if (size) { - ptr = kmemdup(set->partitions, size, GFP_KERNEL); - set->partitions = ptr; - - if (!ptr) - return -ENOMEM; - } - - if (set->nr_map && set->nr_chips) { - size = sizeof(int) * set->nr_chips; - ptr = kmemdup(set->nr_map, size, GFP_KERNEL); - set->nr_map = ptr; - - if (!ptr) - return -ENOMEM; - } - - return 0; -} - -void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) -{ - struct s3c2410_platform_nand *npd; - int size; - int ret; - - /* note, if we get a failure in allocation, we simply drop out of the - * function. If there is so little memory available at initialisation - * time then there is little chance the system is going to run. - */ - - npd = s3c_set_platdata(nand, sizeof(*npd), &s3c_device_nand); - if (!npd) - return; - - /* now see if we need to copy any of the nand set data */ - - size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; - if (size) { - struct s3c2410_nand_set *from = npd->sets; - struct s3c2410_nand_set *to; - int i; - - to = kmemdup(from, size, GFP_KERNEL); - npd->sets = to; /* set, even if we failed */ - - if (!to) { - printk(KERN_ERR "%s: no memory for sets\n", __func__); - return; - } - - for (i = 0; i < npd->nr_sets; i++) { - ret = s3c_nand_copy_set(to); - if (ret) { - printk(KERN_ERR "%s: failed to copy set %d\n", - __func__, i); - return; - } - to++; - } - } -} -#endif /* CONFIG_S3C_DEV_NAND */ - -/* ONENAND */ - -#ifdef CONFIG_S3C_DEV_ONENAND -static struct resource s3c_onenand_resources[] = { - [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), - [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), - [2] = DEFINE_RES_IRQ(IRQ_ONENAND), -}; - -struct platform_device s3c_device_onenand = { - .name = "samsung-onenand", - .id = 0, - .num_resources = ARRAY_SIZE(s3c_onenand_resources), - .resource = s3c_onenand_resources, -}; -#endif /* CONFIG_S3C_DEV_ONENAND */ - -#ifdef CONFIG_S3C64XX_DEV_ONENAND1 -static struct resource s3c64xx_onenand1_resources[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), - [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), - [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), -}; - -struct platform_device s3c64xx_device_onenand1 = { - .name = "samsung-onenand", - .id = 1, - .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), - .resource = s3c64xx_onenand1_resources, -}; - -void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) -{ - s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), - &s3c64xx_device_onenand1); -} -#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ - /* PWM Timer */ #ifdef CONFIG_SAMSUNG_DEV_PWM @@ -803,162 +312,6 @@ void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) } #endif /* CONFIG_SAMSUNG_DEV_PWM */ -/* RTC */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_rtc_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_RTC), - [2] = DEFINE_RES_IRQ(IRQ_TICK), -}; - -struct platform_device s3c_device_rtc = { - .name = "s3c2410-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_rtc_resource), - .resource = s3c_rtc_resource, -}; -#endif /* CONFIG_PLAT_S3C24XX */ - -#ifdef CONFIG_S3C_DEV_RTC -static struct resource s3c_rtc_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), - [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), -}; - -struct platform_device s3c_device_rtc = { - .name = "s3c64xx-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_rtc_resource), - .resource = s3c_rtc_resource, -}; -#endif /* CONFIG_S3C_DEV_RTC */ - -/* SDI */ - -#ifdef CONFIG_PLAT_S3C24XX -void s3c24xx_mci_def_set_power(unsigned char power_mode, unsigned short vdd) -{ - switch (power_mode) { - case MMC_POWER_ON: - case MMC_POWER_UP: - /* Configure GPE5...GPE10 pins in SD mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - break; - - case MMC_POWER_OFF: - default: - gpio_direction_output(S3C2410_GPE(5), 0); - break; - } -} - -static struct resource s3c_sdi_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), - [1] = DEFINE_RES_IRQ(IRQ_SDI), -}; - -static struct s3c24xx_mci_pdata s3cmci_def_pdata = { - /* This is currently here to avoid a number of if (host->pdata) - * checks. Any zero fields to ensure reasonable defaults are picked. */ - .no_wprotect = 1, - .no_detect = 1, - .set_power = s3c24xx_mci_def_set_power, -}; - -struct platform_device s3c_device_sdi = { - .name = "s3c2410-sdi", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_sdi_resource), - .resource = s3c_sdi_resource, - .dev.platform_data = &s3cmci_def_pdata, -}; - -void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) -{ - s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), - &s3c_device_sdi); -} -#endif /* CONFIG_PLAT_S3C24XX */ - -/* SPI */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_spi0_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), - [1] = DEFINE_RES_IRQ(IRQ_SPI0), -}; - -struct platform_device s3c_device_spi0 = { - .name = "s3c2410-spi", - .id = 0, - .num_resources = ARRAY_SIZE(s3c_spi0_resource), - .resource = s3c_spi0_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -static struct resource s3c_spi1_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), - [1] = DEFINE_RES_IRQ(IRQ_SPI1), -}; - -struct platform_device s3c_device_spi1 = { - .name = "s3c2410-spi", - .id = 1, - .num_resources = ARRAY_SIZE(s3c_spi1_resource), - .resource = s3c_spi1_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_PLAT_S3C24XX */ - -/* Touchscreen */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_ts_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), - [1] = DEFINE_RES_IRQ(IRQ_TC), -}; - -struct platform_device s3c_device_ts = { - .name = "s3c2410-ts", - .id = -1, - .dev.parent = &s3c_device_adc.dev, - .num_resources = ARRAY_SIZE(s3c_ts_resource), - .resource = s3c_ts_resource, -}; - -void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) -{ - s3c_set_platdata(hard_s3c2410ts_info, - sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); -} -#endif /* CONFIG_PLAT_S3C24XX */ - -#ifdef CONFIG_SAMSUNG_DEV_TS -static struct s3c2410_ts_mach_info default_ts_data __initdata = { - .delay = 10000, - .presc = 49, - .oversampling_shift = 2, -}; - -void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) -{ - if (!pd) - pd = &default_ts_data; - - s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), - &s3c_device_adc); -} -#endif /* CONFIG_SAMSUNG_DEV_TS */ - /* USB */ #ifdef CONFIG_S3C_DEV_USB_HOST @@ -977,44 +330,8 @@ struct platform_device s3c_device_ohci = { .coherent_dma_mask = DMA_BIT_MASK(32), } }; - -/* - * s3c_ohci_set_platdata - initialise OHCI device platform data - * @info: The platform data. - * - * This call copies the @info passed in and sets the device .platform_data - * field to that copy. The @info is copied so that the original can be marked - * __initdata. - */ - -void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) -{ - s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), - &s3c_device_ohci); -} #endif /* CONFIG_S3C_DEV_USB_HOST */ -/* USB Device (Gadget) */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_usbgadget_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), - [1] = DEFINE_RES_IRQ(IRQ_USBD), -}; - -struct platform_device s3c_device_usbgadget = { - .name = "s3c2410-usbgadget", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), - .resource = s3c_usbgadget_resource, -}; - -void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) -{ - s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); -} -#endif /* CONFIG_PLAT_S3C24XX */ - /* USB HSOTG */ #ifdef CONFIG_S3C_DEV_USB_HSOTG @@ -1047,49 +364,6 @@ void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd) } #endif /* CONFIG_S3C_DEV_USB_HSOTG */ -/* USB High Spped 2.0 Device (Gadget) */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_hsudc_resource[] = { - [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), - [1] = DEFINE_RES_IRQ(IRQ_USBD), -}; - -struct platform_device s3c_device_usb_hsudc = { - .name = "s3c-hsudc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_hsudc_resource), - .resource = s3c_hsudc_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) -{ - s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); - pd->phy_init = s3c_hsudc_init_phy; - pd->phy_uninit = s3c_hsudc_uninit_phy; -} -#endif /* CONFIG_PLAT_S3C24XX */ - -/* WDT */ - -#ifdef CONFIG_S3C_DEV_WDT -static struct resource s3c_wdt_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), - [1] = DEFINE_RES_IRQ(IRQ_WDT), -}; - -struct platform_device s3c_device_wdt = { - .name = "s3c2410-wdt", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_wdt_resource), - .resource = s3c_wdt_resource, -}; -#endif /* CONFIG_S3C_DEV_WDT */ - #ifdef CONFIG_S3C64XX_DEV_SPI0 static struct resource s3c64xx_spi0_resource[] = { [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), diff --git a/arch/arm/mach-s3c/devs.h b/arch/arm/mach-s3c/devs.h index 991b9b2006a1..21c00786c264 100644 --- a/arch/arm/mach-s3c/devs.h +++ b/arch/arm/mach-s3c/devs.h @@ -25,60 +25,23 @@ extern struct s3c24xx_uart_resources s3c64xx_uart_resources[]; extern struct platform_device *s3c24xx_uart_devs[]; extern struct platform_device *s3c24xx_uart_src[]; -extern struct platform_device s3c64xx_device_ac97; extern struct platform_device s3c64xx_device_iis0; extern struct platform_device s3c64xx_device_iis1; -extern struct platform_device s3c64xx_device_iisv4; -extern struct platform_device s3c64xx_device_onenand1; -extern struct platform_device s3c64xx_device_pcm0; -extern struct platform_device s3c64xx_device_pcm1; extern struct platform_device s3c64xx_device_spi0; -extern struct platform_device s3c_device_adc; -extern struct platform_device s3c_device_cfcon; extern struct platform_device s3c_device_fb; -extern struct platform_device s3c_device_hwmon; extern struct platform_device s3c_device_hsmmc0; extern struct platform_device s3c_device_hsmmc1; extern struct platform_device s3c_device_hsmmc2; extern struct platform_device s3c_device_hsmmc3; extern struct platform_device s3c_device_i2c0; extern struct platform_device s3c_device_i2c1; -extern struct platform_device s3c_device_i2c2; -extern struct platform_device s3c_device_i2c3; -extern struct platform_device s3c_device_i2c4; -extern struct platform_device s3c_device_i2c5; -extern struct platform_device s3c_device_i2c6; -extern struct platform_device s3c_device_i2c7; -extern struct platform_device s3c_device_iis; -extern struct platform_device s3c_device_lcd; -extern struct platform_device s3c_device_nand; extern struct platform_device s3c_device_ohci; -extern struct platform_device s3c_device_onenand; -extern struct platform_device s3c_device_rtc; -extern struct platform_device s3c_device_sdi; -extern struct platform_device s3c_device_spi0; -extern struct platform_device s3c_device_spi1; -extern struct platform_device s3c_device_ts; -extern struct platform_device s3c_device_timer[]; -extern struct platform_device s3c_device_usbgadget; extern struct platform_device s3c_device_usb_hsotg; -extern struct platform_device s3c_device_usb_hsudc; -extern struct platform_device s3c_device_wdt; -extern struct platform_device samsung_asoc_idma; extern struct platform_device samsung_device_keypad; extern struct platform_device samsung_device_pwm; -/* s3c2440 specific devices */ - -#ifdef CONFIG_CPU_S3C2440 - -extern struct platform_device s3c_device_camif; -extern struct platform_device s3c_device_ac97; - -#endif - /** * s3c_set_platdata() - helper for setting platform data * @pd: The default platform data for this device. diff --git a/arch/arm/mach-s3c/dma-s3c24xx.h b/arch/arm/mach-s3c/dma-s3c24xx.h deleted file mode 100644 index 25fc9c258fc1..000000000000 --- a/arch/arm/mach-s3c/dma-s3c24xx.h +++ /dev/null @@ -1,51 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2003-2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Samsung S3C24XX DMA support - */ - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H __FILE__ - -#include <linux/device.h> - -/* We use `virtual` dma channels to hide the fact we have only a limited - * number of DMA channels, and not of all of them (dependent on the device) - * can be attached to any DMA source. We therefore let the DMA core handle - * the allocation of hardware channels to clients. -*/ - -enum dma_ch { - DMACH_XD0 = 0, - DMACH_XD1, - DMACH_SDI, - DMACH_SPI0, - DMACH_SPI1, - DMACH_UART0, - DMACH_UART1, - DMACH_UART2, - DMACH_TIMER, - DMACH_I2S_IN, - DMACH_I2S_OUT, - DMACH_PCM_IN, - DMACH_PCM_OUT, - DMACH_MIC_IN, - DMACH_USB_EP1, - DMACH_USB_EP2, - DMACH_USB_EP3, - DMACH_USB_EP4, - DMACH_UART0_SRC2, /* s3c2412 second uart sources */ - DMACH_UART1_SRC2, - DMACH_UART2_SRC2, - DMACH_UART3, /* s3c2443 has extra uart */ - DMACH_UART3_SRC2, - DMACH_SPI0_TX, /* s3c2443/2416/2450 hsspi0 */ - DMACH_SPI0_RX, /* s3c2443/2416/2450 hsspi0 */ - DMACH_SPI1_TX, /* s3c2443/2450 hsspi1 */ - DMACH_SPI1_RX, /* s3c2443/2450 hsspi1 */ - DMACH_MAX, /* the end entry */ -}; - -#endif /* __ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-s3c/dma-s3c64xx.h b/arch/arm/mach-s3c/dma-s3c64xx.h deleted file mode 100644 index 40ca8de21096..000000000000 --- a/arch/arm/mach-s3c/dma-s3c64xx.h +++ /dev/null @@ -1,57 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* linux/arch/arm/mach-s3c6400/include/mach/dma.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C6400 - DMA support - */ - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H __FILE__ - -#define S3C64XX_DMA_CHAN(name) ((unsigned long)(name)) - -/* DMA0/SDMA0 */ -#define DMACH_UART0 "uart0_tx" -#define DMACH_UART0_SRC2 "uart0_rx" -#define DMACH_UART1 "uart1_tx" -#define DMACH_UART1_SRC2 "uart1_rx" -#define DMACH_UART2 "uart2_tx" -#define DMACH_UART2_SRC2 "uart2_rx" -#define DMACH_UART3 "uart3_tx" -#define DMACH_UART3_SRC2 "uart3_rx" -#define DMACH_PCM0_TX "pcm0_tx" -#define DMACH_PCM0_RX "pcm0_rx" -#define DMACH_I2S0_OUT "i2s0_tx" -#define DMACH_I2S0_IN "i2s0_rx" -#define DMACH_SPI0_TX S3C64XX_DMA_CHAN("spi0_tx") -#define DMACH_SPI0_RX S3C64XX_DMA_CHAN("spi0_rx") -#define DMACH_HSI_I2SV40_TX "i2s2_tx" -#define DMACH_HSI_I2SV40_RX "i2s2_rx" - -/* DMA1/SDMA1 */ -#define DMACH_PCM1_TX "pcm1_tx" -#define DMACH_PCM1_RX "pcm1_rx" -#define DMACH_I2S1_OUT "i2s1_tx" -#define DMACH_I2S1_IN "i2s1_rx" -#define DMACH_SPI1_TX S3C64XX_DMA_CHAN("spi1_tx") -#define DMACH_SPI1_RX S3C64XX_DMA_CHAN("spi1_rx") -#define DMACH_AC97_PCMOUT "ac97_out" -#define DMACH_AC97_PCMIN "ac97_in" -#define DMACH_AC97_MICIN "ac97_mic" -#define DMACH_PWM "pwm" -#define DMACH_IRDA "irda" -#define DMACH_EXTERNAL "external" -#define DMACH_SECURITY_RX "sec_rx" -#define DMACH_SECURITY_TX "sec_tx" - -enum dma_ch { - DMACH_MAX = 32 -}; - -#include <linux/amba/pl08x.h> - -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c/dma.h b/arch/arm/mach-s3c/dma.h deleted file mode 100644 index 59a4578c5f00..000000000000 --- a/arch/arm/mach-s3c/dma.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ - -#ifdef CONFIG_ARCH_S3C24XX -#include "dma-s3c24xx.h" -#endif - -#ifdef CONFIG_ARCH_S3C64XX -#include "dma-s3c64xx.h" -#endif diff --git a/arch/arm/mach-s3c/fb-core-s3c24xx.h b/arch/arm/mach-s3c/fb-core-s3c24xx.h deleted file mode 100644 index 0e07f3ba4aef..000000000000 --- a/arch/arm/mach-s3c/fb-core-s3c24xx.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2010 Samsung Electronics Co., Ltd. - * Pawel Osciak <p.osciak@samsung.com> - * - * Samsung framebuffer driver core functions - */ -#ifndef __ASM_PLAT_FB_CORE_S3C24XX_H -#define __ASM_PLAT_FB_CORE_S3C24XX_H __FILE__ - -/* - * These functions are only for use with the core support code, such as - * the CPU-specific initialization code. - */ - -/* Re-define device name depending on support. */ -static inline void s3c_fb_setname(char *name) -{ -#ifdef CONFIG_S3C_DEV_FB - s3c_device_fb.name = name; -#endif -} - -#endif /* __ASM_PLAT_FB_CORE_S3C24XX_H */ diff --git a/arch/arm/mach-s3c/gpio-cfg-helpers.h b/arch/arm/mach-s3c/gpio-cfg-helpers.h index db0c56f5ca15..9d6f6319ae3e 100644 --- a/arch/arm/mach-s3c/gpio-cfg-helpers.h +++ b/arch/arm/mach-s3c/gpio-cfg-helpers.h @@ -26,134 +26,10 @@ static inline int samsung_gpio_do_setcfg(struct samsung_gpio_chip *chip, return (chip->config->set_config)(chip, off, config); } -static inline unsigned samsung_gpio_do_getcfg(struct samsung_gpio_chip *chip, - unsigned int off) -{ - return (chip->config->get_config)(chip, off); -} - static inline int samsung_gpio_do_setpull(struct samsung_gpio_chip *chip, unsigned int off, samsung_gpio_pull_t pull) { return (chip->config->set_pull)(chip, off, pull); } -static inline samsung_gpio_pull_t samsung_gpio_do_getpull(struct samsung_gpio_chip *chip, - unsigned int off) -{ - return chip->config->get_pull(chip, off); -} - -/* Pull-{up,down} resistor controls. - * - * S3C2410,S3C2440 = Pull-UP, - * S3C2412,S3C2413 = Pull-Down - * S3C6400,S3C6410 = Pull-Both [None,Down,Up,Undef] - * S3C2443 = Pull-Both [not same as S3C6400] - */ - -/** - * s3c24xx_gpio_setpull_1up() - Pull configuration for choice of up or none. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @param: pull: The pull mode being requested. - * - * This is a helper function for the case where we have GPIOs with one - * bit configuring the presence of a pull-up resistor. - */ -extern int s3c24xx_gpio_setpull_1up(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull); - -/** - * s3c24xx_gpio_setpull_1down() - Pull configuration for choice of down or none - * @chip: The gpio chip that is being configured - * @off: The offset for the GPIO being configured - * @param: pull: The pull mode being requested - * - * This is a helper function for the case where we have GPIOs with one - * bit configuring the presence of a pull-down resistor. - */ -extern int s3c24xx_gpio_setpull_1down(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull); - -/** - * samsung_gpio_setpull_upown() - Pull configuration for choice of up, - * down or none - * - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @param: pull: The pull mode being requested. - * - * This is a helper function for the case where we have GPIOs with two - * bits configuring the presence of a pull resistor, in the following - * order: - * 00 = No pull resistor connected - * 01 = Pull-up resistor connected - * 10 = Pull-down resistor connected - */ -extern int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull); - -/** - * samsung_gpio_getpull_updown() - Get configuration for choice of up, - * down or none - * - * @chip: The gpio chip that the GPIO pin belongs to - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-{up,down} resistor - * for the given GPIO in the same case as samsung_gpio_setpull_upown. -*/ -extern samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip, - unsigned int off); - -/** - * s3c24xx_gpio_getpull_1up() - Get configuration for choice of up or none - * @chip: The gpio chip that the GPIO pin belongs to - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-up resistor for the - * given GPIO in the same case as s3c24xx_gpio_setpull_1up. -*/ -extern samsung_gpio_pull_t s3c24xx_gpio_getpull_1up(struct samsung_gpio_chip *chip, - unsigned int off); - -/** - * s3c24xx_gpio_getpull_1down() - Get configuration for choice of down or none - * @chip: The gpio chip that the GPIO pin belongs to - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-down resistor for the - * given GPIO in the same case as s3c24xx_gpio_setpull_1down. -*/ -extern samsung_gpio_pull_t s3c24xx_gpio_getpull_1down(struct samsung_gpio_chip *chip, - unsigned int off); - -/** - * s3c2443_gpio_setpull() - Pull configuration for s3c2443. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @param: pull: The pull mode being requested. - * - * This is a helper function for the case where we have GPIOs with two - * bits configuring the presence of a pull resistor, in the following - * order: - * 00 = Pull-up resistor connected - * 10 = Pull-down resistor connected - * x1 = No pull up resistor - */ -extern int s3c2443_gpio_setpull(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull); - -/** - * s3c2443_gpio_getpull() - Get configuration for s3c2443 pull resistors - * @chip: The gpio chip that the GPIO pin belongs to. - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-{up,down} resistor for the - * given GPIO in the same case as samsung_gpio_setpull_upown. -*/ -extern samsung_gpio_pull_t s3c2443_gpio_getpull(struct samsung_gpio_chip *chip, - unsigned int off); - #endif /* __PLAT_GPIO_CFG_HELPERS_H */ diff --git a/arch/arm/mach-s3c/gpio-cfg.h b/arch/arm/mach-s3c/gpio-cfg.h index 469c220e092b..2dfb0561001e 100644 --- a/arch/arm/mach-s3c/gpio-cfg.h +++ b/arch/arm/mach-s3c/gpio-cfg.h @@ -95,17 +95,6 @@ struct samsung_gpio_cfg { extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); /** - * s3c_gpio_getcfg - Read the current function for a GPIO pin - * @pin: The pin to read the configuration value for. - * - * Read the configuration state of the given @pin, returning a value that - * could be passed back to s3c_gpio_cfgpin(). - * - * @sa s3c_gpio_cfgpin - */ -extern unsigned s3c_gpio_getcfg(unsigned int pin); - -/** * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range * @start: The pin number to start at * @nr: The number of pins to configure from @start. @@ -142,14 +131,6 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, */ extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull); -/** - * s3c_gpio_getpull() - get the pull resistor state of a gpio pin - * @pin: The pin number to get the settings for - * - * Read the pull resistor value for the specified pin. -*/ -extern samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin); - /* configure `all` aspects of an gpio */ /** diff --git a/arch/arm/mach-s3c/gpio-core.h b/arch/arm/mach-s3c/gpio-core.h index b361c8c0d669..6801c85fb9da 100644 --- a/arch/arm/mach-s3c/gpio-core.h +++ b/arch/arm/mach-s3c/gpio-core.h @@ -93,9 +93,6 @@ static inline struct samsung_gpio_chip *to_samsung_gpio(struct gpio_chip *gpc) */ extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset); -/* exported for core SoC support to change */ -extern struct samsung_gpio_cfg s3c24xx_gpiocfg_default; - #ifdef CONFIG_S3C_GPIO_TRACK extern struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END]; diff --git a/arch/arm/mach-s3c/gpio-samsung-s3c24xx.h b/arch/arm/mach-s3c/gpio-samsung-s3c24xx.h deleted file mode 100644 index c29fdc95f883..000000000000 --- a/arch/arm/mach-s3c/gpio-samsung-s3c24xx.h +++ /dev/null @@ -1,103 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 - GPIO lib support - */ - -/* some boards require extra gpio capacity to support external - * devices that need GPIO. - */ - -#ifndef GPIO_SAMSUNG_S3C24XX_H -#define GPIO_SAMSUNG_S3C24XX_H - -#include "map.h" - -/* - * GPIO sizes for various SoCs: - * - * 2410 2412 2440 2443 2416 - * 2442 - * ---- ---- ---- ---- ---- - * A 23 22 25 16 27 - * B 11 11 11 11 11 - * C 16 16 16 16 16 - * D 16 16 16 16 16 - * E 16 16 16 16 16 - * F 8 8 8 8 8 - * G 16 16 16 16 8 - * H 11 11 11 15 15 - * J -- -- 13 16 -- - * K -- -- -- -- 16 - * L -- -- -- 15 14 - * M -- -- -- 2 2 - */ - -/* GPIO bank sizes */ - -#define S3C2410_GPIO_A_NR (32) -#define S3C2410_GPIO_B_NR (32) -#define S3C2410_GPIO_C_NR (32) -#define S3C2410_GPIO_D_NR (32) -#define S3C2410_GPIO_E_NR (32) -#define S3C2410_GPIO_F_NR (32) -#define S3C2410_GPIO_G_NR (32) -#define S3C2410_GPIO_H_NR (32) -#define S3C2410_GPIO_J_NR (32) /* technically 16. */ -#define S3C2410_GPIO_K_NR (32) /* technically 16. */ -#define S3C2410_GPIO_L_NR (32) /* technically 15. */ -#define S3C2410_GPIO_M_NR (32) /* technically 2. */ - -#if CONFIG_S3C_GPIO_SPACE != 0 -#error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment -#endif - -#define S3C2410_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0) - -#ifndef __ASSEMBLY__ - -enum s3c_gpio_number { - S3C2410_GPIO_A_START = 0, - S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A), - S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B), - S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C), - S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D), - S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), - S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), - S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), - S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H), - S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J), - S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K), - S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L), -}; - -#endif /* __ASSEMBLY__ */ - -/* S3C2410 GPIO number definitions. */ - -#define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr)) -#define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr)) -#define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr)) -#define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr)) -#define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr)) -#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) -#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) -#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) -#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr)) -#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr)) -#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) -#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) - -#ifdef CONFIG_CPU_S3C244X -#define S3C_GPIO_END (S3C2410_GPJ(0) + 32) -#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) -#define S3C_GPIO_END (S3C2410_GPM(0) + 32) -#else -#define S3C_GPIO_END (S3C2410_GPH(0) + 32) -#endif - -#endif /* GPIO_SAMSUNG_S3C24XX_H */ diff --git a/arch/arm/mach-s3c/gpio-samsung.c b/arch/arm/mach-s3c/gpio-samsung.c index b7fc7c41309c..87daaa09e2c3 100644 --- a/arch/arm/mach-s3c/gpio-samsung.c +++ b/arch/arm/mach-s3c/gpio-samsung.c @@ -35,10 +35,9 @@ #include "gpio-core.h" #include "gpio-cfg.h" #include "gpio-cfg-helpers.h" -#include "hardware-s3c24xx.h" #include "pm.h" -int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, +static int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, unsigned int off, samsung_gpio_pull_t pull) { void __iomem *reg = chip->base + 0x08; @@ -53,7 +52,7 @@ int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, return 0; } -samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip, +static samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip, unsigned int off) { void __iomem *reg = chip->base + 0x08; @@ -66,113 +65,6 @@ samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip, return (__force samsung_gpio_pull_t)pup; } -int s3c2443_gpio_setpull(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull) -{ - switch (pull) { - case S3C_GPIO_PULL_NONE: - pull = 0x01; - break; - case S3C_GPIO_PULL_UP: - pull = 0x00; - break; - case S3C_GPIO_PULL_DOWN: - pull = 0x02; - break; - } - return samsung_gpio_setpull_updown(chip, off, pull); -} - -samsung_gpio_pull_t s3c2443_gpio_getpull(struct samsung_gpio_chip *chip, - unsigned int off) -{ - samsung_gpio_pull_t pull; - - pull = samsung_gpio_getpull_updown(chip, off); - - switch (pull) { - case 0x00: - pull = S3C_GPIO_PULL_UP; - break; - case 0x01: - case 0x03: - pull = S3C_GPIO_PULL_NONE; - break; - case 0x02: - pull = S3C_GPIO_PULL_DOWN; - break; - } - - return pull; -} - -static int s3c24xx_gpio_setpull_1(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull, - samsung_gpio_pull_t updown) -{ - void __iomem *reg = chip->base + 0x08; - u32 pup = __raw_readl(reg); - - if (pull == updown) - pup &= ~(1 << off); - else if (pull == S3C_GPIO_PULL_NONE) - pup |= (1 << off); - else - return -EINVAL; - - __raw_writel(pup, reg); - return 0; -} - -static samsung_gpio_pull_t s3c24xx_gpio_getpull_1(struct samsung_gpio_chip *chip, - unsigned int off, - samsung_gpio_pull_t updown) -{ - void __iomem *reg = chip->base + 0x08; - u32 pup = __raw_readl(reg); - - pup &= (1 << off); - return pup ? S3C_GPIO_PULL_NONE : updown; -} - -samsung_gpio_pull_t s3c24xx_gpio_getpull_1up(struct samsung_gpio_chip *chip, - unsigned int off) -{ - return s3c24xx_gpio_getpull_1(chip, off, S3C_GPIO_PULL_UP); -} - -int s3c24xx_gpio_setpull_1up(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull) -{ - return s3c24xx_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_UP); -} - -samsung_gpio_pull_t s3c24xx_gpio_getpull_1down(struct samsung_gpio_chip *chip, - unsigned int off) -{ - return s3c24xx_gpio_getpull_1(chip, off, S3C_GPIO_PULL_DOWN); -} - -int s3c24xx_gpio_setpull_1down(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull) -{ - return s3c24xx_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_DOWN); -} - -/* - * samsung_gpio_setcfg_2bit - Samsung 2bit style GPIO configuration. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @cfg: The configuration value to set. - * - * This helper deal with the GPIO cases where the control register - * has two bits of configuration per gpio, which have the following - * functions: - * 00 = input - * 01 = output - * 1x = special function - */ - static int samsung_gpio_setcfg_2bit(struct samsung_gpio_chip *chip, unsigned int off, unsigned int cfg) { @@ -289,70 +181,6 @@ static unsigned samsung_gpio_getcfg_4bit(struct samsung_gpio_chip *chip, return S3C_GPIO_SPECIAL(con); } -#ifdef CONFIG_PLAT_S3C24XX -/* - * s3c24xx_gpio_setcfg_abank - S3C24XX style GPIO configuration (Bank A) - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @cfg: The configuration value to set. - * - * This helper deal with the GPIO cases where the control register - * has one bit of configuration for the gpio, where setting the bit - * means the pin is in special function mode and unset means output. - */ - -static int s3c24xx_gpio_setcfg_abank(struct samsung_gpio_chip *chip, - unsigned int off, unsigned int cfg) -{ - void __iomem *reg = chip->base; - unsigned int shift = off; - u32 con; - - if (samsung_gpio_is_cfg_special(cfg)) { - cfg &= 0xf; - - /* Map output to 0, and SFN2 to 1 */ - cfg -= 1; - if (cfg > 1) - return -EINVAL; - - cfg <<= shift; - } - - con = __raw_readl(reg); - con &= ~(0x1 << shift); - con |= cfg; - __raw_writel(con, reg); - - return 0; -} - -/* - * s3c24xx_gpio_getcfg_abank - S3C24XX style GPIO configuration read (Bank A) - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * - * The reverse of s3c24xx_gpio_setcfg_abank() turning an GPIO into a usable - * GPIO configuration value. - * - * @sa samsung_gpio_getcfg_2bit - * @sa samsung_gpio_getcfg_4bit - */ - -static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip, - unsigned int off) -{ - u32 con; - - con = __raw_readl(chip->base); - con >>= off; - con &= 1; - con++; - - return S3C_GPIO_SFN(con); -} -#endif - static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, int nr_chips) { @@ -368,18 +196,6 @@ static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, } } -struct samsung_gpio_cfg s3c24xx_gpiocfg_default = { - .set_config = samsung_gpio_setcfg_2bit, - .get_config = samsung_gpio_getcfg_2bit, -}; - -#ifdef CONFIG_PLAT_S3C24XX -static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = { - .set_config = s3c24xx_gpio_setcfg_abank, - .get_config = s3c24xx_gpio_getcfg_abank, -}; -#endif - static struct samsung_gpio_cfg samsung_gpio_cfgs[] = { [0] = { .cfg_eint = 0x0, @@ -614,44 +430,6 @@ static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip, return 0; } -#ifdef CONFIG_PLAT_S3C24XX -/* The next set of routines are for the case of s3c24xx bank a */ - -static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset) -{ - return -EINVAL; -} - -static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - unsigned long flags; - unsigned long dat; - unsigned long con; - - local_irq_save(flags); - - con = __raw_readl(base + 0x00); - dat = __raw_readl(base + 0x04); - - dat &= ~(1 << offset); - if (value) - dat |= 1 << offset; - - __raw_writel(dat, base + 0x04); - - con &= ~(1 << offset); - - __raw_writel(con, base + 0x00); - __raw_writel(dat, base + 0x04); - - local_irq_restore(flags); - return 0; -} -#endif - static void samsung_gpiolib_set(struct gpio_chip *chip, unsigned offset, int value) { @@ -756,33 +534,6 @@ static void __init samsung_gpiolib_add(struct samsung_gpio_chip *chip) s3c_gpiolib_track(chip); } -static void __init s3c24xx_gpiolib_add_chips(struct samsung_gpio_chip *chip, - int nr_chips, void __iomem *base) -{ - int i; - struct gpio_chip *gc = &chip->chip; - - for (i = 0 ; i < nr_chips; i++, chip++) { - /* skip banks not present on SoC */ - if (chip->chip.base >= S3C_GPIO_END) - continue; - - if (!chip->config) - chip->config = &s3c24xx_gpiocfg_default; - if (!chip->pm) - chip->pm = __gpio_pm(&samsung_gpio_pm_2bit); - if ((base != NULL) && (chip->base == NULL)) - chip->base = base + ((i) * 0x10); - - if (!gc->direction_input) - gc->direction_input = samsung_gpiolib_2bit_input; - if (!gc->direction_output) - gc->direction_output = samsung_gpiolib_2bit_output; - - samsung_gpiolib_add(chip); - } -} - static void __init samsung_gpiolib_add_2bit_chips(struct samsung_gpio_chip *chip, int nr_chips, void __iomem *base, unsigned int offset) @@ -865,24 +616,6 @@ int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) return samsung_chip->irq_base + offset; } -#ifdef CONFIG_PLAT_S3C24XX -static int s3c24xx_gpiolib_fbank_to_irq(struct gpio_chip *chip, unsigned offset) -{ - if (offset < 4) { - if (soc_is_s3c2412()) - return IRQ_EINT0_2412 + offset; - else - return IRQ_EINT0 + offset; - } - - if (offset < 8) - return IRQ_EINT4 + offset - 4; - - return -EINVAL; -} -#endif - -#ifdef CONFIG_ARCH_S3C64XX static int s3c64xx_gpiolib_mbank_to_irq(struct gpio_chip *chip, unsigned pin) { return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; @@ -892,109 +625,6 @@ static int s3c64xx_gpiolib_lbank_to_irq(struct gpio_chip *chip, unsigned pin) { return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; } -#endif - -struct samsung_gpio_chip s3c24xx_gpios[] = { -#ifdef CONFIG_PLAT_S3C24XX - { - .config = &s3c24xx_gpiocfg_banka, - .chip = { - .base = S3C2410_GPA(0), - .owner = THIS_MODULE, - .label = "GPIOA", - .ngpio = 27, - .direction_input = s3c24xx_gpiolib_banka_input, - .direction_output = s3c24xx_gpiolib_banka_output, - }, - }, { - .chip = { - .base = S3C2410_GPB(0), - .owner = THIS_MODULE, - .label = "GPIOB", - .ngpio = 11, - }, - }, { - .chip = { - .base = S3C2410_GPC(0), - .owner = THIS_MODULE, - .label = "GPIOC", - .ngpio = 16, - }, - }, { - .chip = { - .base = S3C2410_GPD(0), - .owner = THIS_MODULE, - .label = "GPIOD", - .ngpio = 16, - }, - }, { - .chip = { - .base = S3C2410_GPE(0), - .label = "GPIOE", - .owner = THIS_MODULE, - .ngpio = 16, - }, - }, { - .chip = { - .base = S3C2410_GPF(0), - .owner = THIS_MODULE, - .label = "GPIOF", - .ngpio = 8, - .to_irq = s3c24xx_gpiolib_fbank_to_irq, - }, - }, { - .irq_base = IRQ_EINT8, - .chip = { - .base = S3C2410_GPG(0), - .owner = THIS_MODULE, - .label = "GPIOG", - .ngpio = 16, - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .chip = { - .base = S3C2410_GPH(0), - .owner = THIS_MODULE, - .label = "GPIOH", - .ngpio = 15, - }, - }, - /* GPIOS for the S3C2443 and later devices. */ - { - .base = S3C2440_GPJCON, - .chip = { - .base = S3C2410_GPJ(0), - .owner = THIS_MODULE, - .label = "GPIOJ", - .ngpio = 16, - }, - }, { - .base = S3C2443_GPKCON, - .chip = { - .base = S3C2410_GPK(0), - .owner = THIS_MODULE, - .label = "GPIOK", - .ngpio = 16, - }, - }, { - .base = S3C2443_GPLCON, - .chip = { - .base = S3C2410_GPL(0), - .owner = THIS_MODULE, - .label = "GPIOL", - .ngpio = 15, - }, - }, { - .base = S3C2443_GPMCON, - .chip = { - .base = S3C2410_GPM(0), - .owner = THIS_MODULE, - .label = "GPIOM", - .ngpio = 2, - }, - }, -#endif -}; /* * GPIO bank summary: @@ -1023,7 +653,6 @@ struct samsung_gpio_chip s3c24xx_gpios[] = { */ static struct samsung_gpio_chip s3c64xx_gpios_4bit[] = { -#ifdef CONFIG_ARCH_S3C64XX { .chip = { .base = S3C64XX_GPA(0), @@ -1072,11 +701,9 @@ static struct samsung_gpio_chip s3c64xx_gpios_4bit[] = { .to_irq = s3c64xx_gpiolib_mbank_to_irq, }, }, -#endif }; static struct samsung_gpio_chip s3c64xx_gpios_4bit2[] = { -#ifdef CONFIG_ARCH_S3C64XX { .base = S3C64XX_GPH_BASE + 0x4, .chip = { @@ -1102,11 +729,9 @@ static struct samsung_gpio_chip s3c64xx_gpios_4bit2[] = { .to_irq = s3c64xx_gpiolib_lbank_to_irq, }, }, -#endif }; static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = { -#ifdef CONFIG_ARCH_S3C64XX { .base = S3C64XX_GPF_BASE, .config = &samsung_gpio_cfgs[6], @@ -1161,7 +786,6 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = { .to_irq = samsung_gpiolib_to_irq, }, }, -#endif }; /* TODO: cleanup soc_is_* */ @@ -1176,12 +800,7 @@ static __init int samsung_gpiolib_init(void) if (of_have_populated_dt()) return 0; - if (soc_is_s3c24xx()) { - samsung_gpiolib_set_cfg(samsung_gpio_cfgs, - ARRAY_SIZE(samsung_gpio_cfgs)); - s3c24xx_gpiolib_add_chips(s3c24xx_gpios, - ARRAY_SIZE(s3c24xx_gpios), S3C24XX_VA_GPIO); - } else if (soc_is_s3c64xx()) { + if (soc_is_s3c64xx()) { samsung_gpiolib_set_cfg(samsung_gpio_cfgs, ARRAY_SIZE(samsung_gpio_cfgs)); samsung_gpiolib_add_2bit_chips(s3c64xx_gpios_2bit, @@ -1249,25 +868,6 @@ int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, } EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range); -unsigned s3c_gpio_getcfg(unsigned int pin) -{ - struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); - unsigned long flags; - unsigned ret = 0; - int offset; - - if (chip) { - offset = pin - chip->chip.base; - - samsung_gpio_lock(chip, flags); - ret = samsung_gpio_do_getcfg(chip, offset); - samsung_gpio_unlock(chip, flags); - } - - return ret; -} -EXPORT_SYMBOL(s3c_gpio_getcfg); - int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull) { struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); @@ -1286,40 +886,3 @@ int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull) return ret; } EXPORT_SYMBOL(s3c_gpio_setpull); - -samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin) -{ - struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); - unsigned long flags; - int offset; - u32 pup = 0; - - if (chip) { - offset = pin - chip->chip.base; - - samsung_gpio_lock(chip, flags); - pup = samsung_gpio_do_getpull(chip, offset); - samsung_gpio_unlock(chip, flags); - } - - return (__force samsung_gpio_pull_t)pup; -} -EXPORT_SYMBOL(s3c_gpio_getpull); - -#ifdef CONFIG_PLAT_S3C24XX -unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) -{ - unsigned long flags; - unsigned long misccr; - - local_irq_save(flags); - misccr = __raw_readl(S3C24XX_MISCCR); - misccr &= ~clear; - misccr ^= change; - __raw_writel(misccr, S3C24XX_MISCCR); - local_irq_restore(flags); - - return misccr; -} -EXPORT_SYMBOL(s3c2410_modify_misccr); -#endif diff --git a/arch/arm/mach-s3c/gpio-samsung.h b/arch/arm/mach-s3c/gpio-samsung.h index 02f6f4a96862..4233515eddaa 100644 --- a/arch/arm/mach-s3c/gpio-samsung.h +++ b/arch/arm/mach-s3c/gpio-samsung.h @@ -1,9 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ - -#ifdef CONFIG_ARCH_S3C24XX -#include "gpio-samsung-s3c24xx.h" -#endif - -#ifdef CONFIG_ARCH_S3C64XX #include "gpio-samsung-s3c64xx.h" -#endif diff --git a/arch/arm/mach-s3c/gta02.h b/arch/arm/mach-s3c/gta02.h deleted file mode 100644 index 043ae382bfc5..000000000000 --- a/arch/arm/mach-s3c/gta02.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * GTA02 header - */ - -#ifndef __MACH_S3C24XX_GTA02_H -#define __MACH_S3C24XX_GTA02_H __FILE__ - -#include "regs-gpio.h" - -#define GTA02_GPIO_AUX_LED S3C2410_GPB(2) -#define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9) -#define GTA02_GPIO_AUX_KEY S3C2410_GPF(6) -#define GTA02_GPIO_HOLD_KEY S3C2410_GPF(7) -#define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ -#define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ - -#define GTA02_IRQ_PCF50633 IRQ_EINT9 - -#endif /* __MACH_S3C24XX_GTA02_H */ diff --git a/arch/arm/mach-s3c/h1940-bluetooth.c b/arch/arm/mach-s3c/h1940-bluetooth.c deleted file mode 100644 index 59edcf8a620d..000000000000 --- a/arch/arm/mach-s3c/h1940-bluetooth.c +++ /dev/null @@ -1,140 +0,0 @@ -// SPDX-License-Identifier: GPL-1.0+ -// -// Copyright (c) Arnaud Patard <arnaud.patard@rtp-net.org> -// -// S3C2410 bluetooth "driver" - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/ctype.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/rfkill.h> - -#include "gpio-cfg.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "h1940.h" - -#define DRV_NAME "h1940-bt" - -/* Bluetooth control */ -static void h1940bt_enable(int on) -{ - if (on) { - /* Power on the chip */ - gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 1); - /* Reset the chip */ - mdelay(10); - - gpio_set_value(S3C2410_GPH(1), 1); - mdelay(10); - gpio_set_value(S3C2410_GPH(1), 0); - - h1940_led_blink_set(NULL, GPIO_LED_BLINK, NULL, NULL); - } - else { - gpio_set_value(S3C2410_GPH(1), 1); - mdelay(10); - gpio_set_value(S3C2410_GPH(1), 0); - mdelay(10); - gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 0); - - h1940_led_blink_set(NULL, GPIO_LED_NO_BLINK_LOW, NULL, NULL); - } -} - -static int h1940bt_set_block(void *data, bool blocked) -{ - h1940bt_enable(!blocked); - return 0; -} - -static const struct rfkill_ops h1940bt_rfkill_ops = { - .set_block = h1940bt_set_block, -}; - -static int h1940bt_probe(struct platform_device *pdev) -{ - struct rfkill *rfk; - int ret = 0; - - ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev)); - if (ret) { - dev_err(&pdev->dev, "could not get GPH1\n"); - return ret; - } - - ret = gpio_request(H1940_LATCH_BLUETOOTH_POWER, dev_name(&pdev->dev)); - if (ret) { - gpio_free(S3C2410_GPH(1)); - dev_err(&pdev->dev, "could not get BT_POWER\n"); - return ret; - } - - /* Configures BT serial port GPIOs */ - s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); - s3c_gpio_setpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); - s3c_gpio_setpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); - s3c_gpio_setpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); - s3c_gpio_setpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE); - - rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, - &h1940bt_rfkill_ops, NULL); - if (!rfk) { - ret = -ENOMEM; - goto err_rfk_alloc; - } - - ret = rfkill_register(rfk); - if (ret) - goto err_rfkill; - - platform_set_drvdata(pdev, rfk); - - return 0; - -err_rfkill: - rfkill_destroy(rfk); -err_rfk_alloc: - return ret; -} - -static int h1940bt_remove(struct platform_device *pdev) -{ - struct rfkill *rfk = platform_get_drvdata(pdev); - - platform_set_drvdata(pdev, NULL); - gpio_free(S3C2410_GPH(1)); - - if (rfk) { - rfkill_unregister(rfk); - rfkill_destroy(rfk); - } - rfk = NULL; - - h1940bt_enable(0); - - return 0; -} - - -static struct platform_driver h1940bt_driver = { - .driver = { - .name = DRV_NAME, - }, - .probe = h1940bt_probe, - .remove = h1940bt_remove, -}; - -module_platform_driver(h1940bt_driver); - -MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); -MODULE_DESCRIPTION("Driver for the iPAQ H1940 bluetooth chip"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-s3c/h1940.h b/arch/arm/mach-s3c/h1940.h deleted file mode 100644 index 5dfe9d10cd15..000000000000 --- a/arch/arm/mach-s3c/h1940.h +++ /dev/null @@ -1,52 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2006 Ben Dooks <ben-linux@fluff.org> - * - * Copyright (c) 2005 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * iPAQ H1940 series definitions - */ - -#ifndef __MACH_S3C24XX_H1940_H -#define __MACH_S3C24XX_H1940_H __FILE__ - -#define H1940_SUSPEND_CHECKSUM (0x30003ff8) -#define H1940_SUSPEND_RESUMEAT (0x30081000) -#define H1940_SUSPEND_CHECK (0x30080000) - -struct gpio_desc; - -extern void h1940_pm_return(void); -extern int h1940_led_blink_set(struct gpio_desc *desc, int state, - unsigned long *delay_on, - unsigned long *delay_off); - -#include <linux/gpio.h> - -#define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x)) - -/* SD layer latch */ - -#define H1940_LATCH_LCD_P0 H1940_LATCH_GPIO(0) -#define H1940_LATCH_LCD_P1 H1940_LATCH_GPIO(1) -#define H1940_LATCH_LCD_P2 H1940_LATCH_GPIO(2) -#define H1940_LATCH_LCD_P3 H1940_LATCH_GPIO(3) -#define H1940_LATCH_MAX1698_nSHUTDOWN H1940_LATCH_GPIO(4) -#define H1940_LATCH_LED_RED H1940_LATCH_GPIO(5) -#define H1940_LATCH_SDQ7 H1940_LATCH_GPIO(6) -#define H1940_LATCH_USB_DP H1940_LATCH_GPIO(7) - -/* CPU layer latch */ - -#define H1940_LATCH_UDA_POWER H1940_LATCH_GPIO(8) -#define H1940_LATCH_AUDIO_POWER H1940_LATCH_GPIO(9) -#define H1940_LATCH_SM803_ENABLE H1940_LATCH_GPIO(10) -#define H1940_LATCH_LCD_P4 H1940_LATCH_GPIO(11) -#define H1940_LATCH_SD_POWER H1940_LATCH_GPIO(12) -#define H1940_LATCH_BLUETOOTH_POWER H1940_LATCH_GPIO(13) -#define H1940_LATCH_LED_GREEN H1940_LATCH_GPIO(14) -#define H1940_LATCH_LED_FLASH H1940_LATCH_GPIO(15) - -#endif /* __MACH_S3C24XX_H1940_H */ diff --git a/arch/arm/mach-s3c/hardware-s3c24xx.h b/arch/arm/mach-s3c/hardware-s3c24xx.h deleted file mode 100644 index 33b37467d05f..000000000000 --- a/arch/arm/mach-s3c/hardware-s3c24xx.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 - hardware - */ - -#ifndef __ASM_ARCH_HARDWARE_S3C24XX_H -#define __ASM_ARCH_HARDWARE_S3C24XX_H - -extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); - -#endif /* __ASM_ARCH_HARDWARE_S3C24XX_H */ diff --git a/arch/arm/mach-s3c/iic-core.h b/arch/arm/mach-s3c/iic-core.h index c5cfd5af3874..6672691bd7b8 100644 --- a/arch/arm/mach-s3c/iic-core.h +++ b/arch/arm/mach-s3c/iic-core.h @@ -28,11 +28,4 @@ static inline void s3c_i2c1_setname(char *name) #endif } -static inline void s3c_i2c2_setname(char *name) -{ -#ifdef CONFIG_S3C_DEV_I2C2 - s3c_device_i2c2.name = name; -#endif -} - #endif /* __ASM_ARCH_IIC_H */ diff --git a/arch/arm/mach-s3c/init.c b/arch/arm/mach-s3c/init.c index bf513616f55d..0ac079f23d51 100644 --- a/arch/arm/mach-s3c/init.c +++ b/arch/arm/mach-s3c/init.c @@ -63,29 +63,6 @@ void __init s3c_init_cpu(unsigned long idcode, pr_err("The platform is deprecated and scheduled for removal. Please reach to the maintainers of the platform and linux-samsung-soc@vger.kernel.org if you still use it. Without such feedback, the platform will be removed after 2022.\n"); } -/* s3c24xx_init_clocks - * - * Initialise the clock subsystem and associated information from the - * given master crystal value. - * - * xtal = 0 -> use default PLL crystal value (normally 12MHz) - * != 0 -> PLL crystal value in Hz -*/ - -void __init s3c24xx_init_clocks(int xtal) -{ - if (xtal == 0) - xtal = 12*1000*1000; - - if (cpu == NULL) - panic("s3c24xx_init_clocks: no cpu setup?\n"); - - if (cpu->init_clocks == NULL) - panic("s3c24xx_init_clocks: cpu has no clock init\n"); - else - (cpu->init_clocks)(xtal); -} - /* uart management */ #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS) static int nr_uarts __initdata = 0; @@ -150,8 +127,7 @@ static int __init s3c_arch_init(void) int ret; /* init is only needed for ATAGS based platforms */ - if (!IS_ENABLED(CONFIG_ATAGS) || - (!soc_is_s3c24xx() && !soc_is_s3c64xx())) + if (!IS_ENABLED(CONFIG_ATAGS)) return 0; // do the correct init for cpu diff --git a/arch/arm/mach-s3c/iotiming-s3c2410.c b/arch/arm/mach-s3c/iotiming-s3c2410.c deleted file mode 100644 index 09f388d8f824..000000000000 --- a/arch/arm/mach-s3c/iotiming-s3c2410.c +++ /dev/null @@ -1,472 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006-2009 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// -// S3C24XX CPU Frequency scaling - IO timing for S3C2410/S3C2440/S3C2442 - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/cpufreq.h> -#include <linux/seq_file.h> -#include <linux/io.h> -#include <linux/slab.h> - -#include "map.h" -#include "regs-clock.h" - -#include <linux/soc/samsung/s3c-cpufreq-core.h> - -#include "regs-mem-s3c24xx.h" - -#define print_ns(x) ((x) / 10), ((x) % 10) - -/** - * s3c2410_print_timing - print bank timing data for debug purposes - * @pfx: The prefix to put on the output - * @timings: The timing inforamtion to print. -*/ -static void s3c2410_print_timing(const char *pfx, - struct s3c_iotimings *timings) -{ - struct s3c2410_iobank_timing *bt; - int bank; - - for (bank = 0; bank < MAX_BANKS; bank++) { - bt = timings->bank[bank].io_2410; - if (!bt) - continue; - - printk(KERN_DEBUG "%s %d: Tacs=%d.%d, Tcos=%d.%d, Tacc=%d.%d, " - "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank, - print_ns(bt->tacs), - print_ns(bt->tcos), - print_ns(bt->tacc), - print_ns(bt->tcoh), - print_ns(bt->tcah)); - } -} - -/** - * bank_reg - convert bank number to pointer to the control register. - * @bank: The IO bank number. - */ -static inline void __iomem *bank_reg(unsigned int bank) -{ - return S3C2410_BANKCON0 + (bank << 2); -} - -/** - * bank_is_io - test whether bank is used for IO - * @bankcon: The bank control register. - * - * This is a simplistic test to see if any BANKCON[x] is not an IO - * bank. It currently does not take into account whether BWSCON has - * an illegal width-setting in it, or if the pin connected to nCS[x] - * is actually being handled as a chip-select. - */ -static inline int bank_is_io(unsigned long bankcon) -{ - return !(bankcon & S3C2410_BANKCON_SDRAM); -} - -/** - * to_div - convert cycle time to divisor - * @cyc: The cycle time, in 10ths of nanoseconds. - * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. - * - * Convert the given cycle time into the divisor to use to obtain it from - * HCLK. -*/ -static inline unsigned int to_div(unsigned int cyc, unsigned int hclk_tns) -{ - if (cyc == 0) - return 0; - - return DIV_ROUND_UP(cyc, hclk_tns); -} - -/** - * calc_0124 - calculate divisor control for divisors that do /0, /1. /2 and /4 - * @cyc: The cycle time, in 10ths of nanoseconds. - * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. - * @v: Pointer to register to alter. - * @shift: The shift to get to the control bits. - * - * Calculate the divisor, and turn it into the correct control bits to - * set in the result, @v. - */ -static unsigned int calc_0124(unsigned int cyc, unsigned long hclk_tns, - unsigned long *v, int shift) -{ - unsigned int div = to_div(cyc, hclk_tns); - unsigned long val; - - s3c_freq_iodbg("%s: cyc=%d, hclk=%lu, shift=%d => div %d\n", - __func__, cyc, hclk_tns, shift, div); - - switch (div) { - case 0: - val = 0; - break; - case 1: - val = 1; - break; - case 2: - val = 2; - break; - case 3: - case 4: - val = 3; - break; - default: - return -1; - } - - *v |= val << shift; - return 0; -} - -static int calc_tacp(unsigned int cyc, unsigned long hclk, unsigned long *v) -{ - /* Currently no support for Tacp calculations. */ - return 0; -} - -/** - * calc_tacc - calculate divisor control for tacc. - * @cyc: The cycle time, in 10ths of nanoseconds. - * @nwait_en: IS nWAIT enabled for this bank. - * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. - * @v: Pointer to register to alter. - * - * Calculate the divisor control for tACC, taking into account whether - * the bank has nWAIT enabled. The result is used to modify the value - * pointed to by @v. -*/ -static int calc_tacc(unsigned int cyc, int nwait_en, - unsigned long hclk_tns, unsigned long *v) -{ - unsigned int div = to_div(cyc, hclk_tns); - unsigned long val; - - s3c_freq_iodbg("%s: cyc=%u, nwait=%d, hclk=%lu => div=%u\n", - __func__, cyc, nwait_en, hclk_tns, div); - - /* if nWait enabled on an bank, Tacc must be at-least 4 cycles. */ - if (nwait_en && div < 4) - div = 4; - - switch (div) { - case 0: - val = 0; - break; - - case 1: - case 2: - case 3: - case 4: - val = div - 1; - break; - - case 5: - case 6: - val = 4; - break; - - case 7: - case 8: - val = 5; - break; - - case 9: - case 10: - val = 6; - break; - - case 11: - case 12: - case 13: - case 14: - val = 7; - break; - - default: - return -1; - } - - *v |= val << 8; - return 0; -} - -/** - * s3c2410_calc_bank - calculate bank timing information - * @cfg: The configuration we need to calculate for. - * @bt: The bank timing information. - * - * Given the cycle timine for a bank @bt, calculate the new BANKCON - * setting for the @cfg timing. This updates the timing information - * ready for the cpu frequency change. - */ -static int s3c2410_calc_bank(struct s3c_cpufreq_config *cfg, - struct s3c2410_iobank_timing *bt) -{ - unsigned long hclk = cfg->freq.hclk_tns; - unsigned long res; - int ret; - - res = bt->bankcon; - res &= (S3C2410_BANKCON_SDRAM | S3C2410_BANKCON_PMC16); - - /* tacp: 2,3,4,5 */ - /* tcah: 0,1,2,4 */ - /* tcoh: 0,1,2,4 */ - /* tacc: 1,2,3,4,6,7,10,14 (>4 for nwait) */ - /* tcos: 0,1,2,4 */ - /* tacs: 0,1,2,4 */ - - ret = calc_0124(bt->tacs, hclk, &res, S3C2410_BANKCON_Tacs_SHIFT); - ret |= calc_0124(bt->tcos, hclk, &res, S3C2410_BANKCON_Tcos_SHIFT); - ret |= calc_0124(bt->tcah, hclk, &res, S3C2410_BANKCON_Tcah_SHIFT); - ret |= calc_0124(bt->tcoh, hclk, &res, S3C2410_BANKCON_Tcoh_SHIFT); - - if (ret) - return -EINVAL; - - ret |= calc_tacp(bt->tacp, hclk, &res); - ret |= calc_tacc(bt->tacc, bt->nwait_en, hclk, &res); - - if (ret) - return -EINVAL; - - bt->bankcon = res; - return 0; -} - -static const unsigned int tacc_tab[] = { - [0] = 1, - [1] = 2, - [2] = 3, - [3] = 4, - [4] = 6, - [5] = 9, - [6] = 10, - [7] = 14, -}; - -/** - * get_tacc - turn tACC value into cycle time - * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. - * @val: The bank timing register value, shifted down. - */ -static unsigned int get_tacc(unsigned long hclk_tns, - unsigned long val) -{ - val &= 7; - return hclk_tns * tacc_tab[val]; -} - -/** - * get_0124 - turn 0/1/2/4 divider into cycle time - * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. - * @val: The bank timing register value, shifed down. - */ -static unsigned int get_0124(unsigned long hclk_tns, - unsigned long val) -{ - val &= 3; - return hclk_tns * ((val == 3) ? 4 : val); -} - -/** - * s3c2410_iotiming_getbank - turn BANKCON into cycle time information - * @cfg: The frequency configuration - * @bt: The bank timing to fill in (uses cached BANKCON) - * - * Given the BANKCON setting in @bt and the current frequency settings - * in @cfg, update the cycle timing information. - */ -static void s3c2410_iotiming_getbank(struct s3c_cpufreq_config *cfg, - struct s3c2410_iobank_timing *bt) -{ - unsigned long bankcon = bt->bankcon; - unsigned long hclk = cfg->freq.hclk_tns; - - bt->tcah = get_0124(hclk, bankcon >> S3C2410_BANKCON_Tcah_SHIFT); - bt->tcoh = get_0124(hclk, bankcon >> S3C2410_BANKCON_Tcoh_SHIFT); - bt->tcos = get_0124(hclk, bankcon >> S3C2410_BANKCON_Tcos_SHIFT); - bt->tacs = get_0124(hclk, bankcon >> S3C2410_BANKCON_Tacs_SHIFT); - bt->tacc = get_tacc(hclk, bankcon >> S3C2410_BANKCON_Tacc_SHIFT); -} - -/** - * s3c2410_iotiming_debugfs - debugfs show io bank timing information - * @seq: The seq_file to write output to using seq_printf(). - * @cfg: The current configuration. - * @iob: The IO bank information to decode. - */ -void s3c2410_iotiming_debugfs(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob) -{ - struct s3c2410_iobank_timing *bt = iob->io_2410; - unsigned long bankcon = bt->bankcon; - unsigned long hclk = cfg->freq.hclk_tns; - unsigned int tacs; - unsigned int tcos; - unsigned int tacc; - unsigned int tcoh; - unsigned int tcah; - - seq_printf(seq, "BANKCON=0x%08lx\n", bankcon); - - tcah = get_0124(hclk, bankcon >> S3C2410_BANKCON_Tcah_SHIFT); - tcoh = get_0124(hclk, bankcon >> S3C2410_BANKCON_Tcoh_SHIFT); - tcos = get_0124(hclk, bankcon >> S3C2410_BANKCON_Tcos_SHIFT); - tacs = get_0124(hclk, bankcon >> S3C2410_BANKCON_Tacs_SHIFT); - tacc = get_tacc(hclk, bankcon >> S3C2410_BANKCON_Tacc_SHIFT); - - seq_printf(seq, - "\tRead: Tacs=%d.%d, Tcos=%d.%d, Tacc=%d.%d, Tcoh=%d.%d, Tcah=%d.%d\n", - print_ns(bt->tacs), - print_ns(bt->tcos), - print_ns(bt->tacc), - print_ns(bt->tcoh), - print_ns(bt->tcah)); - - seq_printf(seq, - "\t Set: Tacs=%d.%d, Tcos=%d.%d, Tacc=%d.%d, Tcoh=%d.%d, Tcah=%d.%d\n", - print_ns(tacs), - print_ns(tcos), - print_ns(tacc), - print_ns(tcoh), - print_ns(tcah)); -} - -/** - * s3c2410_iotiming_calc - Calculate bank timing for frequency change. - * @cfg: The frequency configuration - * @iot: The IO timing information to fill out. - * - * Calculate the new values for the banks in @iot based on the new - * frequency information in @cfg. This is then used by s3c2410_iotiming_set() - * to update the timing when necessary. - */ -int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot) -{ - struct s3c2410_iobank_timing *bt; - unsigned long bankcon; - int bank; - int ret; - - for (bank = 0; bank < MAX_BANKS; bank++) { - bankcon = __raw_readl(bank_reg(bank)); - bt = iot->bank[bank].io_2410; - - if (!bt) - continue; - - bt->bankcon = bankcon; - - ret = s3c2410_calc_bank(cfg, bt); - if (ret) { - printk(KERN_ERR "%s: cannot calculate bank %d io\n", - __func__, bank); - goto err; - } - - s3c_freq_iodbg("%s: bank %d: con=%08lx\n", - __func__, bank, bt->bankcon); - } - - return 0; - err: - return ret; -} - -/** - * s3c2410_iotiming_set - set the IO timings from the given setup. - * @cfg: The frequency configuration - * @iot: The IO timing information to use. - * - * Set all the currently used IO bank timing information generated - * by s3c2410_iotiming_calc() once the core has validated that all - * the new values are within permitted bounds. - */ -void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot) -{ - struct s3c2410_iobank_timing *bt; - int bank; - - /* set the io timings from the specifier */ - - for (bank = 0; bank < MAX_BANKS; bank++) { - bt = iot->bank[bank].io_2410; - if (!bt) - continue; - - __raw_writel(bt->bankcon, bank_reg(bank)); - } -} - -/** - * s3c2410_iotiming_get - Get the timing information from current registers. - * @cfg: The frequency configuration - * @timings: The IO timing information to fill out. - * - * Calculate the @timings timing information from the current frequency - * information in @cfg, and the new frequency configuration - * through all the IO banks, reading the state and then updating @iot - * as necessary. - * - * This is used at the moment on initialisation to get the current - * configuration so that boards do not have to carry their own setup - * if the timings are correct on initialisation. - */ - -int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings) -{ - struct s3c2410_iobank_timing *bt; - unsigned long bankcon; - unsigned long bwscon; - int bank; - - bwscon = __raw_readl(S3C2410_BWSCON); - - /* look through all banks to see what is currently set. */ - - for (bank = 0; bank < MAX_BANKS; bank++) { - bankcon = __raw_readl(bank_reg(bank)); - - if (!bank_is_io(bankcon)) - continue; - - s3c_freq_iodbg("%s: bank %d: con %08lx\n", - __func__, bank, bankcon); - - bt = kzalloc(sizeof(*bt), GFP_KERNEL); - if (!bt) - return -ENOMEM; - - /* find out in nWait is enabled for bank. */ - - if (bank != 0) { - unsigned long tmp = S3C2410_BWSCON_GET(bwscon, bank); - if (tmp & S3C2410_BWSCON_WS) - bt->nwait_en = 1; - } - - timings->bank[bank].io_2410 = bt; - bt->bankcon = bankcon; - - s3c2410_iotiming_getbank(cfg, bt); - } - - s3c2410_print_timing("get", timings); - return 0; -} diff --git a/arch/arm/mach-s3c/iotiming-s3c2412.c b/arch/arm/mach-s3c/iotiming-s3c2412.c deleted file mode 100644 index 003f89c4dc53..000000000000 --- a/arch/arm/mach-s3c/iotiming-s3c2412.c +++ /dev/null @@ -1,278 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006-2008 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// -// S3C2412/S3C2443 (PL093 based) IO timing support - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/cpufreq.h> -#include <linux/seq_file.h> -#include <linux/device.h> -#include <linux/delay.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/slab.h> - -#include <linux/amba/pl093.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "cpu.h" -#include <linux/soc/samsung/s3c-cpufreq-core.h> - -#include "s3c2412.h" - -#define print_ns(x) ((x) / 10), ((x) % 10) - -/** - * s3c2412_print_timing - print timing information via printk. - * @pfx: The prefix to print each line with. - * @iot: The IO timing information - */ -static void s3c2412_print_timing(const char *pfx, struct s3c_iotimings *iot) -{ - struct s3c2412_iobank_timing *bt; - unsigned int bank; - - for (bank = 0; bank < MAX_BANKS; bank++) { - bt = iot->bank[bank].io_2412; - if (!bt) - continue; - - printk(KERN_DEBUG "%s: %d: idcy=%d.%d wstrd=%d.%d wstwr=%d,%d" - "wstoen=%d.%d wstwen=%d.%d wstbrd=%d.%d\n", pfx, bank, - print_ns(bt->idcy), - print_ns(bt->wstrd), - print_ns(bt->wstwr), - print_ns(bt->wstoen), - print_ns(bt->wstwen), - print_ns(bt->wstbrd)); - } -} - -/** - * to_div - turn a cycle length into a divisor setting. - * @cyc_tns: The cycle time in 10ths of nanoseconds. - * @clk_tns: The clock period in 10ths of nanoseconds. - */ -static inline unsigned int to_div(unsigned int cyc_tns, unsigned int clk_tns) -{ - return cyc_tns ? DIV_ROUND_UP(cyc_tns, clk_tns) : 0; -} - -/** - * calc_timing - calculate timing divisor value and check in range. - * @hwtm: The hardware timing in 10ths of nanoseconds. - * @clk_tns: The clock period in 10ths of nanoseconds. - * @err: Pointer to err variable to update in event of failure. - */ -static unsigned int calc_timing(unsigned int hwtm, unsigned int clk_tns, - unsigned int *err) -{ - unsigned int ret = to_div(hwtm, clk_tns); - - if (ret > 0xf) - *err = -EINVAL; - - return ret; -} - -/** - * s3c2412_calc_bank - calculate the bank divisor settings. - * @cfg: The current frequency configuration. - * @bt: The bank timing. - */ -static int s3c2412_calc_bank(struct s3c_cpufreq_config *cfg, - struct s3c2412_iobank_timing *bt) -{ - unsigned int hclk = cfg->freq.hclk_tns; - int err = 0; - - bt->smbidcyr = calc_timing(bt->idcy, hclk, &err); - bt->smbwstrd = calc_timing(bt->wstrd, hclk, &err); - bt->smbwstwr = calc_timing(bt->wstwr, hclk, &err); - bt->smbwstoen = calc_timing(bt->wstoen, hclk, &err); - bt->smbwstwen = calc_timing(bt->wstwen, hclk, &err); - bt->smbwstbrd = calc_timing(bt->wstbrd, hclk, &err); - - return err; -} - -/** - * s3c2412_iotiming_debugfs - debugfs show io bank timing information - * @seq: The seq_file to write output to using seq_printf(). - * @cfg: The current configuration. - * @iob: The IO bank information to decode. -*/ -void s3c2412_iotiming_debugfs(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob) -{ - struct s3c2412_iobank_timing *bt = iob->io_2412; - - seq_printf(seq, - "\tRead: idcy=%d.%d wstrd=%d.%d wstwr=%d,%d" - "wstoen=%d.%d wstwen=%d.%d wstbrd=%d.%d\n", - print_ns(bt->idcy), - print_ns(bt->wstrd), - print_ns(bt->wstwr), - print_ns(bt->wstoen), - print_ns(bt->wstwen), - print_ns(bt->wstbrd)); -} - -/** - * s3c2412_iotiming_calc - calculate all the bank divisor settings. - * @cfg: The current frequency configuration. - * @iot: The bank timing information. - * - * Calculate the timing information for all the banks that are - * configured as IO, using s3c2412_calc_bank(). - */ -int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot) -{ - struct s3c2412_iobank_timing *bt; - int bank; - int ret; - - for (bank = 0; bank < MAX_BANKS; bank++) { - bt = iot->bank[bank].io_2412; - if (!bt) - continue; - - ret = s3c2412_calc_bank(cfg, bt); - if (ret) { - printk(KERN_ERR "%s: cannot calculate bank %d io\n", - __func__, bank); - goto err; - } - } - - return 0; - err: - return ret; -} - -/** - * s3c2412_iotiming_set - set the timing information - * @cfg: The current frequency configuration. - * @iot: The bank timing information. - * - * Set the IO bank information from the details calculated earlier from - * calling s3c2412_iotiming_calc(). - */ -void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot) -{ - struct s3c2412_iobank_timing *bt; - void __iomem *regs; - int bank; - - /* set the io timings from the specifier */ - - for (bank = 0; bank < MAX_BANKS; bank++) { - bt = iot->bank[bank].io_2412; - if (!bt) - continue; - - regs = S3C2412_SSMC_BANK(bank); - - __raw_writel(bt->smbidcyr, regs + SMBIDCYR); - __raw_writel(bt->smbwstrd, regs + SMBWSTRDR); - __raw_writel(bt->smbwstwr, regs + SMBWSTWRR); - __raw_writel(bt->smbwstoen, regs + SMBWSTOENR); - __raw_writel(bt->smbwstwen, regs + SMBWSTWENR); - __raw_writel(bt->smbwstbrd, regs + SMBWSTBRDR); - } -} - -static inline unsigned int s3c2412_decode_timing(unsigned int clock, u32 reg) -{ - return (reg & 0xf) * clock; -} - -static void s3c2412_iotiming_getbank(struct s3c_cpufreq_config *cfg, - struct s3c2412_iobank_timing *bt, - unsigned int bank) -{ - unsigned long clk = cfg->freq.hclk_tns; /* ssmc clock??? */ - void __iomem *regs = S3C2412_SSMC_BANK(bank); - - bt->idcy = s3c2412_decode_timing(clk, __raw_readl(regs + SMBIDCYR)); - bt->wstrd = s3c2412_decode_timing(clk, __raw_readl(regs + SMBWSTRDR)); - bt->wstoen = s3c2412_decode_timing(clk, __raw_readl(regs + SMBWSTOENR)); - bt->wstwen = s3c2412_decode_timing(clk, __raw_readl(regs + SMBWSTWENR)); - bt->wstbrd = s3c2412_decode_timing(clk, __raw_readl(regs + SMBWSTBRDR)); -} - -/** - * bank_is_io - return true if bank is (possibly) IO. - * @bank: The bank number. - * @bankcfg: The value of S3C2412_EBI_BANKCFG. - */ -static inline bool bank_is_io(unsigned int bank, u32 bankcfg) -{ - if (bank < 2) - return true; - - return !(bankcfg & (1 << bank)); -} - -int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings) -{ - struct s3c2412_iobank_timing *bt; - u32 bankcfg = __raw_readl(S3C2412_EBI_BANKCFG); - unsigned int bank; - - /* look through all banks to see what is currently set. */ - - for (bank = 0; bank < MAX_BANKS; bank++) { - if (!bank_is_io(bank, bankcfg)) - continue; - - bt = kzalloc(sizeof(*bt), GFP_KERNEL); - if (!bt) - return -ENOMEM; - - timings->bank[bank].io_2412 = bt; - s3c2412_iotiming_getbank(cfg, bt, bank); - } - - s3c2412_print_timing("get", timings); - return 0; -} - -/* this is in here as it is so small, it doesn't currently warrant a file - * to itself. We expect that any s3c24xx needing this is going to also - * need the iotiming support. - */ -void s3c2412_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) -{ - struct s3c_cpufreq_board *board = cfg->board; - u32 refresh; - - WARN_ON(board == NULL); - - /* Reduce both the refresh time (in ns) and the frequency (in MHz) - * down to ensure that we do not overflow 32 bit numbers. - * - * This should work for HCLK up to 133MHz and refresh period up - * to 30usec. - */ - - refresh = (cfg->freq.hclk / 100) * (board->refresh / 10); - refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */ - refresh &= ((1 << 16) - 1); - - s3c_freq_dbg("%s: refresh value %u\n", __func__, (unsigned int)refresh); - - __raw_writel(refresh, S3C2412_REFRESH); -} diff --git a/arch/arm/mach-s3c/irq-pm-s3c24xx.c b/arch/arm/mach-s3c/irq-pm-s3c24xx.c deleted file mode 100644 index 55f41135ad70..000000000000 --- a/arch/arm/mach-s3c/irq-pm-s3c24xx.c +++ /dev/null @@ -1,115 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2003-2004 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// S3C24XX - IRQ PM code - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/syscore_ops.h> -#include <linux/io.h> - -#include "cpu.h" -#include "pm.h" -#include "map-base.h" -#include "map-s3c.h" - -#include "regs-irq.h" -#include "regs-gpio.h" -#include "pm-core.h" - -#include <asm/irq.h> - -int s3c_irq_wake(struct irq_data *data, unsigned int state) -{ - unsigned long irqbit = 1 << data->hwirq; - - if (!(s3c_irqwake_intallow & irqbit)) - return -ENOENT; - - pr_info("wake %s for hwirq %lu\n", - state ? "enabled" : "disabled", data->hwirq); - - if (!state) - s3c_irqwake_intmask |= irqbit; - else - s3c_irqwake_intmask &= ~irqbit; - - return 0; -} - -static struct sleep_save irq_save[] = { - SAVE_ITEM(S3C2410_INTMSK), - SAVE_ITEM(S3C2410_INTSUBMSK), -}; - -/* the extint values move between the s3c2410/s3c2440 and the s3c2412 - * so we use an array to hold them, and to calculate the address of - * the register at run-time -*/ - -static unsigned long save_extint[3]; -static unsigned long save_eintflt[4]; -static unsigned long save_eintmask; - -static int s3c24xx_irq_suspend(void) -{ - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(save_extint); i++) - save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); - - for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) - save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); - - s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); - save_eintmask = __raw_readl(S3C24XX_EINTMASK); - - return 0; -} - -static void s3c24xx_irq_resume(void) -{ - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(save_extint); i++) - __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); - - for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) - __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); - - s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); - __raw_writel(save_eintmask, S3C24XX_EINTMASK); -} - -struct syscore_ops s3c24xx_irq_syscore_ops = { - .suspend = s3c24xx_irq_suspend, - .resume = s3c24xx_irq_resume, -}; - -#ifdef CONFIG_CPU_S3C2416 -static struct sleep_save s3c2416_irq_save[] = { - SAVE_ITEM(S3C2416_INTMSK2), -}; - -static int s3c2416_irq_suspend(void) -{ - s3c_pm_do_save(s3c2416_irq_save, ARRAY_SIZE(s3c2416_irq_save)); - - return 0; -} - -static void s3c2416_irq_resume(void) -{ - s3c_pm_do_restore(s3c2416_irq_save, ARRAY_SIZE(s3c2416_irq_save)); -} - -struct syscore_ops s3c2416_irq_syscore_ops = { - .suspend = s3c2416_irq_suspend, - .resume = s3c2416_irq_resume, -}; -#endif diff --git a/arch/arm/mach-s3c/irq-s3c24xx-fiq-exports.c b/arch/arm/mach-s3c/irq-s3c24xx-fiq-exports.c deleted file mode 100644 index 84cf86376ded..000000000000 --- a/arch/arm/mach-s3c/irq-s3c24xx-fiq-exports.c +++ /dev/null @@ -1,9 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only - -#include <linux/stddef.h> -#include <linux/export.h> -#include <linux/spi/s3c24xx-fiq.h> - -EXPORT_SYMBOL(s3c24xx_spi_fiq_rx); -EXPORT_SYMBOL(s3c24xx_spi_fiq_txrx); -EXPORT_SYMBOL(s3c24xx_spi_fiq_tx); diff --git a/arch/arm/mach-s3c/irq-s3c24xx-fiq.S b/arch/arm/mach-s3c/irq-s3c24xx-fiq.S deleted file mode 100644 index 5d238d9a798e..000000000000 --- a/arch/arm/mach-s3c/irq-s3c24xx-fiq.S +++ /dev/null @@ -1,112 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* linux/drivers/spi/spi_s3c24xx_fiq.S - * - * Copyright 2009 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX SPI - FIQ pseudo-DMA transfer code -*/ - -#include <linux/linkage.h> -#include <asm/assembler.h> - -#include "map.h" -#include "regs-irq.h" - -#include <linux/spi/s3c24xx-fiq.h> - -#define S3C2410_SPTDAT (0x10) -#define S3C2410_SPRDAT (0x14) - - .text - - @ entry to these routines is as follows, with the register names - @ defined in fiq.h so that they can be shared with the C files which - @ setup the calling registers. - @ - @ fiq_rirq The base of the IRQ registers to find S3C2410_SRCPND - @ fiq_rtmp Temporary register to hold tx/rx data - @ fiq_rspi The base of the SPI register block - @ fiq_rtx The tx buffer pointer - @ fiq_rrx The rx buffer pointer - @ fiq_rcount The number of bytes to move - - @ each entry starts with a word entry of how long it is - @ and an offset to the irq acknowledgment word - -ENTRY(s3c24xx_spi_fiq_rx) - .word fiq_rx_end - fiq_rx_start - .word fiq_rx_irq_ack - fiq_rx_start -fiq_rx_start: - ldr fiq_rtmp, fiq_rx_irq_ack - str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] - - ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] - strb fiq_rtmp, [ fiq_rrx ], #1 - - mov fiq_rtmp, #0xff - strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] - - subs fiq_rcount, fiq_rcount, #1 - subsne pc, lr, #4 @@ return, still have work to do - - @@ set IRQ controller so that next op will trigger IRQ - mov fiq_rtmp, #0 - str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] - subs pc, lr, #4 - -fiq_rx_irq_ack: - .word 0 -fiq_rx_end: - -ENTRY(s3c24xx_spi_fiq_txrx) - .word fiq_txrx_end - fiq_txrx_start - .word fiq_txrx_irq_ack - fiq_txrx_start -fiq_txrx_start: - - ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] - strb fiq_rtmp, [ fiq_rrx ], #1 - - ldr fiq_rtmp, fiq_txrx_irq_ack - str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] - - ldrb fiq_rtmp, [ fiq_rtx ], #1 - strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] - - subs fiq_rcount, fiq_rcount, #1 - subsne pc, lr, #4 @@ return, still have work to do - - mov fiq_rtmp, #0 - str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] - subs pc, lr, #4 - -fiq_txrx_irq_ack: - .word 0 - -fiq_txrx_end: - -ENTRY(s3c24xx_spi_fiq_tx) - .word fiq_tx_end - fiq_tx_start - .word fiq_tx_irq_ack - fiq_tx_start -fiq_tx_start: - ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] - - ldr fiq_rtmp, fiq_tx_irq_ack - str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] - - ldrb fiq_rtmp, [ fiq_rtx ], #1 - strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] - - subs fiq_rcount, fiq_rcount, #1 - subsne pc, lr, #4 @@ return, still have work to do - - mov fiq_rtmp, #0 - str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] - subs pc, lr, #4 - -fiq_tx_irq_ack: - .word 0 - -fiq_tx_end: - - .end diff --git a/arch/arm/mach-s3c/irq-s3c24xx.c b/arch/arm/mach-s3c/irq-s3c24xx.c deleted file mode 100644 index 088cc04b7431..000000000000 --- a/arch/arm/mach-s3c/irq-s3c24xx.c +++ /dev/null @@ -1,1352 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * S3C24XX IRQ handling - * - * Copyright (c) 2003-2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * Copyright (c) 2012 Heiko Stuebner <heiko@sntech.de> -*/ - -#include <linux/init.h> -#include <linux/slab.h> -#include <linux/module.h> -#include <linux/io.h> -#include <linux/err.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/device.h> -#include <linux/irqdomain.h> -#include <linux/irqchip.h> -#include <linux/irqchip/chained_irq.h> -#include <linux/of.h> -#include <linux/of_irq.h> -#include <linux/of_address.h> -#include <linux/spi/s3c24xx.h> - -#include <asm/exception.h> -#include <asm/mach/irq.h> - -#include "irqs.h" -#include "regs-irq.h" -#include "regs-gpio.h" - -#include "cpu.h" -#include "regs-irqtype.h" -#include "pm.h" -#include "s3c24xx.h" - -#define S3C_IRQTYPE_NONE 0 -#define S3C_IRQTYPE_EINT 1 -#define S3C_IRQTYPE_EDGE 2 -#define S3C_IRQTYPE_LEVEL 3 - -struct s3c_irq_data { - unsigned int type; - unsigned long offset; - unsigned long parent_irq; - - /* data gets filled during init */ - struct s3c_irq_intc *intc; - unsigned long sub_bits; - struct s3c_irq_intc *sub_intc; -}; - -/* - * Structure holding the controller data - * @reg_pending register holding pending irqs - * @reg_intpnd special register intpnd in main intc - * @reg_mask mask register - * @domain irq_domain of the controller - * @parent parent controller for ext and sub irqs - * @irqs irq-data, always s3c_irq_data[32] - */ -struct s3c_irq_intc { - void __iomem *reg_pending; - void __iomem *reg_intpnd; - void __iomem *reg_mask; - struct irq_domain *domain; - struct s3c_irq_intc *parent; - struct s3c_irq_data *irqs; -}; - -/* - * Array holding pointers to the global controller structs - * [0] ... main_intc - * [1] ... sub_intc - * [2] ... main_intc2 on s3c2416 - */ -static struct s3c_irq_intc *s3c_intc[3]; - -static void s3c_irq_mask(struct irq_data *data) -{ - struct s3c_irq_data *irq_data = irq_data_get_irq_chip_data(data); - struct s3c_irq_intc *intc = irq_data->intc; - struct s3c_irq_intc *parent_intc = intc->parent; - struct s3c_irq_data *parent_data; - unsigned long mask; - unsigned int irqno; - - mask = readl_relaxed(intc->reg_mask); - mask |= (1UL << irq_data->offset); - writel_relaxed(mask, intc->reg_mask); - - if (parent_intc) { - parent_data = &parent_intc->irqs[irq_data->parent_irq]; - - /* check to see if we need to mask the parent IRQ - * The parent_irq is always in main_intc, so the hwirq - * for find_mapping does not need an offset in any case. - */ - if ((mask & parent_data->sub_bits) == parent_data->sub_bits) { - irqno = irq_find_mapping(parent_intc->domain, - irq_data->parent_irq); - s3c_irq_mask(irq_get_irq_data(irqno)); - } - } -} - -static void s3c_irq_unmask(struct irq_data *data) -{ - struct s3c_irq_data *irq_data = irq_data_get_irq_chip_data(data); - struct s3c_irq_intc *intc = irq_data->intc; - struct s3c_irq_intc *parent_intc = intc->parent; - unsigned long mask; - unsigned int irqno; - - mask = readl_relaxed(intc->reg_mask); - mask &= ~(1UL << irq_data->offset); - writel_relaxed(mask, intc->reg_mask); - - if (parent_intc) { - irqno = irq_find_mapping(parent_intc->domain, - irq_data->parent_irq); - s3c_irq_unmask(irq_get_irq_data(irqno)); - } -} - -static inline void s3c_irq_ack(struct irq_data *data) -{ - struct s3c_irq_data *irq_data = irq_data_get_irq_chip_data(data); - struct s3c_irq_intc *intc = irq_data->intc; - unsigned long bitval = 1UL << irq_data->offset; - - writel_relaxed(bitval, intc->reg_pending); - if (intc->reg_intpnd) - writel_relaxed(bitval, intc->reg_intpnd); -} - -static int s3c_irq_type(struct irq_data *data, unsigned int type) -{ - switch (type) { - case IRQ_TYPE_NONE: - break; - case IRQ_TYPE_EDGE_RISING: - case IRQ_TYPE_EDGE_FALLING: - case IRQ_TYPE_EDGE_BOTH: - irq_set_handler(data->irq, handle_edge_irq); - break; - case IRQ_TYPE_LEVEL_LOW: - case IRQ_TYPE_LEVEL_HIGH: - irq_set_handler(data->irq, handle_level_irq); - break; - default: - pr_err("No such irq type %d\n", type); - return -EINVAL; - } - - return 0; -} - -static int s3c_irqext_type_set(void __iomem *gpcon_reg, - void __iomem *extint_reg, - unsigned long gpcon_offset, - unsigned long extint_offset, - unsigned int type) -{ - unsigned long newvalue = 0, value; - - /* Set the GPIO to external interrupt mode */ - value = readl_relaxed(gpcon_reg); - value = (value & ~(3 << gpcon_offset)) | (0x02 << gpcon_offset); - writel_relaxed(value, gpcon_reg); - - /* Set the external interrupt to pointed trigger type */ - switch (type) - { - case IRQ_TYPE_NONE: - pr_warn("No edge setting!\n"); - break; - - case IRQ_TYPE_EDGE_RISING: - newvalue = S3C2410_EXTINT_RISEEDGE; - break; - - case IRQ_TYPE_EDGE_FALLING: - newvalue = S3C2410_EXTINT_FALLEDGE; - break; - - case IRQ_TYPE_EDGE_BOTH: - newvalue = S3C2410_EXTINT_BOTHEDGE; - break; - - case IRQ_TYPE_LEVEL_LOW: - newvalue = S3C2410_EXTINT_LOWLEV; - break; - - case IRQ_TYPE_LEVEL_HIGH: - newvalue = S3C2410_EXTINT_HILEV; - break; - - default: - pr_err("No such irq type %d\n", type); - return -EINVAL; - } - - value = readl_relaxed(extint_reg); - value = (value & ~(7 << extint_offset)) | (newvalue << extint_offset); - writel_relaxed(value, extint_reg); - - return 0; -} - -static int s3c_irqext_type(struct irq_data *data, unsigned int type) -{ - void __iomem *extint_reg; - void __iomem *gpcon_reg; - unsigned long gpcon_offset, extint_offset; - - if ((data->hwirq >= 4) && (data->hwirq <= 7)) { - gpcon_reg = S3C2410_GPFCON; - extint_reg = S3C24XX_EXTINT0; - gpcon_offset = (data->hwirq) * 2; - extint_offset = (data->hwirq) * 4; - } else if ((data->hwirq >= 8) && (data->hwirq <= 15)) { - gpcon_reg = S3C2410_GPGCON; - extint_reg = S3C24XX_EXTINT1; - gpcon_offset = (data->hwirq - 8) * 2; - extint_offset = (data->hwirq - 8) * 4; - } else if ((data->hwirq >= 16) && (data->hwirq <= 23)) { - gpcon_reg = S3C2410_GPGCON; - extint_reg = S3C24XX_EXTINT2; - gpcon_offset = (data->hwirq - 8) * 2; - extint_offset = (data->hwirq - 16) * 4; - } else { - return -EINVAL; - } - - return s3c_irqext_type_set(gpcon_reg, extint_reg, gpcon_offset, - extint_offset, type); -} - -static int s3c_irqext0_type(struct irq_data *data, unsigned int type) -{ - void __iomem *extint_reg; - void __iomem *gpcon_reg; - unsigned long gpcon_offset, extint_offset; - - if (data->hwirq <= 3) { - gpcon_reg = S3C2410_GPFCON; - extint_reg = S3C24XX_EXTINT0; - gpcon_offset = (data->hwirq) * 2; - extint_offset = (data->hwirq) * 4; - } else { - return -EINVAL; - } - - return s3c_irqext_type_set(gpcon_reg, extint_reg, gpcon_offset, - extint_offset, type); -} - -static struct irq_chip s3c_irq_chip = { - .name = "s3c", - .irq_ack = s3c_irq_ack, - .irq_mask = s3c_irq_mask, - .irq_unmask = s3c_irq_unmask, - .irq_set_type = s3c_irq_type, - .irq_set_wake = s3c_irq_wake -}; - -static struct irq_chip s3c_irq_level_chip = { - .name = "s3c-level", - .irq_mask = s3c_irq_mask, - .irq_unmask = s3c_irq_unmask, - .irq_ack = s3c_irq_ack, - .irq_set_type = s3c_irq_type, -}; - -static struct irq_chip s3c_irqext_chip = { - .name = "s3c-ext", - .irq_mask = s3c_irq_mask, - .irq_unmask = s3c_irq_unmask, - .irq_ack = s3c_irq_ack, - .irq_set_type = s3c_irqext_type, - .irq_set_wake = s3c_irqext_wake -}; - -static struct irq_chip s3c_irq_eint0t4 = { - .name = "s3c-ext0", - .irq_ack = s3c_irq_ack, - .irq_mask = s3c_irq_mask, - .irq_unmask = s3c_irq_unmask, - .irq_set_wake = s3c_irq_wake, - .irq_set_type = s3c_irqext0_type, -}; - -static void s3c_irq_demux(struct irq_desc *desc) -{ - struct irq_chip *chip = irq_desc_get_chip(desc); - struct s3c_irq_data *irq_data = irq_desc_get_chip_data(desc); - struct s3c_irq_intc *intc = irq_data->intc; - struct s3c_irq_intc *sub_intc = irq_data->sub_intc; - unsigned int n, offset; - unsigned long src, msk; - - /* we're using individual domains for the non-dt case - * and one big domain for the dt case where the subintc - * starts at hwirq number 32. - */ - offset = irq_domain_get_of_node(intc->domain) ? 32 : 0; - - chained_irq_enter(chip, desc); - - src = readl_relaxed(sub_intc->reg_pending); - msk = readl_relaxed(sub_intc->reg_mask); - - src &= ~msk; - src &= irq_data->sub_bits; - - while (src) { - n = __ffs(src); - src &= ~(1 << n); - generic_handle_domain_irq(sub_intc->domain, offset + n); - } - - chained_irq_exit(chip, desc); -} - -static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc, - struct pt_regs *regs, int intc_offset) -{ - int pnd; - int offset; - - pnd = readl_relaxed(intc->reg_intpnd); - if (!pnd) - return false; - - /* non-dt machines use individual domains */ - if (!irq_domain_get_of_node(intc->domain)) - intc_offset = 0; - - /* We have a problem that the INTOFFSET register does not always - * show one interrupt. Occasionally we get two interrupts through - * the prioritiser, and this causes the INTOFFSET register to show - * what looks like the logical-or of the two interrupt numbers. - * - * Thanks to Klaus, Shannon, et al for helping to debug this problem - */ - offset = readl_relaxed(intc->reg_intpnd + 4); - - /* Find the bit manually, when the offset is wrong. - * The pending register only ever contains the one bit of the next - * interrupt to handle. - */ - if (!(pnd & (1 << offset))) - offset = __ffs(pnd); - - generic_handle_domain_irq(intc->domain, intc_offset + offset); - return true; -} - -static asmlinkage void __exception_irq_entry s3c24xx_handle_irq(struct pt_regs *regs) -{ - do { - /* - * For platform based machines, neither ERR nor NULL can happen here. - * The s3c24xx_handle_irq() will be set as IRQ handler iff this succeeds: - * - * s3c_intc[0] = s3c24xx_init_intc() - * - * If this fails, the next calls to s3c24xx_init_intc() won't be executed. - * - * For DT machine, s3c_init_intc_of() could set the IRQ handler without - * setting s3c_intc[0] only if it was called with num_ctrl=0. There is no - * such code path, so again the s3c_intc[0] will have a valid pointer if - * set_handle_irq() is called. - * - * Therefore in s3c24xx_handle_irq(), the s3c_intc[0] is always something. - */ - if (s3c24xx_handle_intc(s3c_intc[0], regs, 0)) - continue; - - if (!IS_ERR_OR_NULL(s3c_intc[2])) - if (s3c24xx_handle_intc(s3c_intc[2], regs, 64)) - continue; - - break; - } while (1); -} - -#ifdef CONFIG_FIQ -/** - * s3c24xx_set_fiq - set the FIQ routing - * @irq: IRQ number to route to FIQ on processor. - * @ack_ptr: pointer to a location for storing the bit mask - * @on: Whether to route @irq to the FIQ, or to remove the FIQ routing. - * - * Change the state of the IRQ to FIQ routing depending on @irq and @on. If - * @on is true, the @irq is checked to see if it can be routed and the - * interrupt controller updated to route the IRQ. If @on is false, the FIQ - * routing is cleared, regardless of which @irq is specified. - * - * returns the mask value for the register. - */ -int s3c24xx_set_fiq(unsigned int irq, u32 *ack_ptr, bool on) -{ - u32 intmod; - unsigned offs; - - if (on) { - offs = irq - FIQ_START; - if (offs > 31) - return 0; - - intmod = 1 << offs; - } else { - intmod = 0; - } - - if (ack_ptr) - *ack_ptr = intmod; - writel_relaxed(intmod, S3C2410_INTMOD); - - return intmod; -} - -EXPORT_SYMBOL_GPL(s3c24xx_set_fiq); -#endif - -static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -{ - struct s3c_irq_intc *intc = h->host_data; - struct s3c_irq_data *irq_data = &intc->irqs[hw]; - struct s3c_irq_intc *parent_intc; - struct s3c_irq_data *parent_irq_data; - unsigned int irqno; - - /* attach controller pointer to irq_data */ - irq_data->intc = intc; - irq_data->offset = hw; - - parent_intc = intc->parent; - - /* set handler and flags */ - switch (irq_data->type) { - case S3C_IRQTYPE_NONE: - return 0; - case S3C_IRQTYPE_EINT: - /* On the S3C2412, the EINT0to3 have a parent irq - * but need the s3c_irq_eint0t4 chip - */ - if (parent_intc && (!soc_is_s3c2412() || hw >= 4)) - irq_set_chip_and_handler(virq, &s3c_irqext_chip, - handle_edge_irq); - else - irq_set_chip_and_handler(virq, &s3c_irq_eint0t4, - handle_edge_irq); - break; - case S3C_IRQTYPE_EDGE: - if (parent_intc || intc->reg_pending == S3C2416_SRCPND2) - irq_set_chip_and_handler(virq, &s3c_irq_level_chip, - handle_edge_irq); - else - irq_set_chip_and_handler(virq, &s3c_irq_chip, - handle_edge_irq); - break; - case S3C_IRQTYPE_LEVEL: - if (parent_intc) - irq_set_chip_and_handler(virq, &s3c_irq_level_chip, - handle_level_irq); - else - irq_set_chip_and_handler(virq, &s3c_irq_chip, - handle_level_irq); - break; - default: - pr_err("irq-s3c24xx: unsupported irqtype %d\n", irq_data->type); - return -EINVAL; - } - - irq_set_chip_data(virq, irq_data); - - if (parent_intc && irq_data->type != S3C_IRQTYPE_NONE) { - if (irq_data->parent_irq > 31) { - pr_err("irq-s3c24xx: parent irq %lu is out of range\n", - irq_data->parent_irq); - return -EINVAL; - } - - parent_irq_data = &parent_intc->irqs[irq_data->parent_irq]; - parent_irq_data->sub_intc = intc; - parent_irq_data->sub_bits |= (1UL << hw); - - /* attach the demuxer to the parent irq */ - irqno = irq_find_mapping(parent_intc->domain, - irq_data->parent_irq); - if (!irqno) { - pr_err("irq-s3c24xx: could not find mapping for parent irq %lu\n", - irq_data->parent_irq); - return -EINVAL; - } - irq_set_chained_handler(irqno, s3c_irq_demux); - } - - return 0; -} - -static const struct irq_domain_ops s3c24xx_irq_ops = { - .map = s3c24xx_irq_map, - .xlate = irq_domain_xlate_twocell, -}; - -static void s3c24xx_clear_intc(struct s3c_irq_intc *intc) -{ - void __iomem *reg_source; - unsigned long pend; - unsigned long last; - int i; - - /* if intpnd is set, read the next pending irq from there */ - reg_source = intc->reg_intpnd ? intc->reg_intpnd : intc->reg_pending; - - last = 0; - for (i = 0; i < 4; i++) { - pend = readl_relaxed(reg_source); - - if (pend == 0 || pend == last) - break; - - writel_relaxed(pend, intc->reg_pending); - if (intc->reg_intpnd) - writel_relaxed(pend, intc->reg_intpnd); - - pr_info("irq: clearing pending status %08x\n", (int)pend); - last = pend; - } -} - -static struct s3c_irq_intc * __init s3c24xx_init_intc(struct device_node *np, - struct s3c_irq_data *irq_data, - struct s3c_irq_intc *parent, - unsigned long address) -{ - struct s3c_irq_intc *intc; - void __iomem *base = (void *)0xf6000000; /* static mapping */ - int irq_num; - int irq_start; - int ret; - - intc = kzalloc(sizeof(struct s3c_irq_intc), GFP_KERNEL); - if (!intc) - return ERR_PTR(-ENOMEM); - - intc->irqs = irq_data; - - if (parent) - intc->parent = parent; - - /* select the correct data for the controller. - * Need to hard code the irq num start and offset - * to preserve the static mapping for now - */ - switch (address) { - case 0x4a000000: - pr_debug("irq: found main intc\n"); - intc->reg_pending = base; - intc->reg_mask = base + 0x08; - intc->reg_intpnd = base + 0x10; - irq_num = 32; - irq_start = S3C2410_IRQ(0); - break; - case 0x4a000018: - pr_debug("irq: found subintc\n"); - intc->reg_pending = base + 0x18; - intc->reg_mask = base + 0x1c; - irq_num = 29; - irq_start = S3C2410_IRQSUB(0); - break; - case 0x4a000040: - pr_debug("irq: found intc2\n"); - intc->reg_pending = base + 0x40; - intc->reg_mask = base + 0x48; - intc->reg_intpnd = base + 0x50; - irq_num = 8; - irq_start = S3C2416_IRQ(0); - break; - case 0x560000a4: - pr_debug("irq: found eintc\n"); - base = (void *)0xfd000000; - - intc->reg_mask = base + 0xa4; - intc->reg_pending = base + 0xa8; - irq_num = 24; - irq_start = S3C2410_IRQ(32); - break; - default: - pr_err("irq: unsupported controller address\n"); - ret = -EINVAL; - goto err; - } - - /* now that all the data is complete, init the irq-domain */ - s3c24xx_clear_intc(intc); - intc->domain = irq_domain_add_legacy(np, irq_num, irq_start, - 0, &s3c24xx_irq_ops, - intc); - if (!intc->domain) { - pr_err("irq: could not create irq-domain\n"); - ret = -EINVAL; - goto err; - } - - set_handle_irq(s3c24xx_handle_irq); - - return intc; - -err: - kfree(intc); - return ERR_PTR(ret); -} - -static struct s3c_irq_data __maybe_unused init_eint[32] = { - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT4 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT5 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT6 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT7 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT8 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT9 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT10 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT11 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT12 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT13 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT14 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT15 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT16 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT17 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT18 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT19 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT20 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT21 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT22 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT23 */ -}; - -#ifdef CONFIG_CPU_S3C2410 -static struct s3c_irq_data init_s3c2410base[32] = { - { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ - { .type = S3C_IRQTYPE_EDGE, }, /* WDT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* LCD */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SDI */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ - { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ -}; - -static struct s3c_irq_data init_s3c2410subint[32] = { - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ -}; - -void __init s3c2410_init_irq(void) -{ -#ifdef CONFIG_FIQ - init_FIQ(FIQ_START); -#endif - - s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2410base[0], NULL, - 0x4a000000); - if (IS_ERR(s3c_intc[0])) { - pr_err("irq: could not create main interrupt controller\n"); - return; - } - - s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2410subint[0], - s3c_intc[0], 0x4a000018); - s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); -} -#endif - -#ifdef CONFIG_CPU_S3C2412 -static struct s3c_irq_data init_s3c2412base[32] = { - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT0 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT1 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT2 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT3 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ - { .type = S3C_IRQTYPE_EDGE, }, /* WDT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* LCD */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA3 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* SDI/CF */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ - { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ -}; - -static struct s3c_irq_data init_s3c2412eint[32] = { - { .type = S3C_IRQTYPE_EINT, .parent_irq = 0 }, /* EINT0 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 1 }, /* EINT1 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 2 }, /* EINT2 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 3 }, /* EINT3 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT4 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT5 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT6 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT7 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT8 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT9 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT10 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT11 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT12 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT13 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT14 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT15 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT16 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT17 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT18 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT19 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT20 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT21 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT22 */ - { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT23 */ -}; - -static struct s3c_irq_data init_s3c2412subint[32] = { - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ - { .type = S3C_IRQTYPE_NONE, }, - { .type = S3C_IRQTYPE_NONE, }, - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 21 }, /* SDI */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 21 }, /* CF */ -}; - -void __init s3c2412_init_irq(void) -{ - pr_info("S3C2412: IRQ Support\n"); - -#ifdef CONFIG_FIQ - init_FIQ(FIQ_START); -#endif - - s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2412base[0], NULL, - 0x4a000000); - if (IS_ERR(s3c_intc[0])) { - pr_err("irq: could not create main interrupt controller\n"); - return; - } - - s3c24xx_init_intc(NULL, &init_s3c2412eint[0], s3c_intc[0], 0x560000a4); - s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2412subint[0], - s3c_intc[0], 0x4a000018); -} -#endif - -#ifdef CONFIG_CPU_S3C2416 -static struct s3c_irq_data init_s3c2416base[32] = { - { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ - { .type = S3C_IRQTYPE_LEVEL, }, /* WDT/AC97 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* LCD */ - { .type = S3C_IRQTYPE_LEVEL, }, /* DMA */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART3 */ - { .type = S3C_IRQTYPE_NONE, }, /* reserved */ - { .type = S3C_IRQTYPE_EDGE, }, /* SDI1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SDI0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* NAND */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ - { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ - { .type = S3C_IRQTYPE_NONE, }, - { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ -}; - -static struct s3c_irq_data init_s3c2416subint[32] = { - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD2 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD3 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD4 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA0 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA1 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA2 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA3 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA4 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA5 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* WDT */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* AC97 */ -}; - -static struct s3c_irq_data init_s3c2416_second[32] = { - { .type = S3C_IRQTYPE_EDGE }, /* 2D */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_EDGE }, /* PCM0 */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_EDGE }, /* I2S0 */ -}; - -void __init s3c2416_init_irq(void) -{ - pr_info("S3C2416: IRQ Support\n"); - -#ifdef CONFIG_FIQ - init_FIQ(FIQ_START); -#endif - - s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2416base[0], NULL, - 0x4a000000); - if (IS_ERR(s3c_intc[0])) { - pr_err("irq: could not create main interrupt controller\n"); - return; - } - - s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); - s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2416subint[0], - s3c_intc[0], 0x4a000018); - - s3c_intc[2] = s3c24xx_init_intc(NULL, &init_s3c2416_second[0], - NULL, 0x4a000040); -} - -#endif - -#ifdef CONFIG_CPU_S3C2440 -static struct s3c_irq_data init_s3c2440base[32] = { - { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* CAM */ - { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ - { .type = S3C_IRQTYPE_LEVEL, }, /* WDT/AC97 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* LCD */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SDI */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* NFCON */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ - { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ -}; - -static struct s3c_irq_data init_s3c2440subint[32] = { - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_C */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_P */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* WDT */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* AC97 */ -}; - -void __init s3c2440_init_irq(void) -{ - pr_info("S3C2440: IRQ Support\n"); - -#ifdef CONFIG_FIQ - init_FIQ(FIQ_START); -#endif - - s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2440base[0], NULL, - 0x4a000000); - if (IS_ERR(s3c_intc[0])) { - pr_err("irq: could not create main interrupt controller\n"); - return; - } - - s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); - s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2440subint[0], - s3c_intc[0], 0x4a000018); -} -#endif - -#ifdef CONFIG_CPU_S3C2442 -static struct s3c_irq_data init_s3c2442base[32] = { - { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* CAM */ - { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ - { .type = S3C_IRQTYPE_EDGE, }, /* WDT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* LCD */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* DMA3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SDI */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* NFCON */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ - { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ -}; - -static struct s3c_irq_data init_s3c2442subint[32] = { - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_C */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_P */ -}; - -void __init s3c2442_init_irq(void) -{ - pr_info("S3C2442: IRQ Support\n"); - -#ifdef CONFIG_FIQ - init_FIQ(FIQ_START); -#endif - - s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2442base[0], NULL, - 0x4a000000); - if (IS_ERR(s3c_intc[0])) { - pr_err("irq: could not create main interrupt controller\n"); - return; - } - - s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); - s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2442subint[0], - s3c_intc[0], 0x4a000018); -} -#endif - -#ifdef CONFIG_CPU_S3C2443 -static struct s3c_irq_data init_s3c2443base[32] = { - { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ - { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* CAM */ - { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ - { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ - { .type = S3C_IRQTYPE_LEVEL, }, /* WDT/AC97 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* LCD */ - { .type = S3C_IRQTYPE_LEVEL, }, /* DMA */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART3 */ - { .type = S3C_IRQTYPE_EDGE, }, /* CFON */ - { .type = S3C_IRQTYPE_EDGE, }, /* SDI1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SDI0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* NAND */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ - { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ - { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ - { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ - { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ - { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ -}; - - -static struct s3c_irq_data init_s3c2443subint[32] = { - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ - { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_C */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_P */ - { .type = S3C_IRQTYPE_NONE }, /* reserved */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD1 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD2 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD3 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD4 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA0 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA1 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA2 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA3 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA4 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA5 */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-RX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-TX */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-ERR */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* WDT */ - { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* AC97 */ -}; - -void __init s3c2443_init_irq(void) -{ - pr_info("S3C2443: IRQ Support\n"); - -#ifdef CONFIG_FIQ - init_FIQ(FIQ_START); -#endif - - s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2443base[0], NULL, - 0x4a000000); - if (IS_ERR(s3c_intc[0])) { - pr_err("irq: could not create main interrupt controller\n"); - return; - } - - s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); - s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2443subint[0], - s3c_intc[0], 0x4a000018); -} -#endif - -#ifdef CONFIG_OF -static int s3c24xx_irq_map_of(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -{ - unsigned int ctrl_num = hw / 32; - unsigned int intc_hw = hw % 32; - struct s3c_irq_intc *intc = s3c_intc[ctrl_num]; - struct s3c_irq_intc *parent_intc = intc->parent; - struct s3c_irq_data *irq_data = &intc->irqs[intc_hw]; - - /* attach controller pointer to irq_data */ - irq_data->intc = intc; - irq_data->offset = intc_hw; - - if (!parent_intc) - irq_set_chip_and_handler(virq, &s3c_irq_chip, handle_edge_irq); - else - irq_set_chip_and_handler(virq, &s3c_irq_level_chip, - handle_edge_irq); - - irq_set_chip_data(virq, irq_data); - - return 0; -} - -/* Translate our of irq notation - * format: <ctrl_num ctrl_irq parent_irq type> - */ -static int s3c24xx_irq_xlate_of(struct irq_domain *d, struct device_node *n, - const u32 *intspec, unsigned int intsize, - irq_hw_number_t *out_hwirq, unsigned int *out_type) -{ - struct s3c_irq_intc *intc; - struct s3c_irq_intc *parent_intc; - struct s3c_irq_data *irq_data; - struct s3c_irq_data *parent_irq_data; - int irqno; - - if (WARN_ON(intsize < 4)) - return -EINVAL; - - if (intspec[0] > 2 || !s3c_intc[intspec[0]]) { - pr_err("controller number %d invalid\n", intspec[0]); - return -EINVAL; - } - intc = s3c_intc[intspec[0]]; - - *out_hwirq = intspec[0] * 32 + intspec[2]; - *out_type = intspec[3] & IRQ_TYPE_SENSE_MASK; - - parent_intc = intc->parent; - if (parent_intc) { - irq_data = &intc->irqs[intspec[2]]; - irq_data->parent_irq = intspec[1]; - parent_irq_data = &parent_intc->irqs[irq_data->parent_irq]; - parent_irq_data->sub_intc = intc; - parent_irq_data->sub_bits |= (1UL << intspec[2]); - - /* parent_intc is always s3c_intc[0], so no offset */ - irqno = irq_create_mapping(parent_intc->domain, intspec[1]); - if (irqno < 0) { - pr_err("irq: could not map parent interrupt\n"); - return irqno; - } - - irq_set_chained_handler(irqno, s3c_irq_demux); - } - - return 0; -} - -static const struct irq_domain_ops s3c24xx_irq_ops_of = { - .map = s3c24xx_irq_map_of, - .xlate = s3c24xx_irq_xlate_of, -}; - -struct s3c24xx_irq_of_ctrl { - char *name; - unsigned long offset; - struct s3c_irq_intc **handle; - struct s3c_irq_intc **parent; - struct irq_domain_ops *ops; -}; - -static int __init s3c_init_intc_of(struct device_node *np, - struct device_node *interrupt_parent, - struct s3c24xx_irq_of_ctrl *s3c_ctrl, int num_ctrl) -{ - struct s3c_irq_intc *intc; - struct s3c24xx_irq_of_ctrl *ctrl; - struct irq_domain *domain; - void __iomem *reg_base; - int i; - - reg_base = of_iomap(np, 0); - if (!reg_base) { - pr_err("irq-s3c24xx: could not map irq registers\n"); - return -EINVAL; - } - - domain = irq_domain_add_linear(np, num_ctrl * 32, - &s3c24xx_irq_ops_of, NULL); - if (!domain) { - pr_err("irq: could not create irq-domain\n"); - return -EINVAL; - } - - for (i = 0; i < num_ctrl; i++) { - ctrl = &s3c_ctrl[i]; - - pr_debug("irq: found controller %s\n", ctrl->name); - - intc = kzalloc(sizeof(struct s3c_irq_intc), GFP_KERNEL); - if (!intc) - return -ENOMEM; - - intc->domain = domain; - intc->irqs = kcalloc(32, sizeof(struct s3c_irq_data), - GFP_KERNEL); - if (!intc->irqs) { - kfree(intc); - return -ENOMEM; - } - - if (ctrl->parent) { - intc->reg_pending = reg_base + ctrl->offset; - intc->reg_mask = reg_base + ctrl->offset + 0x4; - - if (*(ctrl->parent)) { - intc->parent = *(ctrl->parent); - } else { - pr_warn("irq: parent of %s missing\n", - ctrl->name); - kfree(intc->irqs); - kfree(intc); - continue; - } - } else { - intc->reg_pending = reg_base + ctrl->offset; - intc->reg_mask = reg_base + ctrl->offset + 0x08; - intc->reg_intpnd = reg_base + ctrl->offset + 0x10; - } - - s3c24xx_clear_intc(intc); - s3c_intc[i] = intc; - } - - set_handle_irq(s3c24xx_handle_irq); - - return 0; -} - -static struct s3c24xx_irq_of_ctrl s3c2410_ctrl[] = { - { - .name = "intc", - .offset = 0, - }, { - .name = "subintc", - .offset = 0x18, - .parent = &s3c_intc[0], - } -}; - -static int __init s3c2410_init_intc_of(struct device_node *np, - struct device_node *interrupt_parent) -{ - return s3c_init_intc_of(np, interrupt_parent, - s3c2410_ctrl, ARRAY_SIZE(s3c2410_ctrl)); -} -IRQCHIP_DECLARE(s3c2410_irq, "samsung,s3c2410-irq", s3c2410_init_intc_of); - -static struct s3c24xx_irq_of_ctrl s3c2416_ctrl[] = { - { - .name = "intc", - .offset = 0, - }, { - .name = "subintc", - .offset = 0x18, - .parent = &s3c_intc[0], - }, { - .name = "intc2", - .offset = 0x40, - } -}; - -static int __init s3c2416_init_intc_of(struct device_node *np, - struct device_node *interrupt_parent) -{ - return s3c_init_intc_of(np, interrupt_parent, - s3c2416_ctrl, ARRAY_SIZE(s3c2416_ctrl)); -} -IRQCHIP_DECLARE(s3c2416_irq, "samsung,s3c2416-irq", s3c2416_init_intc_of); -#endif diff --git a/arch/arm/mach-s3c/irqs-s3c24xx.h b/arch/arm/mach-s3c/irqs-s3c24xx.h deleted file mode 100644 index fecbf7e440c6..000000000000 --- a/arch/arm/mach-s3c/irqs-s3c24xx.h +++ /dev/null @@ -1,219 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - */ - - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ - -/* we keep the first set of CPU IRQs out of the range of - * the ISA space, so that the PC104 has them to itself - * and we don't end up having to do horrible things to the - * standard ISA drivers.... - */ - -#define S3C2410_CPUIRQ_OFFSET (16) - -#define S3C2410_IRQ(x) ((x) + S3C2410_CPUIRQ_OFFSET) - -/* main cpu interrupts */ -#define IRQ_EINT0 S3C2410_IRQ(0) /* 16 */ -#define IRQ_EINT1 S3C2410_IRQ(1) -#define IRQ_EINT2 S3C2410_IRQ(2) -#define IRQ_EINT3 S3C2410_IRQ(3) -#define IRQ_EINT4t7 S3C2410_IRQ(4) /* 20 */ -#define IRQ_EINT8t23 S3C2410_IRQ(5) -#define IRQ_RESERVED6 S3C2410_IRQ(6) /* for s3c2410 */ -#define IRQ_CAM S3C2410_IRQ(6) /* for s3c2440,s3c2443 */ -#define IRQ_BATT_FLT S3C2410_IRQ(7) -#define IRQ_TICK S3C2410_IRQ(8) /* 24 */ -#define IRQ_WDT S3C2410_IRQ(9) /* WDT/AC97 for s3c2443 */ -#define IRQ_TIMER0 S3C2410_IRQ(10) -#define IRQ_TIMER1 S3C2410_IRQ(11) -#define IRQ_TIMER2 S3C2410_IRQ(12) -#define IRQ_TIMER3 S3C2410_IRQ(13) -#define IRQ_TIMER4 S3C2410_IRQ(14) -#define IRQ_UART2 S3C2410_IRQ(15) -#define IRQ_LCD S3C2410_IRQ(16) /* 32 */ -#define IRQ_DMA0 S3C2410_IRQ(17) /* IRQ_DMA for s3c2443 */ -#define IRQ_DMA1 S3C2410_IRQ(18) -#define IRQ_DMA2 S3C2410_IRQ(19) -#define IRQ_DMA3 S3C2410_IRQ(20) -#define IRQ_SDI S3C2410_IRQ(21) -#define IRQ_SPI0 S3C2410_IRQ(22) -#define IRQ_UART1 S3C2410_IRQ(23) -#define IRQ_RESERVED24 S3C2410_IRQ(24) /* 40 */ -#define IRQ_NFCON S3C2410_IRQ(24) /* for s3c2440 */ -#define IRQ_USBD S3C2410_IRQ(25) -#define IRQ_USBH S3C2410_IRQ(26) -#define IRQ_IIC S3C2410_IRQ(27) -#define IRQ_UART0 S3C2410_IRQ(28) /* 44 */ -#define IRQ_SPI1 S3C2410_IRQ(29) -#define IRQ_RTC S3C2410_IRQ(30) -#define IRQ_ADCPARENT S3C2410_IRQ(31) - -/* interrupts generated from the external interrupts sources */ -#define IRQ_EINT0_2412 S3C2410_IRQ(32) -#define IRQ_EINT1_2412 S3C2410_IRQ(33) -#define IRQ_EINT2_2412 S3C2410_IRQ(34) -#define IRQ_EINT3_2412 S3C2410_IRQ(35) -#define IRQ_EINT4 S3C2410_IRQ(36) /* 52 */ -#define IRQ_EINT5 S3C2410_IRQ(37) -#define IRQ_EINT6 S3C2410_IRQ(38) -#define IRQ_EINT7 S3C2410_IRQ(39) -#define IRQ_EINT8 S3C2410_IRQ(40) -#define IRQ_EINT9 S3C2410_IRQ(41) -#define IRQ_EINT10 S3C2410_IRQ(42) -#define IRQ_EINT11 S3C2410_IRQ(43) -#define IRQ_EINT12 S3C2410_IRQ(44) -#define IRQ_EINT13 S3C2410_IRQ(45) -#define IRQ_EINT14 S3C2410_IRQ(46) -#define IRQ_EINT15 S3C2410_IRQ(47) -#define IRQ_EINT16 S3C2410_IRQ(48) -#define IRQ_EINT17 S3C2410_IRQ(49) -#define IRQ_EINT18 S3C2410_IRQ(50) -#define IRQ_EINT19 S3C2410_IRQ(51) -#define IRQ_EINT20 S3C2410_IRQ(52) /* 68 */ -#define IRQ_EINT21 S3C2410_IRQ(53) -#define IRQ_EINT22 S3C2410_IRQ(54) -#define IRQ_EINT23 S3C2410_IRQ(55) - -#define IRQ_EINT_BIT(x) ((x) - IRQ_EINT4 + 4) -#define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x))) - -#define IRQ_LCD_FIFO S3C2410_IRQ(56) -#define IRQ_LCD_FRAME S3C2410_IRQ(57) - -/* IRQs for the interal UARTs, and ADC - * these need to be ordered in number of appearance in the - * SUBSRC mask register -*/ - -#define S3C2410_IRQSUB(x) S3C2410_IRQ((x)+58) - -#define IRQ_S3CUART_RX0 S3C2410_IRQSUB(0) /* 74 */ -#define IRQ_S3CUART_TX0 S3C2410_IRQSUB(1) -#define IRQ_S3CUART_ERR0 S3C2410_IRQSUB(2) - -#define IRQ_S3CUART_RX1 S3C2410_IRQSUB(3) /* 77 */ -#define IRQ_S3CUART_TX1 S3C2410_IRQSUB(4) -#define IRQ_S3CUART_ERR1 S3C2410_IRQSUB(5) - -#define IRQ_S3CUART_RX2 S3C2410_IRQSUB(6) /* 80 */ -#define IRQ_S3CUART_TX2 S3C2410_IRQSUB(7) -#define IRQ_S3CUART_ERR2 S3C2410_IRQSUB(8) - -#define IRQ_TC S3C2410_IRQSUB(9) -#define IRQ_ADC S3C2410_IRQSUB(10) - -#define NR_IRQS_S3C2410 (S3C2410_IRQSUB(10) + 1) - -/* extra irqs for s3c2412 */ - -#define IRQ_S3C2412_CFSDI S3C2410_IRQ(21) - -#define IRQ_S3C2412_SDI S3C2410_IRQSUB(13) -#define IRQ_S3C2412_CF S3C2410_IRQSUB(14) - -#define NR_IRQS_S3C2412 (S3C2410_IRQSUB(14) + 1) - -#define IRQ_S3C2416_EINT8t15 S3C2410_IRQ(5) -#define IRQ_S3C2416_DMA S3C2410_IRQ(17) -#define IRQ_S3C2416_UART3 S3C2410_IRQ(18) -#define IRQ_S3C2416_SDI1 S3C2410_IRQ(20) -#define IRQ_S3C2416_SDI0 S3C2410_IRQ(21) - -#define IRQ_S3C2416_LCD2 S3C2410_IRQSUB(15) -#define IRQ_S3C2416_LCD3 S3C2410_IRQSUB(16) -#define IRQ_S3C2416_LCD4 S3C2410_IRQSUB(17) -#define IRQ_S3C2416_DMA0 S3C2410_IRQSUB(18) -#define IRQ_S3C2416_DMA1 S3C2410_IRQSUB(19) -#define IRQ_S3C2416_DMA2 S3C2410_IRQSUB(20) -#define IRQ_S3C2416_DMA3 S3C2410_IRQSUB(21) -#define IRQ_S3C2416_DMA4 S3C2410_IRQSUB(22) -#define IRQ_S3C2416_DMA5 S3C2410_IRQSUB(23) -#define IRQ_S32416_WDT S3C2410_IRQSUB(27) -#define IRQ_S32416_AC97 S3C2410_IRQSUB(28) - -/* second interrupt-register of s3c2416/s3c2450 */ - -#define S3C2416_IRQ(x) S3C2410_IRQ((x) + 58 + 29) -#define IRQ_S3C2416_2D S3C2416_IRQ(0) -#define IRQ_S3C2416_IIC1 S3C2416_IRQ(1) -#define IRQ_S3C2416_RESERVED2 S3C2416_IRQ(2) -#define IRQ_S3C2416_RESERVED3 S3C2416_IRQ(3) -#define IRQ_S3C2416_PCM0 S3C2416_IRQ(4) -#define IRQ_S3C2416_PCM1 S3C2416_IRQ(5) -#define IRQ_S3C2416_I2S0 S3C2416_IRQ(6) -#define IRQ_S3C2416_I2S1 S3C2416_IRQ(7) - -#define NR_IRQS_S3C2416 (S3C2416_IRQ(7) + 1) - -/* extra irqs for s3c2440/s3c2442 */ - -#define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11) /* S3C2443 too */ -#define IRQ_S3C2440_CAM_P S3C2410_IRQSUB(12) /* S3C2443 too */ - -#define NR_IRQS_S3C2442 (S3C2410_IRQSUB(12) + 1) - -#define IRQ_S3C2440_WDT S3C2410_IRQSUB(13) -#define IRQ_S3C2440_AC97 S3C2410_IRQSUB(14) - -#define NR_IRQS_S3C2440 (S3C2410_IRQSUB(14) + 1) - -/* irqs for s3c2443 */ - -#define IRQ_S3C2443_DMA S3C2410_IRQ(17) /* IRQ_DMA1 */ -#define IRQ_S3C2443_UART3 S3C2410_IRQ(18) /* IRQ_DMA2 */ -#define IRQ_S3C2443_CFCON S3C2410_IRQ(19) /* IRQ_DMA3 */ -#define IRQ_S3C2443_HSMMC S3C2410_IRQ(20) /* IRQ_SDI */ -#define IRQ_S3C2443_NAND S3C2410_IRQ(24) /* reserved */ - -#define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */ - -#define IRQ_HSMMC0 IRQ_S3C2416_HSMMC0 -#define IRQ_HSMMC1 IRQ_S3C2443_HSMMC - -#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) -#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15) -#define IRQ_S3C2443_LCD3 S3C2410_IRQSUB(16) -#define IRQ_S3C2443_LCD4 S3C2410_IRQSUB(17) - -#define IRQ_S3C2443_DMA0 S3C2410_IRQSUB(18) -#define IRQ_S3C2443_DMA1 S3C2410_IRQSUB(19) -#define IRQ_S3C2443_DMA2 S3C2410_IRQSUB(20) -#define IRQ_S3C2443_DMA3 S3C2410_IRQSUB(21) -#define IRQ_S3C2443_DMA4 S3C2410_IRQSUB(22) -#define IRQ_S3C2443_DMA5 S3C2410_IRQSUB(23) - -/* UART3 */ -#define IRQ_S3C2443_RX3 S3C2410_IRQSUB(24) -#define IRQ_S3C2443_TX3 S3C2410_IRQSUB(25) -#define IRQ_S3C2443_ERR3 S3C2410_IRQSUB(26) - -#define IRQ_S3C2443_WDT S3C2410_IRQSUB(27) -#define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28) - -#define NR_IRQS_S3C2443 (S3C2410_IRQSUB(28) + 1) - -/* compatibility define. */ -#define IRQ_UART3 IRQ_S3C2443_UART3 -#define IRQ_S3CUART_RX3 IRQ_S3C2443_RX3 -#define IRQ_S3CUART_TX3 IRQ_S3C2443_TX3 -#define IRQ_S3CUART_ERR3 IRQ_S3C2443_ERR3 - -#define IRQ_LCD_VSYNC IRQ_S3C2443_LCD3 -#define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2 - -#ifdef CONFIG_CPU_S3C2440 -#define IRQ_S3C244X_AC97 IRQ_S3C2440_AC97 -#else -#define IRQ_S3C244X_AC97 IRQ_S3C2443_AC97 -#endif - -/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ -#define FIQ_START IRQ_EINT0 - -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c/irqs.h b/arch/arm/mach-s3c/irqs.h index 0bff1c1c8eb0..3ff0e0963080 100644 --- a/arch/arm/mach-s3c/irqs.h +++ b/arch/arm/mach-s3c/irqs.h @@ -1,9 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ - -#ifdef CONFIG_ARCH_S3C24XX -#include "irqs-s3c24xx.h" -#endif - -#ifdef CONFIG_ARCH_S3C64XX #include "irqs-s3c64xx.h" -#endif diff --git a/arch/arm/mach-s3c/mach-amlm5900.c b/arch/arm/mach-s3c/mach-amlm5900.c deleted file mode 100644 index f85e5885e9b4..000000000000 --- a/arch/arm/mach-s3c/mach-amlm5900.c +++ /dev/null @@ -1,248 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2006 American Microsystems Limited -// David Anders <danders@amltd.com> -// -// @History: -// derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by -// Ben Dooks <ben@simtec.co.uk> - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio/machine.h> -#include <linux/gpio.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/proc_fs.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/mach/flash.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <linux/platform_data/fb-s3c2410.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include <linux/platform_data/i2c-s3c2410.h> -#include "devs.h" -#include "cpu.h" -#include "gpio-cfg.h" - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/map.h> -#include <linux/mtd/physmap.h> - -#include "s3c24xx.h" - -static struct resource amlm5900_nor_resource = - DEFINE_RES_MEM(0x00000000, SZ_16M); - -static struct mtd_partition amlm5900_mtd_partitions[] = { - { - .name = "System", - .size = 0x240000, - .offset = 0, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, { - .name = "Kernel", - .size = 0x100000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "Ramdisk", - .size = 0x300000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "JFFS2", - .size = 0x9A0000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "Settings", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - } -}; - -static struct physmap_flash_data amlm5900_flash_data = { - .width = 2, - .parts = amlm5900_mtd_partitions, - .nr_parts = ARRAY_SIZE(amlm5900_mtd_partitions), -}; - -static struct platform_device amlm5900_device_nor = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &amlm5900_flash_data, - }, - .num_resources = 1, - .resource = &amlm5900_nor_resource, -}; - -static struct map_desc amlm5900_iodesc[] __initdata = { -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg amlm5900_uartcfgs[] = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -static struct gpiod_lookup_table amlm5900_mmc_gpio_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device *amlm5900_devices[] __initdata = { -#ifdef CONFIG_FB_S3C2410 - &s3c_device_lcd, -#endif - &s3c_device_adc, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_ohci, - &s3c_device_rtc, - &s3c_device_usbgadget, - &s3c_device_sdi, - &amlm5900_device_nor, -}; - -static void __init amlm5900_map_io(void) -{ - s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc)); - s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init amlm5900_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -#ifdef CONFIG_FB_S3C2410 -static struct s3c2410fb_display __initdata amlm5900_lcd_info = { - .width = 160, - .height = 160, - - .type = S3C2410_LCDCON1_STN4, - - .pixclock = 680000, /* HCLK = 100MHz */ - .xres = 160, - .yres = 160, - .bpp = 4, - .left_margin = 1 << (4 + 3), - .right_margin = 8 << 3, - .hsync_len = 48, - .upper_margin = 0, - .lower_margin = 0, - - .lcdcon5 = 0x00000001, -}; - -static struct s3c2410fb_mach_info __initdata amlm5900_fb_info = { - - .displays = &amlm5900_lcd_info, - .num_displays = 1, - .default_display = 0, - - .gpccon = 0xaaaaaaaa, - .gpccon_mask = 0xffffffff, - .gpccon_reg = S3C2410_GPCCON, - .gpcup = 0x0000ffff, - .gpcup_mask = 0xffffffff, - .gpcup_reg = S3C2410_GPCUP, - - .gpdcon = 0xaaaaaaaa, - .gpdcon_mask = 0xffffffff, - .gpdcon_reg = S3C2410_GPDCON, - .gpdup = 0x0000ffff, - .gpdup_mask = 0xffffffff, - .gpdup_reg = S3C2410_GPDUP, -}; -#endif - -static irqreturn_t -amlm5900_wake_interrupt(int irq, void *ignored) -{ - return IRQ_HANDLED; -} - -static void amlm5900_init_pm(void) -{ - int ret = 0; - - ret = request_irq(IRQ_EINT9, &amlm5900_wake_interrupt, - IRQF_TRIGGER_RISING | IRQF_SHARED, - "amlm5900_wakeup", &amlm5900_wake_interrupt); - if (ret != 0) { - printk(KERN_ERR "AML-M5900: no wakeup irq, %d?\n", ret); - } else { - enable_irq_wake(IRQ_EINT9); - /* configure the suspend/resume status pin */ - s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); - s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_UP); - } -} -static void __init amlm5900_init(void) -{ - amlm5900_init_pm(); -#ifdef CONFIG_FB_S3C2410 - s3c24xx_fb_set_platdata(&amlm5900_fb_info); -#endif - s3c_i2c0_set_platdata(NULL); - gpiod_add_lookup_table(&amlm5900_mmc_gpio_table); - platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices)); -} - -MACHINE_START(AML_M5900, "AML_M5900") - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .map_io = amlm5900_map_io, - .nr_irqs = NR_IRQS_S3C2410, - .init_irq = s3c2410_init_irq, - .init_machine = amlm5900_init, - .init_time = amlm5900_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-anubis.c b/arch/arm/mach-s3c/mach-anubis.c deleted file mode 100644 index 4536f3e66e27..000000000000 --- a/arch/arm/mach-s3c/mach-anubis.c +++ /dev/null @@ -1,422 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2003-2009 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/ata_platform.h> -#include <linux/i2c.h> -#include <linux/io.h> -#include <linux/sm501.h> -#include <linux/sm501-regs.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> - -#include <net/ax88796.h> - -#include "devs.h" -#include "cpu.h" -#include <linux/platform_data/asoc-s3c24xx_simtec.h> - -#include "anubis.h" -#include "s3c24xx.h" -#include "simtec.h" - -#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" - -static struct map_desc anubis_iodesc[] __initdata = { - /* ISA IO areas */ - - { - .virtual = (u32)S3C24XX_VA_ISA_BYTE, - .pfn = __phys_to_pfn(0x0), - .length = SZ_4M, - .type = MT_DEVICE, - }, - - /* we could possibly compress the next set down into a set of smaller tables - * pagetables, but that would mean using an L2 section, and it still means - * we cannot actually feed the same register to an LDR due to 16K spacing - */ - - /* CPLD control registers */ - - { - .virtual = (u32)ANUBIS_VA_CTRL1, - .pfn = __phys_to_pfn(ANUBIS_PA_CTRL1), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (u32)ANUBIS_VA_IDREG, - .pfn = __phys_to_pfn(ANUBIS_PA_IDREG), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, - }, - [1] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, - }, -}; - -/* NAND Flash on Anubis board */ - -static int external_map[] = { 2 }; -static int chip0_map[] = { 0 }; -static int chip1_map[] = { 1 }; - -static struct mtd_partition __initdata anubis_default_nand_part[] = { - [0] = { - .name = "Boot Agent", - .size = SZ_16K, - .offset = 0, - }, - [1] = { - .name = "/boot", - .size = SZ_4M - SZ_16K, - .offset = SZ_16K, - }, - [2] = { - .name = "user1", - .offset = SZ_4M, - .size = SZ_32M - SZ_4M, - }, - [3] = { - .name = "user2", - .offset = SZ_32M, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct mtd_partition __initdata anubis_default_nand_part_large[] = { - [0] = { - .name = "Boot Agent", - .size = SZ_128K, - .offset = 0, - }, - [1] = { - .name = "/boot", - .size = SZ_4M - SZ_128K, - .offset = SZ_128K, - }, - [2] = { - .name = "user1", - .offset = SZ_4M, - .size = SZ_32M - SZ_4M, - }, - [3] = { - .name = "user2", - .offset = SZ_32M, - .size = MTDPART_SIZ_FULL, - } -}; - -/* the Anubis has 3 selectable slots for nand-flash, the two - * on-board chip areas, as well as the external slot. - * - * Note, there is no current hot-plug support for the External - * socket. -*/ - -static struct s3c2410_nand_set __initdata anubis_nand_sets[] = { - [1] = { - .name = "External", - .nr_chips = 1, - .nr_map = external_map, - .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), - .partitions = anubis_default_nand_part, - }, - [0] = { - .name = "chip0", - .nr_chips = 1, - .nr_map = chip0_map, - .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), - .partitions = anubis_default_nand_part, - }, - [2] = { - .name = "chip1", - .nr_chips = 1, - .nr_map = chip1_map, - .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), - .partitions = anubis_default_nand_part, - }, -}; - -static void anubis_nand_select(struct s3c2410_nand_set *set, int slot) -{ - unsigned int tmp; - - slot = set->nr_map[slot] & 3; - - pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n", - slot, set, set->nr_map); - - tmp = __raw_readb(ANUBIS_VA_CTRL1); - tmp &= ~ANUBIS_CTRL1_NANDSEL; - tmp |= slot; - - pr_debug("anubis_nand: ctrl1 now %02x\n", tmp); - - __raw_writeb(tmp, ANUBIS_VA_CTRL1); -} - -static struct s3c2410_platform_nand __initdata anubis_nand_info = { - .tacls = 25, - .twrph0 = 55, - .twrph1 = 40, - .nr_sets = ARRAY_SIZE(anubis_nand_sets), - .sets = anubis_nand_sets, - .select_chip = anubis_nand_select, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -/* IDE channels */ - -static struct pata_platform_info anubis_ide_platdata = { - .ioport_shift = 5, -}; - -static struct resource anubis_ide0_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32), - [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32), - [3] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0), -}; - -static struct platform_device anubis_device_ide0 = { - .name = "pata_platform", - .id = 0, - .num_resources = ARRAY_SIZE(anubis_ide0_resource), - .resource = anubis_ide0_resource, - .dev = { - .platform_data = &anubis_ide_platdata, - .coherent_dma_mask = ~0, - }, -}; - -static struct resource anubis_ide1_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32), - [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32), - [2] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0), -}; - -static struct platform_device anubis_device_ide1 = { - .name = "pata_platform", - .id = 1, - .num_resources = ARRAY_SIZE(anubis_ide1_resource), - .resource = anubis_ide1_resource, - .dev = { - .platform_data = &anubis_ide_platdata, - .coherent_dma_mask = ~0, - }, -}; - -/* Asix AX88796 10/100 ethernet controller */ - -static struct ax_plat_data anubis_asix_platdata = { - .flags = AXFLG_MAC_FROMDEV, - .wordlength = 2, - .dcr_val = 0x48, - .rcr_val = 0x40, -}; - -static struct resource anubis_asix_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20), - [1] = DEFINE_RES_IRQ(ANUBIS_IRQ_ASIX), -}; - -static struct platform_device anubis_device_asix = { - .name = "ax88796", - .id = 0, - .num_resources = ARRAY_SIZE(anubis_asix_resource), - .resource = anubis_asix_resource, - .dev = { - .platform_data = &anubis_asix_platdata, - } -}; - -/* SM501 */ - -static struct resource anubis_sm501_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M), - [1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M), - [2] = DEFINE_RES_IRQ(IRQ_EINT0), -}; - -static struct sm501_initdata anubis_sm501_initdata = { - .gpio_high = { - .set = 0x3F000000, /* 24bit panel */ - .mask = 0x0, - }, - .misc_timing = { - .set = 0x010100, /* SDRAM timing */ - .mask = 0x1F1F00, - }, - .misc_control = { - .set = SM501_MISC_PNL_24BIT, - .mask = 0, - }, - - .devices = SM501_USE_GPIO, - - /* set the SDRAM and bus clocks */ - .mclk = 72 * MHZ, - .m1xclk = 144 * MHZ, -}; - -static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = { - [0] = { - .bus_num = 1, - .pin_scl = 44, - .pin_sda = 45, - }, - [1] = { - .bus_num = 2, - .pin_scl = 40, - .pin_sda = 41, - }, -}; - -static struct sm501_platdata anubis_sm501_platdata = { - .init = &anubis_sm501_initdata, - .gpio_base = -1, - .gpio_i2c = anubis_sm501_gpio_i2c, - .gpio_i2c_nr = ARRAY_SIZE(anubis_sm501_gpio_i2c), -}; - -static struct platform_device anubis_device_sm501 = { - .name = "sm501", - .id = 0, - .num_resources = ARRAY_SIZE(anubis_sm501_resource), - .resource = anubis_sm501_resource, - .dev = { - .platform_data = &anubis_sm501_platdata, - }, -}; - -/* Standard Anubis devices */ - -static struct platform_device *anubis_devices[] __initdata = { - &s3c2410_device_dclk, - &s3c_device_ohci, - &s3c_device_wdt, - &s3c_device_adc, - &s3c_device_i2c0, - &s3c_device_rtc, - &s3c_device_nand, - &anubis_device_ide0, - &anubis_device_ide1, - &anubis_device_asix, - &anubis_device_sm501, -}; - -/* I2C devices. */ - -static struct i2c_board_info anubis_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("tps65011", 0x48), - .irq = IRQ_EINT20, - } -}; - -/* Audio setup */ -static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = { - .have_mic = 1, - .have_lout = 1, - .output_cdclk = 1, - .use_mpllin = 1, - .amp_gpio = S3C2410_GPB(2), - .amp_gain[0] = S3C2410_GPD(10), - .amp_gain[1] = S3C2410_GPD(11), -}; - -static void __init anubis_map_io(void) -{ - s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); - s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); - - /* check for the newer revision boards with large page nand */ - - if ((__raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK) >= 4) { - printk(KERN_INFO "ANUBIS-B detected (revision %d)\n", - __raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK); - anubis_nand_sets[0].partitions = anubis_default_nand_part_large; - anubis_nand_sets[0].nr_partitions = ARRAY_SIZE(anubis_default_nand_part_large); - } else { - /* ensure that the GPIO is setup */ - gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL); - gpio_free(S3C2410_GPA(0)); - } -} - -static void __init anubis_init_time(void) -{ - s3c2440_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init anubis_init(void) -{ - s3c_i2c0_set_platdata(NULL); - s3c_nand_set_platdata(&anubis_nand_info); - simtec_audio_add(NULL, false, &anubis_audio); - - platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices)); - - i2c_register_board_info(0, anubis_i2c_devs, - ARRAY_SIZE(anubis_i2c_devs)); -} - - -MACHINE_START(ANUBIS, "Simtec-Anubis") - /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2440, - .map_io = anubis_map_io, - .init_machine = anubis_init, - .init_irq = s3c2440_init_irq, - .init_time = anubis_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-anw6410.c b/arch/arm/mach-s3c/mach-anw6410.c deleted file mode 100644 index b67eae43e04f..000000000000 --- a/arch/arm/mach-s3c/mach-anw6410.c +++ /dev/null @@ -1,230 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2008 Openmoko, Inc. -// Copyright 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// Copyright 2009 Kwangwoo Lee -// Kwangwoo Lee <kwangwoo.lee@gmail.com> - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/i2c.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/dm9000.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "map.h" - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/i2c-s3c2410.h> -#include "fb.h" - -#include "devs.h" -#include "cpu.h" -#include "irqs.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "s3c64xx.h" -#include "regs-modem-s3c64xx.h" - -/* DM9000 */ -#define ANW6410_PA_DM9000 (0x18000000) - -/* A hardware buffer to control external devices is mapped at 0x30000000. - * It can not be read. So current status must be kept in anw6410_extdev_status. - */ -#define ANW6410_VA_EXTDEV S3C_ADDR(0x02000000) -#define ANW6410_PA_EXTDEV (0x30000000) - -#define ANW6410_EN_DM9000 (1<<11) -#define ANW6410_EN_LCD (1<<14) - -static __u32 anw6410_extdev_status; - -static struct s3c2410_uartcfg anw6410_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, -}; - -/* framebuffer and LCD setup. */ -static void __init anw6410_lcd_mode_set(void) -{ - u32 tmp; - - /* set the LCD type */ - tmp = __raw_readl(S3C64XX_SPCON); - tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; - tmp |= S3C64XX_SPCON_LCD_SEL_RGB; - __raw_writel(tmp, S3C64XX_SPCON); - - /* remove the LCD bypass */ - tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); - tmp &= ~MIFPCON_LCD_BYPASS; - __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); -} - -/* GPF1 = LCD panel power - * GPF4 = LCD backlight control - */ -static void anw6410_lcd_power_set(struct plat_lcd_data *pd, - unsigned int power) -{ - if (power) { - anw6410_extdev_status |= (ANW6410_EN_LCD << 16); - __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV); - - gpio_direction_output(S3C64XX_GPF(1), 1); - gpio_direction_output(S3C64XX_GPF(4), 1); - } else { - anw6410_extdev_status &= ~(ANW6410_EN_LCD << 16); - __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV); - - gpio_direction_output(S3C64XX_GPF(1), 0); - gpio_direction_output(S3C64XX_GPF(4), 0); - } -} - -static struct plat_lcd_data anw6410_lcd_power_data = { - .set_power = anw6410_lcd_power_set, -}; - -static struct platform_device anw6410_lcd_powerdev = { - .name = "platform-lcd", - .dev.parent = &s3c_device_fb.dev, - .dev.platform_data = &anw6410_lcd_power_data, -}; - -static struct s3c_fb_pd_win anw6410_fb_win0 = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode anw6410_lcd_timing = { - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ -static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &anw6410_lcd_timing, - .win[0] = &anw6410_fb_win0, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, -}; - -/* DM9000AEP 10/100 ethernet controller */ -static void __init anw6410_dm9000_enable(void) -{ - anw6410_extdev_status |= (ANW6410_EN_DM9000 << 16); - __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV); -} - -static struct resource anw6410_dm9000_resource[] = { - [0] = DEFINE_RES_MEM(ANW6410_PA_DM9000, 4), - [1] = DEFINE_RES_MEM(ANW6410_PA_DM9000 + 4, 501), - [2] = DEFINE_RES_NAMED(IRQ_EINT(15), 1, NULL, IORESOURCE_IRQ \ - | IRQF_TRIGGER_HIGH), -}; - -static struct dm9000_plat_data anw6410_dm9000_pdata = { - .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), - /* dev_addr can be set to provide hwaddr. */ -}; - -static struct platform_device anw6410_device_eth = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(anw6410_dm9000_resource), - .resource = anw6410_dm9000_resource, - .dev = { - .platform_data = &anw6410_dm9000_pdata, - }, -}; - -static struct map_desc anw6410_iodesc[] __initdata = { - { - .virtual = (unsigned long)ANW6410_VA_EXTDEV, - .pfn = __phys_to_pfn(ANW6410_PA_EXTDEV), - .length = SZ_64K, - .type = MT_DEVICE, - }, -}; - -static struct platform_device *anw6410_devices[] __initdata = { - &s3c_device_fb, - &anw6410_lcd_powerdev, - &anw6410_device_eth, -}; - -static void __init anw6410_map_io(void) -{ - s3c64xx_init_io(anw6410_iodesc, ARRAY_SIZE(anw6410_iodesc)); - s3c64xx_set_xtal_freq(12000000); - s3c24xx_init_uarts(anw6410_uartcfgs, ARRAY_SIZE(anw6410_uartcfgs)); - s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); - - anw6410_lcd_mode_set(); -} - -static void __init anw6410_machine_init(void) -{ - s3c_fb_set_platdata(&anw6410_lcd_pdata); - - gpio_request(S3C64XX_GPF(1), "panel power"); - gpio_request(S3C64XX_GPF(4), "LCD backlight"); - - anw6410_dm9000_enable(); - - platform_add_devices(anw6410_devices, ARRAY_SIZE(anw6410_devices)); -} - -MACHINE_START(ANW6410, "A&W6410") - /* Maintainer: Kwangwoo Lee <kwangwoo.lee@gmail.com> */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6410_init_irq, - .map_io = anw6410_map_io, - .init_machine = anw6410_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-at2440evb.c b/arch/arm/mach-s3c/mach-at2440evb.c deleted file mode 100644 index 743403d873e0..000000000000 --- a/arch/arm/mach-s3c/mach-at2440evb.c +++ /dev/null @@ -1,233 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com> -// Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk> -// and modifications by SBZ <sbz@spgui.org> and -// Weibing <http://weibing.blogbus.com> -// -// For product information, visit http://www.arm.com/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/gpio/machine.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/dm9000.h> -#include <linux/platform_device.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <linux/platform_data/fb-s3c2410.h> -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> - -#include "devs.h" -#include "cpu.h" -#include <linux/platform_data/mmc-s3cmci.h> - -#include "s3c24xx.h" - -static struct map_desc at2440evb_iodesc[] __initdata = { - /* Nothing here */ -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) -#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) - -static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, - }, -}; - -/* NAND Flash on AT2440EVB board */ - -static struct mtd_partition __initdata at2440evb_default_nand_part[] = { - [0] = { - .name = "Boot Agent", - .size = SZ_256K, - .offset = 0, - }, - [1] = { - .name = "Kernel", - .size = SZ_2M, - .offset = SZ_256K, - }, - [2] = { - .name = "Root", - .offset = SZ_256K + SZ_2M, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = { - [0] = { - .name = "nand", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(at2440evb_default_nand_part), - .partitions = at2440evb_default_nand_part, - }, -}; - -static struct s3c2410_platform_nand __initdata at2440evb_nand_info = { - .tacls = 25, - .twrph0 = 55, - .twrph1 = 40, - .nr_sets = ARRAY_SIZE(at2440evb_nand_sets), - .sets = at2440evb_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -/* DM9000AEP 10/100 ethernet controller */ - -static struct resource at2440evb_dm9k_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS3, 4), - [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4), - [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \ - | IORESOURCE_IRQ_HIGHEDGE), -}; - -static struct dm9000_plat_data at2440evb_dm9k_pdata = { - .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), -}; - -static struct platform_device at2440evb_device_eth = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(at2440evb_dm9k_resource), - .resource = at2440evb_dm9k_resource, - .dev = { - .platform_data = &at2440evb_dm9k_pdata, - }, -}; - -static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = { - .set_power = s3c24xx_mci_def_set_power, -}; - -static struct gpiod_lookup_table at2440evb_mci_gpio_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* Card detect S3C2410_GPG(10) */ - GPIO_LOOKUP("GPIOG", 10, "cd", GPIO_ACTIVE_LOW), - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - { }, - }, -}; - - -/* 7" LCD panel */ - -static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = { - - .lcdcon5 = S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_PWREN | - S3C2410_LCDCON5_HWSWP, - - .type = S3C2410_LCDCON1_TFT, - - .width = 800, - .height = 480, - - .pixclock = 33333, /* HCLK 60 MHz, divisor 2 */ - .xres = 800, - .yres = 480, - .bpp = 16, - .left_margin = 88, - .right_margin = 40, - .hsync_len = 128, - .upper_margin = 32, - .lower_margin = 11, - .vsync_len = 2, -}; - -static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = { - .displays = &at2440evb_lcd_cfg, - .num_displays = 1, - .default_display = 0, -}; - -static struct platform_device *at2440evb_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_wdt, - &s3c_device_adc, - &s3c_device_i2c0, - &s3c_device_rtc, - &s3c_device_nand, - &s3c_device_sdi, - &s3c_device_lcd, - &at2440evb_device_eth, -}; - -static void __init at2440evb_map_io(void) -{ - s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc)); - s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init at2440evb_init_time(void) -{ - s3c2440_init_clocks(16934400); - s3c24xx_timer_init(); -} - -static void __init at2440evb_init(void) -{ - s3c24xx_fb_set_platdata(&at2440evb_fb_info); - gpiod_add_lookup_table(&at2440evb_mci_gpio_table); - s3c24xx_mci_set_platdata(&at2440evb_mci_pdata); - s3c_nand_set_platdata(&at2440evb_nand_info); - s3c_i2c0_set_platdata(NULL); - - platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices)); -} - - -MACHINE_START(AT2440EVB, "AT2440EVB") - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2440, - .map_io = at2440evb_map_io, - .init_machine = at2440evb_init, - .init_irq = s3c2440_init_irq, - .init_time = at2440evb_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-bast.c b/arch/arm/mach-s3c/mach-bast.c deleted file mode 100644 index a33ceab81e09..000000000000 --- a/arch/arm/mach-s3c/mach-bast.c +++ /dev/null @@ -1,583 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2003-2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://www.simtec.co.uk/products/EB2410ITX/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/syscore_ops.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/dm9000.h> -#include <linux/ata_platform.h> -#include <linux/i2c.h> -#include <linux/io.h> -#include <linux/serial_8250.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> - -#include <linux/platform_data/asoc-s3c24xx_simtec.h> -#include <linux/platform_data/hwmon-s3c.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/mtd-nand-s3c2410.h> - -#include <net/ax88796.h> - -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/fb-s3c2410.h> -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "cpu.h" -#include <linux/soc/samsung/s3c-cpu-freq.h> -#include "devs.h" -#include "gpio-cfg.h" - -#include "bast.h" -#include "s3c24xx.h" -#include "simtec.h" - -#define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" - -/* macros for virtual address mods for the io space entries */ -#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) -#define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4) -#define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3) -#define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2) - -/* macros to modify the physical addresses for io space */ - -#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2)) -#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3)) -#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4)) -#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5)) - -static struct map_desc bast_iodesc[] __initdata = { - /* ISA IO areas */ - { - .virtual = (u32)S3C24XX_VA_ISA_BYTE, - .pfn = PA_CS2(BAST_PA_ISAIO), - .length = SZ_16M, - .type = MT_DEVICE, - }, - /* bast CPLD control registers, and external interrupt controls */ - { - .virtual = (u32)BAST_VA_CTRL1, - .pfn = __phys_to_pfn(BAST_PA_CTRL1), - .length = SZ_1M, - .type = MT_DEVICE, - }, { - .virtual = (u32)BAST_VA_CTRL2, - .pfn = __phys_to_pfn(BAST_PA_CTRL2), - .length = SZ_1M, - .type = MT_DEVICE, - }, { - .virtual = (u32)BAST_VA_CTRL3, - .pfn = __phys_to_pfn(BAST_PA_CTRL3), - .length = SZ_1M, - .type = MT_DEVICE, - }, { - .virtual = (u32)BAST_VA_CTRL4, - .pfn = __phys_to_pfn(BAST_PA_CTRL4), - .length = SZ_1M, - .type = MT_DEVICE, - }, - /* PC104 IRQ mux */ - { - .virtual = (u32)BAST_VA_PC104_IRQREQ, - .pfn = __phys_to_pfn(BAST_PA_PC104_IRQREQ), - .length = SZ_1M, - .type = MT_DEVICE, - }, { - .virtual = (u32)BAST_VA_PC104_IRQRAW, - .pfn = __phys_to_pfn(BAST_PA_PC104_IRQRAW), - .length = SZ_1M, - .type = MT_DEVICE, - }, { - .virtual = (u32)BAST_VA_PC104_IRQMASK, - .pfn = __phys_to_pfn(BAST_PA_PC104_IRQMASK), - .length = SZ_1M, - .type = MT_DEVICE, - }, - - /* peripheral space... one for each of fast/slow/byte/16bit */ - /* note, ide is only decoded in word space, even though some registers - * are only 8bit */ - - /* slow, byte */ - { VA_C2(BAST_VA_ISAIO), PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, - { VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, - { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, - - /* slow, word */ - { VA_C3(BAST_VA_ISAIO), PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, - { VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, - { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, - - /* fast, byte */ - { VA_C4(BAST_VA_ISAIO), PA_CS4(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, - { VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, - { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, - - /* fast, word */ - { VA_C5(BAST_VA_ISAIO), PA_CS5(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, - { VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, - { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, -}; - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - /* port 2 is not actually used */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -/* NAND Flash on BAST board */ - -#ifdef CONFIG_PM -static int bast_pm_suspend(void) -{ - /* ensure that an nRESET is not generated on resume. */ - gpio_direction_output(S3C2410_GPA(21), 1); - return 0; -} - -static void bast_pm_resume(void) -{ - s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); -} - -#else -#define bast_pm_suspend NULL -#define bast_pm_resume NULL -#endif - -static struct syscore_ops bast_pm_syscore_ops = { - .suspend = bast_pm_suspend, - .resume = bast_pm_resume, -}; - -static int smartmedia_map[] = { 0 }; -static int chip0_map[] = { 1 }; -static int chip1_map[] = { 2 }; -static int chip2_map[] = { 3 }; - -static struct mtd_partition __initdata bast_default_nand_part[] = { - [0] = { - .name = "Boot Agent", - .size = SZ_16K, - .offset = 0, - }, - [1] = { - .name = "/boot", - .size = SZ_4M - SZ_16K, - .offset = SZ_16K, - }, - [2] = { - .name = "user", - .offset = SZ_4M, - .size = MTDPART_SIZ_FULL, - } -}; - -/* the bast has 4 selectable slots for nand-flash, the three - * on-board chip areas, as well as the external SmartMedia - * slot. - * - * Note, there is no current hot-plug support for the SmartMedia - * socket. -*/ - -static struct s3c2410_nand_set __initdata bast_nand_sets[] = { - [0] = { - .name = "SmartMedia", - .nr_chips = 1, - .nr_map = smartmedia_map, - .options = NAND_SCAN_SILENT_NODEV, - .nr_partitions = ARRAY_SIZE(bast_default_nand_part), - .partitions = bast_default_nand_part, - }, - [1] = { - .name = "chip0", - .nr_chips = 1, - .nr_map = chip0_map, - .nr_partitions = ARRAY_SIZE(bast_default_nand_part), - .partitions = bast_default_nand_part, - }, - [2] = { - .name = "chip1", - .nr_chips = 1, - .nr_map = chip1_map, - .options = NAND_SCAN_SILENT_NODEV, - .nr_partitions = ARRAY_SIZE(bast_default_nand_part), - .partitions = bast_default_nand_part, - }, - [3] = { - .name = "chip2", - .nr_chips = 1, - .nr_map = chip2_map, - .options = NAND_SCAN_SILENT_NODEV, - .nr_partitions = ARRAY_SIZE(bast_default_nand_part), - .partitions = bast_default_nand_part, - } -}; - -static void bast_nand_select(struct s3c2410_nand_set *set, int slot) -{ - unsigned int tmp; - - slot = set->nr_map[slot] & 3; - - pr_debug("bast_nand: selecting slot %d (set %p,%p)\n", - slot, set, set->nr_map); - - tmp = __raw_readb(BAST_VA_CTRL2); - tmp &= BAST_CPLD_CTLR2_IDERST; - tmp |= slot; - tmp |= BAST_CPLD_CTRL2_WNAND; - - pr_debug("bast_nand: ctrl2 now %02x\n", tmp); - - __raw_writeb(tmp, BAST_VA_CTRL2); -} - -static struct s3c2410_platform_nand __initdata bast_nand_info = { - .tacls = 30, - .twrph0 = 60, - .twrph1 = 60, - .nr_sets = ARRAY_SIZE(bast_nand_sets), - .sets = bast_nand_sets, - .select_chip = bast_nand_select, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -/* DM9000 */ - -static struct resource bast_dm9k_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4), - [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40), - [2] = DEFINE_RES_NAMED(BAST_IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \ - | IORESOURCE_IRQ_HIGHLEVEL), -}; - -/* for the moment we limit ourselves to 16bit IO until some - * better IO routines can be written and tested -*/ - -static struct dm9000_plat_data bast_dm9k_platdata = { - .flags = DM9000_PLATF_16BITONLY, -}; - -static struct platform_device bast_device_dm9k = { - .name = "dm9000", - .id = 0, - .num_resources = ARRAY_SIZE(bast_dm9k_resource), - .resource = bast_dm9k_resource, - .dev = { - .platform_data = &bast_dm9k_platdata, - } -}; - -/* serial devices */ - -#define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO) -#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ) -#define SERIAL_CLK (1843200) - -static struct plat_serial8250_port bast_sio_data[] = { - [0] = { - .mapbase = SERIAL_BASE + 0x2f8, - .irq = BAST_IRQ_PCSERIAL1, - .flags = SERIAL_FLAGS, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = SERIAL_CLK, - }, - [1] = { - .mapbase = SERIAL_BASE + 0x3f8, - .irq = BAST_IRQ_PCSERIAL2, - .flags = SERIAL_FLAGS, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = SERIAL_CLK, - }, - { } -}; - -static struct platform_device bast_sio = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = &bast_sio_data, - }, -}; - -/* we have devices on the bus which cannot work much over the - * standard 100KHz i2c bus frequency -*/ - -static struct s3c2410_platform_i2c __initdata bast_i2c_info = { - .flags = 0, - .slave_addr = 0x10, - .frequency = 100*1000, -}; - -/* Asix AX88796 10/100 ethernet controller */ - -static struct ax_plat_data bast_asix_platdata = { - .flags = AXFLG_MAC_FROMDEV, - .wordlength = 2, - .dcr_val = 0x48, - .rcr_val = 0x40, -}; - -static struct resource bast_asix_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20), - [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1), - [2] = DEFINE_RES_IRQ(BAST_IRQ_ASIX), -}; - -static struct platform_device bast_device_asix = { - .name = "ax88796", - .id = 0, - .num_resources = ARRAY_SIZE(bast_asix_resource), - .resource = bast_asix_resource, - .dev = { - .platform_data = &bast_asix_platdata - } -}; - -/* Asix AX88796 10/100 ethernet controller parallel port */ - -static struct resource bast_asixpp_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), \ - 0x30 * 0x20), -}; - -static struct platform_device bast_device_axpp = { - .name = "ax88796-pp", - .id = 0, - .num_resources = ARRAY_SIZE(bast_asixpp_resource), - .resource = bast_asixpp_resource, -}; - -/* LCD/VGA controller */ - -static struct s3c2410fb_display __initdata bast_lcd_info[] = { - { - .type = S3C2410_LCDCON1_TFT, - .width = 640, - .height = 480, - - .pixclock = 33333, - .xres = 640, - .yres = 480, - .bpp = 4, - .left_margin = 40, - .right_margin = 20, - .hsync_len = 88, - .upper_margin = 30, - .lower_margin = 32, - .vsync_len = 3, - - .lcdcon5 = 0x00014b02, - }, - { - .type = S3C2410_LCDCON1_TFT, - .width = 640, - .height = 480, - - .pixclock = 33333, - .xres = 640, - .yres = 480, - .bpp = 8, - .left_margin = 40, - .right_margin = 20, - .hsync_len = 88, - .upper_margin = 30, - .lower_margin = 32, - .vsync_len = 3, - - .lcdcon5 = 0x00014b02, - }, - { - .type = S3C2410_LCDCON1_TFT, - .width = 640, - .height = 480, - - .pixclock = 33333, - .xres = 640, - .yres = 480, - .bpp = 16, - .left_margin = 40, - .right_margin = 20, - .hsync_len = 88, - .upper_margin = 30, - .lower_margin = 32, - .vsync_len = 3, - - .lcdcon5 = 0x00014b02, - }, -}; - -/* LCD/VGA controller */ - -static struct s3c2410fb_mach_info __initdata bast_fb_info = { - - .displays = bast_lcd_info, - .num_displays = ARRAY_SIZE(bast_lcd_info), - .default_display = 1, -}; - -/* I2C devices fitted. */ - -static struct i2c_board_info bast_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("tlv320aic23", 0x1a), - }, { - I2C_BOARD_INFO("simtec-pmu", 0x6b), - }, { - I2C_BOARD_INFO("ch7013", 0x75), - }, -}; - -static struct s3c_hwmon_pdata bast_hwmon_info = { - /* LCD contrast (0-6.6V) */ - .in[0] = &(struct s3c_hwmon_chcfg) { - .name = "lcd-contrast", - .mult = 3300, - .div = 512, - }, - /* LED current feedback */ - .in[1] = &(struct s3c_hwmon_chcfg) { - .name = "led-feedback", - .mult = 3300, - .div = 1024, - }, - /* LCD feedback (0-6.6V) */ - .in[2] = &(struct s3c_hwmon_chcfg) { - .name = "lcd-feedback", - .mult = 3300, - .div = 512, - }, - /* Vcore (1.8-2.0V), Vref 3.3V */ - .in[3] = &(struct s3c_hwmon_chcfg) { - .name = "vcore", - .mult = 3300, - .div = 1024, - }, -}; - -/* Standard BAST devices */ -// cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0 - -static struct platform_device *bast_devices[] __initdata = { - &s3c2410_device_dclk, - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_rtc, - &s3c_device_nand, - &s3c_device_adc, - &s3c_device_hwmon, - &bast_device_dm9k, - &bast_device_asix, - &bast_device_axpp, - &bast_sio, -}; - -static struct s3c_cpufreq_board __initdata bast_cpufreq = { - .refresh = 7800, /* 7.8usec */ - .auto_io = 1, - .need_io = 1, -}; - -static struct s3c24xx_audio_simtec_pdata __initdata bast_audio = { - .have_mic = 1, - .have_lout = 1, -}; - -static void __init bast_map_io(void) -{ - s3c_hwmon_set_platdata(&bast_hwmon_info); - - s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); - s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init bast_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init bast_init(void) -{ - register_syscore_ops(&bast_pm_syscore_ops); - - s3c_i2c0_set_platdata(&bast_i2c_info); - s3c_nand_set_platdata(&bast_nand_info); - s3c24xx_fb_set_platdata(&bast_fb_info); - platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); - - i2c_register_board_info(0, bast_i2c_devs, - ARRAY_SIZE(bast_i2c_devs)); - - usb_simtec_init(); - nor_simtec_init(); - simtec_audio_add(NULL, true, &bast_audio); - - WARN_ON(gpio_request(S3C2410_GPA(21), "bast nreset")); - - s3c_cpufreq_setboard(&bast_cpufreq); -} - -MACHINE_START(BAST, "Simtec-BAST") - /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .map_io = bast_map_io, - .init_irq = s3c2410_init_irq, - .init_machine = bast_init, - .init_time = bast_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-crag6410.c b/arch/arm/mach-s3c/mach-crag6410.c index 2ecb85856e24..7c4bed4370a1 100644 --- a/arch/arm/mach-s3c/mach-crag6410.c +++ b/arch/arm/mach-s3c/mach-crag6410.c @@ -58,7 +58,6 @@ #include "keypad.h" #include "devs.h" #include "cpu.h" -#include <linux/soc/samsung/s3c-adc.h> #include <linux/platform_data/i2c-s3c2410.h> #include "pm.h" diff --git a/arch/arm/mach-s3c/mach-gta02.c b/arch/arm/mach-s3c/mach-gta02.c deleted file mode 100644 index d50a81d85ae1..000000000000 --- a/arch/arm/mach-s3c/mach-gta02.c +++ /dev/null @@ -1,588 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// S3C2442 Machine Support for Openmoko GTA02 / FreeRunner. -// -// Copyright (C) 2006-2009 by Openmoko, Inc. -// Authors: Harald Welte <laforge@openmoko.org> -// Andy Green <andy@openmoko.org> -// Werner Almesberger <werner@openmoko.org> -// All rights reserved. - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/delay.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio/machine.h> -#include <linux/gpio.h> -#include <linux/gpio_keys.h> -#include <linux/workqueue.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/input.h> -#include <linux/io.h> -#include <linux/i2c.h> - -#include <linux/mmc/host.h> - -#include <linux/mfd/pcf50633/adc.h> -#include <linux/mfd/pcf50633/backlight.h> -#include <linux/mfd/pcf50633/core.h> -#include <linux/mfd/pcf50633/gpio.h> -#include <linux/mfd/pcf50633/mbc.h> -#include <linux/mfd/pcf50633/pmic.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> - -#include <linux/regulator/machine.h> - -#include <linux/spi/spi.h> -#include <linux/spi/s3c24xx.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/touchscreen-s3c2410.h> -#include <linux/platform_data/usb-ohci-s3c2410.h> -#include <linux/platform_data/usb-s3c2410_udc.h> -#include <linux/platform_data/fb-s3c2410.h> - -#include "regs-gpio.h" -#include "regs-irq.h" -#include "gpio-samsung.h" - -#include "cpu.h" -#include "devs.h" -#include "gpio-cfg.h" -#include "pm.h" - -#include "s3c24xx.h" -#include "gta02.h" - -static struct pcf50633 *gta02_pcf; - -/* - * This gets called frequently when we paniced. - */ - -static long gta02_panic_blink(int state) -{ - char led; - - led = (state) ? 1 : 0; - gpio_direction_output(GTA02_GPIO_AUX_LED, led); - - return 0; -} - - -static struct map_desc gta02_iodesc[] __initdata = { - { - .virtual = 0xe0000000, - .pfn = __phys_to_pfn(S3C2410_CS3 + 0x01000000), - .length = SZ_1M, - .type = MT_DEVICE - }, -}; - -#define UCON (S3C2410_UCON_DEFAULT | S3C2443_UCON_RXERR_IRQEN) -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) -#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) - -static struct s3c2410_uartcfg gta02_uartcfgs[] = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, -}; - -#ifdef CONFIG_CHARGER_PCF50633 -/* - * On GTA02 the 1A charger features a 48K resistor to 0V on the ID pin. - * We use this to recognize that we can pull 1A from the USB socket. - * - * These constants are the measured pcf50633 ADC levels with the 1A - * charger / 48K resistor, and with no pulldown resistor. - */ - -#define ADC_NOM_CHG_DETECT_1A 6 -#define ADC_NOM_CHG_DETECT_USB 43 - -#ifdef CONFIG_PCF50633_ADC -static void -gta02_configure_pmu_for_charger(struct pcf50633 *pcf, void *unused, int res) -{ - int ma; - - /* Interpret charger type */ - if (res < ((ADC_NOM_CHG_DETECT_USB + ADC_NOM_CHG_DETECT_1A) / 2)) { - - /* - * Sanity - stop GPO driving out now that we have a 1A charger - * GPO controls USB Host power generation on GTA02 - */ - pcf50633_gpio_set(pcf, PCF50633_GPO, 0); - - ma = 1000; - } else - ma = 100; - - pcf50633_mbc_usb_curlim_set(pcf, ma); -} -#endif - -static struct delayed_work gta02_charger_work; -static int gta02_usb_vbus_draw; - -static void gta02_charger_worker(struct work_struct *work) -{ - if (gta02_usb_vbus_draw) { - pcf50633_mbc_usb_curlim_set(gta02_pcf, gta02_usb_vbus_draw); - return; - } - -#ifdef CONFIG_PCF50633_ADC - pcf50633_adc_async_read(gta02_pcf, - PCF50633_ADCC1_MUX_ADCIN1, - PCF50633_ADCC1_AVERAGE_16, - gta02_configure_pmu_for_charger, - NULL); -#else - /* - * If the PCF50633 ADC is disabled we fallback to a - * 100mA limit for safety. - */ - pcf50633_mbc_usb_curlim_set(gta02_pcf, 100); -#endif -} - -#define GTA02_CHARGER_CONFIGURE_TIMEOUT ((3000 * HZ) / 1000) - -static void gta02_pmu_event_callback(struct pcf50633 *pcf, int irq) -{ - if (irq == PCF50633_IRQ_USBINS) { - schedule_delayed_work(>a02_charger_work, - GTA02_CHARGER_CONFIGURE_TIMEOUT); - - return; - } - - if (irq == PCF50633_IRQ_USBREM) { - cancel_delayed_work_sync(>a02_charger_work); - gta02_usb_vbus_draw = 0; - } -} - -static void gta02_udc_vbus_draw(unsigned int ma) -{ - if (!gta02_pcf) - return; - - gta02_usb_vbus_draw = ma; - - schedule_delayed_work(>a02_charger_work, - GTA02_CHARGER_CONFIGURE_TIMEOUT); -} -#else /* !CONFIG_CHARGER_PCF50633 */ -#define gta02_pmu_event_callback NULL -#define gta02_udc_vbus_draw NULL -#endif - -static char *gta02_batteries[] = { - "battery", -}; - -static struct pcf50633_bl_platform_data gta02_backlight_data = { - .default_brightness = 0x3f, - .default_brightness_limit = 0, - .ramp_time = 5, -}; - -static struct pcf50633_platform_data gta02_pcf_pdata = { - .resumers = { - [0] = PCF50633_INT1_USBINS | - PCF50633_INT1_USBREM | - PCF50633_INT1_ALARM, - [1] = PCF50633_INT2_ONKEYF, - [2] = PCF50633_INT3_ONKEY1S, - [3] = PCF50633_INT4_LOWSYS | - PCF50633_INT4_LOWBAT | - PCF50633_INT4_HIGHTMP, - }, - - .batteries = gta02_batteries, - .num_batteries = ARRAY_SIZE(gta02_batteries), - - .charger_reference_current_ma = 1000, - - .backlight_data = >a02_backlight_data, - - .reg_init_data = { - [PCF50633_REGULATOR_AUTO] = { - .constraints = { - .min_uV = 3300000, - .max_uV = 3300000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .always_on = 1, - .apply_uV = 1, - }, - }, - [PCF50633_REGULATOR_DOWN1] = { - .constraints = { - .min_uV = 1300000, - .max_uV = 1600000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .always_on = 1, - .apply_uV = 1, - }, - }, - [PCF50633_REGULATOR_DOWN2] = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .apply_uV = 1, - .always_on = 1, - }, - }, - [PCF50633_REGULATOR_HCLDO] = { - .constraints = { - .min_uV = 2000000, - .max_uV = 3300000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - }, - }, - [PCF50633_REGULATOR_LDO1] = { - .constraints = { - .min_uV = 3300000, - .max_uV = 3300000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - }, - }, - [PCF50633_REGULATOR_LDO2] = { - .constraints = { - .min_uV = 3300000, - .max_uV = 3300000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .apply_uV = 1, - }, - }, - [PCF50633_REGULATOR_LDO3] = { - .constraints = { - .min_uV = 3000000, - .max_uV = 3000000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .apply_uV = 1, - }, - }, - [PCF50633_REGULATOR_LDO4] = { - .constraints = { - .min_uV = 3200000, - .max_uV = 3200000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - }, - }, - [PCF50633_REGULATOR_LDO5] = { - .constraints = { - .min_uV = 3000000, - .max_uV = 3000000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - }, - }, - [PCF50633_REGULATOR_LDO6] = { - .constraints = { - .min_uV = 3000000, - .max_uV = 3000000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - }, - }, - [PCF50633_REGULATOR_MEMLDO] = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - }, - }, - - }, - .mbc_event_callback = gta02_pmu_event_callback, -}; - - -/* NOR Flash. */ - -#define GTA02_FLASH_BASE 0x18000000 /* GCS3 */ -#define GTA02_FLASH_SIZE 0x200000 /* 2MBytes */ - -static struct physmap_flash_data gta02_nor_flash_data = { - .width = 2, -}; - -static struct resource gta02_nor_flash_resource = - DEFINE_RES_MEM(GTA02_FLASH_BASE, GTA02_FLASH_SIZE); - -static struct platform_device gta02_nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = >a02_nor_flash_data, - }, - .resource = >a02_nor_flash_resource, - .num_resources = 1, -}; - - -static struct platform_device s3c24xx_pwm_device = { - .name = "s3c24xx_pwm", - .num_resources = 0, -}; - -static struct platform_device gta02_dfbmcs320_device = { - .name = "dfbmcs320", -}; - -static struct i2c_board_info gta02_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("pcf50633", 0x73), - .irq = GTA02_IRQ_PCF50633, - .platform_data = >a02_pcf_pdata, - }, - { - I2C_BOARD_INFO("wm8753", 0x1a), - }, -}; - -static struct s3c2410_nand_set __initdata gta02_nand_sets[] = { - [0] = { - /* - * This name is also hard-coded in the boot loaders, so - * changing it would would require all users to upgrade - * their boot loaders, some of which are stored in a NOR - * that is considered to be immutable. - */ - .name = "neo1973-nand", - .nr_chips = 1, - .flash_bbt = 1, - }, -}; - -/* - * Choose a set of timings derived from S3C@2442B MCP54 - * data sheet (K5D2G13ACM-D075 MCP Memory). - */ - -static struct s3c2410_platform_nand __initdata gta02_nand_info = { - .tacls = 0, - .twrph0 = 25, - .twrph1 = 15, - .nr_sets = ARRAY_SIZE(gta02_nand_sets), - .sets = gta02_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - - -/* Get PMU to set USB current limit accordingly. */ -static struct s3c2410_udc_mach_info gta02_udc_cfg __initdata = { - .vbus_draw = gta02_udc_vbus_draw, -}; - -static struct gpiod_lookup_table gta02_udc_gpio_table = { - .dev_id = "s3c2410-usbgadget", - .table = { - GPIO_LOOKUP("GPIOB", 9, "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* USB */ -static struct s3c2410_hcd_info gta02_usb_info __initdata = { - .port[0] = { - .flags = S3C_HCDFLG_USED, - }, - .port[1] = { - .flags = 0, - }, -}; - -/* Touchscreen */ -static struct s3c2410_ts_mach_info gta02_ts_info = { - .delay = 10000, - .presc = 0xff, /* slow as we can go */ - .oversampling_shift = 2, -}; - -/* Buttons */ -static struct gpio_keys_button gta02_buttons[] = { - { - .gpio = GTA02_GPIO_AUX_KEY, - .code = KEY_PHONE, - .desc = "Aux", - .type = EV_KEY, - .debounce_interval = 100, - }, - { - .gpio = GTA02_GPIO_HOLD_KEY, - .code = KEY_PAUSE, - .desc = "Hold", - .type = EV_KEY, - .debounce_interval = 100, - }, -}; - -static struct gpio_keys_platform_data gta02_buttons_pdata = { - .buttons = gta02_buttons, - .nbuttons = ARRAY_SIZE(gta02_buttons), -}; - -static struct platform_device gta02_buttons_device = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = >a02_buttons_pdata, - }, -}; - -static struct gpiod_lookup_table gta02_audio_gpio_table = { - .dev_id = "neo1973-audio", - .table = { - GPIO_LOOKUP("GPIOJ", 2, "amp-shut", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOJ", 1, "hp", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device gta02_audio = { - .name = "neo1973-audio", - .id = -1, -}; - -static struct gpiod_lookup_table gta02_mmc_gpio_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init gta02_map_io(void) -{ - s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc)); - s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - - -/* These are the guys that don't need to be children of PMU. */ - -static struct platform_device *gta02_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_wdt, - &s3c_device_sdi, - &s3c_device_usbgadget, - &s3c_device_nand, - >a02_nor_flash, - &s3c24xx_pwm_device, - &s3c_device_iis, - &s3c_device_i2c0, - >a02_dfbmcs320_device, - >a02_buttons_device, - &s3c_device_adc, - &s3c_device_ts, - >a02_audio, -}; - -static void gta02_poweroff(void) -{ - pcf50633_reg_set_bit_mask(gta02_pcf, PCF50633_REG_OOCSHDWN, 1, 1); -} - -static void __init gta02_machine_init(void) -{ - /* Set the panic callback to turn AUX LED on or off. */ - panic_blink = gta02_panic_blink; - - s3c_pm_init(); - -#ifdef CONFIG_CHARGER_PCF50633 - INIT_DELAYED_WORK(>a02_charger_work, gta02_charger_worker); -#endif - - s3c24xx_udc_set_platdata(>a02_udc_cfg); - s3c24xx_ts_set_platdata(>a02_ts_info); - s3c_ohci_set_platdata(>a02_usb_info); - s3c_nand_set_platdata(>a02_nand_info); - s3c_i2c0_set_platdata(NULL); - - i2c_register_board_info(0, gta02_i2c_devs, ARRAY_SIZE(gta02_i2c_devs)); - - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - - gpiod_add_lookup_table(>a02_udc_gpio_table); - gpiod_add_lookup_table(>a02_audio_gpio_table); - gpiod_add_lookup_table(>a02_mmc_gpio_table); - platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices)); - pm_power_off = gta02_poweroff; - - regulator_has_full_constraints(); -} - -static void __init gta02_init_time(void) -{ - s3c2442_init_clocks(12000000); - s3c24xx_timer_init(); -} - -MACHINE_START(NEO1973_GTA02, "GTA02") - /* Maintainer: Nelson Castillo <arhuaco@freaks-unidos.net> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2442, - .map_io = gta02_map_io, - .init_irq = s3c2442_init_irq, - .init_machine = gta02_machine_init, - .init_time = gta02_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-h1940.c b/arch/arm/mach-s3c/mach-h1940.c deleted file mode 100644 index 83ac6cfdb1d8..000000000000 --- a/arch/arm/mach-s3c/mach-h1940.c +++ /dev/null @@ -1,809 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2003-2005 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// https://www.handhelds.org/projects/h1940.html - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/memblock.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/i2c.h> -#include <linux/leds.h> -#include <linux/pda_power.h> -#include <linux/s3c_adc_battery.h> -#include <linux/delay.h> - -#include <video/platform_lcd.h> - -#include <linux/mmc/host.h> -#include <linux/export.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/mmc-s3cmci.h> -#include <linux/platform_data/touchscreen-s3c2410.h> -#include <linux/platform_data/usb-s3c2410_udc.h> - -#include <sound/uda1380.h> - -#include <linux/platform_data/fb-s3c2410.h> -#include "map.h" -#include "hardware-s3c24xx.h" -#include "regs-clock.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "cpu.h" -#include "devs.h" -#include "gpio-cfg.h" -#include "pm.h" - -#include "s3c24xx.h" -#include "h1940.h" - -#define H1940_LATCH ((void __force __iomem *)0xF8000000) - -#define H1940_PA_LATCH S3C2410_CS2 - -#define H1940_LATCH_BIT(x) (1 << ((x) + 16 - S3C_GPIO_END)) - -#define S3C24XX_PLL_MDIV_SHIFT (12) -#define S3C24XX_PLL_PDIV_SHIFT (4) -#define S3C24XX_PLL_SDIV_SHIFT (0) - -static struct map_desc h1940_iodesc[] __initdata = { - [0] = { - .virtual = (unsigned long)H1940_LATCH, - .pfn = __phys_to_pfn(H1940_PA_LATCH), - .length = SZ_16K, - .type = MT_DEVICE - }, -}; - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x245, - .ulcon = 0x03, - .ufcon = 0x00, - }, - /* IR port */ - [2] = { - .hwport = 2, - .flags = 0, - .uart_flags = UPF_CONS_FLOW, - .ucon = 0x3c5, - .ulcon = 0x43, - .ufcon = 0x51, - } -}; - -/* Board control latch control */ - -static unsigned int latch_state; - -static void h1940_latch_control(unsigned int clear, unsigned int set) -{ - unsigned long flags; - - local_irq_save(flags); - - latch_state &= ~clear; - latch_state |= set; - - __raw_writel(latch_state, H1940_LATCH); - - local_irq_restore(flags); -} - -static inline int h1940_gpiolib_to_latch(int offset) -{ - return 1 << (offset + 16); -} - -static void h1940_gpiolib_latch_set(struct gpio_chip *chip, - unsigned offset, int value) -{ - int latch_bit = h1940_gpiolib_to_latch(offset); - - h1940_latch_control(value ? 0 : latch_bit, - value ? latch_bit : 0); -} - -static int h1940_gpiolib_latch_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - h1940_gpiolib_latch_set(chip, offset, value); - return 0; -} - -static int h1940_gpiolib_latch_get(struct gpio_chip *chip, - unsigned offset) -{ - return (latch_state >> (offset + 16)) & 1; -} - -static struct gpio_chip h1940_latch_gpiochip = { - .base = H1940_LATCH_GPIO(0), - .owner = THIS_MODULE, - .label = "H1940_LATCH", - .ngpio = 16, - .direction_output = h1940_gpiolib_latch_output, - .set = h1940_gpiolib_latch_set, - .get = h1940_gpiolib_latch_get, -}; - -static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { -}; - -static struct gpiod_lookup_table h1940_udc_gpio_table = { - .dev_id = "s3c2410-usbgadget", - .table = { - GPIO_LOOKUP("GPIOG", 5, "vbus", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("H1940_LATCH", 7, "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { - .delay = 10000, - .presc = 49, - .oversampling_shift = 2, - .cfg_gpio = s3c24xx_ts_cfg_gpio, -}; - -/* - * Set lcd on or off - */ -static struct s3c2410fb_display h1940_lcd __initdata = { - .lcdcon5= S3C2410_LCDCON5_FRM565 | \ - S3C2410_LCDCON5_INVVLINE | \ - S3C2410_LCDCON5_HWSWP, - - .type = S3C2410_LCDCON1_TFT, - .width = 240, - .height = 320, - .pixclock = 260000, - .xres = 240, - .yres = 320, - .bpp = 16, - .left_margin = 8, - .right_margin = 20, - .hsync_len = 4, - .upper_margin = 8, - .lower_margin = 7, - .vsync_len = 1, -}; - -static struct s3c2410fb_mach_info h1940_fb_info __initdata = { - .displays = &h1940_lcd, - .num_displays = 1, - .default_display = 0, - - .lpcsel = 0x02, - .gpccon = 0xaa940659, - .gpccon_mask = 0xffffc0f0, - .gpccon_reg = S3C2410_GPCCON, - .gpcup = 0x0000ffff, - .gpcup_mask = 0xffffffff, - .gpcup_reg = S3C2410_GPCUP, - .gpdcon = 0xaa84aaa0, - .gpdcon_mask = 0xffffffff, - .gpdcon_reg = S3C2410_GPDCON, - .gpdup = 0x0000faff, - .gpdup_mask = 0xffffffff, - .gpdup_reg = S3C2410_GPDUP, -}; - -static int power_supply_init(struct device *dev) -{ - return gpio_request(S3C2410_GPF(2), "cable plugged"); -} - -static int h1940_is_ac_online(void) -{ - return !gpio_get_value(S3C2410_GPF(2)); -} - -static void power_supply_exit(struct device *dev) -{ - gpio_free(S3C2410_GPF(2)); -} - -static char *h1940_supplicants[] = { - "main-battery", - "backup-battery", -}; - -static struct pda_power_pdata power_supply_info = { - .init = power_supply_init, - .is_ac_online = h1940_is_ac_online, - .exit = power_supply_exit, - .supplied_to = h1940_supplicants, - .num_supplicants = ARRAY_SIZE(h1940_supplicants), -}; - -static struct resource power_supply_resources[] = { - [0] = DEFINE_RES_NAMED(IRQ_EINT2, 1, "ac", IORESOURCE_IRQ \ - | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE), -}; - -static struct platform_device power_supply = { - .name = "pda-power", - .id = -1, - .dev = { - .platform_data = - &power_supply_info, - }, - .resource = power_supply_resources, - .num_resources = ARRAY_SIZE(power_supply_resources), -}; - -static const struct s3c_adc_bat_thresh bat_lut_noac[] = { - { .volt = 4070, .cur = 162, .level = 100}, - { .volt = 4040, .cur = 165, .level = 95}, - { .volt = 4016, .cur = 164, .level = 90}, - { .volt = 3996, .cur = 166, .level = 85}, - { .volt = 3971, .cur = 168, .level = 80}, - { .volt = 3951, .cur = 168, .level = 75}, - { .volt = 3931, .cur = 170, .level = 70}, - { .volt = 3903, .cur = 172, .level = 65}, - { .volt = 3886, .cur = 172, .level = 60}, - { .volt = 3858, .cur = 176, .level = 55}, - { .volt = 3842, .cur = 176, .level = 50}, - { .volt = 3818, .cur = 176, .level = 45}, - { .volt = 3789, .cur = 180, .level = 40}, - { .volt = 3769, .cur = 180, .level = 35}, - { .volt = 3749, .cur = 184, .level = 30}, - { .volt = 3732, .cur = 184, .level = 25}, - { .volt = 3716, .cur = 184, .level = 20}, - { .volt = 3708, .cur = 184, .level = 15}, - { .volt = 3716, .cur = 96, .level = 10}, - { .volt = 3700, .cur = 96, .level = 5}, - { .volt = 3684, .cur = 96, .level = 0}, -}; - -static const struct s3c_adc_bat_thresh bat_lut_acin[] = { - { .volt = 4130, .cur = 0, .level = 100}, - { .volt = 3982, .cur = 0, .level = 50}, - { .volt = 3854, .cur = 0, .level = 10}, - { .volt = 3841, .cur = 0, .level = 0}, -}; - -static struct gpiod_lookup_table h1940_bat_gpio_table = { - .dev_id = "s3c-adc-battery", - .table = { - /* Charge status S3C2410_GPF(3) */ - GPIO_LOOKUP("GPIOF", 3, "charge-status", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static int h1940_bat_init(void) -{ - int ret; - - ret = gpio_request(H1940_LATCH_SM803_ENABLE, "h1940-charger-enable"); - if (ret) - return ret; - gpio_direction_output(H1940_LATCH_SM803_ENABLE, 0); - - return 0; - -} - -static void h1940_bat_exit(void) -{ - gpio_free(H1940_LATCH_SM803_ENABLE); -} - -static void h1940_enable_charger(void) -{ - gpio_set_value(H1940_LATCH_SM803_ENABLE, 1); -} - -static void h1940_disable_charger(void) -{ - gpio_set_value(H1940_LATCH_SM803_ENABLE, 0); -} - -static struct s3c_adc_bat_pdata h1940_bat_cfg = { - .init = h1940_bat_init, - .exit = h1940_bat_exit, - .enable_charger = h1940_enable_charger, - .disable_charger = h1940_disable_charger, - .lut_noac = bat_lut_noac, - .lut_noac_cnt = ARRAY_SIZE(bat_lut_noac), - .lut_acin = bat_lut_acin, - .lut_acin_cnt = ARRAY_SIZE(bat_lut_acin), - .volt_channel = 0, - .current_channel = 1, - .volt_mult = 4056, - .current_mult = 1893, - .internal_impedance = 200, - .backup_volt_channel = 3, - /* TODO Check backup volt multiplier */ - .backup_volt_mult = 4056, - .backup_volt_min = 0, - .backup_volt_max = 4149288 -}; - -static struct platform_device h1940_battery = { - .name = "s3c-adc-battery", - .id = -1, - .dev = { - .parent = &s3c_device_adc.dev, - .platform_data = &h1940_bat_cfg, - }, -}; - -static DEFINE_SPINLOCK(h1940_blink_spin); - -int h1940_led_blink_set(struct gpio_desc *desc, int state, - unsigned long *delay_on, unsigned long *delay_off) -{ - int blink_gpio, check_gpio1, check_gpio2; - int gpio = desc ? desc_to_gpio(desc) : -EINVAL; - - switch (gpio) { - case H1940_LATCH_LED_GREEN: - blink_gpio = S3C2410_GPA(7); - check_gpio1 = S3C2410_GPA(1); - check_gpio2 = S3C2410_GPA(3); - break; - case H1940_LATCH_LED_RED: - blink_gpio = S3C2410_GPA(1); - check_gpio1 = S3C2410_GPA(7); - check_gpio2 = S3C2410_GPA(3); - break; - default: - blink_gpio = S3C2410_GPA(3); - check_gpio1 = S3C2410_GPA(1); - check_gpio2 = S3C2410_GPA(7); - break; - } - - if (delay_on && delay_off && !*delay_on && !*delay_off) - *delay_on = *delay_off = 500; - - spin_lock(&h1940_blink_spin); - - switch (state) { - case GPIO_LED_NO_BLINK_LOW: - case GPIO_LED_NO_BLINK_HIGH: - if (!gpio_get_value(check_gpio1) && - !gpio_get_value(check_gpio2)) - gpio_set_value(H1940_LATCH_LED_FLASH, 0); - gpio_set_value(blink_gpio, 0); - if (gpio_is_valid(gpio)) - gpio_set_value(gpio, state); - break; - case GPIO_LED_BLINK: - if (gpio_is_valid(gpio)) - gpio_set_value(gpio, 0); - gpio_set_value(H1940_LATCH_LED_FLASH, 1); - gpio_set_value(blink_gpio, 1); - break; - } - - spin_unlock(&h1940_blink_spin); - - return 0; -} -EXPORT_SYMBOL(h1940_led_blink_set); - -static struct gpio_led h1940_leds_desc[] = { - { - .name = "Green", - .default_trigger = "main-battery-full", - .gpio = H1940_LATCH_LED_GREEN, - .retain_state_suspended = 1, - }, - { - .name = "Red", - .default_trigger - = "main-battery-charging-blink-full-solid", - .gpio = H1940_LATCH_LED_RED, - .retain_state_suspended = 1, - }, -}; - -static struct gpio_led_platform_data h1940_leds_pdata = { - .num_leds = ARRAY_SIZE(h1940_leds_desc), - .leds = h1940_leds_desc, - .gpio_blink_set = h1940_led_blink_set, -}; - -static struct platform_device h1940_device_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &h1940_leds_pdata, - }, -}; - -static struct platform_device h1940_device_bluetooth = { - .name = "h1940-bt", - .id = -1, -}; - -static void h1940_set_mmc_power(unsigned char power_mode, unsigned short vdd) -{ - s3c24xx_mci_def_set_power(power_mode, vdd); - - switch (power_mode) { - case MMC_POWER_OFF: - gpio_set_value(H1940_LATCH_SD_POWER, 0); - break; - case MMC_POWER_UP: - case MMC_POWER_ON: - gpio_set_value(H1940_LATCH_SD_POWER, 1); - break; - default: - break; - } -} - -static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = { - .set_power = h1940_set_mmc_power, - .ocr_avail = MMC_VDD_32_33, -}; - -static struct gpiod_lookup_table h1940_mmc_gpio_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* Card detect S3C2410_GPF(5) */ - GPIO_LOOKUP("GPIOF", 5, "cd", GPIO_ACTIVE_LOW), - /* Write protect S3C2410_GPH(8) */ - GPIO_LOOKUP("GPIOH", 8, "wp", GPIO_ACTIVE_LOW), - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table h1940_audio_gpio_table = { - .dev_id = "h1940-audio", - .table = { - GPIO_LOOKUP("H1940_LATCH", - H1940_LATCH_AUDIO_POWER - H1940_LATCH_GPIO(0), - "speaker-power", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOG", 4, "hp", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device h1940_audio = { - .name = "h1940-audio", - .id = -1, -}; - -static struct pwm_lookup h1940_pwm_lookup[] = { - PWM_LOOKUP("samsung-pwm", 0, "pwm-backlight", NULL, 36296, - PWM_POLARITY_NORMAL), -}; - -static int h1940_backlight_init(struct device *dev) -{ - gpio_request(S3C2410_GPB(0), "Backlight"); - - gpio_direction_output(S3C2410_GPB(0), 0); - s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); - gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 1); - - return 0; -} - -static int h1940_backlight_notify(struct device *dev, int brightness) -{ - if (!brightness) { - gpio_direction_output(S3C2410_GPB(0), 1); - gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 0); - } else { - gpio_direction_output(S3C2410_GPB(0), 0); - s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); - gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 1); - } - return brightness; -} - -static void h1940_backlight_exit(struct device *dev) -{ - gpio_direction_output(S3C2410_GPB(0), 1); - gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 0); -} - - -static struct platform_pwm_backlight_data backlight_data = { - .max_brightness = 100, - .dft_brightness = 50, - .init = h1940_backlight_init, - .notify = h1940_backlight_notify, - .exit = h1940_backlight_exit, -}; - -static struct platform_device h1940_backlight = { - .name = "pwm-backlight", - .dev = { - .parent = &samsung_device_pwm.dev, - .platform_data = &backlight_data, - }, - .id = -1, -}; - -static void h1940_lcd_power_set(struct plat_lcd_data *pd, - unsigned int power) -{ - int value, retries = 100; - - if (!power) { - gpio_set_value(S3C2410_GPC(0), 0); - /* wait for 3ac */ - do { - value = gpio_get_value(S3C2410_GPC(6)); - } while (value && retries--); - - gpio_set_value(H1940_LATCH_LCD_P2, 0); - gpio_set_value(H1940_LATCH_LCD_P3, 0); - gpio_set_value(H1940_LATCH_LCD_P4, 0); - - gpio_direction_output(S3C2410_GPC(1), 0); - gpio_direction_output(S3C2410_GPC(4), 0); - - gpio_set_value(H1940_LATCH_LCD_P1, 0); - gpio_set_value(H1940_LATCH_LCD_P0, 0); - - gpio_set_value(S3C2410_GPC(5), 0); - - } else { - gpio_set_value(H1940_LATCH_LCD_P0, 1); - gpio_set_value(H1940_LATCH_LCD_P1, 1); - - gpio_direction_input(S3C2410_GPC(1)); - gpio_direction_input(S3C2410_GPC(4)); - mdelay(10); - s3c_gpio_cfgpin(S3C2410_GPC(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C2410_GPC(4), S3C_GPIO_SFN(2)); - - gpio_set_value(S3C2410_GPC(5), 1); - gpio_set_value(S3C2410_GPC(0), 1); - - gpio_set_value(H1940_LATCH_LCD_P3, 1); - gpio_set_value(H1940_LATCH_LCD_P2, 1); - gpio_set_value(H1940_LATCH_LCD_P4, 1); - } -} - -static struct plat_lcd_data h1940_lcd_power_data = { - .set_power = h1940_lcd_power_set, -}; - -static struct platform_device h1940_lcd_powerdev = { - .name = "platform-lcd", - .dev.parent = &s3c_device_lcd.dev, - .dev.platform_data = &h1940_lcd_power_data, -}; - -static struct uda1380_platform_data uda1380_info = { - .gpio_power = H1940_LATCH_UDA_POWER, - .gpio_reset = S3C2410_GPA(12), - .dac_clk = UDA1380_DAC_CLK_SYSCLK, -}; - -static struct i2c_board_info h1940_i2c_devices[] = { - { - I2C_BOARD_INFO("uda1380", 0x1a), - .platform_data = &uda1380_info, - }, -}; - -#define DECLARE_BUTTON(p, k, n, w) \ - { \ - .gpio = p, \ - .code = k, \ - .desc = n, \ - .wakeup = w, \ - .active_low = 1, \ - } - -static struct gpio_keys_button h1940_buttons[] = { - DECLARE_BUTTON(S3C2410_GPF(0), KEY_POWER, "Power", 1), - DECLARE_BUTTON(S3C2410_GPF(6), KEY_ENTER, "Select", 1), - DECLARE_BUTTON(S3C2410_GPF(7), KEY_RECORD, "Record", 0), - DECLARE_BUTTON(S3C2410_GPG(0), KEY_F11, "Calendar", 0), - DECLARE_BUTTON(S3C2410_GPG(2), KEY_F12, "Contacts", 0), - DECLARE_BUTTON(S3C2410_GPG(3), KEY_MAIL, "Mail", 0), - DECLARE_BUTTON(S3C2410_GPG(6), KEY_LEFT, "Left_arrow", 0), - DECLARE_BUTTON(S3C2410_GPG(7), KEY_HOMEPAGE, "Home", 0), - DECLARE_BUTTON(S3C2410_GPG(8), KEY_RIGHT, "Right_arrow", 0), - DECLARE_BUTTON(S3C2410_GPG(9), KEY_UP, "Up_arrow", 0), - DECLARE_BUTTON(S3C2410_GPG(10), KEY_DOWN, "Down_arrow", 0), -}; - -static struct gpio_keys_platform_data h1940_buttons_data = { - .buttons = h1940_buttons, - .nbuttons = ARRAY_SIZE(h1940_buttons), -}; - -static struct platform_device h1940_dev_buttons = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &h1940_buttons_data, - } -}; - -static struct platform_device *h1940_devices[] __initdata = { - &h1940_dev_buttons, - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_usbgadget, - &h1940_device_leds, - &h1940_device_bluetooth, - &s3c_device_sdi, - &s3c_device_rtc, - &samsung_device_pwm, - &h1940_backlight, - &h1940_lcd_powerdev, - &s3c_device_adc, - &s3c_device_ts, - &power_supply, - &h1940_battery, - &h1940_audio, -}; - -static void __init h1940_map_io(void) -{ - s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); - s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); - - /* setup PM */ - -#ifdef CONFIG_PM_H1940 - memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); -#endif - s3c_pm_init(); - - /* Add latch gpio chip, set latch initial value */ - h1940_latch_control(0, 0); - WARN_ON(gpiochip_add_data(&h1940_latch_gpiochip, NULL)); -} - -static void __init h1940_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -/* H1940 and RX3715 need to reserve this for suspend */ -static void __init h1940_reserve(void) -{ - memblock_reserve(0x30003000, 0x1000); - memblock_reserve(0x30081000, 0x1000); -} - -static void __init h1940_init(void) -{ - u32 tmp; - - s3c24xx_fb_set_platdata(&h1940_fb_info); - gpiod_add_lookup_table(&h1940_udc_gpio_table); - gpiod_add_lookup_table(&h1940_mmc_gpio_table); - gpiod_add_lookup_table(&h1940_audio_gpio_table); - gpiod_add_lookup_table(&h1940_bat_gpio_table); - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - s3c24xx_mci_set_platdata(&h1940_mmc_cfg); - s3c24xx_udc_set_platdata(&h1940_udc_cfg); - s3c24xx_ts_set_platdata(&h1940_ts_cfg); - s3c_i2c0_set_platdata(NULL); - - /* Turn off suspend on both USB ports, and switch the - * selectable USB port to USB device mode. */ - - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | - S3C2410_MISCCR_USBSUSPND0 | - S3C2410_MISCCR_USBSUSPND1, 0x0); - - tmp = (0x78 << S3C24XX_PLL_MDIV_SHIFT) - | (0x02 << S3C24XX_PLL_PDIV_SHIFT) - | (0x03 << S3C24XX_PLL_SDIV_SHIFT); - writel(tmp, S3C2410_UPLLCON); - - gpio_request(S3C2410_GPC(0), "LCD power"); - gpio_request(S3C2410_GPC(1), "LCD power"); - gpio_request(S3C2410_GPC(4), "LCD power"); - gpio_request(S3C2410_GPC(5), "LCD power"); - gpio_request(S3C2410_GPC(6), "LCD power"); - gpio_request(H1940_LATCH_LCD_P0, "LCD power"); - gpio_request(H1940_LATCH_LCD_P1, "LCD power"); - gpio_request(H1940_LATCH_LCD_P2, "LCD power"); - gpio_request(H1940_LATCH_LCD_P3, "LCD power"); - gpio_request(H1940_LATCH_LCD_P4, "LCD power"); - gpio_request(H1940_LATCH_MAX1698_nSHUTDOWN, "LCD power"); - gpio_direction_output(S3C2410_GPC(0), 0); - gpio_direction_output(S3C2410_GPC(1), 0); - gpio_direction_output(S3C2410_GPC(4), 0); - gpio_direction_output(S3C2410_GPC(5), 0); - gpio_direction_input(S3C2410_GPC(6)); - gpio_direction_output(H1940_LATCH_LCD_P0, 0); - gpio_direction_output(H1940_LATCH_LCD_P1, 0); - gpio_direction_output(H1940_LATCH_LCD_P2, 0); - gpio_direction_output(H1940_LATCH_LCD_P3, 0); - gpio_direction_output(H1940_LATCH_LCD_P4, 0); - gpio_direction_output(H1940_LATCH_MAX1698_nSHUTDOWN, 0); - - gpio_request(H1940_LATCH_SD_POWER, "SD power"); - gpio_direction_output(H1940_LATCH_SD_POWER, 0); - - pwm_add_table(h1940_pwm_lookup, ARRAY_SIZE(h1940_pwm_lookup)); - platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); - - gpio_request(S3C2410_GPA(1), "Red LED blink"); - gpio_request(S3C2410_GPA(3), "Blue LED blink"); - gpio_request(S3C2410_GPA(7), "Green LED blink"); - gpio_request(H1940_LATCH_LED_FLASH, "LED blink"); - gpio_direction_output(S3C2410_GPA(1), 0); - gpio_direction_output(S3C2410_GPA(3), 0); - gpio_direction_output(S3C2410_GPA(7), 0); - gpio_direction_output(H1940_LATCH_LED_FLASH, 0); - - i2c_register_board_info(0, h1940_i2c_devices, - ARRAY_SIZE(h1940_i2c_devices)); -} - -MACHINE_START(H1940, "IPAQ-H1940") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .map_io = h1940_map_io, - .reserve = h1940_reserve, - .init_irq = s3c2410_init_irq, - .init_machine = h1940_init, - .init_time = h1940_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-hmt.c b/arch/arm/mach-s3c/mach-hmt.c deleted file mode 100644 index 49ba16c447aa..000000000000 --- a/arch/arm/mach-s3c/mach-hmt.c +++ /dev/null @@ -1,282 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// mach-hmt.c - Platform code for Airgoo HMT -// -// Copyright 2009 Peter Korsgaard <jacmet@sunsite.dk> - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/i2c.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/leds.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <video/samsung_fimd.h> -#include "map.h" -#include "irqs.h" - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/i2c-s3c2410.h> -#include "gpio-samsung.h" -#include "fb.h" -#include <linux/platform_data/mtd-nand-s3c2410.h> - -#include "devs.h" -#include "cpu.h" - -#include "s3c64xx.h" - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) -#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) - -static struct s3c2410_uartcfg hmt_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, -}; - -static struct pwm_lookup hmt_pwm_lookup[] = { - PWM_LOOKUP("samsung-pwm", 1, "pwm-backlight.0", NULL, - 1000000000 / (100 * 256 * 20), PWM_POLARITY_NORMAL), -}; - -static int hmt_bl_init(struct device *dev) -{ - int ret; - - ret = gpio_request(S3C64XX_GPB(4), "lcd backlight enable"); - if (!ret) - ret = gpio_direction_output(S3C64XX_GPB(4), 0); - - return ret; -} - -static int hmt_bl_notify(struct device *dev, int brightness) -{ - /* - * translate from CIELUV/CIELAB L*->brightness, E.G. from - * perceived luminance to light output. Assumes range 0..25600 - */ - if (brightness < 0x800) { - /* Y = Yn * L / 903.3 */ - brightness = (100*256 * brightness + 231245/2) / 231245; - } else { - /* Y = Yn * ((L + 16) / 116 )^3 */ - int t = (brightness*4 + 16*1024 + 58)/116; - brightness = 25 * ((t * t * t + 0x100000/2) / 0x100000); - } - - gpio_set_value(S3C64XX_GPB(4), brightness); - - return brightness; -} - -static void hmt_bl_exit(struct device *dev) -{ - gpio_free(S3C64XX_GPB(4)); -} - -static struct platform_pwm_backlight_data hmt_backlight_data = { - .max_brightness = 100 * 256, - .dft_brightness = 40 * 256, - .init = hmt_bl_init, - .notify = hmt_bl_notify, - .exit = hmt_bl_exit, - -}; - -static struct platform_device hmt_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &samsung_device_pwm.dev, - .platform_data = &hmt_backlight_data, - }, -}; - -static struct s3c_fb_pd_win hmt_fb_win0 = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode hmt_lcd_timing = { - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ -static struct s3c_fb_platdata hmt_lcd_pdata __initdata = { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &hmt_lcd_timing, - .win[0] = &hmt_fb_win0, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, -}; - -static struct mtd_partition hmt_nand_part[] = { - [0] = { - .name = "uboot", - .size = SZ_512K, - .offset = 0, - }, - [1] = { - .name = "uboot-env1", - .size = SZ_256K, - .offset = SZ_512K, - }, - [2] = { - .name = "uboot-env2", - .size = SZ_256K, - .offset = SZ_512K + SZ_256K, - }, - [3] = { - .name = "kernel", - .size = SZ_2M, - .offset = SZ_1M, - }, - [4] = { - .name = "rootfs", - .size = MTDPART_SIZ_FULL, - .offset = SZ_1M + SZ_2M, - }, -}; - -static struct s3c2410_nand_set hmt_nand_sets[] = { - [0] = { - .name = "nand", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(hmt_nand_part), - .partitions = hmt_nand_part, - }, -}; - -static struct s3c2410_platform_nand hmt_nand_info = { - .tacls = 25, - .twrph0 = 55, - .twrph1 = 40, - .nr_sets = ARRAY_SIZE(hmt_nand_sets), - .sets = hmt_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -static struct gpio_led hmt_leds[] = { - { /* left function keys */ - .name = "left:blue", - .gpio = S3C64XX_GPO(12), - .default_trigger = "default-on", - }, - { /* right function keys - red */ - .name = "right:red", - .gpio = S3C64XX_GPO(13), - }, - { /* right function keys - green */ - .name = "right:green", - .gpio = S3C64XX_GPO(14), - }, - { /* right function keys - blue */ - .name = "right:blue", - .gpio = S3C64XX_GPO(15), - .default_trigger = "default-on", - }, -}; - -static struct gpio_led_platform_data hmt_led_data = { - .num_leds = ARRAY_SIZE(hmt_leds), - .leds = hmt_leds, -}; - -static struct platform_device hmt_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev.platform_data = &hmt_led_data, -}; - -static struct map_desc hmt_iodesc[] = {}; - -static struct platform_device *hmt_devices[] __initdata = { - &s3c_device_i2c0, - &s3c_device_nand, - &s3c_device_fb, - &s3c_device_ohci, - &samsung_device_pwm, - &hmt_backlight_device, - &hmt_leds_device, -}; - -static void __init hmt_map_io(void) -{ - s3c64xx_init_io(hmt_iodesc, ARRAY_SIZE(hmt_iodesc)); - s3c64xx_set_xtal_freq(12000000); - s3c24xx_init_uarts(hmt_uartcfgs, ARRAY_SIZE(hmt_uartcfgs)); - s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); -} - -static void __init hmt_machine_init(void) -{ - s3c_i2c0_set_platdata(NULL); - s3c_fb_set_platdata(&hmt_lcd_pdata); - s3c_nand_set_platdata(&hmt_nand_info); - - gpio_request(S3C64XX_GPC(7), "usb power"); - gpio_direction_output(S3C64XX_GPC(7), 0); - gpio_request(S3C64XX_GPM(0), "usb power"); - gpio_direction_output(S3C64XX_GPM(0), 1); - gpio_request(S3C64XX_GPK(7), "usb power"); - gpio_direction_output(S3C64XX_GPK(7), 1); - gpio_request(S3C64XX_GPF(13), "usb power"); - gpio_direction_output(S3C64XX_GPF(13), 1); - - pwm_add_table(hmt_pwm_lookup, ARRAY_SIZE(hmt_pwm_lookup)); - platform_add_devices(hmt_devices, ARRAY_SIZE(hmt_devices)); -} - -MACHINE_START(HMT, "Airgoo-HMT") - /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6410_init_irq, - .map_io = hmt_map_io, - .init_machine = hmt_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-jive.c b/arch/arm/mach-s3c/mach-jive.c deleted file mode 100644 index 16859bb3bb13..000000000000 --- a/arch/arm/mach-s3c/mach-jive.c +++ /dev/null @@ -1,693 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2007 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://armlinux.simtec.co.uk/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/syscore_ops.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> - -#include <video/ili9320.h> - -#include <linux/spi/spi.h> -#include <linux/spi/spi_gpio.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include "hardware-s3c24xx.h" -#include "regs-gpio.h" -#include <linux/platform_data/fb-s3c2410.h> -#include "gpio-samsung.h" - -#include <asm/mach-types.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> - -#include "gpio-cfg.h" -#include "devs.h" -#include "cpu.h" -#include "pm.h" -#include <linux/platform_data/usb-s3c2410_udc.h> - -#include "s3c24xx.h" -#include "s3c2412-power.h" - -static struct map_desc jive_iodesc[] __initdata = { -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg jive_uartcfgs[] = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -/* Jive flash assignment - * - * 0x00000000-0x00028000 : uboot - * 0x00028000-0x0002c000 : uboot env - * 0x0002c000-0x00030000 : spare - * 0x00030000-0x00200000 : zimage A - * 0x00200000-0x01600000 : cramfs A - * 0x01600000-0x017d0000 : zimage B - * 0x017d0000-0x02bd0000 : cramfs B - * 0x02bd0000-0x03fd0000 : yaffs - */ -static struct mtd_partition __initdata jive_imageA_nand_part[] = { - -#ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER - /* Don't allow access to the bootloader from linux */ - { - .name = "uboot", - .offset = 0, - .size = (160 * SZ_1K), - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - - /* spare */ - { - .name = "spare", - .offset = (176 * SZ_1K), - .size = (16 * SZ_1K), - }, -#endif - - /* booted images */ - { - .name = "kernel (ro)", - .offset = (192 * SZ_1K), - .size = (SZ_2M) - (192 * SZ_1K), - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, { - .name = "root (ro)", - .offset = (SZ_2M), - .size = (20 * SZ_1M), - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - - /* yaffs */ - { - .name = "yaffs", - .offset = (44 * SZ_1M), - .size = (20 * SZ_1M), - }, - - /* bootloader environment */ - { - .name = "env", - .offset = (160 * SZ_1K), - .size = (16 * SZ_1K), - }, - - /* upgrade images */ - { - .name = "zimage", - .offset = (22 * SZ_1M), - .size = (2 * SZ_1M) - (192 * SZ_1K), - }, { - .name = "cramfs", - .offset = (24 * SZ_1M) - (192*SZ_1K), - .size = (20 * SZ_1M), - }, -}; - -static struct mtd_partition __initdata jive_imageB_nand_part[] = { - -#ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER - /* Don't allow access to the bootloader from linux */ - { - .name = "uboot", - .offset = 0, - .size = (160 * SZ_1K), - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - - /* spare */ - { - .name = "spare", - .offset = (176 * SZ_1K), - .size = (16 * SZ_1K), - }, -#endif - - /* booted images */ - { - .name = "kernel (ro)", - .offset = (22 * SZ_1M), - .size = (2 * SZ_1M) - (192 * SZ_1K), - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "root (ro)", - .offset = (24 * SZ_1M) - (192 * SZ_1K), - .size = (20 * SZ_1M), - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - - /* yaffs */ - { - .name = "yaffs", - .offset = (44 * SZ_1M), - .size = (20 * SZ_1M), - }, - - /* bootloader environment */ - { - .name = "env", - .offset = (160 * SZ_1K), - .size = (16 * SZ_1K), - }, - - /* upgrade images */ - { - .name = "zimage", - .offset = (192 * SZ_1K), - .size = (2 * SZ_1M) - (192 * SZ_1K), - }, { - .name = "cramfs", - .offset = (2 * SZ_1M), - .size = (20 * SZ_1M), - }, -}; - -static struct s3c2410_nand_set __initdata jive_nand_sets[] = { - [0] = { - .name = "flash", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(jive_imageA_nand_part), - .partitions = jive_imageA_nand_part, - }, -}; - -static struct s3c2410_platform_nand __initdata jive_nand_info = { - /* set taken from osiris nand timings, possibly still conservative */ - .tacls = 30, - .twrph0 = 55, - .twrph1 = 40, - .sets = jive_nand_sets, - .nr_sets = ARRAY_SIZE(jive_nand_sets), - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -static int __init jive_mtdset(char *options) -{ - struct s3c2410_nand_set *nand = &jive_nand_sets[0]; - unsigned long set; - - if (options == NULL || options[0] == '\0') - return 1; - - if (kstrtoul(options, 10, &set)) { - printk(KERN_ERR "failed to parse mtdset=%s\n", options); - return 1; - } - - switch (set) { - case 1: - nand->nr_partitions = ARRAY_SIZE(jive_imageB_nand_part); - nand->partitions = jive_imageB_nand_part; - break; - case 0: - /* this is already setup in the nand info */ - break; - default: - printk(KERN_ERR "Unknown mtd set %ld specified," - "using default.", set); - } - - return 1; -} - -/* parse the mtdset= option given to the kernel command line */ -__setup("mtdset=", jive_mtdset); - -/* LCD timing and setup */ - -#define LCD_XRES (240) -#define LCD_YRES (320) -#define LCD_LEFT_MARGIN (12) -#define LCD_RIGHT_MARGIN (12) -#define LCD_LOWER_MARGIN (12) -#define LCD_UPPER_MARGIN (12) -#define LCD_VSYNC (2) -#define LCD_HSYNC (2) - -#define LCD_REFRESH (60) - -#define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN) -#define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN) - -static struct s3c2410fb_display jive_vgg2432a4_display[] = { - [0] = { - .width = LCD_XRES, - .height = LCD_YRES, - .xres = LCD_XRES, - .yres = LCD_YRES, - .left_margin = LCD_LEFT_MARGIN, - .right_margin = LCD_RIGHT_MARGIN, - .upper_margin = LCD_UPPER_MARGIN, - .lower_margin = LCD_LOWER_MARGIN, - .hsync_len = LCD_HSYNC, - .vsync_len = LCD_VSYNC, - - .pixclock = (1000000000000LL / - (LCD_REFRESH * LCD_HTOT * LCD_VTOT)), - - .bpp = 16, - .type = (S3C2410_LCDCON1_TFT16BPP | - S3C2410_LCDCON1_TFT), - - .lcdcon5 = (S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_INVVDEN | - S3C2410_LCDCON5_PWREN), - }, -}; - -/* todo - put into gpio header */ - -#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) -#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) - -static struct s3c2410fb_mach_info jive_lcd_config = { - .displays = jive_vgg2432a4_display, - .num_displays = ARRAY_SIZE(jive_vgg2432a4_display), - .default_display = 0, - - /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN - * and disable the pull down resistors on pins we are using for LCD - * data. */ - - .gpcup = (0xf << 1) | (0x3f << 10), - .gpcup_reg = S3C2410_GPCUP, - - .gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE | - S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM | - S3C2410_GPC10_VD2 | S3C2410_GPC11_VD3 | - S3C2410_GPC12_VD4 | S3C2410_GPC13_VD5 | - S3C2410_GPC14_VD6 | S3C2410_GPC15_VD7), - - .gpccon_mask = (S3C2410_GPCCON_MASK(1) | S3C2410_GPCCON_MASK(2) | - S3C2410_GPCCON_MASK(3) | S3C2410_GPCCON_MASK(4) | - S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) | - S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) | - S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)), - - .gpccon_reg = S3C2410_GPCCON, - - .gpdup = (0x3f << 2) | (0x3f << 10), - - .gpdup_reg = S3C2410_GPDUP, - - .gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 | - S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 | - S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 | - S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 | - S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 | - S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23), - - .gpdcon_mask = (S3C2410_GPDCON_MASK(2) | S3C2410_GPDCON_MASK(3) | - S3C2410_GPDCON_MASK(4) | S3C2410_GPDCON_MASK(5) | - S3C2410_GPDCON_MASK(6) | S3C2410_GPDCON_MASK(7) | - S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)| - S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)| - S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)), - - .gpdcon_reg = S3C2410_GPDCON, -}; - -/* ILI9320 support. */ - -static void jive_lcm_reset(unsigned int set) -{ - printk(KERN_DEBUG "%s(%d)\n", __func__, set); - - gpio_set_value(S3C2410_GPG(13), set); -} - -#undef LCD_UPPER_MARGIN -#define LCD_UPPER_MARGIN 2 - -static struct ili9320_platdata jive_lcm_config = { - .hsize = LCD_XRES, - .vsize = LCD_YRES, - - .reset = jive_lcm_reset, - .suspend = ILI9320_SUSPEND_DEEP, - - .entry_mode = ILI9320_ENTRYMODE_ID(3) | ILI9320_ENTRYMODE_BGR, - .display2 = (ILI9320_DISPLAY2_FP(LCD_UPPER_MARGIN) | - ILI9320_DISPLAY2_BP(LCD_LOWER_MARGIN)), - .display3 = 0x0, - .display4 = 0x0, - .rgb_if1 = (ILI9320_RGBIF1_RIM_RGB18 | - ILI9320_RGBIF1_RM | ILI9320_RGBIF1_CLK_RGBIF), - .rgb_if2 = ILI9320_RGBIF2_DPL, - .interface2 = 0x0, - .interface3 = 0x3, - .interface4 = (ILI9320_INTERFACE4_RTNE(16) | - ILI9320_INTERFACE4_DIVE(1)), - .interface5 = 0x0, - .interface6 = 0x0, -}; - -/* LCD SPI support */ - -static struct spi_gpio_platform_data jive_lcd_spi = { - .num_chipselect = 1, -}; - -static struct platform_device jive_device_lcdspi = { - .name = "spi_gpio", - .id = 1, - .dev.platform_data = &jive_lcd_spi, -}; - -static struct gpiod_lookup_table jive_lcdspi_gpiod_table = { - .dev_id = "spi_gpio", - .table = { - GPIO_LOOKUP("GPIOG", 8, - "sck", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOB", 8, - "mosi", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOB", 7, - "cs", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* WM8750 audio code SPI definition */ - -static struct spi_gpio_platform_data jive_wm8750_spi = { - .num_chipselect = 1, -}; - -static struct platform_device jive_device_wm8750 = { - .name = "spi_gpio", - .id = 2, - .dev.platform_data = &jive_wm8750_spi, -}; - -static struct gpiod_lookup_table jive_wm8750_gpiod_table = { - .dev_id = "spi_gpio", - .table = { - GPIO_LOOKUP("GPIOB", 4, - "sck", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOB", 9, - "mosi", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOH", 10, - "cs", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* JIVE SPI devices. */ - -static struct spi_board_info __initdata jive_spi_devs[] = { - [0] = { - .modalias = "VGG2432A4", - .bus_num = 1, - .chip_select = 0, - .mode = SPI_MODE_3, /* CPOL=1, CPHA=1 */ - .max_speed_hz = 100000, - .platform_data = &jive_lcm_config, - }, { - .modalias = "WM8750", - .bus_num = 2, - .chip_select = 0, - .mode = SPI_MODE_0, /* CPOL=0, CPHA=0 */ - .max_speed_hz = 100000, - }, -}; - -/* I2C bus and device configuration. */ - -static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = { - .frequency = 80 * 1000, - .flags = S3C_IICFLG_FILTER, - .sda_delay = 2, -}; - -static struct i2c_board_info jive_i2c_devs[] __initdata = { - [0] = { - I2C_BOARD_INFO("lis302dl", 0x1c), - .irq = IRQ_EINT14, - }, -}; - -/* The platform devices being used. */ - -static struct platform_device *jive_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_rtc, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_lcd, - &jive_device_lcdspi, - &jive_device_wm8750, - &s3c_device_nand, - &s3c_device_usbgadget, - &s3c2412_device_dma, -}; - -static struct s3c2410_udc_mach_info jive_udc_cfg __initdata = { -}; - -static struct gpiod_lookup_table jive_udc_gpio_table = { - .dev_id = "s3c2410-usbgadget", - .table = { - GPIO_LOOKUP("GPIOG", 1, "vbus", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* Jive power management device */ - -#ifdef CONFIG_PM -static int jive_pm_suspend(void) -{ - /* Write the magic value u-boot uses to check for resume into - * the INFORM0 register, and ensure INFORM1 is set to the - * correct address to resume from. */ - - __raw_writel(0x2BED, S3C2412_INFORM0); - __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1); - - return 0; -} - -static void jive_pm_resume(void) -{ - __raw_writel(0x0, S3C2412_INFORM0); -} - -#else -#define jive_pm_suspend NULL -#define jive_pm_resume NULL -#endif - -static struct syscore_ops jive_pm_syscore_ops = { - .suspend = jive_pm_suspend, - .resume = jive_pm_resume, -}; - -static void __init jive_map_io(void) -{ - s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc)); - s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init jive_init_time(void) -{ - s3c2412_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void jive_power_off(void) -{ - printk(KERN_INFO "powering system down...\n"); - - gpio_request_one(S3C2410_GPC(5), GPIOF_OUT_INIT_HIGH, NULL); - gpio_free(S3C2410_GPC(5)); -} - -static void __init jive_machine_init(void) -{ - /* register system core operations for managing low level suspend */ - - register_syscore_ops(&jive_pm_syscore_ops); - - /* write our sleep configurations for the IO. Pull down all unused - * IO, ensure that we have turned off all peripherals we do not - * need, and configure the ones we do need. */ - - /* Port B sleep */ - - __raw_writel(S3C2412_SLPCON_IN(0) | - S3C2412_SLPCON_PULL(1) | - S3C2412_SLPCON_HIGH(2) | - S3C2412_SLPCON_PULL(3) | - S3C2412_SLPCON_PULL(4) | - S3C2412_SLPCON_PULL(5) | - S3C2412_SLPCON_PULL(6) | - S3C2412_SLPCON_HIGH(7) | - S3C2412_SLPCON_PULL(8) | - S3C2412_SLPCON_PULL(9) | - S3C2412_SLPCON_PULL(10), S3C2412_GPBSLPCON); - - /* Port C sleep */ - - __raw_writel(S3C2412_SLPCON_PULL(0) | - S3C2412_SLPCON_PULL(1) | - S3C2412_SLPCON_PULL(2) | - S3C2412_SLPCON_PULL(3) | - S3C2412_SLPCON_PULL(4) | - S3C2412_SLPCON_PULL(5) | - S3C2412_SLPCON_LOW(6) | - S3C2412_SLPCON_PULL(6) | - S3C2412_SLPCON_PULL(7) | - S3C2412_SLPCON_PULL(8) | - S3C2412_SLPCON_PULL(9) | - S3C2412_SLPCON_PULL(10) | - S3C2412_SLPCON_PULL(11) | - S3C2412_SLPCON_PULL(12) | - S3C2412_SLPCON_PULL(13) | - S3C2412_SLPCON_PULL(14) | - S3C2412_SLPCON_PULL(15), S3C2412_GPCSLPCON); - - /* Port D sleep */ - - __raw_writel(S3C2412_SLPCON_ALL_PULL, S3C2412_GPDSLPCON); - - /* Port F sleep */ - - __raw_writel(S3C2412_SLPCON_LOW(0) | - S3C2412_SLPCON_LOW(1) | - S3C2412_SLPCON_LOW(2) | - S3C2412_SLPCON_EINT(3) | - S3C2412_SLPCON_EINT(4) | - S3C2412_SLPCON_EINT(5) | - S3C2412_SLPCON_EINT(6) | - S3C2412_SLPCON_EINT(7), S3C2412_GPFSLPCON); - - /* Port G sleep */ - - __raw_writel(S3C2412_SLPCON_IN(0) | - S3C2412_SLPCON_IN(1) | - S3C2412_SLPCON_IN(2) | - S3C2412_SLPCON_IN(3) | - S3C2412_SLPCON_IN(4) | - S3C2412_SLPCON_IN(5) | - S3C2412_SLPCON_IN(6) | - S3C2412_SLPCON_IN(7) | - S3C2412_SLPCON_PULL(8) | - S3C2412_SLPCON_PULL(9) | - S3C2412_SLPCON_IN(10) | - S3C2412_SLPCON_PULL(11) | - S3C2412_SLPCON_PULL(12) | - S3C2412_SLPCON_PULL(13) | - S3C2412_SLPCON_IN(14) | - S3C2412_SLPCON_PULL(15), S3C2412_GPGSLPCON); - - /* Port H sleep */ - - __raw_writel(S3C2412_SLPCON_PULL(0) | - S3C2412_SLPCON_PULL(1) | - S3C2412_SLPCON_PULL(2) | - S3C2412_SLPCON_PULL(3) | - S3C2412_SLPCON_PULL(4) | - S3C2412_SLPCON_PULL(5) | - S3C2412_SLPCON_PULL(6) | - S3C2412_SLPCON_IN(7) | - S3C2412_SLPCON_IN(8) | - S3C2412_SLPCON_PULL(9) | - S3C2412_SLPCON_IN(10), S3C2412_GPHSLPCON); - - /* initialise the power management now we've setup everything. */ - - s3c_pm_init(); - - /** TODO - check that this is after the cmdline option! */ - s3c_nand_set_platdata(&jive_nand_info); - - gpio_request(S3C2410_GPG(13), "lcm reset"); - gpio_direction_output(S3C2410_GPG(13), 0); - - gpio_request_one(S3C2410_GPB(6), GPIOF_OUT_INIT_LOW, NULL); - gpio_free(S3C2410_GPB(6)); - - /* Turn off suspend on both USB ports, and switch the - * selectable USB port to USB device mode. */ - - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | - S3C2410_MISCCR_USBSUSPND0 | - S3C2410_MISCCR_USBSUSPND1, 0x0); - - s3c24xx_udc_set_platdata(&jive_udc_cfg); - s3c24xx_fb_set_platdata(&jive_lcd_config); - - spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs)); - - s3c_i2c0_set_platdata(&jive_i2c_cfg); - i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs)); - - pm_power_off = jive_power_off; - - gpiod_add_lookup_table(&jive_udc_gpio_table); - gpiod_add_lookup_table(&jive_lcdspi_gpiod_table); - gpiod_add_lookup_table(&jive_wm8750_gpiod_table); - platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices)); -} - -MACHINE_START(JIVE, "JIVE") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2412, - .init_irq = s3c2412_init_irq, - .map_io = jive_map_io, - .init_machine = jive_machine_init, - .init_time = jive_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-mini2440.c b/arch/arm/mach-s3c/mach-mini2440.c deleted file mode 100644 index 283be70ca622..000000000000 --- a/arch/arm/mach-s3c/mach-mini2440.c +++ /dev/null @@ -1,804 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com> -// Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk> -// and modifications by SBZ <sbz@spgui.org> and -// Weibing <http://weibing.blogbus.com> and -// Michel Pollet <buserror@gmail.com> -// -// For product information, visit https://code.google.com/p/mini2440/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/input.h> -#include <linux/io.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/dm9000.h> -#include <linux/property.h> -#include <linux/platform_device.h> -#include <linux/gpio_keys.h> -#include <linux/i2c.h> -#include <linux/mmc/host.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <linux/platform_data/fb-s3c2410.h> -#include <asm/mach-types.h> - -#include "regs-gpio.h" -#include <linux/platform_data/leds-s3c24xx.h> -#include "irqs.h" -#include "gpio-samsung.h" -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/mmc-s3cmci.h> -#include <linux/platform_data/usb-s3c2410_udc.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> - -#include "gpio-cfg.h" -#include "devs.h" -#include "cpu.h" - -#include <sound/s3c24xx_uda134x.h> - -#include "s3c24xx.h" - -#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300) - -static struct map_desc mini2440_iodesc[] __initdata = { - /* nothing to declare, move along */ -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) -#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) - - -static struct s3c2410_uartcfg mini2440_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, -}; - -/* USB device UDC support */ - -static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = { -}; - -static struct gpiod_lookup_table mini2440_udc_gpio_table = { - .dev_id = "s3c2410-usbgadget", - .table = { - GPIO_LOOKUP("GPIOC", 5, "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* LCD timing and setup */ - -/* - * This macro simplifies the table bellow - */ -#define _LCD_DECLARE(_clock, _xres, margin_left, margin_right, hsync, \ - _yres, margin_top, margin_bottom, vsync, refresh) \ - .width = _xres, \ - .xres = _xres, \ - .height = _yres, \ - .yres = _yres, \ - .left_margin = margin_left, \ - .right_margin = margin_right, \ - .upper_margin = margin_top, \ - .lower_margin = margin_bottom, \ - .hsync_len = hsync, \ - .vsync_len = vsync, \ - .pixclock = ((_clock*100000000000LL) / \ - ((refresh) * \ - (hsync + margin_left + _xres + margin_right) * \ - (vsync + margin_top + _yres + margin_bottom))), \ - .bpp = 16,\ - .type = (S3C2410_LCDCON1_TFT16BPP |\ - S3C2410_LCDCON1_TFT) - -static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = { - [0] = { /* mini2440 + 3.5" TFT + touchscreen */ - _LCD_DECLARE( - 7, /* The 3.5 is quite fast */ - 240, 21, 38, 6, /* x timing */ - 320, 4, 4, 2, /* y timing */ - 60), /* refresh rate */ - .lcdcon5 = (S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_INVVDEN | - S3C2410_LCDCON5_PWREN), - }, - [1] = { /* mini2440 + 7" TFT + touchscreen */ - _LCD_DECLARE( - 10, /* the 7" runs slower */ - 800, 40, 40, 48, /* x timing */ - 480, 29, 3, 3, /* y timing */ - 50), /* refresh rate */ - .lcdcon5 = (S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_PWREN), - }, - /* The VGA shield can outout at several resolutions. All share - * the same timings, however, anything smaller than 1024x768 - * will only be displayed in the top left corner of a 1024x768 - * XGA output unless you add optional dip switches to the shield. - * Therefore timings for other resolutions have been omitted here. - */ - [2] = { - _LCD_DECLARE( - 10, - 1024, 1, 2, 2, /* y timing */ - 768, 200, 16, 16, /* x timing */ - 24), /* refresh rate, maximum stable, - * tested with the FPGA shield - */ - .lcdcon5 = (S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_HWSWP), - }, - /* mini2440 + 3.5" TFT (LCD-W35i, LQ035Q1DG06 type) + touchscreen*/ - [3] = { - _LCD_DECLARE( - /* clock */ - 7, - /* xres, margin_right, margin_left, hsync */ - 320, 68, 66, 4, - /* yres, margin_top, margin_bottom, vsync */ - 240, 4, 4, 9, - /* refresh rate */ - 60), - .lcdcon5 = (S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVDEN | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVCLK | - S3C2410_LCDCON5_HWSWP), - }, -}; - -/* todo - put into gpio header */ - -#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) -#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) - -static struct s3c2410fb_mach_info mini2440_fb_info __initdata = { - .displays = &mini2440_lcd_cfg[0], /* not constant! see init */ - .num_displays = 1, - .default_display = 0, - - /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN - * and disable the pull down resistors on pins we are using for LCD - * data. - */ - - .gpcup = (0xf << 1) | (0x3f << 10), - - .gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE | - S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM | - S3C2410_GPC10_VD2 | S3C2410_GPC11_VD3 | - S3C2410_GPC12_VD4 | S3C2410_GPC13_VD5 | - S3C2410_GPC14_VD6 | S3C2410_GPC15_VD7), - - .gpccon_mask = (S3C2410_GPCCON_MASK(1) | S3C2410_GPCCON_MASK(2) | - S3C2410_GPCCON_MASK(3) | S3C2410_GPCCON_MASK(4) | - S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) | - S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) | - S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)), - - .gpccon_reg = S3C2410_GPCCON, - .gpcup_reg = S3C2410_GPCUP, - - .gpdup = (0x3f << 2) | (0x3f << 10), - - .gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 | - S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 | - S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 | - S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 | - S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 | - S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23), - - .gpdcon_mask = (S3C2410_GPDCON_MASK(2) | S3C2410_GPDCON_MASK(3) | - S3C2410_GPDCON_MASK(4) | S3C2410_GPDCON_MASK(5) | - S3C2410_GPDCON_MASK(6) | S3C2410_GPDCON_MASK(7) | - S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)| - S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)| - S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)), - - .gpdcon_reg = S3C2410_GPDCON, - .gpdup_reg = S3C2410_GPDUP, -}; - -/* MMC/SD */ - -static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = { - .wprotect_invert = 1, - .set_power = s3c24xx_mci_def_set_power, - .ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34, -}; - -static struct gpiod_lookup_table mini2440_mmc_gpio_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* Card detect S3C2410_GPG(8) */ - GPIO_LOOKUP("GPIOG", 8, "cd", GPIO_ACTIVE_LOW), - /* Write protect S3C2410_GPH(8) */ - GPIO_LOOKUP("GPIOH", 8, "wp", GPIO_ACTIVE_HIGH), - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* NAND Flash on MINI2440 board */ - -static struct mtd_partition mini2440_default_nand_part[] __initdata = { - [0] = { - .name = "u-boot", - .size = SZ_256K, - .offset = 0, - }, - [1] = { - .name = "u-boot-env", - .size = SZ_128K, - .offset = SZ_256K, - }, - [2] = { - .name = "kernel", - /* 5 megabytes, for a kernel with no modules - * or a uImage with a ramdisk attached - */ - .size = 0x00500000, - .offset = SZ_256K + SZ_128K, - }, - [3] = { - .name = "root", - .offset = SZ_256K + SZ_128K + 0x00500000, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct s3c2410_nand_set mini2440_nand_sets[] __initdata = { - [0] = { - .name = "nand", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(mini2440_default_nand_part), - .partitions = mini2440_default_nand_part, - .flash_bbt = 1, /* we use u-boot to create a BBT */ - }, -}; - -static struct s3c2410_platform_nand mini2440_nand_info __initdata = { - .tacls = 0, - .twrph0 = 25, - .twrph1 = 15, - .nr_sets = ARRAY_SIZE(mini2440_nand_sets), - .sets = mini2440_nand_sets, - .ignore_unset_ecc = 1, - .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, -}; - -/* DM9000AEP 10/100 ethernet controller */ - -static struct resource mini2440_dm9k_resource[] = { - [0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4), - [1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4), - [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ - | IORESOURCE_IRQ_HIGHEDGE), -}; - -/* - * The DM9000 has no eeprom, and it's MAC address is set by - * the bootloader before starting the kernel. - */ -static struct dm9000_plat_data mini2440_dm9k_pdata = { - .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), -}; - -static struct platform_device mini2440_device_eth = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(mini2440_dm9k_resource), - .resource = mini2440_dm9k_resource, - .dev = { - .platform_data = &mini2440_dm9k_pdata, - }, -}; - -/* CON5 - * +--+ /-----\ - * | | | | - * | | | BAT | - * | | \_____/ - * | | - * | | +----+ +----+ - * | | | K5 | | K1 | - * | | +----+ +----+ - * | | +----+ +----+ - * | | | K4 | | K2 | - * | | +----+ +----+ - * | | +----+ +----+ - * | | | K6 | | K3 | - * | | +----+ +----+ - * ..... - */ -static struct gpio_keys_button mini2440_buttons[] = { - { - .gpio = S3C2410_GPG(0), /* K1 */ - .code = KEY_F1, - .desc = "Button 1", - .active_low = 1, - }, - { - .gpio = S3C2410_GPG(3), /* K2 */ - .code = KEY_F2, - .desc = "Button 2", - .active_low = 1, - }, - { - .gpio = S3C2410_GPG(5), /* K3 */ - .code = KEY_F3, - .desc = "Button 3", - .active_low = 1, - }, - { - .gpio = S3C2410_GPG(6), /* K4 */ - .code = KEY_POWER, - .desc = "Power", - .active_low = 1, - }, - { - .gpio = S3C2410_GPG(7), /* K5 */ - .code = KEY_F5, - .desc = "Button 5", - .active_low = 1, - }, -#if 0 - /* this pin is also known as TCLK1 and seems to already - * marked as "in use" somehow in the kernel -- possibly wrongly - */ - { - .gpio = S3C2410_GPG(11), /* K6 */ - .code = KEY_F6, - .desc = "Button 6", - .active_low = 1, - }, -#endif -}; - -static struct gpio_keys_platform_data mini2440_button_data = { - .buttons = mini2440_buttons, - .nbuttons = ARRAY_SIZE(mini2440_buttons), -}; - -static struct platform_device mini2440_button_device = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &mini2440_button_data, - } -}; - -/* LEDS */ - -static struct gpiod_lookup_table mini2440_led1_gpio_table = { - .dev_id = "s3c24xx_led.1", - .table = { - GPIO_LOOKUP("GPB", 5, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct gpiod_lookup_table mini2440_led2_gpio_table = { - .dev_id = "s3c24xx_led.2", - .table = { - GPIO_LOOKUP("GPB", 6, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct gpiod_lookup_table mini2440_led3_gpio_table = { - .dev_id = "s3c24xx_led.3", - .table = { - GPIO_LOOKUP("GPB", 7, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct gpiod_lookup_table mini2440_led4_gpio_table = { - .dev_id = "s3c24xx_led.4", - .table = { - GPIO_LOOKUP("GPB", 8, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct gpiod_lookup_table mini2440_backlight_gpio_table = { - .dev_id = "s3c24xx_led.5", - .table = { - GPIO_LOOKUP("GPG", 4, NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct s3c24xx_led_platdata mini2440_led1_pdata = { - .name = "led1", - .def_trigger = "heartbeat", -}; - -static struct s3c24xx_led_platdata mini2440_led2_pdata = { - .name = "led2", - .def_trigger = "nand-disk", -}; - -static struct s3c24xx_led_platdata mini2440_led3_pdata = { - .name = "led3", - .def_trigger = "mmc0", -}; - -static struct s3c24xx_led_platdata mini2440_led4_pdata = { - .name = "led4", - .def_trigger = "", -}; - -static struct s3c24xx_led_platdata mini2440_led_backlight_pdata = { - .name = "backlight", - .def_trigger = "backlight", -}; - -static struct platform_device mini2440_led1 = { - .name = "s3c24xx_led", - .id = 1, - .dev = { - .platform_data = &mini2440_led1_pdata, - }, -}; - -static struct platform_device mini2440_led2 = { - .name = "s3c24xx_led", - .id = 2, - .dev = { - .platform_data = &mini2440_led2_pdata, - }, -}; - -static struct platform_device mini2440_led3 = { - .name = "s3c24xx_led", - .id = 3, - .dev = { - .platform_data = &mini2440_led3_pdata, - }, -}; - -static struct platform_device mini2440_led4 = { - .name = "s3c24xx_led", - .id = 4, - .dev = { - .platform_data = &mini2440_led4_pdata, - }, -}; - -static struct platform_device mini2440_led_backlight = { - .name = "s3c24xx_led", - .id = 5, - .dev = { - .platform_data = &mini2440_led_backlight_pdata, - }, -}; - -/* AUDIO */ - -static struct s3c24xx_uda134x_platform_data mini2440_audio_pins = { - .l3_clk = S3C2410_GPB(4), - .l3_mode = S3C2410_GPB(2), - .l3_data = S3C2410_GPB(3), - .model = UDA134X_UDA1341 -}; - -static struct platform_device mini2440_audio = { - .name = "s3c24xx_uda134x", - .id = 0, - .dev = { - .platform_data = &mini2440_audio_pins, - }, -}; - -/* - * I2C devices - */ -static const struct property_entry mini2440_at24_properties[] = { - PROPERTY_ENTRY_U32("pagesize", 16), - { } -}; - -static const struct software_node mini2440_at24_node = { - .properties = mini2440_at24_properties, -}; - -static struct i2c_board_info mini2440_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("24c08", 0x50), - .swnode = &mini2440_at24_node, - }, -}; - -static struct uda134x_platform_data s3c24xx_uda134x = { - .l3 = { - .gpio_clk = S3C2410_GPB(4), - .gpio_data = S3C2410_GPB(3), - .gpio_mode = S3C2410_GPB(2), - .use_gpios = 1, - .data_hold = 1, - .data_setup = 1, - .clock_high = 1, - .mode_hold = 1, - .mode = 1, - .mode_setup = 1, - }, - .model = UDA134X_UDA1341, -}; - -static struct platform_device uda1340_codec = { - .name = "uda134x-codec", - .id = -1, - .dev = { - .platform_data = &s3c24xx_uda134x, - }, -}; - -static struct platform_device *mini2440_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_rtc, - &s3c_device_usbgadget, - &mini2440_device_eth, - &mini2440_led1, - &mini2440_led2, - &mini2440_led3, - &mini2440_led4, - &mini2440_button_device, - &s3c_device_nand, - &s3c_device_sdi, - &s3c2440_device_dma, - &s3c_device_iis, - &uda1340_codec, - &mini2440_audio, -}; - -static void __init mini2440_map_io(void) -{ - s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc)); - s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init mini2440_init_time(void) -{ - s3c2440_init_clocks(12000000); - s3c24xx_timer_init(); -} - -/* - * mini2440_features string - * - * t = Touchscreen present - * b = backlight control - * c = camera [TODO] - * 0-9 LCD configuration - * - */ -static char mini2440_features_str[12] __initdata = "0tb"; - -static int __init mini2440_features_setup(char *str) -{ - if (str) - strscpy(mini2440_features_str, str, - sizeof(mini2440_features_str)); - return 1; -} - -__setup("mini2440=", mini2440_features_setup); - -#define FEATURE_SCREEN (1 << 0) -#define FEATURE_BACKLIGHT (1 << 1) -#define FEATURE_TOUCH (1 << 2) -#define FEATURE_CAMERA (1 << 3) - -struct mini2440_features_t { - int count; - int done; - int lcd_index; - struct platform_device *optional[8]; -}; - -static void __init mini2440_parse_features( - struct mini2440_features_t *features, - const char *features_str) -{ - const char *fp = features_str; - - features->count = 0; - features->done = 0; - features->lcd_index = -1; - - while (*fp) { - char f = *fp++; - - switch (f) { - case '0'...'9': /* tft screen */ - if (features->done & FEATURE_SCREEN) { - pr_info("MINI2440: '%c' ignored, screen type already set\n", - f); - } else { - int li = f - '0'; - - if (li >= ARRAY_SIZE(mini2440_lcd_cfg)) - pr_info("MINI2440: '%c' out of range LCD mode\n", - f); - else { - features->optional[features->count++] = - &s3c_device_lcd; - features->lcd_index = li; - } - } - features->done |= FEATURE_SCREEN; - break; - case 'b': - if (features->done & FEATURE_BACKLIGHT) - pr_info("MINI2440: '%c' ignored, backlight already set\n", - f); - else { - features->optional[features->count++] = - &mini2440_led_backlight; - } - features->done |= FEATURE_BACKLIGHT; - break; - case 't': - pr_info("MINI2440: '%c' ignored, touchscreen not compiled in\n", - f); - break; - case 'c': - if (features->done & FEATURE_CAMERA) - pr_info("MINI2440: '%c' ignored, camera already registered\n", - f); - else - features->optional[features->count++] = - &s3c_device_camif; - features->done |= FEATURE_CAMERA; - break; - } - } -} - -static void __init mini2440_init(void) -{ - struct mini2440_features_t features = { 0 }; - int i; - - pr_info("MINI2440: Option string mini2440=%s\n", - mini2440_features_str); - - /* Parse the feature string */ - mini2440_parse_features(&features, mini2440_features_str); - - /* turn LCD on */ - s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND); - - /* Turn the backlight early on */ - WARN_ON(gpio_request_one(S3C2410_GPG(4), GPIOF_OUT_INIT_HIGH, NULL)); - gpio_free(S3C2410_GPG(4)); - - /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */ - gpio_request_one(S3C2410_GPB(1), GPIOF_IN, NULL); - s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP); - gpio_free(S3C2410_GPB(1)); - - /* mark the key as input, without pullups (there is one on the board) */ - for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) { - s3c_gpio_setpull(mini2440_buttons[i].gpio, S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(mini2440_buttons[i].gpio, S3C2410_GPIO_INPUT); - } - - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - - if (features.lcd_index != -1) { - int li; - - mini2440_fb_info.displays = - &mini2440_lcd_cfg[features.lcd_index]; - - pr_info("MINI2440: LCD"); - for (li = 0; li < ARRAY_SIZE(mini2440_lcd_cfg); li++) - if (li == features.lcd_index) - pr_cont(" [%d:%dx%d]", li, - mini2440_lcd_cfg[li].width, - mini2440_lcd_cfg[li].height); - else - pr_cont(" %d:%dx%d", li, - mini2440_lcd_cfg[li].width, - mini2440_lcd_cfg[li].height); - pr_cont("\n"); - s3c24xx_fb_set_platdata(&mini2440_fb_info); - } - - gpiod_add_lookup_table(&mini2440_udc_gpio_table); - s3c24xx_udc_set_platdata(&mini2440_udc_cfg); - gpiod_add_lookup_table(&mini2440_mmc_gpio_table); - s3c24xx_mci_set_platdata(&mini2440_mmc_cfg); - s3c_nand_set_platdata(&mini2440_nand_info); - s3c_i2c0_set_platdata(NULL); - - i2c_register_board_info(0, mini2440_i2c_devs, - ARRAY_SIZE(mini2440_i2c_devs)); - - /* Disable pull-up on the LED lines */ - s3c_gpio_setpull(S3C2410_GPB(5), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPB(6), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPB(7), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPB(8), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPG(4), S3C_GPIO_PULL_NONE); - - /* Add lookups for the lines */ - gpiod_add_lookup_table(&mini2440_led1_gpio_table); - gpiod_add_lookup_table(&mini2440_led2_gpio_table); - gpiod_add_lookup_table(&mini2440_led3_gpio_table); - gpiod_add_lookup_table(&mini2440_led4_gpio_table); - gpiod_add_lookup_table(&mini2440_backlight_gpio_table); - - platform_add_devices(mini2440_devices, ARRAY_SIZE(mini2440_devices)); - - if (features.count) /* the optional features */ - platform_add_devices(features.optional, features.count); - -} - - -MACHINE_START(MINI2440, "MINI2440") - /* Maintainer: Michel Pollet <buserror@gmail.com> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2440, - .map_io = mini2440_map_io, - .init_machine = mini2440_init, - .init_irq = s3c2440_init_irq, - .init_time = mini2440_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-mini6410.c b/arch/arm/mach-s3c/mach-mini6410.c deleted file mode 100644 index 058ae9e8b89f..000000000000 --- a/arch/arm/mach-s3c/mach-mini6410.c +++ /dev/null @@ -1,365 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2010 Darius Augulis <augulis.darius@gmail.com> -// Copyright 2008 Openmoko, Inc. -// Copyright 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/dm9000.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/types.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "map.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include <linux/soc/samsung/s3c-adc.h> -#include "cpu.h" -#include "devs.h" -#include "fb.h" -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/mmc-sdhci-s3c.h> -#include "sdhci.h" -#include <linux/platform_data/touchscreen-s3c2410.h> -#include "irqs.h" - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include "s3c64xx.h" -#include "regs-modem-s3c64xx.h" -#include "regs-srom-s3c64xx.h" - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) -#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) - -static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, -}; - -/* DM9000AEP 10/100 ethernet controller */ - -static struct resource mini6410_dm9k_resource[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2), - [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2), - [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \ - | IORESOURCE_IRQ_HIGHLEVEL), -}; - -static struct dm9000_plat_data mini6410_dm9k_pdata = { - .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), -}; - -static struct platform_device mini6410_device_eth = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(mini6410_dm9k_resource), - .resource = mini6410_dm9k_resource, - .dev = { - .platform_data = &mini6410_dm9k_pdata, - }, -}; - -static struct mtd_partition mini6410_nand_part[] = { - [0] = { - .name = "uboot", - .size = SZ_1M, - .offset = 0, - }, - [1] = { - .name = "kernel", - .size = SZ_2M, - .offset = SZ_1M, - }, - [2] = { - .name = "rootfs", - .size = MTDPART_SIZ_FULL, - .offset = SZ_1M + SZ_2M, - }, -}; - -static struct s3c2410_nand_set mini6410_nand_sets[] = { - [0] = { - .name = "nand", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(mini6410_nand_part), - .partitions = mini6410_nand_part, - }, -}; - -static struct s3c2410_platform_nand mini6410_nand_info = { - .tacls = 25, - .twrph0 = 55, - .twrph1 = 40, - .nr_sets = ARRAY_SIZE(mini6410_nand_sets), - .sets = mini6410_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 480, - .yres = 272, -}; - -static struct fb_videomode mini6410_lcd_type0_timing = { - /* 4.3" 480x272 */ - .left_margin = 3, - .right_margin = 2, - .upper_margin = 1, - .lower_margin = 1, - .hsync_len = 40, - .vsync_len = 1, - .xres = 480, - .yres = 272, -}; - -static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode mini6410_lcd_type1_timing = { - /* 7.0" 800x480 */ - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = { - { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &mini6410_lcd_type0_timing, - .win[0] = &mini6410_lcd_type0_fb_win, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - }, { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &mini6410_lcd_type1_timing, - .win[0] = &mini6410_lcd_type1_fb_win, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - }, - { }, -}; - -static void mini6410_lcd_power_set(struct plat_lcd_data *pd, - unsigned int power) -{ - if (power) - gpio_direction_output(S3C64XX_GPE(0), 1); - else - gpio_direction_output(S3C64XX_GPE(0), 0); -} - -static struct plat_lcd_data mini6410_lcd_power_data = { - .set_power = mini6410_lcd_power_set, -}; - -static struct platform_device mini6410_lcd_powerdev = { - .name = "platform-lcd", - .dev.parent = &s3c_device_fb.dev, - .dev.platform_data = &mini6410_lcd_power_data, -}; - -static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = S3C64XX_GPN(10), - .ext_cd_gpio_invert = true, -}; - -static struct platform_device *mini6410_devices[] __initdata = { - &mini6410_device_eth, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_ohci, - &s3c_device_nand, - &s3c_device_fb, - &mini6410_lcd_powerdev, - &s3c_device_adc, -}; - -static void __init mini6410_map_io(void) -{ - u32 tmp; - - s3c64xx_init_io(NULL, 0); - s3c64xx_set_xtal_freq(12000000); - s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs)); - s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); - - /* set the LCD type */ - tmp = __raw_readl(S3C64XX_SPCON); - tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; - tmp |= S3C64XX_SPCON_LCD_SEL_RGB; - __raw_writel(tmp, S3C64XX_SPCON); - - /* remove the LCD bypass */ - tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); - tmp &= ~MIFPCON_LCD_BYPASS; - __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); -} - -/* - * mini6410_features string - * - * 0-9 LCD configuration - * - */ -static char mini6410_features_str[12] __initdata = "0"; - -static int __init mini6410_features_setup(char *str) -{ - if (str) - strscpy(mini6410_features_str, str, - sizeof(mini6410_features_str)); - return 1; -} - -__setup("mini6410=", mini6410_features_setup); - -#define FEATURE_SCREEN (1 << 0) - -struct mini6410_features_t { - int done; - int lcd_index; -}; - -static void mini6410_parse_features( - struct mini6410_features_t *features, - const char *features_str) -{ - const char *fp = features_str; - - features->done = 0; - features->lcd_index = 0; - - while (*fp) { - char f = *fp++; - - switch (f) { - case '0'...'9': /* tft screen */ - if (features->done & FEATURE_SCREEN) { - printk(KERN_INFO "MINI6410: '%c' ignored, " - "screen type already set\n", f); - } else { - int li = f - '0'; - if (li >= ARRAY_SIZE(mini6410_lcd_pdata)) - printk(KERN_INFO "MINI6410: '%c' out " - "of range LCD mode\n", f); - else { - features->lcd_index = li; - } - } - features->done |= FEATURE_SCREEN; - break; - } - } -} - -static void __init mini6410_machine_init(void) -{ - u32 cs1; - struct mini6410_features_t features = { 0 }; - - printk(KERN_INFO "MINI6410: Option string mini6410=%s\n", - mini6410_features_str); - - /* Parse the feature string */ - mini6410_parse_features(&features, mini6410_features_str); - - printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n", - mini6410_lcd_pdata[features.lcd_index].win[0]->xres, - mini6410_lcd_pdata[features.lcd_index].win[0]->yres); - - s3c_nand_set_platdata(&mini6410_nand_info); - s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]); - s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata); - s3c64xx_ts_set_platdata(NULL); - - /* configure nCS1 width to 16 bits */ - - cs1 = __raw_readl(S3C64XX_SROM_BW) & - ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); - cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | - (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | - (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << - S3C64XX_SROM_BW__NCS1__SHIFT; - __raw_writel(cs1, S3C64XX_SROM_BW); - - /* set timing for nCS1 suitable for ethernet chip */ - - __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | - (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | - (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | - (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | - (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | - (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | - (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); - - gpio_request(S3C64XX_GPF(15), "LCD power"); - gpio_request(S3C64XX_GPE(0), "LCD power"); - - platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices)); -} - -MACHINE_START(MINI6410, "MINI6410") - /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6410_init_irq, - .map_io = mini6410_map_io, - .init_machine = mini6410_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-n30.c b/arch/arm/mach-s3c/mach-n30.c deleted file mode 100644 index 90122fc6b2aa..000000000000 --- a/arch/arm/mach-s3c/mach-n30.c +++ /dev/null @@ -1,682 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Machine specific code for the Acer n30, Acer N35, Navman PiN 570, -// Yakumo AlphaX and Airis NC05 PDAs. -// -// Copyright (c) 2003-2005 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Copyright (c) 2005-2008 Christer Weinigel <christer@weinigel.se> -// -// There is a wiki with more information about the n30 port at -// https://handhelds.org/moin/moin.cgi/AcerN30Documentation . - -#include <linux/kernel.h> -#include <linux/types.h> - -#include <linux/gpio_keys.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/input.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/timer.h> -#include <linux/io.h> -#include <linux/mmc/host.h> - -#include "hardware-s3c24xx.h" -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/fb-s3c2410.h> -#include <linux/platform_data/leds-s3c24xx.h> -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> -#include <asm/mach/map.h> - -#include <linux/platform_data/i2c-s3c2410.h> - -#include "cpu.h" -#include "devs.h" -#include <linux/platform_data/mmc-s3cmci.h> -#include <linux/platform_data/usb-s3c2410_udc.h> - -#include "s3c24xx.h" - -static struct map_desc n30_iodesc[] __initdata = { - /* nothing here yet */ -}; - -static struct s3c2410_uartcfg n30_uartcfgs[] = { - /* Normal serial port */ - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x2c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - /* IR port */ - [1] = { - .hwport = 1, - .flags = 0, - .uart_flags = UPF_CONS_FLOW, - .ucon = 0x2c5, - .ulcon = 0x43, - .ufcon = 0x51, - }, - /* On the N30 the bluetooth controller is connected here. - * On the N35 and variants the GPS receiver is connected here. */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = 0x2c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, -}; - -static struct s3c2410_udc_mach_info n30_udc_cfg __initdata = { -}; - -static struct gpiod_lookup_table n30_udc_gpio_table = { - .dev_id = "s3c2410-usbgadget", - .table = { - GPIO_LOOKUP("GPIOG", 1, "vbus", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOB", 3, "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpio_keys_button n30_buttons[] = { - { - .gpio = S3C2410_GPF(0), - .code = KEY_POWER, - .desc = "Power", - .active_low = 0, - }, - { - .gpio = S3C2410_GPG(9), - .code = KEY_UP, - .desc = "Thumbwheel Up", - .active_low = 0, - }, - { - .gpio = S3C2410_GPG(8), - .code = KEY_DOWN, - .desc = "Thumbwheel Down", - .active_low = 0, - }, - { - .gpio = S3C2410_GPG(7), - .code = KEY_ENTER, - .desc = "Thumbwheel Press", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(7), - .code = KEY_HOMEPAGE, - .desc = "Home", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(6), - .code = KEY_CALENDAR, - .desc = "Calendar", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(5), - .code = KEY_ADDRESSBOOK, - .desc = "Contacts", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(4), - .code = KEY_MAIL, - .desc = "Mail", - .active_low = 0, - }, -}; - -static struct gpio_keys_platform_data n30_button_data = { - .buttons = n30_buttons, - .nbuttons = ARRAY_SIZE(n30_buttons), -}; - -static struct platform_device n30_button_device = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &n30_button_data, - } -}; - -static struct gpio_keys_button n35_buttons[] = { - { - .gpio = S3C2410_GPF(0), - .code = KEY_POWER, - .type = EV_PWR, - .desc = "Power", - .active_low = 0, - .wakeup = 1, - }, - { - .gpio = S3C2410_GPG(9), - .code = KEY_UP, - .desc = "Joystick Up", - .active_low = 0, - }, - { - .gpio = S3C2410_GPG(8), - .code = KEY_DOWN, - .desc = "Joystick Down", - .active_low = 0, - }, - { - .gpio = S3C2410_GPG(6), - .code = KEY_DOWN, - .desc = "Joystick Left", - .active_low = 0, - }, - { - .gpio = S3C2410_GPG(5), - .code = KEY_DOWN, - .desc = "Joystick Right", - .active_low = 0, - }, - { - .gpio = S3C2410_GPG(7), - .code = KEY_ENTER, - .desc = "Joystick Press", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(7), - .code = KEY_HOMEPAGE, - .desc = "Home", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(6), - .code = KEY_CALENDAR, - .desc = "Calendar", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(5), - .code = KEY_ADDRESSBOOK, - .desc = "Contacts", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(4), - .code = KEY_MAIL, - .desc = "Mail", - .active_low = 0, - }, - { - .gpio = S3C2410_GPF(3), - .code = SW_RADIO, - .desc = "GPS Antenna", - .active_low = 0, - }, - { - .gpio = S3C2410_GPG(2), - .code = SW_HEADPHONE_INSERT, - .desc = "Headphone", - .active_low = 0, - }, -}; - -static struct gpio_keys_platform_data n35_button_data = { - .buttons = n35_buttons, - .nbuttons = ARRAY_SIZE(n35_buttons), -}; - -static struct platform_device n35_button_device = { - .name = "gpio-keys", - .id = -1, - .num_resources = 0, - .dev = { - .platform_data = &n35_button_data, - } -}; - -/* This is the bluetooth LED on the device. */ - -static struct gpiod_lookup_table n30_blue_led_gpio_table = { - .dev_id = "s3c24xx_led.1", - .table = { - GPIO_LOOKUP("GPG", 6, NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct s3c24xx_led_platdata n30_blue_led_pdata = { - .name = "blue_led", - .def_trigger = "", -}; - -/* This is the blue LED on the device. Originally used to indicate GPS activity - * by flashing. */ - -static struct gpiod_lookup_table n35_blue_led_gpio_table = { - .dev_id = "s3c24xx_led.1", - .table = { - GPIO_LOOKUP("GPD", 8, NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct s3c24xx_led_platdata n35_blue_led_pdata = { - .name = "blue_led", - .def_trigger = "", -}; - -/* This LED is driven by the battery microcontroller, and is blinking - * red, blinking green or solid green when the battery is low, - * charging or full respectively. By driving GPD9 low, it's possible - * to force the LED to blink red, so call that warning LED. */ - -static struct gpiod_lookup_table n30_warning_led_gpio_table = { - .dev_id = "s3c24xx_led.2", - .table = { - GPIO_LOOKUP("GPD", 9, NULL, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct s3c24xx_led_platdata n30_warning_led_pdata = { - .name = "warning_led", - .def_trigger = "", -}; - -static struct gpiod_lookup_table n35_warning_led_gpio_table = { - .dev_id = "s3c24xx_led.2", - .table = { - GPIO_LOOKUP("GPD", 9, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct s3c24xx_led_platdata n35_warning_led_pdata = { - .name = "warning_led", - .def_trigger = "", -}; - -static struct platform_device n30_blue_led = { - .name = "s3c24xx_led", - .id = 1, - .dev = { - .platform_data = &n30_blue_led_pdata, - }, -}; - -static struct platform_device n35_blue_led = { - .name = "s3c24xx_led", - .id = 1, - .dev = { - .platform_data = &n35_blue_led_pdata, - }, -}; - -static struct platform_device n30_warning_led = { - .name = "s3c24xx_led", - .id = 2, - .dev = { - .platform_data = &n30_warning_led_pdata, - }, -}; - -static struct platform_device n35_warning_led = { - .name = "s3c24xx_led", - .id = 2, - .dev = { - .platform_data = &n35_warning_led_pdata, - }, -}; - -static struct s3c2410fb_display n30_display __initdata = { - .type = S3C2410_LCDCON1_TFT, - .width = 240, - .height = 320, - .pixclock = 170000, - - .xres = 240, - .yres = 320, - .bpp = 16, - .left_margin = 3, - .right_margin = 40, - .hsync_len = 40, - .upper_margin = 2, - .lower_margin = 3, - .vsync_len = 2, - - .lcdcon5 = S3C2410_LCDCON5_INVVLINE | S3C2410_LCDCON5_INVVFRAME, -}; - -static struct s3c2410fb_mach_info n30_fb_info __initdata = { - .displays = &n30_display, - .num_displays = 1, - .default_display = 0, - .lpcsel = 0x06, -}; - -static void n30_sdi_set_power(unsigned char power_mode, unsigned short vdd) -{ - s3c24xx_mci_def_set_power(power_mode, vdd); - - switch (power_mode) { - case MMC_POWER_ON: - case MMC_POWER_UP: - gpio_set_value(S3C2410_GPG(4), 1); - break; - case MMC_POWER_OFF: - default: - gpio_set_value(S3C2410_GPG(4), 0); - break; - } -} - -static struct s3c24xx_mci_pdata n30_mci_cfg __initdata = { - .ocr_avail = MMC_VDD_32_33, - .set_power = n30_sdi_set_power, -}; - -static struct gpiod_lookup_table n30_mci_gpio_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* Card detect S3C2410_GPF(1) */ - GPIO_LOOKUP("GPIOF", 1, "cd", GPIO_ACTIVE_LOW), - /* Write protect S3C2410_GPG(10) */ - GPIO_LOOKUP("GPIOG", 10, "wp", GPIO_ACTIVE_LOW), - { }, - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - }, -}; - -static struct platform_device *n30_devices[] __initdata = { - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_ohci, - &s3c_device_rtc, - &s3c_device_usbgadget, - &s3c_device_sdi, - &n30_button_device, - &n30_blue_led, - &n30_warning_led, -}; - -static struct platform_device *n35_devices[] __initdata = { - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_rtc, - &s3c_device_usbgadget, - &s3c_device_sdi, - &n35_button_device, - &n35_blue_led, - &n35_warning_led, -}; - -static struct s3c2410_platform_i2c __initdata n30_i2ccfg = { - .flags = 0, - .slave_addr = 0x10, - .frequency = 10*1000, -}; - -/* Lots of hardcoded stuff, but it sets up the hardware in a useful - * state so that we can boot Linux directly from flash. */ -static void __init n30_hwinit(void) -{ - /* GPA0-11 special functions -- unknown what they do - * GPA12 N30 special function -- unknown what it does - * N35/PiN output -- unknown what it does - * - * A12 is nGCS1 on the N30 and an output on the N35/PiN. I - * don't think it does anything useful on the N30, so I ought - * to make it an output there too since it always driven to 0 - * as far as I can tell. */ - if (machine_is_n30()) - __raw_writel(0x007fffff, S3C2410_GPACON); - if (machine_is_n35()) - __raw_writel(0x007fefff, S3C2410_GPACON); - __raw_writel(0x00000000, S3C2410_GPADAT); - - /* GPB0 TOUT0 backlight level - * GPB1 output 1=backlight on - * GPB2 output IrDA enable 0=transceiver enabled, 1=disabled - * GPB3 output USB D+ pull up 0=disabled, 1=enabled - * GPB4 N30 output -- unknown function - * N30/PiN GPS control 0=GPS enabled, 1=GPS disabled - * GPB5 output -- unknown function - * GPB6 input -- unknown function - * GPB7 output -- unknown function - * GPB8 output -- probably LCD driver enable - * GPB9 output -- probably LCD VSYNC driver enable - * GPB10 output -- probably LCD HSYNC driver enable - */ - __raw_writel(0x00154556, S3C2410_GPBCON); - __raw_writel(0x00000750, S3C2410_GPBDAT); - __raw_writel(0x00000073, S3C2410_GPBUP); - - /* GPC0 input RS232 DCD/DSR/RI - * GPC1 LCD - * GPC2 output RS232 DTR? - * GPC3 input RS232 DCD/DSR/RI - * GPC4 LCD - * GPC5 output 0=NAND write enabled, 1=NAND write protect - * GPC6 input -- unknown function - * GPC7 input charger status 0=charger connected - * this input can be triggered by power on the USB device - * port too, but will go back to disconnected soon after. - * GPC8 N30/N35 output -- unknown function, always driven to 1 - * PiN input -- unknown function, always read as 1 - * Make it an input with a pull up for all models. - * GPC9-15 LCD - */ - __raw_writel(0xaaa80618, S3C2410_GPCCON); - __raw_writel(0x0000014c, S3C2410_GPCDAT); - __raw_writel(0x0000fef2, S3C2410_GPCUP); - - /* GPD0 input -- unknown function - * GPD1-D7 LCD - * GPD8 N30 output -- unknown function - * N35/PiN output 1=GPS LED on - * GPD9 output 0=power led blinks red, 1=normal power led function - * GPD10 output -- unknown function - * GPD11-15 LCD drivers - */ - __raw_writel(0xaa95aaa4, S3C2410_GPDCON); - __raw_writel(0x00000601, S3C2410_GPDDAT); - __raw_writel(0x0000fbfe, S3C2410_GPDUP); - - /* GPE0-4 I2S audio bus - * GPE5-10 SD/MMC bus - * E11-13 outputs -- unknown function, probably power management - * E14-15 I2C bus connected to the battery controller - */ - __raw_writel(0xa56aaaaa, S3C2410_GPECON); - __raw_writel(0x0000efc5, S3C2410_GPEDAT); - __raw_writel(0x0000f81f, S3C2410_GPEUP); - - /* GPF0 input 0=power button pressed - * GPF1 input SD/MMC switch 0=card present - * GPF2 N30 1=reset button pressed (inverted compared to the rest) - * N35/PiN 0=reset button pressed - * GPF3 N30/PiN input -- unknown function - * N35 input GPS antenna position, 0=antenna closed, 1=open - * GPF4 input 0=button 4 pressed - * GPF5 input 0=button 3 pressed - * GPF6 input 0=button 2 pressed - * GPF7 input 0=button 1 pressed - */ - __raw_writel(0x0000aaaa, S3C2410_GPFCON); - __raw_writel(0x00000000, S3C2410_GPFDAT); - __raw_writel(0x000000ff, S3C2410_GPFUP); - - /* GPG0 input RS232 DCD/DSR/RI - * GPG1 input 1=USB gadget port has power from a host - * GPG2 N30 input -- unknown function - * N35/PiN input 0=headphones plugged in, 1=not plugged in - * GPG3 N30 output -- unknown function - * N35/PiN input with unknown function - * GPG4 N30 output 0=MMC enabled, 1=MMC disabled - * GPG5 N30 output 0=BlueTooth chip disabled, 1=enabled - * N35/PiN input joystick right - * GPG6 N30 output 0=blue led on, 1=off - * N35/PiN input joystick left - * GPG7 input 0=thumbwheel pressed - * GPG8 input 0=thumbwheel down - * GPG9 input 0=thumbwheel up - * GPG10 input SD/MMC write protect switch - * GPG11 N30 input -- unknown function - * N35 output 0=GPS antenna powered, 1=not powered - * PiN output -- unknown function - * GPG12-15 touch screen functions - * - * The pullups differ between the models, so enable all - * pullups that are enabled on any of the models. - */ - if (machine_is_n30()) - __raw_writel(0xff0a956a, S3C2410_GPGCON); - if (machine_is_n35()) - __raw_writel(0xff4aa92a, S3C2410_GPGCON); - __raw_writel(0x0000e800, S3C2410_GPGDAT); - __raw_writel(0x0000f86f, S3C2410_GPGUP); - - /* GPH0/1/2/3 RS232 serial port - * GPH4/5 IrDA serial port - * GPH6/7 N30 BlueTooth serial port - * N35/PiN GPS receiver - * GPH8 input -- unknown function - * GPH9 CLKOUT0 HCLK -- unknown use - * GPH10 CLKOUT1 FCLK -- unknown use - * - * The pull ups for H6/H7 are enabled on N30 but not on the - * N35/PiN. I suppose is useful for a budget model of the N30 - * with no bluetooth. It doesn't hurt to have the pull ups - * enabled on the N35, so leave them enabled for all models. - */ - __raw_writel(0x0028aaaa, S3C2410_GPHCON); - __raw_writel(0x000005ef, S3C2410_GPHDAT); - __raw_writel(0x0000063f, S3C2410_GPHUP); -} - -static void __init n30_map_io(void) -{ - s3c24xx_init_io(n30_iodesc, ARRAY_SIZE(n30_iodesc)); - n30_hwinit(); - s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init n30_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -/* GPB3 is the line that controls the pull-up for the USB D+ line */ - -static void __init n30_init(void) -{ - WARN_ON(gpio_request(S3C2410_GPG(4), "mmc power")); - - s3c24xx_fb_set_platdata(&n30_fb_info); - gpiod_add_lookup_table(&n30_udc_gpio_table); - s3c24xx_udc_set_platdata(&n30_udc_cfg); - gpiod_add_lookup_table(&n30_mci_gpio_table); - s3c24xx_mci_set_platdata(&n30_mci_cfg); - s3c_i2c0_set_platdata(&n30_i2ccfg); - - /* Turn off suspend on both USB ports, and switch the - * selectable USB port to USB device mode. */ - - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | - S3C2410_MISCCR_USBSUSPND0 | - S3C2410_MISCCR_USBSUSPND1, 0x0); - - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - - if (machine_is_n30()) { - /* Turn off suspend on both USB ports, and switch the - * selectable USB port to USB device mode. */ - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | - S3C2410_MISCCR_USBSUSPND0 | - S3C2410_MISCCR_USBSUSPND1, 0x0); - - /* Disable pull-up and add GPIO tables */ - s3c_gpio_setpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); - gpiod_add_lookup_table(&n30_blue_led_gpio_table); - gpiod_add_lookup_table(&n30_warning_led_gpio_table); - - platform_add_devices(n30_devices, ARRAY_SIZE(n30_devices)); - } - - if (machine_is_n35()) { - /* Turn off suspend and switch the selectable USB port - * to USB device mode. Turn on suspend for the host - * port since it is not connected on the N35. - * - * Actually, the host port is available at some pads - * on the back of the device, so it would actually be - * possible to add a USB device inside the N35 if you - * are willing to do some hardware modifications. */ - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | - S3C2410_MISCCR_USBSUSPND0 | - S3C2410_MISCCR_USBSUSPND1, - S3C2410_MISCCR_USBSUSPND0); - - /* Disable pull-up and add GPIO tables */ - s3c_gpio_setpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); - gpiod_add_lookup_table(&n35_blue_led_gpio_table); - gpiod_add_lookup_table(&n35_warning_led_gpio_table); - - platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices)); - } -} - -MACHINE_START(N30, "Acer-N30") - /* Maintainer: Christer Weinigel <christer@weinigel.se>, - Ben Dooks <ben-linux@fluff.org> - */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .init_time = n30_init_time, - .init_machine = n30_init, - .init_irq = s3c2410_init_irq, - .map_io = n30_map_io, -MACHINE_END - -MACHINE_START(N35, "Acer-N35") - /* Maintainer: Christer Weinigel <christer@weinigel.se> - */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .init_time = n30_init_time, - .init_machine = n30_init, - .init_irq = s3c2410_init_irq, - .map_io = n30_map_io, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-ncp.c b/arch/arm/mach-s3c/mach-ncp.c deleted file mode 100644 index 1e65f8bce5c4..000000000000 --- a/arch/arm/mach-s3c/mach-ncp.c +++ /dev/null @@ -1,100 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2008-2009 Samsung Electronics - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/i2c.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/delay.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "irqs.h" -#include "map.h" - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/i2c-s3c2410.h> -#include "fb.h" - -#include "devs.h" -#include "cpu.h" - -#include "s3c64xx.h" - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg ncp_uartcfgs[] __initdata = { - /* REVISIT: NCP uses only serial 1, 2 */ - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, -}; - -static struct platform_device *ncp_devices[] __initdata = { - &s3c_device_hsmmc1, - &s3c_device_i2c0, -}; - -static struct map_desc ncp_iodesc[] __initdata = {}; - -static void __init ncp_map_io(void) -{ - s3c64xx_init_io(ncp_iodesc, ARRAY_SIZE(ncp_iodesc)); - s3c64xx_set_xtal_freq(12000000); - s3c24xx_init_uarts(ncp_uartcfgs, ARRAY_SIZE(ncp_uartcfgs)); - s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); -} - -static void __init ncp_machine_init(void) -{ - s3c_i2c0_set_platdata(NULL); - - platform_add_devices(ncp_devices, ARRAY_SIZE(ncp_devices)); -} - -MACHINE_START(NCP, "NCP") - /* Maintainer: Samsung Electronics */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6410_init_irq, - .map_io = ncp_map_io, - .init_machine = ncp_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-nexcoder.c b/arch/arm/mach-s3c/mach-nexcoder.c deleted file mode 100644 index d17a3fcb7425..000000000000 --- a/arch/arm/mach-s3c/mach-nexcoder.c +++ /dev/null @@ -1,162 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// linux/arch/arm/mach-s3c2440/mach-nexcoder.c -// -// Copyright (c) 2004 Nex Vision -// Guillaume GOURAT <guillaume.gourat@nexvision.tv> -// -// Modifications: -// 15-10-2004 GG Created initial version -// 12-03-2005 BJD Updated for release - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/string.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <linux/mtd/map.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/setup.h> -#include <asm/irq.h> -#include <asm/mach-types.h> - -//#include <asm/debug-ll.h> -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include <linux/platform_data/i2c-s3c2410.h> - -#include "gpio-cfg.h" -#include "devs.h" -#include "cpu.h" - -#include "s3c24xx.h" - -static struct map_desc nexcoder_iodesc[] __initdata = { - /* nothing here yet */ -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg nexcoder_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -/* NOR Flash on NexVision NexCoder 2440 board */ - -static struct resource nexcoder_nor_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_8M), -}; - -static struct map_info nexcoder_nor_map = { - .bankwidth = 2, -}; - -static struct platform_device nexcoder_device_nor = { - .name = "mtd-flash", - .id = -1, - .num_resources = ARRAY_SIZE(nexcoder_nor_resource), - .resource = nexcoder_nor_resource, - .dev = - { - .platform_data = &nexcoder_nor_map, - } -}; - -/* Standard Nexcoder devices */ - -static struct platform_device *nexcoder_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_rtc, - &s3c_device_camif, - &s3c_device_spi0, - &s3c_device_spi1, - &nexcoder_device_nor, -}; - -static void __init nexcoder_sensorboard_init(void) -{ - /* Initialize SCCB bus */ - gpio_request_one(S3C2410_GPE(14), GPIOF_OUT_INIT_HIGH, NULL); - gpio_free(S3C2410_GPE(14)); /* IICSCL */ - gpio_request_one(S3C2410_GPE(15), GPIOF_OUT_INIT_HIGH, NULL); - gpio_free(S3C2410_GPE(15)); /* IICSDA */ - - /* Power up the sensor board */ - gpio_request_one(S3C2410_GPF(1), GPIOF_OUT_INIT_HIGH, NULL); - gpio_free(S3C2410_GPF(1)); /* CAM_GPIO7 => nLDO_PWRDN */ - gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL); - gpio_free(S3C2410_GPF(2)); /* CAM_GPIO6 => CAM_PWRDN */ -} - -static void __init nexcoder_map_io(void) -{ - s3c24xx_init_io(nexcoder_iodesc, ARRAY_SIZE(nexcoder_iodesc)); - s3c24xx_init_uarts(nexcoder_uartcfgs, ARRAY_SIZE(nexcoder_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); - - nexcoder_sensorboard_init(); -} - -static void __init nexcoder_init_time(void) -{ - s3c2440_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init nexcoder_init(void) -{ - s3c_i2c0_set_platdata(NULL); - - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - - platform_add_devices(nexcoder_devices, ARRAY_SIZE(nexcoder_devices)); -}; - -MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") - /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2440, - .map_io = nexcoder_map_io, - .init_machine = nexcoder_init, - .init_irq = s3c2440_init_irq, - .init_time = nexcoder_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-osiris-dvs.c b/arch/arm/mach-s3c/mach-osiris-dvs.c deleted file mode 100644 index 2e283aedab65..000000000000 --- a/arch/arm/mach-s3c/mach-osiris-dvs.c +++ /dev/null @@ -1,178 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2009 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// -// Simtec Osiris Dynamic Voltage Scaling support. - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/cpufreq.h> -#include <linux/gpio.h> - -#include <linux/mfd/tps65010.h> - -#include <linux/soc/samsung/s3c-cpu-freq.h> -#include "gpio-samsung.h" - -#define OSIRIS_GPIO_DVS S3C2410_GPB(5) - -static bool dvs_en; - -static void osiris_dvs_tps_setdvs(bool on) -{ - unsigned vregs1 = 0, vdcdc2 = 0; - - if (!on) { - vdcdc2 = TPS_VCORE_DISCH | TPS_LP_COREOFF; - vregs1 = TPS_LDO1_OFF; /* turn off in low-power mode */ - } - - dvs_en = on; - vdcdc2 |= TPS_VCORE_1_3V | TPS_VCORE_LP_1_0V; - vregs1 |= TPS_LDO2_ENABLE | TPS_LDO1_ENABLE; - - tps65010_config_vregs1(vregs1); - tps65010_config_vdcdc2(vdcdc2); -} - -static bool is_dvs(struct s3c_freq *f) -{ - /* at the moment, we assume ARMCLK = HCLK => DVS */ - return f->armclk == f->hclk; -} - -/* keep track of current state */ -static bool cur_dvs = false; - -static int osiris_dvs_notify(struct notifier_block *nb, - unsigned long val, void *data) -{ - struct cpufreq_freqs *cf = data; - struct s3c_cpufreq_freqs *freqs = to_s3c_cpufreq(cf); - bool old_dvs = is_dvs(&freqs->old); - bool new_dvs = is_dvs(&freqs->new); - int ret = 0; - - if (!dvs_en) - return 0; - - printk(KERN_DEBUG "%s: old %ld,%ld new %ld,%ld\n", __func__, - freqs->old.armclk, freqs->old.hclk, - freqs->new.armclk, freqs->new.hclk); - - switch (val) { - case CPUFREQ_PRECHANGE: - if ((old_dvs && !new_dvs) || - (cur_dvs && !new_dvs)) { - pr_debug("%s: exiting dvs\n", __func__); - cur_dvs = false; - gpio_set_value(OSIRIS_GPIO_DVS, 1); - } - break; - case CPUFREQ_POSTCHANGE: - if ((!old_dvs && new_dvs) || - (!cur_dvs && new_dvs)) { - pr_debug("entering dvs\n"); - cur_dvs = true; - gpio_set_value(OSIRIS_GPIO_DVS, 0); - } - break; - } - - return ret; -} - -static struct notifier_block osiris_dvs_nb = { - .notifier_call = osiris_dvs_notify, -}; - -static int osiris_dvs_probe(struct platform_device *pdev) -{ - int ret; - - dev_info(&pdev->dev, "initialising\n"); - - ret = gpio_request(OSIRIS_GPIO_DVS, "osiris-dvs"); - if (ret) { - dev_err(&pdev->dev, "cannot claim gpio\n"); - goto err_nogpio; - } - - /* start with dvs disabled */ - gpio_direction_output(OSIRIS_GPIO_DVS, 1); - - ret = cpufreq_register_notifier(&osiris_dvs_nb, - CPUFREQ_TRANSITION_NOTIFIER); - if (ret) { - dev_err(&pdev->dev, "failed to register with cpufreq\n"); - goto err_nofreq; - } - - osiris_dvs_tps_setdvs(true); - - return 0; - -err_nofreq: - gpio_free(OSIRIS_GPIO_DVS); - -err_nogpio: - return ret; -} - -static int osiris_dvs_remove(struct platform_device *pdev) -{ - dev_info(&pdev->dev, "exiting\n"); - - /* disable any current dvs */ - gpio_set_value(OSIRIS_GPIO_DVS, 1); - osiris_dvs_tps_setdvs(false); - - cpufreq_unregister_notifier(&osiris_dvs_nb, - CPUFREQ_TRANSITION_NOTIFIER); - - gpio_free(OSIRIS_GPIO_DVS); - - return 0; -} - -/* the CONFIG_PM block is so small, it isn't worth actually compiling it - * out if the configuration isn't set. */ - -static int osiris_dvs_suspend(struct device *dev) -{ - gpio_set_value(OSIRIS_GPIO_DVS, 1); - osiris_dvs_tps_setdvs(false); - cur_dvs = false; - - return 0; -} - -static int osiris_dvs_resume(struct device *dev) -{ - osiris_dvs_tps_setdvs(true); - return 0; -} - -static const struct dev_pm_ops osiris_dvs_pm = { - .suspend = osiris_dvs_suspend, - .resume = osiris_dvs_resume, -}; - -static struct platform_driver osiris_dvs_driver = { - .probe = osiris_dvs_probe, - .remove = osiris_dvs_remove, - .driver = { - .name = "osiris-dvs", - .pm = &osiris_dvs_pm, - }, -}; - -module_platform_driver(osiris_dvs_driver); - -MODULE_DESCRIPTION("Simtec OSIRIS DVS support"); -MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:osiris-dvs"); diff --git a/arch/arm/mach-s3c/mach-osiris.c b/arch/arm/mach-s3c/mach-osiris.c deleted file mode 100644 index d900d1354de1..000000000000 --- a/arch/arm/mach-s3c/mach-osiris.c +++ /dev/null @@ -1,405 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2005-2008 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/clk.h> -#include <linux/i2c.h> -#include <linux/io.h> -#include <linux/platform_device.h> - -#include <linux/mfd/tps65010.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/irq.h> - -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> - -#include "cpu.h" -#include <linux/soc/samsung/s3c-cpu-freq.h> -#include "devs.h" -#include "gpio-cfg.h" - -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "s3c24xx.h" -#include "osiris.h" -#include "regs-mem-s3c24xx.h" - -/* onboard perihperal map */ - -static struct map_desc osiris_iodesc[] __initdata = { - /* ISA IO areas (may be over-written later) */ - - { - .virtual = (u32)S3C24XX_VA_ISA_BYTE, - .pfn = __phys_to_pfn(S3C2410_CS5), - .length = SZ_16M, - .type = MT_DEVICE, - }, - - /* CPLD control registers */ - - { - .virtual = (u32)OSIRIS_VA_CTRL0, - .pfn = __phys_to_pfn(OSIRIS_PA_CTRL0), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (u32)OSIRIS_VA_CTRL1, - .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (u32)OSIRIS_VA_CTRL2, - .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (u32)OSIRIS_VA_IDREG, - .pfn = __phys_to_pfn(OSIRIS_PA_IDREG), - .length = SZ_16K, - .type = MT_DEVICE, - }, -}; - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, - } -}; - -/* NAND Flash on Osiris board */ - -static int external_map[] = { 2 }; -static int chip0_map[] = { 0 }; -static int chip1_map[] = { 1 }; - -static struct mtd_partition __initdata osiris_default_nand_part[] = { - [0] = { - .name = "Boot Agent", - .size = SZ_16K, - .offset = 0, - }, - [1] = { - .name = "/boot", - .size = SZ_4M - SZ_16K, - .offset = SZ_16K, - }, - [2] = { - .name = "user1", - .offset = SZ_4M, - .size = SZ_32M - SZ_4M, - }, - [3] = { - .name = "user2", - .offset = SZ_32M, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct mtd_partition __initdata osiris_default_nand_part_large[] = { - [0] = { - .name = "Boot Agent", - .size = SZ_128K, - .offset = 0, - }, - [1] = { - .name = "/boot", - .size = SZ_4M - SZ_128K, - .offset = SZ_128K, - }, - [2] = { - .name = "user1", - .offset = SZ_4M, - .size = SZ_32M - SZ_4M, - }, - [3] = { - .name = "user2", - .offset = SZ_32M, - .size = MTDPART_SIZ_FULL, - } -}; - -/* the Osiris has 3 selectable slots for nand-flash, the two - * on-board chip areas, as well as the external slot. - * - * Note, there is no current hot-plug support for the External - * socket. -*/ - -static struct s3c2410_nand_set __initdata osiris_nand_sets[] = { - [1] = { - .name = "External", - .nr_chips = 1, - .nr_map = external_map, - .options = NAND_SCAN_SILENT_NODEV, - .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), - .partitions = osiris_default_nand_part, - }, - [0] = { - .name = "chip0", - .nr_chips = 1, - .nr_map = chip0_map, - .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), - .partitions = osiris_default_nand_part, - }, - [2] = { - .name = "chip1", - .nr_chips = 1, - .nr_map = chip1_map, - .options = NAND_SCAN_SILENT_NODEV, - .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), - .partitions = osiris_default_nand_part, - }, -}; - -static void osiris_nand_select(struct s3c2410_nand_set *set, int slot) -{ - unsigned int tmp; - - slot = set->nr_map[slot] & 3; - - pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n", - slot, set, set->nr_map); - - tmp = __raw_readb(OSIRIS_VA_CTRL0); - tmp &= ~OSIRIS_CTRL0_NANDSEL; - tmp |= slot; - - pr_debug("osiris_nand: ctrl0 now %02x\n", tmp); - - __raw_writeb(tmp, OSIRIS_VA_CTRL0); -} - -static struct s3c2410_platform_nand __initdata osiris_nand_info = { - .tacls = 25, - .twrph0 = 60, - .twrph1 = 60, - .nr_sets = ARRAY_SIZE(osiris_nand_sets), - .sets = osiris_nand_sets, - .select_chip = osiris_nand_select, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -/* PCMCIA control and configuration */ - -static struct resource osiris_pcmcia_resource[] = { - [0] = DEFINE_RES_MEM(0x0f000000, SZ_1M), - [1] = DEFINE_RES_MEM(0x0c000000, SZ_1M), -}; - -static struct platform_device osiris_pcmcia = { - .name = "osiris-pcmcia", - .id = -1, - .num_resources = ARRAY_SIZE(osiris_pcmcia_resource), - .resource = osiris_pcmcia_resource, -}; - -/* Osiris power management device */ - -#ifdef CONFIG_PM -static unsigned char pm_osiris_ctrl0; - -static int osiris_pm_suspend(void) -{ - unsigned int tmp; - - pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0); - tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL; - - /* ensure correct NAND slot is selected on resume */ - if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0) - tmp |= 2; - - __raw_writeb(tmp, OSIRIS_VA_CTRL0); - - /* ensure that an nRESET is not generated on resume. */ - gpio_request_one(S3C2410_GPA(21), GPIOF_OUT_INIT_HIGH, NULL); - gpio_free(S3C2410_GPA(21)); - - return 0; -} - -static void osiris_pm_resume(void) -{ - if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8) - __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1); - - __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0); - - s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); -} - -#else -#define osiris_pm_suspend NULL -#define osiris_pm_resume NULL -#endif - -static struct syscore_ops osiris_pm_syscore_ops = { - .suspend = osiris_pm_suspend, - .resume = osiris_pm_resume, -}; - -/* Link for DVS driver to TPS65011 */ - -static void osiris_tps_release(struct device *dev) -{ - /* static device, do not need to release anything */ -} - -static struct platform_device osiris_tps_device = { - .name = "osiris-dvs", - .id = -1, - .dev.release = osiris_tps_release, -}; - -static int osiris_tps_setup(struct i2c_client *client, void *context) -{ - osiris_tps_device.dev.parent = &client->dev; - return platform_device_register(&osiris_tps_device); -} - -static int osiris_tps_remove(struct i2c_client *client, void *context) -{ - platform_device_unregister(&osiris_tps_device); - return 0; -} - -static struct tps65010_board osiris_tps_board = { - .base = -1, /* GPIO can go anywhere at the moment */ - .setup = osiris_tps_setup, - .teardown = osiris_tps_remove, -}; - -/* I2C devices fitted. */ - -static struct i2c_board_info osiris_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("tps65011", 0x48), - .irq = IRQ_EINT20, - .platform_data = &osiris_tps_board, - }, -}; - -/* Standard Osiris devices */ - -static struct platform_device *osiris_devices[] __initdata = { - &s3c2410_device_dclk, - &s3c_device_i2c0, - &s3c_device_wdt, - &s3c_device_nand, - &osiris_pcmcia, -}; - -static struct s3c_cpufreq_board __initdata osiris_cpufreq = { - .refresh = 7800, /* refresh period is 7.8usec */ - .auto_io = 1, - .need_io = 1, -}; - -static void __init osiris_map_io(void) -{ - unsigned long flags; - - s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); - s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); - - /* check for the newer revision boards with large page nand */ - - if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) { - printk(KERN_INFO "OSIRIS-B detected (revision %d)\n", - __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK); - osiris_nand_sets[0].partitions = osiris_default_nand_part_large; - osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large); - } else { - /* write-protect line to the NAND */ - gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL); - gpio_free(S3C2410_GPA(0)); - } - - /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */ - - local_irq_save(flags); - __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON); - local_irq_restore(flags); -} - -static void __init osiris_init_time(void) -{ - s3c2440_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init osiris_init(void) -{ - register_syscore_ops(&osiris_pm_syscore_ops); - - s3c_i2c0_set_platdata(NULL); - s3c_nand_set_platdata(&osiris_nand_info); - - s3c_cpufreq_setboard(&osiris_cpufreq); - - i2c_register_board_info(0, osiris_i2c_devs, - ARRAY_SIZE(osiris_i2c_devs)); - - platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices)); -}; - -MACHINE_START(OSIRIS, "Simtec-OSIRIS") - /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2440, - .map_io = osiris_map_io, - .init_irq = s3c2440_init_irq, - .init_machine = osiris_init, - .init_time = osiris_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-otom.c b/arch/arm/mach-s3c/mach-otom.c deleted file mode 100644 index 3a2db2f58833..000000000000 --- a/arch/arm/mach-s3c/mach-otom.c +++ /dev/null @@ -1,124 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2004 Nex Vision -// Guillaume GOURAT <guillaume.gourat@nexvision.fr> - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <linux/platform_data/i2c-s3c2410.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include "cpu.h" -#include "devs.h" - -#include "s3c24xx.h" -#include "otom.h" - -static struct map_desc otom11_iodesc[] __initdata = { - /* Device area */ - { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE }, -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg otom11_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - /* port 2 is not actually used */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -/* NOR Flash on NexVision OTOM board */ - -static struct resource otom_nor_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_4M), -}; - -static struct platform_device otom_device_nor = { - .name = "mtd-flash", - .id = -1, - .num_resources = ARRAY_SIZE(otom_nor_resource), - .resource = otom_nor_resource, -}; - -/* Standard OTOM devices */ - -static struct platform_device *otom11_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_rtc, - &otom_device_nor, -}; - -static void __init otom11_map_io(void) -{ - s3c24xx_init_io(otom11_iodesc, ARRAY_SIZE(otom11_iodesc)); - s3c24xx_init_uarts(otom11_uartcfgs, ARRAY_SIZE(otom11_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init otom11_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init otom11_init(void) -{ - s3c_i2c0_set_platdata(NULL); - - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - platform_add_devices(otom11_devices, ARRAY_SIZE(otom11_devices)); -} - -MACHINE_START(OTOM, "Nex Vision - Otom 1.1") - /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .map_io = otom11_map_io, - .init_machine = otom11_init, - .init_irq = s3c2410_init_irq, - .init_time = otom11_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-qt2410.c b/arch/arm/mach-s3c/mach-qt2410.c deleted file mode 100644 index 36fe0684a438..000000000000 --- a/arch/arm/mach-s3c/mach-qt2410.c +++ /dev/null @@ -1,375 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (C) 2006 by OpenMoko, Inc. -// Author: Harald Welte <laforge@openmoko.org> -// All rights reserved. - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/spi/spi.h> -#include <linux/spi/spi_gpio.h> -#include <linux/io.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/leds-s3c24xx.h> -#include <linux/platform_data/fb-s3c2410.h> -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/usb-s3c2410_udc.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include "gpio-samsung.h" - -#include "gpio-cfg.h" -#include "devs.h" -#include "cpu.h" -#include "pm.h" - -#include "s3c24xx.h" -#include "common-smdk-s3c24xx.h" - -static struct map_desc qt2410_iodesc[] __initdata = { - { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg smdk2410_uartcfgs[] = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -/* LCD driver info */ - -static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = { - { - /* Configuration for 640x480 SHARP LQ080V3DG01 */ - .lcdcon5 = S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_PWREN | - S3C2410_LCDCON5_HWSWP, - - .type = S3C2410_LCDCON1_TFT, - .width = 640, - .height = 480, - - .pixclock = 40000, /* HCLK/4 */ - .xres = 640, - .yres = 480, - .bpp = 16, - .left_margin = 44, - .right_margin = 116, - .hsync_len = 96, - .upper_margin = 19, - .lower_margin = 11, - .vsync_len = 15, - }, - { - /* Configuration for 480x640 toppoly TD028TTEC1 */ - .lcdcon5 = S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_PWREN | - S3C2410_LCDCON5_HWSWP, - - .type = S3C2410_LCDCON1_TFT, - .width = 480, - .height = 640, - .pixclock = 40000, /* HCLK/4 */ - .xres = 480, - .yres = 640, - .bpp = 16, - .left_margin = 8, - .right_margin = 24, - .hsync_len = 8, - .upper_margin = 2, - .lower_margin = 4, - .vsync_len = 2, - }, - { - /* Config for 240x320 LCD */ - .lcdcon5 = S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_PWREN | - S3C2410_LCDCON5_HWSWP, - - .type = S3C2410_LCDCON1_TFT, - .width = 240, - .height = 320, - .pixclock = 100000, /* HCLK/10 */ - .xres = 240, - .yres = 320, - .bpp = 16, - .left_margin = 13, - .right_margin = 8, - .hsync_len = 4, - .upper_margin = 2, - .lower_margin = 7, - .vsync_len = 4, - }, -}; - - -static struct s3c2410fb_mach_info qt2410_fb_info __initdata = { - .displays = qt2410_lcd_cfg, - .num_displays = ARRAY_SIZE(qt2410_lcd_cfg), - .default_display = 0, - - .lpcsel = ((0xCE6) & ~7) | 1<<4, -}; - -/* CS8900 */ - -static struct resource qt2410_cs89x0_resources[] = { - [0] = DEFINE_RES_MEM(0x19000000, 17), - [1] = DEFINE_RES_IRQ(IRQ_EINT9), -}; - -static struct platform_device qt2410_cs89x0 = { - .name = "cirrus-cs89x0", - .num_resources = ARRAY_SIZE(qt2410_cs89x0_resources), - .resource = qt2410_cs89x0_resources, -}; - -/* LED */ - -static struct gpiod_lookup_table qt2410_led_gpio_table = { - .dev_id = "s3c24xx_led.0", - .table = { - GPIO_LOOKUP("GPB", 0, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN), - { }, - }, -}; - -static struct s3c24xx_led_platdata qt2410_pdata_led = { - .name = "led", - .def_trigger = "timer", -}; - -static struct platform_device qt2410_led = { - .name = "s3c24xx_led", - .id = 0, - .dev = { - .platform_data = &qt2410_pdata_led, - }, -}; - -/* SPI */ - -static struct spi_gpio_platform_data spi_gpio_cfg = { - .num_chipselect = 1, -}; - -static struct platform_device qt2410_spi = { - .name = "spi_gpio", - .id = 1, - .dev.platform_data = &spi_gpio_cfg, -}; - -static struct gpiod_lookup_table qt2410_spi_gpiod_table = { - .dev_id = "spi_gpio", - .table = { - GPIO_LOOKUP("GPIOG", 7, - "sck", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOG", 6, - "mosi", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOG", 5, - "miso", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOB", 5, - "cs", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table qt2410_mmc_gpiod_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -/* Board devices */ - -static struct platform_device *qt2410_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_sdi, - &s3c_device_usbgadget, - &qt2410_spi, - &qt2410_cs89x0, - &qt2410_led, -}; - -static struct mtd_partition __initdata qt2410_nand_part[] = { - [0] = { - .name = "U-Boot", - .size = 0x30000, - .offset = 0, - }, - [1] = { - .name = "U-Boot environment", - .offset = 0x30000, - .size = 0x4000, - }, - [2] = { - .name = "kernel", - .offset = 0x34000, - .size = SZ_2M, - }, - [3] = { - .name = "initrd", - .offset = 0x234000, - .size = SZ_4M, - }, - [4] = { - .name = "jffs2", - .offset = 0x634000, - .size = 0x39cc000, - }, -}; - -static struct s3c2410_nand_set __initdata qt2410_nand_sets[] = { - [0] = { - .name = "NAND", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(qt2410_nand_part), - .partitions = qt2410_nand_part, - }, -}; - -/* choose a set of timings which should suit most 512Mbit - * chips and beyond. - */ - -static struct s3c2410_platform_nand __initdata qt2410_nand_info = { - .tacls = 20, - .twrph0 = 60, - .twrph1 = 20, - .nr_sets = ARRAY_SIZE(qt2410_nand_sets), - .sets = qt2410_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -/* UDC */ - -static struct s3c2410_udc_mach_info qt2410_udc_cfg = { -}; - -static char tft_type = 's'; - -static int __init qt2410_tft_setup(char *str) -{ - tft_type = str[0]; - return 1; -} - -__setup("tft=", qt2410_tft_setup); - -static void __init qt2410_map_io(void) -{ - s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc)); - s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init qt2410_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init qt2410_machine_init(void) -{ - s3c_nand_set_platdata(&qt2410_nand_info); - - switch (tft_type) { - case 'p': /* production */ - qt2410_fb_info.default_display = 1; - break; - case 'b': /* big */ - qt2410_fb_info.default_display = 0; - break; - case 's': /* small */ - default: - qt2410_fb_info.default_display = 2; - break; - } - s3c24xx_fb_set_platdata(&qt2410_fb_info); - - /* set initial state of the LED GPIO */ - WARN_ON(gpio_request_one(S3C2410_GPB(0), GPIOF_OUT_INIT_HIGH, NULL)); - gpio_free(S3C2410_GPB(0)); - - s3c24xx_udc_set_platdata(&qt2410_udc_cfg); - s3c_i2c0_set_platdata(NULL); - - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - gpiod_add_lookup_table(&qt2410_spi_gpiod_table); - s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); - gpiod_add_lookup_table(&qt2410_led_gpio_table); - gpiod_add_lookup_table(&qt2410_mmc_gpiod_table); - platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices)); - s3c_pm_init(); -} - -MACHINE_START(QT2410, "QT2410") - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .map_io = qt2410_map_io, - .init_irq = s3c2410_init_irq, - .init_machine = qt2410_machine_init, - .init_time = qt2410_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-real6410.c b/arch/arm/mach-s3c/mach-real6410.c deleted file mode 100644 index 8c10ebc38a9c..000000000000 --- a/arch/arm/mach-s3c/mach-real6410.c +++ /dev/null @@ -1,333 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2010 Darius Augulis <augulis.darius@gmail.com> -// Copyright 2008 Openmoko, Inc. -// Copyright 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/dm9000.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/types.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "map.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include "irqs.h" - -#include <linux/soc/samsung/s3c-adc.h> -#include "cpu.h" -#include "devs.h" -#include "fb.h" -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/touchscreen-s3c2410.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include "s3c64xx.h" -#include "regs-modem-s3c64xx.h" -#include "regs-srom-s3c64xx.h" - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) -#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) - -static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, -}; - -/* DM9000AEP 10/100 ethernet controller */ - -static struct resource real6410_dm9k_resource[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2), - [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2), - [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \ - | IORESOURCE_IRQ_HIGHLEVEL), -}; - -static struct dm9000_plat_data real6410_dm9k_pdata = { - .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), -}; - -static struct platform_device real6410_device_eth = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(real6410_dm9k_resource), - .resource = real6410_dm9k_resource, - .dev = { - .platform_data = &real6410_dm9k_pdata, - }, -}; - -static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 480, - .yres = 272, -}; - -static struct fb_videomode real6410_lcd_type0_timing = { - /* 4.3" 480x272 */ - .left_margin = 3, - .right_margin = 2, - .upper_margin = 1, - .lower_margin = 1, - .hsync_len = 40, - .vsync_len = 1, -}; - -static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode real6410_lcd_type1_timing = { - /* 7.0" 800x480 */ - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = { - { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &real6410_lcd_type0_timing, - .win[0] = &real6410_lcd_type0_fb_win, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - }, { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &real6410_lcd_type1_timing, - .win[0] = &real6410_lcd_type1_fb_win, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - }, - { }, -}; - -static struct mtd_partition real6410_nand_part[] = { - [0] = { - .name = "uboot", - .size = SZ_1M, - .offset = 0, - }, - [1] = { - .name = "kernel", - .size = SZ_2M, - .offset = SZ_1M, - }, - [2] = { - .name = "rootfs", - .size = MTDPART_SIZ_FULL, - .offset = SZ_1M + SZ_2M, - }, -}; - -static struct s3c2410_nand_set real6410_nand_sets[] = { - [0] = { - .name = "nand", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(real6410_nand_part), - .partitions = real6410_nand_part, - }, -}; - -static struct s3c2410_platform_nand real6410_nand_info = { - .tacls = 25, - .twrph0 = 55, - .twrph1 = 40, - .nr_sets = ARRAY_SIZE(real6410_nand_sets), - .sets = real6410_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -static struct platform_device *real6410_devices[] __initdata = { - &real6410_device_eth, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_fb, - &s3c_device_nand, - &s3c_device_adc, - &s3c_device_ohci, -}; - -static void __init real6410_map_io(void) -{ - u32 tmp; - - s3c64xx_init_io(NULL, 0); - s3c24xx_init_clocks(12000000); - s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs)); - s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); - - /* set the LCD type */ - tmp = __raw_readl(S3C64XX_SPCON); - tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; - tmp |= S3C64XX_SPCON_LCD_SEL_RGB; - __raw_writel(tmp, S3C64XX_SPCON); - - /* remove the LCD bypass */ - tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); - tmp &= ~MIFPCON_LCD_BYPASS; - __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); -} - -/* - * real6410_features string - * - * 0-9 LCD configuration - * - */ -static char real6410_features_str[12] __initdata = "0"; - -static int __init real6410_features_setup(char *str) -{ - if (str) - strlcpy(real6410_features_str, str, - sizeof(real6410_features_str)); - return 1; -} - -__setup("real6410=", real6410_features_setup); - -#define FEATURE_SCREEN (1 << 0) - -struct real6410_features_t { - int done; - int lcd_index; -}; - -static void real6410_parse_features( - struct real6410_features_t *features, - const char *features_str) -{ - const char *fp = features_str; - - features->done = 0; - features->lcd_index = 0; - - while (*fp) { - char f = *fp++; - - switch (f) { - case '0'...'9': /* tft screen */ - if (features->done & FEATURE_SCREEN) { - printk(KERN_INFO "REAL6410: '%c' ignored, " - "screen type already set\n", f); - } else { - int li = f - '0'; - if (li >= ARRAY_SIZE(real6410_lcd_pdata)) - printk(KERN_INFO "REAL6410: '%c' out " - "of range LCD mode\n", f); - else { - features->lcd_index = li; - } - } - features->done |= FEATURE_SCREEN; - break; - } - } -} - -static void __init real6410_machine_init(void) -{ - u32 cs1; - struct real6410_features_t features = { 0 }; - - printk(KERN_INFO "REAL6410: Option string real6410=%s\n", - real6410_features_str); - - /* Parse the feature string */ - real6410_parse_features(&features, real6410_features_str); - - printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n", - real6410_lcd_pdata[features.lcd_index].win[0]->xres, - real6410_lcd_pdata[features.lcd_index].win[0]->yres); - - s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]); - s3c_nand_set_platdata(&real6410_nand_info); - s3c64xx_ts_set_platdata(NULL); - - /* configure nCS1 width to 16 bits */ - - cs1 = __raw_readl(S3C64XX_SROM_BW) & - ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); - cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | - (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | - (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << - S3C64XX_SROM_BW__NCS1__SHIFT; - __raw_writel(cs1, S3C64XX_SROM_BW); - - /* set timing for nCS1 suitable for ethernet chip */ - - __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | - (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | - (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | - (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | - (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | - (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | - (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); - - gpio_request(S3C64XX_GPF(15), "LCD power"); - - platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices)); -} - -MACHINE_START(REAL6410, "REAL6410") - /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6410_init_irq, - .map_io = real6410_map_io, - .init_machine = real6410_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-rx1950.c b/arch/arm/mach-s3c/mach-rx1950.c deleted file mode 100644 index d8c49e562660..000000000000 --- a/arch/arm/mach-s3c/mach-rx1950.c +++ /dev/null @@ -1,884 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev, -// Copyright (c) 2007-2010 Vasily Khoruzhick -// -// based on smdk2440 written by Ben Dooks - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/memblock.h> -#include <linux/delay.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> -#include <linux/device.h> -#include <linux/pda_power.h> -#include <linux/pwm_backlight.h> -#include <linux/pwm.h> -#include <linux/s3c_adc_battery.h> -#include <linux/leds.h> -#include <linux/i2c.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <linux/mmc/host.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/mmc-s3cmci.h> -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/touchscreen-s3c2410.h> -#include <linux/platform_data/usb-s3c2410_udc.h> -#include <linux/platform_data/fb-s3c2410.h> - -#include <sound/uda1380.h> - -#include "hardware-s3c24xx.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "cpu.h" -#include "devs.h" -#include "pm.h" -#include "gpio-cfg.h" - -#include "s3c24xx.h" -#include "h1940.h" - -#define LCD_PWM_PERIOD 192960 -#define LCD_PWM_DUTY 127353 - -static struct map_desc rx1950_iodesc[] __initdata = { -}; - -static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - .clk_sel = S3C2410_UCON_CLKSEL3, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - .clk_sel = S3C2410_UCON_CLKSEL3, - }, - /* IR port */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x43, - .ufcon = 0xf1, - .clk_sel = S3C2410_UCON_CLKSEL3, - }, -}; - -static struct s3c2410fb_display rx1950_display = { - .type = S3C2410_LCDCON1_TFT, - .width = 240, - .height = 320, - .xres = 240, - .yres = 320, - .bpp = 16, - - .pixclock = 260000, - .left_margin = 10, - .right_margin = 20, - .hsync_len = 10, - .upper_margin = 2, - .lower_margin = 2, - .vsync_len = 2, - - .lcdcon5 = S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVCLK | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_HWSWP | - (0x02 << 13) | - (0x02 << 15), - -}; - -static int power_supply_init(struct device *dev) -{ - return gpio_request(S3C2410_GPF(2), "cable plugged"); -} - -static int rx1950_is_ac_online(void) -{ - return !gpio_get_value(S3C2410_GPF(2)); -} - -static void power_supply_exit(struct device *dev) -{ - gpio_free(S3C2410_GPF(2)); -} - -static char *rx1950_supplicants[] = { - "main-battery" -}; - -static struct pda_power_pdata power_supply_info = { - .init = power_supply_init, - .is_ac_online = rx1950_is_ac_online, - .exit = power_supply_exit, - .supplied_to = rx1950_supplicants, - .num_supplicants = ARRAY_SIZE(rx1950_supplicants), -}; - -static struct resource power_supply_resources[] = { - [0] = DEFINE_RES_NAMED(IRQ_EINT2, 1, "ac", IORESOURCE_IRQ \ - | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE), -}; - -static struct platform_device power_supply = { - .name = "pda-power", - .id = -1, - .dev = { - .platform_data = - &power_supply_info, - }, - .resource = power_supply_resources, - .num_resources = ARRAY_SIZE(power_supply_resources), -}; - -static const struct s3c_adc_bat_thresh bat_lut_noac[] = { - { .volt = 4100, .cur = 156, .level = 100}, - { .volt = 4050, .cur = 156, .level = 95}, - { .volt = 4025, .cur = 141, .level = 90}, - { .volt = 3995, .cur = 144, .level = 85}, - { .volt = 3957, .cur = 162, .level = 80}, - { .volt = 3931, .cur = 147, .level = 75}, - { .volt = 3902, .cur = 147, .level = 70}, - { .volt = 3863, .cur = 153, .level = 65}, - { .volt = 3838, .cur = 150, .level = 60}, - { .volt = 3800, .cur = 153, .level = 55}, - { .volt = 3765, .cur = 153, .level = 50}, - { .volt = 3748, .cur = 172, .level = 45}, - { .volt = 3740, .cur = 153, .level = 40}, - { .volt = 3714, .cur = 175, .level = 35}, - { .volt = 3710, .cur = 156, .level = 30}, - { .volt = 3963, .cur = 156, .level = 25}, - { .volt = 3672, .cur = 178, .level = 20}, - { .volt = 3651, .cur = 178, .level = 15}, - { .volt = 3629, .cur = 178, .level = 10}, - { .volt = 3612, .cur = 162, .level = 5}, - { .volt = 3605, .cur = 162, .level = 0}, -}; - -static const struct s3c_adc_bat_thresh bat_lut_acin[] = { - { .volt = 4200, .cur = 0, .level = 100}, - { .volt = 4190, .cur = 0, .level = 99}, - { .volt = 4178, .cur = 0, .level = 95}, - { .volt = 4110, .cur = 0, .level = 70}, - { .volt = 4076, .cur = 0, .level = 65}, - { .volt = 4046, .cur = 0, .level = 60}, - { .volt = 4021, .cur = 0, .level = 55}, - { .volt = 3999, .cur = 0, .level = 50}, - { .volt = 3982, .cur = 0, .level = 45}, - { .volt = 3965, .cur = 0, .level = 40}, - { .volt = 3957, .cur = 0, .level = 35}, - { .volt = 3948, .cur = 0, .level = 30}, - { .volt = 3936, .cur = 0, .level = 25}, - { .volt = 3927, .cur = 0, .level = 20}, - { .volt = 3906, .cur = 0, .level = 15}, - { .volt = 3880, .cur = 0, .level = 10}, - { .volt = 3829, .cur = 0, .level = 5}, - { .volt = 3820, .cur = 0, .level = 0}, -}; - -static struct gpiod_lookup_table rx1950_bat_gpio_table = { - .dev_id = "s3c-adc-battery", - .table = { - /* Charge status S3C2410_GPF(3) */ - GPIO_LOOKUP("GPIOF", 3, "charge-status", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static int rx1950_bat_init(void) -{ - int ret; - - ret = gpio_request(S3C2410_GPJ(2), "rx1950-charger-enable-1"); - if (ret) - goto err_gpio1; - ret = gpio_request(S3C2410_GPJ(3), "rx1950-charger-enable-2"); - if (ret) - goto err_gpio2; - - return 0; - -err_gpio2: - gpio_free(S3C2410_GPJ(2)); -err_gpio1: - return ret; -} - -static void rx1950_bat_exit(void) -{ - gpio_free(S3C2410_GPJ(2)); - gpio_free(S3C2410_GPJ(3)); -} - -static void rx1950_enable_charger(void) -{ - gpio_direction_output(S3C2410_GPJ(2), 1); - gpio_direction_output(S3C2410_GPJ(3), 1); -} - -static void rx1950_disable_charger(void) -{ - gpio_direction_output(S3C2410_GPJ(2), 0); - gpio_direction_output(S3C2410_GPJ(3), 0); -} - -static DEFINE_SPINLOCK(rx1950_blink_spin); - -static int rx1950_led_blink_set(struct gpio_desc *desc, int state, - unsigned long *delay_on, unsigned long *delay_off) -{ - int gpio = desc_to_gpio(desc); - int blink_gpio, check_gpio; - - switch (gpio) { - case S3C2410_GPA(6): - blink_gpio = S3C2410_GPA(4); - check_gpio = S3C2410_GPA(3); - break; - case S3C2410_GPA(7): - blink_gpio = S3C2410_GPA(3); - check_gpio = S3C2410_GPA(4); - break; - default: - return -EINVAL; - } - - if (delay_on && delay_off && !*delay_on && !*delay_off) - *delay_on = *delay_off = 500; - - spin_lock(&rx1950_blink_spin); - - switch (state) { - case GPIO_LED_NO_BLINK_LOW: - case GPIO_LED_NO_BLINK_HIGH: - if (!gpio_get_value(check_gpio)) - gpio_set_value(S3C2410_GPJ(6), 0); - gpio_set_value(blink_gpio, 0); - gpio_set_value(gpio, state); - break; - case GPIO_LED_BLINK: - gpio_set_value(gpio, 0); - gpio_set_value(S3C2410_GPJ(6), 1); - gpio_set_value(blink_gpio, 1); - break; - } - - spin_unlock(&rx1950_blink_spin); - - return 0; -} - -static struct gpio_led rx1950_leds_desc[] = { - { - .name = "Green", - .default_trigger = "main-battery-full", - .gpio = S3C2410_GPA(6), - .retain_state_suspended = 1, - }, - { - .name = "Red", - .default_trigger - = "main-battery-charging-blink-full-solid", - .gpio = S3C2410_GPA(7), - .retain_state_suspended = 1, - }, - { - .name = "Blue", - .default_trigger = "rx1950-acx-mem", - .gpio = S3C2410_GPA(11), - .retain_state_suspended = 1, - }, -}; - -static struct gpio_led_platform_data rx1950_leds_pdata = { - .num_leds = ARRAY_SIZE(rx1950_leds_desc), - .leds = rx1950_leds_desc, - .gpio_blink_set = rx1950_led_blink_set, -}; - -static struct platform_device rx1950_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &rx1950_leds_pdata, - }, -}; - -static struct s3c_adc_bat_pdata rx1950_bat_cfg = { - .init = rx1950_bat_init, - .exit = rx1950_bat_exit, - .enable_charger = rx1950_enable_charger, - .disable_charger = rx1950_disable_charger, - .lut_noac = bat_lut_noac, - .lut_noac_cnt = ARRAY_SIZE(bat_lut_noac), - .lut_acin = bat_lut_acin, - .lut_acin_cnt = ARRAY_SIZE(bat_lut_acin), - .volt_channel = 0, - .current_channel = 1, - .volt_mult = 4235, - .current_mult = 2900, - .internal_impedance = 200, -}; - -static struct platform_device rx1950_battery = { - .name = "s3c-adc-battery", - .id = -1, - .dev = { - .parent = &s3c_device_adc.dev, - .platform_data = &rx1950_bat_cfg, - }, -}; - -static struct s3c2410fb_mach_info rx1950_lcd_cfg = { - .displays = &rx1950_display, - .num_displays = 1, - .default_display = 0, - - .lpcsel = 0x02, - .gpccon = 0xaa9556a9, - .gpccon_mask = 0xffc003fc, - .gpccon_reg = S3C2410_GPCCON, - .gpcup = 0x0000ffff, - .gpcup_mask = 0xffffffff, - .gpcup_reg = S3C2410_GPCUP, - - .gpdcon = 0xaa90aaa1, - .gpdcon_mask = 0xffc0fff0, - .gpdcon_reg = S3C2410_GPDCON, - .gpdup = 0x0000fcfd, - .gpdup_mask = 0xffffffff, - .gpdup_reg = S3C2410_GPDUP, -}; - -static struct pwm_lookup rx1950_pwm_lookup[] = { - PWM_LOOKUP("samsung-pwm", 0, "pwm-backlight.0", NULL, 48000, - PWM_POLARITY_NORMAL), - PWM_LOOKUP("samsung-pwm", 1, "pwm-backlight.0", "RX1950 LCD", LCD_PWM_PERIOD, - PWM_POLARITY_NORMAL), -}; - -static struct pwm_device *lcd_pwm; -static struct pwm_state lcd_pwm_state; - -static void rx1950_lcd_power(int enable) -{ - int i; - static int enabled; - if (enabled == enable) - return; - if (!enable) { - - /* GPC11-GPC15->OUTPUT */ - for (i = 11; i < 16; i++) - gpio_direction_output(S3C2410_GPC(i), 1); - - /* Wait a bit here... */ - mdelay(100); - - /* GPD2-GPD7->OUTPUT */ - /* GPD11-GPD15->OUTPUT */ - /* GPD2-GPD7->1, GPD11-GPD15->1 */ - for (i = 2; i < 8; i++) - gpio_direction_output(S3C2410_GPD(i), 1); - for (i = 11; i < 16; i++) - gpio_direction_output(S3C2410_GPD(i), 1); - - /* Wait a bit here...*/ - mdelay(100); - - /* GPB0->OUTPUT, GPB0->0 */ - gpio_direction_output(S3C2410_GPB(0), 0); - - /* GPC1-GPC4->OUTPUT, GPC1-4->0 */ - for (i = 1; i < 5; i++) - gpio_direction_output(S3C2410_GPC(i), 0); - - /* GPC15-GPC11->0 */ - for (i = 11; i < 16; i++) - gpio_direction_output(S3C2410_GPC(i), 0); - - /* GPD15-GPD11->0, GPD2->GPD7->0 */ - for (i = 11; i < 16; i++) - gpio_direction_output(S3C2410_GPD(i), 0); - - for (i = 2; i < 8; i++) - gpio_direction_output(S3C2410_GPD(i), 0); - - /* GPC6->0, GPC7->0, GPC5->0 */ - gpio_direction_output(S3C2410_GPC(6), 0); - gpio_direction_output(S3C2410_GPC(7), 0); - gpio_direction_output(S3C2410_GPC(5), 0); - - /* GPB1->OUTPUT, GPB1->0 */ - gpio_direction_output(S3C2410_GPB(1), 0); - - lcd_pwm_state.enabled = false; - pwm_apply_state(lcd_pwm, &lcd_pwm_state); - - /* GPC0->0, GPC10->0 */ - gpio_direction_output(S3C2410_GPC(0), 0); - gpio_direction_output(S3C2410_GPC(10), 0); - } else { - lcd_pwm_state.enabled = true; - pwm_apply_state(lcd_pwm, &lcd_pwm_state); - - gpio_direction_output(S3C2410_GPC(0), 1); - gpio_direction_output(S3C2410_GPC(5), 1); - - s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPB1_TOUT1); - gpio_direction_output(S3C2410_GPC(7), 1); - - for (i = 1; i < 5; i++) - s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2)); - - for (i = 11; i < 16; i++) - s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2)); - - for (i = 2; i < 8; i++) - s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2)); - - for (i = 11; i < 16; i++) - s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2)); - - gpio_direction_output(S3C2410_GPC(10), 1); - gpio_direction_output(S3C2410_GPC(6), 1); - } - enabled = enable; -} - -static void rx1950_bl_power(int enable) -{ - static int enabled; - if (enabled == enable) - return; - if (!enable) { - gpio_direction_output(S3C2410_GPB(0), 0); - } else { - /* LED driver need a "push" to power on */ - gpio_direction_output(S3C2410_GPB(0), 1); - /* Warm up backlight for one period of PWM. - * Without this trick its almost impossible to - * enable backlight with low brightness value - */ - ndelay(48000); - s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); - } - enabled = enable; -} - -static int rx1950_backlight_init(struct device *dev) -{ - WARN_ON(gpio_request(S3C2410_GPB(0), "Backlight")); - lcd_pwm = pwm_get(dev, "RX1950 LCD"); - if (IS_ERR(lcd_pwm)) { - dev_err(dev, "Unable to request PWM for LCD power!\n"); - return PTR_ERR(lcd_pwm); - } - - /* - * Call pwm_init_state to initialize .polarity and .period. The other - * values are fixed in this driver. - */ - pwm_init_state(lcd_pwm, &lcd_pwm_state); - - lcd_pwm_state.duty_cycle = LCD_PWM_DUTY; - - rx1950_lcd_power(1); - rx1950_bl_power(1); - - return 0; -} - -static void rx1950_backlight_exit(struct device *dev) -{ - rx1950_bl_power(0); - rx1950_lcd_power(0); - - pwm_put(lcd_pwm); - gpio_free(S3C2410_GPB(0)); -} - - -static int rx1950_backlight_notify(struct device *dev, int brightness) -{ - if (!brightness) { - rx1950_bl_power(0); - rx1950_lcd_power(0); - } else { - rx1950_lcd_power(1); - rx1950_bl_power(1); - } - return brightness; -} - -static struct platform_pwm_backlight_data rx1950_backlight_data = { - .max_brightness = 24, - .dft_brightness = 4, - .init = rx1950_backlight_init, - .notify = rx1950_backlight_notify, - .exit = rx1950_backlight_exit, -}; - -static struct platform_device rx1950_backlight = { - .name = "pwm-backlight", - .dev = { - .parent = &samsung_device_pwm.dev, - .platform_data = &rx1950_backlight_data, - }, -}; - -static void rx1950_set_mmc_power(unsigned char power_mode, unsigned short vdd) -{ - s3c24xx_mci_def_set_power(power_mode, vdd); - - switch (power_mode) { - case MMC_POWER_OFF: - gpio_direction_output(S3C2410_GPJ(1), 0); - break; - case MMC_POWER_UP: - case MMC_POWER_ON: - gpio_direction_output(S3C2410_GPJ(1), 1); - break; - default: - break; - } -} - -static struct s3c24xx_mci_pdata rx1950_mmc_cfg __initdata = { - .set_power = rx1950_set_mmc_power, - .ocr_avail = MMC_VDD_32_33, -}; - -static struct gpiod_lookup_table rx1950_mmc_gpio_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* Card detect S3C2410_GPF(5) */ - GPIO_LOOKUP("GPIOF", 5, "cd", GPIO_ACTIVE_LOW), - /* Write protect S3C2410_GPH(8) */ - GPIO_LOOKUP("GPIOH", 8, "wp", GPIO_ACTIVE_LOW), - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct mtd_partition rx1950_nand_part[] = { - [0] = { - .name = "Boot0", - .offset = 0, - .size = 0x4000, - .mask_flags = MTD_WRITEABLE, - }, - [1] = { - .name = "Boot1", - .offset = MTDPART_OFS_APPEND, - .size = 0x40000, - .mask_flags = MTD_WRITEABLE, - }, - [2] = { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, - .size = 0x300000, - .mask_flags = 0, - }, - [3] = { - .name = "Filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static struct s3c2410_nand_set rx1950_nand_sets[] = { - [0] = { - .name = "Internal", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(rx1950_nand_part), - .partitions = rx1950_nand_part, - }, -}; - -static struct s3c2410_platform_nand rx1950_nand_info = { - .tacls = 25, - .twrph0 = 50, - .twrph1 = 15, - .nr_sets = ARRAY_SIZE(rx1950_nand_sets), - .sets = rx1950_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = { -}; - -static struct gpiod_lookup_table rx1950_udc_gpio_table = { - .dev_id = "s3c2410-usbgadget", - .table = { - GPIO_LOOKUP("GPIOG", 5, "vbus", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("GPIOJ", 5, "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct s3c2410_ts_mach_info rx1950_ts_cfg __initdata = { - .delay = 10000, - .presc = 49, - .oversampling_shift = 3, -}; - -static struct gpio_keys_button rx1950_gpio_keys_table[] = { - { - .code = KEY_POWER, - .gpio = S3C2410_GPF(0), - .active_low = 1, - .desc = "Power button", - .wakeup = 1, - }, - { - .code = KEY_F5, - .gpio = S3C2410_GPF(7), - .active_low = 1, - .desc = "Record button", - }, - { - .code = KEY_F1, - .gpio = S3C2410_GPG(0), - .active_low = 1, - .desc = "Calendar button", - }, - { - .code = KEY_F2, - .gpio = S3C2410_GPG(2), - .active_low = 1, - .desc = "Contacts button", - }, - { - .code = KEY_F3, - .gpio = S3C2410_GPG(3), - .active_low = 1, - .desc = "Mail button", - }, - { - .code = KEY_F4, - .gpio = S3C2410_GPG(7), - .active_low = 1, - .desc = "WLAN button", - }, - { - .code = KEY_LEFT, - .gpio = S3C2410_GPG(10), - .active_low = 1, - .desc = "Left button", - }, - { - .code = KEY_RIGHT, - .gpio = S3C2410_GPG(11), - .active_low = 1, - .desc = "Right button", - }, - { - .code = KEY_UP, - .gpio = S3C2410_GPG(4), - .active_low = 1, - .desc = "Up button", - }, - { - .code = KEY_DOWN, - .gpio = S3C2410_GPG(6), - .active_low = 1, - .desc = "Down button", - }, - { - .code = KEY_ENTER, - .gpio = S3C2410_GPG(9), - .active_low = 1, - .desc = "Ok button" - }, -}; - -static struct gpio_keys_platform_data rx1950_gpio_keys_data = { - .buttons = rx1950_gpio_keys_table, - .nbuttons = ARRAY_SIZE(rx1950_gpio_keys_table), -}; - -static struct platform_device rx1950_device_gpiokeys = { - .name = "gpio-keys", - .dev.platform_data = &rx1950_gpio_keys_data, -}; - -static struct uda1380_platform_data uda1380_info = { - .gpio_power = S3C2410_GPJ(0), - .gpio_reset = S3C2410_GPD(0), - .dac_clk = UDA1380_DAC_CLK_SYSCLK, -}; - -static struct i2c_board_info rx1950_i2c_devices[] = { - { - I2C_BOARD_INFO("uda1380", 0x1a), - .platform_data = &uda1380_info, - }, -}; - -static struct gpiod_lookup_table rx1950_audio_gpio_table = { - .dev_id = "rx1950-audio", - .table = { - GPIO_LOOKUP("GPIOG", 12, "hp-gpio", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOA", 1, "speaker-power", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device rx1950_audio = { - .name = "rx1950-audio", - .id = -1, -}; - -static struct platform_device *rx1950_devices[] __initdata = { - &s3c2410_device_dclk, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_usbgadget, - &s3c_device_rtc, - &s3c_device_nand, - &s3c_device_sdi, - &s3c_device_adc, - &s3c_device_ts, - &samsung_device_pwm, - &rx1950_backlight, - &rx1950_device_gpiokeys, - &power_supply, - &rx1950_battery, - &rx1950_leds, - &rx1950_audio, -}; - -static void __init rx1950_map_io(void) -{ - s3c24xx_init_io(rx1950_iodesc, ARRAY_SIZE(rx1950_iodesc)); - s3c24xx_init_uarts(rx1950_uartcfgs, ARRAY_SIZE(rx1950_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); - - /* setup PM */ - -#ifdef CONFIG_PM_H1940 - memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 8); -#endif - - s3c_pm_init(); -} - -static void __init rx1950_init_time(void) -{ - s3c2442_init_clocks(16934000); - s3c24xx_timer_init(); -} - -static void __init rx1950_init_machine(void) -{ - int i; - - s3c24xx_fb_set_platdata(&rx1950_lcd_cfg); - s3c24xx_udc_set_platdata(&rx1950_udc_cfg); - s3c24xx_ts_set_platdata(&rx1950_ts_cfg); - gpiod_add_lookup_table(&rx1950_mmc_gpio_table); - s3c24xx_mci_set_platdata(&rx1950_mmc_cfg); - s3c_i2c0_set_platdata(NULL); - s3c_nand_set_platdata(&rx1950_nand_info); - - /* Turn off suspend on both USB ports, and switch the - * selectable USB port to USB device mode. */ - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | - S3C2410_MISCCR_USBSUSPND0 | - S3C2410_MISCCR_USBSUSPND1, 0x0); - - /* mmc power is disabled by default */ - WARN_ON(gpio_request(S3C2410_GPJ(1), "MMC power")); - gpio_direction_output(S3C2410_GPJ(1), 0); - - for (i = 0; i < 8; i++) - WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power")); - - for (i = 10; i < 16; i++) - WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power")); - - for (i = 2; i < 8; i++) - WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power")); - - for (i = 11; i < 16; i++) - WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power")); - - WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power")); - - WARN_ON(gpio_request(S3C2410_GPA(3), "Red blink")); - WARN_ON(gpio_request(S3C2410_GPA(4), "Green blink")); - WARN_ON(gpio_request(S3C2410_GPJ(6), "LED blink")); - gpio_direction_output(S3C2410_GPA(3), 0); - gpio_direction_output(S3C2410_GPA(4), 0); - gpio_direction_output(S3C2410_GPJ(6), 0); - - pwm_add_table(rx1950_pwm_lookup, ARRAY_SIZE(rx1950_pwm_lookup)); - gpiod_add_lookup_table(&rx1950_udc_gpio_table); - gpiod_add_lookup_table(&rx1950_audio_gpio_table); - gpiod_add_lookup_table(&rx1950_bat_gpio_table); - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices)); - - i2c_register_board_info(0, rx1950_i2c_devices, - ARRAY_SIZE(rx1950_i2c_devices)); -} - -/* H1940 and RX3715 need to reserve this for suspend */ -static void __init rx1950_reserve(void) -{ - memblock_reserve(0x30003000, 0x1000); - memblock_reserve(0x30081000, 0x1000); -} - -MACHINE_START(RX1950, "HP iPAQ RX1950") - /* Maintainers: Vasily Khoruzhick */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2442, - .map_io = rx1950_map_io, - .reserve = rx1950_reserve, - .init_irq = s3c2442_init_irq, - .init_machine = rx1950_init_machine, - .init_time = rx1950_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-rx3715.c b/arch/arm/mach-s3c/mach-rx3715.c deleted file mode 100644 index 52b3c38acbb2..000000000000 --- a/arch/arm/mach-s3c/mach-rx3715.c +++ /dev/null @@ -1,213 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2003-2004 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// https://www.handhelds.org/projects/rx3715.html - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/memblock.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/tty.h> -#include <linux/console.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/serial.h> -#include <linux/io.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> -#include <asm/mach/map.h> - -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <linux/platform_data/fb-s3c2410.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include "cpu.h" -#include "devs.h" -#include "pm.h" - -#include "s3c24xx.h" -#include "h1940.h" - -static struct map_desc rx3715_iodesc[] __initdata = { - /* dump ISA space somewhere unused */ - { - .virtual = (u32)S3C24XX_VA_ISA_BYTE, - .pfn = __phys_to_pfn(S3C2410_CS3), - .length = SZ_1M, - .type = MT_DEVICE, - }, -}; - -static struct s3c2410_uartcfg rx3715_uartcfgs[] = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - .clk_sel = S3C2410_UCON_CLKSEL3, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x00, - .clk_sel = S3C2410_UCON_CLKSEL3, - }, - /* IR port */ - [2] = { - .hwport = 2, - .uart_flags = UPF_CONS_FLOW, - .ucon = 0x3c5, - .ulcon = 0x43, - .ufcon = 0x51, - .clk_sel = S3C2410_UCON_CLKSEL3, - } -}; - -/* framebuffer lcd controller information */ - -static struct s3c2410fb_display rx3715_lcdcfg __initdata = { - .lcdcon5 = S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_HWSWP, - - .type = S3C2410_LCDCON1_TFT, - .width = 240, - .height = 320, - - .pixclock = 260000, - .xres = 240, - .yres = 320, - .bpp = 16, - .left_margin = 36, - .right_margin = 36, - .hsync_len = 8, - .upper_margin = 6, - .lower_margin = 7, - .vsync_len = 3, -}; - -static struct s3c2410fb_mach_info rx3715_fb_info __initdata = { - - .displays = &rx3715_lcdcfg, - .num_displays = 1, - .default_display = 0, - - .lpcsel = 0xf82, - - .gpccon = 0xaa955699, - .gpccon_mask = 0xffc003cc, - .gpccon_reg = S3C2410_GPCCON, - .gpcup = 0x0000ffff, - .gpcup_mask = 0xffffffff, - .gpcup_reg = S3C2410_GPCUP, - - .gpdcon = 0xaa95aaa1, - .gpdcon_mask = 0xffc0fff0, - .gpdcon_reg = S3C2410_GPDCON, - .gpdup = 0x0000faff, - .gpdup_mask = 0xffffffff, - .gpdup_reg = S3C2410_GPDUP, -}; - -static struct mtd_partition __initdata rx3715_nand_part[] = { - [0] = { - .name = "Whole Flash", - .offset = 0, - .size = MTDPART_SIZ_FULL, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = { - [0] = { - .name = "Internal", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(rx3715_nand_part), - .partitions = rx3715_nand_part, - }, -}; - -static struct s3c2410_platform_nand __initdata rx3715_nand_info = { - .tacls = 25, - .twrph0 = 50, - .twrph1 = 15, - .nr_sets = ARRAY_SIZE(rx3715_nand_sets), - .sets = rx3715_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -static struct platform_device *rx3715_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_nand, -}; - -static void __init rx3715_map_io(void) -{ - s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc)); - s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init rx3715_init_time(void) -{ - s3c2440_init_clocks(16934000); - s3c24xx_timer_init(); -} - -/* H1940 and RX3715 need to reserve this for suspend */ -static void __init rx3715_reserve(void) -{ - memblock_reserve(0x30003000, 0x1000); - memblock_reserve(0x30081000, 0x1000); -} - -static void __init rx3715_init_machine(void) -{ -#ifdef CONFIG_PM_H1940 - memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); -#endif - s3c_pm_init(); - - s3c_nand_set_platdata(&rx3715_nand_info); - s3c24xx_fb_set_platdata(&rx3715_fb_info); - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices)); -} - -MACHINE_START(RX3715, "IPAQ-RX3715") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2440, - .map_io = rx3715_map_io, - .reserve = rx3715_reserve, - .init_irq = s3c2440_init_irq, - .init_machine = rx3715_init_machine, - .init_time = rx3715_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-s3c2416-dt.c b/arch/arm/mach-s3c/mach-s3c2416-dt.c deleted file mode 100644 index 418544d3015d..000000000000 --- a/arch/arm/mach-s3c/mach-s3c2416-dt.c +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Samsung's S3C2416 flattened device tree enabled machine -// -// Copyright (c) 2012 Heiko Stuebner <heiko@sntech.de> -// -// based on mach-exynos/mach-exynos4-dt.c -// -// Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. -// http://www.samsung.com -// Copyright (c) 2010-2011 Linaro Ltd. -// www.linaro.org - -#include <linux/clocksource.h> -#include <linux/irqchip.h> -#include <linux/serial_s3c.h> - -#include <asm/mach/arch.h> -#include "map.h" - -#include "cpu.h" -#include "pm.h" - -#include "s3c24xx.h" - -static void __init s3c2416_dt_map_io(void) -{ - s3c24xx_init_io(NULL, 0); -} - -static void __init s3c2416_dt_machine_init(void) -{ - s3c_pm_init(); -} - -static const char *const s3c2416_dt_compat[] __initconst = { - "samsung,s3c2416", - "samsung,s3c2450", - NULL -}; - -DT_MACHINE_START(S3C2416_DT, "Samsung S3C2416 (Flattened Device Tree)") - /* Maintainer: Heiko Stuebner <heiko@sntech.de> */ - .dt_compat = s3c2416_dt_compat, - .map_io = s3c2416_dt_map_io, - .init_irq = irqchip_init, - .init_machine = s3c2416_dt_machine_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smartq.c b/arch/arm/mach-s3c/mach-smartq.c deleted file mode 100644 index 5b6e7c2a85ef..000000000000 --- a/arch/arm/mach-s3c/mach-smartq.c +++ /dev/null @@ -1,424 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2010 Maurus Cuelenaere - -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/spi/spi_gpio.h> -#include <linux/platform_data/s3c-hsotg.h> - -#include <asm/mach-types.h> -#include <asm/mach/map.h> - -#include "map.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "cpu.h" -#include "devs.h" -#include <linux/platform_data/i2c-s3c2410.h> -#include "gpio-cfg.h" -#include <linux/platform_data/hwmon-s3c.h> -#include <linux/platform_data/usb-ohci-s3c2410.h> -#include "sdhci.h" -#include <linux/platform_data/touchscreen-s3c2410.h> - -#include <video/platform_lcd.h> - -#include "s3c64xx.h" -#include "mach-smartq.h" -#include "regs-modem-s3c64xx.h" - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) -#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) - -static struct s3c2410_uartcfg smartq_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, -}; - -static void smartq_usb_host_powercontrol(int port, int to) -{ - pr_debug("%s(%d, %d)\n", __func__, port, to); - - if (port == 0) { - gpio_set_value(S3C64XX_GPL(0), to); - gpio_set_value(S3C64XX_GPL(1), to); - } -} - -static irqreturn_t smartq_usb_host_ocirq(int irq, void *pw) -{ - struct s3c2410_hcd_info *info = pw; - - if (gpio_get_value(S3C64XX_GPL(10)) == 0) { - pr_debug("%s: over-current irq (oc detected)\n", __func__); - s3c2410_usb_report_oc(info, 3); - } else { - pr_debug("%s: over-current irq (oc cleared)\n", __func__); - s3c2410_usb_report_oc(info, 0); - } - - return IRQ_HANDLED; -} - -static void smartq_usb_host_enableoc(struct s3c2410_hcd_info *info, int on) -{ - int ret; - - /* This isn't present on a SmartQ 5 board */ - if (machine_is_smartq5()) - return; - - if (on) { - ret = request_irq(gpio_to_irq(S3C64XX_GPL(10)), - smartq_usb_host_ocirq, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, - "USB host overcurrent", info); - if (ret != 0) - pr_err("failed to request usb oc irq: %d\n", ret); - } else { - free_irq(gpio_to_irq(S3C64XX_GPL(10)), info); - } -} - -static struct s3c2410_hcd_info smartq_usb_host_info = { - .port[0] = { - .flags = S3C_HCDFLG_USED - }, - .port[1] = { - .flags = 0 - }, - - .power_control = smartq_usb_host_powercontrol, - .enable_oc = smartq_usb_host_enableoc, -}; - -static struct gpiod_lookup_table smartq_usb_otg_vbus_gpiod_table = { - .dev_id = "gpio-vbus", - .table = { - GPIO_LOOKUP("GPL", 9, "vbus", GPIO_ACTIVE_LOW), - { }, - }, -}; - -static struct platform_device smartq_usb_otg_vbus_dev = { - .name = "gpio-vbus", -}; - -static struct pwm_lookup smartq_pwm_lookup[] = { - PWM_LOOKUP("samsung-pwm", 1, "pwm-backlight.0", NULL, - 1000000000 / (1000 * 20), PWM_POLARITY_NORMAL), -}; - -static int smartq_bl_init(struct device *dev) -{ - s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2)); - - return 0; -} - -static struct platform_pwm_backlight_data smartq_backlight_data = { - .max_brightness = 1000, - .dft_brightness = 600, - .init = smartq_bl_init, -}; - -static struct platform_device smartq_backlight_device = { - .name = "pwm-backlight", - .dev = { - .parent = &samsung_device_pwm.dev, - .platform_data = &smartq_backlight_data, - }, -}; - -static struct s3c2410_ts_mach_info smartq_touchscreen_pdata __initdata = { - .delay = 65535, - .presc = 99, - .oversampling_shift = 4, -}; - -static struct s3c_sdhci_platdata smartq_internal_hsmmc_pdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_PERMANENT, -}; - -static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = { - /* Battery voltage (?-4.2V) */ - .in[0] = &(struct s3c_hwmon_chcfg) { - .name = "smartq:battery-voltage", - .mult = 3300, - .div = 2048, - }, - /* Reference voltage (1.2V) */ - .in[1] = &(struct s3c_hwmon_chcfg) { - .name = "smartq:reference-voltage", - .mult = 3300, - .div = 4096, - }, -}; - -static struct dwc2_hsotg_plat smartq_hsotg_pdata; - -static int __init smartq_lcd_setup_gpio(void) -{ - int ret; - - ret = gpio_request(S3C64XX_GPM(3), "LCD power"); - if (ret < 0) - return ret; - - /* turn power off */ - gpio_direction_output(S3C64XX_GPM(3), 0); - - return 0; -} - -/* GPM0 -> CS */ -static struct spi_gpio_platform_data smartq_lcd_control = { - .num_chipselect = 1, -}; - -static struct platform_device smartq_lcd_control_device = { - .name = "spi_gpio", - .id = 1, - .dev.platform_data = &smartq_lcd_control, -}; - -static struct gpiod_lookup_table smartq_lcd_control_gpiod_table = { - .dev_id = "spi_gpio", - .table = { - GPIO_LOOKUP("GPIOM", 1, - "sck", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOM", 2, - "mosi", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOM", 3, - "miso", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("GPIOM", 0, - "cs", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void smartq_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) -{ - gpio_direction_output(S3C64XX_GPM(3), power); -} - -static struct plat_lcd_data smartq_lcd_power_data = { - .set_power = smartq_lcd_power_set, -}; - -static struct platform_device smartq_lcd_power_device = { - .name = "platform-lcd", - .dev.parent = &s3c_device_fb.dev, - .dev.platform_data = &smartq_lcd_power_data, -}; - -static struct i2c_board_info smartq_i2c_devs[] __initdata = { - { I2C_BOARD_INFO("wm8987", 0x1a), }, -}; - -static struct platform_device *smartq_devices[] __initdata = { - &s3c_device_hsmmc1, /* Init iNAND first, ... */ - &s3c_device_hsmmc0, /* ... then the external SD card */ - &s3c_device_hsmmc2, - &s3c_device_adc, - &s3c_device_fb, - &s3c_device_hwmon, - &s3c_device_i2c0, - &s3c_device_ohci, - &s3c_device_rtc, - &samsung_device_pwm, - &s3c_device_usb_hsotg, - &s3c64xx_device_iis0, - &smartq_backlight_device, - &smartq_lcd_control_device, - &smartq_lcd_power_device, - &smartq_usb_otg_vbus_dev, -}; - -static void __init smartq_lcd_mode_set(void) -{ - u32 tmp; - - /* set the LCD type */ - tmp = __raw_readl(S3C64XX_SPCON); - tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; - tmp |= S3C64XX_SPCON_LCD_SEL_RGB; - __raw_writel(tmp, S3C64XX_SPCON); - - /* remove the LCD bypass */ - tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); - tmp &= ~MIFPCON_LCD_BYPASS; - __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); -} - -static void smartq_power_off(void) -{ - gpio_direction_output(S3C64XX_GPK(15), 1); -} - -static int __init smartq_power_off_init(void) -{ - int ret; - - ret = gpio_request(S3C64XX_GPK(15), "Power control"); - if (ret < 0) { - pr_err("%s: failed to get GPK15\n", __func__); - return ret; - } - - /* leave power on */ - gpio_direction_output(S3C64XX_GPK(15), 0); - - pm_power_off = smartq_power_off; - - return ret; -} - -static int __init smartq_usb_host_init(void) -{ - int ret; - - ret = gpio_request(S3C64XX_GPL(0), "USB power control"); - if (ret < 0) { - pr_err("%s: failed to get GPL0\n", __func__); - return ret; - } - - ret = gpio_request(S3C64XX_GPL(1), "USB host power control"); - if (ret < 0) { - pr_err("%s: failed to get GPL1\n", __func__); - goto err; - } - - if (!machine_is_smartq5()) { - /* This isn't present on a SmartQ 5 board */ - ret = gpio_request(S3C64XX_GPL(10), "USB host overcurrent"); - if (ret < 0) { - pr_err("%s: failed to get GPL10\n", __func__); - goto err2; - } - } - - /* turn power off */ - gpio_direction_output(S3C64XX_GPL(0), 0); - gpio_direction_output(S3C64XX_GPL(1), 0); - if (!machine_is_smartq5()) - gpio_direction_input(S3C64XX_GPL(10)); - - s3c_device_ohci.dev.platform_data = &smartq_usb_host_info; - - return 0; - -err2: - gpio_free(S3C64XX_GPL(1)); -err: - gpio_free(S3C64XX_GPL(0)); - return ret; -} - -static int __init smartq_wifi_init(void) -{ - int ret; - - ret = gpio_request(S3C64XX_GPK(1), "wifi control"); - if (ret < 0) { - pr_err("%s: failed to get GPK1\n", __func__); - return ret; - } - - ret = gpio_request(S3C64XX_GPK(2), "wifi reset"); - if (ret < 0) { - pr_err("%s: failed to get GPK2\n", __func__); - gpio_free(S3C64XX_GPK(1)); - return ret; - } - - /* turn power on */ - gpio_direction_output(S3C64XX_GPK(1), 1); - - /* reset device */ - gpio_direction_output(S3C64XX_GPK(2), 0); - mdelay(100); - gpio_set_value(S3C64XX_GPK(2), 1); - gpio_direction_input(S3C64XX_GPK(2)); - - return 0; -} - -static struct map_desc smartq_iodesc[] __initdata = {}; -void __init smartq_map_io(void) -{ - s3c64xx_init_io(smartq_iodesc, ARRAY_SIZE(smartq_iodesc)); - s3c64xx_set_xtal_freq(12000000); - s3c64xx_set_xusbxti_freq(12000000); - s3c24xx_init_uarts(smartq_uartcfgs, ARRAY_SIZE(smartq_uartcfgs)); - s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); - - smartq_lcd_mode_set(); -} - -static struct gpiod_lookup_table smartq_audio_gpios = { - .dev_id = "smartq-audio", - .table = { - GPIO_LOOKUP("GPL", 12, "headphone detect", 0), - GPIO_LOOKUP("GPK", 12, "amplifiers shutdown", 0), - { }, - }, -}; - -void __init smartq_machine_init(void) -{ - s3c_i2c0_set_platdata(NULL); - dwc2_hsotg_set_platdata(&smartq_hsotg_pdata); - s3c_hwmon_set_platdata(&smartq_hwmon_pdata); - s3c_sdhci1_set_platdata(&smartq_internal_hsmmc_pdata); - s3c_sdhci2_set_platdata(&smartq_internal_hsmmc_pdata); - s3c64xx_ts_set_platdata(&smartq_touchscreen_pdata); - - i2c_register_board_info(0, smartq_i2c_devs, - ARRAY_SIZE(smartq_i2c_devs)); - - WARN_ON(smartq_lcd_setup_gpio()); - WARN_ON(smartq_power_off_init()); - WARN_ON(smartq_usb_host_init()); - WARN_ON(smartq_wifi_init()); - - pwm_add_table(smartq_pwm_lookup, ARRAY_SIZE(smartq_pwm_lookup)); - gpiod_add_lookup_table(&smartq_lcd_control_gpiod_table); - gpiod_add_lookup_table(&smartq_usb_otg_vbus_gpiod_table); - platform_add_devices(smartq_devices, ARRAY_SIZE(smartq_devices)); - - gpiod_add_lookup_table(&smartq_audio_gpios); - platform_device_register_simple("smartq-audio", -1, NULL, 0); -} diff --git a/arch/arm/mach-s3c/mach-smartq.h b/arch/arm/mach-s3c/mach-smartq.h deleted file mode 100644 index f98132f4f430..000000000000 --- a/arch/arm/mach-s3c/mach-smartq.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * linux/arch/arm/mach-s3c64xx/mach-smartq.h - * - * Copyright (C) 2010 Maurus Cuelenaere - */ - -#ifndef __MACH_SMARTQ_H -#define __MACH_SMARTQ_H __FILE__ - -#include <linux/init.h> - -extern void __init smartq_map_io(void); -extern void __init smartq_machine_init(void); - -#endif /* __MACH_SMARTQ_H */ diff --git a/arch/arm/mach-s3c/mach-smartq5.c b/arch/arm/mach-s3c/mach-smartq5.c deleted file mode 100644 index ce3fce0bba20..000000000000 --- a/arch/arm/mach-s3c/mach-smartq5.c +++ /dev/null @@ -1,154 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2010 Maurus Cuelenaere - -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/gpio_keys.h> -#include <linux/init.h> -#include <linux/input.h> -#include <linux/leds.h> -#include <linux/platform_device.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include <video/samsung_fimd.h> -#include "irqs.h" -#include "map.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "cpu.h" -#include "devs.h" -#include "fb.h" -#include "gpio-cfg.h" - -#include "s3c64xx.h" -#include "mach-smartq.h" - -static struct gpio_led smartq5_leds[] = { - { - .name = "smartq5:green", - .active_low = 1, - .gpio = S3C64XX_GPN(8), - }, - { - .name = "smartq5:red", - .active_low = 1, - .gpio = S3C64XX_GPN(9), - }, -}; - -static struct gpio_led_platform_data smartq5_led_data = { - .num_leds = ARRAY_SIZE(smartq5_leds), - .leds = smartq5_leds, -}; - -static struct platform_device smartq5_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev.platform_data = &smartq5_led_data, -}; - -/* Labels according to the SmartQ manual */ -static struct gpio_keys_button smartq5_buttons[] = { - { - .gpio = S3C64XX_GPL(14), - .code = KEY_POWER, - .desc = "Power", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, - { - .gpio = S3C64XX_GPN(2), - .code = KEY_KPMINUS, - .desc = "Minus", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, - { - .gpio = S3C64XX_GPN(12), - .code = KEY_KPPLUS, - .desc = "Plus", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, - { - .gpio = S3C64XX_GPN(15), - .code = KEY_ENTER, - .desc = "Move", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, -}; - -static struct gpio_keys_platform_data smartq5_buttons_data = { - .buttons = smartq5_buttons, - .nbuttons = ARRAY_SIZE(smartq5_buttons), -}; - -static struct platform_device smartq5_buttons_device = { - .name = "gpio-keys", - .id = 0, - .num_resources = 0, - .dev = { - .platform_data = &smartq5_buttons_data, - } -}; - -static struct s3c_fb_pd_win smartq5_fb_win0 = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode smartq5_lcd_timing = { - .left_margin = 216, - .right_margin = 40, - .upper_margin = 35, - .lower_margin = 10, - .hsync_len = 1, - .vsync_len = 1, - .xres = 800, - .yres = 480, - .refresh = 80, -}; - -static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &smartq5_lcd_timing, - .win[0] = &smartq5_fb_win0, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | - VIDCON1_INV_VDEN, -}; - -static struct platform_device *smartq5_devices[] __initdata = { - &smartq5_leds_device, - &smartq5_buttons_device, -}; - -static void __init smartq5_machine_init(void) -{ - s3c_fb_set_platdata(&smartq5_lcd_pdata); - - smartq_machine_init(); - - platform_add_devices(smartq5_devices, ARRAY_SIZE(smartq5_devices)); -} - -MACHINE_START(SMARTQ5, "SmartQ 5") - /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6410_init_irq, - .map_io = smartq_map_io, - .init_machine = smartq5_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smartq7.c b/arch/arm/mach-s3c/mach-smartq7.c deleted file mode 100644 index 78ca0e704797..000000000000 --- a/arch/arm/mach-s3c/mach-smartq7.c +++ /dev/null @@ -1,170 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2010 Maurus Cuelenaere - -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/gpio_keys.h> -#include <linux/init.h> -#include <linux/input.h> -#include <linux/leds.h> -#include <linux/platform_device.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include <video/samsung_fimd.h> -#include "irqs.h" -#include "map.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "cpu.h" -#include "devs.h" -#include "fb.h" -#include "gpio-cfg.h" - -#include "s3c64xx.h" -#include "mach-smartq.h" - -static struct gpio_led smartq7_leds[] = { - { - .name = "smartq7:red", - .active_low = 1, - .gpio = S3C64XX_GPN(8), - }, - { - .name = "smartq7:green", - .active_low = 1, - .gpio = S3C64XX_GPN(9), - }, -}; - -static struct gpio_led_platform_data smartq7_led_data = { - .num_leds = ARRAY_SIZE(smartq7_leds), - .leds = smartq7_leds, -}; - -static struct platform_device smartq7_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev.platform_data = &smartq7_led_data, -}; - -/* Labels according to the SmartQ manual */ -static struct gpio_keys_button smartq7_buttons[] = { - { - .gpio = S3C64XX_GPL(14), - .code = KEY_POWER, - .desc = "Power", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, - { - .gpio = S3C64XX_GPN(2), - .code = KEY_FN, - .desc = "Function", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, - { - .gpio = S3C64XX_GPN(3), - .code = KEY_KPMINUS, - .desc = "Minus", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, - { - .gpio = S3C64XX_GPN(4), - .code = KEY_KPPLUS, - .desc = "Plus", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, - { - .gpio = S3C64XX_GPN(12), - .code = KEY_ENTER, - .desc = "Enter", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, - { - .gpio = S3C64XX_GPN(15), - .code = KEY_ESC, - .desc = "Cancel", - .active_low = 1, - .debounce_interval = 5, - .type = EV_KEY, - }, -}; - -static struct gpio_keys_platform_data smartq7_buttons_data = { - .buttons = smartq7_buttons, - .nbuttons = ARRAY_SIZE(smartq7_buttons), -}; - -static struct platform_device smartq7_buttons_device = { - .name = "gpio-keys", - .id = 0, - .num_resources = 0, - .dev = { - .platform_data = &smartq7_buttons_data, - } -}; - -static struct s3c_fb_pd_win smartq7_fb_win0 = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode smartq7_lcd_timing = { - .left_margin = 3, - .right_margin = 5, - .upper_margin = 1, - .lower_margin = 20, - .hsync_len = 10, - .vsync_len = 3, - .xres = 800, - .yres = 480, - .refresh = 80, -}; - -static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &smartq7_lcd_timing, - .win[0] = &smartq7_fb_win0, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | - VIDCON1_INV_VCLK, -}; - -static struct platform_device *smartq7_devices[] __initdata = { - &smartq7_leds_device, - &smartq7_buttons_device, -}; - -static void __init smartq7_machine_init(void) -{ - s3c_fb_set_platdata(&smartq7_lcd_pdata); - - smartq_machine_init(); - - platform_add_devices(smartq7_devices, ARRAY_SIZE(smartq7_devices)); -} - -MACHINE_START(SMARTQ7, "SmartQ 7") - /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6410_init_irq, - .map_io = smartq_map_io, - .init_machine = smartq7_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smdk2410.c b/arch/arm/mach-s3c/mach-smdk2410.c deleted file mode 100644 index 76b0a8846616..000000000000 --- a/arch/arm/mach-s3c/mach-smdk2410.c +++ /dev/null @@ -1,112 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (C) 2004 by FS Forth-Systeme GmbH -// All rights reserved. -// -// @Author: Jonas Dietsche -// -// @History: -// derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by -// Ben Dooks <ben@simtec.co.uk> - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/i2c-s3c2410.h> - -#include "devs.h" -#include "cpu.h" - -#include "s3c24xx.h" -#include "common-smdk-s3c24xx.h" - -static struct map_desc smdk2410_iodesc[] __initdata = { - /* nothing here yet */ -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -static struct platform_device *smdk2410_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, -}; - -static void __init smdk2410_map_io(void) -{ - s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc)); - s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init smdk2410_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init smdk2410_init(void) -{ - s3c_i2c0_set_platdata(NULL); - platform_add_devices(smdk2410_devices, ARRAY_SIZE(smdk2410_devices)); - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - smdk_machine_init(); -} - -MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch - * to SMDK2410 */ - /* Maintainer: Jonas Dietsche */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .map_io = smdk2410_map_io, - .init_irq = s3c2410_init_irq, - .init_machine = smdk2410_init, - .init_time = smdk2410_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smdk2413.c b/arch/arm/mach-s3c/mach-smdk2413.c deleted file mode 100644 index 2b4e20aaa346..000000000000 --- a/arch/arm/mach-s3c/mach-smdk2413.c +++ /dev/null @@ -1,169 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Thanks to Dimity Andric (TomTom) and Steven Ryu (Samsung) for the -// loans of SMDK2413 to work with. - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio/machine.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/memblock.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/hardware/iomd.h> -#include <asm/setup.h> -#include <asm/irq.h> -#include <asm/mach-types.h> - -//#include <asm/debug-ll.h> -#include "hardware-s3c24xx.h" -#include "regs-gpio.h" - -#include <linux/platform_data/usb-s3c2410_udc.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/fb-s3c2410.h> -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include "devs.h" -#include "cpu.h" - -#include "s3c24xx.h" -#include "common-smdk-s3c24xx.h" - -static struct map_desc smdk2413_iodesc[] __initdata = { -}; - -static struct s3c2410_uartcfg smdk2413_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - /* IR port */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x43, - .ufcon = 0x51, - } -}; - - -static struct s3c2410_udc_mach_info smdk2413_udc_cfg __initdata = { -}; - -static struct gpiod_lookup_table smdk2413_udc_gpio_table = { - .dev_id = "s3c2410-usbgadget", - .table = { - GPIO_LOOKUP("GPIOF", 2, "pullup", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device *smdk2413_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_usbgadget, - &s3c2412_device_dma, -}; - -static void __init smdk2413_fixup(struct tag *tags, char **cmdline) -{ - if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) { - memblock_add(0x30000000, SZ_64M); - } -} - -static void __init smdk2413_map_io(void) -{ - s3c24xx_init_io(smdk2413_iodesc, ARRAY_SIZE(smdk2413_iodesc)); - s3c24xx_init_uarts(smdk2413_uartcfgs, ARRAY_SIZE(smdk2413_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init smdk2413_init_time(void) -{ - s3c2412_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init smdk2413_machine_init(void) -{ /* Turn off suspend on both USB ports, and switch the - * selectable USB port to USB device mode. */ - - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | - S3C2410_MISCCR_USBSUSPND0 | - S3C2410_MISCCR_USBSUSPND1, 0x0); - - gpiod_add_lookup_table(&smdk2413_udc_gpio_table); - s3c24xx_udc_set_platdata(&smdk2413_udc_cfg); - s3c_i2c0_set_platdata(NULL); - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - - platform_add_devices(smdk2413_devices, ARRAY_SIZE(smdk2413_devices)); - smdk_machine_init(); -} - -MACHINE_START(S3C2413, "S3C2413") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2412, - - .fixup = smdk2413_fixup, - .init_irq = s3c2412_init_irq, - .map_io = smdk2413_map_io, - .init_machine = smdk2413_machine_init, - .init_time = s3c24xx_timer_init, -MACHINE_END - -MACHINE_START(SMDK2412, "SMDK2412") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2412, - - .fixup = smdk2413_fixup, - .init_irq = s3c2412_init_irq, - .map_io = smdk2413_map_io, - .init_machine = smdk2413_machine_init, - .init_time = s3c24xx_timer_init, -MACHINE_END - -MACHINE_START(SMDK2413, "SMDK2413") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2412, - - .fixup = smdk2413_fixup, - .init_irq = s3c2412_init_irq, - .map_io = smdk2413_map_io, - .init_machine = smdk2413_machine_init, - .init_time = smdk2413_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smdk2416.c b/arch/arm/mach-s3c/mach-smdk2416.c deleted file mode 100644 index 329fe26be268..000000000000 --- a/arch/arm/mach-s3c/mach-smdk2416.c +++ /dev/null @@ -1,248 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>, -// as part of OpenInkpot project -// Copyright (c) 2009 Promwad Innovation Company -// Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/mtd/partitions.h> -#include <linux/gpio.h> -#include <linux/fb.h> -#include <linux/delay.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <video/samsung_fimd.h> -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "hardware-s3c24xx.h" -#include "regs-gpio.h" -#include "regs-s3c2443-clock.h" -#include "gpio-samsung.h" - -#include <linux/platform_data/leds-s3c24xx.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include "gpio-cfg.h" -#include "devs.h" -#include "cpu.h" -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include "sdhci.h" -#include <linux/platform_data/usb-s3c2410_udc.h> -#include <linux/platform_data/s3c-hsudc.h> - -#include "fb.h" - -#include "s3c24xx.h" -#include "common-smdk-s3c24xx.h" - -static struct map_desc smdk2416_iodesc[] __initdata = { - /* ISA IO Space map (memory space selected by A24) */ - - { - .virtual = (u32)S3C24XX_VA_ISA_BYTE, - .pfn = __phys_to_pfn(S3C2410_CS2), - .length = 0x10000, - .type = MT_DEVICE, - }, { - .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000, - .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)), - .length = SZ_4M, - .type = MT_DEVICE, - } -}; - -#define UCON (S3C2410_UCON_DEFAULT | \ - S3C2440_UCON_PCLK | \ - S3C2443_UCON_RXERR_IRQEN) - -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) - -#define UFCON (S3C2410_UFCON_RXTRIG8 | \ - S3C2410_UFCON_FIFOMODE | \ - S3C2440_UFCON_TXTRIG16) - -static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - /* IR port */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON | 0x50, - .ufcon = UFCON, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -static void smdk2416_hsudc_gpio_init(void) -{ - s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(1)); - s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 0); -} - -static void smdk2416_hsudc_gpio_uninit(void) -{ - s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 1); - s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(0)); -} - -static struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = { - .epnum = 9, - .gpio_init = smdk2416_hsudc_gpio_init, - .gpio_uninit = smdk2416_hsudc_gpio_uninit, -}; - -static struct s3c_fb_pd_win smdk2416_fb_win[] = { - [0] = { - .default_bpp = 16, - .max_bpp = 32, - .xres = 800, - .yres = 480, - }, -}; - -static struct fb_videomode smdk2416_lcd_timing = { - .pixclock = 41094, - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -static void s3c2416_fb_gpio_setup_24bpp(void) -{ - unsigned int gpio; - - for (gpio = S3C2410_GPC(1); gpio <= S3C2410_GPC(4); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S3C2410_GPC(8); gpio <= S3C2410_GPC(15); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S3C2410_GPD(0); gpio <= S3C2410_GPD(15); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } -} - -static struct s3c_fb_platdata smdk2416_fb_platdata = { - .win[0] = &smdk2416_fb_win[0], - .vtiming = &smdk2416_lcd_timing, - .setup_gpio = s3c2416_fb_gpio_setup_24bpp, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, -}; - -static struct s3c_sdhci_platdata smdk2416_hsmmc0_pdata __initdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = S3C2410_GPF(1), - .ext_cd_gpio_invert = 1, -}; - -static struct s3c_sdhci_platdata smdk2416_hsmmc1_pdata __initdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_NONE, -}; - -static struct platform_device *smdk2416_devices[] __initdata = { - &s3c_device_fb, - &s3c_device_wdt, - &s3c_device_ohci, - &s3c_device_i2c0, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_usb_hsudc, - &s3c2443_device_dma, -}; - -static void __init smdk2416_init_time(void) -{ - s3c2416_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init smdk2416_map_io(void) -{ - s3c24xx_init_io(smdk2416_iodesc, ARRAY_SIZE(smdk2416_iodesc)); - s3c24xx_init_uarts(smdk2416_uartcfgs, ARRAY_SIZE(smdk2416_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init smdk2416_machine_init(void) -{ - s3c_i2c0_set_platdata(NULL); - s3c_fb_set_platdata(&smdk2416_fb_platdata); - - s3c_sdhci0_set_platdata(&smdk2416_hsmmc0_pdata); - s3c_sdhci1_set_platdata(&smdk2416_hsmmc1_pdata); - - s3c24xx_hsudc_set_platdata(&smdk2416_hsudc_platdata); - - gpio_request(S3C2410_GPB(4), "USBHost Power"); - gpio_direction_output(S3C2410_GPB(4), 1); - - gpio_request(S3C2410_GPB(3), "Display Power"); - gpio_direction_output(S3C2410_GPB(3), 1); - - gpio_request(S3C2410_GPB(1), "Display Reset"); - gpio_direction_output(S3C2410_GPB(1), 1); - - platform_add_devices(smdk2416_devices, ARRAY_SIZE(smdk2416_devices)); - smdk_machine_init(); -} - -MACHINE_START(SMDK2416, "SMDK2416") - /* Maintainer: Yauhen Kharuzhy <jekhor@gmail.com> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2416, - - .init_irq = s3c2416_init_irq, - .map_io = smdk2416_map_io, - .init_machine = smdk2416_machine_init, - .init_time = smdk2416_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smdk2440.c b/arch/arm/mach-s3c/mach-smdk2440.c deleted file mode 100644 index 6aea769ebde1..000000000000 --- a/arch/arm/mach-s3c/mach-smdk2440.c +++ /dev/null @@ -1,180 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// linux/arch/arm/mach-s3c2440/mach-smdk2440.c -// -// Copyright (c) 2004-2005 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://www.fluff.org/ben/smdk2440/ -// -// Thanks to Dimity Andric and TomTom for the loan of an SMDK2440. - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include <linux/platform_data/fb-s3c2410.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include "devs.h" -#include "cpu.h" - -#include "s3c24xx.h" -#include "common-smdk-s3c24xx.h" - -static struct map_desc smdk2440_iodesc[] __initdata = { - /* ISA IO Space map (memory space selected by A24) */ - - { - .virtual = (u32)S3C24XX_VA_ISA_BYTE, - .pfn = __phys_to_pfn(S3C2410_CS2), - .length = 0x10000, - .type = MT_DEVICE, - }, { - .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000, - .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)), - .length = SZ_4M, - .type = MT_DEVICE, - } -}; - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - /* IR port */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x43, - .ufcon = 0x51, - } -}; - -/* LCD driver info */ - -static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = { - - .lcdcon5 = S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_PWREN | - S3C2410_LCDCON5_HWSWP, - - .type = S3C2410_LCDCON1_TFT, - - .width = 240, - .height = 320, - - .pixclock = 166667, /* HCLK 60 MHz, divisor 10 */ - .xres = 240, - .yres = 320, - .bpp = 16, - .left_margin = 20, - .right_margin = 8, - .hsync_len = 4, - .upper_margin = 8, - .lower_margin = 7, - .vsync_len = 4, -}; - -static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = { - .displays = &smdk2440_lcd_cfg, - .num_displays = 1, - .default_display = 0, - -#if 0 - /* currently setup by downloader */ - .gpccon = 0xaa940659, - .gpccon_mask = 0xffffffff, - .gpcup = 0x0000ffff, - .gpcup_mask = 0xffffffff, - .gpdcon = 0xaa84aaa0, - .gpdcon_mask = 0xffffffff, - .gpdup = 0x0000faff, - .gpdup_mask = 0xffffffff, - - .gpccon_reg = S3C2410_GPCCON, - .gpcup_reg = S3C2410_GPCUP, - .gpdcon_reg = S3C2410_GPDCON, - .gpdup_reg = S3C2410_GPDUP, -#endif - - .lpcsel = ((0xCE6) & ~7) | 1<<4, -}; - -static struct platform_device *smdk2440_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, -}; - -static void __init smdk2440_map_io(void) -{ - s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc)); - s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init smdk2440_init_time(void) -{ - s3c2440_init_clocks(16934400); - s3c24xx_timer_init(); -} - -static void __init smdk2440_machine_init(void) -{ - s3c24xx_fb_set_platdata(&smdk2440_fb_info); - s3c_i2c0_set_platdata(NULL); - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices)); - smdk_machine_init(); -} - -MACHINE_START(S3C2440, "SMDK2440") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2440, - - .init_irq = s3c2440_init_irq, - .map_io = smdk2440_map_io, - .init_machine = smdk2440_machine_init, - .init_time = smdk2440_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smdk2443.c b/arch/arm/mach-s3c/mach-smdk2443.c deleted file mode 100644 index 075140f8f760..000000000000 --- a/arch/arm/mach-s3c/mach-smdk2443.c +++ /dev/null @@ -1,126 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2007 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://www.fluff.org/ben/smdk2443/ -// -// Thanks to Samsung for the loan of an SMDK2443 - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "regs-gpio.h" - -#include <linux/platform_data/fb-s3c2410.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include "devs.h" -#include "cpu.h" - -#include "s3c24xx.h" -#include "common-smdk-s3c24xx.h" - -static struct map_desc smdk2443_iodesc[] __initdata = { - /* ISA IO Space map (memory space selected by A24) */ - - { - .virtual = (u32)S3C24XX_VA_ISA_BYTE, - .pfn = __phys_to_pfn(S3C2410_CS2), - .length = 0x10000, - .type = MT_DEVICE, - }, { - .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000, - .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)), - .length = SZ_4M, - .type = MT_DEVICE, - } -}; - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg smdk2443_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - /* IR port */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x43, - .ufcon = 0x51, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - } -}; - -static struct platform_device *smdk2443_devices[] __initdata = { - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_hsmmc1, - &s3c2443_device_dma, -}; - -static void __init smdk2443_map_io(void) -{ - s3c24xx_init_io(smdk2443_iodesc, ARRAY_SIZE(smdk2443_iodesc)); - s3c24xx_init_uarts(smdk2443_uartcfgs, ARRAY_SIZE(smdk2443_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init smdk2443_init_time(void) -{ - s3c2443_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init smdk2443_machine_init(void) -{ - s3c_i2c0_set_platdata(NULL); - platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices)); - smdk_machine_init(); -} - -MACHINE_START(SMDK2443, "SMDK2443") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2443, - .init_irq = s3c2443_init_irq, - .map_io = smdk2443_map_io, - .init_machine = smdk2443_machine_init, - .init_time = smdk2443_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smdk6400.c b/arch/arm/mach-s3c/mach-smdk6400.c deleted file mode 100644 index a3c1b2a82455..000000000000 --- a/arch/arm/mach-s3c/mach-smdk6400.c +++ /dev/null @@ -1,90 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/io.h> - -#include <asm/mach-types.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "irqs.h" -#include "map.h" - -#include "devs.h" -#include "cpu.h" -#include <linux/platform_data/i2c-s3c2410.h> -#include "gpio-samsung.h" - -#include "s3c64xx.h" - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg smdk6400_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, -}; - -static struct map_desc smdk6400_iodesc[] = {}; - -static void __init smdk6400_map_io(void) -{ - s3c64xx_init_io(smdk6400_iodesc, ARRAY_SIZE(smdk6400_iodesc)); - s3c64xx_set_xtal_freq(12000000); - s3c24xx_init_uarts(smdk6400_uartcfgs, ARRAY_SIZE(smdk6400_uartcfgs)); - s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); -} - -static struct platform_device *smdk6400_devices[] __initdata = { - &s3c_device_hsmmc1, - &s3c_device_i2c0, -}; - -static struct i2c_board_info i2c_devs[] __initdata = { - { I2C_BOARD_INFO("wm8753", 0x1A), }, - { I2C_BOARD_INFO("24c08", 0x50), }, -}; - -static void __init smdk6400_machine_init(void) -{ - i2c_register_board_info(0, i2c_devs, ARRAY_SIZE(i2c_devs)); - platform_add_devices(smdk6400_devices, ARRAY_SIZE(smdk6400_devices)); -} - -MACHINE_START(SMDK6400, "SMDK6400") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6400_init_irq, - .map_io = smdk6400_map_io, - .init_machine = smdk6400_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-smdk6410.c b/arch/arm/mach-s3c/mach-smdk6410.c deleted file mode 100644 index e57b2bb61484..000000000000 --- a/arch/arm/mach-s3c/mach-smdk6410.c +++ /dev/null @@ -1,706 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2008 Openmoko, Inc. -// Copyright 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/input.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/i2c.h> -#include <linux/leds.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/smsc911x.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/platform_data/s3c-hsotg.h> - -#ifdef CONFIG_SMDK6410_WM1190_EV1 -#include <linux/mfd/wm8350/core.h> -#include <linux/mfd/wm8350/pmic.h> -#endif - -#ifdef CONFIG_SMDK6410_WM1192_EV1 -#include <linux/mfd/wm831x/core.h> -#include <linux/mfd/wm831x/pdata.h> -#endif - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "irqs.h" -#include "map.h" - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include <linux/platform_data/ata-samsung_cf.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include "fb.h" -#include "gpio-cfg.h" - -#include "devs.h" -#include "cpu.h" -#include <linux/soc/samsung/s3c-adc.h> -#include <linux/platform_data/touchscreen-s3c2410.h> -#include "keypad.h" - -#include "backlight-s3c64xx.h" -#include "s3c64xx.h" -#include "regs-modem-s3c64xx.h" -#include "regs-srom-s3c64xx.h" -#include "regs-sys-s3c64xx.h" - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, -}; - -/* framebuffer and LCD setup. */ - -/* GPF15 = LCD backlight control - * GPF13 => Panel power - * GPN5 = LCD nRESET signal - * PWM_TOUT1 => backlight brightness - */ - -static void smdk6410_lcd_power_set(struct plat_lcd_data *pd, - unsigned int power) -{ - if (power) { - gpio_direction_output(S3C64XX_GPF(13), 1); - - /* fire nRESET on power up */ - gpio_direction_output(S3C64XX_GPN(5), 0); - msleep(10); - gpio_direction_output(S3C64XX_GPN(5), 1); - msleep(1); - } else { - gpio_direction_output(S3C64XX_GPF(13), 0); - } -} - -static struct plat_lcd_data smdk6410_lcd_power_data = { - .set_power = smdk6410_lcd_power_set, -}; - -static struct platform_device smdk6410_lcd_powerdev = { - .name = "platform-lcd", - .dev.parent = &s3c_device_fb.dev, - .dev.platform_data = &smdk6410_lcd_power_data, -}; - -static struct s3c_fb_pd_win smdk6410_fb_win0 = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 800, - .yres = 480, - .virtual_y = 480 * 2, - .virtual_x = 800, -}; - -static struct fb_videomode smdk6410_lcd_timing = { - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ -static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = { - .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, - .vtiming = &smdk6410_lcd_timing, - .win[0] = &smdk6410_fb_win0, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, -}; - -/* - * Configuring Ethernet on SMDK6410 - * - * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6. - * The constant address below corresponds to nCS1 - * - * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet" - * 2) CFG6 needs to be switched to "LAN9115" side - */ - -static struct resource smdk6410_smsc911x_resources[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K), - [1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \ - | IRQ_TYPE_LEVEL_LOW), -}; - -static struct smsc911x_platform_config smdk6410_smsc911x_pdata = { - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, - .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY, - .phy_interface = PHY_INTERFACE_MODE_MII, -}; - - -static struct platform_device smdk6410_smsc911x = { - .name = "smsc911x", - .id = -1, - .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources), - .resource = &smdk6410_smsc911x_resources[0], - .dev = { - .platform_data = &smdk6410_smsc911x_pdata, - }, -}; - -#ifdef CONFIG_REGULATOR -static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = { - REGULATOR_SUPPLY("PVDD", "0-001b"), - REGULATOR_SUPPLY("AVDD", "0-001b"), -}; - -static struct regulator_init_data __maybe_unused smdk6410_b_pwr_5v_data = { - .constraints = { - .always_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers), - .consumer_supplies = smdk6410_b_pwr_5v_consumers, -}; - -static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = { - .supply_name = "B_PWR_5V", - .microvolts = 5000000, - .init_data = &smdk6410_b_pwr_5v_data, -}; - -static struct platform_device smdk6410_b_pwr_5v = { - .name = "reg-fixed-voltage", - .id = -1, - .dev = { - .platform_data = &smdk6410_b_pwr_5v_pdata, - }, -}; -#endif - -static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = { - .setup_gpio = s3c64xx_ide_setup_gpio, -}; - -static uint32_t smdk6410_keymap[] __initdata = { - /* KEY(row, col, keycode) */ - KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), - KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), - KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), - KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) -}; - -static struct matrix_keymap_data smdk6410_keymap_data __initdata = { - .keymap = smdk6410_keymap, - .keymap_size = ARRAY_SIZE(smdk6410_keymap), -}; - -static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = { - .keymap_data = &smdk6410_keymap_data, - .rows = 2, - .cols = 8, -}; - -static struct map_desc smdk6410_iodesc[] = {}; - -static struct platform_device *smdk6410_devices[] __initdata = { -#ifdef CONFIG_SMDK6410_SD_CH0 - &s3c_device_hsmmc0, -#endif -#ifdef CONFIG_SMDK6410_SD_CH1 - &s3c_device_hsmmc1, -#endif - &s3c_device_i2c0, - &s3c_device_i2c1, - &s3c_device_fb, - &s3c_device_ohci, - &samsung_device_pwm, - &s3c_device_usb_hsotg, - &s3c64xx_device_iisv4, - &samsung_device_keypad, - -#ifdef CONFIG_REGULATOR - &smdk6410_b_pwr_5v, -#endif - &smdk6410_lcd_powerdev, - - &smdk6410_smsc911x, - &s3c_device_adc, - &s3c_device_cfcon, - &s3c_device_rtc, - &s3c_device_wdt, -}; - -#ifdef CONFIG_REGULATOR -/* ARM core */ -static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = { - REGULATOR_SUPPLY("vddarm", NULL), -}; - -/* VDDARM, BUCK1 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddarm = { - .constraints = { - .name = "PVDD_ARM", - .min_uV = 1000000, - .max_uV = 1300000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers), - .consumer_supplies = smdk6410_vddarm_consumers, -}; - -/* VDD_INT, BUCK2 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddint = { - .constraints = { - .name = "PVDD_INT", - .min_uV = 1000000, - .max_uV = 1200000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, -}; - -/* VDD_HI, LDO3 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddhi = { - .constraints = { - .name = "PVDD_HI", - .always_on = 1, - }, -}; - -/* VDD_PLL, LDO2 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddpll = { - .constraints = { - .name = "PVDD_PLL", - .always_on = 1, - }, -}; - -/* VDD_UH_MMC, LDO5 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vdduh_mmc = { - .constraints = { - .name = "PVDD_UH+PVDD_MMC", - .always_on = 1, - }, -}; - -/* VCCM3BT, LDO8 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vccmc3bt = { - .constraints = { - .name = "PVCCM3BT", - .always_on = 1, - }, -}; - -/* VCCM2MTV, LDO11 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vccm2mtv = { - .constraints = { - .name = "PVCCM2MTV", - .always_on = 1, - }, -}; - -/* VDD_LCD, LDO12 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddlcd = { - .constraints = { - .name = "PVDD_LCD", - .always_on = 1, - }, -}; - -/* VDD_OTGI, LDO9 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddotgi = { - .constraints = { - .name = "PVDD_OTGI", - .always_on = 1, - }, -}; - -/* VDD_OTG, LDO14 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddotg = { - .constraints = { - .name = "PVDD_OTG", - .always_on = 1, - }, -}; - -/* VDD_ALIVE, LDO15 on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddalive = { - .constraints = { - .name = "PVDD_ALIVE", - .always_on = 1, - }, -}; - -/* VDD_AUDIO, VLDO_AUDIO on J5 */ -static struct regulator_init_data __maybe_unused smdk6410_vddaudio = { - .constraints = { - .name = "PVDD_AUDIO", - .always_on = 1, - }, -}; -#endif - -#ifdef CONFIG_SMDK6410_WM1190_EV1 -/* S3C64xx internal logic & PLL */ -static struct regulator_init_data __maybe_unused wm8350_dcdc1_data = { - .constraints = { - .name = "PVDD_INT+PVDD_PLL", - .min_uV = 1200000, - .max_uV = 1200000, - .always_on = 1, - .apply_uV = 1, - }, -}; - -/* Memory */ -static struct regulator_init_data __maybe_unused wm8350_dcdc3_data = { - .constraints = { - .name = "PVDD_MEM", - .min_uV = 1800000, - .max_uV = 1800000, - .always_on = 1, - .state_mem = { - .uV = 1800000, - .mode = REGULATOR_MODE_NORMAL, - .enabled = 1, - }, - .initial_state = PM_SUSPEND_MEM, - }, -}; - -/* USB, EXT, PCM, ADC/DAC, USB, MMC */ -static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { - REGULATOR_SUPPLY("DVDD", "0-001b"), -}; - -static struct regulator_init_data __maybe_unused wm8350_dcdc4_data = { - .constraints = { - .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV", - .min_uV = 3000000, - .max_uV = 3000000, - .always_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers), - .consumer_supplies = wm8350_dcdc4_consumers, -}; - -/* OTGi/1190-EV1 HPVDD & AVDD */ -static struct regulator_init_data __maybe_unused wm8350_ldo4_data = { - .constraints = { - .name = "PVDD_OTGI+HPVDD+AVDD", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct { - int regulator; - struct regulator_init_data *initdata; -} wm1190_regulators[] = { - { WM8350_DCDC_1, &wm8350_dcdc1_data }, - { WM8350_DCDC_3, &wm8350_dcdc3_data }, - { WM8350_DCDC_4, &wm8350_dcdc4_data }, - { WM8350_DCDC_6, &smdk6410_vddarm }, - { WM8350_LDO_1, &smdk6410_vddalive }, - { WM8350_LDO_2, &smdk6410_vddotg }, - { WM8350_LDO_3, &smdk6410_vddlcd }, - { WM8350_LDO_4, &wm8350_ldo4_data }, -}; - -static int __init smdk6410_wm8350_init(struct wm8350 *wm8350) -{ - int i; - - /* Configure the IRQ line */ - s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP); - - /* Instantiate the regulators */ - for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++) - wm8350_register_regulator(wm8350, - wm1190_regulators[i].regulator, - wm1190_regulators[i].initdata); - - return 0; -} - -static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = { - .init = smdk6410_wm8350_init, - .irq_high = 1, - .irq_base = IRQ_BOARD_START, -}; -#endif - -#ifdef CONFIG_SMDK6410_WM1192_EV1 -static struct gpio_led wm1192_pmic_leds[] = { - { - .name = "PMIC:red:power", - .gpio = GPIO_BOARD_START + 3, - .default_state = LEDS_GPIO_DEFSTATE_ON, - }, -}; - -static struct gpio_led_platform_data wm1192_pmic_led = { - .num_leds = ARRAY_SIZE(wm1192_pmic_leds), - .leds = wm1192_pmic_leds, -}; - -static struct platform_device wm1192_pmic_led_dev = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &wm1192_pmic_led, - }, -}; - -static int wm1192_pre_init(struct wm831x *wm831x) -{ - int ret; - - /* Configure the IRQ line */ - s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP); - - ret = platform_device_register(&wm1192_pmic_led_dev); - if (ret != 0) - dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret); - - return 0; -} - -static struct wm831x_backlight_pdata wm1192_backlight_pdata = { - .isink = 1, - .max_uA = 27554, -}; - -static struct regulator_init_data __maybe_unused wm1192_dcdc3 = { - .constraints = { - .name = "PVDD_MEM+PVDD_GPS", - .always_on = 1, - }, -}; - -static struct regulator_consumer_supply wm1192_ldo1_consumers[] = { - REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */ -}; - -static struct regulator_init_data __maybe_unused wm1192_ldo1 = { - .constraints = { - .name = "PVDD_LCD+PVDD_EXT", - .always_on = 1, - }, - .consumer_supplies = wm1192_ldo1_consumers, - .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers), -}; - -static struct wm831x_status_pdata wm1192_led7_pdata = { - .name = "LED7:green:", -}; - -static struct wm831x_status_pdata wm1192_led8_pdata = { - .name = "LED8:green:", -}; - -static struct wm831x_pdata smdk6410_wm1192_pdata = { - .pre_init = wm1192_pre_init, - - .backlight = &wm1192_backlight_pdata, - .dcdc = { - &smdk6410_vddarm, /* DCDC1 */ - &smdk6410_vddint, /* DCDC2 */ - &wm1192_dcdc3, - }, - .gpio_base = GPIO_BOARD_START, - .ldo = { - &wm1192_ldo1, /* LDO1 */ - &smdk6410_vdduh_mmc, /* LDO2 */ - NULL, /* LDO3 NC */ - &smdk6410_vddotgi, /* LDO4 */ - &smdk6410_vddotg, /* LDO5 */ - &smdk6410_vddhi, /* LDO6 */ - &smdk6410_vddaudio, /* LDO7 */ - &smdk6410_vccm2mtv, /* LDO8 */ - &smdk6410_vddpll, /* LDO9 */ - &smdk6410_vccmc3bt, /* LDO10 */ - &smdk6410_vddalive, /* LDO11 */ - }, - .status = { - &wm1192_led7_pdata, - &wm1192_led8_pdata, - }, -}; -#endif - -static struct i2c_board_info i2c_devs0[] __initdata = { - { I2C_BOARD_INFO("24c08", 0x50), }, - { I2C_BOARD_INFO("wm8580", 0x1b), }, - -#ifdef CONFIG_SMDK6410_WM1192_EV1 - { I2C_BOARD_INFO("wm8312", 0x34), - .platform_data = &smdk6410_wm1192_pdata, - .irq = S3C_EINT(12), - }, -#endif - -#ifdef CONFIG_SMDK6410_WM1190_EV1 - { I2C_BOARD_INFO("wm8350", 0x1a), - .platform_data = &smdk6410_wm8350_pdata, - .irq = S3C_EINT(12), - }, -#endif -}; - -static struct i2c_board_info i2c_devs1[] __initdata = { - { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ -}; - -/* LCD Backlight data */ -static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = { - .no = S3C64XX_GPF(15), - .func = S3C_GPIO_SFN(2), -}; - -static struct pwm_lookup smdk6410_pwm_lookup[] = { - PWM_LOOKUP("samsung-pwm", 1, "pwm-backlight.0", NULL, 78770, - PWM_POLARITY_NORMAL), -}; - -static struct platform_pwm_backlight_data smdk6410_bl_data = { - /* Intentionally blank */ -}; - -static struct dwc2_hsotg_plat smdk6410_hsotg_pdata; - -static void __init smdk6410_map_io(void) -{ - u32 tmp; - - s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc)); - s3c64xx_set_xtal_freq(12000000); - s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs)); - s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); - - /* set the LCD type */ - - tmp = __raw_readl(S3C64XX_SPCON); - tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; - tmp |= S3C64XX_SPCON_LCD_SEL_RGB; - __raw_writel(tmp, S3C64XX_SPCON); - - /* remove the lcd bypass */ - tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); - tmp &= ~MIFPCON_LCD_BYPASS; - __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); -} - -static void __init smdk6410_machine_init(void) -{ - u32 cs1; - - s3c_i2c0_set_platdata(NULL); - s3c_i2c1_set_platdata(NULL); - s3c_fb_set_platdata(&smdk6410_lcd_pdata); - dwc2_hsotg_set_platdata(&smdk6410_hsotg_pdata); - - samsung_keypad_set_platdata(&smdk6410_keypad_data); - - s3c64xx_ts_set_platdata(NULL); - - /* configure nCS1 width to 16 bits */ - - cs1 = __raw_readl(S3C64XX_SROM_BW) & - ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); - cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | - (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | - (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << - S3C64XX_SROM_BW__NCS1__SHIFT; - __raw_writel(cs1, S3C64XX_SROM_BW); - - /* set timing for nCS1 suitable for ethernet chip */ - - __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | - (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | - (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | - (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | - (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) | - (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | - (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); - - gpio_request(S3C64XX_GPN(5), "LCD power"); - gpio_request(S3C64XX_GPF(13), "LCD power"); - - i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); - i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); - - s3c_ide_set_platdata(&smdk6410_ide_pdata); - - platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); - - pwm_add_table(smdk6410_pwm_lookup, ARRAY_SIZE(smdk6410_pwm_lookup)); - samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data); -} - -MACHINE_START(SMDK6410, "SMDK6410") - /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .atag_offset = 0x100, - .nr_irqs = S3C64XX_NR_IRQS, - .init_irq = s3c6410_init_irq, - .map_io = smdk6410_map_io, - .init_machine = smdk6410_machine_init, - .init_time = s3c64xx_timer_init, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-tct_hammer.c b/arch/arm/mach-s3c/mach-tct_hammer.c deleted file mode 100644 index 93ab1abd8bd3..000000000000 --- a/arch/arm/mach-s3c/mach-tct_hammer.c +++ /dev/null @@ -1,157 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2007 TinCanTools -// David Anders <danders@amltd.com> -// -// @History: -// derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by -// Ben Dooks <ben@simtec.co.uk> - -#include <linux/gpio/machine.h> -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/mach/flash.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/i2c-s3c2410.h> -#include "devs.h" -#include "cpu.h" - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/map.h> -#include <linux/mtd/physmap.h> - -#include "s3c24xx.h" - -static struct resource tct_hammer_nor_resource = - DEFINE_RES_MEM(0x00000000, SZ_16M); - -static struct mtd_partition tct_hammer_mtd_partitions[] = { - { - .name = "System", - .size = 0x240000, - .offset = 0, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, { - .name = "JFFS2", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - } -}; - -static struct physmap_flash_data tct_hammer_flash_data = { - .width = 2, - .parts = tct_hammer_mtd_partitions, - .nr_parts = ARRAY_SIZE(tct_hammer_mtd_partitions), -}; - -static struct platform_device tct_hammer_device_nor = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &tct_hammer_flash_data, - }, - .num_resources = 1, - .resource = &tct_hammer_nor_resource, -}; - -static struct map_desc tct_hammer_iodesc[] __initdata = { -}; - -#define UCON S3C2410_UCON_DEFAULT -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg tct_hammer_uartcfgs[] = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -static struct gpiod_lookup_table tct_hammer_mmc_gpio_table = { - .dev_id = "s3c2410-sdi", - .table = { - /* bus pins */ - GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct platform_device *tct_hammer_devices[] __initdata = { - &s3c_device_adc, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_ohci, - &s3c_device_rtc, - &s3c_device_usbgadget, - &s3c_device_sdi, - &tct_hammer_device_nor, -}; - -static void __init tct_hammer_map_io(void) -{ - s3c24xx_init_io(tct_hammer_iodesc, ARRAY_SIZE(tct_hammer_iodesc)); - s3c24xx_init_uarts(tct_hammer_uartcfgs, ARRAY_SIZE(tct_hammer_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init tct_hammer_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init tct_hammer_init(void) -{ - s3c_i2c0_set_platdata(NULL); - gpiod_add_lookup_table(&tct_hammer_mmc_gpio_table); - platform_add_devices(tct_hammer_devices, ARRAY_SIZE(tct_hammer_devices)); -} - -MACHINE_START(TCT_HAMMER, "TCT_HAMMER") - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .map_io = tct_hammer_map_io, - .init_irq = s3c2410_init_irq, - .init_machine = tct_hammer_init, - .init_time = tct_hammer_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-vr1000.c b/arch/arm/mach-s3c/mach-vr1000.c deleted file mode 100644 index c85033e6ef8f..000000000000 --- a/arch/arm/mach-s3c/mach-vr1000.c +++ /dev/null @@ -1,364 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2003-2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Machine support for Thorcom VR1000 board. Designed for Thorcom by -// Simtec Electronics, http://www.simtec.co.uk/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/gpio/machine.h> -#include <linux/dm9000.h> -#include <linux/i2c.h> - -#include <linux/serial.h> -#include <linux/tty.h> -#include <linux/serial_8250.h> -#include <linux/serial_reg.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/platform_data/leds-s3c24xx.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/asoc-s3c24xx_simtec.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include "cpu.h" -#include "devs.h" - -#include "bast.h" -#include "s3c24xx.h" -#include "simtec.h" -#include "vr1000.h" - -/* macros for virtual address mods for the io space entries */ -#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) -#define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4) -#define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3) -#define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2) - -/* macros to modify the physical addresses for io space */ - -#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2)) -#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3)) -#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4)) -#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5)) - -static struct map_desc vr1000_iodesc[] __initdata = { - /* ISA IO areas */ - { - .virtual = (u32)S3C24XX_VA_ISA_BYTE, - .pfn = PA_CS2(BAST_PA_ISAIO), - .length = SZ_16M, - .type = MT_DEVICE, - }, - - /* CPLD control registers, and external interrupt controls */ - { - .virtual = (u32)VR1000_VA_CTRL1, - .pfn = __phys_to_pfn(VR1000_PA_CTRL1), - .length = SZ_1M, - .type = MT_DEVICE, - }, { - .virtual = (u32)VR1000_VA_CTRL2, - .pfn = __phys_to_pfn(VR1000_PA_CTRL2), - .length = SZ_1M, - .type = MT_DEVICE, - }, { - .virtual = (u32)VR1000_VA_CTRL3, - .pfn = __phys_to_pfn(VR1000_PA_CTRL3), - .length = SZ_1M, - .type = MT_DEVICE, - }, { - .virtual = (u32)VR1000_VA_CTRL4, - .pfn = __phys_to_pfn(VR1000_PA_CTRL4), - .length = SZ_1M, - .type = MT_DEVICE, - }, -}; - -#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK -#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB -#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - }, - /* port 2 is not actually used */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, - } -}; - -/* definitions for the vr1000 extra 16550 serial ports */ - -#define VR1000_BAUDBASE (3692307) - -#define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5)) - -static struct plat_serial8250_port serial_platform_data[] = { - [0] = { - .mapbase = VR1000_SERIAL_MAPBASE(0), - .irq = VR1000_IRQ_SERIAL + 0, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = VR1000_BAUDBASE, - }, - [1] = { - .mapbase = VR1000_SERIAL_MAPBASE(1), - .irq = VR1000_IRQ_SERIAL + 1, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = VR1000_BAUDBASE, - }, - [2] = { - .mapbase = VR1000_SERIAL_MAPBASE(2), - .irq = VR1000_IRQ_SERIAL + 2, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = VR1000_BAUDBASE, - }, - [3] = { - .mapbase = VR1000_SERIAL_MAPBASE(3), - .irq = VR1000_IRQ_SERIAL + 3, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, - .iotype = UPIO_MEM, - .regshift = 0, - .uartclk = VR1000_BAUDBASE, - }, - { }, -}; - -static struct platform_device serial_device = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = serial_platform_data, - }, -}; - -/* DM9000 ethernet devices */ - -static struct resource vr1000_dm9k0_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4), - [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40), - [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \ - | IORESOURCE_IRQ_HIGHLEVEL), -}; - -static struct resource vr1000_dm9k1_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4), - [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40), - [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \ - | IORESOURCE_IRQ_HIGHLEVEL), -}; - -/* for the moment we limit ourselves to 16bit IO until some - * better IO routines can be written and tested -*/ - -static struct dm9000_plat_data vr1000_dm9k_platdata = { - .flags = DM9000_PLATF_16BITONLY, -}; - -static struct platform_device vr1000_dm9k0 = { - .name = "dm9000", - .id = 0, - .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource), - .resource = vr1000_dm9k0_resource, - .dev = { - .platform_data = &vr1000_dm9k_platdata, - } -}; - -static struct platform_device vr1000_dm9k1 = { - .name = "dm9000", - .id = 1, - .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource), - .resource = vr1000_dm9k1_resource, - .dev = { - .platform_data = &vr1000_dm9k_platdata, - } -}; - -/* LEDS */ - -static struct gpiod_lookup_table vr1000_led1_gpio_table = { - .dev_id = "s3c24xx_led.1", - .table = { - GPIO_LOOKUP("GPB", 0, NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table vr1000_led2_gpio_table = { - .dev_id = "s3c24xx_led.2", - .table = { - GPIO_LOOKUP("GPB", 1, NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table vr1000_led3_gpio_table = { - .dev_id = "s3c24xx_led.3", - .table = { - GPIO_LOOKUP("GPB", 2, NULL, GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct s3c24xx_led_platdata vr1000_led1_pdata = { - .name = "led1", - .def_trigger = "", -}; - -static struct s3c24xx_led_platdata vr1000_led2_pdata = { - .name = "led2", - .def_trigger = "", -}; - -static struct s3c24xx_led_platdata vr1000_led3_pdata = { - .name = "led3", - .def_trigger = "", -}; - -static struct platform_device vr1000_led1 = { - .name = "s3c24xx_led", - .id = 1, - .dev = { - .platform_data = &vr1000_led1_pdata, - }, -}; - -static struct platform_device vr1000_led2 = { - .name = "s3c24xx_led", - .id = 2, - .dev = { - .platform_data = &vr1000_led2_pdata, - }, -}; - -static struct platform_device vr1000_led3 = { - .name = "s3c24xx_led", - .id = 3, - .dev = { - .platform_data = &vr1000_led3_pdata, - }, -}; - -/* I2C devices. */ - -static struct i2c_board_info vr1000_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("tlv320aic23", 0x1a), - }, { - I2C_BOARD_INFO("tmp101", 0x48), - }, { - I2C_BOARD_INFO("m41st87", 0x68), - }, -}; - -/* devices for this board */ - -static struct platform_device *vr1000_devices[] __initdata = { - &s3c2410_device_dclk, - &s3c_device_ohci, - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_adc, - &serial_device, - &vr1000_dm9k0, - &vr1000_dm9k1, - &vr1000_led1, - &vr1000_led2, - &vr1000_led3, -}; - -static void vr1000_power_off(void) -{ - gpio_direction_output(S3C2410_GPB(9), 1); -} - -static void __init vr1000_map_io(void) -{ - pm_power_off = vr1000_power_off; - - s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc)); - s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init vr1000_init_time(void) -{ - s3c2410_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init vr1000_init(void) -{ - s3c_i2c0_set_platdata(NULL); - - /* Disable pull-up on LED lines and register GPIO lookups */ - s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_NONE); - s3c_gpio_setpull(S3C2410_GPB(2), S3C_GPIO_PULL_NONE); - gpiod_add_lookup_table(&vr1000_led1_gpio_table); - gpiod_add_lookup_table(&vr1000_led2_gpio_table); - gpiod_add_lookup_table(&vr1000_led3_gpio_table); - - platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices)); - - i2c_register_board_info(0, vr1000_i2c_devs, - ARRAY_SIZE(vr1000_i2c_devs)); - - nor_simtec_init(); - simtec_audio_add(NULL, true, NULL); - - WARN_ON(gpio_request(S3C2410_GPB(9), "power off")); -} - -MACHINE_START(VR1000, "Thorcom-VR1000") - /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2410, - .map_io = vr1000_map_io, - .init_machine = vr1000_init, - .init_irq = s3c2410_init_irq, - .init_time = vr1000_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/mach-vstms.c b/arch/arm/mach-s3c/mach-vstms.c deleted file mode 100644 index 6f878418be3e..000000000000 --- a/arch/arm/mach-s3c/mach-vstms.c +++ /dev/null @@ -1,166 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// (C) 2006 Thomas Gleixner <tglx@linutronix.de> -// -// Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand-ecc-sw-hamming.h> -#include <linux/mtd/partitions.h> -#include <linux/memblock.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/setup.h> -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include <linux/platform_data/fb-s3c2410.h> - -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/mtd-nand-s3c2410.h> - -#include "devs.h" -#include "cpu.h" - -#include "s3c24xx.h" - -static struct map_desc vstms_iodesc[] __initdata = { -}; - -static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - } -}; - -static struct mtd_partition __initdata vstms_nand_part[] = { - [0] = { - .name = "Boot Agent", - .size = 0x7C000, - .offset = 0, - }, - [1] = { - .name = "UBoot Config", - .offset = 0x7C000, - .size = 0x4000, - }, - [2] = { - .name = "Kernel", - .offset = 0x80000, - .size = 0x200000, - }, - [3] = { - .name = "RFS", - .offset = 0x280000, - .size = 0x3d80000, - }, -}; - -static struct s3c2410_nand_set __initdata vstms_nand_sets[] = { - [0] = { - .name = "NAND", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(vstms_nand_part), - .partitions = vstms_nand_part, - }, -}; - -/* choose a set of timings which should suit most 512Mbit - * chips and beyond. -*/ - -static struct s3c2410_platform_nand __initdata vstms_nand_info = { - .tacls = 20, - .twrph0 = 60, - .twrph1 = 20, - .nr_sets = ARRAY_SIZE(vstms_nand_sets), - .sets = vstms_nand_sets, - .engine_type = NAND_ECC_ENGINE_TYPE_SOFT, -}; - -static struct platform_device *vstms_devices[] __initdata = { - &s3c_device_ohci, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_rtc, - &s3c_device_nand, - &s3c2412_device_dma, -}; - -static void __init vstms_fixup(struct tag *tags, char **cmdline) -{ - if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) { - memblock_add(0x30000000, SZ_64M); - } -} - -static void __init vstms_map_io(void) -{ - s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc)); - s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs)); - s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); -} - -static void __init vstms_init_time(void) -{ - s3c2412_init_clocks(12000000); - s3c24xx_timer_init(); -} - -static void __init vstms_init(void) -{ - s3c_i2c0_set_platdata(NULL); - s3c_nand_set_platdata(&vstms_nand_info); - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices)); -} - -MACHINE_START(VSTMS, "VSTMS") - .atag_offset = 0x100, - .nr_irqs = NR_IRQS_S3C2412, - - .fixup = vstms_fixup, - .init_irq = s3c2412_init_irq, - .init_machine = vstms_init, - .map_io = vstms_map_io, - .init_time = vstms_init_time, -MACHINE_END diff --git a/arch/arm/mach-s3c/map-s3c.h b/arch/arm/mach-s3c/map-s3c.h index a18fdd3d6ae2..b5f5bdba384f 100644 --- a/arch/arm/mach-s3c/map-s3c.h +++ b/arch/arm/mach-s3c/map-s3c.h @@ -11,20 +11,6 @@ #include "map.h" -#define S3C24XX_VA_IRQ S3C_VA_IRQ -#define S3C24XX_VA_MEMCTRL S3C_VA_MEM -#define S3C24XX_VA_UART S3C_VA_UART - -#define S3C24XX_VA_TIMER S3C_VA_TIMER -#define S3C24XX_VA_CLKPWR S3C_VA_SYS -#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG - -#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) -#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000) - -#define S3C2410_PA_UART (0x50000000) -#define S3C24XX_PA_UART S3C2410_PA_UART - /* * GPIO ports * @@ -35,11 +21,6 @@ * 0xFA800000, which is not in the way of any current mapping * by the base system. */ - -#define S3C2410_PA_GPIO (0x56000000) -#define S3C24XX_PA_GPIO S3C2410_PA_GPIO - -#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) #define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000) #define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000) @@ -47,24 +28,6 @@ #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY -#define S3C2410_ADDR(x) S3C_ADDR(x) - -/* deal with the registers that move under the 2412/2413 */ - -#if defined(CONFIG_CPU_S3C2412) -#ifndef __ASSEMBLY__ -extern void __iomem *s3c24xx_va_gpio2; -#endif -#ifdef CONFIG_CPU_S3C2412_ONLY -#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) -#else -#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 -#endif -#else -#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO -#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO -#endif - #include "map-s5p.h" #endif /* __ASM_PLAT_MAP_S3C_H */ diff --git a/arch/arm/mach-s3c/map-s3c24xx.h b/arch/arm/mach-s3c/map-s3c24xx.h deleted file mode 100644 index f8d075b11d6f..000000000000 --- a/arch/arm/mach-s3c/map-s3c24xx.h +++ /dev/null @@ -1,159 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 - Memory map definitions - */ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H - -#include "map-base.h" -#include "map-s3c.h" - -/* - * interrupt controller is the first thing we put in, to make - * the assembly code for the irq detection easier - */ -#define S3C2410_PA_IRQ (0x4A000000) -#define S3C24XX_SZ_IRQ SZ_1M - -/* memory controller registers */ -#define S3C2410_PA_MEMCTRL (0x48000000) -#define S3C24XX_SZ_MEMCTRL SZ_1M - -/* Timers */ -#define S3C2410_PA_TIMER (0x51000000) -#define S3C24XX_SZ_TIMER SZ_1M - -/* Clock and Power management */ -#define S3C24XX_SZ_CLKPWR SZ_1M - -/* USB Device port */ -#define S3C2410_PA_USBDEV (0x52000000) -#define S3C24XX_SZ_USBDEV SZ_1M - -/* Watchdog */ -#define S3C2410_PA_WATCHDOG (0x53000000) -#define S3C24XX_SZ_WATCHDOG SZ_1M - -/* Standard size definitions for peripheral blocks. */ - -#define S3C24XX_SZ_UART SZ_1M -#define S3C24XX_SZ_IIS SZ_1M -#define S3C24XX_SZ_ADC SZ_1M -#define S3C24XX_SZ_SPI SZ_1M -#define S3C24XX_SZ_SDI SZ_1M -#define S3C24XX_SZ_NAND SZ_1M -#define S3C24XX_SZ_GPIO SZ_1M - -/* USB host controller */ -#define S3C2410_PA_USBHOST (0x49000000) - -/* S3C2416/S3C2443/S3C2450 High-Speed USB Gadget */ -#define S3C2416_PA_HSUDC (0x49800000) -#define S3C2416_SZ_HSUDC (SZ_4K) - -/* DMA controller */ -#define S3C2410_PA_DMA (0x4B000000) -#define S3C24XX_SZ_DMA SZ_1M - -/* Clock and Power management */ -#define S3C2410_PA_CLKPWR (0x4C000000) - -/* LCD controller */ -#define S3C2410_PA_LCD (0x4D000000) -#define S3C24XX_SZ_LCD SZ_1M - -/* NAND flash controller */ -#define S3C2410_PA_NAND (0x4E000000) - -/* IIC hardware controller */ -#define S3C2410_PA_IIC (0x54000000) - -/* IIS controller */ -#define S3C2410_PA_IIS (0x55000000) - -/* RTC */ -#define S3C2410_PA_RTC (0x57000000) -#define S3C24XX_SZ_RTC SZ_1M - -/* ADC */ -#define S3C2410_PA_ADC (0x58000000) - -/* SPI */ -#define S3C2410_PA_SPI (0x59000000) -#define S3C2443_PA_SPI0 (0x52000000) -#define S3C2443_PA_SPI1 S3C2410_PA_SPI -#define S3C2410_SPI1 (0x20) -#define S3C2412_SPI1 (0x100) - -/* SDI */ -#define S3C2410_PA_SDI (0x5A000000) - -/* CAMIF */ -#define S3C2440_PA_CAMIF (0x4F000000) -#define S3C2440_SZ_CAMIF SZ_1M - -/* AC97 */ - -#define S3C2440_PA_AC97 (0x5B000000) -#define S3C2440_SZ_AC97 SZ_1M - -/* S3C2443/S3C2416 High-speed SD/MMC */ -#define S3C2443_PA_HSMMC (0x4A800000) -#define S3C2416_PA_HSMMC0 (0x4AC00000) - -#define S3C2443_PA_FB (0x4C800000) - -/* S3C2412 memory and IO controls */ -#define S3C2412_PA_SSMC (0x4F000000) - -#define S3C2412_PA_EBI (0x48800000) - -/* physical addresses of all the chip-select areas */ - -#define S3C2410_CS0 (0x00000000) -#define S3C2410_CS1 (0x08000000) -#define S3C2410_CS2 (0x10000000) -#define S3C2410_CS3 (0x18000000) -#define S3C2410_CS4 (0x20000000) -#define S3C2410_CS5 (0x28000000) -#define S3C2410_CS6 (0x30000000) -#define S3C2410_CS7 (0x38000000) - -#define S3C2410_SDRAM_PA (S3C2410_CS6) - -/* Use a single interface for common resources between S3C24XX cpus */ - -#define S3C24XX_PA_IRQ S3C2410_PA_IRQ -#define S3C24XX_PA_MEMCTRL S3C2410_PA_MEMCTRL -#define S3C24XX_PA_DMA S3C2410_PA_DMA -#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR -#define S3C24XX_PA_LCD S3C2410_PA_LCD -#define S3C24XX_PA_TIMER S3C2410_PA_TIMER -#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV -#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG -#define S3C24XX_PA_IIS S3C2410_PA_IIS -#define S3C24XX_PA_RTC S3C2410_PA_RTC -#define S3C24XX_PA_ADC S3C2410_PA_ADC -#define S3C24XX_PA_SPI S3C2410_PA_SPI -#define S3C24XX_PA_SPI1 (S3C2410_PA_SPI + S3C2410_SPI1) -#define S3C24XX_PA_SDI S3C2410_PA_SDI -#define S3C24XX_PA_NAND S3C2410_PA_NAND - -#define S3C_PA_FB S3C2443_PA_FB -#define S3C_PA_IIC S3C2410_PA_IIC -#define S3C_PA_USBHOST S3C2410_PA_USBHOST -#define S3C_PA_HSMMC0 S3C2416_PA_HSMMC0 -#define S3C_PA_HSMMC1 S3C2443_PA_HSMMC -#define S3C_PA_WDT S3C2410_PA_WATCHDOG -#define S3C_PA_NAND S3C24XX_PA_NAND - -#define S3C_PA_SPI0 S3C2443_PA_SPI0 -#define S3C_PA_SPI1 S3C2443_PA_SPI1 - -#define SAMSUNG_PA_TIMER S3C2410_PA_TIMER - -#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s3c/map.h b/arch/arm/mach-s3c/map.h index 7cfb517d4886..778d6f81cb2b 100644 --- a/arch/arm/mach-s3c/map.h +++ b/arch/arm/mach-s3c/map.h @@ -1,9 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ - -#ifdef CONFIG_ARCH_S3C24XX -#include "map-s3c24xx.h" -#endif - -#ifdef CONFIG_ARCH_S3C64XX #include "map-s3c64xx.h" -#endif diff --git a/arch/arm/mach-s3c/nand-core-s3c24xx.h b/arch/arm/mach-s3c/nand-core-s3c24xx.h deleted file mode 100644 index a14316729c48..000000000000 --- a/arch/arm/mach-s3c/nand-core-s3c24xx.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S3C - Nand Controller core functions - */ - -#ifndef __ASM_ARCH_NAND_CORE_S3C24XX_H -#define __ASM_ARCH_NAND_CORE_S3C24XX_H __FILE__ - -/* These functions are only for use with the core support code, such as - * the cpu specific initialisation code - */ - -/* re-define device name depending on support. */ -static inline void s3c_nand_setname(char *name) -{ -#ifdef CONFIG_S3C_DEV_NAND - s3c_device_nand.name = name; -#endif -} - -#endif /* __ASM_ARCH_NAND_CORE_S3C24XX_H */ diff --git a/arch/arm/mach-s3c/onenand-core-s3c64xx.h b/arch/arm/mach-s3c/onenand-core-s3c64xx.h deleted file mode 100644 index e2dfdd1fec93..000000000000 --- a/arch/arm/mach-s3c/onenand-core-s3c64xx.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010 Samsung Electronics - * Kyungmin Park <kyungmin.park@samsung.com> - * Marek Szyprowski <m.szyprowski@samsung.com> - * - * Samsung OneNAD Controller core functions - */ - -#ifndef __ASM_ARCH_ONENAND_CORE_S3C64XX_H -#define __ASM_ARCH_ONENAND_CORE_S3C64XX_H __FILE__ - -/* These functions are only for use with the core support code, such as - * the cpu specific initialisation code - */ - -/* re-define device name depending on support. */ -static inline void s3c_onenand_setname(char *name) -{ -#ifdef CONFIG_S3C_DEV_ONENAND - s3c_device_onenand.name = name; -#endif -} - -static inline void s3c64xx_onenand1_setname(char *name) -{ -#ifdef CONFIG_S3C64XX_DEV_ONENAND1 - s3c64xx_device_onenand1.name = name; -#endif -} - -#endif /* __ASM_ARCH_ONENAND_CORE_S3C64XX_H */ diff --git a/arch/arm/mach-s3c/osiris.h b/arch/arm/mach-s3c/osiris.h deleted file mode 100644 index b6c9c5ed2ba7..000000000000 --- a/arch/arm/mach-s3c/osiris.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks <ben@simtec.co.uk> - * - * OSIRIS - CPLD control constants - * OSIRIS - Memory map definitions - */ - -#ifndef __MACH_S3C24XX_OSIRIS_H -#define __MACH_S3C24XX_OSIRIS_H __FILE__ - -/* CTRL0 - NAND WP control */ - -#define OSIRIS_CTRL0_NANDSEL (0x3) -#define OSIRIS_CTRL0_BOOT_INT (1<<3) -#define OSIRIS_CTRL0_PCMCIA (1<<4) -#define OSIRIS_CTRL0_FIX8 (1<<5) -#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) -#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) - -#define OSIRIS_CTRL1_FIX8 (1<<0) - -#define OSIRIS_ID_REVMASK (0x7) - -/* start peripherals off after the S3C2410 */ - -#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000)) - -#define OSIRIS_PA_CPLD (S3C2410_CS1 | (1<<26)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) -#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) - -#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) -#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) - -#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) -#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) - -#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) -#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) - -#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) -#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) - -#endif /* __MACH_S3C24XX_OSIRIS_H */ diff --git a/arch/arm/mach-s3c/otom.h b/arch/arm/mach-s3c/otom.h deleted file mode 100644 index c800f67d03d4..000000000000 --- a/arch/arm/mach-s3c/otom.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * (c) 2005 Guillaume GOURAT / NexVision - * guillaume.gourat@nexvision.fr - * - * NexVision OTOM board memory map definitions - */ - -/* - * ok, we've used up to 0x01300000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. - */ - -#ifndef __MACH_S3C24XX_OTOM_H -#define __MACH_S3C24XX_OTOM_H __FILE__ - -#define OTOM_PA_CS8900A_BASE (S3C2410_CS3 + 0x01000000) /* nGCS3 +0x01000000 */ -#define OTOM_VA_CS8900A_BASE S3C2410_ADDR(0x04000000) /* 0xF4000000 */ - -/* physical offset addresses for the peripherals */ - -#define OTOM_PA_FLASH0_BASE (S3C2410_CS0) - -#endif /* __MACH_S3C24XX_OTOM_H */ diff --git a/arch/arm/mach-s3c/pll-s3c2410.c b/arch/arm/mach-s3c/pll-s3c2410.c deleted file mode 100644 index 3fbc99eaa4a2..000000000000 --- a/arch/arm/mach-s3c/pll-s3c2410.c +++ /dev/null @@ -1,83 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2006-2007 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// Vincent Sanders <vince@arm.linux.org.uk> -// -// S3C2410 CPU PLL tables - -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/device.h> -#include <linux/list.h> -#include <linux/clk.h> -#include <linux/err.h> - -#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include <linux/soc/samsung/s3c-pm.h> - -/* This array should be sorted in ascending order of the frequencies */ -static struct cpufreq_frequency_table pll_vals_12MHz[] = { - { .frequency = 34000000, .driver_data = PLLVAL(82, 2, 3), }, - { .frequency = 45000000, .driver_data = PLLVAL(82, 1, 3), }, - { .frequency = 48000000, .driver_data = PLLVAL(120, 2, 3), }, - { .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), }, - { .frequency = 56000000, .driver_data = PLLVAL(142, 2, 3), }, - { .frequency = 68000000, .driver_data = PLLVAL(82, 2, 2), }, - { .frequency = 79000000, .driver_data = PLLVAL(71, 1, 2), }, - { .frequency = 85000000, .driver_data = PLLVAL(105, 2, 2), }, - { .frequency = 90000000, .driver_data = PLLVAL(112, 2, 2), }, - { .frequency = 101000000, .driver_data = PLLVAL(127, 2, 2), }, - { .frequency = 113000000, .driver_data = PLLVAL(105, 1, 2), }, - { .frequency = 118000000, .driver_data = PLLVAL(150, 2, 2), }, - { .frequency = 124000000, .driver_data = PLLVAL(116, 1, 2), }, - { .frequency = 135000000, .driver_data = PLLVAL(82, 2, 1), }, - { .frequency = 147000000, .driver_data = PLLVAL(90, 2, 1), }, - { .frequency = 152000000, .driver_data = PLLVAL(68, 1, 1), }, - { .frequency = 158000000, .driver_data = PLLVAL(71, 1, 1), }, - { .frequency = 170000000, .driver_data = PLLVAL(77, 1, 1), }, - { .frequency = 180000000, .driver_data = PLLVAL(82, 1, 1), }, - { .frequency = 186000000, .driver_data = PLLVAL(85, 1, 1), }, - { .frequency = 192000000, .driver_data = PLLVAL(88, 1, 1), }, - { .frequency = 203000000, .driver_data = PLLVAL(161, 3, 1), }, - - /* 2410A extras */ - - { .frequency = 210000000, .driver_data = PLLVAL(132, 2, 1), }, - { .frequency = 226000000, .driver_data = PLLVAL(105, 1, 1), }, - { .frequency = 266000000, .driver_data = PLLVAL(125, 1, 1), }, - { .frequency = 268000000, .driver_data = PLLVAL(126, 1, 1), }, - { .frequency = 270000000, .driver_data = PLLVAL(127, 1, 1), }, -}; - -static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif) -{ - return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz)); -} - -static struct subsys_interface s3c2410_plls_interface = { - .name = "s3c2410_plls", - .subsys = &s3c2410_subsys, - .add_dev = s3c2410_plls_add, -}; - -static int __init s3c2410_pll_init(void) -{ - return subsys_interface_register(&s3c2410_plls_interface); - -} -arch_initcall(s3c2410_pll_init); - -static struct subsys_interface s3c2410a_plls_interface = { - .name = "s3c2410a_plls", - .subsys = &s3c2410a_subsys, - .add_dev = s3c2410_plls_add, -}; - -static int __init s3c2410a_pll_init(void) -{ - return subsys_interface_register(&s3c2410a_plls_interface); -} -arch_initcall(s3c2410a_pll_init); diff --git a/arch/arm/mach-s3c/pll-s3c2440-12000000.c b/arch/arm/mach-s3c/pll-s3c2440-12000000.c deleted file mode 100644 index fdb8e8c2fe3b..000000000000 --- a/arch/arm/mach-s3c/pll-s3c2440-12000000.c +++ /dev/null @@ -1,95 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006-2007 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// Vincent Sanders <vince@arm.linux.org.uk> -// -// S3C2440/S3C2442 CPU PLL tables (12MHz Crystal) - -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/clk.h> -#include <linux/err.h> - -#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include <linux/soc/samsung/s3c-pm.h> - -/* This array should be sorted in ascending order of the frequencies */ -static struct cpufreq_frequency_table s3c2440_plls_12[] = { - { .frequency = 75000000, .driver_data = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */ - { .frequency = 80000000, .driver_data = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */ - { .frequency = 90000000, .driver_data = PLLVAL(0x70, 2, 3), }, /* FVco 720.000000 */ - { .frequency = 100000000, .driver_data = PLLVAL(0x5c, 1, 3), }, /* FVco 800.000000 */ - { .frequency = 110000000, .driver_data = PLLVAL(0x66, 1, 3), }, /* FVco 880.000000 */ - { .frequency = 120000000, .driver_data = PLLVAL(0x70, 1, 3), }, /* FVco 960.000000 */ - { .frequency = 150000000, .driver_data = PLLVAL(0x75, 3, 2), }, /* FVco 600.000000 */ - { .frequency = 160000000, .driver_data = PLLVAL(0x98, 4, 2), }, /* FVco 640.000000 */ - { .frequency = 170000000, .driver_data = PLLVAL(0x4d, 1, 2), }, /* FVco 680.000000 */ - { .frequency = 180000000, .driver_data = PLLVAL(0x70, 2, 2), }, /* FVco 720.000000 */ - { .frequency = 190000000, .driver_data = PLLVAL(0x57, 1, 2), }, /* FVco 760.000000 */ - { .frequency = 200000000, .driver_data = PLLVAL(0x5c, 1, 2), }, /* FVco 800.000000 */ - { .frequency = 210000000, .driver_data = PLLVAL(0x84, 2, 2), }, /* FVco 840.000000 */ - { .frequency = 220000000, .driver_data = PLLVAL(0x66, 1, 2), }, /* FVco 880.000000 */ - { .frequency = 230000000, .driver_data = PLLVAL(0x6b, 1, 2), }, /* FVco 920.000000 */ - { .frequency = 240000000, .driver_data = PLLVAL(0x70, 1, 2), }, /* FVco 960.000000 */ - { .frequency = 300000000, .driver_data = PLLVAL(0x75, 3, 1), }, /* FVco 600.000000 */ - { .frequency = 310000000, .driver_data = PLLVAL(0x93, 4, 1), }, /* FVco 620.000000 */ - { .frequency = 320000000, .driver_data = PLLVAL(0x98, 4, 1), }, /* FVco 640.000000 */ - { .frequency = 330000000, .driver_data = PLLVAL(0x66, 2, 1), }, /* FVco 660.000000 */ - { .frequency = 340000000, .driver_data = PLLVAL(0x4d, 1, 1), }, /* FVco 680.000000 */ - { .frequency = 350000000, .driver_data = PLLVAL(0xa7, 4, 1), }, /* FVco 700.000000 */ - { .frequency = 360000000, .driver_data = PLLVAL(0x70, 2, 1), }, /* FVco 720.000000 */ - { .frequency = 370000000, .driver_data = PLLVAL(0xb1, 4, 1), }, /* FVco 740.000000 */ - { .frequency = 380000000, .driver_data = PLLVAL(0x57, 1, 1), }, /* FVco 760.000000 */ - { .frequency = 390000000, .driver_data = PLLVAL(0x7a, 2, 1), }, /* FVco 780.000000 */ - { .frequency = 400000000, .driver_data = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */ -}; - -static int s3c2440_plls12_add(struct device *dev, struct subsys_interface *sif) -{ - struct clk *xtal_clk; - unsigned long xtal; - - xtal_clk = clk_get(NULL, "xtal"); - if (IS_ERR(xtal_clk)) - return PTR_ERR(xtal_clk); - - xtal = clk_get_rate(xtal_clk); - clk_put(xtal_clk); - - if (xtal == 12000000) { - printk(KERN_INFO "Using PLL table for 12MHz crystal\n"); - return s3c_plltab_register(s3c2440_plls_12, - ARRAY_SIZE(s3c2440_plls_12)); - } - - return 0; -} - -static struct subsys_interface s3c2440_plls12_interface = { - .name = "s3c2440_plls12", - .subsys = &s3c2440_subsys, - .add_dev = s3c2440_plls12_add, -}; - -static int __init s3c2440_pll_12mhz(void) -{ - return subsys_interface_register(&s3c2440_plls12_interface); - -} -arch_initcall(s3c2440_pll_12mhz); - -static struct subsys_interface s3c2442_plls12_interface = { - .name = "s3c2442_plls12", - .subsys = &s3c2442_subsys, - .add_dev = s3c2440_plls12_add, -}; - -static int __init s3c2442_pll_12mhz(void) -{ - return subsys_interface_register(&s3c2442_plls12_interface); - -} -arch_initcall(s3c2442_pll_12mhz); diff --git a/arch/arm/mach-s3c/pll-s3c2440-16934400.c b/arch/arm/mach-s3c/pll-s3c2440-16934400.c deleted file mode 100644 index 438b6fc099a4..000000000000 --- a/arch/arm/mach-s3c/pll-s3c2440-16934400.c +++ /dev/null @@ -1,122 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006-2008 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// Vincent Sanders <vince@arm.linux.org.uk> -// -// S3C2440/S3C2442 CPU PLL tables (16.93444MHz Crystal) - -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/clk.h> -#include <linux/err.h> - -#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include <linux/soc/samsung/s3c-pm.h> - -/* This array should be sorted in ascending order of the frequencies */ -static struct cpufreq_frequency_table s3c2440_plls_169344[] = { - { .frequency = 78019200, .driver_data = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */ - { .frequency = 84067200, .driver_data = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */ - { .frequency = 90115200, .driver_data = PLLVAL(141, 5, 3), }, /* FVco 720.921600 */ - { .frequency = 96163200, .driver_data = PLLVAL(151, 5, 3), }, /* FVco 769.305600 */ - { .frequency = 102135600, .driver_data = PLLVAL(185, 6, 3), }, /* FVco 817.084800 */ - { .frequency = 108259200, .driver_data = PLLVAL(171, 5, 3), }, /* FVco 866.073600 */ - { .frequency = 114307200, .driver_data = PLLVAL(127, 3, 3), }, /* FVco 914.457600 */ - { .frequency = 120234240, .driver_data = PLLVAL(134, 3, 3), }, /* FVco 961.873920 */ - { .frequency = 126161280, .driver_data = PLLVAL(141, 3, 3), }, /* FVco 1009.290240 */ - { .frequency = 132088320, .driver_data = PLLVAL(148, 3, 3), }, /* FVco 1056.706560 */ - { .frequency = 138015360, .driver_data = PLLVAL(155, 3, 3), }, /* FVco 1104.122880 */ - { .frequency = 144789120, .driver_data = PLLVAL(163, 3, 3), }, /* FVco 1158.312960 */ - { .frequency = 150100363, .driver_data = PLLVAL(187, 9, 2), }, /* FVco 600.401454 */ - { .frequency = 156038400, .driver_data = PLLVAL(121, 5, 2), }, /* FVco 624.153600 */ - { .frequency = 162086400, .driver_data = PLLVAL(126, 5, 2), }, /* FVco 648.345600 */ - { .frequency = 168134400, .driver_data = PLLVAL(131, 5, 2), }, /* FVco 672.537600 */ - { .frequency = 174048000, .driver_data = PLLVAL(177, 7, 2), }, /* FVco 696.192000 */ - { .frequency = 180230400, .driver_data = PLLVAL(141, 5, 2), }, /* FVco 720.921600 */ - { .frequency = 186278400, .driver_data = PLLVAL(124, 4, 2), }, /* FVco 745.113600 */ - { .frequency = 192326400, .driver_data = PLLVAL(151, 5, 2), }, /* FVco 769.305600 */ - { .frequency = 198132480, .driver_data = PLLVAL(109, 3, 2), }, /* FVco 792.529920 */ - { .frequency = 204271200, .driver_data = PLLVAL(185, 6, 2), }, /* FVco 817.084800 */ - { .frequency = 210268800, .driver_data = PLLVAL(141, 4, 2), }, /* FVco 841.075200 */ - { .frequency = 216518400, .driver_data = PLLVAL(171, 5, 2), }, /* FVco 866.073600 */ - { .frequency = 222264000, .driver_data = PLLVAL(97, 2, 2), }, /* FVco 889.056000 */ - { .frequency = 228614400, .driver_data = PLLVAL(127, 3, 2), }, /* FVco 914.457600 */ - { .frequency = 234259200, .driver_data = PLLVAL(158, 4, 2), }, /* FVco 937.036800 */ - { .frequency = 240468480, .driver_data = PLLVAL(134, 3, 2), }, /* FVco 961.873920 */ - { .frequency = 246960000, .driver_data = PLLVAL(167, 4, 2), }, /* FVco 987.840000 */ - { .frequency = 252322560, .driver_data = PLLVAL(141, 3, 2), }, /* FVco 1009.290240 */ - { .frequency = 258249600, .driver_data = PLLVAL(114, 2, 2), }, /* FVco 1032.998400 */ - { .frequency = 264176640, .driver_data = PLLVAL(148, 3, 2), }, /* FVco 1056.706560 */ - { .frequency = 270950400, .driver_data = PLLVAL(120, 2, 2), }, /* FVco 1083.801600 */ - { .frequency = 276030720, .driver_data = PLLVAL(155, 3, 2), }, /* FVco 1104.122880 */ - { .frequency = 282240000, .driver_data = PLLVAL(92, 1, 2), }, /* FVco 1128.960000 */ - { .frequency = 289578240, .driver_data = PLLVAL(163, 3, 2), }, /* FVco 1158.312960 */ - { .frequency = 294235200, .driver_data = PLLVAL(131, 2, 2), }, /* FVco 1176.940800 */ - { .frequency = 300200727, .driver_data = PLLVAL(187, 9, 1), }, /* FVco 600.401454 */ - { .frequency = 306358690, .driver_data = PLLVAL(191, 9, 1), }, /* FVco 612.717380 */ - { .frequency = 312076800, .driver_data = PLLVAL(121, 5, 1), }, /* FVco 624.153600 */ - { .frequency = 318366720, .driver_data = PLLVAL(86, 3, 1), }, /* FVco 636.733440 */ - { .frequency = 324172800, .driver_data = PLLVAL(126, 5, 1), }, /* FVco 648.345600 */ - { .frequency = 330220800, .driver_data = PLLVAL(109, 4, 1), }, /* FVco 660.441600 */ - { .frequency = 336268800, .driver_data = PLLVAL(131, 5, 1), }, /* FVco 672.537600 */ - { .frequency = 342074880, .driver_data = PLLVAL(93, 3, 1), }, /* FVco 684.149760 */ - { .frequency = 348096000, .driver_data = PLLVAL(177, 7, 1), }, /* FVco 696.192000 */ - { .frequency = 355622400, .driver_data = PLLVAL(118, 4, 1), }, /* FVco 711.244800 */ - { .frequency = 360460800, .driver_data = PLLVAL(141, 5, 1), }, /* FVco 720.921600 */ - { .frequency = 366206400, .driver_data = PLLVAL(165, 6, 1), }, /* FVco 732.412800 */ - { .frequency = 372556800, .driver_data = PLLVAL(124, 4, 1), }, /* FVco 745.113600 */ - { .frequency = 378201600, .driver_data = PLLVAL(126, 4, 1), }, /* FVco 756.403200 */ - { .frequency = 384652800, .driver_data = PLLVAL(151, 5, 1), }, /* FVco 769.305600 */ - { .frequency = 391608000, .driver_data = PLLVAL(177, 6, 1), }, /* FVco 783.216000 */ - { .frequency = 396264960, .driver_data = PLLVAL(109, 3, 1), }, /* FVco 792.529920 */ - { .frequency = 402192000, .driver_data = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */ -}; - -static int s3c2440_plls169344_add(struct device *dev, - struct subsys_interface *sif) -{ - struct clk *xtal_clk; - unsigned long xtal; - - xtal_clk = clk_get(NULL, "xtal"); - if (IS_ERR(xtal_clk)) - return PTR_ERR(xtal_clk); - - xtal = clk_get_rate(xtal_clk); - clk_put(xtal_clk); - - if (xtal == 169344000) { - printk(KERN_INFO "Using PLL table for 16.9344MHz crystal\n"); - return s3c_plltab_register(s3c2440_plls_169344, - ARRAY_SIZE(s3c2440_plls_169344)); - } - - return 0; -} - -static struct subsys_interface s3c2440_plls169344_interface = { - .name = "s3c2440_plls169344", - .subsys = &s3c2440_subsys, - .add_dev = s3c2440_plls169344_add, -}; - -static int __init s3c2440_pll_16934400(void) -{ - return subsys_interface_register(&s3c2440_plls169344_interface); -} -arch_initcall(s3c2440_pll_16934400); - -static struct subsys_interface s3c2442_plls169344_interface = { - .name = "s3c2442_plls169344", - .subsys = &s3c2442_subsys, - .add_dev = s3c2440_plls169344_add, -}; - -static int __init s3c2442_pll_16934400(void) -{ - return subsys_interface_register(&s3c2442_plls169344_interface); -} -arch_initcall(s3c2442_pll_16934400); diff --git a/arch/arm/mach-s3c/pm-core-s3c24xx.h b/arch/arm/mach-s3c/pm-core-s3c24xx.h deleted file mode 100644 index a71ed5711019..000000000000 --- a/arch/arm/mach-s3c/pm-core-s3c24xx.h +++ /dev/null @@ -1,96 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C24xx - PM core support for arch/arm/plat-s3c/pm.c - */ - -#include <linux/delay.h> -#include <linux/io.h> - -#include "regs-clock.h" -#include "regs-irq-s3c24xx.h" -#include "irqs.h" - -static inline void s3c_pm_debug_init_uart(void) -{ -#ifdef CONFIG_SAMSUNG_PM_DEBUG - unsigned long tmp = __raw_readl(S3C2410_CLKCON); - - /* re-start uart clocks */ - tmp |= S3C2410_CLKCON_UART0; - tmp |= S3C2410_CLKCON_UART1; - tmp |= S3C2410_CLKCON_UART2; - - __raw_writel(tmp, S3C2410_CLKCON); - udelay(10); -#endif -} - -static inline void s3c_pm_arch_prepare_irqs(void) -{ - __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); - __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK); - - /* ack any outstanding external interrupts before we go to sleep */ - - __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND); - __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND); - __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND); - -} - -static inline void s3c_pm_arch_stop_clocks(void) -{ - __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ -} - -/* s3c2410_pm_show_resume_irqs - * - * print any IRQs asserted at resume time (ie, we woke from) -*/ -static inline void s3c_pm_show_resume_irqs(int start, unsigned long which, - unsigned long mask) -{ - int i; - - which &= ~mask; - - for (i = 0; i <= 31; i++) { - if (which & (1L<<i)) { - S3C_PMDBG("IRQ %d asserted at resume\n", start+i); - } - } -} - -static inline void s3c_pm_arch_show_resume_irqs(void) -{ - S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n", - __raw_readl(S3C2410_SRCPND), - __raw_readl(S3C2410_EINTPEND)); - - s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND), - s3c_irqwake_intmask); - - s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), - s3c_irqwake_eintmask); -} - -static inline void s3c_pm_restored_gpios(void) { } -static inline void samsung_pm_saved_gpios(void) { } - -/* state for IRQs over sleep */ - -/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources - * - * set bit to 1 in allow bitfield to enable the wakeup settings on it -*/ -#ifdef CONFIG_PM_SLEEP -#define s3c_irqwake_intallow (1L << 30 | 0xfL) -#define s3c_irqwake_eintallow (0x0000fff0L) -#else -#define s3c_irqwake_eintallow 0 -#define s3c_irqwake_intallow 0 -#endif diff --git a/arch/arm/mach-s3c/pm-core-s3c64xx.h b/arch/arm/mach-s3c/pm-core-s3c64xx.h index 06f564e5cf63..24933c4ea1a2 100644 --- a/arch/arm/mach-s3c/pm-core-s3c64xx.h +++ b/arch/arm/mach-s3c/pm-core-s3c64xx.h @@ -20,23 +20,6 @@ static inline void s3c_pm_debug_init_uart(void) { -#ifdef CONFIG_SAMSUNG_PM_DEBUG - u32 tmp = __raw_readl(S3C_PCLK_GATE); - - /* As a note, since the S3C64XX UARTs generally have multiple - * clock sources, we simply enable PCLK at the moment and hope - * that the resume settings for the UART are suitable for the - * use with PCLK. - */ - - tmp |= S3C_CLKCON_PCLK_UART0; - tmp |= S3C_CLKCON_PCLK_UART1; - tmp |= S3C_CLKCON_PCLK_UART2; - tmp |= S3C_CLKCON_PCLK_UART3; - - __raw_writel(tmp, S3C_PCLK_GATE); - udelay(10); -#endif } static inline void s3c_pm_arch_prepare_irqs(void) diff --git a/arch/arm/mach-s3c/pm-core.h b/arch/arm/mach-s3c/pm-core.h index b0e1d277f599..3e0c2df79120 100644 --- a/arch/arm/mach-s3c/pm-core.h +++ b/arch/arm/mach-s3c/pm-core.h @@ -1,9 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ - -#ifdef CONFIG_ARCH_S3C24XX -#include "pm-core-s3c24xx.h" -#endif - -#ifdef CONFIG_ARCH_S3C64XX #include "pm-core-s3c64xx.h" -#endif diff --git a/arch/arm/mach-s3c/pm-h1940.S b/arch/arm/mach-s3c/pm-h1940.S deleted file mode 100644 index 3bf6685123cb..000000000000 --- a/arch/arm/mach-s3c/pm-h1940.S +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2006 Ben Dooks <ben-linux@fluff.org> - * - * H1940 Suspend to RAM - */ - -#include <linux/linkage.h> -#include <asm/assembler.h> -#include "map.h" - -#include "regs-gpio.h" - - .text - .global h1940_pm_return - -h1940_pm_return: - mov r0, #S3C2410_PA_GPIO - ldr pc, [r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO] diff --git a/arch/arm/mach-s3c/pm-s3c2410.c b/arch/arm/mach-s3c/pm-s3c2410.c deleted file mode 100644 index a66419883735..000000000000 --- a/arch/arm/mach-s3c/pm-s3c2410.c +++ /dev/null @@ -1,170 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2006 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support - -#include <linux/init.h> -#include <linux/suspend.h> -#include <linux/errno.h> -#include <linux/time.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/gpio.h> -#include <linux/io.h> - -#include <asm/mach-types.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" - -#include "gpio-cfg.h" -#include "cpu.h" -#include "pm.h" - -#include "h1940.h" - -static void s3c2410_pm_prepare(void) -{ - /* ensure at least GSTATUS3 has the resume address */ - - __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2410_GSTATUS3); - - S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3)); - S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4)); - - if (machine_is_h1940()) { - void *base = phys_to_virt(H1940_SUSPEND_CHECK); - unsigned long ptr; - unsigned long calc = 0; - - /* generate check for the bootloader to check on resume */ - - for (ptr = 0; ptr < 0x40000; ptr += 0x400) - calc += __raw_readl(base+ptr); - - __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); - } - - /* RX3715 and RX1950 use similar to H1940 code and the - * same offsets for resume and checksum pointers */ - - if (machine_is_rx3715() || machine_is_rx1950()) { - void *base = phys_to_virt(H1940_SUSPEND_CHECK); - unsigned long ptr; - unsigned long calc = 0; - - /* generate check for the bootloader to check on resume */ - - for (ptr = 0; ptr < 0x40000; ptr += 0x4) - calc += __raw_readl(base+ptr); - - __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); - } - - if (machine_is_aml_m5900()) { - gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_HIGH, NULL); - gpio_free(S3C2410_GPF(2)); - } - - if (machine_is_rx1950()) { - /* According to S3C2442 user's manual, page 7-17, - * when the system is operating in NAND boot mode, - * the hardware pin configuration - EINT[23:21] – - * must be set as input for starting up after - * wakeup from sleep mode - */ - s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT); - } -} - -static void s3c2410_pm_resume(void) -{ - unsigned long tmp; - - /* unset the return-from-sleep flag, to ensure reset */ - - tmp = __raw_readl(S3C2410_GSTATUS2); - tmp &= S3C2410_GSTATUS2_OFFRESET; - __raw_writel(tmp, S3C2410_GSTATUS2); - - if (machine_is_aml_m5900()) { - gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL); - gpio_free(S3C2410_GPF(2)); - } -} - -struct syscore_ops s3c2410_pm_syscore_ops = { - .resume = s3c2410_pm_resume, -}; - -static int s3c2410_pm_add(struct device *dev, struct subsys_interface *sif) -{ - pm_cpu_prep = s3c2410_pm_prepare; - pm_cpu_sleep = s3c2410_cpu_suspend; - - return 0; -} - -#if defined(CONFIG_CPU_S3C2410) -static struct subsys_interface s3c2410_pm_interface = { - .name = "s3c2410_pm", - .subsys = &s3c2410_subsys, - .add_dev = s3c2410_pm_add, -}; - -/* register ourselves */ - -static int __init s3c2410_pm_drvinit(void) -{ - return subsys_interface_register(&s3c2410_pm_interface); -} - -arch_initcall(s3c2410_pm_drvinit); - -static struct subsys_interface s3c2410a_pm_interface = { - .name = "s3c2410a_pm", - .subsys = &s3c2410a_subsys, - .add_dev = s3c2410_pm_add, -}; - -static int __init s3c2410a_pm_drvinit(void) -{ - return subsys_interface_register(&s3c2410a_pm_interface); -} - -arch_initcall(s3c2410a_pm_drvinit); -#endif - -#if defined(CONFIG_CPU_S3C2440) -static struct subsys_interface s3c2440_pm_interface = { - .name = "s3c2440_pm", - .subsys = &s3c2440_subsys, - .add_dev = s3c2410_pm_add, -}; - -static int __init s3c2440_pm_drvinit(void) -{ - return subsys_interface_register(&s3c2440_pm_interface); -} - -arch_initcall(s3c2440_pm_drvinit); -#endif - -#if defined(CONFIG_CPU_S3C2442) -static struct subsys_interface s3c2442_pm_interface = { - .name = "s3c2442_pm", - .subsys = &s3c2442_subsys, - .add_dev = s3c2410_pm_add, -}; - -static int __init s3c2442_pm_drvinit(void) -{ - return subsys_interface_register(&s3c2442_pm_interface); -} - -arch_initcall(s3c2442_pm_drvinit); -#endif diff --git a/arch/arm/mach-s3c/pm-s3c2412.c b/arch/arm/mach-s3c/pm-s3c2412.c deleted file mode 100644 index ed3b4cfc7c0f..000000000000 --- a/arch/arm/mach-s3c/pm-s3c2412.c +++ /dev/null @@ -1,126 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://armlinux.simtec.co.uk/. - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <asm/cacheflush.h> -#include <asm/irq.h> - -#include "irqs.h" -#include "regs-gpio.h" - -#include "cpu.h" -#include "pm.h" -#include "wakeup-mask.h" - -#include "regs-dsc-s3c24xx.h" -#include "s3c2412-power.h" - -extern void s3c2412_sleep_enter(void); - -static int s3c2412_cpu_suspend(unsigned long arg) -{ - unsigned long tmp; - - /* set our standby method to sleep */ - - tmp = __raw_readl(S3C2412_PWRCFG); - tmp |= S3C2412_PWRCFG_STANDBYWFI_SLEEP; - __raw_writel(tmp, S3C2412_PWRCFG); - - s3c2412_sleep_enter(); - - pr_info("Failed to suspend the system\n"); - return 1; /* Aborting suspend */ -} - -/* mapping of interrupts to parts of the wakeup mask */ -static const struct samsung_wakeup_mask wake_irqs[] = { - { .irq = IRQ_RTC, .bit = S3C2412_PWRCFG_RTC_MASKIRQ, }, -}; - -static void s3c2412_pm_prepare(void) -{ - samsung_sync_wakemask(S3C2412_PWRCFG, - wake_irqs, ARRAY_SIZE(wake_irqs)); -} - -static int s3c2412_pm_add(struct device *dev, struct subsys_interface *sif) -{ - pm_cpu_prep = s3c2412_pm_prepare; - pm_cpu_sleep = s3c2412_cpu_suspend; - - return 0; -} - -static struct sleep_save s3c2412_sleep[] = { - SAVE_ITEM(S3C2412_DSC0), - SAVE_ITEM(S3C2412_DSC1), - SAVE_ITEM(S3C2413_GPJDAT), - SAVE_ITEM(S3C2413_GPJCON), - SAVE_ITEM(S3C2413_GPJUP), - - /* save the PWRCFG to get back to original sleep method */ - - SAVE_ITEM(S3C2412_PWRCFG), - - /* save the sleep configuration anyway, just in case these - * get damaged during wakeup */ - - SAVE_ITEM(S3C2412_GPBSLPCON), - SAVE_ITEM(S3C2412_GPCSLPCON), - SAVE_ITEM(S3C2412_GPDSLPCON), - SAVE_ITEM(S3C2412_GPFSLPCON), - SAVE_ITEM(S3C2412_GPGSLPCON), - SAVE_ITEM(S3C2412_GPHSLPCON), - SAVE_ITEM(S3C2413_GPJSLPCON), -}; - -static struct subsys_interface s3c2412_pm_interface = { - .name = "s3c2412_pm", - .subsys = &s3c2412_subsys, - .add_dev = s3c2412_pm_add, -}; - -static __init int s3c2412_pm_init(void) -{ - return subsys_interface_register(&s3c2412_pm_interface); -} - -arch_initcall(s3c2412_pm_init); - -static int s3c2412_pm_suspend(void) -{ - s3c_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); - return 0; -} - -static void s3c2412_pm_resume(void) -{ - unsigned long tmp; - - tmp = __raw_readl(S3C2412_PWRCFG); - tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK; - tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE; - __raw_writel(tmp, S3C2412_PWRCFG); - - s3c_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); -} - -struct syscore_ops s3c2412_pm_syscore_ops = { - .suspend = s3c2412_pm_suspend, - .resume = s3c2412_pm_resume, -}; diff --git a/arch/arm/mach-s3c/pm-s3c2416.c b/arch/arm/mach-s3c/pm-s3c2416.c deleted file mode 100644 index f69ad84cf4ff..000000000000 --- a/arch/arm/mach-s3c/pm-s3c2416.c +++ /dev/null @@ -1,81 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2010 Samsung Electronics Co., Ltd. -// http://www.samsung.com -// -// S3C2416 - PM support (Based on Ben Dooks' S3C2412 PM support) - -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/io.h> - -#include <asm/cacheflush.h> - -#include "regs-s3c2443-clock.h" - -#include "cpu.h" -#include "pm.h" - -#include "s3c2412-power.h" - -#ifdef CONFIG_PM_SLEEP -extern void s3c2412_sleep_enter(void); - -static int s3c2416_cpu_suspend(unsigned long arg) -{ - /* enable wakeup sources regardless of battery state */ - __raw_writel(S3C2443_PWRCFG_SLEEP, S3C2443_PWRCFG); - - /* set the mode as sleep, 2BED represents "Go to BED" */ - __raw_writel(0x2BED, S3C2443_PWRMODE); - - s3c2412_sleep_enter(); - - pr_info("Failed to suspend the system\n"); - return 1; /* Aborting suspend */ -} - -static void s3c2416_pm_prepare(void) -{ - /* - * write the magic value u-boot uses to check for resume into - * the INFORM0 register, and ensure INFORM1 is set to the - * correct address to resume from. - */ - __raw_writel(0x2BED, S3C2412_INFORM0); - __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1); -} - -static int s3c2416_pm_add(struct device *dev, struct subsys_interface *sif) -{ - pm_cpu_prep = s3c2416_pm_prepare; - pm_cpu_sleep = s3c2416_cpu_suspend; - - return 0; -} - -static struct subsys_interface s3c2416_pm_interface = { - .name = "s3c2416_pm", - .subsys = &s3c2416_subsys, - .add_dev = s3c2416_pm_add, -}; - -static __init int s3c2416_pm_init(void) -{ - return subsys_interface_register(&s3c2416_pm_interface); -} - -arch_initcall(s3c2416_pm_init); -#endif - -static void s3c2416_pm_resume(void) -{ - /* unset the return-from-sleep amd inform flags */ - __raw_writel(0x0, S3C2443_PWRMODE); - __raw_writel(0x0, S3C2412_INFORM0); - __raw_writel(0x0, S3C2412_INFORM1); -} - -struct syscore_ops s3c2416_pm_syscore_ops = { - .resume = s3c2416_pm_resume, -}; diff --git a/arch/arm/mach-s3c/pm-s3c24xx.c b/arch/arm/mach-s3c/pm-s3c24xx.c deleted file mode 100644 index 3a8f5c38882e..000000000000 --- a/arch/arm/mach-s3c/pm-s3c24xx.c +++ /dev/null @@ -1,121 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2004-2006 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// S3C24XX Power Manager (Suspend-To-RAM) support -// -// See Documentation/arm/samsung-s3c24xx/suspend.rst for more information -// -// Parts based on arch/arm/mach-pxa/pm.c -// -// Thanks to Dimitry Andric for debugging - -#include <linux/init.h> -#include <linux/suspend.h> -#include <linux/errno.h> -#include <linux/time.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include "regs-clock.h" -#include "regs-gpio.h" -#include "regs-irq.h" -#include "gpio-samsung.h" - -#include <asm/mach/time.h> - -#include "gpio-cfg.h" -#include "pm.h" - -#include "regs-mem-s3c24xx.h" - -#define PFX "s3c24xx-pm: " - -#ifdef CONFIG_PM_SLEEP -static struct sleep_save core_save[] = { - /* we restore the timings here, with the proviso that the board - * brings the system up in an slower, or equal frequency setting - * to the original system. - * - * if we cannot guarantee this, then things are going to go very - * wrong here, as we modify the refresh and both pll settings. - */ - - SAVE_ITEM(S3C2410_BWSCON), - SAVE_ITEM(S3C2410_BANKCON0), - SAVE_ITEM(S3C2410_BANKCON1), - SAVE_ITEM(S3C2410_BANKCON2), - SAVE_ITEM(S3C2410_BANKCON3), - SAVE_ITEM(S3C2410_BANKCON4), - SAVE_ITEM(S3C2410_BANKCON5), -}; -#endif - -/* s3c_pm_check_resume_pin - * - * check to see if the pin is configured correctly for sleep mode, and - * make any necessary adjustments if it is not -*/ - -static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) -{ - unsigned long irqstate; - unsigned long pinstate; - int irq = gpio_to_irq(pin); - - if (irqoffs < 4) - irqstate = s3c_irqwake_intmask & (1L<<irqoffs); - else - irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); - - pinstate = s3c_gpio_getcfg(pin); - - if (!irqstate) { - if (pinstate == S3C2410_GPIO_IRQ) - S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin); - } else { - if (pinstate == S3C2410_GPIO_IRQ) { - S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); - s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); - } - } -} - -/* s3c_pm_configure_extint - * - * configure all external interrupt pins -*/ - -void s3c_pm_configure_extint(void) -{ - int pin; - - /* for each of the external interrupts (EINT0..EINT15) we - * need to check whether it is an external interrupt source, - * and then configure it as an input if it is not - */ - - for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) { - s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0)); - } - - for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) { - s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8); - } -} - -#ifdef CONFIG_PM_SLEEP -void s3c_pm_restore_core(void) -{ - s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); -} - -void s3c_pm_save_core(void) -{ - s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); -} -#endif diff --git a/arch/arm/mach-s3c/pm-s3c64xx.c b/arch/arm/mach-s3c/pm-s3c64xx.c index 7bc7417fd803..284d5f462513 100644 --- a/arch/arm/mach-s3c/pm-s3c64xx.c +++ b/arch/arm/mach-s3c/pm-s3c64xx.c @@ -173,23 +173,6 @@ static struct s3c64xx_pm_domain *s3c64xx_pm_domains[] = { &s3c64xx_pm_f, }; -#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK -void s3c_pm_debug_smdkled(u32 set, u32 clear) -{ - unsigned long flags; - int i; - - local_irq_save(flags); - for (i = 0; i < 4; i++) { - if (clear & (1 << i)) - gpio_set_value(S3C64XX_GPN(12 + i), 0); - if (set & (1 << i)) - gpio_set_value(S3C64XX_GPN(12 + i), 1); - } - local_irq_restore(flags); -} -#endif - #ifdef CONFIG_PM_SLEEP static struct sleep_save core_save[] = { SAVE_ITEM(S3C64XX_MEM0DRVCON), @@ -224,8 +207,6 @@ void s3c_pm_restore_core(void) { __raw_writel(0, S3C64XX_EINT_MASK); - s3c_pm_debug_smdkled(1 << 2, 0); - s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); } @@ -258,9 +239,6 @@ static int s3c64xx_cpu_suspend(unsigned long arg) __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT); - /* set the LED state to 0110 over sleep */ - s3c_pm_debug_smdkled(3 << 1, 0xf); - /* issue the standby signal into the pm unit. Note, we * issue a write-buffer drain just in case */ @@ -305,56 +283,6 @@ static void s3c64xx_pm_prepare(void) __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT); } -#ifdef CONFIG_SAMSUNG_PM_DEBUG -void s3c_pm_arch_update_uart(void __iomem *regs, struct pm_uart_save *save) -{ - u32 ucon; - u32 ucon_clk - u32 save_clk; - u32 new_ucon; - u32 delta; - - if (!soc_is_s3c64xx()) - return; - - ucon = __raw_readl(regs + S3C2410_UCON); - ucon_clk = ucon & S3C6400_UCON_CLKMASK; - sav_clk = save->ucon & S3C6400_UCON_CLKMASK; - - /* S3C64XX UART blocks only support level interrupts, so ensure that - * when we restore unused UART blocks we force the level interrupt - * settings. */ - save->ucon |= S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL; - - /* We have a constraint on changing the clock type of the UART - * between UCLKx and PCLK, so ensure that when we restore UCON - * that the CLK field is correctly modified if the bootloader - * has changed anything. - */ - if (ucon_clk != save_clk) { - new_ucon = save->ucon; - delta = ucon_clk ^ save_clk; - - /* change from UCLKx => wrong PCLK, - * either UCLK can be tested for by a bit-test - * with UCLK0 */ - if (ucon_clk & S3C6400_UCON_UCLK0 && - !(save_clk & S3C6400_UCON_UCLK0) && - delta & S3C6400_UCON_PCLK2) { - new_ucon &= ~S3C6400_UCON_UCLK0; - } else if (delta == S3C6400_UCON_PCLK2) { - /* as an precaution, don't change from - * PCLK2 => PCLK or vice-versa */ - new_ucon ^= S3C6400_UCON_PCLK2; - } - - S3C_PMDBG("ucon change %04x => %04x (save=%04x)\n", - ucon, new_ucon, save->ucon); - save->ucon = new_ucon; - } -} -#endif - int __init s3c64xx_pm_init(void) { int i; @@ -384,17 +312,6 @@ static __init int s3c64xx_pm_initcall(void) pm_cpu_prep = s3c64xx_pm_prepare; pm_cpu_sleep = s3c64xx_cpu_suspend; -#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK - gpio_request(S3C64XX_GPN(12), "DEBUG_LED0"); - gpio_request(S3C64XX_GPN(13), "DEBUG_LED1"); - gpio_request(S3C64XX_GPN(14), "DEBUG_LED2"); - gpio_request(S3C64XX_GPN(15), "DEBUG_LED3"); - gpio_direction_output(S3C64XX_GPN(12), 0); - gpio_direction_output(S3C64XX_GPN(13), 0); - gpio_direction_output(S3C64XX_GPN(14), 0); - gpio_direction_output(S3C64XX_GPN(15), 0); -#endif - return 0; } arch_initcall(s3c64xx_pm_initcall); diff --git a/arch/arm/mach-s3c/pm.c b/arch/arm/mach-s3c/pm.c index 06f019690d81..5698cbceaf7a 100644 --- a/arch/arm/mach-s3c/pm.c +++ b/arch/arm/mach-s3c/pm.c @@ -100,7 +100,7 @@ static int s3c_pm_enter(suspend_state_t state) samsung_pm_saved_gpios(); } - s3c_pm_save_uarts(soc_is_s3c2410()); + s3c_pm_save_uarts(false); s3c_pm_save_core(); /* set the irq configuration for wake */ @@ -137,7 +137,7 @@ static int s3c_pm_enter(suspend_state_t state) /* restore the system state */ s3c_pm_restore_core(); - s3c_pm_restore_uarts(soc_is_s3c2410()); + s3c_pm_restore_uarts(false); if (!of_have_populated_dt()) { samsung_pm_restore_gpios(); @@ -152,9 +152,6 @@ static int s3c_pm_enter(suspend_state_t state) S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); - /* LEDs should now be 1110 */ - s3c_pm_debug_smdkled(1 << 1, 0); - s3c_pm_check_restore(); /* ok, let's return from sleep */ diff --git a/arch/arm/mach-s3c/pm.h b/arch/arm/mach-s3c/pm.h index eed61e585457..35d266ab6958 100644 --- a/arch/arm/mach-s3c/pm.h +++ b/arch/arm/mach-s3c/pm.h @@ -64,18 +64,6 @@ extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); #define s3c_irqext_wake NULL #endif -#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK -/** - * s3c_pm_debug_smdkled() - Debug PM suspend/resume via SMDK Board LEDs - * @set: set bits for the state of the LEDs - * @clear: clear bits for the state of the LEDs. - */ -extern void s3c_pm_debug_smdkled(u32 set, u32 clear); - -#else -static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { } -#endif /* CONFIG_S3C_PM_DEBUG_LED_SMDK */ - /** * s3c_pm_configure_extint() - ensure pins are correctly set for IRQ * diff --git a/arch/arm/mach-s3c/regs-adc.h b/arch/arm/mach-s3c/regs-adc.h deleted file mode 100644 index 58953c7381dd..000000000000 --- a/arch/arm/mach-s3c/regs-adc.h +++ /dev/null @@ -1,64 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Shannon Holland <holland@loser.net> - * - * S3C2410 ADC registers - */ - -#ifndef __ASM_ARCH_REGS_ADC_H -#define __ASM_ARCH_REGS_ADC_H "regs-adc.h" - -#define S3C2410_ADCREG(x) (x) - -#define S3C2410_ADCCON S3C2410_ADCREG(0x00) -#define S3C2410_ADCTSC S3C2410_ADCREG(0x04) -#define S3C2410_ADCDLY S3C2410_ADCREG(0x08) -#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C) -#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) -#define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14) -#define S3C2443_ADCMUX S3C2410_ADCREG(0x18) -#define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18) -#define S5P_ADCMUX S3C2410_ADCREG(0x1C) -#define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20) - - -/* ADCCON Register Bits */ -#define S3C64XX_ADCCON_RESSEL (1<<16) -#define S3C2410_ADCCON_ECFLG (1<<15) -#define S3C2410_ADCCON_PRSCEN (1<<14) -#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) -#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6) -#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) -#define S3C2410_ADCCON_MUXMASK (0x7<<3) -#define S3C2416_ADCCON_RESSEL (1 << 3) -#define S3C2410_ADCCON_STDBM (1<<2) -#define S3C2410_ADCCON_READ_START (1<<1) -#define S3C2410_ADCCON_ENABLE_START (1<<0) -#define S3C2410_ADCCON_STARTMASK (0x3<<0) - - -/* ADCTSC Register Bits */ -#define S3C2443_ADCTSC_UD_SEN (1 << 8) -#define S3C2410_ADCTSC_YM_SEN (1<<7) -#define S3C2410_ADCTSC_YP_SEN (1<<6) -#define S3C2410_ADCTSC_XM_SEN (1<<5) -#define S3C2410_ADCTSC_XP_SEN (1<<4) -#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3) -#define S3C2410_ADCTSC_AUTO_PST (1<<2) -#define S3C2410_ADCTSC_XY_PST(x) (((x)&0x3)<<0) - -/* ADCDAT0 Bits */ -#define S3C2410_ADCDAT0_UPDOWN (1<<15) -#define S3C2410_ADCDAT0_AUTO_PST (1<<14) -#define S3C2410_ADCDAT0_XY_PST (0x3<<12) -#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF) - -/* ADCDAT1 Bits */ -#define S3C2410_ADCDAT1_UPDOWN (1<<15) -#define S3C2410_ADCDAT1_AUTO_PST (1<<14) -#define S3C2410_ADCDAT1_XY_PST (0x3<<12) -#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF) - -#endif /* __ASM_ARCH_REGS_ADC_H */ - - diff --git a/arch/arm/mach-s3c/regs-clock-s3c24xx.h b/arch/arm/mach-s3c/regs-clock-s3c24xx.h deleted file mode 100644 index 933ddb5eedec..000000000000 --- a/arch/arm/mach-s3c/regs-clock-s3c24xx.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C2410 clock register definitions - */ - -#ifndef __ASM_ARM_REGS_CLOCK -#define __ASM_ARM_REGS_CLOCK - -#include "map.h" - -#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) - -#define S3C2410_PLLVAL(_m,_p,_s) ((_m) << 12 | ((_p) << 4) | ((_s))) - -#define S3C2410_LOCKTIME S3C2410_CLKREG(0x00) -#define S3C2410_MPLLCON S3C2410_CLKREG(0x04) -#define S3C2410_UPLLCON S3C2410_CLKREG(0x08) -#define S3C2410_CLKCON S3C2410_CLKREG(0x0C) -#define S3C2410_CLKSLOW S3C2410_CLKREG(0x10) -#define S3C2410_CLKDIVN S3C2410_CLKREG(0x14) - -#define S3C2410_CLKCON_IDLE (1<<2) -#define S3C2410_CLKCON_POWER (1<<3) -#define S3C2410_CLKCON_NAND (1<<4) -#define S3C2410_CLKCON_LCDC (1<<5) -#define S3C2410_CLKCON_USBH (1<<6) -#define S3C2410_CLKCON_USBD (1<<7) -#define S3C2410_CLKCON_PWMT (1<<8) -#define S3C2410_CLKCON_SDI (1<<9) -#define S3C2410_CLKCON_UART0 (1<<10) -#define S3C2410_CLKCON_UART1 (1<<11) -#define S3C2410_CLKCON_UART2 (1<<12) -#define S3C2410_CLKCON_GPIO (1<<13) -#define S3C2410_CLKCON_RTC (1<<14) -#define S3C2410_CLKCON_ADC (1<<15) -#define S3C2410_CLKCON_IIC (1<<16) -#define S3C2410_CLKCON_IIS (1<<17) -#define S3C2410_CLKCON_SPI (1<<18) - -#define S3C2410_CLKDIVN_PDIVN (1<<0) -#define S3C2410_CLKDIVN_HDIVN (1<<1) - -#define S3C2410_CLKSLOW_UCLK_OFF (1<<7) -#define S3C2410_CLKSLOW_MPLL_OFF (1<<5) -#define S3C2410_CLKSLOW_SLOW (1<<4) -#define S3C2410_CLKSLOW_SLOWVAL(x) (x) -#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7) - -#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) - -/* extra registers */ -#define S3C2440_CAMDIVN S3C2410_CLKREG(0x18) - -#define S3C2440_CLKCON_CAMERA (1<<19) -#define S3C2440_CLKCON_AC97 (1<<20) - -#define S3C2440_CLKDIVN_PDIVN (1<<0) -#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1) -#define S3C2440_CLKDIVN_HDIVN_1 (0<<1) -#define S3C2440_CLKDIVN_HDIVN_2 (1<<1) -#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1) -#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1) -#define S3C2440_CLKDIVN_UCLK (1<<3) - -#define S3C2440_CAMDIVN_CAMCLK_MASK (0xf<<0) -#define S3C2440_CAMDIVN_CAMCLK_SEL (1<<4) -#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8) -#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9) -#define S3C2440_CAMDIVN_DVSEN (1<<12) - -#define S3C2442_CAMDIVN_CAMCLK_DIV3 (1<<5) - -#endif /* CONFIG_CPU_S3C2440 or CONFIG_CPU_S3C2442 */ - -#if defined(CONFIG_CPU_S3C2412) - -#define S3C2412_OSCSET S3C2410_CLKREG(0x18) -#define S3C2412_CLKSRC S3C2410_CLKREG(0x1C) - -#define S3C2412_PLLCON_OFF (1<<20) - -#define S3C2412_CLKDIVN_PDIVN (1<<2) -#define S3C2412_CLKDIVN_HDIVN_MASK (3<<0) -#define S3C2412_CLKDIVN_ARMDIVN (1<<3) -#define S3C2412_CLKDIVN_DVSEN (1<<4) -#define S3C2412_CLKDIVN_HALFHCLK (1<<5) -#define S3C2412_CLKDIVN_USB48DIV (1<<6) -#define S3C2412_CLKDIVN_UARTDIV_MASK (15<<8) -#define S3C2412_CLKDIVN_UARTDIV_SHIFT (8) -#define S3C2412_CLKDIVN_I2SDIV_MASK (15<<12) -#define S3C2412_CLKDIVN_I2SDIV_SHIFT (12) -#define S3C2412_CLKDIVN_CAMDIV_MASK (15<<16) -#define S3C2412_CLKDIVN_CAMDIV_SHIFT (16) - -#define S3C2412_CLKCON_WDT (1<<28) -#define S3C2412_CLKCON_SPI (1<<27) -#define S3C2412_CLKCON_IIS (1<<26) -#define S3C2412_CLKCON_IIC (1<<25) -#define S3C2412_CLKCON_ADC (1<<24) -#define S3C2412_CLKCON_RTC (1<<23) -#define S3C2412_CLKCON_GPIO (1<<22) -#define S3C2412_CLKCON_UART2 (1<<21) -#define S3C2412_CLKCON_UART1 (1<<20) -#define S3C2412_CLKCON_UART0 (1<<19) -#define S3C2412_CLKCON_SDI (1<<18) -#define S3C2412_CLKCON_PWMT (1<<17) -#define S3C2412_CLKCON_USBD (1<<16) -#define S3C2412_CLKCON_CAMCLK (1<<15) -#define S3C2412_CLKCON_UARTCLK (1<<14) -/* missing 13 */ -#define S3C2412_CLKCON_USB_HOST48 (1<<12) -#define S3C2412_CLKCON_USB_DEV48 (1<<11) -#define S3C2412_CLKCON_HCLKdiv2 (1<<10) -#define S3C2412_CLKCON_HCLKx2 (1<<9) -#define S3C2412_CLKCON_SDRAM (1<<8) -/* missing 7 */ -#define S3C2412_CLKCON_USBH S3C2410_CLKCON_USBH -#define S3C2412_CLKCON_LCDC S3C2410_CLKCON_LCDC -#define S3C2412_CLKCON_NAND S3C2410_CLKCON_NAND -#define S3C2412_CLKCON_DMA3 (1<<3) -#define S3C2412_CLKCON_DMA2 (1<<2) -#define S3C2412_CLKCON_DMA1 (1<<1) -#define S3C2412_CLKCON_DMA0 (1<<0) - -/* clock sourec controls */ - -#define S3C2412_CLKSRC_EXTCLKDIV_MASK (7 << 0) -#define S3C2412_CLKSRC_EXTCLKDIV_SHIFT (0) -#define S3C2412_CLKSRC_MDIVCLK_EXTCLKDIV (1<<3) -#define S3C2412_CLKSRC_MSYSCLK_MPLL (1<<4) -#define S3C2412_CLKSRC_USYSCLK_UPLL (1<<5) -#define S3C2412_CLKSRC_UARTCLK_MPLL (1<<8) -#define S3C2412_CLKSRC_I2SCLK_MPLL (1<<9) -#define S3C2412_CLKSRC_USBCLK_HCLK (1<<10) -#define S3C2412_CLKSRC_CAMCLK_HCLK (1<<11) -#define S3C2412_CLKSRC_UREFCLK_EXTCLK (1<<12) -#define S3C2412_CLKSRC_EREFCLK_EXTCLK (1<<14) - -#endif /* CONFIG_CPU_S3C2412 */ - -#define S3C2416_CLKDIV2 S3C2410_CLKREG(0x28) - -#endif /* __ASM_ARM_REGS_CLOCK */ diff --git a/arch/arm/mach-s3c/regs-clock.h b/arch/arm/mach-s3c/regs-clock.h index 7df31f203d28..fc7e3886b07c 100644 --- a/arch/arm/mach-s3c/regs-clock.h +++ b/arch/arm/mach-s3c/regs-clock.h @@ -1,9 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ - -#ifdef CONFIG_ARCH_S3C24XX -#include "regs-clock-s3c24xx.h" -#endif - -#ifdef CONFIG_ARCH_S3C64XX #include "regs-clock-s3c64xx.h" -#endif diff --git a/arch/arm/mach-s3c/regs-dsc-s3c24xx.h b/arch/arm/mach-s3c/regs-dsc-s3c24xx.h deleted file mode 100644 index 8b8b572aef04..000000000000 --- a/arch/arm/mach-s3c/regs-dsc-s3c24xx.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - * - * S3C2440/S3C2412 Signal Drive Strength Control - */ - - -#ifndef __ASM_ARCH_REGS_DSC_S3C24XX_H -#define __ASM_ARCH_REGS_DSC_S3C24XX_H __FILE__ - -/* S3C2412 */ -#define S3C2412_DSC0 S3C2410_GPIOREG(0xdc) -#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) - -/* S3C2440 */ -#define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) -#define S3C2440_DSC1 S3C2410_GPIOREG(0xc8) - -#endif /* __ASM_ARCH_REGS_DSC_S3C24XX_H */ - diff --git a/arch/arm/mach-s3c/regs-gpio-s3c24xx.h b/arch/arm/mach-s3c/regs-gpio-s3c24xx.h deleted file mode 100644 index 9a7e262268a7..000000000000 --- a/arch/arm/mach-s3c/regs-gpio-s3c24xx.h +++ /dev/null @@ -1,608 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003-2004 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - * - * S3C2410 GPIO register definitions - */ - - -#ifndef __ASM_ARCH_REGS_GPIO_H -#define __ASM_ARCH_REGS_GPIO_H - -#include "map-s3c.h" - -#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) - -/* general configuration options */ - -#define S3C2410_GPIO_LEAVE (0xFFFFFFFF) -#define S3C2410_GPIO_INPUT (0xFFFFFFF0) /* not available on A */ -#define S3C2410_GPIO_OUTPUT (0xFFFFFFF1) -#define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */ -#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* bank A => addr/cs/nand */ -#define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */ - -/* register address for the GPIO registers. - * S3C24XX_GPIOREG2 is for the second set of registers in the - * GPIO which move between s3c2410 and s3c2412 type systems */ - -#define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO) -#define S3C24XX_GPIOREG2(x) ((x) + S3C24XX_VA_GPIO2) - - -/* configure GPIO ports A..G */ - -/* port A - S3C2410: 22bits, zero in bit X makes pin X output - * 1 makes port special function, this is default -*/ -#define S3C2410_GPACON S3C2410_GPIOREG(0x00) -#define S3C2410_GPADAT S3C2410_GPIOREG(0x04) - -#define S3C2410_GPA0_ADDR0 (1<<0) -#define S3C2410_GPA1_ADDR16 (1<<1) -#define S3C2410_GPA2_ADDR17 (1<<2) -#define S3C2410_GPA3_ADDR18 (1<<3) -#define S3C2410_GPA4_ADDR19 (1<<4) -#define S3C2410_GPA5_ADDR20 (1<<5) -#define S3C2410_GPA6_ADDR21 (1<<6) -#define S3C2410_GPA7_ADDR22 (1<<7) -#define S3C2410_GPA8_ADDR23 (1<<8) -#define S3C2410_GPA9_ADDR24 (1<<9) -#define S3C2410_GPA10_ADDR25 (1<<10) -#define S3C2410_GPA11_ADDR26 (1<<11) -#define S3C2410_GPA12_nGCS1 (1<<12) -#define S3C2410_GPA13_nGCS2 (1<<13) -#define S3C2410_GPA14_nGCS3 (1<<14) -#define S3C2410_GPA15_nGCS4 (1<<15) -#define S3C2410_GPA16_nGCS5 (1<<16) -#define S3C2410_GPA17_CLE (1<<17) -#define S3C2410_GPA18_ALE (1<<18) -#define S3C2410_GPA19_nFWE (1<<19) -#define S3C2410_GPA20_nFRE (1<<20) -#define S3C2410_GPA21_nRSTOUT (1<<21) -#define S3C2410_GPA22_nFCE (1<<22) - -/* 0x08 and 0x0c are reserved on S3C2410 */ - -/* S3C2410: - * GPB is 10 IO pins, each configured by 2 bits each in GPBCON. - * 00 = input, 01 = output, 10=special function, 11=reserved - - * bit 0,1 = pin 0, 2,3= pin 1... - * - * CPBUP = pull up resistor control, 1=disabled, 0=enabled -*/ - -#define S3C2410_GPBCON S3C2410_GPIOREG(0x10) -#define S3C2410_GPBDAT S3C2410_GPIOREG(0x14) -#define S3C2410_GPBUP S3C2410_GPIOREG(0x18) - -/* no i/o pin in port b can have value 3 (unless it is a s3c2443) ! */ - -#define S3C2410_GPB0_TOUT0 (0x02 << 0) - -#define S3C2410_GPB1_TOUT1 (0x02 << 2) - -#define S3C2410_GPB2_TOUT2 (0x02 << 4) - -#define S3C2410_GPB3_TOUT3 (0x02 << 6) - -#define S3C2410_GPB4_TCLK0 (0x02 << 8) -#define S3C2410_GPB4_MASK (0x03 << 8) - -#define S3C2410_GPB5_nXBACK (0x02 << 10) -#define S3C2443_GPB5_XBACK (0x03 << 10) - -#define S3C2410_GPB6_nXBREQ (0x02 << 12) -#define S3C2443_GPB6_XBREQ (0x03 << 12) - -#define S3C2410_GPB7_nXDACK1 (0x02 << 14) -#define S3C2443_GPB7_XDACK1 (0x03 << 14) - -#define S3C2410_GPB8_nXDREQ1 (0x02 << 16) - -#define S3C2410_GPB9_nXDACK0 (0x02 << 18) -#define S3C2443_GPB9_XDACK0 (0x03 << 18) - -#define S3C2410_GPB10_nXDRE0 (0x02 << 20) -#define S3C2443_GPB10_XDREQ0 (0x03 << 20) - -#define S3C2410_GPB_PUPDIS(x) (1<<(x)) - -/* Port C consits of 16 GPIO/Special function - * - * almost identical setup to port b, but the special functions are mostly - * to do with the video system's sync/etc. -*/ - -#define S3C2410_GPCCON S3C2410_GPIOREG(0x20) -#define S3C2410_GPCDAT S3C2410_GPIOREG(0x24) -#define S3C2410_GPCUP S3C2410_GPIOREG(0x28) -#define S3C2410_GPC0_LEND (0x02 << 0) -#define S3C2410_GPC1_VCLK (0x02 << 2) -#define S3C2410_GPC2_VLINE (0x02 << 4) -#define S3C2410_GPC3_VFRAME (0x02 << 6) -#define S3C2410_GPC4_VM (0x02 << 8) -#define S3C2410_GPC5_LCDVF0 (0x02 << 10) -#define S3C2410_GPC6_LCDVF1 (0x02 << 12) -#define S3C2410_GPC7_LCDVF2 (0x02 << 14) -#define S3C2410_GPC8_VD0 (0x02 << 16) -#define S3C2410_GPC9_VD1 (0x02 << 18) -#define S3C2410_GPC10_VD2 (0x02 << 20) -#define S3C2410_GPC11_VD3 (0x02 << 22) -#define S3C2410_GPC12_VD4 (0x02 << 24) -#define S3C2410_GPC13_VD5 (0x02 << 26) -#define S3C2410_GPC14_VD6 (0x02 << 28) -#define S3C2410_GPC15_VD7 (0x02 << 30) -#define S3C2410_GPC_PUPDIS(x) (1<<(x)) - -/* - * S3C2410: Port D consists of 16 GPIO/Special function - * - * almost identical setup to port b, but the special functions are mostly - * to do with the video system's data. - * - * almost identical setup to port c -*/ - -#define S3C2410_GPDCON S3C2410_GPIOREG(0x30) -#define S3C2410_GPDDAT S3C2410_GPIOREG(0x34) -#define S3C2410_GPDUP S3C2410_GPIOREG(0x38) - -#define S3C2410_GPD0_VD8 (0x02 << 0) -#define S3C2442_GPD0_nSPICS1 (0x03 << 0) - -#define S3C2410_GPD1_VD9 (0x02 << 2) -#define S3C2442_GPD1_SPICLK1 (0x03 << 2) - -#define S3C2410_GPD2_VD10 (0x02 << 4) - -#define S3C2410_GPD3_VD11 (0x02 << 6) - -#define S3C2410_GPD4_VD12 (0x02 << 8) - -#define S3C2410_GPD5_VD13 (0x02 << 10) - -#define S3C2410_GPD6_VD14 (0x02 << 12) - -#define S3C2410_GPD7_VD15 (0x02 << 14) - -#define S3C2410_GPD8_VD16 (0x02 << 16) -#define S3C2440_GPD8_SPIMISO1 (0x03 << 16) - -#define S3C2410_GPD9_VD17 (0x02 << 18) -#define S3C2440_GPD9_SPIMOSI1 (0x03 << 18) - -#define S3C2410_GPD10_VD18 (0x02 << 20) -#define S3C2440_GPD10_SPICLK1 (0x03 << 20) - -#define S3C2410_GPD11_VD19 (0x02 << 22) - -#define S3C2410_GPD12_VD20 (0x02 << 24) - -#define S3C2410_GPD13_VD21 (0x02 << 26) - -#define S3C2410_GPD14_VD22 (0x02 << 28) -#define S3C2410_GPD14_nSS1 (0x03 << 28) - -#define S3C2410_GPD15_VD23 (0x02 << 30) -#define S3C2410_GPD15_nSS0 (0x03 << 30) - -#define S3C2410_GPD_PUPDIS(x) (1<<(x)) - -/* S3C2410: - * Port E consists of 16 GPIO/Special function - * - * again, the same as port B, but dealing with I2S, SDI, and - * more miscellaneous functions - * - * GPIO / interrupt inputs -*/ - -#define S3C2410_GPECON S3C2410_GPIOREG(0x40) -#define S3C2410_GPEDAT S3C2410_GPIOREG(0x44) -#define S3C2410_GPEUP S3C2410_GPIOREG(0x48) - -#define S3C2410_GPE0_I2SLRCK (0x02 << 0) -#define S3C2443_GPE0_AC_nRESET (0x03 << 0) -#define S3C2410_GPE0_MASK (0x03 << 0) - -#define S3C2410_GPE1_I2SSCLK (0x02 << 2) -#define S3C2443_GPE1_AC_SYNC (0x03 << 2) -#define S3C2410_GPE1_MASK (0x03 << 2) - -#define S3C2410_GPE2_CDCLK (0x02 << 4) -#define S3C2443_GPE2_AC_BITCLK (0x03 << 4) - -#define S3C2410_GPE3_I2SSDI (0x02 << 6) -#define S3C2443_GPE3_AC_SDI (0x03 << 6) -#define S3C2410_GPE3_nSS0 (0x03 << 6) -#define S3C2410_GPE3_MASK (0x03 << 6) - -#define S3C2410_GPE4_I2SSDO (0x02 << 8) -#define S3C2443_GPE4_AC_SDO (0x03 << 8) -#define S3C2410_GPE4_I2SSDI (0x03 << 8) -#define S3C2410_GPE4_MASK (0x03 << 8) - -#define S3C2410_GPE5_SDCLK (0x02 << 10) -#define S3C2443_GPE5_SD1_CLK (0x02 << 10) -#define S3C2443_GPE5_AC_BITCLK (0x03 << 10) - -#define S3C2410_GPE6_SDCMD (0x02 << 12) -#define S3C2443_GPE6_SD1_CMD (0x02 << 12) -#define S3C2443_GPE6_AC_SDI (0x03 << 12) - -#define S3C2410_GPE7_SDDAT0 (0x02 << 14) -#define S3C2443_GPE5_SD1_DAT0 (0x02 << 14) -#define S3C2443_GPE7_AC_SDO (0x03 << 14) - -#define S3C2410_GPE8_SDDAT1 (0x02 << 16) -#define S3C2443_GPE8_SD1_DAT1 (0x02 << 16) -#define S3C2443_GPE8_AC_SYNC (0x03 << 16) - -#define S3C2410_GPE9_SDDAT2 (0x02 << 18) -#define S3C2443_GPE9_SD1_DAT2 (0x02 << 18) -#define S3C2443_GPE9_AC_nRESET (0x03 << 18) - -#define S3C2410_GPE10_SDDAT3 (0x02 << 20) -#define S3C2443_GPE10_SD1_DAT3 (0x02 << 20) - -#define S3C2410_GPE11_SPIMISO0 (0x02 << 22) - -#define S3C2410_GPE12_SPIMOSI0 (0x02 << 24) - -#define S3C2410_GPE13_SPICLK0 (0x02 << 26) - -#define S3C2410_GPE14_IICSCL (0x02 << 28) -#define S3C2410_GPE14_MASK (0x03 << 28) - -#define S3C2410_GPE15_IICSDA (0x02 << 30) -#define S3C2410_GPE15_MASK (0x03 << 30) - -#define S3C2440_GPE0_ACSYNC (0x03 << 0) -#define S3C2440_GPE1_ACBITCLK (0x03 << 2) -#define S3C2440_GPE2_ACRESET (0x03 << 4) -#define S3C2440_GPE3_ACIN (0x03 << 6) -#define S3C2440_GPE4_ACOUT (0x03 << 8) - -#define S3C2410_GPE_PUPDIS(x) (1<<(x)) - -/* S3C2410: - * Port F consists of 8 GPIO/Special function - * - * GPIO / interrupt inputs - * - * GPFCON has 2 bits for each of the input pins on port F - * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 undefined - * - * pull up works like all other ports. - * - * GPIO/serial/misc pins -*/ - -#define S3C2410_GPFCON S3C2410_GPIOREG(0x50) -#define S3C2410_GPFDAT S3C2410_GPIOREG(0x54) -#define S3C2410_GPFUP S3C2410_GPIOREG(0x58) - -#define S3C2410_GPF0_EINT0 (0x02 << 0) -#define S3C2410_GPF1_EINT1 (0x02 << 2) -#define S3C2410_GPF2_EINT2 (0x02 << 4) -#define S3C2410_GPF3_EINT3 (0x02 << 6) -#define S3C2410_GPF4_EINT4 (0x02 << 8) -#define S3C2410_GPF5_EINT5 (0x02 << 10) -#define S3C2410_GPF6_EINT6 (0x02 << 12) -#define S3C2410_GPF7_EINT7 (0x02 << 14) -#define S3C2410_GPF_PUPDIS(x) (1<<(x)) - -/* S3C2410: - * Port G consists of 8 GPIO/IRQ/Special function - * - * GPGCON has 2 bits for each of the input pins on port G - * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func - * - * pull up works like all other ports. -*/ - -#define S3C2410_GPGCON S3C2410_GPIOREG(0x60) -#define S3C2410_GPGDAT S3C2410_GPIOREG(0x64) -#define S3C2410_GPGUP S3C2410_GPIOREG(0x68) - -#define S3C2410_GPG0_EINT8 (0x02 << 0) - -#define S3C2410_GPG1_EINT9 (0x02 << 2) - -#define S3C2410_GPG2_EINT10 (0x02 << 4) -#define S3C2410_GPG2_nSS0 (0x03 << 4) - -#define S3C2410_GPG3_EINT11 (0x02 << 6) -#define S3C2410_GPG3_nSS1 (0x03 << 6) - -#define S3C2410_GPG4_EINT12 (0x02 << 8) -#define S3C2410_GPG4_LCDPWREN (0x03 << 8) -#define S3C2443_GPG4_LCDPWRDN (0x03 << 8) - -#define S3C2410_GPG5_EINT13 (0x02 << 10) -#define S3C2410_GPG5_SPIMISO1 (0x03 << 10) /* not s3c2443 */ - -#define S3C2410_GPG6_EINT14 (0x02 << 12) -#define S3C2410_GPG6_SPIMOSI1 (0x03 << 12) - -#define S3C2410_GPG7_EINT15 (0x02 << 14) -#define S3C2410_GPG7_SPICLK1 (0x03 << 14) - -#define S3C2410_GPG8_EINT16 (0x02 << 16) - -#define S3C2410_GPG9_EINT17 (0x02 << 18) - -#define S3C2410_GPG10_EINT18 (0x02 << 20) - -#define S3C2410_GPG11_EINT19 (0x02 << 22) -#define S3C2410_GPG11_TCLK1 (0x03 << 22) -#define S3C2443_GPG11_CF_nIREQ (0x03 << 22) - -#define S3C2410_GPG12_EINT20 (0x02 << 24) -#define S3C2410_GPG12_XMON (0x03 << 24) -#define S3C2442_GPG12_nSPICS0 (0x03 << 24) -#define S3C2443_GPG12_nINPACK (0x03 << 24) - -#define S3C2410_GPG13_EINT21 (0x02 << 26) -#define S3C2410_GPG13_nXPON (0x03 << 26) -#define S3C2443_GPG13_CF_nREG (0x03 << 26) - -#define S3C2410_GPG14_EINT22 (0x02 << 28) -#define S3C2410_GPG14_YMON (0x03 << 28) -#define S3C2443_GPG14_CF_RESET (0x03 << 28) - -#define S3C2410_GPG15_EINT23 (0x02 << 30) -#define S3C2410_GPG15_nYPON (0x03 << 30) -#define S3C2443_GPG15_CF_PWR (0x03 << 30) - -#define S3C2410_GPG_PUPDIS(x) (1<<(x)) - -/* Port H consists of11 GPIO/serial/Misc pins - * - * GPHCON has 2 bits for each of the input pins on port H - * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func - * - * pull up works like all other ports. -*/ - -#define S3C2410_GPHCON S3C2410_GPIOREG(0x70) -#define S3C2410_GPHDAT S3C2410_GPIOREG(0x74) -#define S3C2410_GPHUP S3C2410_GPIOREG(0x78) - -#define S3C2410_GPH0_nCTS0 (0x02 << 0) -#define S3C2416_GPH0_TXD0 (0x02 << 0) - -#define S3C2410_GPH1_nRTS0 (0x02 << 2) -#define S3C2416_GPH1_RXD0 (0x02 << 2) - -#define S3C2410_GPH2_TXD0 (0x02 << 4) -#define S3C2416_GPH2_TXD1 (0x02 << 4) - -#define S3C2410_GPH3_RXD0 (0x02 << 6) -#define S3C2416_GPH3_RXD1 (0x02 << 6) - -#define S3C2410_GPH4_TXD1 (0x02 << 8) -#define S3C2416_GPH4_TXD2 (0x02 << 8) - -#define S3C2410_GPH5_RXD1 (0x02 << 10) -#define S3C2416_GPH5_RXD2 (0x02 << 10) - -#define S3C2410_GPH6_TXD2 (0x02 << 12) -#define S3C2416_GPH6_TXD3 (0x02 << 12) -#define S3C2410_GPH6_nRTS1 (0x03 << 12) -#define S3C2416_GPH6_nRTS2 (0x03 << 12) - -#define S3C2410_GPH7_RXD2 (0x02 << 14) -#define S3C2416_GPH7_RXD3 (0x02 << 14) -#define S3C2410_GPH7_nCTS1 (0x03 << 14) -#define S3C2416_GPH7_nCTS2 (0x03 << 14) - -#define S3C2410_GPH8_UCLK (0x02 << 16) -#define S3C2416_GPH8_nCTS0 (0x02 << 16) - -#define S3C2410_GPH9_CLKOUT0 (0x02 << 18) -#define S3C2442_GPH9_nSPICS0 (0x03 << 18) -#define S3C2416_GPH9_nRTS0 (0x02 << 18) - -#define S3C2410_GPH10_CLKOUT1 (0x02 << 20) -#define S3C2416_GPH10_nCTS1 (0x02 << 20) - -#define S3C2416_GPH11_nRTS1 (0x02 << 22) - -#define S3C2416_GPH12_EXTUARTCLK (0x02 << 24) - -#define S3C2416_GPH13_CLKOUT0 (0x02 << 26) - -#define S3C2416_GPH14_CLKOUT1 (0x02 << 28) - -/* The S3C2412 and S3C2413 move the GPJ register set to after - * GPH, which means all registers after 0x80 are now offset by 0x10 - * for the 2412/2413 from the 2410/2440/2442 -*/ - -/* - * Port J consists of 13 GPIO/Camera pins. GPJCON has 2 bits - * for each of the pins on port J. - * 00 - input, 01 output, 10 - camera - * - * Pull up works like all other ports. - */ - -#define S3C2413_GPJCON S3C2410_GPIOREG(0x80) -#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) -#define S3C2413_GPJUP S3C2410_GPIOREG(0x88) -#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) - -/* S3C2443 and above */ -#define S3C2440_GPJCON S3C2410_GPIOREG(0xD0) -#define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4) -#define S3C2440_GPJUP S3C2410_GPIOREG(0xD8) - -#define S3C2443_GPKCON S3C2410_GPIOREG(0xE0) -#define S3C2443_GPKDAT S3C2410_GPIOREG(0xE4) -#define S3C2443_GPKUP S3C2410_GPIOREG(0xE8) - -#define S3C2443_GPLCON S3C2410_GPIOREG(0xF0) -#define S3C2443_GPLDAT S3C2410_GPIOREG(0xF4) -#define S3C2443_GPLUP S3C2410_GPIOREG(0xF8) - -#define S3C2443_GPMCON S3C2410_GPIOREG(0x100) -#define S3C2443_GPMDAT S3C2410_GPIOREG(0x104) -#define S3C2443_GPMUP S3C2410_GPIOREG(0x108) - -/* miscellaneous control */ -#define S3C2410_MISCCR S3C2410_GPIOREG(0x80) - -/* see clock.h for dclk definitions */ - -/* pullup control on databus */ -#define S3C2410_MISCCR_SPUCR_HEN (0<<0) -#define S3C2410_MISCCR_SPUCR_HDIS (1<<0) -#define S3C2410_MISCCR_SPUCR_LEN (0<<1) -#define S3C2410_MISCCR_SPUCR_LDIS (1<<1) - -#define S3C2410_MISCCR_USBDEV (0<<3) -#define S3C2410_MISCCR_USBHOST (1<<3) - -#define S3C2410_MISCCR_CLK0_MPLL (0<<4) -#define S3C2410_MISCCR_CLK0_UPLL (1<<4) -#define S3C2410_MISCCR_CLK0_FCLK (2<<4) -#define S3C2410_MISCCR_CLK0_HCLK (3<<4) -#define S3C2410_MISCCR_CLK0_PCLK (4<<4) -#define S3C2410_MISCCR_CLK0_DCLK0 (5<<4) -#define S3C2410_MISCCR_CLK0_MASK (7<<4) - -#define S3C2412_MISCCR_CLK0_RTC (2<<4) - -#define S3C2410_MISCCR_CLK1_MPLL (0<<8) -#define S3C2410_MISCCR_CLK1_UPLL (1<<8) -#define S3C2410_MISCCR_CLK1_FCLK (2<<8) -#define S3C2410_MISCCR_CLK1_HCLK (3<<8) -#define S3C2410_MISCCR_CLK1_PCLK (4<<8) -#define S3C2410_MISCCR_CLK1_DCLK1 (5<<8) -#define S3C2410_MISCCR_CLK1_MASK (7<<8) - -#define S3C2412_MISCCR_CLK1_CLKsrc (0<<8) - -#define S3C2410_MISCCR_USBSUSPND0 (1<<12) -#define S3C2416_MISCCR_SEL_SUSPND (1<<12) -#define S3C2410_MISCCR_USBSUSPND1 (1<<13) - -#define S3C2410_MISCCR_nRSTCON (1<<16) - -#define S3C2410_MISCCR_nEN_SCLK0 (1<<17) -#define S3C2410_MISCCR_nEN_SCLK1 (1<<18) -#define S3C2410_MISCCR_nEN_SCLKE (1<<19) /* not 2412 */ -#define S3C2410_MISCCR_SDSLEEP (7<<17) - -#define S3C2416_MISCCR_FLT_I2C (1<<24) -#define S3C2416_MISCCR_HSSPI_EN2 (1<<31) - -/* external interrupt control... */ -/* S3C2410_EXTINT0 -> irq sense control for EINT0..EINT7 - * S3C2410_EXTINT1 -> irq sense control for EINT8..EINT15 - * S3C2410_EXTINT2 -> irq sense control for EINT16..EINT23 - * - * note S3C2410_EXTINT2 has filtering options for EINT16..EINT23 - * - * Samsung datasheet p9-25 -*/ -#define S3C2410_EXTINT0 S3C2410_GPIOREG(0x88) -#define S3C2410_EXTINT1 S3C2410_GPIOREG(0x8C) -#define S3C2410_EXTINT2 S3C2410_GPIOREG(0x90) - -#define S3C24XX_EXTINT0 S3C24XX_GPIOREG2(0x88) -#define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C) -#define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90) - -/* interrupt filtering control for EINT16..EINT23 */ -#define S3C2410_EINFLT0 S3C2410_GPIOREG(0x94) -#define S3C2410_EINFLT1 S3C2410_GPIOREG(0x98) -#define S3C2410_EINFLT2 S3C2410_GPIOREG(0x9C) -#define S3C2410_EINFLT3 S3C2410_GPIOREG(0xA0) - -#define S3C24XX_EINFLT0 S3C24XX_GPIOREG2(0x94) -#define S3C24XX_EINFLT1 S3C24XX_GPIOREG2(0x98) -#define S3C24XX_EINFLT2 S3C24XX_GPIOREG2(0x9C) -#define S3C24XX_EINFLT3 S3C24XX_GPIOREG2(0xA0) - -/* values for interrupt filtering */ -#define S3C2410_EINTFLT_PCLK (0x00) -#define S3C2410_EINTFLT_EXTCLK (1<<7) -#define S3C2410_EINTFLT_WIDTHMSK(x) ((x) & 0x3f) - -/* removed EINTxxxx defs from here, not meant for this */ - -/* GSTATUS have miscellaneous information in them - * - * These move between s3c2410 and s3c2412 style systems. - */ - -#define S3C2410_GSTATUS0 S3C2410_GPIOREG(0x0AC) -#define S3C2410_GSTATUS1 S3C2410_GPIOREG(0x0B0) -#define S3C2410_GSTATUS2 S3C2410_GPIOREG(0x0B4) -#define S3C2410_GSTATUS3 S3C2410_GPIOREG(0x0B8) -#define S3C2410_GSTATUS4 S3C2410_GPIOREG(0x0BC) - -#define S3C2412_GSTATUS0 S3C2410_GPIOREG(0x0BC) -#define S3C2412_GSTATUS1 S3C2410_GPIOREG(0x0C0) -#define S3C2412_GSTATUS2 S3C2410_GPIOREG(0x0C4) -#define S3C2412_GSTATUS3 S3C2410_GPIOREG(0x0C8) -#define S3C2412_GSTATUS4 S3C2410_GPIOREG(0x0CC) - -#define S3C24XX_GSTATUS0 S3C24XX_GPIOREG2(0x0AC) -#define S3C24XX_GSTATUS1 S3C24XX_GPIOREG2(0x0B0) -#define S3C24XX_GSTATUS2 S3C24XX_GPIOREG2(0x0B4) -#define S3C24XX_GSTATUS3 S3C24XX_GPIOREG2(0x0B8) -#define S3C24XX_GSTATUS4 S3C24XX_GPIOREG2(0x0BC) - -#define S3C2410_GSTATUS0_nWAIT (1<<3) -#define S3C2410_GSTATUS0_NCON (1<<2) -#define S3C2410_GSTATUS0_RnB (1<<1) -#define S3C2410_GSTATUS0_nBATTFLT (1<<0) - -#define S3C2410_GSTATUS1_IDMASK (0xffff0000) -#define S3C2410_GSTATUS1_2410 (0x32410000) -#define S3C2410_GSTATUS1_2412 (0x32412001) -#define S3C2410_GSTATUS1_2416 (0x32416003) -#define S3C2410_GSTATUS1_2440 (0x32440000) -#define S3C2410_GSTATUS1_2442 (0x32440aaa) -/* some 2416 CPUs report this value also */ -#define S3C2410_GSTATUS1_2450 (0x32450003) - -#define S3C2410_GSTATUS2_WTRESET (1<<2) -#define S3C2410_GSTATUS2_OFFRESET (1<<1) -#define S3C2410_GSTATUS2_PONRESET (1<<0) - -/* 2412/2413 sleep configuration registers */ - -#define S3C2412_GPBSLPCON S3C2410_GPIOREG(0x1C) -#define S3C2412_GPCSLPCON S3C2410_GPIOREG(0x2C) -#define S3C2412_GPDSLPCON S3C2410_GPIOREG(0x3C) -#define S3C2412_GPFSLPCON S3C2410_GPIOREG(0x5C) -#define S3C2412_GPGSLPCON S3C2410_GPIOREG(0x6C) -#define S3C2412_GPHSLPCON S3C2410_GPIOREG(0x7C) - -/* definitions for each pin bit */ -#define S3C2412_GPIO_SLPCON_LOW ( 0x00 ) -#define S3C2412_GPIO_SLPCON_HIGH ( 0x01 ) -#define S3C2412_GPIO_SLPCON_IN ( 0x02 ) -#define S3C2412_GPIO_SLPCON_PULL ( 0x03 ) - -#define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2)) -#define S3C2412_SLPCON_HIGH(x) ( 0x01 << ((x) * 2)) -#define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2)) -#define S3C2412_SLPCON_PULL(x) ( 0x03 << ((x) * 2)) -#define S3C2412_SLPCON_EINT(x) ( 0x02 << ((x) * 2)) /* only IRQ pins */ -#define S3C2412_SLPCON_MASK(x) ( 0x03 << ((x) * 2)) - -#define S3C2412_SLPCON_ALL_LOW (0x0) -#define S3C2412_SLPCON_ALL_HIGH (0x11111111 | 0x44444444) -#define S3C2412_SLPCON_ALL_IN (0x22222222 | 0x88888888) -#define S3C2412_SLPCON_ALL_PULL (0x33333333) - -#endif /* __ASM_ARCH_REGS_GPIO_H */ - diff --git a/arch/arm/mach-s3c/regs-gpio.h b/arch/arm/mach-s3c/regs-gpio.h index 0d41cb76d440..4e08e8609663 100644 --- a/arch/arm/mach-s3c/regs-gpio.h +++ b/arch/arm/mach-s3c/regs-gpio.h @@ -1,9 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ - -#ifdef CONFIG_ARCH_S3C24XX -#include "regs-gpio-s3c24xx.h" -#endif - -#ifdef CONFIG_ARCH_S3C64XX #include "regs-gpio-s3c64xx.h" -#endif diff --git a/arch/arm/mach-s3c/regs-irq-s3c24xx.h b/arch/arm/mach-s3c/regs-irq-s3c24xx.h deleted file mode 100644 index c0b97b203415..000000000000 --- a/arch/arm/mach-s3c/regs-irq-s3c24xx.h +++ /dev/null @@ -1,51 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - */ - - -#ifndef ___ASM_ARCH_REGS_IRQ_H -#define ___ASM_ARCH_REGS_IRQ_H - -#include "map-s3c.h" - -/* interrupt controller */ - -#define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) -#define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO) -#define S3C24XX_EINTREG(x) ((x) + S3C24XX_VA_GPIO2) - -#define S3C2410_SRCPND S3C2410_IRQREG(0x000) -#define S3C2410_INTMOD S3C2410_IRQREG(0x004) -#define S3C2410_INTMSK S3C2410_IRQREG(0x008) -#define S3C2410_PRIORITY S3C2410_IRQREG(0x00C) -#define S3C2410_INTPND S3C2410_IRQREG(0x010) -#define S3C2410_INTOFFSET S3C2410_IRQREG(0x014) -#define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018) -#define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C) - -#define S3C2416_PRIORITY_MODE1 S3C2410_IRQREG(0x030) -#define S3C2416_PRIORITY_UPDATE1 S3C2410_IRQREG(0x034) -#define S3C2416_SRCPND2 S3C2410_IRQREG(0x040) -#define S3C2416_INTMOD2 S3C2410_IRQREG(0x044) -#define S3C2416_INTMSK2 S3C2410_IRQREG(0x048) -#define S3C2416_INTPND2 S3C2410_IRQREG(0x050) -#define S3C2416_INTOFFSET2 S3C2410_IRQREG(0x054) -#define S3C2416_PRIORITY_MODE2 S3C2410_IRQREG(0x070) -#define S3C2416_PRIORITY_UPDATE2 S3C2410_IRQREG(0x074) - -/* mask: 0=enable, 1=disable - * 1 bit EINT, 4=EINT4, 23=EINT23 - * EINT0,1,2,3 are not handled here. -*/ - -#define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4) -#define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8) -#define S3C2412_EINTMASK S3C2410_EINTREG(0x0B4) -#define S3C2412_EINTPEND S3C2410_EINTREG(0X0B8) - -#define S3C24XX_EINTMASK S3C24XX_EINTREG(0x0A4) -#define S3C24XX_EINTPEND S3C24XX_EINTREG(0X0A8) - -#endif /* ___ASM_ARCH_REGS_IRQ_H */ diff --git a/arch/arm/mach-s3c/regs-irq.h b/arch/arm/mach-s3c/regs-irq.h index 57f0dda8dbf5..4243daa54bd1 100644 --- a/arch/arm/mach-s3c/regs-irq.h +++ b/arch/arm/mach-s3c/regs-irq.h @@ -1,9 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ - -#ifdef CONFIG_ARCH_S3C24XX -#include "regs-irq-s3c24xx.h" -#endif - -#ifdef CONFIG_ARCH_S3C64XX #include "regs-irq-s3c64xx.h" -#endif diff --git a/arch/arm/mach-s3c/regs-mem-s3c24xx.h b/arch/arm/mach-s3c/regs-mem-s3c24xx.h deleted file mode 100644 index 8fed34a1672a..000000000000 --- a/arch/arm/mach-s3c/regs-mem-s3c24xx.h +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - * - * S3C2410 Memory Control register definitions - */ - -#ifndef __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H -#define __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H __FILE__ - -#include "map-s3c.h" - -#define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) - -#define S3C2410_BWSCON S3C2410_MEMREG(0x00) -#define S3C2410_BANKCON0 S3C2410_MEMREG(0x04) -#define S3C2410_BANKCON1 S3C2410_MEMREG(0x08) -#define S3C2410_BANKCON2 S3C2410_MEMREG(0x0C) -#define S3C2410_BANKCON3 S3C2410_MEMREG(0x10) -#define S3C2410_BANKCON4 S3C2410_MEMREG(0x14) -#define S3C2410_BANKCON5 S3C2410_MEMREG(0x18) -#define S3C2410_BANKCON6 S3C2410_MEMREG(0x1C) -#define S3C2410_BANKCON7 S3C2410_MEMREG(0x20) -#define S3C2410_REFRESH S3C2410_MEMREG(0x24) -#define S3C2410_BANKSIZE S3C2410_MEMREG(0x28) - -#define S3C2410_BWSCON_ST1 (1 << 7) -#define S3C2410_BWSCON_ST2 (1 << 11) -#define S3C2410_BWSCON_ST3 (1 << 15) -#define S3C2410_BWSCON_ST4 (1 << 19) -#define S3C2410_BWSCON_ST5 (1 << 23) - -#define S3C2410_BWSCON_GET(_bwscon, _bank) (((_bwscon) >> ((_bank) * 4)) & 0xf) - -#define S3C2410_BWSCON_WS (1 << 2) - -#define S3C2410_BANKCON_PMC16 (0x3) - -#define S3C2410_BANKCON_Tacp_SHIFT (2) -#define S3C2410_BANKCON_Tcah_SHIFT (4) -#define S3C2410_BANKCON_Tcoh_SHIFT (6) -#define S3C2410_BANKCON_Tacc_SHIFT (8) -#define S3C2410_BANKCON_Tcos_SHIFT (11) -#define S3C2410_BANKCON_Tacs_SHIFT (13) - -#define S3C2410_BANKCON_SDRAM (0x3 << 15) - -#define S3C2410_REFRESH_SELF (1 << 22) - -#define S3C2410_BANKSIZE_MASK (0x7 << 0) - -#endif /* __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H */ diff --git a/arch/arm/mach-s3c/regs-s3c2443-clock.h b/arch/arm/mach-s3c/regs-s3c2443-clock.h deleted file mode 100644 index b3b670d463db..000000000000 --- a/arch/arm/mach-s3c/regs-s3c2443-clock.h +++ /dev/null @@ -1,238 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2007 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C2443 clock register definitions - */ - -#ifndef __ASM_ARM_REGS_S3C2443_CLOCK -#define __ASM_ARM_REGS_S3C2443_CLOCK - -#include <linux/delay.h> -#include "map-s3c.h" - -#define S3C2443_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) - -#define S3C2443_PLLCON_MDIVSHIFT 16 -#define S3C2443_PLLCON_PDIVSHIFT 8 -#define S3C2443_PLLCON_SDIVSHIFT 0 -#define S3C2443_PLLCON_MDIVMASK ((1<<(1+(23-16)))-1) -#define S3C2443_PLLCON_PDIVMASK ((1<<(1+(9-8)))-1) -#define S3C2443_PLLCON_SDIVMASK (3) - -#define S3C2443_MPLLCON S3C2443_CLKREG(0x10) -#define S3C2443_EPLLCON S3C2443_CLKREG(0x18) -#define S3C2443_CLKSRC S3C2443_CLKREG(0x20) -#define S3C2443_CLKDIV0 S3C2443_CLKREG(0x24) -#define S3C2443_CLKDIV1 S3C2443_CLKREG(0x28) -#define S3C2443_HCLKCON S3C2443_CLKREG(0x30) -#define S3C2443_PCLKCON S3C2443_CLKREG(0x34) -#define S3C2443_SCLKCON S3C2443_CLKREG(0x38) -#define S3C2443_PWRMODE S3C2443_CLKREG(0x40) -#define S3C2443_SWRST S3C2443_CLKREG(0x44) -#define S3C2443_BUSPRI0 S3C2443_CLKREG(0x50) -#define S3C2443_SYSID S3C2443_CLKREG(0x5C) -#define S3C2443_PWRCFG S3C2443_CLKREG(0x60) -#define S3C2443_RSTCON S3C2443_CLKREG(0x64) -#define S3C2443_PHYCTRL S3C2443_CLKREG(0x80) -#define S3C2443_PHYPWR S3C2443_CLKREG(0x84) -#define S3C2443_URSTCON S3C2443_CLKREG(0x88) -#define S3C2443_UCLKCON S3C2443_CLKREG(0x8C) - -#define S3C2443_PLLCON_OFF (1<<24) - -#define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7) -#define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7) -#define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7) -#define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7) -#define S3C2443_CLKSRC_EPLLREF_MASK (3<<7) - -#define S3C2443_CLKSRC_EXTCLK_DIV (1<<3) - -#define S3C2443_CLKDIV0_HALF_HCLK (1<<3) -#define S3C2443_CLKDIV0_HALF_PCLK (1<<2) - -#define S3C2443_CLKDIV0_HCLKDIV_MASK (3<<0) - -#define S3C2443_CLKDIV0_EXTDIV_MASK (3<<6) -#define S3C2443_CLKDIV0_EXTDIV_SHIFT (6) - -#define S3C2443_CLKDIV0_PREDIV_MASK (3<<4) -#define S3C2443_CLKDIV0_PREDIV_SHIFT (4) - -#define S3C2416_CLKDIV0_ARMDIV_MASK (7 << 9) -#define S3C2443_CLKDIV0_ARMDIV_MASK (15<<9) -#define S3C2443_CLKDIV0_ARMDIV_SHIFT (9) -#define S3C2443_CLKDIV0_ARMDIV_1 (0<<9) -#define S3C2443_CLKDIV0_ARMDIV_2 (8<<9) -#define S3C2443_CLKDIV0_ARMDIV_3 (2<<9) -#define S3C2443_CLKDIV0_ARMDIV_4 (9<<9) -#define S3C2443_CLKDIV0_ARMDIV_6 (10<<9) -#define S3C2443_CLKDIV0_ARMDIV_8 (11<<9) -#define S3C2443_CLKDIV0_ARMDIV_12 (13<<9) -#define S3C2443_CLKDIV0_ARMDIV_16 (15<<9) - -/* S3C2443_CLKDIV1 removed, only used in clock.c code */ - -#define S3C2443_CLKCON_NAND - -#define S3C2443_HCLKCON_DMA0 (1<<0) -#define S3C2443_HCLKCON_DMA1 (1<<1) -#define S3C2443_HCLKCON_DMA2 (1<<2) -#define S3C2443_HCLKCON_DMA3 (1<<3) -#define S3C2443_HCLKCON_DMA4 (1<<4) -#define S3C2443_HCLKCON_DMA5 (1<<5) -#define S3C2443_HCLKCON_CAMIF (1<<8) -#define S3C2443_HCLKCON_LCDC (1<<9) -#define S3C2443_HCLKCON_USBH (1<<11) -#define S3C2443_HCLKCON_USBD (1<<12) -#define S3C2416_HCLKCON_HSMMC0 (1<<15) -#define S3C2443_HCLKCON_HSMMC (1<<16) -#define S3C2443_HCLKCON_CFC (1<<17) -#define S3C2443_HCLKCON_SSMC (1<<18) -#define S3C2443_HCLKCON_DRAMC (1<<19) - -#define S3C2443_PCLKCON_UART0 (1<<0) -#define S3C2443_PCLKCON_UART1 (1<<1) -#define S3C2443_PCLKCON_UART2 (1<<2) -#define S3C2443_PCLKCON_UART3 (1<<3) -#define S3C2443_PCLKCON_IIC (1<<4) -#define S3C2443_PCLKCON_SDI (1<<5) -#define S3C2443_PCLKCON_HSSPI (1<<6) -#define S3C2443_PCLKCON_ADC (1<<7) -#define S3C2443_PCLKCON_AC97 (1<<8) -#define S3C2443_PCLKCON_IIS (1<<9) -#define S3C2443_PCLKCON_PWMT (1<<10) -#define S3C2443_PCLKCON_WDT (1<<11) -#define S3C2443_PCLKCON_RTC (1<<12) -#define S3C2443_PCLKCON_GPIO (1<<13) -#define S3C2443_PCLKCON_SPI0 (1<<14) -#define S3C2443_PCLKCON_SPI1 (1<<15) - -#define S3C2443_SCLKCON_DDRCLK (1<<16) -#define S3C2443_SCLKCON_SSMCCLK (1<<15) -#define S3C2443_SCLKCON_HSSPICLK (1<<14) -#define S3C2443_SCLKCON_HSMMCCLK_EXT (1<<13) -#define S3C2443_SCLKCON_HSMMCCLK_EPLL (1<<12) -#define S3C2443_SCLKCON_CAMCLK (1<<11) -#define S3C2443_SCLKCON_DISPCLK (1<<10) -#define S3C2443_SCLKCON_I2SCLK (1<<9) -#define S3C2443_SCLKCON_UARTCLK (1<<8) -#define S3C2443_SCLKCON_USBHOST (1<<1) - -#define S3C2443_PWRCFG_SLEEP (1<<15) - -#define S3C2443_PWRCFG_USBPHY (1 << 4) - -#define S3C2443_URSTCON_FUNCRST (1 << 2) -#define S3C2443_URSTCON_PHYRST (1 << 0) - -#define S3C2443_PHYCTRL_CLKSEL (1 << 3) -#define S3C2443_PHYCTRL_EXTCLK (1 << 2) -#define S3C2443_PHYCTRL_PLLSEL (1 << 1) -#define S3C2443_PHYCTRL_DSPORT (1 << 0) - -#define S3C2443_PHYPWR_COMMON_ON (1 << 31) -#define S3C2443_PHYPWR_ANALOG_PD (1 << 4) -#define S3C2443_PHYPWR_PLL_REFCLK (1 << 3) -#define S3C2443_PHYPWR_XO_ON (1 << 2) -#define S3C2443_PHYPWR_PLL_PWRDN (1 << 1) -#define S3C2443_PHYPWR_FSUSPEND (1 << 0) - -#define S3C2443_UCLKCON_DETECT_VBUS (1 << 31) -#define S3C2443_UCLKCON_FUNC_CLKEN (1 << 2) -#define S3C2443_UCLKCON_TCLKEN (1 << 0) - -#include <asm/div64.h> - -static inline unsigned int -s3c2443_get_mpll(unsigned int pllval, unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT; - pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT; - sdiv = pllval >> S3C2443_PLLCON_SDIVSHIFT; - - mdiv &= S3C2443_PLLCON_MDIVMASK; - pdiv &= S3C2443_PLLCON_PDIVMASK; - sdiv &= S3C2443_PLLCON_SDIVMASK; - - fvco = (uint64_t)baseclk * (2 * (mdiv + 8)); - do_div(fvco, pdiv << sdiv); - - return (unsigned int)fvco; -} - -static inline unsigned int -s3c2443_get_epll(unsigned int pllval, unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT; - pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT; - sdiv = pllval >> S3C2443_PLLCON_SDIVSHIFT; - - mdiv &= S3C2443_PLLCON_MDIVMASK; - pdiv &= S3C2443_PLLCON_PDIVMASK; - sdiv &= S3C2443_PLLCON_SDIVMASK; - - fvco = (uint64_t)baseclk * (mdiv + 8); - do_div(fvco, (pdiv + 2) << sdiv); - - return (unsigned int)fvco; -} - -static inline void s3c_hsudc_init_phy(void) -{ - u32 cfg; - - cfg = readl(S3C2443_PWRCFG) | S3C2443_PWRCFG_USBPHY; - writel(cfg, S3C2443_PWRCFG); - - cfg = readl(S3C2443_URSTCON); - cfg |= (S3C2443_URSTCON_FUNCRST | S3C2443_URSTCON_PHYRST); - writel(cfg, S3C2443_URSTCON); - mdelay(1); - - cfg = readl(S3C2443_URSTCON); - cfg &= ~(S3C2443_URSTCON_FUNCRST | S3C2443_URSTCON_PHYRST); - writel(cfg, S3C2443_URSTCON); - - cfg = readl(S3C2443_PHYCTRL); - cfg &= ~(S3C2443_PHYCTRL_CLKSEL | S3C2443_PHYCTRL_DSPORT); - cfg |= (S3C2443_PHYCTRL_EXTCLK | S3C2443_PHYCTRL_PLLSEL); - writel(cfg, S3C2443_PHYCTRL); - - cfg = readl(S3C2443_PHYPWR); - cfg &= ~(S3C2443_PHYPWR_FSUSPEND | S3C2443_PHYPWR_PLL_PWRDN | - S3C2443_PHYPWR_XO_ON | S3C2443_PHYPWR_PLL_REFCLK | - S3C2443_PHYPWR_ANALOG_PD); - cfg |= S3C2443_PHYPWR_COMMON_ON; - writel(cfg, S3C2443_PHYPWR); - - cfg = readl(S3C2443_UCLKCON); - cfg |= (S3C2443_UCLKCON_DETECT_VBUS | S3C2443_UCLKCON_FUNC_CLKEN | - S3C2443_UCLKCON_TCLKEN); - writel(cfg, S3C2443_UCLKCON); -} - -static inline void s3c_hsudc_uninit_phy(void) -{ - u32 cfg; - - cfg = readl(S3C2443_PWRCFG) & ~S3C2443_PWRCFG_USBPHY; - writel(cfg, S3C2443_PWRCFG); - - writel(S3C2443_PHYPWR_FSUSPEND, S3C2443_PHYPWR); - - cfg = readl(S3C2443_UCLKCON) & ~S3C2443_UCLKCON_FUNC_CLKEN; - writel(cfg, S3C2443_UCLKCON); -} - -#endif /* __ASM_ARM_REGS_S3C2443_CLOCK */ - diff --git a/arch/arm/mach-s3c/regs-srom-s3c64xx.h b/arch/arm/mach-s3c/regs-srom-s3c64xx.h deleted file mode 100644 index 2b37988bdf94..000000000000 --- a/arch/arm/mach-s3c/regs-srom-s3c64xx.h +++ /dev/null @@ -1,55 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2009 Andy Green <andy@warmcat.com> - * - * S3C64XX SROM definitions - */ - -#ifndef __MACH_S3C64XX_REGS_SROM_H -#define __MACH_S3C64XX_REGS_SROM_H __FILE__ - -#define S3C64XX_SROMREG(x) (S3C_VA_MEM + (x)) - -#define S3C64XX_SROM_BW S3C64XX_SROMREG(0) -#define S3C64XX_SROM_BC0 S3C64XX_SROMREG(4) -#define S3C64XX_SROM_BC1 S3C64XX_SROMREG(8) -#define S3C64XX_SROM_BC2 S3C64XX_SROMREG(0xc) -#define S3C64XX_SROM_BC3 S3C64XX_SROMREG(0x10) -#define S3C64XX_SROM_BC4 S3C64XX_SROMREG(0x14) -#define S3C64XX_SROM_BC5 S3C64XX_SROMREG(0x18) - -/* - * one register BW holds 5 x 4-bit packed settings for NCS0 - NCS4 - */ - -#define S3C64XX_SROM_BW__DATAWIDTH__SHIFT 0 -#define S3C64XX_SROM_BW__WAITENABLE__SHIFT 2 -#define S3C64XX_SROM_BW__BYTEENABLE__SHIFT 3 -#define S3C64XX_SROM_BW__CS_MASK 0xf - -#define S3C64XX_SROM_BW__NCS0__SHIFT 0 -#define S3C64XX_SROM_BW__NCS1__SHIFT 4 -#define S3C64XX_SROM_BW__NCS2__SHIFT 8 -#define S3C64XX_SROM_BW__NCS3__SHIFT 0xc -#define S3C64XX_SROM_BW__NCS4__SHIFT 0x10 - -/* - * applies to same to BCS0 - BCS4 - */ - -#define S3C64XX_SROM_BCX__PMC__SHIFT 0 -#define S3C64XX_SROM_BCX__PMC__MASK 3 -#define S3C64XX_SROM_BCX__TACP__SHIFT 4 -#define S3C64XX_SROM_BCX__TACP__MASK 0xf -#define S3C64XX_SROM_BCX__TCAH__SHIFT 8 -#define S3C64XX_SROM_BCX__TCAH__MASK 0xf -#define S3C64XX_SROM_BCX__TCOH__SHIFT 12 -#define S3C64XX_SROM_BCX__TCOH__MASK 0xf -#define S3C64XX_SROM_BCX__TACC__SHIFT 16 -#define S3C64XX_SROM_BCX__TACC__MASK 0x1f -#define S3C64XX_SROM_BCX__TCOS__SHIFT 24 -#define S3C64XX_SROM_BCX__TCOS__MASK 0xf -#define S3C64XX_SROM_BCX__TACS__SHIFT 28 -#define S3C64XX_SROM_BCX__TACS__MASK 0xf - -#endif /* __MACH_S3C64XX_REGS_SROM_H */ diff --git a/arch/arm/mach-s3c/rtc-core-s3c24xx.h b/arch/arm/mach-s3c/rtc-core-s3c24xx.h deleted file mode 100644 index e7258b2423fc..000000000000 --- a/arch/arm/mach-s3c/rtc-core-s3c24xx.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de> - * - * Samsung RTC Controller core functions - */ - -#ifndef __RTC_CORE_S3C24XX_H -#define __RTC_CORE_S3C24XX_H __FILE__ - -/* These functions are only for use with the core support code, such as - * the cpu specific initialisation code - */ - -extern struct platform_device s3c_device_rtc; - -/* re-define device name depending on support. */ -static inline void s3c_rtc_setname(char *name) -{ - s3c_device_rtc.name = name; -} - -#endif /* __RTC_CORE_S3C24XX_H */ diff --git a/arch/arm/mach-s3c/s3c2410.c b/arch/arm/mach-s3c/s3c2410.c deleted file mode 100644 index 4d39d9939c2f..000000000000 --- a/arch/arm/mach-s3c/s3c2410.c +++ /dev/null @@ -1,130 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2003-2005 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://www.simtec.co.uk/products/EB2410ITX/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/reboot.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "map.h" -#include "gpio-samsung.h" -#include <asm/irq.h> -#include <asm/system_misc.h> - - -#include "regs-clock.h" - -#include "cpu.h" -#include "devs.h" -#include "pm.h" - -#include "gpio-core.h" -#include "gpio-cfg.h" -#include "gpio-cfg-helpers.h" - -#include "s3c24xx.h" - -/* Initial IO mappings */ - -static struct map_desc s3c2410_iodesc[] __initdata __maybe_unused = { - IODESC_ENT(CLKPWR), - IODESC_ENT(TIMER), - IODESC_ENT(WATCHDOG), -}; - -/* our uart devices */ - -/* uart registration process */ - -void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no); -} - -/* s3c2410_map_io - * - * register the standard cpu IO areas, and any passed in from the - * machine specific initialisation. -*/ - -void __init s3c2410_map_io(void) -{ - s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; - s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; - - iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); -} - -struct bus_type s3c2410_subsys = { - .name = "s3c2410-core", - .dev_name = "s3c2410-core", -}; - -/* Note, we would have liked to name this s3c2410-core, but we cannot - * register two subsystems with the same name. - */ -struct bus_type s3c2410a_subsys = { - .name = "s3c2410a-core", - .dev_name = "s3c2410a-core", -}; - -static struct device s3c2410_dev = { - .bus = &s3c2410_subsys, -}; - -/* need to register the subsystem before we actually register the device, and - * we also need to ensure that it has been initialised before any of the - * drivers even try to use it (even if not on an s3c2410 based system) - * as a driver which may support both 2410 and 2440 may try and use it. -*/ - -static int __init s3c2410_core_init(void) -{ - return subsys_system_register(&s3c2410_subsys, NULL); -} - -core_initcall(s3c2410_core_init); - -static int __init s3c2410a_core_init(void) -{ - return subsys_system_register(&s3c2410a_subsys, NULL); -} - -core_initcall(s3c2410a_core_init); - -int __init s3c2410_init(void) -{ - printk("S3C2410: Initialising architecture\n"); - -#ifdef CONFIG_PM_SLEEP - register_syscore_ops(&s3c2410_pm_syscore_ops); - register_syscore_ops(&s3c24xx_irq_syscore_ops); -#endif - - return device_register(&s3c2410_dev); -} - -int __init s3c2410a_init(void) -{ - s3c2410_dev.bus = &s3c2410a_subsys; - return s3c2410_init(); -} diff --git a/arch/arm/mach-s3c/s3c2412-power.h b/arch/arm/mach-s3c/s3c2412-power.h deleted file mode 100644 index 0031cfaa1d76..000000000000 --- a/arch/arm/mach-s3c/s3c2412-power.h +++ /dev/null @@ -1,34 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - */ - -#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H -#define __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H __FILE__ - -#define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR) - -#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) -#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) - -#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70) -#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74) -#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78) -#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C) - -#define S3C2412_PWRCFG_BATF_IRQ (1 << 0) -#define S3C2412_PWRCFG_BATF_IGNORE (2 << 0) -#define S3C2412_PWRCFG_BATF_SLEEP (3 << 0) -#define S3C2412_PWRCFG_BATF_MASK (3 << 0) - -#define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0 << 6) -#define S3C2412_PWRCFG_STANDBYWFI_IDLE (1 << 6) -#define S3C2412_PWRCFG_STANDBYWFI_STOP (2 << 6) -#define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3 << 6) -#define S3C2412_PWRCFG_STANDBYWFI_MASK (3 << 6) - -#define S3C2412_PWRCFG_RTC_MASKIRQ (1 << 8) -#define S3C2412_PWRCFG_NAND_NORST (1 << 9) - -#endif /* __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H */ diff --git a/arch/arm/mach-s3c/s3c2412.c b/arch/arm/mach-s3c/s3c2412.c deleted file mode 100644 index 0b1ca78c9d2a..000000000000 --- a/arch/arm/mach-s3c/s3c2412.c +++ /dev/null @@ -1,175 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2006 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://armlinux.simtec.co.uk/. - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/reboot.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/proc-fns.h> -#include <asm/irq.h> -#include <asm/system_misc.h> - -#include "map.h" -#include "regs-clock.h" -#include "regs-gpio.h" - -#include "cpu.h" -#include "devs.h" -#include "pm.h" - -#include "s3c24xx.h" -#include "nand-core-s3c24xx.h" -#include "regs-dsc-s3c24xx.h" -#include "s3c2412-power.h" - -#ifndef CONFIG_CPU_S3C2412_ONLY -void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; - -static inline void s3c2412_init_gpio2(void) -{ - s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10; -} -#else -#define s3c2412_init_gpio2() do { } while(0) -#endif - -/* Initial IO mappings */ - -static struct map_desc s3c2412_iodesc[] __initdata __maybe_unused = { - IODESC_ENT(CLKPWR), - IODESC_ENT(TIMER), - IODESC_ENT(WATCHDOG), - { - .virtual = (unsigned long)S3C2412_VA_SSMC, - .pfn = __phys_to_pfn(S3C2412_PA_SSMC), - .length = SZ_1M, - .type = MT_DEVICE, - }, - { - .virtual = (unsigned long)S3C2412_VA_EBI, - .pfn = __phys_to_pfn(S3C2412_PA_EBI), - .length = SZ_1M, - .type = MT_DEVICE, - }, -}; - -/* uart registration process */ - -void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no); - - /* rename devices that are s3c2412/s3c2413 specific */ - s3c_device_sdi.name = "s3c2412-sdi"; - s3c_device_lcd.name = "s3c2412-lcd"; - s3c_nand_setname("s3c2412-nand"); - - /* alter IRQ of SDI controller */ - - s3c_device_sdi.resource[1].start = IRQ_S3C2412_SDI; - s3c_device_sdi.resource[1].end = IRQ_S3C2412_SDI; - - /* spi channel related changes, s3c2412/13 specific */ - s3c_device_spi0.name = "s3c2412-spi"; - s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24; - s3c_device_spi1.name = "s3c2412-spi"; - s3c_device_spi1.resource[0].start = S3C24XX_PA_SPI + S3C2412_SPI1; - s3c_device_spi1.resource[0].end = S3C24XX_PA_SPI + S3C2412_SPI1 + 0x24; - -} - -/* s3c2412_idle - * - * use the standard idle call by ensuring the idle mode - * in power config, then issuing the idle co-processor - * instruction -*/ - -static void s3c2412_idle(void) -{ - unsigned long tmp; - - /* ensure our idle mode is to go to idle */ - - tmp = __raw_readl(S3C2412_PWRCFG); - tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK; - tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE; - __raw_writel(tmp, S3C2412_PWRCFG); - - cpu_do_idle(); -} - -/* s3c2412_map_io - * - * register the standard cpu IO areas, and any passed in from the - * machine specific initialisation. -*/ - -void __init s3c2412_map_io(void) -{ - /* move base of IO */ - - s3c2412_init_gpio2(); - - /* set our idle function */ - - arm_pm_idle = s3c2412_idle; - - /* register our io-tables */ - - iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); -} - -/* need to register the subsystem before we actually register the device, and - * we also need to ensure that it has been initialised before any of the - * drivers even try to use it (even if not on an s3c2412 based system) - * as a driver which may support both 2410 and 2440 may try and use it. -*/ - -struct bus_type s3c2412_subsys = { - .name = "s3c2412-core", - .dev_name = "s3c2412-core", -}; - -static int __init s3c2412_core_init(void) -{ - return subsys_system_register(&s3c2412_subsys, NULL); -} - -core_initcall(s3c2412_core_init); - -static struct device s3c2412_dev = { - .bus = &s3c2412_subsys, -}; - -int __init s3c2412_init(void) -{ - printk("S3C2412: Initialising architecture\n"); - -#ifdef CONFIG_PM_SLEEP - register_syscore_ops(&s3c2412_pm_syscore_ops); - register_syscore_ops(&s3c24xx_irq_syscore_ops); -#endif - - return device_register(&s3c2412_dev); -} diff --git a/arch/arm/mach-s3c/s3c2412.h b/arch/arm/mach-s3c/s3c2412.h deleted file mode 100644 index ed09a0e13bd8..000000000000 --- a/arch/arm/mach-s3c/s3c2412.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - */ - -#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_H -#define __ARCH_ARM_MACH_S3C24XX_S3C2412_H __FILE__ - -#include "map-s3c.h" - -#define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) -#define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x)) - -#define S3C2412_SSMCREG(x) (S3C2412_VA_SSMC + (x)) -#define S3C2412_SSMC(x, o) (S3C2412_SSMCREG((x * 0x20) + (o))) - -#define S3C2412_REFRESH S3C2412_MEMREG(0x10) - -#define S3C2412_EBI_BANKCFG S3C2412_EBIREG(0x4) - -#define S3C2412_SSMC_BANK(x) S3C2412_SSMC(x, 0x0) - -#endif /* __ARCH_ARM_MACH_S3C24XX_S3C2412_H */ diff --git a/arch/arm/mach-s3c/s3c2416.c b/arch/arm/mach-s3c/s3c2416.c deleted file mode 100644 index 126e6ed29713..000000000000 --- a/arch/arm/mach-s3c/s3c2416.c +++ /dev/null @@ -1,132 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>, -// as part of OpenInkpot project -// Copyright (c) 2009 Promwad Innovation Company -// Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> -// -// Samsung S3C2416 Mobile CPU support - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/reboot.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "map.h" -#include "gpio-samsung.h" -#include <asm/proc-fns.h> -#include <asm/irq.h> -#include <asm/system_misc.h> - -#include "regs-s3c2443-clock.h" -#include "rtc-core-s3c24xx.h" - -#include "gpio-core.h" -#include "gpio-cfg.h" -#include "gpio-cfg-helpers.h" -#include "devs.h" -#include "cpu.h" -#include "sdhci.h" -#include "pm.h" - -#include "iic-core.h" -#include "adc-core.h" - -#include "s3c24xx.h" -#include "fb-core-s3c24xx.h" -#include "nand-core-s3c24xx.h" -#include "spi-core-s3c24xx.h" - -static struct map_desc s3c2416_iodesc[] __initdata __maybe_unused = { - IODESC_ENT(WATCHDOG), - IODESC_ENT(CLKPWR), - IODESC_ENT(TIMER), -}; - -struct bus_type s3c2416_subsys = { - .name = "s3c2416-core", - .dev_name = "s3c2416-core", -}; - -static struct device s3c2416_dev = { - .bus = &s3c2416_subsys, -}; - -int __init s3c2416_init(void) -{ - printk(KERN_INFO "S3C2416: Initializing architecture\n"); - - /* change WDT IRQ number */ - s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; - s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; - - /* the i2c devices are directly compatible with s3c2440 */ - s3c_i2c0_setname("s3c2440-i2c"); - s3c_i2c1_setname("s3c2440-i2c"); - - s3c_fb_setname("s3c2443-fb"); - - s3c_adc_setname("s3c2416-adc"); - s3c_rtc_setname("s3c2416-rtc"); - -#ifdef CONFIG_PM_SLEEP - register_syscore_ops(&s3c2416_pm_syscore_ops); - register_syscore_ops(&s3c24xx_irq_syscore_ops); - register_syscore_ops(&s3c2416_irq_syscore_ops); -#endif - - return device_register(&s3c2416_dev); -} - -void __init s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); - - s3c_nand_setname("s3c2412-nand"); -} - -/* s3c2416_map_io - * - * register the standard cpu IO areas, and any passed in from the - * machine specific initialisation. - */ - -void __init s3c2416_map_io(void) -{ - s3c24xx_gpiocfg_default.set_pull = samsung_gpio_setpull_updown; - s3c24xx_gpiocfg_default.get_pull = samsung_gpio_getpull_updown; - - /* initialize device information early */ - s3c2416_default_sdhci0(); - s3c2416_default_sdhci1(); - s3c24xx_spi_setname("s3c2443-spi"); - - iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc)); -} - -/* need to register the subsystem before we actually register the device, and - * we also need to ensure that it has been initialised before any of the - * drivers even try to use it (even if not on an s3c2416 based system) - * as a driver which may support both 2443 and 2440 may try and use it. -*/ - -static int __init s3c2416_core_init(void) -{ - return subsys_system_register(&s3c2416_subsys, NULL); -} - -core_initcall(s3c2416_core_init); diff --git a/arch/arm/mach-s3c/s3c2440.c b/arch/arm/mach-s3c/s3c2440.c deleted file mode 100644 index c6cdee4987e8..000000000000 --- a/arch/arm/mach-s3c/s3c2440.c +++ /dev/null @@ -1,71 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2004-2006 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Samsung S3C2440 Mobile CPU support - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/gpio.h> -#include <linux/clk.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/irq.h> - -#include "devs.h" -#include "cpu.h" -#include "pm.h" - -#include "gpio-core.h" -#include "gpio-cfg.h" -#include "gpio-cfg-helpers.h" -#include "gpio-samsung.h" - -#include "s3c24xx.h" - -static struct device s3c2440_dev = { - .bus = &s3c2440_subsys, -}; - -int __init s3c2440_init(void) -{ - printk("S3C2440: Initialising architecture\n"); - - /* change irq for watchdog */ - - s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; - s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT; - - /* register suspend/resume handlers */ - -#ifdef CONFIG_PM_SLEEP - register_syscore_ops(&s3c2410_pm_syscore_ops); - register_syscore_ops(&s3c24xx_irq_syscore_ops); - register_syscore_ops(&s3c244x_pm_syscore_ops); -#endif - - /* register our system device for everything else */ - - return device_register(&s3c2440_dev); -} - -void __init s3c2440_map_io(void) -{ - s3c244x_map_io(); - - s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; - s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; -} diff --git a/arch/arm/mach-s3c/s3c2442.c b/arch/arm/mach-s3c/s3c2442.c deleted file mode 100644 index 0c0e30b6688f..000000000000 --- a/arch/arm/mach-s3c/s3c2442.c +++ /dev/null @@ -1,62 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2004-2005 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// -// S3C2442 core and lock support - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/mutex.h> -#include <linux/gpio.h> -#include <linux/clk.h> -#include <linux/io.h> - -#include <linux/atomic.h> -#include <asm/irq.h> - -#include "regs-clock.h" - -#include "cpu.h" -#include "pm.h" - -#include "gpio-core.h" -#include "gpio-cfg.h" -#include "gpio-cfg-helpers.h" -#include "gpio-samsung.h" - -#include "s3c24xx.h" - -static struct device s3c2442_dev = { - .bus = &s3c2442_subsys, -}; - -int __init s3c2442_init(void) -{ - printk("S3C2442: Initialising architecture\n"); - -#ifdef CONFIG_PM_SLEEP - register_syscore_ops(&s3c2410_pm_syscore_ops); - register_syscore_ops(&s3c24xx_irq_syscore_ops); - register_syscore_ops(&s3c244x_pm_syscore_ops); -#endif - - return device_register(&s3c2442_dev); -} - -void __init s3c2442_map_io(void) -{ - s3c244x_map_io(); - - s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1down; - s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1down; -} diff --git a/arch/arm/mach-s3c/s3c2443.c b/arch/arm/mach-s3c/s3c2443.c deleted file mode 100644 index 05c3c298b9f8..000000000000 --- a/arch/arm/mach-s3c/s3c2443.c +++ /dev/null @@ -1,112 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2007 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Samsung S3C2443 Mobile CPU support - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/device.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/reboot.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "map.h" -#include "gpio-samsung.h" -#include "irqs.h" -#include <asm/irq.h> -#include <asm/system_misc.h> - -#include "regs-s3c2443-clock.h" -#include "rtc-core-s3c24xx.h" - -#include "gpio-core.h" -#include "gpio-cfg.h" -#include "gpio-cfg-helpers.h" -#include "devs.h" -#include "cpu.h" -#include "adc-core.h" - -#include "s3c24xx.h" -#include "fb-core-s3c24xx.h" -#include "nand-core-s3c24xx.h" -#include "spi-core-s3c24xx.h" - -static struct map_desc s3c2443_iodesc[] __initdata __maybe_unused = { - IODESC_ENT(WATCHDOG), - IODESC_ENT(CLKPWR), - IODESC_ENT(TIMER), -}; - -struct bus_type s3c2443_subsys = { - .name = "s3c2443-core", - .dev_name = "s3c2443-core", -}; - -static struct device s3c2443_dev = { - .bus = &s3c2443_subsys, -}; - -int __init s3c2443_init(void) -{ - printk("S3C2443: Initialising architecture\n"); - - s3c_nand_setname("s3c2412-nand"); - s3c_fb_setname("s3c2443-fb"); - - s3c_adc_setname("s3c2443-adc"); - s3c_rtc_setname("s3c2443-rtc"); - - /* change WDT IRQ number */ - s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; - s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; - - return device_register(&s3c2443_dev); -} - -void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); -} - -/* s3c2443_map_io - * - * register the standard cpu IO areas, and any passed in from the - * machine specific initialisation. - */ - -void __init s3c2443_map_io(void) -{ - s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull; - s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull; - - /* initialize device information early */ - s3c24xx_spi_setname("s3c2443-spi"); - - iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); -} - -/* need to register the subsystem before we actually register the device, and - * we also need to ensure that it has been initialised before any of the - * drivers even try to use it (even if not on an s3c2443 based system) - * as a driver which may support both 2443 and 2440 may try and use it. -*/ - -static int __init s3c2443_core_init(void) -{ - return subsys_system_register(&s3c2443_subsys, NULL); -} - -core_initcall(s3c2443_core_init); diff --git a/arch/arm/mach-s3c/s3c244x.c b/arch/arm/mach-s3c/s3c244x.c deleted file mode 100644 index 95df3491e650..000000000000 --- a/arch/arm/mach-s3c/s3c244x.c +++ /dev/null @@ -1,128 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2004-2006 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443) - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/reboot.h> -#include <linux/device.h> -#include <linux/syscore_ops.h> -#include <linux/clk.h> -#include <linux/io.h> - -#include <asm/system_misc.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "map.h" -#include <asm/irq.h> - -#include "regs-clock.h" -#include "regs-gpio.h" - -#include "devs.h" -#include "cpu.h" -#include "pm.h" - -#include "s3c24xx.h" -#include "nand-core-s3c24xx.h" -#include "regs-dsc-s3c24xx.h" - -static struct map_desc s3c244x_iodesc[] __initdata __maybe_unused = { - IODESC_ENT(CLKPWR), - IODESC_ENT(TIMER), - IODESC_ENT(WATCHDOG), -}; - -/* uart initialisation */ - -void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); -} - -void __init s3c244x_map_io(void) -{ - /* register our io-tables */ - - iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc)); - - /* rename any peripherals used differing from the s3c2410 */ - - s3c_device_sdi.name = "s3c2440-sdi"; - s3c_device_i2c0.name = "s3c2440-i2c"; - s3c_nand_setname("s3c2440-nand"); - s3c_device_ts.name = "s3c2440-ts"; - s3c_device_usbgadget.name = "s3c2440-usbgadget"; - s3c2410_device_dclk.name = "s3c2440-dclk"; -} - -/* Since the S3C2442 and S3C2440 share items, put both subsystems here */ - -struct bus_type s3c2440_subsys = { - .name = "s3c2440-core", - .dev_name = "s3c2440-core", -}; - -struct bus_type s3c2442_subsys = { - .name = "s3c2442-core", - .dev_name = "s3c2442-core", -}; - -/* need to register the subsystem before we actually register the device, and - * we also need to ensure that it has been initialised before any of the - * drivers even try to use it (even if not on an s3c2440 based system) - * as a driver which may support both 2410 and 2440 may try and use it. -*/ - -static int __init s3c2440_core_init(void) -{ - return subsys_system_register(&s3c2440_subsys, NULL); -} - -core_initcall(s3c2440_core_init); - -static int __init s3c2442_core_init(void) -{ - return subsys_system_register(&s3c2442_subsys, NULL); -} - -core_initcall(s3c2442_core_init); - - -#ifdef CONFIG_PM_SLEEP -static struct sleep_save s3c244x_sleep[] = { - SAVE_ITEM(S3C2440_DSC0), - SAVE_ITEM(S3C2440_DSC1), - SAVE_ITEM(S3C2440_GPJDAT), - SAVE_ITEM(S3C2440_GPJCON), - SAVE_ITEM(S3C2440_GPJUP) -}; - -static int s3c244x_suspend(void) -{ - s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); - return 0; -} - -static void s3c244x_resume(void) -{ - s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); -} - -struct syscore_ops s3c244x_pm_syscore_ops = { - .suspend = s3c244x_suspend, - .resume = s3c244x_resume, -}; -#endif diff --git a/arch/arm/mach-s3c/s3c24xx.c b/arch/arm/mach-s3c/s3c24xx.c deleted file mode 100644 index 819a95364af9..000000000000 --- a/arch/arm/mach-s3c/s3c24xx.c +++ /dev/null @@ -1,687 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2004-2005 Simtec Electronics -// http://www.simtec.co.uk/products/SWLINUX/ -// Ben Dooks <ben@simtec.co.uk> -// -// Common code for S3C24XX machines - -#include <linux/dma-mapping.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <clocksource/samsung_pwm.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/io.h> -#include <linux/platform_data/clk-s3c2410.h> -#include <linux/platform_data/dma-s3c24xx.h> -#include <linux/dmaengine.h> -#include <linux/clk/samsung.h> - -#include "hardware-s3c24xx.h" -#include "map.h" -#include "regs-clock.h" -#include <asm/irq.h> -#include <asm/cacheflush.h> -#include <asm/system_info.h> -#include <asm/system_misc.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "regs-gpio.h" -#include "dma-s3c24xx.h" - -#include "cpu.h" -#include "devs.h" -#include "pwm-core.h" - -#include "s3c24xx.h" - -/* table of supported CPUs */ - -static const char name_s3c2410[] = "S3C2410"; -static const char name_s3c2412[] = "S3C2412"; -static const char name_s3c2416[] = "S3C2416/S3C2450"; -static const char name_s3c2440[] = "S3C2440"; -static const char name_s3c2442[] = "S3C2442"; -static const char name_s3c2442b[] = "S3C2442B"; -static const char name_s3c2443[] = "S3C2443"; -static const char name_s3c2410a[] = "S3C2410A"; -static const char name_s3c2440a[] = "S3C2440A"; - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = 0x32410000, - .idmask = 0xffffffff, - .map_io = s3c2410_map_io, - .init_uarts = s3c2410_init_uarts, - .init = s3c2410_init, - .name = name_s3c2410 - }, - { - .idcode = 0x32410002, - .idmask = 0xffffffff, - .map_io = s3c2410_map_io, - .init_uarts = s3c2410_init_uarts, - .init = s3c2410a_init, - .name = name_s3c2410a - }, - { - .idcode = 0x32440000, - .idmask = 0xffffffff, - .map_io = s3c2440_map_io, - .init_uarts = s3c244x_init_uarts, - .init = s3c2440_init, - .name = name_s3c2440 - }, - { - .idcode = 0x32440001, - .idmask = 0xffffffff, - .map_io = s3c2440_map_io, - .init_uarts = s3c244x_init_uarts, - .init = s3c2440_init, - .name = name_s3c2440a - }, - { - .idcode = 0x32440aaa, - .idmask = 0xffffffff, - .map_io = s3c2442_map_io, - .init_uarts = s3c244x_init_uarts, - .init = s3c2442_init, - .name = name_s3c2442 - }, - { - .idcode = 0x32440aab, - .idmask = 0xffffffff, - .map_io = s3c2442_map_io, - .init_uarts = s3c244x_init_uarts, - .init = s3c2442_init, - .name = name_s3c2442b - }, - { - .idcode = 0x32412001, - .idmask = 0xffffffff, - .map_io = s3c2412_map_io, - .init_uarts = s3c2412_init_uarts, - .init = s3c2412_init, - .name = name_s3c2412, - }, - { /* a newer version of the s3c2412 */ - .idcode = 0x32412003, - .idmask = 0xffffffff, - .map_io = s3c2412_map_io, - .init_uarts = s3c2412_init_uarts, - .init = s3c2412_init, - .name = name_s3c2412, - }, - { /* a strange version of the s3c2416 */ - .idcode = 0x32450003, - .idmask = 0xffffffff, - .map_io = s3c2416_map_io, - .init_uarts = s3c2416_init_uarts, - .init = s3c2416_init, - .name = name_s3c2416, - }, - { - .idcode = 0x32443001, - .idmask = 0xffffffff, - .map_io = s3c2443_map_io, - .init_uarts = s3c2443_init_uarts, - .init = s3c2443_init, - .name = name_s3c2443, - }, -}; - -/* minimal IO mapping */ - -static struct map_desc s3c_iodesc[] __initdata __maybe_unused = { - IODESC_ENT(GPIO), - IODESC_ENT(IRQ), - IODESC_ENT(MEMCTRL), - IODESC_ENT(UART) -}; - -/* read cpu identification code */ - -static unsigned long s3c24xx_read_idcode_v5(void) -{ -#if defined(CONFIG_CPU_S3C2416) - /* s3c2416 is v5, with S3C24XX_GSTATUS1 instead of S3C2412_GSTATUS1 */ - - u32 gs = __raw_readl(S3C24XX_GSTATUS1); - - /* test for s3c2416 or similar device */ - if ((gs >> 16) == 0x3245) - return gs; -#endif - -#if defined(CONFIG_CPU_S3C2412) - return __raw_readl(S3C2412_GSTATUS1); -#else - return 1UL; /* don't look like an 2400 */ -#endif -} - -static unsigned long s3c24xx_read_idcode_v4(void) -{ - return __raw_readl(S3C2410_GSTATUS1); -} - -static void s3c24xx_default_idle(void) -{ - unsigned long tmp = 0; - int i; - - /* idle the system by using the idle mode which will wait for an - * interrupt to happen before restarting the system. - */ - - /* Warning: going into idle state upsets jtag scanning */ - - __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, - S3C2410_CLKCON); - - /* the samsung port seems to do a loop and then unset idle.. */ - for (i = 0; i < 50; i++) - tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ - - /* this bit is not cleared on re-start... */ - - __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, - S3C2410_CLKCON); -} - -static struct samsung_pwm_variant s3c24xx_pwm_variant = { - .bits = 16, - .div_base = 1, - .has_tint_cstat = false, - .tclk_mask = (1 << 4), -}; - -void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) -{ - arm_pm_idle = s3c24xx_default_idle; - - /* initialise the io descriptors we need for initialisation */ - iotable_init(mach_desc, size); - iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); - - if (cpu_architecture() >= CPU_ARCH_ARMv5) { - samsung_cpu_id = s3c24xx_read_idcode_v5(); - } else { - samsung_cpu_id = s3c24xx_read_idcode_v4(); - } - - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); - - samsung_pwm_set_platdata(&s3c24xx_pwm_variant); -} - -void __init s3c24xx_set_timer_source(unsigned int event, unsigned int source) -{ - s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; - s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source)); -} - -void __init s3c24xx_timer_init(void) -{ - unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { - IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4, - }; - - samsung_pwm_clocksource_init(S3C_VA_TIMER, - timer_irqs, &s3c24xx_pwm_variant); -} - -/* Serial port registrations */ - -#define S3C2410_PA_UART0 (S3C24XX_PA_UART) -#define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 ) -#define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 ) -#define S3C2443_PA_UART3 (S3C24XX_PA_UART + 0xC000 ) - -static struct resource s3c2410_uart0_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K), - [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \ - IRQ_S3CUART_ERR0 - IRQ_S3CUART_RX0 + 1, \ - NULL, IORESOURCE_IRQ) -}; - -static struct resource s3c2410_uart1_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K), - [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX1, \ - IRQ_S3CUART_ERR1 - IRQ_S3CUART_RX1 + 1, \ - NULL, IORESOURCE_IRQ) -}; - -static struct resource s3c2410_uart2_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K), - [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX2, \ - IRQ_S3CUART_ERR2 - IRQ_S3CUART_RX2 + 1, \ - NULL, IORESOURCE_IRQ) -}; - -static struct resource s3c2410_uart3_resource[] = { - [0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K), - [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX3, \ - IRQ_S3CUART_ERR3 - IRQ_S3CUART_RX3 + 1, \ - NULL, IORESOURCE_IRQ) -}; - -struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { - [0] = { - .resources = s3c2410_uart0_resource, - .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource), - }, - [1] = { - .resources = s3c2410_uart1_resource, - .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource), - }, - [2] = { - .resources = s3c2410_uart2_resource, - .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource), - }, - [3] = { - .resources = s3c2410_uart3_resource, - .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource), - }, -}; - -#define s3c24xx_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) })) - -#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ - defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) -static struct resource s3c2410_dma_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA), - [1] = DEFINE_RES_IRQ(IRQ_DMA0), - [2] = DEFINE_RES_IRQ(IRQ_DMA1), - [3] = DEFINE_RES_IRQ(IRQ_DMA2), - [4] = DEFINE_RES_IRQ(IRQ_DMA3), -}; -#endif - -#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2442) -static struct s3c24xx_dma_channel s3c2410_dma_channels[DMACH_MAX] = { - [DMACH_XD0] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 0), }, - [DMACH_XD1] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 1), }, - [DMACH_SDI] = { S3C24XX_DMA_APB, false, S3C24XX_DMA_CHANREQ(2, 0) | - S3C24XX_DMA_CHANREQ(2, 2) | - S3C24XX_DMA_CHANREQ(1, 3), - }, - [DMACH_SPI0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 1), }, - [DMACH_SPI1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 3), }, - [DMACH_UART0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 0), }, - [DMACH_UART1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 1), }, - [DMACH_UART2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 3), }, - [DMACH_TIMER] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 0) | - S3C24XX_DMA_CHANREQ(3, 2) | - S3C24XX_DMA_CHANREQ(3, 3), - }, - [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 1) | - S3C24XX_DMA_CHANREQ(1, 2), - }, - [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 2), }, - [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 0), }, - [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 1), }, - [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 2), }, - [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), }, -}; - -static const struct dma_slave_map s3c2410_dma_slave_map[] = { - { "s3c2410-sdi", "rx-tx", (void *)DMACH_SDI }, - { "s3c2410-spi.0", "rx", (void *)DMACH_SPI0_RX }, - { "s3c2410-spi.0", "tx", (void *)DMACH_SPI0_TX }, - { "s3c2410-spi.1", "rx", (void *)DMACH_SPI1_RX }, - { "s3c2410-spi.1", "tx", (void *)DMACH_SPI1_TX }, - /* - * The DMA request source[1] (DMACH_UARTx_SRC2) are - * not used in the UART driver. - */ - { "s3c2410-uart.0", "rx", (void *)DMACH_UART0 }, - { "s3c2410-uart.0", "tx", (void *)DMACH_UART0 }, - { "s3c2410-uart.1", "rx", (void *)DMACH_UART1 }, - { "s3c2410-uart.1", "tx", (void *)DMACH_UART1 }, - { "s3c2410-uart.2", "rx", (void *)DMACH_UART2 }, - { "s3c2410-uart.2", "tx", (void *)DMACH_UART2 }, - { "s3c24xx-iis", "rx", (void *)DMACH_I2S_IN }, - { "s3c24xx-iis", "tx", (void *)DMACH_I2S_OUT }, - { "s3c-hsudc", "rx0", (void *)DMACH_USB_EP1 }, - { "s3c-hsudc", "tx0", (void *)DMACH_USB_EP1 }, - { "s3c-hsudc", "rx1", (void *)DMACH_USB_EP2 }, - { "s3c-hsudc", "tx1", (void *)DMACH_USB_EP2 }, - { "s3c-hsudc", "rx2", (void *)DMACH_USB_EP3 }, - { "s3c-hsudc", "tx2", (void *)DMACH_USB_EP3 }, - { "s3c-hsudc", "rx3", (void *)DMACH_USB_EP4 }, - { "s3c-hsudc", "tx3", (void *)DMACH_USB_EP4 } -}; - -static struct s3c24xx_dma_platdata s3c2410_dma_platdata = { - .num_phy_channels = 4, - .channels = s3c2410_dma_channels, - .num_channels = DMACH_MAX, - .slave_map = s3c2410_dma_slave_map, - .slavecnt = ARRAY_SIZE(s3c2410_dma_slave_map), -}; - -struct platform_device s3c2410_device_dma = { - .name = "s3c2410-dma", - .id = 0, - .num_resources = ARRAY_SIZE(s3c2410_dma_resource), - .resource = s3c2410_dma_resource, - .dev = { - .dma_mask = &s3c24xx_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c2410_dma_platdata, - }, -}; -#endif - -#ifdef CONFIG_CPU_S3C2412 -static struct s3c24xx_dma_channel s3c2412_dma_channels[DMACH_MAX] = { - [DMACH_XD0] = { S3C24XX_DMA_AHB, true, 17 }, - [DMACH_XD1] = { S3C24XX_DMA_AHB, true, 18 }, - [DMACH_SDI] = { S3C24XX_DMA_APB, false, 10 }, - [DMACH_SPI0_RX] = { S3C24XX_DMA_APB, true, 1 }, - [DMACH_SPI0_TX] = { S3C24XX_DMA_APB, true, 0 }, - [DMACH_SPI1_RX] = { S3C24XX_DMA_APB, true, 3 }, - [DMACH_SPI1_TX] = { S3C24XX_DMA_APB, true, 2 }, - [DMACH_UART0] = { S3C24XX_DMA_APB, true, 19 }, - [DMACH_UART1] = { S3C24XX_DMA_APB, true, 21 }, - [DMACH_UART2] = { S3C24XX_DMA_APB, true, 23 }, - [DMACH_UART0_SRC2] = { S3C24XX_DMA_APB, true, 20 }, - [DMACH_UART1_SRC2] = { S3C24XX_DMA_APB, true, 22 }, - [DMACH_UART2_SRC2] = { S3C24XX_DMA_APB, true, 24 }, - [DMACH_TIMER] = { S3C24XX_DMA_APB, true, 9 }, - [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, 5 }, - [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, 4 }, - [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, 13 }, - [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, 14 }, - [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, 15 }, - [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, 16 }, -}; - -static const struct dma_slave_map s3c2412_dma_slave_map[] = { - { "s3c2412-sdi", "rx-tx", (void *)DMACH_SDI }, - { "s3c2412-spi.0", "rx", (void *)DMACH_SPI0_RX }, - { "s3c2412-spi.0", "tx", (void *)DMACH_SPI0_TX }, - { "s3c2412-spi.1", "rx", (void *)DMACH_SPI1_RX }, - { "s3c2412-spi.1", "tx", (void *)DMACH_SPI1_TX }, - { "s3c2440-uart.0", "rx", (void *)DMACH_UART0 }, - { "s3c2440-uart.0", "tx", (void *)DMACH_UART0 }, - { "s3c2440-uart.1", "rx", (void *)DMACH_UART1 }, - { "s3c2440-uart.1", "tx", (void *)DMACH_UART1 }, - { "s3c2440-uart.2", "rx", (void *)DMACH_UART2 }, - { "s3c2440-uart.2", "tx", (void *)DMACH_UART2 }, - { "s3c2412-iis", "rx", (void *)DMACH_I2S_IN }, - { "s3c2412-iis", "tx", (void *)DMACH_I2S_OUT }, - { "s3c-hsudc", "rx0", (void *)DMACH_USB_EP1 }, - { "s3c-hsudc", "tx0", (void *)DMACH_USB_EP1 }, - { "s3c-hsudc", "rx1", (void *)DMACH_USB_EP2 }, - { "s3c-hsudc", "tx1", (void *)DMACH_USB_EP2 }, - { "s3c-hsudc", "rx2", (void *)DMACH_USB_EP3 }, - { "s3c-hsudc", "tx2", (void *)DMACH_USB_EP3 }, - { "s3c-hsudc", "rx3", (void *)DMACH_USB_EP4 }, - { "s3c-hsudc", "tx3", (void *)DMACH_USB_EP4 } -}; - -static struct s3c24xx_dma_platdata s3c2412_dma_platdata = { - .num_phy_channels = 4, - .channels = s3c2412_dma_channels, - .num_channels = DMACH_MAX, - .slave_map = s3c2412_dma_slave_map, - .slavecnt = ARRAY_SIZE(s3c2412_dma_slave_map), -}; - -struct platform_device s3c2412_device_dma = { - .name = "s3c2412-dma", - .id = 0, - .num_resources = ARRAY_SIZE(s3c2410_dma_resource), - .resource = s3c2410_dma_resource, - .dev = { - .dma_mask = &s3c24xx_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c2412_dma_platdata, - }, -}; -#endif - -#if defined(CONFIG_CPU_S3C2440) -static struct s3c24xx_dma_channel s3c2440_dma_channels[DMACH_MAX] = { - [DMACH_XD0] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 0), }, - [DMACH_XD1] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 1), }, - [DMACH_SDI] = { S3C24XX_DMA_APB, false, S3C24XX_DMA_CHANREQ(2, 0) | - S3C24XX_DMA_CHANREQ(6, 1) | - S3C24XX_DMA_CHANREQ(2, 2) | - S3C24XX_DMA_CHANREQ(1, 3), - }, - [DMACH_SPI0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 1), }, - [DMACH_SPI1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 3), }, - [DMACH_UART0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 0), }, - [DMACH_UART1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 1), }, - [DMACH_UART2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 3), }, - [DMACH_TIMER] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 0) | - S3C24XX_DMA_CHANREQ(3, 2) | - S3C24XX_DMA_CHANREQ(3, 3), - }, - [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 1) | - S3C24XX_DMA_CHANREQ(1, 2), - }, - [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(5, 0) | - S3C24XX_DMA_CHANREQ(0, 2), - }, - [DMACH_PCM_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(6, 0) | - S3C24XX_DMA_CHANREQ(5, 2), - }, - [DMACH_PCM_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(5, 1) | - S3C24XX_DMA_CHANREQ(6, 3), - }, - [DMACH_MIC_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(6, 2) | - S3C24XX_DMA_CHANREQ(5, 3), - }, - [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 0), }, - [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 1), }, - [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 2), }, - [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), }, -}; - -static const struct dma_slave_map s3c2440_dma_slave_map[] = { - /* TODO: DMACH_XD0 */ - /* TODO: DMACH_XD1 */ - { "s3c2440-sdi", "rx-tx", (void *)DMACH_SDI }, - { "s3c2410-spi.0", "rx", (void *)DMACH_SPI0 }, - { "s3c2410-spi.0", "tx", (void *)DMACH_SPI0 }, - { "s3c2410-spi.1", "rx", (void *)DMACH_SPI1 }, - { "s3c2410-spi.1", "tx", (void *)DMACH_SPI1 }, - { "s3c2440-uart.0", "rx", (void *)DMACH_UART0 }, - { "s3c2440-uart.0", "tx", (void *)DMACH_UART0 }, - { "s3c2440-uart.1", "rx", (void *)DMACH_UART1 }, - { "s3c2440-uart.1", "tx", (void *)DMACH_UART1 }, - { "s3c2440-uart.2", "rx", (void *)DMACH_UART2 }, - { "s3c2440-uart.2", "tx", (void *)DMACH_UART2 }, - { "s3c2440-uart.3", "rx", (void *)DMACH_UART3 }, - { "s3c2440-uart.3", "tx", (void *)DMACH_UART3 }, - /* TODO: DMACH_TIMER */ - { "s3c24xx-iis", "rx", (void *)DMACH_I2S_IN }, - { "s3c24xx-iis", "tx", (void *)DMACH_I2S_OUT }, - { "samsung-ac97", "rx", (void *)DMACH_PCM_IN }, - { "samsung-ac97", "tx", (void *)DMACH_PCM_OUT }, - { "samsung-ac97", "rx", (void *)DMACH_MIC_IN }, - { "s3c-hsudc", "rx0", (void *)DMACH_USB_EP1 }, - { "s3c-hsudc", "rx1", (void *)DMACH_USB_EP2 }, - { "s3c-hsudc", "rx2", (void *)DMACH_USB_EP3 }, - { "s3c-hsudc", "rx3", (void *)DMACH_USB_EP4 }, - { "s3c-hsudc", "tx0", (void *)DMACH_USB_EP1 }, - { "s3c-hsudc", "tx1", (void *)DMACH_USB_EP2 }, - { "s3c-hsudc", "tx2", (void *)DMACH_USB_EP3 }, - { "s3c-hsudc", "tx3", (void *)DMACH_USB_EP4 } -}; - -static struct s3c24xx_dma_platdata s3c2440_dma_platdata = { - .num_phy_channels = 4, - .channels = s3c2440_dma_channels, - .num_channels = DMACH_MAX, - .slave_map = s3c2440_dma_slave_map, - .slavecnt = ARRAY_SIZE(s3c2440_dma_slave_map), -}; - -struct platform_device s3c2440_device_dma = { - .name = "s3c2410-dma", - .id = 0, - .num_resources = ARRAY_SIZE(s3c2410_dma_resource), - .resource = s3c2410_dma_resource, - .dev = { - .dma_mask = &s3c24xx_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c2440_dma_platdata, - }, -}; -#endif - -#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) -static struct resource s3c2443_dma_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA), - [1] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA0), - [2] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA1), - [3] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA2), - [4] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA3), - [5] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA4), - [6] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA5), -}; - -static struct s3c24xx_dma_channel s3c2443_dma_channels[DMACH_MAX] = { - [DMACH_XD0] = { S3C24XX_DMA_AHB, true, 17 }, - [DMACH_XD1] = { S3C24XX_DMA_AHB, true, 18 }, - [DMACH_SDI] = { S3C24XX_DMA_APB, false, 10 }, - [DMACH_SPI0_RX] = { S3C24XX_DMA_APB, true, 1 }, - [DMACH_SPI0_TX] = { S3C24XX_DMA_APB, true, 0 }, - [DMACH_SPI1_RX] = { S3C24XX_DMA_APB, true, 3 }, - [DMACH_SPI1_TX] = { S3C24XX_DMA_APB, true, 2 }, - [DMACH_UART0] = { S3C24XX_DMA_APB, true, 19 }, - [DMACH_UART1] = { S3C24XX_DMA_APB, true, 21 }, - [DMACH_UART2] = { S3C24XX_DMA_APB, true, 23 }, - [DMACH_UART3] = { S3C24XX_DMA_APB, true, 25 }, - [DMACH_UART0_SRC2] = { S3C24XX_DMA_APB, true, 20 }, - [DMACH_UART1_SRC2] = { S3C24XX_DMA_APB, true, 22 }, - [DMACH_UART2_SRC2] = { S3C24XX_DMA_APB, true, 24 }, - [DMACH_UART3_SRC2] = { S3C24XX_DMA_APB, true, 26 }, - [DMACH_TIMER] = { S3C24XX_DMA_APB, true, 9 }, - [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, 5 }, - [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, 4 }, - [DMACH_PCM_IN] = { S3C24XX_DMA_APB, true, 28 }, - [DMACH_PCM_OUT] = { S3C24XX_DMA_APB, true, 27 }, - [DMACH_MIC_IN] = { S3C24XX_DMA_APB, true, 29 }, -}; - -static const struct dma_slave_map s3c2443_dma_slave_map[] = { - { "s3c2440-sdi", "rx-tx", (void *)DMACH_SDI }, - { "s3c2443-spi.0", "rx", (void *)DMACH_SPI0_RX }, - { "s3c2443-spi.0", "tx", (void *)DMACH_SPI0_TX }, - { "s3c2443-spi.1", "rx", (void *)DMACH_SPI1_RX }, - { "s3c2443-spi.1", "tx", (void *)DMACH_SPI1_TX }, - { "s3c2440-uart.0", "rx", (void *)DMACH_UART0 }, - { "s3c2440-uart.0", "tx", (void *)DMACH_UART0 }, - { "s3c2440-uart.1", "rx", (void *)DMACH_UART1 }, - { "s3c2440-uart.1", "tx", (void *)DMACH_UART1 }, - { "s3c2440-uart.2", "rx", (void *)DMACH_UART2 }, - { "s3c2440-uart.2", "tx", (void *)DMACH_UART2 }, - { "s3c2440-uart.3", "rx", (void *)DMACH_UART3 }, - { "s3c2440-uart.3", "tx", (void *)DMACH_UART3 }, - { "s3c24xx-iis", "rx", (void *)DMACH_I2S_IN }, - { "s3c24xx-iis", "tx", (void *)DMACH_I2S_OUT }, -}; - -static struct s3c24xx_dma_platdata s3c2443_dma_platdata = { - .num_phy_channels = 6, - .channels = s3c2443_dma_channels, - .num_channels = DMACH_MAX, - .slave_map = s3c2443_dma_slave_map, - .slavecnt = ARRAY_SIZE(s3c2443_dma_slave_map), -}; - -struct platform_device s3c2443_device_dma = { - .name = "s3c2443-dma", - .id = 0, - .num_resources = ARRAY_SIZE(s3c2443_dma_resource), - .resource = s3c2443_dma_resource, - .dev = { - .dma_mask = &s3c24xx_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c2443_dma_platdata, - }, -}; -#endif - -#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2410) -void __init s3c2410_init_clocks(int xtal) -{ - s3c2410_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR); -} -#endif - -#ifdef CONFIG_CPU_S3C2412 -void __init s3c2412_init_clocks(int xtal) -{ - s3c2412_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR); -} -#endif - -#ifdef CONFIG_CPU_S3C2416 -void __init s3c2416_init_clocks(int xtal) -{ - s3c2443_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR); -} -#endif - -#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2440) -void __init s3c2440_init_clocks(int xtal) -{ - s3c2410_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR); -} -#endif - -#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2442) -void __init s3c2442_init_clocks(int xtal) -{ - s3c2410_common_clk_init(NULL, xtal, 2, S3C24XX_VA_CLKPWR); -} -#endif - -#ifdef CONFIG_CPU_S3C2443 -void __init s3c2443_init_clocks(int xtal) -{ - s3c2443_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR); -} -#endif - -#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2440) || \ - defined(CONFIG_CPU_S3C2442) -static struct resource s3c2410_dclk_resource[] = { - [0] = DEFINE_RES_MEM(0x56000084, 0x4), -}; - -static struct s3c2410_clk_platform_data s3c_clk_platform_data = { - .modify_misccr = s3c2410_modify_misccr, -}; - -struct platform_device s3c2410_device_dclk = { - .name = "s3c2410-dclk", - .id = 0, - .num_resources = ARRAY_SIZE(s3c2410_dclk_resource), - .resource = s3c2410_dclk_resource, - .dev = { - .platform_data = &s3c_clk_platform_data, - }, -}; -#endif - -#ifndef CONFIG_COMPILE_TEST -#pragma message "The platform is deprecated and scheduled for removal. " \ - "Please reach to the maintainers of the platform " \ - "and linux-samsung-soc@vger.kernel.org if you still use it." \ - "Without such feedback, the platform will be removed after 2022." -#endif diff --git a/arch/arm/mach-s3c/s3c24xx.h b/arch/arm/mach-s3c/s3c24xx.h deleted file mode 100644 index 34dd4ac507e9..000000000000 --- a/arch/arm/mach-s3c/s3c24xx.h +++ /dev/null @@ -1,124 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common Header for S3C24XX SoCs - */ - -#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H -#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__ - -#include <linux/reboot.h> -#include "irqs.h" - -struct s3c2410_uartcfg; - -#ifdef CONFIG_CPU_S3C2410 -extern int s3c2410_init(void); -extern int s3c2410a_init(void); -extern void s3c2410_map_io(void); -extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c2410_init_clocks(int xtal); -extern void s3c2410_init_irq(void); -#else -#define s3c2410_init_clocks NULL -#define s3c2410_init_uarts NULL -#define s3c2410_map_io NULL -#define s3c2410_init NULL -#define s3c2410a_init NULL -#endif - -#ifdef CONFIG_CPU_S3C2412 -extern int s3c2412_init(void); -extern void s3c2412_map_io(void); -extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c2412_init_clocks(int xtal); -extern int s3c2412_baseclk_add(void); -extern void s3c2412_init_irq(void); -#else -#define s3c2412_init_clocks NULL -#define s3c2412_init_uarts NULL -#define s3c2412_map_io NULL -#define s3c2412_init NULL -#endif - -#ifdef CONFIG_CPU_S3C2416 -extern int s3c2416_init(void); -extern void s3c2416_map_io(void); -extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c2416_init_clocks(int xtal); -extern int s3c2416_baseclk_add(void); -extern void s3c2416_init_irq(void); - -extern struct syscore_ops s3c2416_irq_syscore_ops; -#else -#define s3c2416_init_clocks NULL -#define s3c2416_init_uarts NULL -#define s3c2416_map_io NULL -#define s3c2416_init NULL -#endif - -#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) -extern void s3c244x_map_io(void); -extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no); -#else -#define s3c244x_init_uarts NULL -#endif - -#ifdef CONFIG_CPU_S3C2440 -extern int s3c2440_init(void); -extern void s3c2440_map_io(void); -extern void s3c2440_init_clocks(int xtal); -extern void s3c2440_init_irq(void); -#else -#define s3c2440_init NULL -#define s3c2440_map_io NULL -#endif - -#ifdef CONFIG_CPU_S3C2442 -extern int s3c2442_init(void); -extern void s3c2442_map_io(void); -extern void s3c2442_init_clocks(int xtal); -extern void s3c2442_init_irq(void); -#else -#define s3c2442_init NULL -#define s3c2442_map_io NULL -#endif - -#ifdef CONFIG_CPU_S3C2443 -extern int s3c2443_init(void); -extern void s3c2443_map_io(void); -extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c2443_init_clocks(int xtal); -extern int s3c2443_baseclk_add(void); -extern void s3c2443_init_irq(void); -#else -#define s3c2443_init_clocks NULL -#define s3c2443_init_uarts NULL -#define s3c2443_map_io NULL -#define s3c2443_init NULL -#endif - -extern struct syscore_ops s3c24xx_irq_syscore_ops; - -extern struct platform_device s3c2410_device_dma; -extern struct platform_device s3c2412_device_dma; -extern struct platform_device s3c2440_device_dma; -extern struct platform_device s3c2443_device_dma; - -extern struct platform_device s3c2410_device_dclk; - -enum s3c24xx_timer_mode { - S3C24XX_PWM0, - S3C24XX_PWM1, - S3C24XX_PWM2, - S3C24XX_PWM3, - S3C24XX_PWM4, -}; - -extern void __init s3c24xx_set_timer_source(enum s3c24xx_timer_mode event, - enum s3c24xx_timer_mode source); -extern void __init s3c24xx_timer_init(void); - -#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */ diff --git a/arch/arm/mach-s3c/s3c6400.c b/arch/arm/mach-s3c/s3c6400.c deleted file mode 100644 index 802f4fb7462d..000000000000 --- a/arch/arm/mach-s3c/s3c6400.c +++ /dev/null @@ -1,90 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2009 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ - -/* - * NOTE: Code in this file is not used when booting with Device Tree support. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/of.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/irq.h> - -#include "regs-clock.h" - -#include "cpu.h" -#include "devs.h" -#include "sdhci.h" -#include "iic-core.h" - -#include "s3c64xx.h" -#include "onenand-core-s3c64xx.h" - -void __init s3c6400_map_io(void) -{ - /* setup SDHCI */ - - s3c6400_default_sdhci0(); - s3c6400_default_sdhci1(); - s3c6400_default_sdhci2(); - - /* the i2c devices are directly compatible with s3c2440 */ - s3c_i2c0_setname("s3c2440-i2c"); - - s3c_device_nand.name = "s3c6400-nand"; - - s3c_onenand_setname("s3c6400-onenand"); - s3c64xx_onenand1_setname("s3c6400-onenand"); -} - -void __init s3c6400_init_irq(void) -{ - /* VIC0 does not have IRQS 5..7, - * VIC1 is fully populated. */ - s3c64xx_init_irq(~0 & ~(0xf << 5), ~0); -} - -static struct bus_type s3c6400_subsys = { - .name = "s3c6400-core", - .dev_name = "s3c6400-core", -}; - -static struct device s3c6400_dev = { - .bus = &s3c6400_subsys, -}; - -static int __init s3c6400_core_init(void) -{ - /* Not applicable when using DT. */ - if (of_have_populated_dt() || soc_is_s3c64xx()) - return 0; - - return subsys_system_register(&s3c6400_subsys, NULL); -} - -core_initcall(s3c6400_core_init); - -int __init s3c6400_init(void) -{ - printk("S3C6400: Initialising architecture\n"); - - return device_register(&s3c6400_dev); -} diff --git a/arch/arm/mach-s3c/s3c6410.c b/arch/arm/mach-s3c/s3c6410.c index dae17d5fd092..e79f18d0ca81 100644 --- a/arch/arm/mach-s3c/s3c6410.c +++ b/arch/arm/mach-s3c/s3c6410.c @@ -35,12 +35,9 @@ #include "cpu.h" #include "devs.h" #include "sdhci.h" -#include "adc-core.h" #include "iic-core.h" -#include "ata-core-s3c64xx.h" #include "s3c64xx.h" -#include "onenand-core-s3c64xx.h" void __init s3c6410_map_io(void) { @@ -52,12 +49,6 @@ void __init s3c6410_map_io(void) /* the i2c devices are directly compatible with s3c2440 */ s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c"); - - s3c_adc_setname("s3c64xx-adc"); - s3c_device_nand.name = "s3c6400-nand"; - s3c_onenand_setname("s3c6410-onenand"); - s3c64xx_onenand1_setname("s3c6410-onenand"); - s3c_cfcon_setname("s3c64xx-pata"); } void __init s3c6410_init_irq(void) diff --git a/arch/arm/mach-s3c/s3c64xx.c b/arch/arm/mach-s3c/s3c64xx.c index 0a8116c108fe..ad13d7e13e5e 100644 --- a/arch/arm/mach-s3c/s3c64xx.c +++ b/arch/arm/mach-s3c/s3c64xx.c @@ -72,18 +72,10 @@ static void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) /* table of supported CPUs */ -static const char name_s3c6400[] = "S3C6400"; static const char name_s3c6410[] = "S3C6410"; static struct cpu_table cpu_ids[] __initdata = { { - .idcode = S3C6400_CPU_ID, - .idmask = S3C64XX_CPU_MASK, - .map_io = s3c6400_map_io, - .init_uarts = s3c64xx_init_uarts, - .init = s3c6400_init, - .name = name_s3c6400, - }, { .idcode = S3C6410_CPU_ID, .idmask = S3C64XX_CPU_MASK, .map_io = s3c6410_map_io, diff --git a/arch/arm/mach-s3c/sdhci.h b/arch/arm/mach-s3c/sdhci.h index 9f9d419e58d7..1010f94d4a18 100644 --- a/arch/arm/mach-s3c/sdhci.h +++ b/arch/arm/mach-s3c/sdhci.h @@ -48,35 +48,10 @@ extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; /* Helper function availability */ -extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w); -extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); -/* S3C2416 SDHCI setup */ - -#ifdef CONFIG_S3C2416_SETUP_SDHCI -static inline void s3c2416_default_sdhci0(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC - s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; -#endif /* CONFIG_S3C_DEV_HSMMC */ -} - -static inline void s3c2416_default_sdhci1(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC1 - s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; -#endif /* CONFIG_S3C_DEV_HSMMC1 */ -} - -#else -static inline void s3c2416_default_sdhci0(void) { } -static inline void s3c2416_default_sdhci1(void) { } - -#endif /* CONFIG_S3C2416_SETUP_SDHCI */ - /* S3C64XX SDHCI setup */ #ifdef CONFIG_S3C64XX_SETUP_SDHCI diff --git a/arch/arm/mach-s3c/setup-i2c-s3c24xx.c b/arch/arm/mach-s3c/setup-i2c-s3c24xx.c deleted file mode 100644 index 0d88366b234c..000000000000 --- a/arch/arm/mach-s3c/setup-i2c-s3c24xx.c +++ /dev/null @@ -1,23 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// S3C24XX Base setup for i2c device - -#include <linux/kernel.h> -#include <linux/gpio.h> - -struct platform_device; - -#include <linux/platform_data/i2c-s3c2410.h> - -#include "gpio-cfg.h" -#include "regs-gpio.h" -#include "gpio-samsung.h" - -void s3c_i2c0_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA); - s3c_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL); -} diff --git a/arch/arm/mach-s3c/setup-ide-s3c64xx.c b/arch/arm/mach-s3c/setup-ide-s3c64xx.c deleted file mode 100644 index f11f2b02e49f..000000000000 --- a/arch/arm/mach-s3c/setup-ide-s3c64xx.c +++ /dev/null @@ -1,40 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2010 Samsung Electronics Co., Ltd. -// http://www.samsung.com/ -// -// S3C64XX setup information for IDE - -#include <linux/kernel.h> -#include <linux/gpio.h> -#include <linux/io.h> - -#include <linux/platform_data/ata-samsung_cf.h> - -#include "map.h" -#include "regs-clock.h" -#include "gpio-cfg.h" -#include "gpio-samsung.h" - -void s3c64xx_ide_setup_gpio(void) -{ - u32 reg; - - reg = readl(S3C_MEM_SYS_CFG) & (~0x3f); - - /* Independent CF interface, CF chip select configuration */ - writel(reg | MEM_SYS_CFG_INDEP_CF | - MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S3C_MEM_SYS_CFG); - - s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4)); - - /* Set XhiDATA[15:0] pins as CF Data[15:0] */ - s3c_gpio_cfgpin_range(S3C64XX_GPK(0), 16, S3C_GPIO_SFN(5)); - - /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */ - s3c_gpio_cfgpin_range(S3C64XX_GPL(0), 3, S3C_GPIO_SFN(6)); - - /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */ - s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1)); - s3c_gpio_cfgpin_range(S3C64XX_GPM(0), 5, S3C_GPIO_SFN(6)); -} diff --git a/arch/arm/mach-s3c/setup-sdhci-gpio-s3c24xx.c b/arch/arm/mach-s3c/setup-sdhci-gpio-s3c24xx.c deleted file mode 100644 index 02131b3a731d..000000000000 --- a/arch/arm/mach-s3c/setup-sdhci-gpio-s3c24xx.c +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2010 Promwad Innovation Company -// Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> -// -// S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) -// -// Based on mach-s3c64xx/setup-sdhci-gpio.c - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include "gpio-cfg.h" -#include "sdhci.h" - -void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) -{ - s3c_gpio_cfgrange_nopull(S3C2410_GPE(5), 2 + width, S3C_GPIO_SFN(2)); -} - -void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) -{ - s3c_gpio_cfgrange_nopull(S3C2410_GPL(0), width, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(S3C2410_GPL(8), 2, S3C_GPIO_SFN(2)); -} diff --git a/arch/arm/mach-s3c/setup-spi-s3c24xx.c b/arch/arm/mach-s3c/setup-spi-s3c24xx.c deleted file mode 100644 index 93fa1bbc9d5c..000000000000 --- a/arch/arm/mach-s3c/setup-spi-s3c24xx.c +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// HS-SPI device setup for S3C2443/S3C2416 -// -// Copyright (C) 2011 Samsung Electronics Ltd. -// http://www.samsung.com/ - -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include "gpio-cfg.h" - -#include "hardware-s3c24xx.h" -#include "regs-gpio.h" - -#ifdef CONFIG_S3C64XX_DEV_SPI0 -int s3c64xx_spi0_cfg_gpio(void) -{ - /* enable hsspi bit in misccr */ - s3c2410_modify_misccr(S3C2416_MISCCR_HSSPI_EN2, 1); - - s3c_gpio_cfgall_range(S3C2410_GPE(11), 3, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - - return 0; -} -#endif diff --git a/arch/arm/mach-s3c/setup-ts-s3c24xx.c b/arch/arm/mach-s3c/setup-ts-s3c24xx.c deleted file mode 100644 index 57363eaeb7e8..000000000000 --- a/arch/arm/mach-s3c/setup-ts-s3c24xx.c +++ /dev/null @@ -1,29 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2010 Samsung Electronics Co., Ltd. -// http://www.samsung.com/ -// -// Based on S3C24XX setup for i2c device - -#include <linux/kernel.h> -#include <linux/gpio.h> - -struct platform_device; /* don't need the contents */ - -#include <linux/platform_data/touchscreen-s3c2410.h> - -#include "gpio-cfg.h" -#include "gpio-samsung.h" - -/** - * s3c24xx_ts_cfg_gpio - configure gpio for s3c2410 systems - * @dev: Device to configure GPIO for (ignored) - * - * Configure the GPIO for the S3C2410 system, where we have external FETs - * connected to the device (later systems such as the S3C2440 integrate - * these into the device). - */ -void s3c24xx_ts_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgpin_range(S3C2410_GPG(12), 4, S3C_GPIO_SFN(3)); -} diff --git a/arch/arm/mach-s3c/simtec-audio.c b/arch/arm/mach-s3c/simtec-audio.c deleted file mode 100644 index 487485bcc2ab..000000000000 --- a/arch/arm/mach-s3c/simtec-audio.c +++ /dev/null @@ -1,76 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2009 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// -// Audio setup for various Simtec S3C24XX implementations - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/io.h> - -#include "regs-gpio.h" -#include "gpio-samsung.h" -#include "gpio-cfg.h" - -#include <linux/platform_data/asoc-s3c24xx_simtec.h> -#include "devs.h" - -#include "bast.h" -#include "simtec.h" - -/* platform ops for audio */ - -static void simtec_audio_startup_lrroute(void) -{ - unsigned int tmp; - unsigned long flags; - - local_irq_save(flags); - - tmp = __raw_readb(BAST_VA_CTRL1); - tmp &= ~BAST_CPLD_CTRL1_LRMASK; - tmp |= BAST_CPLD_CTRL1_LRCDAC; - __raw_writeb(tmp, BAST_VA_CTRL1); - - local_irq_restore(flags); -} - -static struct s3c24xx_audio_simtec_pdata simtec_audio_platdata; -static char our_name[32]; - -static struct platform_device simtec_audio_dev = { - .name = our_name, - .id = -1, - .dev = { - .parent = &s3c_device_iis.dev, - .platform_data = &simtec_audio_platdata, - }, -}; - -int __init simtec_audio_add(const char *name, bool has_lr_routing, - struct s3c24xx_audio_simtec_pdata *spd) -{ - if (!name) - name = "tlv320aic23"; - - snprintf(our_name, sizeof(our_name)-1, "s3c24xx-simtec-%s", name); - - /* copy platform data so the source can be __initdata */ - if (spd) - simtec_audio_platdata = *spd; - - if (has_lr_routing) - simtec_audio_platdata.startup = simtec_audio_startup_lrroute; - - /* Configure the I2S pins (GPE0...GPE4) in correct mode */ - s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_NONE); - - platform_device_register(&s3c_device_iis); - platform_device_register(&simtec_audio_dev); - return 0; -} diff --git a/arch/arm/mach-s3c/simtec-nor.c b/arch/arm/mach-s3c/simtec-nor.c deleted file mode 100644 index a6fba056a747..000000000000 --- a/arch/arm/mach-s3c/simtec-nor.c +++ /dev/null @@ -1,74 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2008 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk> -// -// Simtec NOR mapping - -#include <linux/module.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/map.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "map.h" - -#include "bast.h" -#include "simtec.h" - -static void simtec_nor_vpp(struct platform_device *pdev, int vpp) -{ - unsigned int val; - - val = __raw_readb(BAST_VA_CTRL3); - - printk(KERN_DEBUG "%s(%d)\n", __func__, vpp); - - if (vpp) - val |= BAST_CPLD_CTRL3_ROMWEN; - else - val &= ~BAST_CPLD_CTRL3_ROMWEN; - - __raw_writeb(val, BAST_VA_CTRL3); -} - -static struct physmap_flash_data simtec_nor_pdata = { - .width = 2, - .set_vpp = simtec_nor_vpp, - .nr_parts = 0, -}; - -static struct resource simtec_nor_resource[] = { - [0] = DEFINE_RES_MEM(S3C2410_CS1 + 0x4000000, SZ_8M), -}; - -static struct platform_device simtec_device_nor = { - .name = "physmap-flash", - .id = -1, - .num_resources = ARRAY_SIZE(simtec_nor_resource), - .resource = simtec_nor_resource, - .dev = { - .platform_data = &simtec_nor_pdata, - }, -}; - -void __init nor_simtec_init(void) -{ - int ret; - - ret = platform_device_register(&simtec_device_nor); - if (ret < 0) - printk(KERN_ERR "failed to register physmap-flash device\n"); - else - simtec_nor_vpp(NULL, 1); -} diff --git a/arch/arm/mach-s3c/simtec-pm.c b/arch/arm/mach-s3c/simtec-pm.c deleted file mode 100644 index 490256a766e2..000000000000 --- a/arch/arm/mach-s3c/simtec-pm.c +++ /dev/null @@ -1,60 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2004 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://armlinux.simtec.co.uk/ -// -// Power Management helpers for Simtec S3C24XX implementations - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "map.h" -#include "regs-gpio.h" - -#include <asm/mach-types.h> - -#include "pm.h" - -#include "regs-mem-s3c24xx.h" - -#define COPYRIGHT ", Copyright 2005 Simtec Electronics" - -/* pm_simtec_init - * - * enable the power management functions -*/ - -static __init int pm_simtec_init(void) -{ - unsigned long gstatus4; - - /* check which machine we are running on */ - - if (!machine_is_bast() && !machine_is_vr1000() && - !machine_is_anubis() && !machine_is_osiris() && - !machine_is_aml_m5900()) - return 0; - - printk(KERN_INFO "Simtec Board Power Management" COPYRIGHT "\n"); - - gstatus4 = (__raw_readl(S3C2410_BANKCON7) & 0x3) << 30; - gstatus4 |= (__raw_readl(S3C2410_BANKCON6) & 0x3) << 28; - gstatus4 |= (__raw_readl(S3C2410_BANKSIZE) & S3C2410_BANKSIZE_MASK); - - __raw_writel(gstatus4, S3C2410_GSTATUS4); - - return s3c_pm_init(); -} - -arch_initcall(pm_simtec_init); diff --git a/arch/arm/mach-s3c/simtec-usb.c b/arch/arm/mach-s3c/simtec-usb.c deleted file mode 100644 index 76cedb5c7373..000000000000 --- a/arch/arm/mach-s3c/simtec-usb.c +++ /dev/null @@ -1,125 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2004-2005 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// http://www.simtec.co.uk/products/EB2410ITX/ -// -// Simtec BAST and Thorcom VR1000 USB port support functions - -#define DEBUG - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/gpio.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "gpio-samsung.h" -#include "irqs.h" -#include <asm/irq.h> - -#include <linux/platform_data/usb-ohci-s3c2410.h> -#include "devs.h" - -#include "bast.h" -#include "simtec.h" - -/* control power and monitor over-current events on various Simtec - * designed boards. -*/ - -static unsigned int power_state[2]; - -static void -usb_simtec_powercontrol(int port, int to) -{ - pr_debug("usb_simtec_powercontrol(%d,%d)\n", port, to); - - power_state[port] = to; - - if (power_state[0] && power_state[1]) - gpio_set_value(S3C2410_GPB(4), 0); - else - gpio_set_value(S3C2410_GPB(4), 1); -} - -static irqreturn_t -usb_simtec_ocirq(int irq, void *pw) -{ - struct s3c2410_hcd_info *info = pw; - - if (gpio_get_value(S3C2410_GPG(10)) == 0) { - pr_debug("usb_simtec: over-current irq (oc detected)\n"); - s3c2410_usb_report_oc(info, 3); - } else { - pr_debug("usb_simtec: over-current irq (oc cleared)\n"); - s3c2410_usb_report_oc(info, 0); - } - - return IRQ_HANDLED; -} - -static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on) -{ - int ret; - - if (on) { - ret = request_irq(BAST_IRQ_USBOC, usb_simtec_ocirq, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, - "USB Over-current", info); - if (ret != 0) { - printk(KERN_ERR "failed to request usb oc irq\n"); - } - } else { - free_irq(BAST_IRQ_USBOC, info); - } -} - -static struct s3c2410_hcd_info usb_simtec_info __initdata = { - .port[0] = { - .flags = S3C_HCDFLG_USED - }, - .port[1] = { - .flags = S3C_HCDFLG_USED - }, - - .power_control = usb_simtec_powercontrol, - .enable_oc = usb_simtec_enableoc, -}; - - -int __init usb_simtec_init(void) -{ - int ret; - - printk("USB Power Control, Copyright 2004 Simtec Electronics\n"); - - ret = gpio_request(S3C2410_GPB(4), "USB power control"); - if (ret < 0) { - pr_err("%s: failed to get GPB4\n", __func__); - return ret; - } - - ret = gpio_request(S3C2410_GPG(10), "USB overcurrent"); - if (ret < 0) { - pr_err("%s: failed to get GPG10\n", __func__); - gpio_free(S3C2410_GPB(4)); - return ret; - } - - /* turn power on */ - gpio_direction_output(S3C2410_GPB(4), 1); - gpio_direction_input(S3C2410_GPG(10)); - - s3c_ohci_set_platdata(&usb_simtec_info); - return 0; -} diff --git a/arch/arm/mach-s3c/simtec.h b/arch/arm/mach-s3c/simtec.h deleted file mode 100644 index d96bd60872b8..000000000000 --- a/arch/arm/mach-s3c/simtec.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * Simtec common functions - */ - -struct s3c24xx_audio_simtec_pdata; - -extern void nor_simtec_init(void); - -extern int usb_simtec_init(void); - -extern int simtec_audio_add(const char *codec_name, bool has_lr_routing, - struct s3c24xx_audio_simtec_pdata *pdata); diff --git a/arch/arm/mach-s3c/sleep-s3c2410.S b/arch/arm/mach-s3c/sleep-s3c2410.S deleted file mode 100644 index 04aded98782b..000000000000 --- a/arch/arm/mach-s3c/sleep-s3c2410.S +++ /dev/null @@ -1,54 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 Power Manager (Suspend-To-RAM) support - * - * Based on PXA/SA1100 sleep code by: - * Nicolas Pitre, (c) 2002 Monta Vista Software Inc - * Cliff Brake, (c) 2001 - */ - -#include <linux/linkage.h> -#include <linux/serial_s3c.h> -#include <asm/assembler.h> -#include "map.h" - -#include "regs-gpio.h" -#include "regs-clock.h" - -#include "regs-mem-s3c24xx.h" - - /* s3c2410_cpu_suspend - * - * put the cpu into sleep mode - */ - -ENTRY(s3c2410_cpu_suspend) - @@ prepare cpu to sleep - - ldr r4, =S3C2410_REFRESH - ldr r5, =S3C24XX_MISCCR - ldr r6, =S3C2410_CLKCON - ldr r7, [r4] @ get REFRESH (and ensure in TLB) - ldr r8, [r5] @ get MISCCR (and ensure in TLB) - ldr r9, [r6] @ get CLKCON (and ensure in TLB) - - orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command - orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals - orr r9, r9, #S3C2410_CLKCON_POWER @ power down command - - teq pc, #0 @ first as a trial-run to load cache - bl s3c2410_do_sleep - teq r0, r0 @ now do it for real - b s3c2410_do_sleep @ - - @@ align next bit of code to cache line - .align 5 -s3c2410_do_sleep: - streq r7, [r4] @ SDRAM sleep command - streq r8, [r5] @ SDRAM power-down config - streq r9, [r6] @ CPU sleep -1: beq 1b - ret lr diff --git a/arch/arm/mach-s3c/sleep-s3c2412.S b/arch/arm/mach-s3c/sleep-s3c2412.S deleted file mode 100644 index b4b61737fbb2..000000000000 --- a/arch/arm/mach-s3c/sleep-s3c2412.S +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2007 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2412 Power Manager low-level sleep support - */ - -#include <linux/linkage.h> -#include <asm/assembler.h> -#include "map.h" - -#include "regs-irq.h" - - .text - - .global s3c2412_sleep_enter - -s3c2412_sleep_enter: - mov r0, #0 /* argument for coprocessors */ - ldr r1, =S3C2410_INTPND - ldr r2, =S3C2410_SRCPND - ldr r3, =S3C2410_EINTPEND - - teq r0, r0 - bl s3c2412_sleep_enter1 - teq pc, r0 - bl s3c2412_sleep_enter1 - - .align 5 - - /* this is called twice, first with the Z flag to ensure that the - * instructions have been loaded into the cache, and the second - * time to try and suspend the system. - */ -s3c2412_sleep_enter1: - mcr p15, 0, r0, c7, c10, 4 - mcrne p15, 0, r0, c7, c0, 4 - - /* if we return from here, it is because an interrupt was - * active when we tried to shutdown. Try and ack the IRQ and - * retry, as simply returning causes the system to lock. - */ - - ldrne r9, [r1] - strne r9, [r1] - ldrne r9, [r2] - strne r9, [r2] - ldrne r9, [r3] - strne r9, [r3] - bne s3c2412_sleep_enter1 - - ret lr diff --git a/arch/arm/mach-s3c/sleep-s3c24xx.S b/arch/arm/mach-s3c/sleep-s3c24xx.S deleted file mode 100644 index 4b2af91f3dce..000000000000 --- a/arch/arm/mach-s3c/sleep-s3c24xx.S +++ /dev/null @@ -1,69 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 Power Manager (Suspend-To-RAM) support - * - * Based on PXA/SA1100 sleep code by: - * Nicolas Pitre, (c) 2002 Monta Vista Software Inc - * Cliff Brake, (c) 2001 - */ - -#include <linux/linkage.h> -#include <linux/serial_s3c.h> -#include <asm/assembler.h> -#include "map.h" - -#include "regs-gpio.h" -#include "regs-clock.h" - -/* - * S3C24XX_DEBUG_RESUME is dangerous if your bootloader does not - * reset the UART configuration, only enable if you really need this! - */ -//#define S3C24XX_DEBUG_RESUME - - .text - - /* sleep magic, to allow the bootloader to check for an valid - * image to resume to. Must be the first word before the - * s3c_cpu_resume entry. - */ - - .word 0x2bedf00d - - /* s3c_cpu_resume - * - * resume code entry for bootloader to call - */ - -ENTRY(s3c_cpu_resume) - mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE - msr cpsr_c, r0 - - @@ load UART to allow us to print the two characters for - @@ resume debug - - mov r2, #S3C24XX_PA_UART & 0xff000000 - orr r2, r2, #S3C24XX_PA_UART & 0xff000 - -#if 0 - /* SMDK2440 LED set */ - mov r14, #S3C24XX_PA_GPIO - ldr r12, [ r14, #0x54 ] - bic r12, r12, #3<<4 - orr r12, r12, #1<<7 - str r12, [ r14, #0x54 ] -#endif - -#ifdef S3C24XX_DEBUG_RESUME - mov r3, #'L' - strb r3, [ r2, #S3C2410_UTXH ] -1001: - ldrb r14, [ r3, #S3C2410_UTRSTAT ] - tst r14, #S3C2410_UTRSTAT_TXE - beq 1001b -#endif /* S3C24XX_DEBUG_RESUME */ - - b cpu_resume diff --git a/arch/arm/mach-s3c/sleep-s3c64xx.S b/arch/arm/mach-s3c/sleep-s3c64xx.S index 739e53fbce09..908aa76b1062 100644 --- a/arch/arm/mach-s3c/sleep-s3c64xx.S +++ b/arch/arm/mach-s3c/sleep-s3c64xx.S @@ -39,31 +39,4 @@ ENTRY(s3c_cpu_resume) msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE ldr r2, =LL_UART /* for debug */ - -#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK - -#define S3C64XX_GPNCON (S3C64XX_GPN_BASE + 0x00) -#define S3C64XX_GPNDAT (S3C64XX_GPN_BASE + 0x04) - -#define S3C64XX_GPN_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) -#define S3C64XX_GPN_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) - - /* Initialise the GPIO state if we are debugging via the SMDK LEDs, - * as the uboot version supplied resets these to inputs during the - * resume checks. - */ - - ldr r3, =S3C64XX_PA_GPIO - ldr r0, [ r3, #S3C64XX_GPNCON ] - bic r0, r0, #(S3C64XX_GPN_CONMASK(12) | S3C64XX_GPN_CONMASK(13) | \ - S3C64XX_GPN_CONMASK(14) | S3C64XX_GPN_CONMASK(15)) - orr r0, r0, #(S3C64XX_GPN_OUTPUT(12) | S3C64XX_GPN_OUTPUT(13) | \ - S3C64XX_GPN_OUTPUT(14) | S3C64XX_GPN_OUTPUT(15)) - str r0, [ r3, #S3C64XX_GPNCON ] - - ldr r0, [ r3, #S3C64XX_GPNDAT ] - bic r0, r0, #0xf << 12 @ GPN12..15 - orr r0, r0, #1 << 15 @ GPN15 - str r0, [ r3, #S3C64XX_GPNDAT ] -#endif b cpu_resume diff --git a/arch/arm/mach-s3c/spi-core-s3c24xx.h b/arch/arm/mach-s3c/spi-core-s3c24xx.h deleted file mode 100644 index 919c5fd0c9af..000000000000 --- a/arch/arm/mach-s3c/spi-core-s3c24xx.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2012 Heiko Stuebner <heiko@sntech.de> - */ - -#ifndef __PLAT_S3C_SPI_CORE_S3C24XX_H -#define __PLAT_S3C_SPI_CORE_S3C24XX_H - -/* These functions are only for use with the core support code, such as - * the cpu specific initialisation code - */ - -/* re-define device name depending on support. */ -static inline void s3c24xx_spi_setname(char *name) -{ -#ifdef CONFIG_S3C64XX_DEV_SPI0 - s3c64xx_device_spi0.name = name; -#endif -} - -#endif /* __PLAT_S3C_SPI_CORE_S3C24XX_H */ diff --git a/arch/arm/mach-s3c/vr1000.h b/arch/arm/mach-s3c/vr1000.h deleted file mode 100644 index 3cfa296bec2a..000000000000 --- a/arch/arm/mach-s3c/vr1000.h +++ /dev/null @@ -1,113 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * VR1000 - CPLD control constants - * Machine VR1000 - IRQ Number definitions - * Machine VR1000 - Memory map definitions - */ - -#ifndef __MACH_S3C24XX_VR1000_H -#define __MACH_S3C24XX_VR1000_H __FILE__ - -#define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */ - -/* irq numbers to onboard peripherals */ - -#define VR1000_IRQ_USBOC IRQ_EINT19 -#define VR1000_IRQ_IDE0 IRQ_EINT16 -#define VR1000_IRQ_IDE1 IRQ_EINT17 -#define VR1000_IRQ_SERIAL IRQ_EINT12 -#define VR1000_IRQ_DM9000A IRQ_EINT10 -#define VR1000_IRQ_DM9000N IRQ_EINT9 -#define VR1000_IRQ_SMALERT IRQ_EINT8 - -/* map */ - -#define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */ -#define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000) - -#define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */ -#define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000) - -#define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */ -#define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000) - -#define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */ -#define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000) - -/* next, we have the PC104 ISA interrupt registers */ - -#define VR1000_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */ -#define VR1000_VA_PC104_IRQREQ VR1000_IOADDR(0x00400000) - -#define VR1000_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */ -#define VR1000_VA_PC104_IRQRAW VR1000_IOADDR(0x00500000) - -#define VR1000_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */ -#define VR1000_VA_PC104_IRQMASK VR1000_IOADDR(0x00600000) - -/* - * 0xE0000000 contains the IO space that is split by speed and - * whether the access is for 8 or 16bit IO... this ensures that - * the correct access is made - * - * 0x10000000 of space, partitioned as so: - * - * 0x00000000 to 0x04000000 8bit, slow - * 0x04000000 to 0x08000000 16bit, slow - * 0x08000000 to 0x0C000000 16bit, net - * 0x0C000000 to 0x10000000 16bit, fast - * - * each of these spaces has the following in: - * - * 0x02000000 to 0x02100000 1MB IDE primary channel - * 0x02100000 to 0x02200000 1MB IDE primary channel aux - * 0x02200000 to 0x02400000 1MB IDE secondary channel - * 0x02300000 to 0x02400000 1MB IDE secondary channel aux - * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controllers - * 0x02600000 to 0x02700000 1MB - * - * the phyiscal layout of the zones are: - * nGCS2 - 8bit, slow - * nGCS3 - 16bit, slow - * nGCS4 - 16bit, net - * nGCS5 - 16bit, fast - */ - -#define VR1000_VA_MULTISPACE (0xE0000000) - -#define VR1000_VA_ISAIO (VR1000_VA_MULTISPACE + 0x00000000) -#define VR1000_VA_ISAMEM (VR1000_VA_MULTISPACE + 0x01000000) -#define VR1000_VA_IDEPRI (VR1000_VA_MULTISPACE + 0x02000000) -#define VR1000_VA_IDEPRIAUX (VR1000_VA_MULTISPACE + 0x02100000) -#define VR1000_VA_IDESEC (VR1000_VA_MULTISPACE + 0x02200000) -#define VR1000_VA_IDESECAUX (VR1000_VA_MULTISPACE + 0x02300000) -#define VR1000_VA_ASIXNET (VR1000_VA_MULTISPACE + 0x02400000) -#define VR1000_VA_DM9000 (VR1000_VA_MULTISPACE + 0x02500000) -#define VR1000_VA_SUPERIO (VR1000_VA_MULTISPACE + 0x02600000) - -/* physical offset addresses for the peripherals */ - -#define VR1000_PA_IDEPRI (0x02000000) -#define VR1000_PA_IDEPRIAUX (0x02800000) -#define VR1000_PA_IDESEC (0x03000000) -#define VR1000_PA_IDESECAUX (0x03800000) -#define VR1000_PA_DM9000 (0x05000000) - -#define VR1000_PA_SERIAL (0x11800000) -#define VR1000_VA_SERIAL (VR1000_IOADDR(0x00700000)) - -/* VR1000 ram is in CS1, with A26..A24 = 2_101 */ -#define VR1000_PA_SRAM (S3C2410_CS1 | 0x05000000) - -/* some configurations for the peripherals */ - -#define VR1000_DM9000_CS VR1000_VAM_CS4 - -#endif /* __MACH_S3C24XX_VR1000_H */ diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig index fb9cd10705de..0fb4c24cfad5 100644 --- a/arch/arm/mach-sa1100/Kconfig +++ b/arch/arm/mach-sa1100/Kconfig @@ -41,35 +41,6 @@ config ASSABET_NEPONSET Microprocessor Development Board (Assabet) with the SA-1111 Development Board (Nepon). -config SA1100_CERF - bool "CerfBoard" - depends on UNUSED_BOARD_FILES - select ARM_SA1110_CPUFREQ - select LEDS_GPIO_REGISTER - help - The Intrinsyc CerfBoard is based on the StrongARM 1110 (Discontinued). - More information is available at: - <http://www.intrinsyc.com/products/cerfboard/>. - - Say Y if configuring for an Intrinsyc CerfBoard. - Say N otherwise. - -choice - prompt "Cerf Flash available" - depends on SA1100_CERF - default SA1100_CERF_FLASH_8MB - -config SA1100_CERF_FLASH_8MB - bool "8MB" - -config SA1100_CERF_FLASH_16MB - bool "16MB" - -config SA1100_CERF_FLASH_32MB - bool "32MB" - -endchoice - config SA1100_COLLIE bool "Sharp Zaurus SL5500" # FIXME: select ARM_SA11x0_CPUFREQ @@ -79,16 +50,6 @@ config SA1100_COLLIE help Say Y here to support the Sharp Zaurus SL5500 PDAs. -config SA1100_H3100 - bool "Compaq iPAQ H3100" - depends on UNUSED_BOARD_FILES - select ARM_SA1110_CPUFREQ - select HTC_EGPIO - select MFD_IPAQ_MICRO - help - Say Y here if you intend to run this kernel on the Compaq iPAQ - H3100 handheld computer. - config SA1100_H3600 bool "Compaq iPAQ H3600/H3700" select ARM_SA1110_CPUFREQ @@ -98,18 +59,8 @@ config SA1100_H3600 Say Y here if you intend to run this kernel on the Compaq iPAQ H3600 and H3700 handheld computers. -config SA1100_BADGE4 - bool "HP Labs BadgePAD 4" - depends on UNUSED_BOARD_FILES - select ARM_SA1100_CPUFREQ - select SA1111 - help - Say Y here if you want to build a kernel for the HP Laboratories - BadgePAD 4. - config SA1100_JORNADA720 bool "HP Jornada 720" - depends on UNUSED_BOARD_FILES # FIXME: select ARM_SA11x0_CPUFREQ select SA1111 help @@ -127,71 +78,8 @@ config SA1100_JORNADA720_SSP keyboard, touchscreen, backlight and battery. This driver also activates the generic SSP which it extends. -config SA1100_HACKKIT - bool "HackKit Core CPU Board" - depends on UNUSED_BOARD_FILES - select ARM_SA1100_CPUFREQ - help - Say Y here to support the HackKit Core CPU Board - <http://hackkit.eletztrick.de>; - -config SA1100_LART - bool "LART" - depends on UNUSED_BOARD_FILES - select ARM_SA1100_CPUFREQ - help - Say Y here if you are using the Linux Advanced Radio Terminal - (also known as the LART). See <http://www.lartmaker.nl/> for - information on the LART. - -config SA1100_NANOENGINE - bool "nanoEngine" - depends on UNUSED_BOARD_FILES - select ARM_SA1110_CPUFREQ - select FORCE_PCI - select PCI_NANOENGINE - help - Say Y here if you are using the Bright Star Engineering nanoEngine. - See <http://www.brightstareng.com/arm/nanoeng.htm> for information - on the BSE nanoEngine. - -config SA1100_PLEB - bool "PLEB" - depends on UNUSED_BOARD_FILES - select ARM_SA1100_CPUFREQ - help - Say Y here if you are using version 1 of the Portable Linux - Embedded Board (also known as PLEB). - See <http://www.disy.cse.unsw.edu.au/Hardware/PLEB/> - for more information. - -config SA1100_SHANNON - bool "Shannon" - depends on UNUSED_BOARD_FILES - select ARM_SA1100_CPUFREQ - select REGULATOR - select REGULATOR_FIXED_VOLTAGE - help - The Shannon (also known as a Tuxscreen, and also as a IS2630) was a - limited edition webphone produced by Philips. The Shannon is a SA1100 - platform with a 640x480 LCD, touchscreen, CIR keyboard, PCMCIA slots, - and a telco interface. - -config SA1100_SIMPAD - bool "Simpad" - depends on UNUSED_BOARD_FILES - select ARM_SA1110_CPUFREQ - help - The SIEMENS webpad SIMpad is based on the StrongARM 1110. There - are two different versions CL4 and SL4. CL4 has 32MB RAM and 16MB - FLASH. The SL4 version got 64 MB RAM and 32 MB FLASH and a - PCMCIA-Slot. The version for the Germany Telecom (DTAG) is the same - like CL4 in additional it has a PCMCIA-Slot. For more information - visit <http://www.usa.siemens.com/> or <http://www.siemens.ch/>. - config SA1100_SSP tristate "Generic PIO SSP" - depends on UNUSED_BOARD_FILES help Say Y here to enable support for the generic PIO SSP driver. This isn't for audio support, but for attached sensors and diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index 28c1cae0053f..b5816d675152 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile @@ -9,32 +9,11 @@ obj-y := clock.o generic.o #nmi-oopser.o # Specific board support obj-$(CONFIG_SA1100_ASSABET) += assabet.o obj-$(CONFIG_ASSABET_NEPONSET) += neponset.o - -obj-$(CONFIG_SA1100_BADGE4) += badge4.o - -obj-$(CONFIG_SA1100_CERF) += cerf.o - obj-$(CONFIG_SA1100_COLLIE) += collie.o - -obj-$(CONFIG_SA1100_H3100) += h3100.o h3xxx.o obj-$(CONFIG_SA1100_H3600) += h3600.o h3xxx.o - -obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o - obj-$(CONFIG_SA1100_JORNADA720) += jornada720.o obj-$(CONFIG_SA1100_JORNADA720_SSP) += jornada720_ssp.o -obj-$(CONFIG_SA1100_LART) += lart.o - -obj-$(CONFIG_SA1100_NANOENGINE) += nanoengine.o -obj-$(CONFIG_PCI_NANOENGINE) += pci-nanoengine.o - -obj-$(CONFIG_SA1100_PLEB) += pleb.o - -obj-$(CONFIG_SA1100_SHANNON) += shannon.o - -obj-$(CONFIG_SA1100_SIMPAD) += simpad.o - # Miscellaneous functions obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_SA1100_SSP) += ssp.o diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 9919e0f32c4b..2eba112f2ad8 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -38,7 +38,6 @@ #include <asm/mach/arch.h> #include <asm/mach/flash.h> -#include <linux/platform_data/irda-sa11x0.h> #include <asm/mach/map.h> #include <mach/assabet.h> #include <linux/platform_data/mfd-mcp-sa11x0.h> @@ -297,38 +296,6 @@ static struct resource assabet_flash_resources[] = { }; -/* - * Assabet IrDA support code. - */ - -static int assabet_irda_set_power(struct device *dev, unsigned int state) -{ - static unsigned int bcr_state[4] = { - ASSABET_BCR_IRDA_MD0, - ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0, - ASSABET_BCR_IRDA_MD1, - 0 - }; - - if (state < 4) - ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0, - bcr_state[state]); - return 0; -} - -static void assabet_irda_set_speed(struct device *dev, unsigned int speed) -{ - if (speed < 4000000) - ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL); - else - ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL); -} - -static struct irda_platform_data assabet_irda_data = { - .set_power = assabet_irda_set_power, - .set_speed = assabet_irda_set_speed, -}; - static struct ucb1x00_plat_data assabet_ucb1x00_data = { .reset = assabet_ucb1x00_reset, .gpio_base = -1, @@ -618,7 +585,6 @@ static void __init assabet_init(void) #endif sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, ARRAY_SIZE(assabet_flash_resources)); - sa11x0_register_irda(&assabet_irda_data); sa11x0_register_mcp(&assabet_mcp_data); if (!machine_has_neponset()) diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c deleted file mode 100644 index de79f3502045..000000000000 --- a/arch/arm/mach-sa1100/badge4.c +++ /dev/null @@ -1,338 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-sa1100/badge4.c - * - * BadgePAD 4 specific initialization - * - * Tim Connors <connors@hpl.hp.com> - * Christopher Hoover <ch@hpl.hp.com> - * - * Copyright (C) 2002 Hewlett-Packard Company - */ -#include <linux/module.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_data/sa11x0-serial.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/tty.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/errno.h> -#include <linux/gpio.h> -#include <linux/leds.h> - -#include <mach/hardware.h> -#include <asm/mach-types.h> -#include <asm/setup.h> -#include <mach/irqs.h> - -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach/map.h> -#include <asm/hardware/sa1111.h> - -#include <mach/badge4.h> - -#include "generic.h" - -static struct resource sa1111_resources[] = { - [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000), - [1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111), -}; - -static int badge4_sa1111_enable(void *data, unsigned devid) -{ - if (devid == SA1111_DEVID_USB) - badge4_set_5V(BADGE4_5V_USB, 1); - return 0; -} - -static void badge4_sa1111_disable(void *data, unsigned devid) -{ - if (devid == SA1111_DEVID_USB) - badge4_set_5V(BADGE4_5V_USB, 0); -} - -static struct sa1111_platform_data sa1111_info = { - .disable_devs = SA1111_DEVID_PS2_MSE, - .enable = badge4_sa1111_enable, - .disable = badge4_sa1111_disable, -}; - -static u64 sa1111_dmamask = 0xffffffffUL; - -static struct platform_device sa1111_device = { - .name = "sa1111", - .id = 0, - .dev = { - .dma_mask = &sa1111_dmamask, - .coherent_dma_mask = 0xffffffff, - .platform_data = &sa1111_info, - }, - .num_resources = ARRAY_SIZE(sa1111_resources), - .resource = sa1111_resources, -}; - -/* LEDs */ -struct gpio_led badge4_gpio_leds[] = { - { - .name = "badge4:red", - .default_trigger = "heartbeat", - .gpio = 7, - }, - { - .name = "badge4:green", - .default_trigger = "cpu0", - .gpio = 9, - }, -}; - -static struct gpio_led_platform_data badge4_gpio_led_info = { - .leds = badge4_gpio_leds, - .num_leds = ARRAY_SIZE(badge4_gpio_leds), -}; - -static struct platform_device badge4_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &badge4_gpio_led_info, - } -}; - -static struct platform_device *devices[] __initdata = { - &sa1111_device, - &badge4_leds, -}; - -static int __init badge4_sa1111_init(void) -{ - /* - * Ensure that the memory bus request/grant signals are setup, - * and the grant is held in its inactive state - */ - sa1110_mb_disable(); - - /* - * Probe for SA1111. - */ - return platform_add_devices(devices, ARRAY_SIZE(devices)); -} - - -/* - * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit) - * Eight 4 KiW Parameter Bottom Blocks (64 KiB) - * Sixty-three 32 KiW Main Blocks (4032 Ki b) - * - * <or> - * - * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit) - * Eight 4 KiW Parameter Bottom Blocks (64 KiB) - * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b) - */ -static struct mtd_partition badge4_partitions[] = { - { - .name = "BLOB boot loader", - .offset = 0, - .size = 0x0000A000 - }, { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = 0x00006000 - }, { - .name = "root", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL - } -}; - -static struct flash_platform_data badge4_flash_data = { - .map_name = "cfi_probe", - .parts = badge4_partitions, - .nr_parts = ARRAY_SIZE(badge4_partitions), -}; - -static struct resource badge4_flash_resource = - DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M); - -static int five_v_on __initdata = 0; - -static int __init five_v_on_setup(char *ignore) -{ - five_v_on = 1; - return 1; -} -__setup("five_v_on", five_v_on_setup); - - -static int __init badge4_init(void) -{ - int ret; - - if (!machine_is_badge4()) - return -ENODEV; - - /* LCD */ - GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | - BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 | - BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 | - BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 | - BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID | - BADGE4_GPIO_GPC_VID); - GPDR &= ~BADGE4_GPIO_INT_VID; - GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | - BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 | - BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 | - BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 | - BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID | - BADGE4_GPIO_GPC_VID); - - /* SDRAM SPD i2c */ - GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); - GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); - - /* uart */ - GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); - GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); - - /* CPLD muxsel0 input for mux/adc chip select */ - GPCR = BADGE4_GPIO_MUXSEL0; - GPDR |= BADGE4_GPIO_MUXSEL0; - - /* test points: J5, J6 as inputs, J7 outputs */ - GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6); - GPCR = BADGE4_GPIO_TESTPT_J7; - GPDR |= BADGE4_GPIO_TESTPT_J7; - - /* 5V supply rail. */ - GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ - GPDR |= BADGE4_GPIO_PCMEN5V; - - /* CPLD sdram type inputs; set up by blob */ - //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0); - printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n", - !!(GPLR & BADGE4_GPIO_SDTYP1), - !!(GPLR & BADGE4_GPIO_SDTYP0)); - - /* SA1111 reset pin; set up by blob */ - //GPSR = BADGE4_GPIO_SA1111_NRST; - //GPDR |= BADGE4_GPIO_SA1111_NRST; - - - /* power management cruft */ - PGSR = 0; - PWER = 0; - PCFR = 0; - PSDR = 0; - - PWER |= PWER_GPIO26; /* wake up on an edge from TESTPT_J5 */ - PWER |= PWER_RTC; /* wake up if rtc fires */ - - /* drive sa1111_nrst during sleep */ - PGSR |= BADGE4_GPIO_SA1111_NRST; - /* drive CPLD as is during sleep */ - PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1)); - - - /* Now bring up the SA-1111. */ - ret = badge4_sa1111_init(); - if (ret < 0) - printk(KERN_ERR - "%s: SA-1111 initialization failed (%d)\n", - __func__, ret); - - - /* maybe turn on 5v0 from the start */ - badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on); - - sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1); - - return 0; -} - -arch_initcall(badge4_init); - - -static unsigned badge4_5V_bitmap = 0; - -void badge4_set_5V(unsigned subsystem, int on) -{ - unsigned long flags; - unsigned old_5V_bitmap; - - local_irq_save(flags); - - old_5V_bitmap = badge4_5V_bitmap; - - if (on) { - badge4_5V_bitmap |= subsystem; - } else { - badge4_5V_bitmap &= ~subsystem; - } - - /* detect on->off and off->on transitions */ - if ((!old_5V_bitmap) && (badge4_5V_bitmap)) { - /* was off, now on */ - printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__); - GPSR = BADGE4_GPIO_PCMEN5V; - } else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) { - /* was on, now off */ - printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__); - GPCR = BADGE4_GPIO_PCMEN5V; - } - - local_irq_restore(flags); -} -EXPORT_SYMBOL(badge4_set_5V); - - -static struct map_desc badge4_io_desc[] __initdata = { - { /* SRAM bank 1 */ - .virtual = 0xf1000000, - .pfn = __phys_to_pfn(0x08000000), - .length = 0x00100000, - .type = MT_DEVICE - }, { /* SRAM bank 2 */ - .virtual = 0xf2000000, - .pfn = __phys_to_pfn(0x10000000), - .length = 0x00100000, - .type = MT_DEVICE - } -}; - -static void -badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate) -{ - if (!state) { - Ser1SDCR0 |= SDCR0_UART; - } -} - -static struct sa1100_port_fns badge4_port_fns __initdata = { - .pm = badge4_uart_pm, -}; - -static void __init badge4_map_io(void) -{ - sa1100_map_io(); - iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc)); - - sa1100_register_uart_fns(&badge4_port_fns); - sa1100_register_uart(0, 3); - sa1100_register_uart(1, 1); -} - -MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4") - .atag_offset = 0x100, - .map_io = badge4_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = sa1100_init_irq, - .init_late = sa11x0_init_late, - .init_time = sa1100_timer_init, -#ifdef CONFIG_SA1111 - .dma_zone_size = SZ_1M, -#endif - .restart = sa11x0_restart, -MACHINE_END diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c deleted file mode 100644 index f9243a3fd69c..000000000000 --- a/arch/arm/mach-sa1100/cerf.c +++ /dev/null @@ -1,181 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-sa1100/cerf.c - * - * Apr-2003 : Removed some old PDA crud [FB] - * Oct-2003 : Added uart2 resource [FB] - * Jan-2004 : Removed io map for flash [FB] - */ - -#include <linux/init.h> -#include <linux/gpio/machine.h> -#include <linux/kernel.h> -#include <linux/tty.h> -#include <linux/platform_data/sa11x0-serial.h> -#include <linux/platform_device.h> -#include <linux/irq.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/gpio.h> -#include <linux/leds.h> - -#include <mach/hardware.h> -#include <asm/setup.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach/map.h> - -#include <mach/cerf.h> -#include <linux/platform_data/mfd-mcp-sa11x0.h> -#include <mach/irqs.h> -#include "generic.h" - -static struct resource cerfuart2_resources[] = { - [0] = DEFINE_RES_MEM(0x80030000, SZ_64K), -}; - -static struct platform_device cerfuart2_device = { - .name = "sa11x0-uart", - .id = 2, - .num_resources = ARRAY_SIZE(cerfuart2_resources), - .resource = cerfuart2_resources, -}; - -/* Compact Flash */ -static struct gpiod_lookup_table cerf_cf_gpio_table = { - .dev_id = "sa11x0-pcmcia.1", - .table = { - GPIO_LOOKUP("gpio", 19, "bvd2", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio", 20, "bvd1", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio", 21, "reset", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio", 22, "ready", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio", 23, "detect", GPIO_ACTIVE_LOW), - { }, - }, -}; - -/* LEDs */ -struct gpio_led cerf_gpio_leds[] = { - { - .name = "cerf:d0", - .default_trigger = "heartbeat", - .gpio = 0, - }, - { - .name = "cerf:d1", - .default_trigger = "cpu0", - .gpio = 1, - }, - { - .name = "cerf:d2", - .default_trigger = "default-on", - .gpio = 2, - }, - { - .name = "cerf:d3", - .default_trigger = "default-on", - .gpio = 3, - }, - -}; - -static struct gpio_led_platform_data cerf_gpio_led_info = { - .leds = cerf_gpio_leds, - .num_leds = ARRAY_SIZE(cerf_gpio_leds), -}; - -static struct platform_device *cerf_devices[] __initdata = { - &cerfuart2_device, -}; - -#ifdef CONFIG_SA1100_CERF_FLASH_32MB -# define CERF_FLASH_SIZE 0x02000000 -#elif defined CONFIG_SA1100_CERF_FLASH_16MB -# define CERF_FLASH_SIZE 0x01000000 -#elif defined CONFIG_SA1100_CERF_FLASH_8MB -# define CERF_FLASH_SIZE 0x00800000 -#else -# error "Undefined flash size for CERF" -#endif - -static struct mtd_partition cerf_partitions[] = { - { - .name = "Bootloader", - .size = 0x00020000, - .offset = 0x00000000, - }, { - .name = "Params", - .size = 0x00040000, - .offset = 0x00020000, - }, { - .name = "Kernel", - .size = 0x00100000, - .offset = 0x00060000, - }, { - .name = "Filesystem", - .size = CERF_FLASH_SIZE-0x00160000, - .offset = 0x00160000, - } -}; - -static struct flash_platform_data cerf_flash_data = { - .map_name = "cfi_probe", - .parts = cerf_partitions, - .nr_parts = ARRAY_SIZE(cerf_partitions), -}; - -static struct resource cerf_flash_resource = - DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M); - -static void __init cerf_init_irq(void) -{ - sa1100_init_irq(); - irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING); -} - -static struct map_desc cerf_io_desc[] __initdata = { - { /* Crystal Ethernet Chip */ - .virtual = 0xf0000000, - .pfn = __phys_to_pfn(0x08000000), - .length = 0x00100000, - .type = MT_DEVICE - } -}; - -static void __init cerf_map_io(void) -{ - sa1100_map_io(); - iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc)); - - sa1100_register_uart(0, 3); - sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */ - sa1100_register_uart(2, 1); -} - -static struct mcp_plat_data cerf_mcp_data = { - .mccr0 = MCCR0_ADM, - .sclk_rate = 11981000, -}; - -static void __init cerf_init(void) -{ - sa11x0_ppc_configure_mcp(); - platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices)); - gpio_led_register_device(-1, &cerf_gpio_led_info); - sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1); - sa11x0_register_mcp(&cerf_mcp_data); - sa11x0_register_pcmcia(1, &cerf_cf_gpio_table); -} - -MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube") - /* Maintainer: support@intrinsyc.com */ - .map_io = cerf_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = cerf_init_irq, - .init_time = sa1100_timer_init, - .init_machine = cerf_init, - .init_late = sa11x0_init_late, - .restart = sa11x0_restart, -MACHINE_END diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index 14c33ed05318..466d755d5702 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c @@ -44,7 +44,6 @@ #include <asm/mach/arch.h> #include <asm/mach/flash.h> #include <asm/mach/map.h> -#include <linux/platform_data/irda-sa11x0.h> #include <asm/hardware/scoop.h> #include <asm/mach/sharpsl_param.h> @@ -118,37 +117,6 @@ static struct gpiod_lookup_table collie_battery_gpiod_table = { }, }; -static int collie_ir_startup(struct device *dev) -{ - int rc = gpio_request(COLLIE_GPIO_IR_ON, "IrDA"); - if (rc) - return rc; - rc = gpio_direction_output(COLLIE_GPIO_IR_ON, 1); - - if (!rc) - return 0; - - gpio_free(COLLIE_GPIO_IR_ON); - return rc; -} - -static void collie_ir_shutdown(struct device *dev) -{ - gpio_free(COLLIE_GPIO_IR_ON); -} - -static int collie_ir_set_power(struct device *dev, unsigned int state) -{ - gpio_set_value(COLLIE_GPIO_IR_ON, !state); - return 0; -} - -static struct irda_platform_data collie_ir_data = { - .startup = collie_ir_startup, - .shutdown = collie_ir_shutdown, - .set_power = collie_ir_set_power, -}; - /* * Collie AC IN */ @@ -420,7 +388,6 @@ static void __init collie_init(void) sa11x0_register_mtd(&collie_flash_data, collie_flash_resources, ARRAY_SIZE(collie_flash_resources)); sa11x0_register_mcp(&collie_mcp_data); - sa11x0_register_irda(&collie_ir_data); sharpsl_save_param(); } diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 6c21f214cd60..0c586047d130 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -250,25 +250,6 @@ void sa11x0_register_mtd(struct flash_platform_data *flash, sa11x0_register_device(&sa11x0mtd_device, flash); } -static struct resource sa11x0ir_resources[] = { - DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24), - DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c), - DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04), - DEFINE_RES_IRQ(IRQ_Ser2ICP), -}; - -static struct platform_device sa11x0ir_device = { - .name = "sa11x0-ir", - .id = -1, - .num_resources = ARRAY_SIZE(sa11x0ir_resources), - .resource = sa11x0ir_resources, -}; - -void sa11x0_register_irda(struct irda_platform_data *irda) -{ - sa11x0_register_device(&sa11x0ir_device, irda); -} - static struct resource sa1100_rtc_resources[] = { DEFINE_RES_MEM(0x90010000, 0x40), DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"), diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h index 158a4fd5ca24..5fe0d4fc0f8c 100644 --- a/arch/arm/mach-sa1100/generic.h +++ b/arch/arm/mach-sa1100/generic.h @@ -30,9 +30,6 @@ struct resource; void sa11x0_register_mtd(struct flash_platform_data *flash, struct resource *res, int nr); -struct irda_platform_data; -void sa11x0_register_irda(struct irda_platform_data *irda); - struct mcp_plat_data; void sa11x0_ppc_configure_mcp(void); void sa11x0_register_mcp(struct mcp_plat_data *data); diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c deleted file mode 100644 index 51eaeeaf3f10..000000000000 --- a/arch/arm/mach-sa1100/h3100.c +++ /dev/null @@ -1,140 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Support for Compaq iPAQ H3100 handheld computer - * - * Copyright (c) 2000,1 Compaq Computer Corporation. (Author: Jamey Hicks) - * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru> - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/gpio.h> - -#include <video/sa1100fb.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <linux/platform_data/irda-sa11x0.h> - -#include <mach/h3xxx.h> -#include <mach/irqs.h> - -#include "generic.h" - -/* - * helper for sa1100fb - */ -static struct gpio h3100_lcd_gpio[] = { - { H3100_GPIO_LCD_3V_ON, GPIOF_OUT_INIT_LOW, "LCD 3V" }, - { H3XXX_EGPIO_LCD_ON, GPIOF_OUT_INIT_LOW, "LCD ON" }, -}; - -static bool h3100_lcd_request(void) -{ - static bool h3100_lcd_ok; - int rc; - - if (h3100_lcd_ok) - return true; - - rc = gpio_request_array(h3100_lcd_gpio, ARRAY_SIZE(h3100_lcd_gpio)); - if (rc) - pr_err("%s: can't request GPIOs\n", __func__); - else - h3100_lcd_ok = true; - - return h3100_lcd_ok; -} - -static void h3100_lcd_power(int enable) -{ - if (!h3100_lcd_request()) - return; - - gpio_set_value(H3100_GPIO_LCD_3V_ON, enable); - gpio_set_value(H3XXX_EGPIO_LCD_ON, enable); -} - -static struct sa1100fb_mach_info h3100_lcd_info = { - .pixclock = 406977, .bpp = 4, - .xres = 320, .yres = 240, - - .hsync_len = 26, .vsync_len = 41, - .left_margin = 4, .upper_margin = 0, - .right_margin = 4, .lower_margin = 0, - - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .cmap_greyscale = 1, - .cmap_inverse = 1, - - .lccr0 = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas, - .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), - - .lcd_power = h3100_lcd_power, -}; - -static void __init h3100_map_io(void) -{ - h3xxx_map_io(); - - /* Older bootldrs put GPIO2-9 in alternate mode on the - assumption that they are used for video */ - GAFR &= ~0x000001fb; -} - -/* - * This turns the IRDA power on or off on the Compaq H3100 - */ -static struct gpio h3100_irda_gpio[] = { - { H3100_GPIO_IR_ON, GPIOF_OUT_INIT_LOW, "IrDA power" }, - { H3100_GPIO_IR_FSEL, GPIOF_OUT_INIT_LOW, "IrDA fsel" }, -}; - -static int h3100_irda_set_power(struct device *dev, unsigned int state) -{ - gpio_set_value(H3100_GPIO_IR_ON, state); - return 0; -} - -static void h3100_irda_set_speed(struct device *dev, unsigned int speed) -{ - gpio_set_value(H3100_GPIO_IR_FSEL, !(speed < 4000000)); -} - -static int h3100_irda_startup(struct device *dev) -{ - return gpio_request_array(h3100_irda_gpio, sizeof(h3100_irda_gpio)); -} - -static void h3100_irda_shutdown(struct device *dev) -{ - return gpio_free_array(h3100_irda_gpio, sizeof(h3100_irda_gpio)); -} - -static struct irda_platform_data h3100_irda_data = { - .set_power = h3100_irda_set_power, - .set_speed = h3100_irda_set_speed, - .startup = h3100_irda_startup, - .shutdown = h3100_irda_shutdown, -}; - -static void __init h3100_mach_init(void) -{ - h3xxx_mach_init(); - - sa11x0_register_pcmcia(-1, NULL); - sa11x0_register_lcd(&h3100_lcd_info); - sa11x0_register_irda(&h3100_irda_data); -} - -MACHINE_START(H3100, "Compaq iPAQ H3100") - .atag_offset = 0x100, - .map_io = h3100_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = sa1100_init_irq, - .init_time = sa1100_timer_init, - .init_machine = h3100_mach_init, - .init_late = sa11x0_init_late, - .restart = sa11x0_restart, -MACHINE_END - diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index baf529117b26..5e25dfa752e9 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c @@ -14,7 +14,6 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <linux/platform_data/irda-sa11x0.h> #include <mach/h3xxx.h> #include <mach/irqs.h> @@ -90,48 +89,11 @@ static void __init h3600_map_io(void) h3xxx_map_io(); } -/* - * This turns the IRDA power on or off on the Compaq H3600 - */ -static struct gpio h3600_irda_gpio[] = { - { H3600_EGPIO_IR_ON, GPIOF_OUT_INIT_LOW, "IrDA power" }, - { H3600_EGPIO_IR_FSEL, GPIOF_OUT_INIT_LOW, "IrDA fsel" }, -}; - -static int h3600_irda_set_power(struct device *dev, unsigned int state) -{ - gpio_set_value(H3600_EGPIO_IR_ON, state); - return 0; -} - -static void h3600_irda_set_speed(struct device *dev, unsigned int speed) -{ - gpio_set_value(H3600_EGPIO_IR_FSEL, !(speed < 4000000)); -} - -static int h3600_irda_startup(struct device *dev) -{ - return gpio_request_array(h3600_irda_gpio, sizeof(h3600_irda_gpio)); -} - -static void h3600_irda_shutdown(struct device *dev) -{ - return gpio_free_array(h3600_irda_gpio, sizeof(h3600_irda_gpio)); -} - -static struct irda_platform_data h3600_irda_data = { - .set_power = h3600_irda_set_power, - .set_speed = h3600_irda_set_speed, - .startup = h3600_irda_startup, - .shutdown = h3600_irda_shutdown, -}; - static void __init h3600_mach_init(void) { h3xxx_mach_init(); sa11x0_register_lcd(&h3600_lcd_info); - sa11x0_register_irda(&h3600_irda_data); } MACHINE_START(H3600, "Compaq iPAQ H3600") diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c deleted file mode 100644 index 3085f1c2e586..000000000000 --- a/arch/arm/mach-sa1100/hackkit.c +++ /dev/null @@ -1,184 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-sa1100/hackkit.c - * - * Copyright (C) 2002 Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de> - * - * This file contains all HackKit tweaks. Based on original work from - * Nicolas Pitre's assabet fixes - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/tty.h> -#include <linux/module.h> -#include <linux/errno.h> -#include <linux/cpufreq.h> -#include <linux/platform_data/sa11x0-serial.h> -#include <linux/serial_core.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/tty.h> -#include <linux/gpio.h> -#include <linux/leds.h> -#include <linux/platform_device.h> -#include <linux/pgtable.h> - -#include <asm/mach-types.h> -#include <asm/setup.h> -#include <asm/page.h> - -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <mach/hardware.h> -#include <mach/irqs.h> - -#include "generic.h" - -/********************************************************************** - * prototypes - */ - -/* init funcs */ -static void __init hackkit_map_io(void); - -static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate); - -/********************************************************************** - * global data - */ - -/********************************************************************** - * static data - */ - -static struct map_desc hackkit_io_desc[] __initdata = { - { /* Flash bank 0 */ - .virtual = 0xe8000000, - .pfn = __phys_to_pfn(0x00000000), - .length = 0x01000000, - .type = MT_DEVICE - }, -}; - -static struct sa1100_port_fns hackkit_port_fns __initdata = { - .pm = hackkit_uart_pm, -}; - -/********************************************************************** - * Static functions - */ - -static void __init hackkit_map_io(void) -{ - sa1100_map_io(); - iotable_init(hackkit_io_desc, ARRAY_SIZE(hackkit_io_desc)); - - sa1100_register_uart_fns(&hackkit_port_fns); - sa1100_register_uart(0, 1); /* com port */ - sa1100_register_uart(1, 2); - sa1100_register_uart(2, 3); /* radio module */ - - Ser1SDCR0 |= SDCR0_SUS; -} - -/** - * hackkit_uart_pm - powermgmt callback function for system 3 UART - * @port: uart port structure - * @state: pm state - * @oldstate: old pm state - * - */ -static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate) -{ - /* TODO: switch on/off uart in powersave mode */ -} - -static struct mtd_partition hackkit_partitions[] = { - { - .name = "BLOB", - .size = 0x00040000, - .offset = 0x00000000, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, { - .name = "config", - .size = 0x00040000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "kernel", - .size = 0x00100000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "initrd", - .size = 0x00180000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "rootfs", - .size = 0x700000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "data", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - } -}; - -static struct flash_platform_data hackkit_flash_data = { - .map_name = "cfi_probe", - .parts = hackkit_partitions, - .nr_parts = ARRAY_SIZE(hackkit_partitions), -}; - -static struct resource hackkit_flash_resource = - DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M); - -/* LEDs */ -struct gpio_led hackkit_gpio_leds[] = { - { - .name = "hackkit:red", - .default_trigger = "cpu0", - .gpio = 22, - }, - { - .name = "hackkit:green", - .default_trigger = "heartbeat", - .gpio = 23, - }, -}; - -static struct gpio_led_platform_data hackkit_gpio_led_info = { - .leds = hackkit_gpio_leds, - .num_leds = ARRAY_SIZE(hackkit_gpio_leds), -}; - -static struct platform_device hackkit_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &hackkit_gpio_led_info, - } -}; - -static void __init hackkit_init(void) -{ - sa11x0_register_mtd(&hackkit_flash_data, &hackkit_flash_resource, 1); - platform_device_register(&hackkit_leds); -} - -/********************************************************************** - * Exported Functions - */ - -MACHINE_START(HACKKIT, "HackKit Cpu Board") - .atag_offset = 0x100, - .map_io = hackkit_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = sa1100_init_irq, - .init_time = sa1100_timer_init, - .init_machine = hackkit_init, - .init_late = sa11x0_init_late, - .restart = sa11x0_restart, -MACHINE_END diff --git a/arch/arm/mach-sa1100/include/mach/badge4.h b/arch/arm/mach-sa1100/include/mach/badge4.h deleted file mode 100644 index 90e744a54ed5..000000000000 --- a/arch/arm/mach-sa1100/include/mach/badge4.h +++ /dev/null @@ -1,71 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-sa1100/include/mach/badge4.h - * - * Tim Connors <connors@hpl.hp.com> - * Christopher Hoover <ch@hpl.hp.com> - * - * Copyright (C) 2002 Hewlett-Packard Company - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#error "include <mach/hardware.h> instead" -#endif - -#define BADGE4_SA1111_BASE (0x48000000) - -/* GPIOs on the BadgePAD 4 */ -#define BADGE4_GPIO_INT_1111 GPIO_GPIO0 /* SA-1111 IRQ */ - -#define BADGE4_GPIO_INT_VID GPIO_GPIO1 /* Video expansion */ -#define BADGE4_GPIO_LGP2 GPIO_GPIO2 /* GPIO_LDD8 */ -#define BADGE4_GPIO_LGP3 GPIO_GPIO3 /* GPIO_LDD9 */ -#define BADGE4_GPIO_LGP4 GPIO_GPIO4 /* GPIO_LDD10 */ -#define BADGE4_GPIO_LGP5 GPIO_GPIO5 /* GPIO_LDD11 */ -#define BADGE4_GPIO_LGP6 GPIO_GPIO6 /* GPIO_LDD12 */ -#define BADGE4_GPIO_LGP7 GPIO_GPIO7 /* GPIO_LDD13 */ -#define BADGE4_GPIO_LGP8 GPIO_GPIO8 /* GPIO_LDD14 */ -#define BADGE4_GPIO_LGP9 GPIO_GPIO9 /* GPIO_LDD15 */ -#define BADGE4_GPIO_GPA_VID GPIO_GPIO10 /* Video expansion */ -#define BADGE4_GPIO_GPB_VID GPIO_GPIO11 /* Video expansion */ -#define BADGE4_GPIO_GPC_VID GPIO_GPIO12 /* Video expansion */ - -#define BADGE4_GPIO_UART_HS1 GPIO_GPIO13 -#define BADGE4_GPIO_UART_HS2 GPIO_GPIO14 - -#define BADGE4_GPIO_MUXSEL0 GPIO_GPIO15 -#define BADGE4_GPIO_TESTPT_J7 GPIO_GPIO16 - -#define BADGE4_GPIO_SDSDA GPIO_GPIO17 /* SDRAM SPD Data */ -#define BADGE4_GPIO_SDSCL GPIO_GPIO18 /* SDRAM SPD Clock */ -#define BADGE4_GPIO_SDTYP0 GPIO_GPIO19 /* SDRAM Type Control */ -#define BADGE4_GPIO_SDTYP1 GPIO_GPIO20 /* SDRAM Type Control */ - -#define BADGE4_GPIO_BGNT_1111 GPIO_GPIO21 /* GPIO_MBGNT */ -#define BADGE4_GPIO_BREQ_1111 GPIO_GPIO22 /* GPIO_TREQA */ - -#define BADGE4_GPIO_TESTPT_J6 GPIO_GPIO23 - -#define BADGE4_GPIO_PCMEN5V GPIO_GPIO24 /* 5V power */ - -#define BADGE4_GPIO_SA1111_NRST GPIO_GPIO25 /* SA-1111 nRESET */ - -#define BADGE4_GPIO_TESTPT_J5 GPIO_GPIO26 - -#define BADGE4_GPIO_CLK_1111 GPIO_GPIO27 /* GPIO_32_768kHz */ - -/* Interrupts on the BadgePAD 4 */ -#define BADGE4_IRQ_GPIO_SA1111 IRQ_GPIO0 /* SA-1111 interrupt */ - - -/* PCM5ENV Usage tracking */ - -#define BADGE4_5V_PCMCIA_SOCK0 (1<<0) -#define BADGE4_5V_PCMCIA_SOCK1 (1<<1) -#define BADGE4_5V_PCMCIA_SOCK(n) (1<<(n)) -#define BADGE4_5V_USB (1<<2) -#define BADGE4_5V_INITIALLY (1<<3) - -#ifndef __ASSEMBLY__ -extern void badge4_set_5V(unsigned subsystem, int on); -#endif diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h deleted file mode 100644 index 59c185ebd494..000000000000 --- a/arch/arm/mach-sa1100/include/mach/cerf.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-sa1100/include/mach/cerf.h - * - * Apr-2003 : Removed some old PDA crud [FB] - */ -#ifndef _INCLUDE_CERF_H_ -#define _INCLUDE_CERF_H_ - - -#define CERF_ETH_IO 0xf0000000 -#define CERF_ETH_IRQ IRQ_GPIO26 - -#define CERF_GPIO_CF_BVD2 19 -#define CERF_GPIO_CF_BVD1 20 -#define CERF_GPIO_CF_RESET 21 -#define CERF_GPIO_CF_IRQ 22 -#define CERF_GPIO_CF_CD 23 - -#endif // _INCLUDE_CERF_H_ diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h deleted file mode 100644 index 8d5ee1438956..000000000000 --- a/arch/arm/mach-sa1100/include/mach/nanoengine.h +++ /dev/null @@ -1,48 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-sa1100/include/mach/nanoengine.h - * - * This file contains the hardware specific definitions for nanoEngine. - * Only include this file from SA1100-specific files. - * - * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> - */ -#ifndef __ASM_ARCH_NANOENGINE_H -#define __ASM_ARCH_NANOENGINE_H - -#include <mach/irqs.h> - -#define GPIO_PC_READY0 11 /* ready for socket 0 (active high)*/ -#define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */ -#define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */ -#define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */ -#define GPIO_PC_RESET0 15 /* reset socket 0 */ -#define GPIO_PC_RESET1 16 /* reset socket 1 */ - -#define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0 -#define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11 -#define NANOENGINE_IRQ_GPIO_PC_READY1 IRQ_GPIO12 -#define NANOENGINE_IRQ_GPIO_PC_CD0 IRQ_GPIO13 -#define NANOENGINE_IRQ_GPIO_PC_CD1 IRQ_GPIO14 - -/* - * nanoEngine Memory Map: - * - * 0000.0000 - 003F.0000 - 4 MB Flash - * C000.0000 - C1FF.FFFF - 32 MB SDRAM - * 1860.0000 - 186F.FFFF - 1 MB Internal PCI Memory Read/Write - * 18A1.0000 - 18A1.FFFF - 64 KB Internal PCI Config Space - * 4000.0000 - 47FF.FFFF - 128 MB External Bus I/O - Multiplexed Mode - * 4800.0000 - 4FFF.FFFF - 128 MB External Bus I/O - Non-Multiplexed Mode - * - */ - -#define NANO_PCI_MEM_RW_PHYS 0x18600000 -#define NANO_PCI_MEM_RW_VIRT 0xf1000000 -#define NANO_PCI_MEM_RW_SIZE SZ_1M -#define NANO_PCI_CONFIG_SPACE_PHYS 0x18A10000 -#define NANO_PCI_CONFIG_SPACE_VIRT 0xf2000000 -#define NANO_PCI_CONFIG_SPACE_SIZE SZ_64K - -#endif - diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h deleted file mode 100644 index d830375f329c..000000000000 --- a/arch/arm/mach-sa1100/include/mach/shannon.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _INCLUDE_SHANNON_H -#define _INCLUDE_SHANNON_H - -/* taken from comp.os.inferno Tue, 12 Sep 2000 09:21:50 GMT, - * written by <forsyth@vitanuova.com> */ - -#define SHANNON_GPIO_SPI_FLASH GPIO_GPIO (0) /* Output - Driven low, enables SPI to flash */ -#define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */ -/* lcd lower = GPIO 2-9 */ -#define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */ -#define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */ -#define SHANNON_GPIO_SPI_CLOCK GPIO_GPIO (12) /* Output - Clock for SPI */ -#define SHANNON_GPIO_SPI_FRAME GPIO_GPIO (13) /* Output - Frame marker - not used */ -#define SHANNON_GPIO_SPI_RTS GPIO_GPIO (14) /* Input - SPI Ready to Send */ -#define SHANNON_IRQ_GPIO_SPI_RTS IRQ_GPIO14 -#define SHANNON_GPIO_SPI_CTS GPIO_GPIO (15) /* Output - SPI Clear to Send */ -#define SHANNON_GPIO_IRQ_CODEC GPIO_GPIO (16) /* in, irq from ucb1200 */ -#define SHANNON_IRQ_GPIO_IRQ_CODEC IRQ_GPIO16 -#define SHANNON_GPIO_DSP_RESET GPIO_GPIO (17) /* Output - Drive low to reset the DSP */ -#define SHANNON_GPIO_CODEC_RESET GPIO_GPIO (18) /* Output - Drive low to reset the UCB1x00 */ -#define SHANNON_GPIO_U3_RTS GPIO_GPIO (19) /* ?? */ -#define SHANNON_GPIO_U3_CTS GPIO_GPIO (20) /* ?? */ -#define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */ -#define SHANNON_GPIO_DISP_EN 22 /* out */ -/* XXX GPIO 23 unaccounted for */ -#define SHANNON_GPIO_EJECT_0 24 /* in */ -#define SHANNON_GPIO_EJECT_1 25 /* in */ -#define SHANNON_GPIO_RDY_0 26 /* in */ -#define SHANNON_GPIO_RDY_1 27 /* in */ - -/* MCP UCB codec GPIO pins... */ - -#define SHANNON_UCB_GPIO_BACKLIGHT 9 -#define SHANNON_UCB_GPIO_BRIGHT_MASK 7 -#define SHANNON_UCB_GPIO_BRIGHT 6 -#define SHANNON_UCB_GPIO_CONTRAST_MASK 0x3f -#define SHANNON_UCB_GPIO_CONTRAST 0 - -#endif diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h deleted file mode 100644 index d53d680de3d9..000000000000 --- a/arch/arm/mach-sa1100/include/mach/simpad.h +++ /dev/null @@ -1,159 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * arch/arm/mach-sa1100/include/mach/simpad.h - * - * based of assabet.h same as HUW_Webpanel - * - * This file contains the hardware specific definitions for SIMpad - * - * 2001/05/14 Juergen Messerer <juergen.messerer@freesurf.ch> - */ - -#ifndef __ASM_ARCH_SIMPAD_H -#define __ASM_ARCH_SIMPAD_H - - -#define GPIO_UART1_RTS GPIO_GPIO14 -#define GPIO_UART1_DTR GPIO_GPIO7 -#define GPIO_UART1_CTS GPIO_GPIO8 -#define GPIO_UART1_DCD GPIO_GPIO23 -#define GPIO_UART1_DSR GPIO_GPIO6 - -#define GPIO_UART3_RTS GPIO_GPIO12 -#define GPIO_UART3_DTR GPIO_GPIO16 -#define GPIO_UART3_CTS GPIO_GPIO13 -#define GPIO_UART3_DCD GPIO_GPIO18 -#define GPIO_UART3_DSR GPIO_GPIO17 - -#define GPIO_POWER_BUTTON GPIO_GPIO0 -#define GPIO_UCB1300_IRQ GPIO_GPIO22 /* UCB GPIO and touchscreen */ - -#define IRQ_UART1_CTS IRQ_GPIO15 -#define IRQ_UART1_DCD GPIO_GPIO23 -#define IRQ_UART1_DSR GPIO_GPIO6 -#define IRQ_UART3_CTS GPIO_GPIO13 -#define IRQ_UART3_DCD GPIO_GPIO18 -#define IRQ_UART3_DSR GPIO_GPIO17 - -#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO22 -#define IRQ_GPIO_POWER_BUTTON IRQ_GPIO0 - - -/*--- PCMCIA ---*/ -#define GPIO_CF_CD 24 -#define GPIO_CF_IRQ 1 - -/*--- SmartCard ---*/ -#define GPIO_SMART_CARD GPIO_GPIO10 -#define IRQ_GPIO_SMARD_CARD IRQ_GPIO10 - -/*--- ucb1x00 GPIO ---*/ -#define SIMPAD_UCB1X00_GPIO_BASE (GPIO_MAX + 1) -#define SIMPAD_UCB1X00_GPIO_PROG1 (SIMPAD_UCB1X00_GPIO_BASE) -#define SIMPAD_UCB1X00_GPIO_PROG2 (SIMPAD_UCB1X00_GPIO_BASE + 1) -#define SIMPAD_UCB1X00_GPIO_UP (SIMPAD_UCB1X00_GPIO_BASE + 2) -#define SIMPAD_UCB1X00_GPIO_DOWN (SIMPAD_UCB1X00_GPIO_BASE + 3) -#define SIMPAD_UCB1X00_GPIO_LEFT (SIMPAD_UCB1X00_GPIO_BASE + 4) -#define SIMPAD_UCB1X00_GPIO_RIGHT (SIMPAD_UCB1X00_GPIO_BASE + 5) -#define SIMPAD_UCB1X00_GPIO_6 (SIMPAD_UCB1X00_GPIO_BASE + 6) -#define SIMPAD_UCB1X00_GPIO_7 (SIMPAD_UCB1X00_GPIO_BASE + 7) -#define SIMPAD_UCB1X00_GPIO_HEADSET (SIMPAD_UCB1X00_GPIO_BASE + 8) -#define SIMPAD_UCB1X00_GPIO_SPEAKER (SIMPAD_UCB1X00_GPIO_BASE + 9) - -/*--- CS3 Latch ---*/ -#define SIMPAD_CS3_GPIO_BASE (GPIO_MAX + 11) -#define SIMPAD_CS3_VCC_5V_EN (SIMPAD_CS3_GPIO_BASE) -#define SIMPAD_CS3_VCC_3V_EN (SIMPAD_CS3_GPIO_BASE + 1) -#define SIMPAD_CS3_EN1 (SIMPAD_CS3_GPIO_BASE + 2) -#define SIMPAD_CS3_EN0 (SIMPAD_CS3_GPIO_BASE + 3) -#define SIMPAD_CS3_DISPLAY_ON (SIMPAD_CS3_GPIO_BASE + 4) -#define SIMPAD_CS3_PCMCIA_BUFF_DIS (SIMPAD_CS3_GPIO_BASE + 5) -#define SIMPAD_CS3_MQ_RESET (SIMPAD_CS3_GPIO_BASE + 6) -#define SIMPAD_CS3_PCMCIA_RESET (SIMPAD_CS3_GPIO_BASE + 7) -#define SIMPAD_CS3_DECT_POWER_ON (SIMPAD_CS3_GPIO_BASE + 8) -#define SIMPAD_CS3_IRDA_SD (SIMPAD_CS3_GPIO_BASE + 9) -#define SIMPAD_CS3_RS232_ON (SIMPAD_CS3_GPIO_BASE + 10) -#define SIMPAD_CS3_SD_MEDIAQ (SIMPAD_CS3_GPIO_BASE + 11) -#define SIMPAD_CS3_LED2_ON (SIMPAD_CS3_GPIO_BASE + 12) -#define SIMPAD_CS3_IRDA_MODE (SIMPAD_CS3_GPIO_BASE + 13) -#define SIMPAD_CS3_ENABLE_5V (SIMPAD_CS3_GPIO_BASE + 14) -#define SIMPAD_CS3_RESET_SIMCARD (SIMPAD_CS3_GPIO_BASE + 15) - -#define SIMPAD_CS3_PCMCIA_BVD1 (SIMPAD_CS3_GPIO_BASE + 16) -#define SIMPAD_CS3_PCMCIA_BVD2 (SIMPAD_CS3_GPIO_BASE + 17) -#define SIMPAD_CS3_PCMCIA_VS1 (SIMPAD_CS3_GPIO_BASE + 18) -#define SIMPAD_CS3_PCMCIA_VS2 (SIMPAD_CS3_GPIO_BASE + 19) -#define SIMPAD_CS3_LOCK_IND (SIMPAD_CS3_GPIO_BASE + 20) -#define SIMPAD_CS3_CHARGING_STATE (SIMPAD_CS3_GPIO_BASE + 21) -#define SIMPAD_CS3_PCMCIA_SHORT (SIMPAD_CS3_GPIO_BASE + 22) -#define SIMPAD_CS3_GPIO_23 (SIMPAD_CS3_GPIO_BASE + 23) - -#define CS3_BASE IOMEM(0xf1000000) - -long simpad_get_cs3_ro(void); -long simpad_get_cs3_shadow(void); -void simpad_set_cs3_bit(int value); -void simpad_clear_cs3_bit(int value); - -#define VCC_5V_EN 0x0001 /* For 5V PCMCIA */ -#define VCC_3V_EN 0x0002 /* FOR 3.3V PCMCIA */ -#define EN1 0x0004 /* This is only for EPROM's */ -#define EN0 0x0008 /* Both should be enable for 3.3V or 5V */ -#define DISPLAY_ON 0x0010 -#define PCMCIA_BUFF_DIS 0x0020 -#define MQ_RESET 0x0040 -#define PCMCIA_RESET 0x0080 -#define DECT_POWER_ON 0x0100 -#define IRDA_SD 0x0200 /* Shutdown for powersave */ -#define RS232_ON 0x0400 -#define SD_MEDIAQ 0x0800 /* Shutdown for powersave */ -#define LED2_ON 0x1000 -#define IRDA_MODE 0x2000 /* Fast/Slow IrDA mode */ -#define ENABLE_5V 0x4000 /* Enable 5V circuit */ -#define RESET_SIMCARD 0x8000 - -#define PCMCIA_BVD1 0x01 -#define PCMCIA_BVD2 0x02 -#define PCMCIA_VS1 0x04 -#define PCMCIA_VS2 0x08 -#define LOCK_IND 0x10 -#define CHARGING_STATE 0x20 -#define PCMCIA_SHORT 0x40 - -/*--- Battery ---*/ -struct simpad_battery { - unsigned char ac_status; /* line connected yes/no */ - unsigned char status; /* battery loading yes/no */ - unsigned char percentage; /* percentage loaded */ - unsigned short life; /* life till empty */ -}; - -/* These should match the apm_bios.h definitions */ -#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00 -#define SIMPAD_AC_STATUS_AC_ONLINE 0x01 -#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */ -#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff - -/* These bitfields are rarely "or'd" together */ -#define SIMPAD_BATT_STATUS_HIGH 0x01 -#define SIMPAD_BATT_STATUS_LOW 0x02 -#define SIMPAD_BATT_STATUS_CRITICAL 0x04 -#define SIMPAD_BATT_STATUS_CHARGING 0x08 -#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10 -#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */ -#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */ -#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */ -#define SIMPAD_BATT_STATUS_NOBATT 0x80 -#define SIMPAD_BATT_STATUS_UNKNOWN 0xff - -extern int simpad_get_battery(struct simpad_battery* ); - -#endif // __ASM_ARCH_SIMPAD_H - - - - - - - - diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c deleted file mode 100644 index e3a0279750e3..000000000000 --- a/arch/arm/mach-sa1100/lart.c +++ /dev/null @@ -1,177 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * linux/arch/arm/mach-sa1100/lart.c - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_data/sa11x0-serial.h> -#include <linux/tty.h> -#include <linux/gpio.h> -#include <linux/leds.h> -#include <linux/platform_device.h> - -#include <video/sa1100fb.h> - -#include <mach/hardware.h> -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <asm/page.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <linux/platform_data/mfd-mcp-sa11x0.h> -#include <mach/irqs.h> - -#include "generic.h" - -static struct mcp_plat_data lart_mcp_data = { - .mccr0 = MCCR0_ADM, - .sclk_rate = 11981000, -}; - -#ifdef LART_GREY_LCD -static struct sa1100fb_mach_info lart_grey_info = { - .pixclock = 150000, .bpp = 4, - .xres = 320, .yres = 240, - - .hsync_len = 1, .vsync_len = 1, - .left_margin = 4, .upper_margin = 0, - .right_margin = 2, .lower_margin = 0, - - .cmap_greyscale = 1, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - - .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono, - .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), -}; -#endif -#ifdef LART_COLOR_LCD -static struct sa1100fb_mach_info lart_color_info = { - .pixclock = 150000, .bpp = 16, - .xres = 320, .yres = 240, - - .hsync_len = 2, .vsync_len = 3, - .left_margin = 69, .upper_margin = 14, - .right_margin = 8, .lower_margin = 4, - - .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, - .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), -}; -#endif -#ifdef LART_VIDEO_OUT -static struct sa1100fb_mach_info lart_video_info = { - .pixclock = 39721, .bpp = 16, - .xres = 640, .yres = 480, - - .hsync_len = 95, .vsync_len = 2, - .left_margin = 40, .upper_margin = 32, - .right_margin = 24, .lower_margin = 11, - - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - - .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, - .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), -}; -#endif - -#ifdef LART_KIT01_LCD -static struct sa1100fb_mach_info lart_kit01_info = { - .pixclock = 63291, .bpp = 16, - .xres = 640, .yres = 480, - - .hsync_len = 64, .vsync_len = 3, - .left_margin = 122, .upper_margin = 45, - .right_margin = 10, .lower_margin = 10, - - .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, - .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg -}; -#endif - -static void __init lart_init(void) -{ - struct sa1100fb_mach_info *inf = NULL; - -#ifdef LART_GREY_LCD - inf = &lart_grey_info; -#endif -#ifdef LART_COLOR_LCD - inf = &lart_color_info; -#endif -#ifdef LART_VIDEO_OUT - inf = &lart_video_info; -#endif -#ifdef LART_KIT01_LCD - inf = &lart_kit01_info; -#endif - - if (inf) - sa11x0_register_lcd(inf); - - sa11x0_ppc_configure_mcp(); - sa11x0_register_mcp(&lart_mcp_data); -} - -static struct map_desc lart_io_desc[] __initdata = { - { /* main flash memory */ - .virtual = 0xe8000000, - .pfn = __phys_to_pfn(0x00000000), - .length = 0x00400000, - .type = MT_DEVICE - }, { /* main flash, alternative location */ - .virtual = 0xec000000, - .pfn = __phys_to_pfn(0x08000000), - .length = 0x00400000, - .type = MT_DEVICE - } -}; - -/* LEDs */ -struct gpio_led lart_gpio_leds[] = { - { - .name = "lart:red", - .default_trigger = "cpu0", - .gpio = 23, - }, -}; - -static struct gpio_led_platform_data lart_gpio_led_info = { - .leds = lart_gpio_leds, - .num_leds = ARRAY_SIZE(lart_gpio_leds), -}; - -static struct platform_device lart_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &lart_gpio_led_info, - } -}; -static void __init lart_map_io(void) -{ - sa1100_map_io(); - iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc)); - - sa1100_register_uart(0, 3); - sa1100_register_uart(1, 1); - sa1100_register_uart(2, 2); - - GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); - GPDR |= GPIO_UART_TXD; - GPDR &= ~GPIO_UART_RXD; - PPAR |= PPAR_UPR; - - platform_device_register(&lart_leds); -} - -MACHINE_START(LART, "LART") - .atag_offset = 0x100, - .map_io = lart_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = sa1100_init_irq, - .init_machine = lart_init, - .init_late = sa11x0_init_late, - .init_time = sa1100_timer_init, - .restart = sa11x0_restart, -MACHINE_END diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c deleted file mode 100644 index f6c9c19c39fb..000000000000 --- a/arch/arm/mach-sa1100/nanoengine.c +++ /dev/null @@ -1,136 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-sa1100/nanoengine.c - * - * Bright Star Engineering's nanoEngine board init code. - * - * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> - */ - -#include <linux/init.h> -#include <linux/gpio/machine.h> -#include <linux/kernel.h> -#include <linux/platform_data/sa11x0-serial.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/root_dev.h> - -#include <asm/mach-types.h> -#include <asm/setup.h> -#include <asm/page.h> - -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach/map.h> - -#include <mach/hardware.h> -#include <mach/nanoengine.h> -#include <mach/irqs.h> - -#include "generic.h" - -/* Flash bank 0 */ -static struct mtd_partition nanoengine_partitions[] = { - { - .name = "nanoEngine boot firmware and parameter table", - .size = 0x00010000, /* 32K */ - .offset = 0, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel/initrd reserved", - .size = 0x002f0000, - .offset = 0x00010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "experimental filesystem allocation", - .size = 0x00100000, - .offset = 0x00300000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data nanoengine_flash_data = { - .map_name = "jedec_probe", - .parts = nanoengine_partitions, - .nr_parts = ARRAY_SIZE(nanoengine_partitions), -}; - -static struct resource nanoengine_flash_resources[] = { - DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), - DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), -}; - -static struct map_desc nanoengine_io_desc[] __initdata = { - { - /* System Registers */ - .virtual = 0xf0000000, - .pfn = __phys_to_pfn(0x10000000), - .length = 0x00100000, - .type = MT_DEVICE - }, { - /* Internal PCI Memory Read/Write */ - .virtual = NANO_PCI_MEM_RW_VIRT, - .pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS), - .length = NANO_PCI_MEM_RW_SIZE, - .type = MT_DEVICE - }, { - /* Internal PCI Config Space */ - .virtual = NANO_PCI_CONFIG_SPACE_VIRT, - .pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS), - .length = NANO_PCI_CONFIG_SPACE_SIZE, - .type = MT_DEVICE - } -}; - -static void __init nanoengine_map_io(void) -{ - sa1100_map_io(); - iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc)); - - sa1100_register_uart(0, 1); - sa1100_register_uart(1, 2); - sa1100_register_uart(2, 3); - Ser1SDCR0 |= SDCR0_UART; - /* disable IRDA -- UART2 is used as a normal serial port */ - Ser2UTCR4 = 0; - Ser2HSCR0 = 0; -} - -static struct gpiod_lookup_table nanoengine_pcmcia0_gpio_table = { - .dev_id = "sa11x0-pcmcia.0", - .table = { - GPIO_LOOKUP("gpio", 11, "ready", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio", 13, "detect", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio", 15, "reset", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table nanoengine_pcmcia1_gpio_table = { - .dev_id = "sa11x0-pcmcia.1", - .table = { - GPIO_LOOKUP("gpio", 12, "ready", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio", 14, "detect", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio", 16, "reset", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init nanoengine_init(void) -{ - sa11x0_register_pcmcia(0, &nanoengine_pcmcia0_gpio_table); - sa11x0_register_pcmcia(1, &nanoengine_pcmcia1_gpio_table); - sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources, - ARRAY_SIZE(nanoengine_flash_resources)); -} - -MACHINE_START(NANOENGINE, "BSE nanoEngine") - .atag_offset = 0x100, - .map_io = nanoengine_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = sa1100_init_irq, - .init_time = sa1100_timer_init, - .init_machine = nanoengine_init, - .init_late = sa11x0_init_late, - .restart = sa11x0_restart, -MACHINE_END diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c deleted file mode 100644 index 0791d11ff4d4..000000000000 --- a/arch/arm/mach-sa1100/pci-nanoengine.c +++ /dev/null @@ -1,191 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * linux/arch/arm/mach-sa1100/pci-nanoengine.c - * - * PCI functions for BSE nanoEngine PCI - * - * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> - */ -#include <linux/kernel.h> -#include <linux/irq.h> -#include <linux/pci.h> - -#include <asm/mach/pci.h> -#include <asm/mach-types.h> - -#include <mach/nanoengine.h> -#include <mach/hardware.h> - -static void __iomem *nanoengine_pci_map_bus(struct pci_bus *bus, - unsigned int devfn, int where) -{ - if (bus->number != 0 || (devfn >> 3) != 0) - return NULL; - - return (void __iomem *)NANO_PCI_CONFIG_SPACE_VIRT + - ((bus->number << 16) | (devfn << 8) | (where & ~3)); -} - -static struct pci_ops pci_nano_ops = { - .map_bus = nanoengine_pci_map_bus, - .read = pci_generic_config_read32, - .write = pci_generic_config_write32, -}; - -static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot, - u8 pin) -{ - return NANOENGINE_IRQ_GPIO_PCI; -} - -static struct resource pci_io_ports = - DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO"); - -static struct resource pci_non_prefetchable_memory = { - .name = "PCI non-prefetchable", - .start = NANO_PCI_MEM_RW_PHYS, - /* nanoEngine documentation says there is a 1 Megabyte window here, - * but PCI reports just 128 + 8 kbytes. */ - .end = NANO_PCI_MEM_RW_PHYS + NANO_PCI_MEM_RW_SIZE - 1, -/* .end = NANO_PCI_MEM_RW_PHYS + SZ_128K + SZ_8K - 1,*/ - .flags = IORESOURCE_MEM, -}; - -/* - * nanoEngine PCI reports 1 Megabyte of prefetchable memory, but it - * overlaps with previously defined memory. - * - * Here is what happens: - * -# dmesg -... -pci 0000:00:00.0: [8086:1209] type 0 class 0x000200 -pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff] -pci 0000:00:00.0: reg 14: [io 0x0000-0x003f] -pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff] -pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref] -pci 0000:00:00.0: supports D1 D2 -pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot -pci 0000:00:00.0: PME# disabled -PCI: bus0: Fast back to back transfers enabled -pci 0000:00:00.0: BAR 6: can't assign mem pref (size 0x100000) -pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff] -pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff]) -pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff] -pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff]) -pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f] -pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f]) - * - * On the other hand, if we do not request the prefetchable memory resource, - * linux will alloc it first and the two non-prefetchable memory areas that - * are our real interest will not be mapped. So we choose to map it to an - * unused area. It gets recognized as expansion ROM, but becomes disabled. - * - * Here is what happens then: - * -# dmesg -... -pci 0000:00:00.0: [8086:1209] type 0 class 0x000200 -pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff] -pci 0000:00:00.0: reg 14: [io 0x0000-0x003f] -pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff] -pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref] -pci 0000:00:00.0: supports D1 D2 -pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot -pci 0000:00:00.0: PME# disabled -PCI: bus0: Fast back to back transfers enabled -pci 0000:00:00.0: BAR 6: assigned [mem 0x78000000-0x780fffff pref] -pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff] -pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff]) -pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff] -pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff]) -pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f] -pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f]) - -# lspci -vv -s 0000:00:00.0 -00:00.0 Class 0200: Device 8086:1209 (rev 09) - Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx- - Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR+ <PERR+ INTx- - Latency: 0 (2000ns min, 14000ns max), Cache Line Size: 32 bytes - Interrupt: pin A routed to IRQ 0 - Region 0: Memory at 18620000 (32-bit, non-prefetchable) [size=4K] - Region 1: I/O ports at 0400 [size=64] - Region 2: [virtual] Memory at 18600000 (32-bit, non-prefetchable) [size=128K] - [virtual] Expansion ROM at 78000000 [disabled] [size=1M] - Capabilities: [dc] Power Management version 2 - Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) - Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- - Kernel driver in use: e100 - Kernel modules: e100 - * - */ -static struct resource pci_prefetchable_memory = { - .name = "PCI prefetchable", - .start = 0x78000000, - .end = 0x78000000 + NANO_PCI_MEM_RW_SIZE - 1, - .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, -}; - -static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys) -{ - if (request_resource(&ioport_resource, &pci_io_ports)) { - printk(KERN_ERR "PCI: unable to allocate io port region\n"); - return -EBUSY; - } - if (request_resource(&iomem_resource, &pci_non_prefetchable_memory)) { - release_resource(&pci_io_ports); - printk(KERN_ERR "PCI: unable to allocate non prefetchable\n"); - return -EBUSY; - } - if (request_resource(&iomem_resource, &pci_prefetchable_memory)) { - release_resource(&pci_io_ports); - release_resource(&pci_non_prefetchable_memory); - printk(KERN_ERR "PCI: unable to allocate prefetchable\n"); - return -EBUSY; - } - pci_add_resource_offset(&sys->resources, &pci_io_ports, sys->io_offset); - pci_add_resource_offset(&sys->resources, - &pci_non_prefetchable_memory, sys->mem_offset); - pci_add_resource_offset(&sys->resources, - &pci_prefetchable_memory, sys->mem_offset); - - return 1; -} - -int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys) -{ - int ret = 0; - - pcibios_min_io = 0; - pcibios_min_mem = 0; - - if (nr == 0) { - sys->mem_offset = NANO_PCI_MEM_RW_PHYS; - sys->io_offset = 0x400; - ret = pci_nanoengine_setup_resources(sys); - /* Enable alternate memory bus master mode, see - * "Intel StrongARM SA1110 Developer's Manual", - * section 10.8, "Alternate Memory Bus Master Mode". */ - GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; - GAFR |= GPIO_MBGNT | GPIO_MBREQ; - TUCR |= TUCR_MBGPIO; - } - - return ret; -} - -static struct hw_pci nanoengine_pci __initdata = { - .map_irq = pci_nanoengine_map_irq, - .nr_controllers = 1, - .ops = &pci_nano_ops, - .setup = pci_nanoengine_setup, -}; - -static int __init nanoengine_pci_init(void) -{ - if (machine_is_nanoengine()) - pci_common_init(&nanoengine_pci); - return 0; -} - -subsys_initcall(nanoengine_pci_init); diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c deleted file mode 100644 index b2b0c9fc18f7..000000000000 --- a/arch/arm/mach-sa1100/pleb.c +++ /dev/null @@ -1,148 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * linux/arch/arm/mach-sa1100/pleb.c - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/tty.h> -#include <linux/ioport.h> -#include <linux/platform_data/sa11x0-serial.h> -#include <linux/platform_device.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/mtd/partitions.h> -#include <linux/smc91x.h> - -#include <mach/hardware.h> -#include <asm/setup.h> -#include <asm/mach-types.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> -#include <mach/irqs.h> - -#include "generic.h" - - -/* - * Ethernet IRQ mappings - */ - -#define PLEB_ETH0_P (0x20000300) /* Ethernet 0 in PCMCIA0 IO */ -#define PLEB_ETH0_V (0xf6000300) - -#define GPIO_ETH0_IRQ GPIO_GPIO(21) -#define GPIO_ETH0_EN GPIO_GPIO(26) - -#define IRQ_GPIO_ETH0_IRQ IRQ_GPIO21 - -static struct resource smc91x_resources[] = { - [0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000), -#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */ - [1] = DEFINE_RES_IRQ(IRQ_GPIO_ETH0_IRQ), -#endif -}; - -static struct smc91x_platdata smc91x_platdata = { - .flags = SMC91X_USE_16BIT | SMC91X_USE_8BIT | SMC91X_NOWAIT, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, - .dev = { - .platform_data = &smc91x_platdata, - }, -}; - -static struct platform_device *devices[] __initdata = { - &smc91x_device, -}; - - -/* - * Pleb's memory map - * has flash memory (typically 4 or 8 meg) selected by - * the two SA1100 lowest chip select outputs. - */ -static struct resource pleb_flash_resources[] = { - [0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M), - [1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M), -}; - - -static struct mtd_partition pleb_partitions[] = { - { - .name = "blob", - .offset = 0, - .size = 0x00020000, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = 0x000e0000, - }, { - .name = "rootfs", - .offset = MTDPART_OFS_APPEND, - .size = 0x00300000, - } -}; - - -static struct flash_platform_data pleb_flash_data = { - .map_name = "cfi_probe", - .parts = pleb_partitions, - .nr_parts = ARRAY_SIZE(pleb_partitions), -}; - - -static void __init pleb_init(void) -{ - sa11x0_register_mtd(&pleb_flash_data, pleb_flash_resources, - ARRAY_SIZE(pleb_flash_resources)); - - - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - - -static void __init pleb_map_io(void) -{ - sa1100_map_io(); - - sa1100_register_uart(0, 3); - sa1100_register_uart(1, 1); - - GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); - GPDR |= GPIO_UART_TXD; - GPDR &= ~GPIO_UART_RXD; - PPAR |= PPAR_UPR; - - /* - * Fix expansion memory timing for network card - */ - MECR = ((2<<10) | (2<<5) | (2<<0)); - - /* - * Enable the SMC ethernet controller - */ - GPDR |= GPIO_ETH0_EN; /* set to output */ - GPCR = GPIO_ETH0_EN; /* clear MCLK (enable smc) */ - - GPDR &= ~GPIO_ETH0_IRQ; - - irq_set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING); -} - -MACHINE_START(PLEB, "PLEB") - .map_io = pleb_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = sa1100_init_irq, - .init_time = sa1100_timer_init, - .init_machine = pleb_init, - .init_late = sa11x0_init_late, - .restart = sa11x0_restart, -MACHINE_END diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c deleted file mode 100644 index 351f891b4842..000000000000 --- a/arch/arm/mach-sa1100/shannon.c +++ /dev/null @@ -1,157 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * linux/arch/arm/mach-sa1100/shannon.c - */ - -#include <linux/init.h> -#include <linux/device.h> -#include <linux/gpio/machine.h> -#include <linux/kernel.h> -#include <linux/platform_data/sa11x0-serial.h> -#include <linux/tty.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> - -#include <video/sa1100fb.h> - -#include <mach/hardware.h> -#include <asm/mach-types.h> -#include <asm/setup.h> - -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach/map.h> -#include <linux/platform_data/mfd-mcp-sa11x0.h> -#include <mach/shannon.h> -#include <mach/irqs.h> - -#include "generic.h" - -static struct mtd_partition shannon_partitions[] = { - { - .name = "BLOB boot loader", - .offset = 0, - .size = 0x20000 - }, - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = 0xe0000 - }, - { - .name = "initrd", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL - } -}; - -static struct flash_platform_data shannon_flash_data = { - .map_name = "cfi_probe", - .parts = shannon_partitions, - .nr_parts = ARRAY_SIZE(shannon_partitions), -}; - -static struct resource shannon_flash_resource = - DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M); - -static struct mcp_plat_data shannon_mcp_data = { - .mccr0 = MCCR0_ADM, - .sclk_rate = 11981000, -}; - -static struct sa1100fb_mach_info shannon_lcd_info = { - .pixclock = 152500, .bpp = 8, - .xres = 640, .yres = 480, - - .hsync_len = 4, .vsync_len = 3, - .left_margin = 2, .upper_margin = 0, - .right_margin = 1, .lower_margin = 0, - - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - - .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas, - .lccr3 = LCCR3_ACBsDiv(512), -}; - -static struct gpiod_lookup_table shannon_pcmcia0_gpio_table = { - .dev_id = "sa11x0-pcmcia.0", - .table = { - GPIO_LOOKUP("gpio", 24, "detect", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio", 26, "ready", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table shannon_pcmcia1_gpio_table = { - .dev_id = "sa11x0-pcmcia.1", - .table = { - GPIO_LOOKUP("gpio", 25, "detect", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio", 27, "ready", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct regulator_consumer_supply shannon_cf_vcc_consumers[] = { - REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.0"), - REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"), -}; - -static struct fixed_voltage_config shannon_cf_vcc_pdata __initdata = { - .supply_name = "cf-power", - .microvolts = 3300000, - .enabled_at_boot = 1, -}; - -static struct gpiod_lookup_table shannon_display_gpio_table = { - .dev_id = "sa11x0-fb", - .table = { - GPIO_LOOKUP("gpio", 22, "shannon-lcden", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static void __init shannon_init(void) -{ - sa11x0_register_fixed_regulator(0, &shannon_cf_vcc_pdata, - shannon_cf_vcc_consumers, - ARRAY_SIZE(shannon_cf_vcc_consumers), - false); - sa11x0_register_pcmcia(0, &shannon_pcmcia0_gpio_table); - sa11x0_register_pcmcia(1, &shannon_pcmcia1_gpio_table); - sa11x0_ppc_configure_mcp(); - gpiod_add_lookup_table(&shannon_display_gpio_table); - sa11x0_register_lcd(&shannon_lcd_info); - sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1); - sa11x0_register_mcp(&shannon_mcp_data); -} - -static void __init shannon_map_io(void) -{ - sa1100_map_io(); - - sa1100_register_uart(0, 3); - sa1100_register_uart(1, 1); - - Ser1SDCR0 |= SDCR0_SUS; - GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); - GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET; - GPDR &= ~GPIO_UART_RXD; - PPAR |= PPAR_UPR; - - /* reset the codec */ - GPCR = SHANNON_GPIO_CODEC_RESET; - GPSR = SHANNON_GPIO_CODEC_RESET; -} - -MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)") - .atag_offset = 0x100, - .map_io = shannon_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = sa1100_init_irq, - .init_time = sa1100_timer_init, - .init_machine = shannon_init, - .init_late = sa11x0_init_late, - .restart = sa11x0_restart, -MACHINE_END diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c deleted file mode 100644 index c7fb9a73e4c5..000000000000 --- a/arch/arm/mach-sa1100/simpad.c +++ /dev/null @@ -1,423 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * linux/arch/arm/mach-sa1100/simpad.c - */ - -#include <linux/module.h> -#include <linux/gpio/machine.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/tty.h> -#include <linux/proc_fs.h> -#include <linux/string.h> -#include <linux/pm.h> -#include <linux/platform_data/sa11x0-serial.h> -#include <linux/platform_device.h> -#include <linux/mfd/ucb1x00.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/io.h> -#include <linux/gpio/driver.h> - -#include <mach/hardware.h> -#include <asm/setup.h> -#include <asm/irq.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach/map.h> -#include <linux/platform_data/mfd-mcp-sa11x0.h> -#include <mach/simpad.h> -#include <mach/irqs.h> - -#include <linux/serial_core.h> -#include <linux/ioport.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> -#include <linux/leds.h> -#include <linux/platform_data/i2c-gpio.h> - -#include "generic.h" - -/* - * CS3 support - */ - -static long cs3_shadow; -static spinlock_t cs3_lock; -static struct gpio_chip cs3_gpio; - -long simpad_get_cs3_ro(void) -{ - return readl(CS3_BASE); -} -EXPORT_SYMBOL(simpad_get_cs3_ro); - -long simpad_get_cs3_shadow(void) -{ - return cs3_shadow; -} -EXPORT_SYMBOL(simpad_get_cs3_shadow); - -static void __simpad_write_cs3(void) -{ - writel(cs3_shadow, CS3_BASE); -} - -void simpad_set_cs3_bit(int value) -{ - unsigned long flags; - - spin_lock_irqsave(&cs3_lock, flags); - cs3_shadow |= value; - __simpad_write_cs3(); - spin_unlock_irqrestore(&cs3_lock, flags); -} -EXPORT_SYMBOL(simpad_set_cs3_bit); - -void simpad_clear_cs3_bit(int value) -{ - unsigned long flags; - - spin_lock_irqsave(&cs3_lock, flags); - cs3_shadow &= ~value; - __simpad_write_cs3(); - spin_unlock_irqrestore(&cs3_lock, flags); -} -EXPORT_SYMBOL(simpad_clear_cs3_bit); - -static void cs3_gpio_set(struct gpio_chip *chip, unsigned offset, int value) -{ - if (offset > 15) - return; - if (value) - simpad_set_cs3_bit(1 << offset); - else - simpad_clear_cs3_bit(1 << offset); -}; - -static int cs3_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - if (offset > 15) - return !!(simpad_get_cs3_ro() & (1 << (offset - 16))); - return !!(simpad_get_cs3_shadow() & (1 << offset)); -}; - -static int cs3_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -{ - if (offset > 15) - return 0; - return -EINVAL; -}; - -static int cs3_gpio_direction_output(struct gpio_chip *chip, unsigned offset, - int value) -{ - if (offset > 15) - return -EINVAL; - cs3_gpio_set(chip, offset, value); - return 0; -}; - -static struct map_desc simpad_io_desc[] __initdata = { - { /* MQ200 */ - .virtual = 0xf2800000, - .pfn = __phys_to_pfn(0x4b800000), - .length = 0x00800000, - .type = MT_DEVICE - }, { /* Simpad CS3 */ - .virtual = (unsigned long)CS3_BASE, - .pfn = __phys_to_pfn(SA1100_CS3_PHYS), - .length = 0x00100000, - .type = MT_DEVICE - }, -}; - - -static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate) -{ - if (port->mapbase == (u_int)&Ser1UTCR0) { - if (state) - { - simpad_clear_cs3_bit(RS232_ON); - simpad_clear_cs3_bit(DECT_POWER_ON); - }else - { - simpad_set_cs3_bit(RS232_ON); - simpad_set_cs3_bit(DECT_POWER_ON); - } - } -} - -static struct sa1100_port_fns simpad_port_fns __initdata = { - .pm = simpad_uart_pm, -}; - - -static struct mtd_partition simpad_partitions[] = { - { - .name = "SIMpad boot firmware", - .size = 0x00080000, - .offset = 0, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "SIMpad kernel", - .size = 0x0010000, - .offset = MTDPART_OFS_APPEND, - }, { - .name = "SIMpad root jffs2", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - } -}; - -static struct flash_platform_data simpad_flash_data = { - .map_name = "cfi_probe", - .parts = simpad_partitions, - .nr_parts = ARRAY_SIZE(simpad_partitions), -}; - - -static struct resource simpad_flash_resources [] = { - DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_16M), - DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_16M), -}; - -static struct ucb1x00_plat_data simpad_ucb1x00_data = { - .gpio_base = SIMPAD_UCB1X00_GPIO_BASE, -}; - -static struct mcp_plat_data simpad_mcp_data = { - .mccr0 = MCCR0_ADM, - .sclk_rate = 11981000, - .codec_pdata = &simpad_ucb1x00_data, -}; - - - -static void __init simpad_map_io(void) -{ - sa1100_map_io(); - - iotable_init(simpad_io_desc, ARRAY_SIZE(simpad_io_desc)); - - /* Initialize CS3 */ - cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON | - RS232_ON | ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON); - __simpad_write_cs3(); /* Spinlocks not yet initialized */ - - sa1100_register_uart_fns(&simpad_port_fns); - sa1100_register_uart(0, 3); /* serial interface */ - sa1100_register_uart(1, 1); /* DECT */ - - // Reassign UART 1 pins - GAFR |= GPIO_UART_TXD | GPIO_UART_RXD; - GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15; - GPDR &= ~GPIO_UART_RXD; - PPAR |= PPAR_UPR; - - /* - * Set up registers for sleep mode. - */ - - - PWER = PWER_GPIO0| PWER_RTC; - PGSR = 0x818; - PCFR = 0; - PSDR = 0; - -} - -static void simpad_power_off(void) -{ - local_irq_disable(); - cs3_shadow = SD_MEDIAQ; - __simpad_write_cs3(); /* Bypass spinlock here */ - - /* disable internal oscillator, float CS lines */ - PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS); - /* enable wake-up on GPIO0 */ - PWER = GFER = GRER = PWER_GPIO0; - /* - * set scratchpad to zero, just in case it is used as a - * restart address by the bootloader. - */ - PSPR = 0; - PGSR = 0; - /* enter sleep mode */ - PMCR = PMCR_SF; - while(1); - - local_irq_enable(); /* we won't ever call it */ - - -} - -/* - * gpio_keys -*/ - -static struct gpio_keys_button simpad_button_table[] = { - { KEY_POWER, IRQ_GPIO_POWER_BUTTON, 1, "power button" }, -}; - -static struct gpio_keys_platform_data simpad_keys_data = { - .buttons = simpad_button_table, - .nbuttons = ARRAY_SIZE(simpad_button_table), -}; - -static struct platform_device simpad_keys = { - .name = "gpio-keys", - .dev = { - .platform_data = &simpad_keys_data, - }, -}; - -static struct gpio_keys_button simpad_polled_button_table[] = { - { KEY_PROG1, SIMPAD_UCB1X00_GPIO_PROG1, 1, "prog1 button" }, - { KEY_PROG2, SIMPAD_UCB1X00_GPIO_PROG2, 1, "prog2 button" }, - { KEY_UP, SIMPAD_UCB1X00_GPIO_UP, 1, "up button" }, - { KEY_DOWN, SIMPAD_UCB1X00_GPIO_DOWN, 1, "down button" }, - { KEY_LEFT, SIMPAD_UCB1X00_GPIO_LEFT, 1, "left button" }, - { KEY_RIGHT, SIMPAD_UCB1X00_GPIO_RIGHT, 1, "right button" }, -}; - -static struct gpio_keys_platform_data simpad_polled_keys_data = { - .buttons = simpad_polled_button_table, - .nbuttons = ARRAY_SIZE(simpad_polled_button_table), - .poll_interval = 50, -}; - -static struct platform_device simpad_polled_keys = { - .name = "gpio-keys-polled", - .dev = { - .platform_data = &simpad_polled_keys_data, - }, -}; - -/* - * GPIO LEDs - */ - -static struct gpio_led simpad_leds[] = { - { - .name = "simpad:power", - .gpio = SIMPAD_CS3_LED2_ON, - .active_low = 0, - .default_trigger = "default-on", - }, -}; - -static struct gpio_led_platform_data simpad_led_data = { - .num_leds = ARRAY_SIZE(simpad_leds), - .leds = simpad_leds, -}; - -static struct platform_device simpad_gpio_leds = { - .name = "leds-gpio", - .id = 0, - .dev = { - .platform_data = &simpad_led_data, - }, -}; - -/* - * i2c - */ -static struct gpiod_lookup_table simpad_i2c_gpiod_table = { - .dev_id = "i2c-gpio.0", - .table = { - GPIO_LOOKUP_IDX("gpio", 21, NULL, 0, - GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), - GPIO_LOOKUP_IDX("gpio", 25, NULL, 1, - GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), - }, -}; - -static struct i2c_gpio_platform_data simpad_i2c_data = { - .udelay = 10, - .timeout = HZ, -}; - -static struct platform_device simpad_i2c = { - .name = "i2c-gpio", - .id = 0, - .dev = { - .platform_data = &simpad_i2c_data, - }, -}; - -/* - * MediaQ Video Device - */ -static struct platform_device simpad_mq200fb = { - .name = "simpad-mq200", - .id = 0, -}; - -static struct platform_device *devices[] __initdata = { - &simpad_keys, - &simpad_polled_keys, - &simpad_mq200fb, - &simpad_gpio_leds, - &simpad_i2c, -}; - -/* Compact Flash */ -static struct gpiod_lookup_table simpad_cf_gpio_table = { - .dev_id = "sa11x0-pcmcia", - .table = { - GPIO_LOOKUP("gpio", GPIO_CF_IRQ, "cf-ready", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio", GPIO_CF_CD, "cf-detect", GPIO_ACTIVE_HIGH), - { }, - }, -}; - - -static int __init simpad_init(void) -{ - int ret; - - spin_lock_init(&cs3_lock); - - cs3_gpio.label = "simpad_cs3"; - cs3_gpio.base = SIMPAD_CS3_GPIO_BASE; - cs3_gpio.ngpio = 24; - cs3_gpio.set = cs3_gpio_set; - cs3_gpio.get = cs3_gpio_get; - cs3_gpio.direction_input = cs3_gpio_direction_input; - cs3_gpio.direction_output = cs3_gpio_direction_output; - ret = gpiochip_add_data(&cs3_gpio, NULL); - if (ret) - printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device"); - - pm_power_off = simpad_power_off; - - sa11x0_register_pcmcia(-1, &simpad_cf_gpio_table); - sa11x0_ppc_configure_mcp(); - sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources, - ARRAY_SIZE(simpad_flash_resources)); - sa11x0_register_mcp(&simpad_mcp_data); - - gpiod_add_lookup_table(&simpad_i2c_gpiod_table); - ret = platform_add_devices(devices, ARRAY_SIZE(devices)); - if(ret) - printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device"); - - return 0; -} - -arch_initcall(simpad_init); - - -MACHINE_START(SIMPAD, "Simpad") - /* Maintainer: Holger Freyther */ - .atag_offset = 0x100, - .map_io = simpad_map_io, - .nr_irqs = SA1100_NR_IRQS, - .init_irq = sa1100_init_irq, - .init_late = sa11x0_init_late, - .init_time = sa1100_timer_init, - .restart = sa11x0_restart, -MACHINE_END diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index ab5008f35803..9ef1dfa7b926 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -19,7 +19,6 @@ #include <linux/of_fdt.h> #include <linux/of.h> #include <linux/of_platform.h> -#include <linux/pda_power.h> #include <linux/platform_device.h> #include <linux/serial_8250.h> #include <linux/slab.h> diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index 8647cb80a93b..cabe98386245 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c @@ -18,7 +18,6 @@ #include <linux/clkdev.h> #include <linux/mv643xx_eth.h> #include <linux/mv643xx_i2c.h> -#include <linux/platform_data/dsa.h> #include <linux/platform_data/dma-mv_xor.h> #include <linux/platform_data/usb-ehci-orion.h> #include <plat/common.h> @@ -468,36 +467,6 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, eth_data, &orion_ge11); } -#ifdef CONFIG_ARCH_ORION5X -/***************************************************************************** - * Ethernet switch - ****************************************************************************/ -static __initdata struct mdio_board_info orion_ge00_switch_board_info = { - .bus_id = "orion-mii", - .modalias = "mv88e6085", -}; - -void __init orion_ge00_switch_init(struct dsa_chip_data *d) -{ - unsigned int i; - - if (!IS_BUILTIN(CONFIG_PHYLIB)) - return; - - for (i = 0; i < ARRAY_SIZE(d->port_names); i++) { - if (!strcmp(d->port_names[i], "cpu")) { - d->netdev[i] = &orion_ge00.dev; - break; - } - } - - orion_ge00_switch_board_info.mdio_addr = d->sw_addr; - orion_ge00_switch_board_info.platform_data = d; - - mdiobus_register_board_info(&orion_ge00_switch_board_info, 1); -} -#endif - /***************************************************************************** * I2C ****************************************************************************/ diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h index 3647d3b33c20..d2aad95d20cb 100644 --- a/arch/arm/plat-orion/include/plat/common.h +++ b/arch/arm/plat-orion/include/plat/common.h @@ -12,7 +12,6 @@ #include <linux/mv643xx_eth.h> #include <linux/platform_data/usb-ehci-orion.h> -struct dsa_chip_data; struct mv_sata_platform_data; void __init orion_uart0_init(void __iomem *membase, @@ -57,8 +56,6 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq); -void __init orion_ge00_switch_init(struct dsa_chip_data *d); - void __init orion_i2c_init(unsigned long mapbase, unsigned long irq, unsigned long freq_m); |