diff options
| author | Jesper Nilsson <jesper@jni.nu> | 2018-03-11 11:05:23 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2018-03-16 10:56:05 +0100 |
| commit | c690eddc2f3b44b24520f4a77cc3a4c9bde7d571 (patch) | |
| tree | b7ba2caa6ebb2e36a529f9bf7182c9e0a73d53c4 /arch/cris/include/arch-v32/arch/hwregs/asm/intr_vect.h | |
| parent | bb9d812643d8a121df7d614a2b9c60193a92deb0 (diff) | |
CRIS: Drop support for the CRIS port
The port was added back in 2000 so it's no longer even a good source
of inspiration for newer ports (if it ever was)
The last SoC (ARTPEC-3) with a CRIS main CPU was launched in 2008.
Coupled with time and working developer board hardware being
in low supply, it's time to drop the port from Linux.
So long and thanks for all the fish!
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/cris/include/arch-v32/arch/hwregs/asm/intr_vect.h')
| -rw-r--r-- | arch/cris/include/arch-v32/arch/hwregs/asm/intr_vect.h | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/cris/include/arch-v32/arch/hwregs/asm/intr_vect.h b/arch/cris/include/arch-v32/arch/hwregs/asm/intr_vect.h deleted file mode 100644 index e371052fa1bc..000000000000 --- a/arch/cris/include/arch-v32/arch/hwregs/asm/intr_vect.h +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* Interrupt vector numbers autogenerated by /n/asic/design/tools/rdesc/src/rdes2intr version - from ../../inst/intr_vect/rtl/guinness/ivmask.config.r -version . */ - -#ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R -#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R -#define MEMARB_INTR_VECT 0x31 -#define GEN_IO_INTR_VECT 0x32 -#define IOP0_INTR_VECT 0x33 -#define IOP1_INTR_VECT 0x34 -#define IOP2_INTR_VECT 0x35 -#define IOP3_INTR_VECT 0x36 -#define DMA0_INTR_VECT 0x37 -#define DMA1_INTR_VECT 0x38 -#define DMA2_INTR_VECT 0x39 -#define DMA3_INTR_VECT 0x3a -#define DMA4_INTR_VECT 0x3b -#define DMA5_INTR_VECT 0x3c -#define DMA6_INTR_VECT 0x3d -#define DMA7_INTR_VECT 0x3e -#define DMA8_INTR_VECT 0x3f -#define DMA9_INTR_VECT 0x40 -#define ATA_INTR_VECT 0x41 -#define SSER0_INTR_VECT 0x42 -#define SSER1_INTR_VECT 0x43 -#define SER0_INTR_VECT 0x44 -#define SER1_INTR_VECT 0x45 -#define SER2_INTR_VECT 0x46 -#define SER3_INTR_VECT 0x47 -#define P21_INTR_VECT 0x48 -#define ETH0_INTR_VECT 0x49 -#define ETH1_INTR_VECT 0x4a -#define TIMER_INTR_VECT 0x4b -#define BIF_ARB_INTR_VECT 0x4c -#define BIF_DMA_INTR_VECT 0x4d -#define EXT_INTR_VECT 0x4e - -#endif |