diff options
| author | Guo Ren <ren_guo@c-sky.com> | 2019-04-08 11:12:25 +0800 |
|---|---|---|
| committer | Guo Ren <ren_guo@c-sky.com> | 2019-04-22 13:44:57 +0800 |
| commit | f62e31623d718a7c20d9da98de48361624d7360a (patch) | |
| tree | 686ee8d9ea793443c6ad184f36074c2e391c535c /arch/csky/abiv1 | |
| parent | bf241682936293291dcf40fd93cdd0f5e6222902 (diff) | |
csky: Support dynamic start physical address
Before this patch csky-linux need CONFIG_RAM_BASE to determine start
physical address. Now we use phys_offset variable to replace the macro
of PHYS_OFFSET and we setup phys_offset with real physical address which
is determined during startup in head.S.
With this patch we needn't re-compile kernel for different start
physical address. ie: 0x0 / 0xc0000000 start physical address could use
the same vmlinux, be care different start address must be 512MB aligned.
Signed-off-by: Guo Ren <ren_guo@c-sky.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/csky/abiv1')
| -rw-r--r-- | arch/csky/abiv1/inc/abi/ckmmu.h | 20 | ||||
| -rw-r--r-- | arch/csky/abiv1/inc/abi/entry.h | 19 |
2 files changed, 37 insertions, 2 deletions
diff --git a/arch/csky/abiv1/inc/abi/ckmmu.h b/arch/csky/abiv1/inc/abi/ckmmu.h index 3a002017bebe..85339bd224c4 100644 --- a/arch/csky/abiv1/inc/abi/ckmmu.h +++ b/arch/csky/abiv1/inc/abi/ckmmu.h @@ -40,6 +40,26 @@ static inline void write_mmu_entryhi(int value) cpwcr("cpcr4", value); } +static inline unsigned long read_mmu_msa0(void) +{ + return cprcr("cpcr30"); +} + +static inline void write_mmu_msa0(unsigned long value) +{ + cpwcr("cpcr30", value); +} + +static inline unsigned long read_mmu_msa1(void) +{ + return cprcr("cpcr31"); +} + +static inline void write_mmu_msa1(unsigned long value) +{ + cpwcr("cpcr31", value); +} + /* * TLB operations. */ diff --git a/arch/csky/abiv1/inc/abi/entry.h b/arch/csky/abiv1/inc/abi/entry.h index 4a485b142be1..18e2023bf165 100644 --- a/arch/csky/abiv1/inc/abi/entry.h +++ b/arch/csky/abiv1/inc/abi/entry.h @@ -144,9 +144,24 @@ .endm .macro SETUP_MMU rx - lrw \rx, PHYS_OFFSET | 0xe + /* Select MMU as co-processor */ + cpseti cp15 + + /* + * cpcr30 format: + * 31 - 29 | 28 - 4 | 3 | 2 | 1 | 0 + * BA Reserved C D V + */ + cprcr \rx, cpcr30 + lsri \rx, 28 + lsli \rx, 28 + addi \rx, 0xe cpwcr \rx, cpcr30 - lrw \rx, (PHYS_OFFSET + 0x20000000) | 0xe + + lsri \rx, 28 + addi \rx, 2 + lsli \rx, 28 + addi \rx, 0xe cpwcr \rx, cpcr31 .endm |