diff options
| author | Guo Ren <ren_guo@c-sky.com> | 2018-09-05 14:25:12 +0800 |
|---|---|---|
| committer | Guo Ren <ren_guo@c-sky.com> | 2018-10-25 23:36:19 +0800 |
| commit | 013de2d6671d89de3397904749c86a69ac0686f7 (patch) | |
| tree | a957e4719ccb7f7383bfa17f8937d61409ee9119 /arch/csky/include/asm/mmu.h | |
| parent | 00a9730e1007c6cc87a7c78af2f24a4105d616ee (diff) | |
csky: MMU and page table management
This patch adds files related to memory management and here is our
memory-layout:
Fixmap : 0xffc02000 – 0xfffff000 (4 MB - 12KB)
Pkmap : 0xff800000 – 0xffc00000 (4 MB)
Vmalloc : 0xf0200000 – 0xff000000 (238 MB)
Lowmem : 0x80000000 – 0xc0000000 (1GB)
abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem.
abiv2 CPUs are all PIPT cache and they could support highmem.
Lowmem is directly mapped by msa0 & msa1 reg, and we needn't setup
memory page table for it.
Link:https://lore.kernel.org/lkml/20180518215548.GH17671@n2100.armlinux.org.uk/
Signed-off-by: Guo Ren <ren_guo@c-sky.com>
Cc: Christoph Hellwig <hch@infradead.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/csky/include/asm/mmu.h')
| -rw-r--r-- | arch/csky/include/asm/mmu.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/csky/include/asm/mmu.h b/arch/csky/include/asm/mmu.h new file mode 100644 index 000000000000..cb344675ccc4 --- /dev/null +++ b/arch/csky/include/asm/mmu.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. + +#ifndef __ASM_CSKY_MMU_H +#define __ASM_CSKY_MMU_H + +typedef struct { + unsigned long asid[NR_CPUS]; + void *vdso; +} mm_context_t; + +#endif /* __ASM_CSKY_MMU_H */ |