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authorH. Peter Anvin <hpa@zytor.com>2008-09-04 09:04:45 -0700
committerH. Peter Anvin <hpa@zytor.com>2008-09-04 09:04:45 -0700
commitfe47784ba5cbb6b713c013e046859946789b45e4 (patch)
tree6384958d55e29be0d2eb8ae78fa437c10636d8d6 /arch/h8300/include/asm/cachectl.h
parent83b8e28b14d63db928cb39e5c5ed2a548246bd71 (diff)
parentaf2e1f276ff08f17192411ea3b71c13a758dfe12 (diff)
Merge branch 'x86/cpu' into x86/xsave
Conflicts: arch/x86/kernel/cpu/feature_names.c include/asm-x86/cpufeature.h
Diffstat (limited to 'arch/h8300/include/asm/cachectl.h')
-rw-r--r--arch/h8300/include/asm/cachectl.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/h8300/include/asm/cachectl.h b/arch/h8300/include/asm/cachectl.h
new file mode 100644
index 000000000000..c464022d8e26
--- /dev/null
+++ b/arch/h8300/include/asm/cachectl.h
@@ -0,0 +1,14 @@
+#ifndef _H8300_CACHECTL_H
+#define _H8300_CACHECTL_H
+
+/* Definitions for the cacheflush system call. */
+
+#define FLUSH_SCOPE_LINE 0 /* Flush a cache line */
+#define FLUSH_SCOPE_PAGE 0 /* Flush a page */
+#define FLUSH_SCOPE_ALL 0 /* Flush the whole cache -- superuser only */
+
+#define FLUSH_CACHE_DATA 0 /* Writeback and flush data cache */
+#define FLUSH_CACHE_INSN 0 /* Flush instruction cache */
+#define FLUSH_CACHE_BOTH 0 /* Flush both caches */
+
+#endif /* _H8300_CACHECTL_H */