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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-03-15 12:44:32 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-03-15 12:44:32 -0700 |
| commit | 54f42d2ca84ea9d490e6934392954c9c320e3048 (patch) | |
| tree | 422fc9c485c3acb1776ded26c85dd7f0aef37be4 /arch/mips/boot/dts/ralink | |
| parent | ab522e1478e3191114535f454a1c41ba3b2d1cb9 (diff) | |
| parent | 732932220078f6312f3ef57c17523d3d7f995655 (diff) | |
Merge tag 'mips_6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- added support for Mobileye SoCs
- unified GPR/CP0 regs handling for uasm
- cleanups and fixes
* tag 'mips_6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (56 commits)
mips: cm: Convert __mips_cm_phys_base() to weak function
mips: cm: Convert __mips_cm_l2sync_phys_base() to weak function
mips: dts: ralink: mt7621: add cell count properties to usb
mips: dts: ralink: mt7621: add serial1 and serial2 nodes
mips: dts: ralink: mt7621: reorder serial0 properties
mips: dts: ralink: mt7621: associate uart1_pins with serial0
MIPS: ralink: Don't use "proxy" headers
mips: sibyte: make tb_class constant
mips: mt: make mt_class constant
MIPS: ralink: Remove unused of_gpio.h
bus: bt1-apb: Remove duplicate include
MAINTAINERS: remove entry to non-existing file in MOBILEYE MIPS SOCS
MIPS: mipsregs: Parse fp and sp register by name in parse_r
tty: mips_ejtag_fdc: Fix passing incompatible pointer type warning
mips: zboot: Fix "no previous prototype" build warning
MIPS: mipsregs: Set proper ISA level for virt extensions
MIPS: Implement microMIPS MT ASE helpers
MIPS: Limit MIPS_MT_SMP support by ISA reversion
MIPS: Loongson64: test for -march=loongson3a cflag
MIPS: BMIPS: Drop unnecessary assembler flag
...
Diffstat (limited to 'arch/mips/boot/dts/ralink')
| -rw-r--r-- | arch/mips/boot/dts/ralink/mt7621.dtsi | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index 35a10258f235..6e95e6f19a6a 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -115,14 +115,58 @@ compatible = "ns16550a"; reg = <0xc00 0x100>; + reg-io-width = <4>; + reg-shift = <2>; + clocks = <&sysc MT7621_CLK_UART1>; interrupt-parent = <&gic>; interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + }; + + serial1: serial@d00 { + compatible = "ns16550a"; + reg = <0xd00 0x100>; + + reg-io-width = <4>; reg-shift = <2>; + + clocks = <&sysc MT7621_CLK_UART2>; + + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>; + + no-loopback-test; + + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + + status = "disabled"; + }; + + serial2: serial@e00 { + compatible = "ns16550a"; + reg = <0xe00 0x100>; + reg-io-width = <4>; + reg-shift = <2>; + + clocks = <&sysc MT7621_CLK_UART3>; + + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; + + status = "disabled"; }; spi0: spi@b00 { @@ -263,6 +307,9 @@ 0x1e1d0700 0x0100>; reg-names = "mac", "ippc"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&sysc MT7621_CLK_XTAL>; clock-names = "sys_ck"; |