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authorÁlvaro Fernández Rojas <noltari@gmail.com>2016-08-03 11:58:28 +0200
committerRalf Baechle <ralf@linux-mips.org>2016-10-04 16:13:57 +0200
commit484d83b3d6a0b49b5f26bd9a375b9a1575e09682 (patch)
tree87dc8ee73102e2aa84641daae53c404e956f5ee2 /arch/mips/boot
parent4bac0e2afc7b7603c1781733629254d7a6b9a83c (diff)
MIPS: BMIPS: Add device tree example for BCM3368
This adds a device tree example for Netgear CVG834G. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13843/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r--arch/mips/boot/dts/brcm/Makefile2
-rw-r--r--arch/mips/boot/dts/brcm/bcm3368-netgear-cvg834g.dts22
-rw-r--r--arch/mips/boot/dts/brcm/bcm3368.dtsi101
3 files changed, 125 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile
index 8281ec65d436..a698e845ec53 100644
--- a/arch/mips/boot/dts/brcm/Makefile
+++ b/arch/mips/boot/dts/brcm/Makefile
@@ -11,9 +11,11 @@ dtb-$(CONFIG_DT_BCM97420C) += bcm97420c.dtb
dtb-$(CONFIG_DT_BCM97425SVMB) += bcm97425svmb.dtb
dtb-$(CONFIG_DT_BCM97435SVMB) += bcm97435svmb.dtb
dtb-$(CONFIG_DT_COMTREND_VR3032U) += bcm63268-comtrend-vr-3032u.dtb
+dtb-$(CONFIG_DT_NETGEAR_CVG834G) += bcm3368-netgear-cvg834g.dtb
dtb-$(CONFIG_DT_SFR_NEUFBOX4_SERCOMM) += bcm6358-neufbox4-sercomm.dtb
dtb-$(CONFIG_DT_NONE) += \
+ bcm3368-netgear-cvg834g.dtb \
bcm6358-neufbox4-sercomm.dtb \
bcm63268-comtrend-vr-3032u.dtb \
bcm93384wvg.dtb \
diff --git a/arch/mips/boot/dts/brcm/bcm3368-netgear-cvg834g.dts b/arch/mips/boot/dts/brcm/bcm3368-netgear-cvg834g.dts
new file mode 100644
index 000000000000..2f2e80fdcde8
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm3368-netgear-cvg834g.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/include/ "bcm3368.dtsi"
+
+/ {
+ compatible = "netgear,cvg834g", "brcm,bcm3368";
+ model = "NETGEAR CVG834G";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &uart0;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm3368.dtsi b/arch/mips/boot/dts/brcm/bcm3368.dtsi
new file mode 100644
index 000000000000..bee855cb8073
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm3368.dtsi
@@ -0,0 +1,101 @@
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm3368";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mips-hpt-frequency = <150000000>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips4350";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ubus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ compatible = "simple-bus";
+ ranges;
+
+ periph_cntl: syscon@fff8c000 {
+ compatible = "syscon";
+ reg = <0xfff8c000 0xc>;
+ native-endian;
+ };
+
+ reboot: syscon-reboot@fff8c008 {
+ compatible = "syscon-reboot";
+ regmap = <&periph_cntl>;
+ offset = <0x8>;
+ mask = <0x1>;
+ };
+
+ periph_intc: interrupt-controller@fff8c00c {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0xfff8c00c 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ uart0: serial@fff8c100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfff8c100 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ clocks = <&periph_clk>;
+
+ status = "disabled";
+ };
+
+ uart1: serial@fff8c120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfff8c120 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <3>;
+
+ clocks = <&periph_clk>;
+
+ status = "disabled";
+ };
+ };
+};