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authorJames Hogan <james.hogan@imgtec.com>2015-02-02 11:45:08 +0000
committerRalf Baechle <ralf@linux-mips.org>2015-03-31 12:04:12 +0200
commit9b3274bd585c6dff7848119e837bd5ce6c9173e2 (patch)
tree2fa7fad86c3d19394a7775c57146da2b303e76c3 /arch/mips/include/asm/cpu.h
parent4a91d8fb61e2b5218acc7a46d5dd28ff1f44f927 (diff)
MIPS: Add arch CDMM definitions and probing
Add architectural definitions and probing for the MIPS Common Device Memory Map (CDMM) region. When supported and enabled at a particular physical address, this region allows some number of per-CPU devices to be discovered and controlled via MMIO. A bit exists in Config3 to determine whether the feature is present, and a CDMMBase CP0 register allows the region to be enabled at a particular physical address. [ralf@linux-mips.org: Sort conflict with other patches.] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9178/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
-rw-r--r--arch/mips/include/asm/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 15687234d70a..15903cad1c6f 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -377,6 +377,7 @@ enum cpu_type_enum {
#define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */
#define MIPS_CPU_FRE 0x800000000ull /* FRE & UFE bits implemented */
#define MIPS_CPU_RW_LLB 0x1000000000ull /* LLADDR/LLB writes are allowed */
+#define MIPS_CPU_CDMM 0x2000000000ull /* CPU has Common Device Memory Map */
/*
* CPU ASE encodings