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authorPaul Burton <paul.burton@mips.com>2019-07-22 22:00:00 +0000
committerPaul Burton <paul.burton@mips.com>2019-07-23 14:33:44 -0700
commitccd51b9fc3bf264482dab86875754c40cbe13045 (patch)
tree18456906baa5b00295b2517f03973700420c46e7 /arch/mips/include/asm/mach-generic
parent8e96b08472e6698011d3105912031e90e7ef553f (diff)
MIPS: Remove unused R5432_CP0_INTERRUPT_WAR
R5432_CP0_INTERRUPT_WAR is defined as 0 for every system we support, and so the workaround is never used. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/mach-generic')
-rw-r--r--arch/mips/include/asm/mach-generic/war.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-generic/war.h b/arch/mips/include/asm/mach-generic/war.h
index a1bc2e71f983..f0f4a35d0870 100644
--- a/arch/mips/include/asm/mach-generic/war.h
+++ b/arch/mips/include/asm/mach-generic/war.h
@@ -11,7 +11,6 @@
#define R4600_V1_INDEX_ICACHEOP_WAR 0
#define R4600_V1_HIT_CACHEOP_WAR 0
#define R4600_V2_HIT_CACHEOP_WAR 0
-#define R5432_CP0_INTERRUPT_WAR 0
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#define MIPS4K_ICACHE_REFILL_WAR 0