MIPS: Octeon: Update register definitions for CN63XX chips

The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores.

Join some lines back together.  This makes some of them exceed 80
columns, but they are uninteresting and this unclutters things.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 672 insertions, 66 deletions

diff --git a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
index 337583842b51..7a50a0beb472 100644
--- a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2010 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,70 +28,113 @@
 #ifndef __CVMX_L2C_DEFS_H__
 #define __CVMX_L2C_DEFS_H__
 
-#define CVMX_L2C_BST0 \
-	 CVMX_ADD_IO_SEG(0x00011800800007F8ull)
-#define CVMX_L2C_BST1 \
-	 CVMX_ADD_IO_SEG(0x00011800800007F0ull)
-#define CVMX_L2C_BST2 \
-	 CVMX_ADD_IO_SEG(0x00011800800007E8ull)
-#define CVMX_L2C_CFG \
-	 CVMX_ADD_IO_SEG(0x0001180080000000ull)
-#define CVMX_L2C_DBG \
-	 CVMX_ADD_IO_SEG(0x0001180080000030ull)
-#define CVMX_L2C_DUT \
-	 CVMX_ADD_IO_SEG(0x0001180080000050ull)
-#define CVMX_L2C_GRPWRR0 \
-	 CVMX_ADD_IO_SEG(0x00011800800000C8ull)
-#define CVMX_L2C_GRPWRR1 \
-	 CVMX_ADD_IO_SEG(0x00011800800000D0ull)
-#define CVMX_L2C_INT_EN \
-	 CVMX_ADD_IO_SEG(0x0001180080000100ull)
-#define CVMX_L2C_INT_STAT \
-	 CVMX_ADD_IO_SEG(0x00011800800000F8ull)
-#define CVMX_L2C_LCKBASE \
-	 CVMX_ADD_IO_SEG(0x0001180080000058ull)
-#define CVMX_L2C_LCKOFF \
-	 CVMX_ADD_IO_SEG(0x0001180080000060ull)
-#define CVMX_L2C_LFB0 \
-	 CVMX_ADD_IO_SEG(0x0001180080000038ull)
-#define CVMX_L2C_LFB1 \
-	 CVMX_ADD_IO_SEG(0x0001180080000040ull)
-#define CVMX_L2C_LFB2 \
-	 CVMX_ADD_IO_SEG(0x0001180080000048ull)
-#define CVMX_L2C_LFB3 \
-	 CVMX_ADD_IO_SEG(0x00011800800000B8ull)
-#define CVMX_L2C_OOB \
-	 CVMX_ADD_IO_SEG(0x00011800800000D8ull)
-#define CVMX_L2C_OOB1 \
-	 CVMX_ADD_IO_SEG(0x00011800800000E0ull)
-#define CVMX_L2C_OOB2 \
-	 CVMX_ADD_IO_SEG(0x00011800800000E8ull)
-#define CVMX_L2C_OOB3 \
-	 CVMX_ADD_IO_SEG(0x00011800800000F0ull)
-#define CVMX_L2C_PFC0 \
-	 CVMX_ADD_IO_SEG(0x0001180080000098ull)
-#define CVMX_L2C_PFC1 \
-	 CVMX_ADD_IO_SEG(0x00011800800000A0ull)
-#define CVMX_L2C_PFC2 \
-	 CVMX_ADD_IO_SEG(0x00011800800000A8ull)
-#define CVMX_L2C_PFC3 \
-	 CVMX_ADD_IO_SEG(0x00011800800000B0ull)
-#define CVMX_L2C_PFCTL \
-	 CVMX_ADD_IO_SEG(0x0001180080000090ull)
-#define CVMX_L2C_PFCX(offset) \
-	 CVMX_ADD_IO_SEG(0x0001180080000098ull + (((offset) & 3) * 8))
-#define CVMX_L2C_PPGRP \
-	 CVMX_ADD_IO_SEG(0x00011800800000C0ull)
-#define CVMX_L2C_SPAR0 \
-	 CVMX_ADD_IO_SEG(0x0001180080000068ull)
-#define CVMX_L2C_SPAR1 \
-	 CVMX_ADD_IO_SEG(0x0001180080000070ull)
-#define CVMX_L2C_SPAR2 \
-	 CVMX_ADD_IO_SEG(0x0001180080000078ull)
-#define CVMX_L2C_SPAR3 \
-	 CVMX_ADD_IO_SEG(0x0001180080000080ull)
-#define CVMX_L2C_SPAR4 \
-	 CVMX_ADD_IO_SEG(0x0001180080000088ull)
+#define CVMX_L2C_BIG_CTL (CVMX_ADD_IO_SEG(0x0001180080800030ull))
+#define CVMX_L2C_BST (CVMX_ADD_IO_SEG(0x00011800808007F8ull))
+#define CVMX_L2C_BST0 (CVMX_ADD_IO_SEG(0x00011800800007F8ull))
+#define CVMX_L2C_BST1 (CVMX_ADD_IO_SEG(0x00011800800007F0ull))
+#define CVMX_L2C_BST2 (CVMX_ADD_IO_SEG(0x00011800800007E8ull))
+#define CVMX_L2C_BST_MEMX(block_id) (CVMX_ADD_IO_SEG(0x0001180080C007F8ull))
+#define CVMX_L2C_BST_TDTX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007F0ull))
+#define CVMX_L2C_BST_TTGX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007F8ull))
+#define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x0001180080000000ull))
+#define CVMX_L2C_COP0_MAPX(offset) (CVMX_ADD_IO_SEG(0x0001180080940000ull) + ((offset) & 16383) * 8)
+#define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x0001180080800000ull))
+#define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x0001180080000030ull))
+#define CVMX_L2C_DUT (CVMX_ADD_IO_SEG(0x0001180080000050ull))
+#define CVMX_L2C_DUT_MAPX(offset) (CVMX_ADD_IO_SEG(0x0001180080E00000ull) + ((offset) & 2047) * 8)
+#define CVMX_L2C_ERR_TDTX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007E0ull))
+#define CVMX_L2C_ERR_TTGX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007E8ull))
+#define CVMX_L2C_ERR_VBFX(block_id) (CVMX_ADD_IO_SEG(0x0001180080C007F0ull))
+#define CVMX_L2C_ERR_XMC (CVMX_ADD_IO_SEG(0x00011800808007D8ull))
+#define CVMX_L2C_GRPWRR0 (CVMX_ADD_IO_SEG(0x00011800800000C8ull))
+#define CVMX_L2C_GRPWRR1 (CVMX_ADD_IO_SEG(0x00011800800000D0ull))
+#define CVMX_L2C_INT_EN (CVMX_ADD_IO_SEG(0x0001180080000100ull))
+#define CVMX_L2C_INT_ENA (CVMX_ADD_IO_SEG(0x0001180080800020ull))
+#define CVMX_L2C_INT_REG (CVMX_ADD_IO_SEG(0x0001180080800018ull))
+#define CVMX_L2C_INT_STAT (CVMX_ADD_IO_SEG(0x00011800800000F8ull))
+#define CVMX_L2C_IOCX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800420ull))
+#define CVMX_L2C_IORX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800428ull))
+#define CVMX_L2C_LCKBASE (CVMX_ADD_IO_SEG(0x0001180080000058ull))
+#define CVMX_L2C_LCKOFF (CVMX_ADD_IO_SEG(0x0001180080000060ull))
+#define CVMX_L2C_LFB0 (CVMX_ADD_IO_SEG(0x0001180080000038ull))
+#define CVMX_L2C_LFB1 (CVMX_ADD_IO_SEG(0x0001180080000040ull))
+#define CVMX_L2C_LFB2 (CVMX_ADD_IO_SEG(0x0001180080000048ull))
+#define CVMX_L2C_LFB3 (CVMX_ADD_IO_SEG(0x00011800800000B8ull))
+#define CVMX_L2C_OOB (CVMX_ADD_IO_SEG(0x00011800800000D8ull))
+#define CVMX_L2C_OOB1 (CVMX_ADD_IO_SEG(0x00011800800000E0ull))
+#define CVMX_L2C_OOB2 (CVMX_ADD_IO_SEG(0x00011800800000E8ull))
+#define CVMX_L2C_OOB3 (CVMX_ADD_IO_SEG(0x00011800800000F0ull))
+#define CVMX_L2C_PFC0 CVMX_L2C_PFCX(0)
+#define CVMX_L2C_PFC1 CVMX_L2C_PFCX(1)
+#define CVMX_L2C_PFC2 CVMX_L2C_PFCX(2)
+#define CVMX_L2C_PFC3 CVMX_L2C_PFCX(3)
+#define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x0001180080000090ull))
+#define CVMX_L2C_PFCX(offset) (CVMX_ADD_IO_SEG(0x0001180080000098ull) + ((offset) & 3) * 8)
+#define CVMX_L2C_PPGRP (CVMX_ADD_IO_SEG(0x00011800800000C0ull))
+#define CVMX_L2C_QOS_IOBX(block_id) (CVMX_ADD_IO_SEG(0x0001180080880200ull))
+#define CVMX_L2C_QOS_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080880000ull) + ((offset) & 7) * 8)
+#define CVMX_L2C_QOS_WGT (CVMX_ADD_IO_SEG(0x0001180080800008ull))
+#define CVMX_L2C_RSCX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800410ull))
+#define CVMX_L2C_RSDX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800418ull))
+#define CVMX_L2C_SPAR0 (CVMX_ADD_IO_SEG(0x0001180080000068ull))
+#define CVMX_L2C_SPAR1 (CVMX_ADD_IO_SEG(0x0001180080000070ull))
+#define CVMX_L2C_SPAR2 (CVMX_ADD_IO_SEG(0x0001180080000078ull))
+#define CVMX_L2C_SPAR3 (CVMX_ADD_IO_SEG(0x0001180080000080ull))
+#define CVMX_L2C_SPAR4 (CVMX_ADD_IO_SEG(0x0001180080000088ull))
+#define CVMX_L2C_TADX_ECC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00018ull))
+#define CVMX_L2C_TADX_ECC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00020ull))
+#define CVMX_L2C_TADX_IEN(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00000ull))
+#define CVMX_L2C_TADX_INT(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00028ull))
+#define CVMX_L2C_TADX_PFC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00400ull))
+#define CVMX_L2C_TADX_PFC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00408ull))
+#define CVMX_L2C_TADX_PFC2(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00410ull))
+#define CVMX_L2C_TADX_PFC3(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00418ull))
+#define CVMX_L2C_TADX_PRF(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00008ull))
+#define CVMX_L2C_TADX_TAG(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00010ull))
+#define CVMX_L2C_VER_ID (CVMX_ADD_IO_SEG(0x00011800808007E0ull))
+#define CVMX_L2C_VER_IOB (CVMX_ADD_IO_SEG(0x00011800808007F0ull))
+#define CVMX_L2C_VER_MSC (CVMX_ADD_IO_SEG(0x00011800808007D0ull))
+#define CVMX_L2C_VER_PP (CVMX_ADD_IO_SEG(0x00011800808007E8ull))
+#define CVMX_L2C_VIRTID_IOBX(block_id) (CVMX_ADD_IO_SEG(0x00011800808C0200ull))
+#define CVMX_L2C_VIRTID_PPX(offset) (CVMX_ADD_IO_SEG(0x00011800808C0000ull) + ((offset) & 7) * 8)
+#define CVMX_L2C_VRT_CTL (CVMX_ADD_IO_SEG(0x0001180080800010ull))
+#define CVMX_L2C_VRT_MEMX(offset) (CVMX_ADD_IO_SEG(0x0001180080900000ull) + ((offset) & 1023) * 8)
+#define CVMX_L2C_WPAR_IOBX(block_id) (CVMX_ADD_IO_SEG(0x0001180080840200ull))
+#define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + ((offset) & 7) * 8)
+#define CVMX_L2C_XMCX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800400ull))
+#define CVMX_L2C_XMC_CMD (CVMX_ADD_IO_SEG(0x0001180080800028ull))
+#define CVMX_L2C_XMDX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800408ull))
+
+union cvmx_l2c_big_ctl {
+	uint64_t u64;
+	struct cvmx_l2c_big_ctl_s {
+		uint64_t reserved_8_63:56;
+		uint64_t maxdram:4;
+		uint64_t reserved_1_3:3;
+		uint64_t disable:1;
+	} s;
+	struct cvmx_l2c_big_ctl_s cn63xx;
+};
+
+union cvmx_l2c_bst {
+	uint64_t u64;
+	struct cvmx_l2c_bst_s {
+		uint64_t reserved_38_63:26;
+		uint64_t dutfl:6;
+		uint64_t reserved_17_31:15;
+		uint64_t ioccmdfl:1;
+		uint64_t reserved_13_15:3;
+		uint64_t iocdatfl:1;
+		uint64_t reserved_9_11:3;
+		uint64_t dutresfl:1;
+		uint64_t reserved_5_7:3;
+		uint64_t vrtfl:1;
+		uint64_t reserved_1_3:3;
+		uint64_t tdffl:1;
+	} s;
+	struct cvmx_l2c_bst_s cn63xx;
+	struct cvmx_l2c_bst_s cn63xxp1;
+};
 
 union cvmx_l2c_bst0 {
 	uint64_t u64;
@@ -253,6 +296,48 @@ union cvmx_l2c_bst2 {
 	struct cvmx_l2c_bst2_cn56xx cn58xxp1;
 };
 
+union cvmx_l2c_bst_memx {
+	uint64_t u64;
+	struct cvmx_l2c_bst_memx_s {
+		uint64_t start_bist:1;
+		uint64_t clear_bist:1;
+		uint64_t reserved_5_61:57;
+		uint64_t rdffl:1;
+		uint64_t vbffl:4;
+	} s;
+	struct cvmx_l2c_bst_memx_s cn63xx;
+	struct cvmx_l2c_bst_memx_s cn63xxp1;
+};
+
+union cvmx_l2c_bst_tdtx {
+	uint64_t u64;
+	struct cvmx_l2c_bst_tdtx_s {
+		uint64_t reserved_32_63:32;
+		uint64_t fbfrspfl:8;
+		uint64_t sbffl:8;
+		uint64_t fbffl:8;
+		uint64_t l2dfl:8;
+	} s;
+	struct cvmx_l2c_bst_tdtx_s cn63xx;
+	struct cvmx_l2c_bst_tdtx_cn63xxp1 {
+		uint64_t reserved_24_63:40;
+		uint64_t sbffl:8;
+		uint64_t fbffl:8;
+		uint64_t l2dfl:8;
+	} cn63xxp1;
+};
+
+union cvmx_l2c_bst_ttgx {
+	uint64_t u64;
+	struct cvmx_l2c_bst_ttgx_s {
+		uint64_t reserved_17_63:47;
+		uint64_t lrufl:1;
+		uint64_t tagfl:16;
+	} s;
+	struct cvmx_l2c_bst_ttgx_s cn63xx;
+	struct cvmx_l2c_bst_ttgx_s cn63xxp1;
+};
+
 union cvmx_l2c_cfg {
 	uint64_t u64;
 	struct cvmx_l2c_cfg_s {
@@ -333,6 +418,49 @@ union cvmx_l2c_cfg {
 	} cn58xxp1;
 };
 
+union cvmx_l2c_cop0_mapx {
+	uint64_t u64;
+	struct cvmx_l2c_cop0_mapx_s {
+		uint64_t data:64;
+	} s;
+	struct cvmx_l2c_cop0_mapx_s cn63xx;
+	struct cvmx_l2c_cop0_mapx_s cn63xxp1;
+};
+
+union cvmx_l2c_ctl {
+	uint64_t u64;
+	struct cvmx_l2c_ctl_s {
+		uint64_t reserved_28_63:36;
+		uint64_t disstgl2i:1;
+		uint64_t l2dfsbe:1;
+		uint64_t l2dfdbe:1;
+		uint64_t discclk:1;
+		uint64_t maxvab:4;
+		uint64_t maxlfb:4;
+		uint64_t rsp_arb_mode:1;
+		uint64_t xmc_arb_mode:1;
+		uint64_t ef_ena:1;
+		uint64_t ef_cnt:7;
+		uint64_t vab_thresh:4;
+		uint64_t disecc:1;
+		uint64_t disidxalias:1;
+	} s;
+	struct cvmx_l2c_ctl_s cn63xx;
+	struct cvmx_l2c_ctl_cn63xxp1 {
+		uint64_t reserved_25_63:39;
+		uint64_t discclk:1;
+		uint64_t maxvab:4;
+		uint64_t maxlfb:4;
+		uint64_t rsp_arb_mode:1;
+		uint64_t xmc_arb_mode:1;
+		uint64_t ef_ena:1;
+		uint64_t ef_cnt:7;
+		uint64_t vab_thresh:4;
+		uint64_t disecc:1;
+		uint64_t disidxalias:1;
+	} cn63xxp1;
+};
+
 union cvmx_l2c_dbg {
 	uint64_t u64;
 	struct cvmx_l2c_dbg_s {
@@ -349,7 +477,9 @@ union cvmx_l2c_dbg {
 		uint64_t reserved_13_63:51;
 		uint64_t lfb_enum:2;
 		uint64_t lfb_dmp:1;
-		uint64_t reserved_5_9:5;
+		uint64_t reserved_7_9:3;
+		uint64_t ppnum:1;
+		uint64_t reserved_5_5:1;
 		uint64_t set:2;
 		uint64_t finv:1;
 		uint64_t l2d:1;
@@ -420,6 +550,79 @@ union cvmx_l2c_dut {
 	struct cvmx_l2c_dut_s cn58xxp1;
 };
 
+union cvmx_l2c_dut_mapx {
+	uint64_t u64;
+	struct cvmx_l2c_dut_mapx_s {
+		uint64_t reserved_38_63:26;
+		uint64_t tag:28;
+		uint64_t reserved_1_9:9;
+		uint64_t valid:1;
+	} s;
+	struct cvmx_l2c_dut_mapx_s cn63xx;
+	struct cvmx_l2c_dut_mapx_s cn63xxp1;
+};
+
+union cvmx_l2c_err_tdtx {
+	uint64_t u64;
+	struct cvmx_l2c_err_tdtx_s {
+		uint64_t dbe:1;
+		uint64_t sbe:1;
+		uint64_t vdbe:1;
+		uint64_t vsbe:1;
+		uint64_t syn:10;
+		uint64_t reserved_21_49:29;
+		uint64_t wayidx:17;
+		uint64_t reserved_2_3:2;
+		uint64_t type:2;
+	} s;
+	struct cvmx_l2c_err_tdtx_s cn63xx;
+	struct cvmx_l2c_err_tdtx_s cn63xxp1;
+};
+
+union cvmx_l2c_err_ttgx {
+	uint64_t u64;
+	struct cvmx_l2c_err_ttgx_s {
+		uint64_t dbe:1;
+		uint64_t sbe:1;
+		uint64_t noway:1;
+		uint64_t reserved_56_60:5;
+		uint64_t syn:6;
+		uint64_t reserved_21_49:29;
+		uint64_t wayidx:14;
+		uint64_t reserved_2_6:5;
+		uint64_t type:2;
+	} s;
+	struct cvmx_l2c_err_ttgx_s cn63xx;
+	struct cvmx_l2c_err_ttgx_s cn63xxp1;
+};
+
+union cvmx_l2c_err_vbfx {
+	uint64_t u64;
+	struct cvmx_l2c_err_vbfx_s {
+		uint64_t reserved_62_63:2;
+		uint64_t vdbe:1;
+		uint64_t vsbe:1;
+		uint64_t vsyn:10;
+		uint64_t reserved_2_49:48;
+		uint64_t type:2;
+	} s;
+	struct cvmx_l2c_err_vbfx_s cn63xx;
+	struct cvmx_l2c_err_vbfx_s cn63xxp1;
+};
+
+union cvmx_l2c_err_xmc {
+	uint64_t u64;
+	struct cvmx_l2c_err_xmc_s {
+		uint64_t cmd:6;
+		uint64_t reserved_52_57:6;
+		uint64_t sid:4;
+		uint64_t reserved_38_47:10;
+		uint64_t addr:38;
+	} s;
+	struct cvmx_l2c_err_xmc_s cn63xx;
+	struct cvmx_l2c_err_xmc_s cn63xxp1;
+};
+
 union cvmx_l2c_grpwrr0 {
 	uint64_t u64;
 	struct cvmx_l2c_grpwrr0_s {
@@ -464,6 +667,60 @@ union cvmx_l2c_int_en {
 	struct cvmx_l2c_int_en_s cn56xxp1;
 };
 
+union cvmx_l2c_int_ena {
+	uint64_t u64;
+	struct cvmx_l2c_int_ena_s {
+		uint64_t reserved_8_63:56;
+		uint64_t bigrd:1;
+		uint64_t bigwr:1;
+		uint64_t vrtpe:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtwr:1;
+		uint64_t holewr:1;
+		uint64_t holerd:1;
+	} s;
+	struct cvmx_l2c_int_ena_s cn63xx;
+	struct cvmx_l2c_int_ena_cn63xxp1 {
+		uint64_t reserved_6_63:58;
+		uint64_t vrtpe:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtwr:1;
+		uint64_t holewr:1;
+		uint64_t holerd:1;
+	} cn63xxp1;
+};
+
+union cvmx_l2c_int_reg {
+	uint64_t u64;
+	struct cvmx_l2c_int_reg_s {
+		uint64_t reserved_17_63:47;
+		uint64_t tad0:1;
+		uint64_t reserved_8_15:8;
+		uint64_t bigrd:1;
+		uint64_t bigwr:1;
+		uint64_t vrtpe:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtwr:1;
+		uint64_t holewr:1;
+		uint64_t holerd:1;
+	} s;
+	struct cvmx_l2c_int_reg_s cn63xx;
+	struct cvmx_l2c_int_reg_cn63xxp1 {
+		uint64_t reserved_17_63:47;
+		uint64_t tad0:1;
+		uint64_t reserved_6_15:10;
+		uint64_t vrtpe:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtwr:1;
+		uint64_t holewr:1;
+		uint64_t holerd:1;
+	} cn63xxp1;
+};
+
 union cvmx_l2c_int_stat {
 	uint64_t u64;
 	struct cvmx_l2c_int_stat_s {
@@ -484,6 +741,24 @@ union cvmx_l2c_int_stat {
 	struct cvmx_l2c_int_stat_s cn56xxp1;
 };
 
+union cvmx_l2c_iocx_pfc {
+	uint64_t u64;
+	struct cvmx_l2c_iocx_pfc_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_iocx_pfc_s cn63xx;
+	struct cvmx_l2c_iocx_pfc_s cn63xxp1;
+};
+
+union cvmx_l2c_iorx_pfc {
+	uint64_t u64;
+	struct cvmx_l2c_iorx_pfc_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_iorx_pfc_s cn63xx;
+	struct cvmx_l2c_iorx_pfc_s cn63xxp1;
+};
+
 union cvmx_l2c_lckbase {
 	uint64_t u64;
 	struct cvmx_l2c_lckbase_s {
@@ -855,6 +1130,59 @@ union cvmx_l2c_ppgrp {
 	struct cvmx_l2c_ppgrp_s cn56xxp1;
 };
 
+union cvmx_l2c_qos_iobx {
+	uint64_t u64;
+	struct cvmx_l2c_qos_iobx_s {
+		uint64_t reserved_6_63:58;
+		uint64_t dwblvl:2;
+		uint64_t reserved_2_3:2;
+		uint64_t lvl:2;
+	} s;
+	struct cvmx_l2c_qos_iobx_s cn63xx;
+	struct cvmx_l2c_qos_iobx_s cn63xxp1;
+};
+
+union cvmx_l2c_qos_ppx {
+	uint64_t u64;
+	struct cvmx_l2c_qos_ppx_s {
+		uint64_t reserved_2_63:62;
+		uint64_t lvl:2;
+	} s;
+	struct cvmx_l2c_qos_ppx_s cn63xx;
+	struct cvmx_l2c_qos_ppx_s cn63xxp1;
+};
+
+union cvmx_l2c_qos_wgt {
+	uint64_t u64;
+	struct cvmx_l2c_qos_wgt_s {
+		uint64_t reserved_32_63:32;
+		uint64_t wgt3:8;
+		uint64_t wgt2:8;
+		uint64_t wgt1:8;
+		uint64_t wgt0:8;
+	} s;
+	struct cvmx_l2c_qos_wgt_s cn63xx;
+	struct cvmx_l2c_qos_wgt_s cn63xxp1;
+};
+
+union cvmx_l2c_rscx_pfc {
+	uint64_t u64;
+	struct cvmx_l2c_rscx_pfc_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_rscx_pfc_s cn63xx;
+	struct cvmx_l2c_rscx_pfc_s cn63xxp1;
+};
+
+union cvmx_l2c_rsdx_pfc {
+	uint64_t u64;
+	struct cvmx_l2c_rsdx_pfc_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_rsdx_pfc_s cn63xx;
+	struct cvmx_l2c_rsdx_pfc_s cn63xxp1;
+};
+
 union cvmx_l2c_spar0 {
 	uint64_t u64;
 	struct cvmx_l2c_spar0_s {
@@ -960,4 +1288,282 @@ union cvmx_l2c_spar4 {
 	struct cvmx_l2c_spar4_s cn58xxp1;
 };
 
+union cvmx_l2c_tadx_ecc0 {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_ecc0_s {
+		uint64_t reserved_58_63:6;
+		uint64_t ow3ecc:10;
+		uint64_t reserved_42_47:6;
+		uint64_t ow2ecc:10;
+		uint64_t reserved_26_31:6;
+		uint64_t ow1ecc:10;
+		uint64_t reserved_10_15:6;
+		uint64_t ow0ecc:10;
+	} s;
+	struct cvmx_l2c_tadx_ecc0_s cn63xx;
+	struct cvmx_l2c_tadx_ecc0_s cn63xxp1;
+};
+
+union cvmx_l2c_tadx_ecc1 {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_ecc1_s {
+		uint64_t reserved_58_63:6;
+		uint64_t ow7ecc:10;
+		uint64_t reserved_42_47:6;
+		uint64_t ow6ecc:10;
+		uint64_t reserved_26_31:6;
+		uint64_t ow5ecc:10;
+		uint64_t reserved_10_15:6;
+		uint64_t ow4ecc:10;
+	} s;
+	struct cvmx_l2c_tadx_ecc1_s cn63xx;
+	struct cvmx_l2c_tadx_ecc1_s cn63xxp1;
+};
+
+union cvmx_l2c_tadx_ien {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_ien_s {
+		uint64_t reserved_9_63:55;
+		uint64_t wrdislmc:1;
+		uint64_t rddislmc:1;
+		uint64_t noway:1;
+		uint64_t vbfdbe:1;
+		uint64_t vbfsbe:1;
+		uint64_t tagdbe:1;
+		uint64_t tagsbe:1;
+		uint64_t l2ddbe:1;
+		uint64_t l2dsbe:1;
+	} s;
+	struct cvmx_l2c_tadx_ien_s cn63xx;
+	struct cvmx_l2c_tadx_ien_cn63xxp1 {
+		uint64_t reserved_7_63:57;
+		uint64_t noway:1;
+		uint64_t vbfdbe:1;
+		uint64_t vbfsbe:1;
+		uint64_t tagdbe:1;
+		uint64_t tagsbe:1;
+		uint64_t l2ddbe:1;
+		uint64_t l2dsbe:1;
+	} cn63xxp1;
+};
+
+union cvmx_l2c_tadx_int {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_int_s {
+		uint64_t reserved_9_63:55;
+		uint64_t wrdislmc:1;
+		uint64_t rddislmc:1;
+		uint64_t noway:1;
+		uint64_t vbfdbe:1;
+		uint64_t vbfsbe:1;
+		uint64_t tagdbe:1;
+		uint64_t tagsbe:1;
+		uint64_t l2ddbe:1;
+		uint64_t l2dsbe:1;
+	} s;
+	struct cvmx_l2c_tadx_int_s cn63xx;
+};
+
+union cvmx_l2c_tadx_pfc0 {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_pfc0_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_tadx_pfc0_s cn63xx;
+	struct cvmx_l2c_tadx_pfc0_s cn63xxp1;
+};
+
+union cvmx_l2c_tadx_pfc1 {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_pfc1_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_tadx_pfc1_s cn63xx;
+	struct cvmx_l2c_tadx_pfc1_s cn63xxp1;
+};
+
+union cvmx_l2c_tadx_pfc2 {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_pfc2_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_tadx_pfc2_s cn63xx;
+	struct cvmx_l2c_tadx_pfc2_s cn63xxp1;
+};
+
+union cvmx_l2c_tadx_pfc3 {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_pfc3_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_tadx_pfc3_s cn63xx;
+	struct cvmx_l2c_tadx_pfc3_s cn63xxp1;
+};
+
+union cvmx_l2c_tadx_prf {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_prf_s {
+		uint64_t reserved_32_63:32;
+		uint64_t cnt3sel:8;
+		uint64_t cnt2sel:8;
+		uint64_t cnt1sel:8;
+		uint64_t cnt0sel:8;
+	} s;
+	struct cvmx_l2c_tadx_prf_s cn63xx;
+	struct cvmx_l2c_tadx_prf_s cn63xxp1;
+};
+
+union cvmx_l2c_tadx_tag {
+	uint64_t u64;
+	struct cvmx_l2c_tadx_tag_s {
+		uint64_t reserved_46_63:18;
+		uint64_t ecc:6;
+		uint64_t reserved_36_39:4;
+		uint64_t tag:19;
+		uint64_t reserved_4_16:13;
+		uint64_t use:1;
+		uint64_t valid:1;
+		uint64_t dirty:1;
+		uint64_t lock:1;
+	} s;
+	struct cvmx_l2c_tadx_tag_s cn63xx;
+	struct cvmx_l2c_tadx_tag_s cn63xxp1;
+};
+
+union cvmx_l2c_ver_id {
+	uint64_t u64;
+	struct cvmx_l2c_ver_id_s {
+		uint64_t mask:64;
+	} s;
+	struct cvmx_l2c_ver_id_s cn63xx;
+	struct cvmx_l2c_ver_id_s cn63xxp1;
+};
+
+union cvmx_l2c_ver_iob {
+	uint64_t u64;
+	struct cvmx_l2c_ver_iob_s {
+		uint64_t reserved_1_63:63;
+		uint64_t mask:1;
+	} s;
+	struct cvmx_l2c_ver_iob_s cn63xx;
+	struct cvmx_l2c_ver_iob_s cn63xxp1;
+};
+
+union cvmx_l2c_ver_msc {
+	uint64_t u64;
+	struct cvmx_l2c_ver_msc_s {
+		uint64_t reserved_2_63:62;
+		uint64_t invl2:1;
+		uint64_t dwb:1;
+	} s;
+	struct cvmx_l2c_ver_msc_s cn63xx;
+};
+
+union cvmx_l2c_ver_pp {
+	uint64_t u64;
+	struct cvmx_l2c_ver_pp_s {
+		uint64_t reserved_6_63:58;
+		uint64_t mask:6;
+	} s;
+	struct cvmx_l2c_ver_pp_s cn63xx;
+	struct cvmx_l2c_ver_pp_s cn63xxp1;
+};
+
+union cvmx_l2c_virtid_iobx {
+	uint64_t u64;
+	struct cvmx_l2c_virtid_iobx_s {
+		uint64_t reserved_14_63:50;
+		uint64_t dwbid:6;
+		uint64_t reserved_6_7:2;
+		uint64_t id:6;
+	} s;
+	struct cvmx_l2c_virtid_iobx_s cn63xx;
+	struct cvmx_l2c_virtid_iobx_s cn63xxp1;
+};
+
+union cvmx_l2c_virtid_ppx {
+	uint64_t u64;
+	struct cvmx_l2c_virtid_ppx_s {
+		uint64_t reserved_6_63:58;
+		uint64_t id:6;
+	} s;
+	struct cvmx_l2c_virtid_ppx_s cn63xx;
+	struct cvmx_l2c_virtid_ppx_s cn63xxp1;
+};
+
+union cvmx_l2c_vrt_ctl {
+	uint64_t u64;
+	struct cvmx_l2c_vrt_ctl_s {
+		uint64_t reserved_9_63:55;
+		uint64_t ooberr:1;
+		uint64_t reserved_7_7:1;
+		uint64_t memsz:3;
+		uint64_t numid:3;
+		uint64_t enable:1;
+	} s;
+	struct cvmx_l2c_vrt_ctl_s cn63xx;
+	struct cvmx_l2c_vrt_ctl_s cn63xxp1;
+};
+
+union cvmx_l2c_vrt_memx {
+	uint64_t u64;
+	struct cvmx_l2c_vrt_memx_s {
+		uint64_t reserved_36_63:28;
+		uint64_t parity:4;
+		uint64_t data:32;
+	} s;
+	struct cvmx_l2c_vrt_memx_s cn63xx;
+	struct cvmx_l2c_vrt_memx_s cn63xxp1;
+};
+
+union cvmx_l2c_wpar_iobx {
+	uint64_t u64;
+	struct cvmx_l2c_wpar_iobx_s {
+		uint64_t reserved_16_63:48;
+		uint64_t mask:16;
+	} s;
+	struct cvmx_l2c_wpar_iobx_s cn63xx;
+	struct cvmx_l2c_wpar_iobx_s cn63xxp1;
+};
+
+union cvmx_l2c_wpar_ppx {
+	uint64_t u64;
+	struct cvmx_l2c_wpar_ppx_s {
+		uint64_t reserved_16_63:48;
+		uint64_t mask:16;
+	} s;
+	struct cvmx_l2c_wpar_ppx_s cn63xx;
+	struct cvmx_l2c_wpar_ppx_s cn63xxp1;
+};
+
+union cvmx_l2c_xmcx_pfc {
+	uint64_t u64;
+	struct cvmx_l2c_xmcx_pfc_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_xmcx_pfc_s cn63xx;
+	struct cvmx_l2c_xmcx_pfc_s cn63xxp1;
+};
+
+union cvmx_l2c_xmc_cmd {
+	uint64_t u64;
+	struct cvmx_l2c_xmc_cmd_s {
+		uint64_t inuse:1;
+		uint64_t cmd:6;
+		uint64_t reserved_38_56:19;
+		uint64_t addr:38;
+	} s;
+	struct cvmx_l2c_xmc_cmd_s cn63xx;
+	struct cvmx_l2c_xmc_cmd_s cn63xxp1;
+};
+
+union cvmx_l2c_xmdx_pfc {
+	uint64_t u64;
+	struct cvmx_l2c_xmdx_pfc_s {
+		uint64_t count:64;
+	} s;
+	struct cvmx_l2c_xmdx_pfc_s cn63xx;
+	struct cvmx_l2c_xmdx_pfc_s cn63xxp1;
+};
+
 #endif