diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-01-15 10:31:53 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:00:12 +0100 |
| commit | 0ee958e102b62b418c2fb46c3439d4262067a5fc (patch) | |
| tree | e69192dc3112657cdde015ea8a43594a41a24d89 /arch/mips/include/asm/smp-cps.h | |
| parent | b86c2247a20f5d8b6f2b3bd0dfd2c9c8c6908b5e (diff) | |
MIPS: Coherent Processing System SMP implementation
This patch introduces a new SMP implementation for systems implementing
the MIPS Coherent Processing System architecture. The kernel will make
use of the Coherence Manager, Cluster Power Controller & Global
Interrupt Controller in order to detect, bring up & make use of other
cores in the system. SMTC is not supported, so only a single TC per VPE
in the system is used. That is, this option enables an SMVP style setup
but across multiple cores.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6362/
Patchwork: https://patchwork.linux-mips.org/patch/6611/
Patchwork: https://patchwork.linux-mips.org/patch/6651/
Patchwork: https://patchwork.linux-mips.org/patch/6652/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/smp-cps.h')
| -rw-r--r-- | arch/mips/include/asm/smp-cps.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/mips/include/asm/smp-cps.h b/arch/mips/include/asm/smp-cps.h new file mode 100644 index 000000000000..d60d1a2180d1 --- /dev/null +++ b/arch/mips/include/asm/smp-cps.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2013 Imagination Technologies + * Author: Paul Burton <paul.burton@imgtec.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __MIPS_ASM_SMP_CPS_H__ +#define __MIPS_ASM_SMP_CPS_H__ + +#ifndef __ASSEMBLY__ + +struct boot_config { + unsigned int core; + unsigned int vpe; + unsigned long pc; + unsigned long sp; + unsigned long gp; +}; + +extern struct boot_config mips_cps_bootcfg; + +extern void mips_cps_core_entry(void); + +#else /* __ASSEMBLY__ */ + +.extern mips_cps_bootcfg; + +#endif /* __ASSEMBLY__ */ +#endif /* __MIPS_ASM_SMP_CPS_H__ */ |