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authorArnd Bergmann <arnd@arndb.de>2025-03-11 11:48:49 +0100
committerArnd Bergmann <arnd@arndb.de>2025-03-15 11:07:07 +0100
commit976bf3aec388331454362b60cd1b5605f99bfe38 (patch)
treef80b6614f37617b7b2996d4511f515ea776af2aa /arch/mips/include/asm
parent53a83845dd27f7aeb456a0bac01aba9587fbf51f (diff)
mips: drop GENERIC_IOMAP wrapper
All PIO on MIPS platforms is memory mapped, so there is no benefit in the lib/iomap.c wrappers that switch between inb/outb and readb/writeb style accessses. In fact, the '#define PIO_RESERVED 0' setting completely disables the GENERIC_IOMAP functionality, and the '#define PIO_OFFSET mips_io_port_base' setting is based on a misunderstanding of what the offset is meant to do. MIPS started using GENERIC_IOMAP in 2018 with commit b962aeb02205 ("MIPS: Use GENERIC_IOMAP") replacing a simple custom implementation of the same interfaces, but at the time the asm-generic/io.h version was not usable yet. Since the header is now always included, it's now possible to go back to the even simpler version. Use the normal GENERIC_PCI_IOMAP functionality for all mips platforms without the hacky GENERIC_IOMAP, and provide a custom pci_iounmap() for the CONFIG_PCI_DRIVERS_LEGACY case to ensure the I/O port base never gets unmapped. The readsl() prototype needs an extra 'const' keyword to make it compatible with the generic ioread32_rep() alias. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r--arch/mips/include/asm/io.h21
1 files changed, 8 insertions, 13 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 0bddb568af7c..1fe56d1870a6 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -67,17 +67,6 @@ static inline void set_io_port_base(unsigned long base)
}
/*
- * Provide the necessary definitions for generic iomap. We make use of
- * mips_io_port_base for iomap(), but we don't reserve any low addresses for
- * use with I/O ports.
- */
-
-#define HAVE_ARCH_PIO_SIZE
-#define PIO_OFFSET mips_io_port_base
-#define PIO_MASK IO_SPACE_LIMIT
-#define PIO_RESERVED 0x0UL
-
-/*
* Enforce in-order execution of data I/O. In the MIPS architecture
* these are equivalent to corresponding platform-specific memory
* barriers defined in <asm/barrier.h>. API pinched from PowerPC,
@@ -397,8 +386,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \
} \
} \
\
-static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
- unsigned int count) \
+static inline void reads##bwlq(const volatile void __iomem *mem, \
+ void *addr, unsigned int count) \
{ \
volatile type *__addr = addr; \
\
@@ -555,6 +544,12 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);
void __ioread64_copy(void *to, const void __iomem *from, size_t count);
+#ifdef CONFIG_PCI_DRIVERS_LEGACY
+struct pci_dev;
+void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
+#define pci_iounmap pci_iounmap
+#endif
+
#include <asm-generic/io.h>
static inline void *isa_bus_to_virt(unsigned long address)