diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2014-11-27 09:32:25 +0000 |
|---|---|---|
| committer | Markos Chandras <markos.chandras@imgtec.com> | 2015-02-17 15:37:35 +0000 |
| commit | 69b9a2fd05a308b9b1e1f282f3b772491603c582 (patch) | |
| tree | 15a949df838007dfa51396b0286e7e7547f072f3 /arch/mips/include/uapi/asm/inst.h | |
| parent | 84fef630127aa90ef547ddd018d3dc47b1e79a1e (diff) | |
MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions
MIPS R6 uses the <R6 ldc2 opcode for the new BEQZC and JIC instructions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/include/uapi/asm/inst.h')
| -rw-r--r-- | arch/mips/include/uapi/asm/inst.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index 32063c52f24b..721f8fe705a4 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h @@ -32,7 +32,7 @@ enum major_op { sb_op, sh_op, swl_op, sw_op, sdl_op, sdr_op, swr_op, cache_op, ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op, - lld_op, ldc1_op, ldc2_op, ld_op, + lld_op, ldc1_op, ldc2_op, beqzcjic_op = ldc2_op, ld_op, sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op, scd_op, sdc1_op, sdc2_op, sd_op }; |