diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-07-11 16:44:28 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-08-02 00:06:43 +0200 |
| commit | f7a46fa7bb0047d3e226702a0c4b786862fe6843 (patch) | |
| tree | 5b0ffc5e784eae55821d9fe9948e5c61b52f1f30 /arch/mips/kernel/asm-offsets.c | |
| parent | 558155a0a731b4f56846559a57ca7ca921230497 (diff) | |
MIPS: save/restore MSACSR register on context switch
I added a field for the MSACSR register in struct mips_fpu_struct, but
never actually made use of it... This is a clear bug. Save and restore
the MSACSR register along with the vector registers.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7300/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/asm-offsets.c')
| -rw-r--r-- | arch/mips/kernel/asm-offsets.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 4bb5107511e2..b1d84bd4efb3 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -234,6 +234,7 @@ void output_thread_fpu_defines(void) thread.fpu.fpr[31].val64[FPR_IDX(64, 0)]); OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31); + OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr); BLANK(); } |