diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2015-07-09 10:40:45 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-08-26 15:23:14 +0200 |
| commit | 038b0f536e45d85038428d2edc169f1f4089c36d (patch) | |
| tree | afddb6b62058b25f0226bffd3ea011798e03dab7 /arch/mips/kernel/mips-cm.c | |
| parent | c0b584a2691ccbc3c0d4e6cb1874bcf00a921371 (diff) | |
MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels.
The CMGCRBase register (CP0, 15, 3) register is 64-bit on MIPS64
so we change its type to unsigned long.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10644/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/mips-cm.c')
| -rw-r--r-- | arch/mips/kernel/mips-cm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c index 3d2cb6f47898..c390be1cecc9 100644 --- a/arch/mips/kernel/mips-cm.c +++ b/arch/mips/kernel/mips-cm.c @@ -20,7 +20,7 @@ int mips_cm_is64; phys_addr_t __mips_cm_phys_base(void) { u32 config3 = read_c0_config3(); - u32 cmgcr; + unsigned long cmgcr; /* Check the CMGCRBase register is implemented */ if (!(config3 & MIPS_CONF3_CMGCR)) |