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authorPaul Burton <paul.burton@imgtec.com>2016-04-21 12:25:38 +0100
committerRalf Baechle <ralf@linux-mips.org>2016-05-13 15:30:25 +0200
commite70ac023f9515c70cf2b291a294f0f250df29847 (patch)
tree9548c871ba43f1022cfc06216f1d9b5609f85905 /arch/mips/kernel/unaligned.c
parentabf378be49f38c4d3e23581d3df3fa9f1b1b11d2 (diff)
MIPS: Allow emulation for unaligned [LS]DXC1 instructions
If an address error exception occurs for a LDXC1 or SDXC1 instruction, within the cop1x opcode space, allow it to be passed through to the FPU emulator rather than resulting in a SIGILL. This causes LDXC1 & SDXC1 to be handled in a manner consistent with the more common LDC1 & SDC1 instructions. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13143/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/unaligned.c')
-rw-r--r--arch/mips/kernel/unaligned.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 5c62065cbf22..28b3af73a17b 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -1191,6 +1191,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
case ldc1_op:
case swc1_op:
case sdc1_op:
+ case cop1x_op:
die_if_kernel("Unaligned FP access in kernel code", regs);
BUG_ON(!used_math());