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authorMarcin Nowakowski <marcin.nowakowski@imgtec.com>2016-09-30 11:33:45 +0200
committerRalf Baechle <ralf@linux-mips.org>2016-10-06 17:36:39 +0200
commite3031b32840c1bee228c58bb284ebc05f97249c7 (patch)
treea082e9c2338da07cfacd7b716297964f149469c6 /arch/mips/kernel/uprobes.c
parentd66698e0834657161314050b6c99c3eba36b180a (diff)
MIPS: tracing: move insn_has_delay_slot to a shared header
Currently both kprobes and uprobes code have definitions of the insn_has_delay_slot method. Move it to a separate header as an inline method that each probe-specific method can later use. No functional change intended, although the methods slightly varied in the constraints they set for the methods - the uprobes one was chosen as it is slightly more specific when filtering opcode fields. Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14335/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/uprobes.c')
-rw-r--r--arch/mips/kernel/uprobes.c65
1 files changed, 3 insertions, 62 deletions
diff --git a/arch/mips/kernel/uprobes.c b/arch/mips/kernel/uprobes.c
index 15ad17cb2b6e..1161c93a74cb 100644
--- a/arch/mips/kernel/uprobes.c
+++ b/arch/mips/kernel/uprobes.c
@@ -8,71 +8,12 @@
#include <asm/branch.h>
#include <asm/cpu-features.h>
#include <asm/ptrace.h>
-#include <asm/inst.h>
+
+#include "probes-common.h"
static inline int insn_has_delay_slot(const union mips_instruction insn)
{
- switch (insn.i_format.opcode) {
- /*
- * jr and jalr are in r_format format.
- */
- case spec_op:
- switch (insn.r_format.func) {
- case jalr_op:
- case jr_op:
- return 1;
- }
- break;
-
- /*
- * This group contains:
- * bltz_op, bgez_op, bltzl_op, bgezl_op,
- * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
- */
- case bcond_op:
- switch (insn.i_format.rt) {
- case bltz_op:
- case bltzl_op:
- case bgez_op:
- case bgezl_op:
- case bltzal_op:
- case bltzall_op:
- case bgezal_op:
- case bgezall_op:
- case bposge32_op:
- return 1;
- }
- break;
-
- /*
- * These are unconditional and in j_format.
- */
- case jal_op:
- case j_op:
- case beq_op:
- case beql_op:
- case bne_op:
- case bnel_op:
- case blez_op: /* not really i_format */
- case blezl_op:
- case bgtz_op:
- case bgtzl_op:
- return 1;
-
- /*
- * And now the FPA/cp1 branch instructions.
- */
- case cop1_op:
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
- case lwc2_op: /* This is bbit0 on Octeon */
- case ldc2_op: /* This is bbit032 on Octeon */
- case swc2_op: /* This is bbit1 on Octeon */
- case sdc2_op: /* This is bbit132 on Octeon */
-#endif
- return 1;
- }
-
- return 0;
+ return __insn_has_delay_slot(insn);
}
/**