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authorChristoph Hellwig <hch@lst.de>2019-08-26 09:03:44 +0200
committerChristoph Hellwig <hch@lst.de>2019-08-29 16:43:22 +0200
commit419e2f1838819e954071dfa1d1f820ab3386ada1 (patch)
tree5ef040344115ef0a0bbf30461668f5d831fecf2e /arch/mips/mm/dma-noncoherent.c
parentb898e50f9f49f7d90f3bca94ac046145072034a2 (diff)
dma-mapping: remove arch_dma_mmap_pgprot
arch_dma_mmap_pgprot is used for two things: 1) to override the "normal" uncached page attributes for mapping memory coherent to devices that can't snoop the CPU caches 2) to provide the special DMA_ATTR_WRITE_COMBINE semantics on older arm systems and some mips platforms Replace one with the pgprot_dmacoherent macro that is already provided by arm and much simpler to use, and lift the DMA_ATTR_WRITE_COMBINE handling to common code with an explicit arch opt-in. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> # m68k Acked-by: Paul Burton <paul.burton@mips.com> # mips
Diffstat (limited to 'arch/mips/mm/dma-noncoherent.c')
-rw-r--r--arch/mips/mm/dma-noncoherent.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c
index ed56c6fa7be2..1d4d57dd9acf 100644
--- a/arch/mips/mm/dma-noncoherent.c
+++ b/arch/mips/mm/dma-noncoherent.c
@@ -65,14 +65,6 @@ long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
return page_to_pfn(virt_to_page(cached_kernel_address(cpu_addr)));
}
-pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot,
- unsigned long attrs)
-{
- if (attrs & DMA_ATTR_WRITE_COMBINE)
- return pgprot_writecombine(prot);
- return pgprot_noncached(prot);
-}
-
static inline void dma_sync_virt(void *addr, size_t size,
enum dma_data_direction dir)
{