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authorDavid Daney <ddaney@caviumnetworks.com>2010-05-14 12:44:18 -0700
committerRalf Baechle <ralf@linux-mips.org>2010-05-21 21:31:23 +0100
commit0453fb3c528c5eb3483441a466b24a4cb409eec5 (patch)
tree9f3ede7bb21b5accef294cadcf633d251150e8da /arch/mips
parent606c958e2857d29106b8d3b2fc30e22f376c80c5 (diff)
MIPS: Use GCC __builtin_prefetch() to implement prefetch().
GCC's __builtin_prefetch() was introduced a long time ago, all supported GCC versions have it. Lets do what the big boys up in linux/prefetch.h do, except we use '1' as the third parameter to provoke 'PREF 0,...' and 'PREF 1,...' instead of other prefetch hints. This allows for better code generation. In theory the existing embedded asm could be optimized, but the compiler has these builtins, so there is really no point. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1235/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/processor.h12
1 files changed, 3 insertions, 9 deletions
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index ab387910009a..5d33b727acf5 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -344,16 +344,10 @@ unsigned long get_wchan(struct task_struct *p);
#ifdef CONFIG_CPU_HAS_PREFETCH
#define ARCH_HAS_PREFETCH
+#define prefetch(x) __builtin_prefetch((x), 0, 1)
-static inline void prefetch(const void *addr)
-{
- __asm__ __volatile__(
- " .set mips4 \n"
- " pref %0, (%1) \n"
- " .set mips0 \n"
- :
- : "i" (Pref_Load), "r" (addr));
-}
+#define ARCH_HAS_PREFETCHW
+#define prefetchw(x) __builtin_prefetch((x), 1, 1)
#endif