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authorNicholas Piggin <npiggin@gmail.com>2019-06-12 00:30:13 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2019-07-01 16:26:55 +1000
commit4b1f5ccc7cdc89fe208e017f9d40d69cb9e160f4 (patch)
tree9771fc7322af0bbacbf0bae4942509cba8222123 /arch/powerpc/include/asm/exception-64s.h
parent452d23c0f6bd97f2fd8a9691fee79b76040a0feb (diff)
powerpc/64s/exception: fix line wrap and semicolon inconsistencies in macros
By convention, all lines should be separated by a semicolons. Last line should have neither semicolon or line wrap. No generated code change. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/exception-64s.h')
-rw-r--r--arch/powerpc/include/asm/exception-64s.h36
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index bef4e05a6823..b590765f6e45 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -189,11 +189,11 @@
*/
#define LOAD_HANDLER(reg, label) \
ld reg,PACAKBASE(r13); /* get high part of &label */ \
- ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label);
+ ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label)
#define __LOAD_HANDLER(reg, label) \
ld reg,PACAKBASE(r13); \
- ori reg,reg,(ABS_ADDR(label))@l;
+ ori reg,reg,(ABS_ADDR(label))@l
/*
* Branches from unrelocated code (e.g., interrupts) to labels outside
@@ -202,7 +202,7 @@
#define __LOAD_FAR_HANDLER(reg, label) \
ld reg,PACAKBASE(r13); \
ori reg,reg,(ABS_ADDR(label))@l; \
- addis reg,reg,(ABS_ADDR(label))@h;
+ addis reg,reg,(ABS_ADDR(label))@h
/* Exception register prefixes */
#define EXC_HV H
@@ -277,7 +277,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
INTERRUPT_TO_KERNEL; \
SAVE_CTR(r10, area); \
- mfcr r9;
+ mfcr r9
#define __EXCEPTION_PROLOG_1_POST(area) \
std r11,area+EX_R11(r13); \
@@ -294,7 +294,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define MASKABLE_EXCEPTION_PROLOG_1(area, extra, vec, bitmask) \
__EXCEPTION_PROLOG_1_PRE(area); \
extra(vec, bitmask); \
- __EXCEPTION_PROLOG_1_POST(area);
+ __EXCEPTION_PROLOG_1_POST(area)
/*
* This version of the EXCEPTION_PROLOG_1 is intended
@@ -303,7 +303,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define _EXCEPTION_PROLOG_1(area, extra, vec) \
__EXCEPTION_PROLOG_1_PRE(area); \
extra(vec); \
- __EXCEPTION_PROLOG_1_POST(area);
+ __EXCEPTION_PROLOG_1_POST(area)
#define EXCEPTION_PROLOG_1(area, extra, vec) \
_EXCEPTION_PROLOG_1(area, extra, vec)
@@ -311,7 +311,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define __EXCEPTION_PROLOG_2(label, h) \
ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
- LOAD_HANDLER(r12,label) \
+ LOAD_HANDLER(r12,label); \
mtspr SPRN_##h##SRR0,r12; \
mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
mtspr SPRN_##h##SRR1,r10; \
@@ -325,7 +325,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
xori r10,r10,MSR_RI; /* Clear MSR_RI */ \
mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
- LOAD_HANDLER(r12,label) \
+ LOAD_HANDLER(r12,label); \
mtspr SPRN_##h##SRR0,r12; \
mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
mtspr SPRN_##h##SRR1,r10; \
@@ -339,7 +339,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
SET_SCRATCH0(r13); /* save r13 */ \
EXCEPTION_PROLOG_0(area); \
EXCEPTION_PROLOG_1(area, extra, vec); \
- EXCEPTION_PROLOG_2(label, h);
+ EXCEPTION_PROLOG_2(label, h)
#define __KVMTEST(h, n) \
lbz r10,HSTATE_IN_GUEST(r13); \
@@ -413,7 +413,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define EXCEPTION_PROLOG_NORI(area, label, h, extra, vec) \
EXCEPTION_PROLOG_0(area); \
EXCEPTION_PROLOG_1(area, extra, vec); \
- EXCEPTION_PROLOG_2_NORI(label, h);
+ EXCEPTION_PROLOG_2_NORI(label, h)
#define __KVM_HANDLER(area, h, n) \
@@ -550,16 +550,16 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
/* Version of above for when we have to branch out-of-line */
#define __OOL_EXCEPTION(vec, label, hdlr) \
- SET_SCRATCH0(r13) \
- EXCEPTION_PROLOG_0(PACA_EXGEN) \
- b hdlr;
+ SET_SCRATCH0(r13); \
+ EXCEPTION_PROLOG_0(PACA_EXGEN); \
+ b hdlr
#define STD_EXCEPTION_OOL(vec, label) \
EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
EXCEPTION_PROLOG_2(label, EXC_STD)
#define STD_EXCEPTION_HV(loc, vec, label) \
- EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec);
+ EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
#define STD_EXCEPTION_HV_OOL(vec, label) \
EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
@@ -567,14 +567,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define STD_RELON_EXCEPTION(loc, vec, label) \
/* No guest interrupts come through here */ \
- EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_STD, NOTEST, vec);
+ EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_STD, NOTEST, vec)
#define STD_RELON_EXCEPTION_OOL(vec, label) \
EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
EXCEPTION_PROLOG_2_RELON(label, EXC_STD)
#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
- EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec);
+ EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
@@ -619,7 +619,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
SET_SCRATCH0(r13); /* save r13 */ \
EXCEPTION_PROLOG_0(PACA_EXGEN); \
MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
- EXCEPTION_PROLOG_2(label, h);
+ EXCEPTION_PROLOG_2(label, h)
#define MASKABLE_EXCEPTION(vec, label, bitmask) \
__MASKABLE_EXCEPTION(vec, label, EXC_STD, SOFTEN_TEST_PR, bitmask)
@@ -646,7 +646,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask) \
MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
- EXCEPTION_PROLOG_2(label, EXC_STD);
+ EXCEPTION_PROLOG_2(label, EXC_STD)
#define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask) \
__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)