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author | Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> | 2020-06-08 12:39:03 +0530 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-09-15 22:13:22 +1000 |
commit | 7746406baa3bc9e23fdd7b7da2f04d86e25ab837 (patch) | |
tree | cd34b1203391d22c9b809c40cf5ddcea6696e453 /arch/powerpc/include/asm/immap_cpm2.h | |
parent | eb553f16973ade990d05946af9ae191394712c8a (diff) |
powerpc/book3s64/hash/4k: Support large linear mapping range with 4K
With commit: 0034d395f89d ("powerpc/mm/hash64: Map all the kernel
regions in the same 0xc range"), we now split the 64TB address range
into 4 contexts each of 16TB. That implies we can do only 16TB linear
mapping.
On some systems, eg. Power9, memory attached to nodes > 0 will appear
above 16TB in the linear mapping. This resulted in kernel crash when
we boot such systems in hash translation mode with 4K PAGE_SIZE.
This patch updates the kernel mapping such that we now start supporting upto
61TB of memory with 4K. The kernel mapping now looks like below 4K PAGE_SIZE
and hash translation.
vmalloc start = 0xc0003d0000000000
IO start = 0xc0003e0000000000
vmemmap start = 0xc0003f0000000000
Our MAX_PHYSMEM_BITS for 4K is still 64TB even though we can only map 61TB.
We prevent bolt mapping anything outside 61TB range by checking against
H_VMALLOC_START.
Fixes: 0034d395f89d ("powerpc/mm/hash64: Map all the kernel regions in the same 0xc range")
Reported-by: Cameron Berkenpas <cam@neo-zeon.de>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200608070904.387440-3-aneesh.kumar@linux.ibm.com
Diffstat (limited to 'arch/powerpc/include/asm/immap_cpm2.h')
0 files changed, 0 insertions, 0 deletions