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authorKajol Jain <kjain@linux.ibm.com>2022-06-10 19:11:12 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2022-06-29 08:57:45 +1000
commit9ac92fecd1dbfcabd64925571b94151d7a814878 (patch)
tree9986894947dfd3e4678d5389358ba539b8bba477 /arch/powerpc/include/asm/xor.h
parentc178606ab51076d464fe537cd7a6bcbc615939e5 (diff)
selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_sel field
Thresh select bits in the event code is used to program thresh_sel field in Monitor Mode Control Register A (MMCRA: 45-47). When scheduling events as a group, all events in that group should match value in these bits. Otherwise event open for the sibling events will fail. Testcase uses event code PM_MRK_INST_CMPL (0x401e0) as leader and another event PM_THRESH_MET (0x101ec) as sibling event, and checks if group constraint checks for thresh_sel field added correctly via perf interface. Signed-off-by: Kajol Jain <kjain@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220610134113.62991-35-atrajeev@linux.vnet.ibm.com
Diffstat (limited to 'arch/powerpc/include/asm/xor.h')
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